1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright (c) 2023, Intel Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * 3. Neither the name of the Intel Corporation nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 /*$FreeBSD$*/ 32 33 /** 34 * @file ice_lib.h 35 * @brief header for generic device and sysctl functions 36 * 37 * Contains definitions and function declarations for the ice_lib.c file. It 38 * does not depend on the iflib networking stack. 39 */ 40 41 #ifndef _ICE_LIB_H_ 42 #define _ICE_LIB_H_ 43 44 #include <sys/types.h> 45 #include <sys/bus.h> 46 #include <sys/rman.h> 47 #include <sys/socket.h> 48 #include <sys/sbuf.h> 49 #include <sys/sysctl.h> 50 #include <sys/syslog.h> 51 #include <sys/module.h> 52 #include <sys/proc.h> 53 54 #include <net/if.h> 55 #include <net/if_var.h> 56 #include <net/if_media.h> 57 #include <net/ethernet.h> 58 59 #include <sys/bitstring.h> 60 61 #include "ice_dcb.h" 62 #include "ice_type.h" 63 #include "ice_common.h" 64 #include "ice_flow.h" 65 #include "ice_sched.h" 66 #include "ice_resmgr.h" 67 68 #include "ice_rdma_internal.h" 69 70 #include "ice_rss.h" 71 72 /* Hide debug sysctls unless INVARIANTS is enabled */ 73 #ifdef INVARIANTS 74 #define ICE_CTLFLAG_DEBUG 0 75 #else 76 #define ICE_CTLFLAG_DEBUG CTLFLAG_SKIP 77 #endif 78 79 /** 80 * for_each_set_bit - For loop over each set bit in a bit string 81 * @bit: storage for the bit index 82 * @data: address of data block to loop over 83 * @nbits: maximum number of bits to loop over 84 * 85 * macro to create a for loop over a bit string, which runs the body once for 86 * each bit that is set in the string. The bit variable will be set to the 87 * index of each set bit in the string, with zero representing the first bit. 88 */ 89 #define for_each_set_bit(bit, data, nbits) \ 90 for (bit_ffs((bitstr_t *)(data), (nbits), &(bit)); \ 91 (bit) != -1; \ 92 bit_ffs_at((bitstr_t *)(data), (bit) + 1, (nbits), &(bit))) 93 94 /** 95 * @var broadcastaddr 96 * @brief broadcast MAC address 97 * 98 * constant defining the broadcast MAC address, used for programming the 99 * broadcast address as a MAC filter for the PF VSI. 100 */ 101 static const u8 broadcastaddr[ETHER_ADDR_LEN] = { 102 0xff, 0xff, 0xff, 0xff, 0xff, 0xff 103 }; 104 105 MALLOC_DECLARE(M_ICE); 106 107 extern const char ice_driver_version[]; 108 extern const uint8_t ice_major_version; 109 extern const uint8_t ice_minor_version; 110 extern const uint8_t ice_patch_version; 111 extern const uint8_t ice_rc_version; 112 113 /* global sysctl indicating whether the Tx FC filter should be enabled */ 114 extern bool ice_enable_tx_fc_filter; 115 116 /* global sysctl indicating whether the Tx LLDP filter should be enabled */ 117 extern bool ice_enable_tx_lldp_filter; 118 119 /* global sysctl indicating whether FW health status events should be enabled */ 120 extern bool ice_enable_health_events; 121 122 /* global sysctl indicating whether to enable 5-layer scheduler topology */ 123 extern bool ice_tx_balance_en; 124 125 /** 126 * @struct ice_bar_info 127 * @brief PCI BAR mapping information 128 * 129 * Contains data about a PCI BAR that the driver has mapped for use. 130 */ 131 struct ice_bar_info { 132 struct resource *res; 133 bus_space_tag_t tag; 134 bus_space_handle_t handle; 135 bus_size_t size; 136 int rid; 137 }; 138 139 /* Alignment for queues */ 140 #define DBA_ALIGN 128 141 142 /* Maximum TSO size is (256K)-1 */ 143 #define ICE_TSO_SIZE ((256*1024) - 1) 144 145 /* Minimum size for TSO MSS */ 146 #define ICE_MIN_TSO_MSS 64 147 148 #define ICE_MAX_TX_SEGS 8 149 #define ICE_MAX_TSO_SEGS 128 150 151 #define ICE_MAX_DMA_SEG_SIZE ((16*1024) - 1) 152 153 #define ICE_MAX_RX_SEGS 5 154 155 #define ICE_MAX_TSO_HDR_SEGS 3 156 157 #define ICE_MSIX_BAR 3 158 159 #define ICE_DEFAULT_DESC_COUNT 1024 160 #define ICE_MAX_DESC_COUNT 8160 161 #define ICE_MIN_DESC_COUNT 64 162 #define ICE_DESC_COUNT_INCR 32 163 164 /* List of hardware offloads we support */ 165 #define ICE_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_TCP | CSUM_IP_UDP | CSUM_IP_SCTP | \ 166 CSUM_IP6_TCP| CSUM_IP6_UDP | CSUM_IP6_SCTP | \ 167 CSUM_IP_TSO | CSUM_IP6_TSO) 168 169 /* Macros to decide what kind of hardware offload to enable */ 170 #define ICE_CSUM_TCP (CSUM_IP_TCP|CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP6_TCP) 171 #define ICE_CSUM_UDP (CSUM_IP_UDP|CSUM_IP6_UDP) 172 #define ICE_CSUM_SCTP (CSUM_IP_SCTP|CSUM_IP6_SCTP) 173 #define ICE_CSUM_IP (CSUM_IP|CSUM_IP_TSO) 174 175 /* List of known RX CSUM offload flags */ 176 #define ICE_RX_CSUM_FLAGS (CSUM_L3_CALC | CSUM_L3_VALID | CSUM_L4_CALC | \ 177 CSUM_L4_VALID | CSUM_L5_CALC | CSUM_L5_VALID | \ 178 CSUM_COALESCED) 179 180 /* List of interface capabilities supported by ice hardware */ 181 #define ICE_FULL_CAPS \ 182 (IFCAP_TSO4 | IFCAP_TSO6 | \ 183 IFCAP_TXCSUM | IFCAP_TXCSUM_IPV6 | \ 184 IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6 | \ 185 IFCAP_VLAN_HWFILTER | IFCAP_VLAN_HWTSO | \ 186 IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWTSO | \ 187 IFCAP_VLAN_MTU | IFCAP_JUMBO_MTU | IFCAP_LRO) 188 189 /* Safe mode disables support for hardware checksums and TSO */ 190 #define ICE_SAFE_CAPS \ 191 (ICE_FULL_CAPS & ~(IFCAP_HWCSUM | IFCAP_TSO | \ 192 IFCAP_VLAN_HWTSO | IFCAP_VLAN_HWCSUM)) 193 194 #define ICE_CAPS(sc) \ 195 (ice_is_bit_set(sc->feat_en, ICE_FEATURE_SAFE_MODE) ? ICE_SAFE_CAPS : ICE_FULL_CAPS) 196 197 /** 198 * ICE_NVM_ACCESS 199 * @brief Private ioctl command number for NVM access ioctls 200 * 201 * The ioctl command number used by NVM update for accessing the driver for 202 * NVM access commands. 203 */ 204 #define ICE_NVM_ACCESS \ 205 (((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 5) 206 207 /** 208 * ICE_DEBUG_DUMP 209 * @brief Private ioctl command number for retrieving debug dump data 210 * 211 * The ioctl command number used by a userspace tool for accessing the driver for 212 * getting debug dump data from the firmware. 213 */ 214 #define ICE_DEBUG_DUMP \ 215 (((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 6) 216 217 #define ICE_AQ_LEN 1023 218 #define ICE_MBXQ_LEN 512 219 #define ICE_SBQ_LEN 512 220 221 #define ICE_CTRLQ_WORK_LIMIT 256 222 223 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 224 225 /* wait up to 50 microseconds for queue state change */ 226 #define ICE_Q_WAIT_RETRY_LIMIT 5 227 228 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 229 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 230 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 231 232 /* 233 * For now, set this to the hardware maximum. Each function gets a smaller 234 * number assigned to it in hw->func_caps.guar_num_vsi, though there 235 * appears to be no guarantee that is the maximum number that a function 236 * can use. 237 */ 238 #define ICE_MAX_VSI_AVAILABLE 768 239 240 /* Maximum size of a single frame (for Tx and Rx) */ 241 #define ICE_MAX_FRAME_SIZE ICE_AQ_SET_MAC_FRAME_SIZE_MAX 242 243 /* Maximum MTU size */ 244 #define ICE_MAX_MTU (ICE_MAX_FRAME_SIZE - \ 245 ETHER_HDR_LEN - ETHER_CRC_LEN - ETHER_VLAN_ENCAP_LEN) 246 247 /* 248 * Hardware requires that TSO packets have an segment size of at least 64 249 * bytes. To avoid sending bad frames to the hardware, the driver forces the 250 * MSS for all TSO packets to have a segment size of at least 64 bytes. 251 * 252 * However, if the MTU is reduced below a certain size, then the resulting 253 * larger MSS can result in transmitting segmented frames with a packet size 254 * larger than the MTU. 255 * 256 * Avoid this by preventing the MTU from being lowered below this limit. 257 * Alternative solutions require changing the TCP stack to disable offloading 258 * the segmentation when the requested segment size goes below 64 bytes. 259 */ 260 #define ICE_MIN_MTU 112 261 262 /* 263 * The default number of queues reserved for a VF is 4, according to the 264 * AVF Base Mode specification. 265 */ 266 #define ICE_DEFAULT_VF_QUEUES 4 267 268 /* 269 * The maximum number of RX queues allowed per TC in a VSI. 270 */ 271 #define ICE_MAX_RXQS_PER_TC 256 272 273 /* 274 * There are three settings that can be updated independently or 275 * altogether: Link speed, FEC, and Flow Control. These macros allow 276 * the caller to specify which setting(s) to update. 277 */ 278 #define ICE_APPLY_LS BIT(0) 279 #define ICE_APPLY_FEC BIT(1) 280 #define ICE_APPLY_FC BIT(2) 281 #define ICE_APPLY_LS_FEC (ICE_APPLY_LS | ICE_APPLY_FEC) 282 #define ICE_APPLY_LS_FC (ICE_APPLY_LS | ICE_APPLY_FC) 283 #define ICE_APPLY_FEC_FC (ICE_APPLY_FEC | ICE_APPLY_FC) 284 #define ICE_APPLY_LS_FEC_FC (ICE_APPLY_LS_FEC | ICE_APPLY_FC) 285 286 /** 287 * @enum ice_dyn_idx_t 288 * @brief Dynamic Control ITR indexes 289 * 290 * This enum matches hardware bits and is meant to be used by DYN_CTLN 291 * registers and QINT registers or more generally anywhere in the manual 292 * mentioning ITR_INDX, ITR_NONE cannot be used as an index 'n' into any 293 * register but instead is a special value meaning "don't update" ITR0/1/2. 294 */ 295 enum ice_dyn_idx_t { 296 ICE_IDX_ITR0 = 0, 297 ICE_IDX_ITR1 = 1, 298 ICE_IDX_ITR2 = 2, 299 ICE_ITR_NONE = 3 /* ITR_NONE must not be used as an index */ 300 }; 301 302 /* By convenction ITR0 is used for RX, and ITR1 is used for TX */ 303 #define ICE_RX_ITR ICE_IDX_ITR0 304 #define ICE_TX_ITR ICE_IDX_ITR1 305 306 #define ICE_ITR_MAX 8160 307 308 /* Define the default Tx and Rx ITR as 50us (translates to ~20k int/sec max) */ 309 #define ICE_DFLT_TX_ITR 50 310 #define ICE_DFLT_RX_ITR 50 311 312 /** 313 * ice_itr_to_reg - Convert an ITR setting into its register equivalent 314 * @hw: The device HW structure 315 * @itr_setting: the ITR setting to convert 316 * 317 * Based on the hardware ITR granularity, convert an ITR setting into the 318 * correct value to prepare programming to the HW. 319 */ 320 static inline u16 ice_itr_to_reg(struct ice_hw *hw, u16 itr_setting) 321 { 322 return itr_setting / hw->itr_gran; 323 } 324 325 /** 326 * @enum ice_rx_dtype 327 * @brief DTYPE header split options 328 * 329 * This enum matches the Rx context bits to define whether header split is 330 * enabled or not. 331 */ 332 enum ice_rx_dtype { 333 ICE_RX_DTYPE_NO_SPLIT = 0, 334 ICE_RX_DTYPE_HEADER_SPLIT = 1, 335 ICE_RX_DTYPE_SPLIT_ALWAYS = 2, 336 }; 337 338 /* Strings used for displaying FEC mode 339 * 340 * Use ice_fec_str() to get these unless these need to be embedded in a 341 * string constant. 342 */ 343 #define ICE_FEC_STRING_AUTO "Auto" 344 #define ICE_FEC_STRING_RS "RS-FEC" 345 #define ICE_FEC_STRING_BASER "FC-FEC/BASE-R" 346 #define ICE_FEC_STRING_NONE "None" 347 #define ICE_FEC_STRING_DIS_AUTO "Auto (w/ No-FEC)" 348 349 /* Strings used for displaying Flow Control mode 350 * 351 * Use ice_fc_str() to get these unless these need to be embedded in a 352 * string constant. 353 */ 354 #define ICE_FC_STRING_FULL "Full" 355 #define ICE_FC_STRING_TX "Tx" 356 #define ICE_FC_STRING_RX "Rx" 357 #define ICE_FC_STRING_NONE "None" 358 359 /* 360 * The number of times the ice_handle_i2c_req function will retry reading 361 * I2C data via the Admin Queue before returning EBUSY. 362 */ 363 #define ICE_I2C_MAX_RETRIES 10 364 365 /* 366 * The Start LLDP Agent AQ command will fail if it's sent too soon after 367 * the LLDP agent is stopped. The period between the stop and start 368 * commands must currently be at least 2 seconds. 369 */ 370 #define ICE_START_LLDP_RETRY_WAIT (2 * hz) 371 372 /* 373 * The ice_(set|clear)_vsi_promisc() function expects a mask of promiscuous 374 * modes to operate on. This mask is the default one for the driver, where 375 * promiscuous is enabled/disabled for all types of non-VLAN-tagged/VLAN 0 376 * traffic. 377 */ 378 #define ICE_VSI_PROMISC_MASK (ICE_PROMISC_UCAST_TX | \ 379 ICE_PROMISC_UCAST_RX | \ 380 ICE_PROMISC_MCAST_TX | \ 381 ICE_PROMISC_MCAST_RX) 382 383 /* 384 * Only certain cluster IDs are valid for the FW debug dump functionality, 385 * so define a mask of those here. 386 */ 387 #define ICE_FW_DEBUG_DUMP_VALID_CLUSTER_MASK 0x1af 388 389 struct ice_softc; 390 391 /** 392 * @enum ice_rx_cso_stat 393 * @brief software checksum offload statistics 394 * 395 * Enumeration of possible checksum offload statistics captured by software 396 * during the Rx path. 397 */ 398 enum ice_rx_cso_stat { 399 ICE_CSO_STAT_RX_IP4_ERR, 400 ICE_CSO_STAT_RX_IP6_ERR, 401 ICE_CSO_STAT_RX_L3_ERR, 402 ICE_CSO_STAT_RX_TCP_ERR, 403 ICE_CSO_STAT_RX_UDP_ERR, 404 ICE_CSO_STAT_RX_SCTP_ERR, 405 ICE_CSO_STAT_RX_L4_ERR, 406 ICE_CSO_STAT_RX_COUNT 407 }; 408 409 /** 410 * @enum ice_tx_cso_stat 411 * @brief software checksum offload statistics 412 * 413 * Enumeration of possible checksum offload statistics captured by software 414 * during the Tx path. 415 */ 416 enum ice_tx_cso_stat { 417 ICE_CSO_STAT_TX_TCP, 418 ICE_CSO_STAT_TX_UDP, 419 ICE_CSO_STAT_TX_SCTP, 420 ICE_CSO_STAT_TX_IP4, 421 ICE_CSO_STAT_TX_IP6, 422 ICE_CSO_STAT_TX_L3_ERR, 423 ICE_CSO_STAT_TX_L4_ERR, 424 ICE_CSO_STAT_TX_COUNT 425 }; 426 427 /** 428 * @struct tx_stats 429 * @brief software Tx statistics 430 * 431 * Contains software counted Tx statistics for a single queue 432 */ 433 struct tx_stats { 434 /* Soft Stats */ 435 u64 tx_bytes; 436 u64 tx_packets; 437 u64 mss_too_small; 438 u64 cso[ICE_CSO_STAT_TX_COUNT]; 439 }; 440 441 /** 442 * @struct rx_stats 443 * @brief software Rx statistics 444 * 445 * Contains software counted Rx statistics for a single queue 446 */ 447 struct rx_stats { 448 /* Soft Stats */ 449 u64 rx_packets; 450 u64 rx_bytes; 451 u64 desc_errs; 452 u64 cso[ICE_CSO_STAT_RX_COUNT]; 453 }; 454 455 /** 456 * @struct ice_vsi_hw_stats 457 * @brief hardware statistics for a VSI 458 * 459 * Stores statistics that are generated by hardware for a VSI. 460 */ 461 struct ice_vsi_hw_stats { 462 struct ice_eth_stats prev; 463 struct ice_eth_stats cur; 464 bool offsets_loaded; 465 }; 466 467 /** 468 * @struct ice_pf_hw_stats 469 * @brief hardware statistics for a PF 470 * 471 * Stores statistics that are generated by hardware for each PF. 472 */ 473 struct ice_pf_hw_stats { 474 struct ice_hw_port_stats prev; 475 struct ice_hw_port_stats cur; 476 bool offsets_loaded; 477 }; 478 479 /** 480 * @struct ice_pf_sw_stats 481 * @brief software statistics for a PF 482 * 483 * Contains software generated statistics relevant to a PF. 484 */ 485 struct ice_pf_sw_stats { 486 /* # of reset events handled, by type */ 487 u32 corer_count; 488 u32 globr_count; 489 u32 empr_count; 490 u32 pfr_count; 491 492 /* # of detected MDD events for Tx and Rx */ 493 u32 tx_mdd_count; 494 u32 rx_mdd_count; 495 }; 496 497 /** 498 * @struct ice_tc_info 499 * @brief Traffic class information for a VSI 500 * 501 * Stores traffic class information used in configuring 502 * a VSI. 503 */ 504 struct ice_tc_info { 505 u16 qoffset; /* Offset in VSI queue space */ 506 u16 qcount_tx; /* TX queues for this Traffic Class */ 507 u16 qcount_rx; /* RX queues */ 508 }; 509 510 /** 511 * @struct ice_vsi 512 * @brief VSI structure 513 * 514 * Contains data relevant to a single VSI 515 */ 516 struct ice_vsi { 517 /* back pointer to the softc */ 518 struct ice_softc *sc; 519 520 bool dynamic; /* if true, dynamically allocated */ 521 522 enum ice_vsi_type type; /* type of this VSI */ 523 u16 idx; /* software index to sc->all_vsi[] */ 524 525 u16 *tx_qmap; /* Tx VSI to PF queue mapping */ 526 u16 *rx_qmap; /* Rx VSI to PF queue mapping */ 527 528 bitstr_t *vmap; /* Vector(s) assigned to VSI */ 529 530 enum ice_resmgr_alloc_type qmap_type; 531 532 struct ice_tx_queue *tx_queues; /* Tx queue array */ 533 struct ice_rx_queue *rx_queues; /* Rx queue array */ 534 535 int num_tx_queues; 536 int num_rx_queues; 537 int num_vectors; 538 539 int16_t rx_itr; 540 int16_t tx_itr; 541 542 /* RSS configuration */ 543 u16 rss_table_size; /* HW RSS table size */ 544 u8 rss_lut_type; /* Used to configure Get/Set RSS LUT AQ call */ 545 546 int max_frame_size; 547 u16 mbuf_sz; 548 549 struct ice_aqc_vsi_props info; 550 551 /* DCB configuration */ 552 u8 num_tcs; /* Total number of enabled TCs */ 553 u16 tc_map; /* bitmap of enabled Traffic Classes */ 554 /* Information for each traffic class */ 555 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 556 557 /* context for per-VSI sysctls */ 558 struct sysctl_ctx_list ctx; 559 struct sysctl_oid *vsi_node; 560 561 /* context for per-txq sysctls */ 562 struct sysctl_ctx_list txqs_ctx; 563 struct sysctl_oid *txqs_node; 564 565 /* context for per-rxq sysctls */ 566 struct sysctl_ctx_list rxqs_ctx; 567 struct sysctl_oid *rxqs_node; 568 569 /* VSI-level stats */ 570 struct ice_vsi_hw_stats hw_stats; 571 }; 572 573 /** 574 * @struct ice_debug_dump_cmd 575 * @brief arguments/return value for debug dump ioctl 576 */ 577 struct ice_debug_dump_cmd { 578 u32 offset; /* offset to read/write from table, in bytes */ 579 u16 cluster_id; 580 u16 table_id; 581 u16 data_size; /* size of data field, in bytes */ 582 u16 reserved1; 583 u32 reserved2; 584 u8 data[]; 585 }; 586 587 /** 588 * @enum ice_state 589 * @brief Driver state flags 590 * 591 * Used to indicate the status of various driver events. Intended to be 592 * modified only using atomic operations, so that we can use it even in places 593 * which aren't locked. 594 */ 595 enum ice_state { 596 ICE_STATE_CONTROLQ_EVENT_PENDING, 597 ICE_STATE_VFLR_PENDING, 598 ICE_STATE_MDD_PENDING, 599 ICE_STATE_RESET_OICR_RECV, 600 ICE_STATE_RESET_PFR_REQ, 601 ICE_STATE_PREPARED_FOR_RESET, 602 ICE_STATE_RESET_FAILED, 603 ICE_STATE_DRIVER_INITIALIZED, 604 ICE_STATE_NO_MEDIA, 605 ICE_STATE_RECOVERY_MODE, 606 ICE_STATE_ROLLBACK_MODE, 607 ICE_STATE_LINK_STATUS_REPORTED, 608 ICE_STATE_ATTACHING, 609 ICE_STATE_DETACHING, 610 ICE_STATE_LINK_DEFAULT_OVERRIDE_PENDING, 611 ICE_STATE_LLDP_RX_FLTR_FROM_DRIVER, 612 ICE_STATE_MULTIPLE_TCS, 613 ICE_STATE_DO_FW_DEBUG_DUMP, 614 /* This entry must be last */ 615 ICE_STATE_LAST, 616 }; 617 618 /* Functions for setting and checking driver state. Note the functions take 619 * bit positions, not bitmasks. The atomic_testandset_32 and 620 * atomic_testandclear_32 operations require bit positions, while the 621 * atomic_set_32 and atomic_clear_32 require bitmasks. This can easily lead to 622 * programming error, so we provide wrapper functions to avoid this. 623 */ 624 625 /** 626 * ice_set_state - Set the specified state 627 * @s: the state bitmap 628 * @bit: the state to set 629 * 630 * Atomically update the state bitmap with the specified bit set. 631 */ 632 static inline void 633 ice_set_state(volatile u32 *s, enum ice_state bit) 634 { 635 /* atomic_set_32 expects a bitmask */ 636 atomic_set_32(s, BIT(bit)); 637 } 638 639 /** 640 * ice_clear_state - Clear the specified state 641 * @s: the state bitmap 642 * @bit: the state to clear 643 * 644 * Atomically update the state bitmap with the specified bit cleared. 645 */ 646 static inline void 647 ice_clear_state(volatile u32 *s, enum ice_state bit) 648 { 649 /* atomic_clear_32 expects a bitmask */ 650 atomic_clear_32(s, BIT(bit)); 651 } 652 653 /** 654 * ice_testandset_state - Test and set the specified state 655 * @s: the state bitmap 656 * @bit: the bit to test 657 * 658 * Atomically update the state bitmap, setting the specified bit. Returns the 659 * previous value of the bit. 660 */ 661 static inline u32 662 ice_testandset_state(volatile u32 *s, enum ice_state bit) 663 { 664 /* atomic_testandset_32 expects a bit position */ 665 return atomic_testandset_32(s, bit); 666 } 667 668 /** 669 * ice_testandclear_state - Test and clear the specified state 670 * @s: the state bitmap 671 * @bit: the bit to test 672 * 673 * Atomically update the state bitmap, clearing the specified bit. Returns the 674 * previous value of the bit. 675 */ 676 static inline u32 677 ice_testandclear_state(volatile u32 *s, enum ice_state bit) 678 { 679 /* atomic_testandclear_32 expects a bit position */ 680 return atomic_testandclear_32(s, bit); 681 } 682 683 /** 684 * ice_test_state - Test the specified state 685 * @s: the state bitmap 686 * @bit: the bit to test 687 * 688 * Return true if the state is set, false otherwise. Use this only if the flow 689 * does not need to update the state. If you must update the state as well, 690 * prefer ice_testandset_state or ice_testandclear_state. 691 */ 692 static inline u32 693 ice_test_state(volatile u32 *s, enum ice_state bit) 694 { 695 return (*s & BIT(bit)) ? true : false; 696 } 697 698 /** 699 * @struct ice_str_buf 700 * @brief static length buffer for string returning 701 * 702 * Structure containing a fixed size string buffer, used to implement 703 * numeric->string conversion functions that may want to return non-constant 704 * strings. 705 * 706 * This allows returning a fixed size string that is generated by a conversion 707 * function, and then copied to the used location without needing to use an 708 * explicit local variable passed by reference. 709 */ 710 struct ice_str_buf { 711 char str[ICE_STR_BUF_LEN]; 712 }; 713 714 struct ice_str_buf _ice_aq_str(enum ice_aq_err aq_err); 715 struct ice_str_buf _ice_status_str(enum ice_status status); 716 struct ice_str_buf _ice_err_str(int err); 717 struct ice_str_buf _ice_fltr_flag_str(u16 flag); 718 struct ice_str_buf _ice_log_sev_str(u8 log_level); 719 struct ice_str_buf _ice_mdd_tx_tclan_str(u8 event); 720 struct ice_str_buf _ice_mdd_tx_pqm_str(u8 event); 721 struct ice_str_buf _ice_mdd_rx_str(u8 event); 722 struct ice_str_buf _ice_fw_lldp_status(u32 lldp_status); 723 724 #define ice_aq_str(err) _ice_aq_str(err).str 725 #define ice_status_str(err) _ice_status_str(err).str 726 #define ice_err_str(err) _ice_err_str(err).str 727 #define ice_fltr_flag_str(flag) _ice_fltr_flag_str(flag).str 728 729 #define ice_mdd_tx_tclan_str(event) _ice_mdd_tx_tclan_str(event).str 730 #define ice_mdd_tx_pqm_str(event) _ice_mdd_tx_pqm_str(event).str 731 #define ice_mdd_rx_str(event) _ice_mdd_rx_str(event).str 732 733 #define ice_log_sev_str(log_level) _ice_log_sev_str(log_level).str 734 #define ice_fw_lldp_status(lldp_status) _ice_fw_lldp_status(lldp_status).str 735 736 /** 737 * ice_enable_intr - Enable interrupts for given vector 738 * @hw: the device private HW structure 739 * @vector: the interrupt index in PF space 740 * 741 * In MSI or Legacy interrupt mode, interrupt 0 is the only valid index. 742 */ 743 static inline void 744 ice_enable_intr(struct ice_hw *hw, int vector) 745 { 746 u32 dyn_ctl; 747 748 /* Use ITR_NONE so that ITR configuration is not changed. */ 749 dyn_ctl = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 750 (ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S); 751 wr32(hw, GLINT_DYN_CTL(vector), dyn_ctl); 752 } 753 754 /** 755 * ice_disable_intr - Disable interrupts for given vector 756 * @hw: the device private HW structure 757 * @vector: the interrupt index in PF space 758 * 759 * In MSI or Legacy interrupt mode, interrupt 0 is the only valid index. 760 */ 761 static inline void 762 ice_disable_intr(struct ice_hw *hw, int vector) 763 { 764 u32 dyn_ctl; 765 766 /* Use ITR_NONE so that ITR configuration is not changed. */ 767 dyn_ctl = ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S; 768 wr32(hw, GLINT_DYN_CTL(vector), dyn_ctl); 769 } 770 771 /** 772 * ice_is_tx_desc_done - determine if a Tx descriptor is done 773 * @txd: the Tx descriptor to check 774 * 775 * Returns true if hardware is done with a Tx descriptor and software is 776 * capable of re-using it. 777 */ 778 static inline bool 779 ice_is_tx_desc_done(struct ice_tx_desc *txd) 780 { 781 return (((txd->cmd_type_offset_bsz & ICE_TXD_QW1_DTYPE_M) 782 >> ICE_TXD_QW1_DTYPE_S) == ICE_TX_DESC_DTYPE_DESC_DONE); 783 } 784 785 /** 786 * ice_get_pf_id - Get the PF id from the hardware registers 787 * @hw: the ice hardware structure 788 * 789 * Reads the PF_FUNC_RID register and extracts the function number from it. 790 * Intended to be used in cases where hw->pf_id hasn't yet been assigned by 791 * ice_init_hw. 792 * 793 * @pre this function should be called only after PCI register access has been 794 * setup, and prior to ice_init_hw. After hardware has been initialized, the 795 * cached hw->pf_id value can be used. 796 */ 797 static inline u8 798 ice_get_pf_id(struct ice_hw *hw) 799 { 800 return (u8)((rd32(hw, PF_FUNC_RID) & PF_FUNC_RID_FUNCTION_NUMBER_M) >> 801 PF_FUNC_RID_FUNCTION_NUMBER_S); 802 } 803 804 /* Details of how to re-initialize depend on the networking stack */ 805 void ice_request_stack_reinit(struct ice_softc *sc); 806 807 /* Details of how to check if the network stack is detaching us */ 808 bool ice_driver_is_detaching(struct ice_softc *sc); 809 810 const char * ice_fw_module_str(enum ice_aqc_fw_logging_mod module); 811 void ice_add_fw_logging_tunables(struct ice_softc *sc, 812 struct sysctl_oid *parent); 813 void ice_handle_fw_log_event(struct ice_softc *sc, struct ice_aq_desc *desc, 814 void *buf); 815 816 int ice_process_ctrlq(struct ice_softc *sc, enum ice_ctl_q q_type, u16 *pending); 817 int ice_map_bar(device_t dev, struct ice_bar_info *bar, int bar_num); 818 void ice_free_bar(device_t dev, struct ice_bar_info *bar); 819 void ice_set_ctrlq_len(struct ice_hw *hw); 820 void ice_release_vsi(struct ice_vsi *vsi); 821 struct ice_vsi *ice_alloc_vsi(struct ice_softc *sc, enum ice_vsi_type type); 822 int ice_alloc_vsi_qmap(struct ice_vsi *vsi, const int max_tx_queues, 823 const int max_rx_queues); 824 void ice_free_vsi_qmaps(struct ice_vsi *vsi); 825 int ice_initialize_vsi(struct ice_vsi *vsi); 826 void ice_deinit_vsi(struct ice_vsi *vsi); 827 uint64_t ice_aq_speed_to_rate(struct ice_port_info *pi); 828 int ice_get_phy_type_low(uint64_t phy_type_low); 829 int ice_get_phy_type_high(uint64_t phy_type_high); 830 enum ice_status ice_add_media_types(struct ice_softc *sc, struct ifmedia *media); 831 void ice_configure_rxq_interrupt(struct ice_hw *hw, u16 rxqid, u16 vector, u8 itr_idx); 832 void ice_configure_all_rxq_interrupts(struct ice_vsi *vsi); 833 void ice_configure_txq_interrupt(struct ice_hw *hw, u16 txqid, u16 vector, u8 itr_idx); 834 void ice_configure_all_txq_interrupts(struct ice_vsi *vsi); 835 void ice_flush_rxq_interrupts(struct ice_vsi *vsi); 836 void ice_flush_txq_interrupts(struct ice_vsi *vsi); 837 int ice_cfg_vsi_for_tx(struct ice_vsi *vsi); 838 int ice_cfg_vsi_for_rx(struct ice_vsi *vsi); 839 int ice_control_rx_queue(struct ice_vsi *vsi, u16 qidx, bool enable); 840 int ice_control_all_rx_queues(struct ice_vsi *vsi, bool enable); 841 int ice_cfg_pf_default_mac_filters(struct ice_softc *sc); 842 int ice_rm_pf_default_mac_filters(struct ice_softc *sc); 843 void ice_print_nvm_version(struct ice_softc *sc); 844 void ice_update_vsi_hw_stats(struct ice_vsi *vsi); 845 void ice_reset_vsi_stats(struct ice_vsi *vsi); 846 void ice_update_pf_stats(struct ice_softc *sc); 847 void ice_reset_pf_stats(struct ice_softc *sc); 848 void ice_add_device_sysctls(struct ice_softc *sc); 849 void ice_log_hmc_error(struct ice_hw *hw, device_t dev); 850 void ice_add_sysctls_eth_stats(struct sysctl_ctx_list *ctx, 851 struct sysctl_oid *parent, 852 struct ice_eth_stats *stats); 853 void ice_add_vsi_sysctls(struct ice_vsi *vsi); 854 void ice_add_sysctls_mac_stats(struct sysctl_ctx_list *ctx, 855 struct sysctl_oid *parent, 856 struct ice_hw_port_stats *stats); 857 void ice_configure_misc_interrupts(struct ice_softc *sc); 858 int ice_sync_multicast_filters(struct ice_softc *sc); 859 enum ice_status ice_add_vlan_hw_filters(struct ice_vsi *vsi, u16 *vid, 860 u16 length); 861 enum ice_status ice_add_vlan_hw_filter(struct ice_vsi *vsi, u16 vid); 862 enum ice_status ice_remove_vlan_hw_filters(struct ice_vsi *vsi, u16 *vid, 863 u16 length); 864 enum ice_status ice_remove_vlan_hw_filter(struct ice_vsi *vsi, u16 vid); 865 void ice_add_vsi_tunables(struct ice_vsi *vsi, struct sysctl_oid *parent); 866 void ice_del_vsi_sysctl_ctx(struct ice_vsi *vsi); 867 void ice_add_device_tunables(struct ice_softc *sc); 868 int ice_add_vsi_mac_filter(struct ice_vsi *vsi, const u8 *addr); 869 int ice_remove_vsi_mac_filter(struct ice_vsi *vsi, const u8 *addr); 870 int ice_vsi_disable_tx(struct ice_vsi *vsi); 871 void ice_vsi_add_txqs_ctx(struct ice_vsi *vsi); 872 void ice_vsi_add_rxqs_ctx(struct ice_vsi *vsi); 873 void ice_vsi_del_txqs_ctx(struct ice_vsi *vsi); 874 void ice_vsi_del_rxqs_ctx(struct ice_vsi *vsi); 875 void ice_add_txq_sysctls(struct ice_tx_queue *txq); 876 void ice_add_rxq_sysctls(struct ice_rx_queue *rxq); 877 int ice_config_rss(struct ice_vsi *vsi); 878 void ice_clean_all_vsi_rss_cfg(struct ice_softc *sc); 879 enum ice_status ice_load_pkg_file(struct ice_softc *sc); 880 void ice_log_pkg_init(struct ice_softc *sc, enum ice_ddp_state pkg_status); 881 uint64_t ice_get_ifnet_counter(struct ice_vsi *vsi, ift_counter counter); 882 void ice_save_pci_info(struct ice_hw *hw, device_t dev); 883 int ice_replay_all_vsi_cfg(struct ice_softc *sc); 884 void ice_link_up_msg(struct ice_softc *sc); 885 int ice_update_laa_mac(struct ice_softc *sc); 886 void ice_get_and_print_bus_info(struct ice_softc *sc); 887 const char *ice_fec_str(enum ice_fec_mode mode); 888 const char *ice_fc_str(enum ice_fc_mode mode); 889 const char *ice_fwd_act_str(enum ice_sw_fwd_act_type action); 890 const char *ice_state_to_str(enum ice_state state); 891 int ice_init_link_events(struct ice_softc *sc); 892 void ice_configure_rx_itr(struct ice_vsi *vsi); 893 void ice_configure_tx_itr(struct ice_vsi *vsi); 894 void ice_setup_pf_vsi(struct ice_softc *sc); 895 void ice_handle_mdd_event(struct ice_softc *sc); 896 void ice_init_dcb_setup(struct ice_softc *sc); 897 int ice_send_version(struct ice_softc *sc); 898 int ice_cfg_pf_ethertype_filters(struct ice_softc *sc); 899 void ice_init_link_configuration(struct ice_softc *sc); 900 void ice_init_saved_phy_cfg(struct ice_softc *sc); 901 int ice_apply_saved_phy_cfg(struct ice_softc *sc, u8 settings); 902 void ice_set_link_management_mode(struct ice_softc *sc); 903 int ice_module_event_handler(module_t mod, int what, void *arg); 904 int ice_handle_nvm_access_ioctl(struct ice_softc *sc, struct ifdrv *ifd); 905 int ice_handle_i2c_req(struct ice_softc *sc, struct ifi2creq *req); 906 int ice_read_sff_eeprom(struct ice_softc *sc, u16 dev_addr, u16 offset, u8* data, u16 length); 907 int ice_alloc_intr_tracking(struct ice_softc *sc); 908 void ice_free_intr_tracking(struct ice_softc *sc); 909 void ice_set_default_local_lldp_mib(struct ice_softc *sc); 910 void ice_init_health_events(struct ice_softc *sc); 911 void ice_cfg_pba_num(struct ice_softc *sc); 912 int ice_handle_debug_dump_ioctl(struct ice_softc *sc, struct ifdrv *ifd); 913 u8 ice_dcb_get_tc_map(const struct ice_dcbx_cfg *dcbcfg); 914 915 #endif /* _ICE_LIB_H_ */ 916