1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright (c) 2023, Intel Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * 3. Neither the name of the Intel Corporation nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /** 33 * @file ice_lib.h 34 * @brief header for generic device and sysctl functions 35 * 36 * Contains definitions and function declarations for the ice_lib.c file. It 37 * does not depend on the iflib networking stack. 38 */ 39 40 #ifndef _ICE_LIB_H_ 41 #define _ICE_LIB_H_ 42 43 #include <sys/types.h> 44 #include <sys/bus.h> 45 #include <sys/rman.h> 46 #include <sys/socket.h> 47 #include <sys/sbuf.h> 48 #include <sys/sysctl.h> 49 #include <sys/syslog.h> 50 #include <sys/module.h> 51 #include <sys/proc.h> 52 53 #include <net/if.h> 54 #include <net/if_var.h> 55 #include <net/if_media.h> 56 #include <net/ethernet.h> 57 58 #include <sys/bitstring.h> 59 60 #include "ice_dcb.h" 61 #include "ice_type.h" 62 #include "ice_common.h" 63 #include "ice_flow.h" 64 #include "ice_sched.h" 65 #include "ice_resmgr.h" 66 67 #include "ice_rdma_internal.h" 68 69 #include "ice_rss.h" 70 71 /* Hide debug sysctls unless INVARIANTS is enabled */ 72 #ifdef INVARIANTS 73 #define ICE_CTLFLAG_DEBUG 0 74 #else 75 #define ICE_CTLFLAG_DEBUG CTLFLAG_SKIP 76 #endif 77 78 /** 79 * for_each_set_bit - For loop over each set bit in a bit string 80 * @bit: storage for the bit index 81 * @data: address of data block to loop over 82 * @nbits: maximum number of bits to loop over 83 * 84 * macro to create a for loop over a bit string, which runs the body once for 85 * each bit that is set in the string. The bit variable will be set to the 86 * index of each set bit in the string, with zero representing the first bit. 87 */ 88 #define for_each_set_bit(bit, data, nbits) \ 89 for (bit_ffs((bitstr_t *)(data), (nbits), &(bit)); \ 90 (bit) != -1; \ 91 bit_ffs_at((bitstr_t *)(data), (bit) + 1, (nbits), &(bit))) 92 93 /** 94 * @var broadcastaddr 95 * @brief broadcast MAC address 96 * 97 * constant defining the broadcast MAC address, used for programming the 98 * broadcast address as a MAC filter for the PF VSI. 99 */ 100 static const u8 broadcastaddr[ETHER_ADDR_LEN] = { 101 0xff, 0xff, 0xff, 0xff, 0xff, 0xff 102 }; 103 104 MALLOC_DECLARE(M_ICE); 105 106 extern const char ice_driver_version[]; 107 extern const uint8_t ice_major_version; 108 extern const uint8_t ice_minor_version; 109 extern const uint8_t ice_patch_version; 110 extern const uint8_t ice_rc_version; 111 112 /* global sysctl indicating whether the Tx FC filter should be enabled */ 113 extern bool ice_enable_tx_fc_filter; 114 115 /* global sysctl indicating whether the Tx LLDP filter should be enabled */ 116 extern bool ice_enable_tx_lldp_filter; 117 118 /* global sysctl indicating whether FW health status events should be enabled */ 119 extern bool ice_enable_health_events; 120 121 /* global sysctl indicating whether to enable 5-layer scheduler topology */ 122 extern bool ice_tx_balance_en; 123 124 /** 125 * @struct ice_bar_info 126 * @brief PCI BAR mapping information 127 * 128 * Contains data about a PCI BAR that the driver has mapped for use. 129 */ 130 struct ice_bar_info { 131 struct resource *res; 132 bus_space_tag_t tag; 133 bus_space_handle_t handle; 134 bus_size_t size; 135 int rid; 136 }; 137 138 /* Alignment for queues */ 139 #define DBA_ALIGN 128 140 141 /* Maximum TSO size is (256K)-1 */ 142 #define ICE_TSO_SIZE ((256*1024) - 1) 143 144 /* Minimum size for TSO MSS */ 145 #define ICE_MIN_TSO_MSS 64 146 147 #define ICE_MAX_TX_SEGS 8 148 #define ICE_MAX_TSO_SEGS 128 149 150 #define ICE_MAX_DMA_SEG_SIZE ((16*1024) - 1) 151 152 #define ICE_MAX_RX_SEGS 5 153 154 #define ICE_MAX_TSO_HDR_SEGS 3 155 156 #define ICE_MSIX_BAR 3 157 158 #define ICE_DEFAULT_DESC_COUNT 1024 159 #define ICE_MAX_DESC_COUNT 8160 160 #define ICE_MIN_DESC_COUNT 64 161 #define ICE_DESC_COUNT_INCR 32 162 163 /* List of hardware offloads we support */ 164 #define ICE_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_TCP | CSUM_IP_UDP | CSUM_IP_SCTP | \ 165 CSUM_IP6_TCP| CSUM_IP6_UDP | CSUM_IP6_SCTP | \ 166 CSUM_IP_TSO | CSUM_IP6_TSO) 167 168 /* Macros to decide what kind of hardware offload to enable */ 169 #define ICE_CSUM_TCP (CSUM_IP_TCP|CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP6_TCP) 170 #define ICE_CSUM_UDP (CSUM_IP_UDP|CSUM_IP6_UDP) 171 #define ICE_CSUM_SCTP (CSUM_IP_SCTP|CSUM_IP6_SCTP) 172 #define ICE_CSUM_IP (CSUM_IP|CSUM_IP_TSO) 173 174 /* List of known RX CSUM offload flags */ 175 #define ICE_RX_CSUM_FLAGS (CSUM_L3_CALC | CSUM_L3_VALID | CSUM_L4_CALC | \ 176 CSUM_L4_VALID | CSUM_L5_CALC | CSUM_L5_VALID | \ 177 CSUM_COALESCED) 178 179 /* List of interface capabilities supported by ice hardware */ 180 #define ICE_FULL_CAPS \ 181 (IFCAP_TSO4 | IFCAP_TSO6 | \ 182 IFCAP_TXCSUM | IFCAP_TXCSUM_IPV6 | \ 183 IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6 | \ 184 IFCAP_VLAN_HWFILTER | IFCAP_VLAN_HWTSO | \ 185 IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWTSO | \ 186 IFCAP_VLAN_MTU | IFCAP_JUMBO_MTU | IFCAP_LRO) 187 188 /* Safe mode disables support for hardware checksums and TSO */ 189 #define ICE_SAFE_CAPS \ 190 (ICE_FULL_CAPS & ~(IFCAP_HWCSUM | IFCAP_TSO | \ 191 IFCAP_VLAN_HWTSO | IFCAP_VLAN_HWCSUM)) 192 193 #define ICE_CAPS(sc) \ 194 (ice_is_bit_set(sc->feat_en, ICE_FEATURE_SAFE_MODE) ? ICE_SAFE_CAPS : ICE_FULL_CAPS) 195 196 /** 197 * ICE_NVM_ACCESS 198 * @brief Private ioctl command number for NVM access ioctls 199 * 200 * The ioctl command number used by NVM update for accessing the driver for 201 * NVM access commands. 202 */ 203 #define ICE_NVM_ACCESS \ 204 (((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 5) 205 206 /** 207 * ICE_DEBUG_DUMP 208 * @brief Private ioctl command number for retrieving debug dump data 209 * 210 * The ioctl command number used by a userspace tool for accessing the driver for 211 * getting debug dump data from the firmware. 212 */ 213 #define ICE_DEBUG_DUMP \ 214 (((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 6) 215 216 #define ICE_AQ_LEN 1023 217 #define ICE_MBXQ_LEN 512 218 #define ICE_SBQ_LEN 512 219 220 #define ICE_CTRLQ_WORK_LIMIT 256 221 222 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 223 224 /* wait up to 50 microseconds for queue state change */ 225 #define ICE_Q_WAIT_RETRY_LIMIT 5 226 227 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 228 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 229 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 230 231 /* 232 * For now, set this to the hardware maximum. Each function gets a smaller 233 * number assigned to it in hw->func_caps.guar_num_vsi, though there 234 * appears to be no guarantee that is the maximum number that a function 235 * can use. 236 */ 237 #define ICE_MAX_VSI_AVAILABLE 768 238 239 /* Maximum size of a single frame (for Tx and Rx) */ 240 #define ICE_MAX_FRAME_SIZE ICE_AQ_SET_MAC_FRAME_SIZE_MAX 241 242 /* Maximum MTU size */ 243 #define ICE_MAX_MTU (ICE_MAX_FRAME_SIZE - \ 244 ETHER_HDR_LEN - ETHER_CRC_LEN - ETHER_VLAN_ENCAP_LEN) 245 246 /* 247 * Hardware requires that TSO packets have an segment size of at least 64 248 * bytes. To avoid sending bad frames to the hardware, the driver forces the 249 * MSS for all TSO packets to have a segment size of at least 64 bytes. 250 * 251 * However, if the MTU is reduced below a certain size, then the resulting 252 * larger MSS can result in transmitting segmented frames with a packet size 253 * larger than the MTU. 254 * 255 * Avoid this by preventing the MTU from being lowered below this limit. 256 * Alternative solutions require changing the TCP stack to disable offloading 257 * the segmentation when the requested segment size goes below 64 bytes. 258 */ 259 #define ICE_MIN_MTU 112 260 261 /* 262 * The default number of queues reserved for a VF is 4, according to the 263 * AVF Base Mode specification. 264 */ 265 #define ICE_DEFAULT_VF_QUEUES 4 266 267 /* 268 * The maximum number of RX queues allowed per TC in a VSI. 269 */ 270 #define ICE_MAX_RXQS_PER_TC 256 271 272 /* 273 * There are three settings that can be updated independently or 274 * altogether: Link speed, FEC, and Flow Control. These macros allow 275 * the caller to specify which setting(s) to update. 276 */ 277 #define ICE_APPLY_LS BIT(0) 278 #define ICE_APPLY_FEC BIT(1) 279 #define ICE_APPLY_FC BIT(2) 280 #define ICE_APPLY_LS_FEC (ICE_APPLY_LS | ICE_APPLY_FEC) 281 #define ICE_APPLY_LS_FC (ICE_APPLY_LS | ICE_APPLY_FC) 282 #define ICE_APPLY_FEC_FC (ICE_APPLY_FEC | ICE_APPLY_FC) 283 #define ICE_APPLY_LS_FEC_FC (ICE_APPLY_LS_FEC | ICE_APPLY_FC) 284 285 /** 286 * @enum ice_dyn_idx_t 287 * @brief Dynamic Control ITR indexes 288 * 289 * This enum matches hardware bits and is meant to be used by DYN_CTLN 290 * registers and QINT registers or more generally anywhere in the manual 291 * mentioning ITR_INDX, ITR_NONE cannot be used as an index 'n' into any 292 * register but instead is a special value meaning "don't update" ITR0/1/2. 293 */ 294 enum ice_dyn_idx_t { 295 ICE_IDX_ITR0 = 0, 296 ICE_IDX_ITR1 = 1, 297 ICE_IDX_ITR2 = 2, 298 ICE_ITR_NONE = 3 /* ITR_NONE must not be used as an index */ 299 }; 300 301 /* By convenction ITR0 is used for RX, and ITR1 is used for TX */ 302 #define ICE_RX_ITR ICE_IDX_ITR0 303 #define ICE_TX_ITR ICE_IDX_ITR1 304 305 #define ICE_ITR_MAX 8160 306 307 /* Define the default Tx and Rx ITR as 50us (translates to ~20k int/sec max) */ 308 #define ICE_DFLT_TX_ITR 50 309 #define ICE_DFLT_RX_ITR 50 310 311 /** 312 * ice_itr_to_reg - Convert an ITR setting into its register equivalent 313 * @hw: The device HW structure 314 * @itr_setting: the ITR setting to convert 315 * 316 * Based on the hardware ITR granularity, convert an ITR setting into the 317 * correct value to prepare programming to the HW. 318 */ 319 static inline u16 ice_itr_to_reg(struct ice_hw *hw, u16 itr_setting) 320 { 321 return itr_setting / hw->itr_gran; 322 } 323 324 /** 325 * @enum ice_rx_dtype 326 * @brief DTYPE header split options 327 * 328 * This enum matches the Rx context bits to define whether header split is 329 * enabled or not. 330 */ 331 enum ice_rx_dtype { 332 ICE_RX_DTYPE_NO_SPLIT = 0, 333 ICE_RX_DTYPE_HEADER_SPLIT = 1, 334 ICE_RX_DTYPE_SPLIT_ALWAYS = 2, 335 }; 336 337 /* Strings used for displaying FEC mode 338 * 339 * Use ice_fec_str() to get these unless these need to be embedded in a 340 * string constant. 341 */ 342 #define ICE_FEC_STRING_AUTO "Auto" 343 #define ICE_FEC_STRING_RS "RS-FEC" 344 #define ICE_FEC_STRING_BASER "FC-FEC/BASE-R" 345 #define ICE_FEC_STRING_NONE "None" 346 #define ICE_FEC_STRING_DIS_AUTO "Auto (w/ No-FEC)" 347 348 /* Strings used for displaying Flow Control mode 349 * 350 * Use ice_fc_str() to get these unless these need to be embedded in a 351 * string constant. 352 */ 353 #define ICE_FC_STRING_FULL "Full" 354 #define ICE_FC_STRING_TX "Tx" 355 #define ICE_FC_STRING_RX "Rx" 356 #define ICE_FC_STRING_NONE "None" 357 358 /* 359 * The number of times the ice_handle_i2c_req function will retry reading 360 * I2C data via the Admin Queue before returning EBUSY. 361 */ 362 #define ICE_I2C_MAX_RETRIES 10 363 364 /* 365 * The Start LLDP Agent AQ command will fail if it's sent too soon after 366 * the LLDP agent is stopped. The period between the stop and start 367 * commands must currently be at least 2 seconds. 368 */ 369 #define ICE_START_LLDP_RETRY_WAIT (2 * hz) 370 371 /* 372 * The ice_(set|clear)_vsi_promisc() function expects a mask of promiscuous 373 * modes to operate on. This mask is the default one for the driver, where 374 * promiscuous is enabled/disabled for all types of non-VLAN-tagged/VLAN 0 375 * traffic. 376 */ 377 #define ICE_VSI_PROMISC_MASK (ICE_PROMISC_UCAST_TX | \ 378 ICE_PROMISC_UCAST_RX | \ 379 ICE_PROMISC_MCAST_TX | \ 380 ICE_PROMISC_MCAST_RX) 381 382 /* 383 * Only certain cluster IDs are valid for the FW debug dump functionality, 384 * so define a mask of those here. 385 */ 386 #define ICE_FW_DEBUG_DUMP_VALID_CLUSTER_MASK 0x1af 387 388 struct ice_softc; 389 390 /** 391 * @enum ice_rx_cso_stat 392 * @brief software checksum offload statistics 393 * 394 * Enumeration of possible checksum offload statistics captured by software 395 * during the Rx path. 396 */ 397 enum ice_rx_cso_stat { 398 ICE_CSO_STAT_RX_IP4_ERR, 399 ICE_CSO_STAT_RX_IP6_ERR, 400 ICE_CSO_STAT_RX_L3_ERR, 401 ICE_CSO_STAT_RX_TCP_ERR, 402 ICE_CSO_STAT_RX_UDP_ERR, 403 ICE_CSO_STAT_RX_SCTP_ERR, 404 ICE_CSO_STAT_RX_L4_ERR, 405 ICE_CSO_STAT_RX_COUNT 406 }; 407 408 /** 409 * @enum ice_tx_cso_stat 410 * @brief software checksum offload statistics 411 * 412 * Enumeration of possible checksum offload statistics captured by software 413 * during the Tx path. 414 */ 415 enum ice_tx_cso_stat { 416 ICE_CSO_STAT_TX_TCP, 417 ICE_CSO_STAT_TX_UDP, 418 ICE_CSO_STAT_TX_SCTP, 419 ICE_CSO_STAT_TX_IP4, 420 ICE_CSO_STAT_TX_IP6, 421 ICE_CSO_STAT_TX_L3_ERR, 422 ICE_CSO_STAT_TX_L4_ERR, 423 ICE_CSO_STAT_TX_COUNT 424 }; 425 426 /** 427 * @struct tx_stats 428 * @brief software Tx statistics 429 * 430 * Contains software counted Tx statistics for a single queue 431 */ 432 struct tx_stats { 433 /* Soft Stats */ 434 u64 tx_bytes; 435 u64 tx_packets; 436 u64 mss_too_small; 437 u64 cso[ICE_CSO_STAT_TX_COUNT]; 438 }; 439 440 /** 441 * @struct rx_stats 442 * @brief software Rx statistics 443 * 444 * Contains software counted Rx statistics for a single queue 445 */ 446 struct rx_stats { 447 /* Soft Stats */ 448 u64 rx_packets; 449 u64 rx_bytes; 450 u64 desc_errs; 451 u64 cso[ICE_CSO_STAT_RX_COUNT]; 452 }; 453 454 /** 455 * @struct ice_vsi_hw_stats 456 * @brief hardware statistics for a VSI 457 * 458 * Stores statistics that are generated by hardware for a VSI. 459 */ 460 struct ice_vsi_hw_stats { 461 struct ice_eth_stats prev; 462 struct ice_eth_stats cur; 463 bool offsets_loaded; 464 }; 465 466 /** 467 * @struct ice_pf_hw_stats 468 * @brief hardware statistics for a PF 469 * 470 * Stores statistics that are generated by hardware for each PF. 471 */ 472 struct ice_pf_hw_stats { 473 struct ice_hw_port_stats prev; 474 struct ice_hw_port_stats cur; 475 bool offsets_loaded; 476 }; 477 478 /** 479 * @struct ice_pf_sw_stats 480 * @brief software statistics for a PF 481 * 482 * Contains software generated statistics relevant to a PF. 483 */ 484 struct ice_pf_sw_stats { 485 /* # of reset events handled, by type */ 486 u32 corer_count; 487 u32 globr_count; 488 u32 empr_count; 489 u32 pfr_count; 490 491 /* # of detected MDD events for Tx and Rx */ 492 u32 tx_mdd_count; 493 u32 rx_mdd_count; 494 }; 495 496 /** 497 * @struct ice_tc_info 498 * @brief Traffic class information for a VSI 499 * 500 * Stores traffic class information used in configuring 501 * a VSI. 502 */ 503 struct ice_tc_info { 504 u16 qoffset; /* Offset in VSI queue space */ 505 u16 qcount_tx; /* TX queues for this Traffic Class */ 506 u16 qcount_rx; /* RX queues */ 507 }; 508 509 /** 510 * @struct ice_vsi 511 * @brief VSI structure 512 * 513 * Contains data relevant to a single VSI 514 */ 515 struct ice_vsi { 516 /* back pointer to the softc */ 517 struct ice_softc *sc; 518 519 bool dynamic; /* if true, dynamically allocated */ 520 521 enum ice_vsi_type type; /* type of this VSI */ 522 u16 idx; /* software index to sc->all_vsi[] */ 523 524 u16 *tx_qmap; /* Tx VSI to PF queue mapping */ 525 u16 *rx_qmap; /* Rx VSI to PF queue mapping */ 526 527 bitstr_t *vmap; /* Vector(s) assigned to VSI */ 528 529 enum ice_resmgr_alloc_type qmap_type; 530 531 struct ice_tx_queue *tx_queues; /* Tx queue array */ 532 struct ice_rx_queue *rx_queues; /* Rx queue array */ 533 534 int num_tx_queues; 535 int num_rx_queues; 536 int num_vectors; 537 538 int16_t rx_itr; 539 int16_t tx_itr; 540 541 /* RSS configuration */ 542 u16 rss_table_size; /* HW RSS table size */ 543 u8 rss_lut_type; /* Used to configure Get/Set RSS LUT AQ call */ 544 545 int max_frame_size; 546 u16 mbuf_sz; 547 548 struct ice_aqc_vsi_props info; 549 550 /* DCB configuration */ 551 u8 num_tcs; /* Total number of enabled TCs */ 552 u16 tc_map; /* bitmap of enabled Traffic Classes */ 553 /* Information for each traffic class */ 554 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 555 556 /* context for per-VSI sysctls */ 557 struct sysctl_ctx_list ctx; 558 struct sysctl_oid *vsi_node; 559 560 /* context for per-txq sysctls */ 561 struct sysctl_ctx_list txqs_ctx; 562 struct sysctl_oid *txqs_node; 563 564 /* context for per-rxq sysctls */ 565 struct sysctl_ctx_list rxqs_ctx; 566 struct sysctl_oid *rxqs_node; 567 568 /* VSI-level stats */ 569 struct ice_vsi_hw_stats hw_stats; 570 }; 571 572 /** 573 * @struct ice_debug_dump_cmd 574 * @brief arguments/return value for debug dump ioctl 575 */ 576 struct ice_debug_dump_cmd { 577 u32 offset; /* offset to read/write from table, in bytes */ 578 u16 cluster_id; 579 u16 table_id; 580 u16 data_size; /* size of data field, in bytes */ 581 u16 reserved1; 582 u32 reserved2; 583 u8 data[]; 584 }; 585 586 /** 587 * @enum ice_state 588 * @brief Driver state flags 589 * 590 * Used to indicate the status of various driver events. Intended to be 591 * modified only using atomic operations, so that we can use it even in places 592 * which aren't locked. 593 */ 594 enum ice_state { 595 ICE_STATE_CONTROLQ_EVENT_PENDING, 596 ICE_STATE_VFLR_PENDING, 597 ICE_STATE_MDD_PENDING, 598 ICE_STATE_RESET_OICR_RECV, 599 ICE_STATE_RESET_PFR_REQ, 600 ICE_STATE_PREPARED_FOR_RESET, 601 ICE_STATE_RESET_FAILED, 602 ICE_STATE_DRIVER_INITIALIZED, 603 ICE_STATE_NO_MEDIA, 604 ICE_STATE_RECOVERY_MODE, 605 ICE_STATE_ROLLBACK_MODE, 606 ICE_STATE_LINK_STATUS_REPORTED, 607 ICE_STATE_ATTACHING, 608 ICE_STATE_DETACHING, 609 ICE_STATE_LINK_DEFAULT_OVERRIDE_PENDING, 610 ICE_STATE_LLDP_RX_FLTR_FROM_DRIVER, 611 ICE_STATE_MULTIPLE_TCS, 612 ICE_STATE_DO_FW_DEBUG_DUMP, 613 /* This entry must be last */ 614 ICE_STATE_LAST, 615 }; 616 617 /* Functions for setting and checking driver state. Note the functions take 618 * bit positions, not bitmasks. The atomic_testandset_32 and 619 * atomic_testandclear_32 operations require bit positions, while the 620 * atomic_set_32 and atomic_clear_32 require bitmasks. This can easily lead to 621 * programming error, so we provide wrapper functions to avoid this. 622 */ 623 624 /** 625 * ice_set_state - Set the specified state 626 * @s: the state bitmap 627 * @bit: the state to set 628 * 629 * Atomically update the state bitmap with the specified bit set. 630 */ 631 static inline void 632 ice_set_state(volatile u32 *s, enum ice_state bit) 633 { 634 /* atomic_set_32 expects a bitmask */ 635 atomic_set_32(s, BIT(bit)); 636 } 637 638 /** 639 * ice_clear_state - Clear the specified state 640 * @s: the state bitmap 641 * @bit: the state to clear 642 * 643 * Atomically update the state bitmap with the specified bit cleared. 644 */ 645 static inline void 646 ice_clear_state(volatile u32 *s, enum ice_state bit) 647 { 648 /* atomic_clear_32 expects a bitmask */ 649 atomic_clear_32(s, BIT(bit)); 650 } 651 652 /** 653 * ice_testandset_state - Test and set the specified state 654 * @s: the state bitmap 655 * @bit: the bit to test 656 * 657 * Atomically update the state bitmap, setting the specified bit. Returns the 658 * previous value of the bit. 659 */ 660 static inline u32 661 ice_testandset_state(volatile u32 *s, enum ice_state bit) 662 { 663 /* atomic_testandset_32 expects a bit position */ 664 return atomic_testandset_32(s, bit); 665 } 666 667 /** 668 * ice_testandclear_state - Test and clear the specified state 669 * @s: the state bitmap 670 * @bit: the bit to test 671 * 672 * Atomically update the state bitmap, clearing the specified bit. Returns the 673 * previous value of the bit. 674 */ 675 static inline u32 676 ice_testandclear_state(volatile u32 *s, enum ice_state bit) 677 { 678 /* atomic_testandclear_32 expects a bit position */ 679 return atomic_testandclear_32(s, bit); 680 } 681 682 /** 683 * ice_test_state - Test the specified state 684 * @s: the state bitmap 685 * @bit: the bit to test 686 * 687 * Return true if the state is set, false otherwise. Use this only if the flow 688 * does not need to update the state. If you must update the state as well, 689 * prefer ice_testandset_state or ice_testandclear_state. 690 */ 691 static inline u32 692 ice_test_state(volatile u32 *s, enum ice_state bit) 693 { 694 return (*s & BIT(bit)) ? true : false; 695 } 696 697 /** 698 * @struct ice_str_buf 699 * @brief static length buffer for string returning 700 * 701 * Structure containing a fixed size string buffer, used to implement 702 * numeric->string conversion functions that may want to return non-constant 703 * strings. 704 * 705 * This allows returning a fixed size string that is generated by a conversion 706 * function, and then copied to the used location without needing to use an 707 * explicit local variable passed by reference. 708 */ 709 struct ice_str_buf { 710 char str[ICE_STR_BUF_LEN]; 711 }; 712 713 struct ice_str_buf _ice_aq_str(enum ice_aq_err aq_err); 714 struct ice_str_buf _ice_status_str(enum ice_status status); 715 struct ice_str_buf _ice_err_str(int err); 716 struct ice_str_buf _ice_fltr_flag_str(u16 flag); 717 struct ice_str_buf _ice_log_sev_str(u8 log_level); 718 struct ice_str_buf _ice_mdd_tx_tclan_str(u8 event); 719 struct ice_str_buf _ice_mdd_tx_pqm_str(u8 event); 720 struct ice_str_buf _ice_mdd_rx_str(u8 event); 721 struct ice_str_buf _ice_fw_lldp_status(u32 lldp_status); 722 723 #define ice_aq_str(err) _ice_aq_str(err).str 724 #define ice_status_str(err) _ice_status_str(err).str 725 #define ice_err_str(err) _ice_err_str(err).str 726 #define ice_fltr_flag_str(flag) _ice_fltr_flag_str(flag).str 727 728 #define ice_mdd_tx_tclan_str(event) _ice_mdd_tx_tclan_str(event).str 729 #define ice_mdd_tx_pqm_str(event) _ice_mdd_tx_pqm_str(event).str 730 #define ice_mdd_rx_str(event) _ice_mdd_rx_str(event).str 731 732 #define ice_log_sev_str(log_level) _ice_log_sev_str(log_level).str 733 #define ice_fw_lldp_status(lldp_status) _ice_fw_lldp_status(lldp_status).str 734 735 /** 736 * ice_enable_intr - Enable interrupts for given vector 737 * @hw: the device private HW structure 738 * @vector: the interrupt index in PF space 739 * 740 * In MSI or Legacy interrupt mode, interrupt 0 is the only valid index. 741 */ 742 static inline void 743 ice_enable_intr(struct ice_hw *hw, int vector) 744 { 745 u32 dyn_ctl; 746 747 /* Use ITR_NONE so that ITR configuration is not changed. */ 748 dyn_ctl = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 749 (ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S); 750 wr32(hw, GLINT_DYN_CTL(vector), dyn_ctl); 751 } 752 753 /** 754 * ice_disable_intr - Disable interrupts for given vector 755 * @hw: the device private HW structure 756 * @vector: the interrupt index in PF space 757 * 758 * In MSI or Legacy interrupt mode, interrupt 0 is the only valid index. 759 */ 760 static inline void 761 ice_disable_intr(struct ice_hw *hw, int vector) 762 { 763 u32 dyn_ctl; 764 765 /* Use ITR_NONE so that ITR configuration is not changed. */ 766 dyn_ctl = ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S; 767 wr32(hw, GLINT_DYN_CTL(vector), dyn_ctl); 768 } 769 770 /** 771 * ice_is_tx_desc_done - determine if a Tx descriptor is done 772 * @txd: the Tx descriptor to check 773 * 774 * Returns true if hardware is done with a Tx descriptor and software is 775 * capable of re-using it. 776 */ 777 static inline bool 778 ice_is_tx_desc_done(struct ice_tx_desc *txd) 779 { 780 return (((txd->cmd_type_offset_bsz & ICE_TXD_QW1_DTYPE_M) 781 >> ICE_TXD_QW1_DTYPE_S) == ICE_TX_DESC_DTYPE_DESC_DONE); 782 } 783 784 /** 785 * ice_get_pf_id - Get the PF id from the hardware registers 786 * @hw: the ice hardware structure 787 * 788 * Reads the PF_FUNC_RID register and extracts the function number from it. 789 * Intended to be used in cases where hw->pf_id hasn't yet been assigned by 790 * ice_init_hw. 791 * 792 * @pre this function should be called only after PCI register access has been 793 * setup, and prior to ice_init_hw. After hardware has been initialized, the 794 * cached hw->pf_id value can be used. 795 */ 796 static inline u8 797 ice_get_pf_id(struct ice_hw *hw) 798 { 799 return (u8)((rd32(hw, PF_FUNC_RID) & PF_FUNC_RID_FUNCTION_NUMBER_M) >> 800 PF_FUNC_RID_FUNCTION_NUMBER_S); 801 } 802 803 /* Details of how to re-initialize depend on the networking stack */ 804 void ice_request_stack_reinit(struct ice_softc *sc); 805 806 /* Details of how to check if the network stack is detaching us */ 807 bool ice_driver_is_detaching(struct ice_softc *sc); 808 809 const char * ice_fw_module_str(enum ice_aqc_fw_logging_mod module); 810 void ice_add_fw_logging_tunables(struct ice_softc *sc, 811 struct sysctl_oid *parent); 812 void ice_handle_fw_log_event(struct ice_softc *sc, struct ice_aq_desc *desc, 813 void *buf); 814 815 int ice_process_ctrlq(struct ice_softc *sc, enum ice_ctl_q q_type, u16 *pending); 816 int ice_map_bar(device_t dev, struct ice_bar_info *bar, int bar_num); 817 void ice_free_bar(device_t dev, struct ice_bar_info *bar); 818 void ice_set_ctrlq_len(struct ice_hw *hw); 819 void ice_release_vsi(struct ice_vsi *vsi); 820 struct ice_vsi *ice_alloc_vsi(struct ice_softc *sc, enum ice_vsi_type type); 821 int ice_alloc_vsi_qmap(struct ice_vsi *vsi, const int max_tx_queues, 822 const int max_rx_queues); 823 void ice_free_vsi_qmaps(struct ice_vsi *vsi); 824 int ice_initialize_vsi(struct ice_vsi *vsi); 825 void ice_deinit_vsi(struct ice_vsi *vsi); 826 uint64_t ice_aq_speed_to_rate(struct ice_port_info *pi); 827 int ice_get_phy_type_low(uint64_t phy_type_low); 828 int ice_get_phy_type_high(uint64_t phy_type_high); 829 enum ice_status ice_add_media_types(struct ice_softc *sc, struct ifmedia *media); 830 void ice_configure_rxq_interrupt(struct ice_hw *hw, u16 rxqid, u16 vector, u8 itr_idx); 831 void ice_configure_all_rxq_interrupts(struct ice_vsi *vsi); 832 void ice_configure_txq_interrupt(struct ice_hw *hw, u16 txqid, u16 vector, u8 itr_idx); 833 void ice_configure_all_txq_interrupts(struct ice_vsi *vsi); 834 void ice_flush_rxq_interrupts(struct ice_vsi *vsi); 835 void ice_flush_txq_interrupts(struct ice_vsi *vsi); 836 int ice_cfg_vsi_for_tx(struct ice_vsi *vsi); 837 int ice_cfg_vsi_for_rx(struct ice_vsi *vsi); 838 int ice_control_rx_queue(struct ice_vsi *vsi, u16 qidx, bool enable); 839 int ice_control_all_rx_queues(struct ice_vsi *vsi, bool enable); 840 int ice_cfg_pf_default_mac_filters(struct ice_softc *sc); 841 int ice_rm_pf_default_mac_filters(struct ice_softc *sc); 842 void ice_print_nvm_version(struct ice_softc *sc); 843 void ice_update_vsi_hw_stats(struct ice_vsi *vsi); 844 void ice_reset_vsi_stats(struct ice_vsi *vsi); 845 void ice_update_pf_stats(struct ice_softc *sc); 846 void ice_reset_pf_stats(struct ice_softc *sc); 847 void ice_add_device_sysctls(struct ice_softc *sc); 848 void ice_log_hmc_error(struct ice_hw *hw, device_t dev); 849 void ice_add_sysctls_eth_stats(struct sysctl_ctx_list *ctx, 850 struct sysctl_oid *parent, 851 struct ice_eth_stats *stats); 852 void ice_add_vsi_sysctls(struct ice_vsi *vsi); 853 void ice_add_sysctls_mac_stats(struct sysctl_ctx_list *ctx, 854 struct sysctl_oid *parent, 855 struct ice_hw_port_stats *stats); 856 void ice_configure_misc_interrupts(struct ice_softc *sc); 857 int ice_sync_multicast_filters(struct ice_softc *sc); 858 enum ice_status ice_add_vlan_hw_filters(struct ice_vsi *vsi, u16 *vid, 859 u16 length); 860 enum ice_status ice_add_vlan_hw_filter(struct ice_vsi *vsi, u16 vid); 861 enum ice_status ice_remove_vlan_hw_filters(struct ice_vsi *vsi, u16 *vid, 862 u16 length); 863 enum ice_status ice_remove_vlan_hw_filter(struct ice_vsi *vsi, u16 vid); 864 void ice_add_vsi_tunables(struct ice_vsi *vsi, struct sysctl_oid *parent); 865 void ice_del_vsi_sysctl_ctx(struct ice_vsi *vsi); 866 void ice_add_device_tunables(struct ice_softc *sc); 867 int ice_add_vsi_mac_filter(struct ice_vsi *vsi, const u8 *addr); 868 int ice_remove_vsi_mac_filter(struct ice_vsi *vsi, const u8 *addr); 869 int ice_vsi_disable_tx(struct ice_vsi *vsi); 870 void ice_vsi_add_txqs_ctx(struct ice_vsi *vsi); 871 void ice_vsi_add_rxqs_ctx(struct ice_vsi *vsi); 872 void ice_vsi_del_txqs_ctx(struct ice_vsi *vsi); 873 void ice_vsi_del_rxqs_ctx(struct ice_vsi *vsi); 874 void ice_add_txq_sysctls(struct ice_tx_queue *txq); 875 void ice_add_rxq_sysctls(struct ice_rx_queue *rxq); 876 int ice_config_rss(struct ice_vsi *vsi); 877 void ice_clean_all_vsi_rss_cfg(struct ice_softc *sc); 878 enum ice_status ice_load_pkg_file(struct ice_softc *sc); 879 void ice_log_pkg_init(struct ice_softc *sc, enum ice_ddp_state pkg_status); 880 uint64_t ice_get_ifnet_counter(struct ice_vsi *vsi, ift_counter counter); 881 void ice_save_pci_info(struct ice_hw *hw, device_t dev); 882 int ice_replay_all_vsi_cfg(struct ice_softc *sc); 883 void ice_link_up_msg(struct ice_softc *sc); 884 int ice_update_laa_mac(struct ice_softc *sc); 885 void ice_get_and_print_bus_info(struct ice_softc *sc); 886 const char *ice_fec_str(enum ice_fec_mode mode); 887 const char *ice_fc_str(enum ice_fc_mode mode); 888 const char *ice_fwd_act_str(enum ice_sw_fwd_act_type action); 889 const char *ice_state_to_str(enum ice_state state); 890 int ice_init_link_events(struct ice_softc *sc); 891 void ice_configure_rx_itr(struct ice_vsi *vsi); 892 void ice_configure_tx_itr(struct ice_vsi *vsi); 893 void ice_setup_pf_vsi(struct ice_softc *sc); 894 void ice_handle_mdd_event(struct ice_softc *sc); 895 void ice_init_dcb_setup(struct ice_softc *sc); 896 int ice_send_version(struct ice_softc *sc); 897 int ice_cfg_pf_ethertype_filters(struct ice_softc *sc); 898 void ice_init_link_configuration(struct ice_softc *sc); 899 void ice_init_saved_phy_cfg(struct ice_softc *sc); 900 int ice_apply_saved_phy_cfg(struct ice_softc *sc, u8 settings); 901 void ice_set_link_management_mode(struct ice_softc *sc); 902 int ice_module_event_handler(module_t mod, int what, void *arg); 903 int ice_handle_nvm_access_ioctl(struct ice_softc *sc, struct ifdrv *ifd); 904 int ice_handle_i2c_req(struct ice_softc *sc, struct ifi2creq *req); 905 int ice_read_sff_eeprom(struct ice_softc *sc, u16 dev_addr, u16 offset, u8* data, u16 length); 906 int ice_alloc_intr_tracking(struct ice_softc *sc); 907 void ice_free_intr_tracking(struct ice_softc *sc); 908 void ice_set_default_local_lldp_mib(struct ice_softc *sc); 909 void ice_init_health_events(struct ice_softc *sc); 910 void ice_cfg_pba_num(struct ice_softc *sc); 911 int ice_handle_debug_dump_ioctl(struct ice_softc *sc, struct ifdrv *ifd); 912 u8 ice_dcb_get_tc_map(const struct ice_dcbx_cfg *dcbcfg); 913 914 #endif /* _ICE_LIB_H_ */ 915