xref: /freebsd/sys/dev/ice/ice_lib.h (revision 410556f1f10fd35b350102725fd8504c3cb0afc8)
1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /*  Copyright (c) 2021, Intel Corporation
3  *  All rights reserved.
4  *
5  *  Redistribution and use in source and binary forms, with or without
6  *  modification, are permitted provided that the following conditions are met:
7  *
8  *   1. Redistributions of source code must retain the above copyright notice,
9  *      this list of conditions and the following disclaimer.
10  *
11  *   2. Redistributions in binary form must reproduce the above copyright
12  *      notice, this list of conditions and the following disclaimer in the
13  *      documentation and/or other materials provided with the distribution.
14  *
15  *   3. Neither the name of the Intel Corporation nor the names of its
16  *      contributors may be used to endorse or promote products derived from
17  *      this software without specific prior written permission.
18  *
19  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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26  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  *  POSSIBILITY OF SUCH DAMAGE.
30  */
31 /*$FreeBSD$*/
32 
33 /**
34  * @file ice_lib.h
35  * @brief header for generic device and sysctl functions
36  *
37  * Contains definitions and function declarations for the ice_lib.c file. It
38  * does not depend on the iflib networking stack.
39  */
40 
41 #ifndef _ICE_LIB_H_
42 #define _ICE_LIB_H_
43 
44 #include <sys/types.h>
45 #include <sys/bus.h>
46 #include <sys/rman.h>
47 #include <sys/socket.h>
48 #include <sys/sbuf.h>
49 #include <sys/sysctl.h>
50 #include <sys/syslog.h>
51 #include <sys/module.h>
52 #include <sys/proc.h>
53 
54 #include <net/if.h>
55 #include <net/if_var.h>
56 #include <net/if_media.h>
57 #include <net/ethernet.h>
58 
59 #include <sys/bitstring.h>
60 
61 #include "ice_dcb.h"
62 #include "ice_type.h"
63 #include "ice_common.h"
64 #include "ice_flow.h"
65 #include "ice_sched.h"
66 #include "ice_resmgr.h"
67 
68 #include "ice_rss.h"
69 
70 /* Hide debug sysctls unless INVARIANTS is enabled */
71 #ifdef INVARIANTS
72 #define ICE_CTLFLAG_DEBUG 0
73 #else
74 #define ICE_CTLFLAG_DEBUG CTLFLAG_SKIP
75 #endif
76 
77 /**
78  * for_each_set_bit - For loop over each set bit in a bit string
79  * @bit: storage for the bit index
80  * @data: address of data block to loop over
81  * @nbits: maximum number of bits to loop over
82  *
83  * macro to create a for loop over a bit string, which runs the body once for
84  * each bit that is set in the string. The bit variable will be set to the
85  * index of each set bit in the string, with zero representing the first bit.
86  */
87 #define for_each_set_bit(bit, data, nbits) \
88 	for (bit_ffs((bitstr_t *)(data), (nbits), &(bit)); \
89 	     (bit) != -1; \
90 	     bit_ffs_at((bitstr_t *)(data), (bit) + 1, (nbits), &(bit)))
91 
92 /**
93  * @var broadcastaddr
94  * @brief broadcast MAC address
95  *
96  * constant defining the broadcast MAC address, used for programming the
97  * broadcast address as a MAC filter for the PF VSI.
98  */
99 static const u8 broadcastaddr[ETHER_ADDR_LEN] = {
100 	0xff, 0xff, 0xff, 0xff, 0xff, 0xff
101 };
102 
103 MALLOC_DECLARE(M_ICE);
104 
105 extern const char ice_driver_version[];
106 extern const uint8_t ice_major_version;
107 extern const uint8_t ice_minor_version;
108 extern const uint8_t ice_patch_version;
109 extern const uint8_t ice_rc_version;
110 
111 /* global sysctl indicating whether the Tx FC filter should be enabled */
112 extern bool ice_enable_tx_fc_filter;
113 
114 /* global sysctl indicating whether the Tx LLDP filter should be enabled */
115 extern bool ice_enable_tx_lldp_filter;
116 
117 /**
118  * @struct ice_bar_info
119  * @brief PCI BAR mapping information
120  *
121  * Contains data about a PCI BAR that the driver has mapped for use.
122  */
123 struct ice_bar_info {
124 	struct resource		*res;
125 	bus_space_tag_t		tag;
126 	bus_space_handle_t	handle;
127 	bus_size_t		size;
128 	int			rid;
129 };
130 
131 /* Alignment for queues */
132 #define DBA_ALIGN		128
133 
134 /* Maximum TSO size is (256K)-1 */
135 #define ICE_TSO_SIZE		((256*1024) - 1)
136 
137 /* Minimum size for TSO MSS */
138 #define ICE_MIN_TSO_MSS		64
139 
140 #define ICE_MAX_TX_SEGS		8
141 #define ICE_MAX_TSO_SEGS	128
142 
143 #define ICE_MAX_DMA_SEG_SIZE	((16*1024) - 1)
144 
145 #define ICE_MAX_RX_SEGS		5
146 
147 #define ICE_MAX_TSO_HDR_SEGS	3
148 
149 #define ICE_MSIX_BAR		3
150 
151 #define ICE_DEFAULT_DESC_COUNT	1024
152 #define ICE_MAX_DESC_COUNT	8160
153 #define ICE_MIN_DESC_COUNT	64
154 #define ICE_DESC_COUNT_INCR	32
155 
156 /* List of hardware offloads we support */
157 #define ICE_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_TCP | CSUM_IP_UDP | CSUM_IP_SCTP |	\
158 			  CSUM_IP6_TCP| CSUM_IP6_UDP | CSUM_IP6_SCTP |		\
159 			  CSUM_IP_TSO | CSUM_IP6_TSO)
160 
161 /* Macros to decide what kind of hardware offload to enable */
162 #define ICE_CSUM_TCP (CSUM_IP_TCP|CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP6_TCP)
163 #define ICE_CSUM_UDP (CSUM_IP_UDP|CSUM_IP6_UDP)
164 #define ICE_CSUM_SCTP (CSUM_IP_SCTP|CSUM_IP6_SCTP)
165 #define ICE_CSUM_IP (CSUM_IP|CSUM_IP_TSO)
166 
167 /* List of known RX CSUM offload flags */
168 #define ICE_RX_CSUM_FLAGS (CSUM_L3_CALC | CSUM_L3_VALID | CSUM_L4_CALC | \
169 			   CSUM_L4_VALID | CSUM_L5_CALC | CSUM_L5_VALID | \
170 			   CSUM_COALESCED)
171 
172 /* List of interface capabilities supported by ice hardware */
173 #define ICE_FULL_CAPS \
174 	(IFCAP_TSO4 | IFCAP_TSO6 | \
175 	 IFCAP_TXCSUM | IFCAP_TXCSUM_IPV6 | \
176 	 IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6 | \
177 	 IFCAP_VLAN_HWFILTER | IFCAP_VLAN_HWTSO | \
178 	 IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWTSO | \
179 	 IFCAP_VLAN_MTU | IFCAP_JUMBO_MTU | IFCAP_LRO)
180 
181 /* Safe mode disables support for hardware checksums and TSO */
182 #define ICE_SAFE_CAPS \
183 	(ICE_FULL_CAPS & ~(IFCAP_HWCSUM | IFCAP_TSO | \
184 			   IFCAP_VLAN_HWTSO | IFCAP_VLAN_HWCSUM))
185 
186 #define ICE_CAPS(sc) \
187 	(ice_is_bit_set(sc->feat_en, ICE_FEATURE_SAFE_MODE) ? ICE_SAFE_CAPS : ICE_FULL_CAPS)
188 
189 /**
190  * ICE_NVM_ACCESS
191  * @brief Private ioctl command number for NVM access ioctls
192  *
193  * The ioctl command number used by NVM update for accessing the driver for
194  * NVM access commands.
195  */
196 #define ICE_NVM_ACCESS \
197 	(((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 5)
198 
199 #define ICE_AQ_LEN		512
200 #define ICE_MBXQ_LEN		512
201 #define ICE_SBQ_LEN		512
202 
203 #define ICE_CTRLQ_WORK_LIMIT 256
204 
205 #define ICE_DFLT_TRAFFIC_CLASS BIT(0)
206 
207 /* wait up to 50 microseconds for queue state change */
208 #define ICE_Q_WAIT_RETRY_LIMIT	5
209 
210 #define ICE_UP_TABLE_TRANSLATE(val, i) \
211 		(((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
212 		ICE_AQ_VSI_UP_TABLE_UP##i##_M)
213 
214 /*
215  * For now, set this to the hardware maximum. Each function gets a smaller
216  * number assigned to it in hw->func_caps.guar_num_vsi, though there
217  * appears to be no guarantee that is the maximum number that a function
218  * can use.
219  */
220 #define ICE_MAX_VSI_AVAILABLE	768
221 
222 /* Maximum size of a single frame (for Tx and Rx) */
223 #define ICE_MAX_FRAME_SIZE ICE_AQ_SET_MAC_FRAME_SIZE_MAX
224 
225 /* Maximum MTU size */
226 #define ICE_MAX_MTU (ICE_MAX_FRAME_SIZE - \
227 		     ETHER_HDR_LEN - ETHER_CRC_LEN - ETHER_VLAN_ENCAP_LEN)
228 
229 /*
230  * Hardware requires that TSO packets have an segment size of at least 64
231  * bytes. To avoid sending bad frames to the hardware, the driver forces the
232  * MSS for all TSO packets to have a segment size of at least 64 bytes.
233  *
234  * However, if the MTU is reduced below a certain size, then the resulting
235  * larger MSS can result in transmitting segmented frames with a packet size
236  * larger than the MTU.
237  *
238  * Avoid this by preventing the MTU from being lowered below this limit.
239  * Alternative solutions require changing the TCP stack to disable offloading
240  * the segmentation when the requested segment size goes below 64 bytes.
241  */
242 #define ICE_MIN_MTU 112
243 
244 #define ICE_DEFAULT_VF_QUEUES	4
245 
246 /**
247  * @enum ice_dyn_idx_t
248  * @brief Dynamic Control ITR indexes
249  *
250  * This enum matches hardware bits and is meant to be used by DYN_CTLN
251  * registers and QINT registers or more generally anywhere in the manual
252  * mentioning ITR_INDX, ITR_NONE cannot be used as an index 'n' into any
253  * register but instead is a special value meaning "don't update" ITR0/1/2.
254  */
255 enum ice_dyn_idx_t {
256 	ICE_IDX_ITR0 = 0,
257 	ICE_IDX_ITR1 = 1,
258 	ICE_IDX_ITR2 = 2,
259 	ICE_ITR_NONE = 3	/* ITR_NONE must not be used as an index */
260 };
261 
262 /* By convenction ITR0 is used for RX, and ITR1 is used for TX */
263 #define ICE_RX_ITR ICE_IDX_ITR0
264 #define ICE_TX_ITR ICE_IDX_ITR1
265 
266 #define ICE_ITR_MAX		8160
267 
268 /* Define the default Tx and Rx ITR as 50us (translates to ~20k int/sec max) */
269 #define ICE_DFLT_TX_ITR		50
270 #define ICE_DFLT_RX_ITR		50
271 
272 /**
273  * ice_itr_to_reg - Convert an ITR setting into its register equivalent
274  * @hw: The device HW structure
275  * @itr_setting: the ITR setting to convert
276  *
277  * Based on the hardware ITR granularity, convert an ITR setting into the
278  * correct value to prepare programming to the HW.
279  */
280 static inline u16 ice_itr_to_reg(struct ice_hw *hw, u16 itr_setting)
281 {
282 	return itr_setting / hw->itr_gran;
283 }
284 
285 /**
286  * @enum ice_rx_dtype
287  * @brief DTYPE header split options
288  *
289  * This enum matches the Rx context bits to define whether header split is
290  * enabled or not.
291  */
292 enum ice_rx_dtype {
293 	ICE_RX_DTYPE_NO_SPLIT		= 0,
294 	ICE_RX_DTYPE_HEADER_SPLIT	= 1,
295 	ICE_RX_DTYPE_SPLIT_ALWAYS	= 2,
296 };
297 
298 /* Strings used for displaying FEC mode
299  *
300  * Use ice_fec_str() to get these unless these need to be embedded in a
301  * string constant.
302  */
303 #define ICE_FEC_STRING_AUTO	"Auto"
304 #define ICE_FEC_STRING_RS	"RS-FEC"
305 #define ICE_FEC_STRING_BASER	"FC-FEC/BASE-R"
306 #define ICE_FEC_STRING_NONE	"None"
307 
308 /* Strings used for displaying Flow Control mode
309  *
310  * Use ice_fc_str() to get these unless these need to be embedded in a
311  * string constant.
312  */
313 #define ICE_FC_STRING_FULL	"Full"
314 #define ICE_FC_STRING_TX	"Tx"
315 #define ICE_FC_STRING_RX	"Rx"
316 #define ICE_FC_STRING_NONE	"None"
317 
318 /*
319  * The number of times the ice_handle_i2c_req function will retry reading
320  * I2C data via the Admin Queue before returning EBUSY.
321  */
322 #define ICE_I2C_MAX_RETRIES		10
323 
324 /*
325  * The Start LLDP Agent AQ command will fail if it's sent too soon after
326  * the LLDP agent is stopped. The period between the stop and start
327  * commands must currently be at least 2 seconds.
328  */
329 #define ICE_START_LLDP_RETRY_WAIT	(2 * hz)
330 
331 /*
332  * The ice_(set|clear)_vsi_promisc() function expects a mask of promiscuous
333  * modes to operate on. This mask is the default one for the driver, where
334  * promiscuous is enabled/disabled for all types of non-VLAN-tagged/VLAN 0
335  * traffic.
336  */
337 #define ICE_VSI_PROMISC_MASK		(ICE_PROMISC_UCAST_TX | \
338 					 ICE_PROMISC_UCAST_RX | \
339 					 ICE_PROMISC_MCAST_TX | \
340 					 ICE_PROMISC_MCAST_RX)
341 
342 struct ice_softc;
343 
344 /**
345  * @enum ice_rx_cso_stat
346  * @brief software checksum offload statistics
347  *
348  * Enumeration of possible checksum offload statistics captured by software
349  * during the Rx path.
350  */
351 enum ice_rx_cso_stat {
352 	ICE_CSO_STAT_RX_IP4_ERR,
353 	ICE_CSO_STAT_RX_IP6_ERR,
354 	ICE_CSO_STAT_RX_L3_ERR,
355 	ICE_CSO_STAT_RX_TCP_ERR,
356 	ICE_CSO_STAT_RX_UDP_ERR,
357 	ICE_CSO_STAT_RX_SCTP_ERR,
358 	ICE_CSO_STAT_RX_L4_ERR,
359 	ICE_CSO_STAT_RX_COUNT
360 };
361 
362 /**
363  * @enum ice_tx_cso_stat
364  * @brief software checksum offload statistics
365  *
366  * Enumeration of possible checksum offload statistics captured by software
367  * during the Tx path.
368  */
369 enum ice_tx_cso_stat {
370 	ICE_CSO_STAT_TX_TCP,
371 	ICE_CSO_STAT_TX_UDP,
372 	ICE_CSO_STAT_TX_SCTP,
373 	ICE_CSO_STAT_TX_IP4,
374 	ICE_CSO_STAT_TX_IP6,
375 	ICE_CSO_STAT_TX_L3_ERR,
376 	ICE_CSO_STAT_TX_L4_ERR,
377 	ICE_CSO_STAT_TX_COUNT
378 };
379 
380 /**
381  * @struct tx_stats
382  * @brief software Tx statistics
383  *
384  * Contains software counted Tx statistics for a single queue
385  */
386 struct tx_stats {
387 	/* Soft Stats */
388 	u64			tx_bytes;
389 	u64			tx_packets;
390 	u64			mss_too_small;
391 	u64			cso[ICE_CSO_STAT_TX_COUNT];
392 };
393 
394 /**
395  * @struct rx_stats
396  * @brief software Rx statistics
397  *
398  * Contains software counted Rx statistics for a single queue
399  */
400 struct rx_stats {
401 	/* Soft Stats */
402 	u64			rx_packets;
403 	u64			rx_bytes;
404 	u64			desc_errs;
405 	u64			cso[ICE_CSO_STAT_RX_COUNT];
406 };
407 
408 /**
409  * @struct ice_vsi_hw_stats
410  * @brief hardware statistics for a VSI
411  *
412  * Stores statistics that are generated by hardware for a VSI.
413  */
414 struct ice_vsi_hw_stats {
415 	struct ice_eth_stats prev;
416 	struct ice_eth_stats cur;
417 	bool offsets_loaded;
418 };
419 
420 /**
421  * @struct ice_pf_hw_stats
422  * @brief hardware statistics for a PF
423  *
424  * Stores statistics that are generated by hardware for each PF.
425  */
426 struct ice_pf_hw_stats {
427 	struct ice_hw_port_stats prev;
428 	struct ice_hw_port_stats cur;
429 	bool offsets_loaded;
430 };
431 
432 /**
433  * @struct ice_pf_sw_stats
434  * @brief software statistics for a PF
435  *
436  * Contains software generated statistics relevant to a PF.
437  */
438 struct ice_pf_sw_stats {
439 	/* # of reset events handled, by type */
440 	u32 corer_count;
441 	u32 globr_count;
442 	u32 empr_count;
443 	u32 pfr_count;
444 
445 	/* # of detected MDD events for Tx and Rx */
446 	u32 tx_mdd_count;
447 	u32 rx_mdd_count;
448 };
449 
450 /**
451  * @struct ice_vsi
452  * @brief VSI structure
453  *
454  * Contains data relevant to a single VSI
455  */
456 struct ice_vsi {
457 	/* back pointer to the softc */
458 	struct ice_softc	*sc;
459 
460 	bool dynamic;		/* if true, dynamically allocated */
461 
462 	enum ice_vsi_type type;	/* type of this VSI */
463 	u16 idx;		/* software index to sc->all_vsi[] */
464 
465 	u16 *tx_qmap; /* Tx VSI to PF queue mapping */
466 	u16 *rx_qmap; /* Rx VSI to PF queue mapping */
467 
468 	bitstr_t *vmap; /* Vector(s) assigned to VSI */
469 
470 	enum ice_resmgr_alloc_type qmap_type;
471 
472 	struct ice_tx_queue *tx_queues;	/* Tx queue array */
473 	struct ice_rx_queue *rx_queues;	/* Rx queue array */
474 
475 	int num_tx_queues;
476 	int num_rx_queues;
477 	int num_vectors;
478 
479 	int16_t rx_itr;
480 	int16_t tx_itr;
481 
482 	/* RSS configuration */
483 	u16 rss_table_size; /* HW RSS table size */
484 	u8 rss_lut_type; /* Used to configure Get/Set RSS LUT AQ call */
485 
486 	int max_frame_size;
487 	u16 mbuf_sz;
488 
489 	struct ice_aqc_vsi_props info;
490 
491 	/* context for per-VSI sysctls */
492 	struct sysctl_ctx_list ctx;
493 	struct sysctl_oid *vsi_node;
494 
495 	/* context for per-txq sysctls */
496 	struct sysctl_ctx_list txqs_ctx;
497 	struct sysctl_oid *txqs_node;
498 
499 	/* context for per-rxq sysctls */
500 	struct sysctl_ctx_list rxqs_ctx;
501 	struct sysctl_oid *rxqs_node;
502 
503 	/* VSI-level stats */
504 	struct ice_vsi_hw_stats hw_stats;
505 };
506 
507 /**
508  * @enum ice_state
509  * @brief Driver state flags
510  *
511  * Used to indicate the status of various driver events. Intended to be
512  * modified only using atomic operations, so that we can use it even in places
513  * which aren't locked.
514  */
515 enum ice_state {
516 	ICE_STATE_CONTROLQ_EVENT_PENDING,
517 	ICE_STATE_VFLR_PENDING,
518 	ICE_STATE_MDD_PENDING,
519 	ICE_STATE_RESET_OICR_RECV,
520 	ICE_STATE_RESET_PFR_REQ,
521 	ICE_STATE_PREPARED_FOR_RESET,
522 	ICE_STATE_RESET_FAILED,
523 	ICE_STATE_DRIVER_INITIALIZED,
524 	ICE_STATE_NO_MEDIA,
525 	ICE_STATE_RECOVERY_MODE,
526 	ICE_STATE_ROLLBACK_MODE,
527 	ICE_STATE_LINK_STATUS_REPORTED,
528 	ICE_STATE_DETACHING,
529 	ICE_STATE_LINK_DEFAULT_OVERRIDE_PENDING,
530 	ICE_STATE_LLDP_RX_FLTR_FROM_DRIVER,
531 	/* This entry must be last */
532 	ICE_STATE_LAST,
533 };
534 
535 /* Functions for setting and checking driver state. Note the functions take
536  * bit positions, not bitmasks. The atomic_testandset_32 and
537  * atomic_testandclear_32 operations require bit positions, while the
538  * atomic_set_32 and atomic_clear_32 require bitmasks. This can easily lead to
539  * programming error, so we provide wrapper functions to avoid this.
540  */
541 
542 /**
543  * ice_set_state - Set the specified state
544  * @s: the state bitmap
545  * @bit: the state to set
546  *
547  * Atomically update the state bitmap with the specified bit set.
548  */
549 static inline void
550 ice_set_state(volatile u32 *s, enum ice_state bit)
551 {
552 	/* atomic_set_32 expects a bitmask */
553 	atomic_set_32(s, BIT(bit));
554 }
555 
556 /**
557  * ice_clear_state - Clear the specified state
558  * @s: the state bitmap
559  * @bit: the state to clear
560  *
561  * Atomically update the state bitmap with the specified bit cleared.
562  */
563 static inline void
564 ice_clear_state(volatile u32 *s, enum ice_state bit)
565 {
566 	/* atomic_clear_32 expects a bitmask */
567 	atomic_clear_32(s, BIT(bit));
568 }
569 
570 /**
571  * ice_testandset_state - Test and set the specified state
572  * @s: the state bitmap
573  * @bit: the bit to test
574  *
575  * Atomically update the state bitmap, setting the specified bit. Returns the
576  * previous value of the bit.
577  */
578 static inline u32
579 ice_testandset_state(volatile u32 *s, enum ice_state bit)
580 {
581 	/* atomic_testandset_32 expects a bit position */
582 	return atomic_testandset_32(s, bit);
583 }
584 
585 /**
586  * ice_testandclear_state - Test and clear the specified state
587  * @s: the state bitmap
588  * @bit: the bit to test
589  *
590  * Atomically update the state bitmap, clearing the specified bit. Returns the
591  * previous value of the bit.
592  */
593 static inline u32
594 ice_testandclear_state(volatile u32 *s, enum ice_state bit)
595 {
596 	/* atomic_testandclear_32 expects a bit position */
597 	return atomic_testandclear_32(s, bit);
598 }
599 
600 /**
601  * ice_test_state - Test the specified state
602  * @s: the state bitmap
603  * @bit: the bit to test
604  *
605  * Return true if the state is set, false otherwise. Use this only if the flow
606  * does not need to update the state. If you must update the state as well,
607  * prefer ice_testandset_state or ice_testandclear_state.
608  */
609 static inline u32
610 ice_test_state(volatile u32 *s, enum ice_state bit)
611 {
612 	return (*s & BIT(bit)) ? true : false;
613 }
614 
615 /**
616  * @struct ice_str_buf
617  * @brief static length buffer for string returning
618  *
619  * Structure containing a fixed size string buffer, used to implement
620  * numeric->string conversion functions that may want to return non-constant
621  * strings.
622  *
623  * This allows returning a fixed size string that is generated by a conversion
624  * function, and then copied to the used location without needing to use an
625  * explicit local variable passed by reference.
626  */
627 struct ice_str_buf {
628 	char str[ICE_STR_BUF_LEN];
629 };
630 
631 struct ice_str_buf _ice_aq_str(enum ice_aq_err aq_err);
632 struct ice_str_buf _ice_status_str(enum ice_status status);
633 struct ice_str_buf _ice_err_str(int err);
634 struct ice_str_buf _ice_fltr_flag_str(u16 flag);
635 struct ice_str_buf _ice_mdd_tx_tclan_str(u8 event);
636 struct ice_str_buf _ice_mdd_tx_pqm_str(u8 event);
637 struct ice_str_buf _ice_mdd_rx_str(u8 event);
638 struct ice_str_buf _ice_fw_lldp_status(u32 lldp_status);
639 
640 #define ice_aq_str(err)		_ice_aq_str(err).str
641 #define ice_status_str(err)	_ice_status_str(err).str
642 #define ice_err_str(err)	_ice_err_str(err).str
643 #define ice_fltr_flag_str(flag)	_ice_fltr_flag_str(flag).str
644 
645 #define ice_mdd_tx_tclan_str(event)	_ice_mdd_tx_tclan_str(event).str
646 #define ice_mdd_tx_pqm_str(event)	_ice_mdd_tx_pqm_str(event).str
647 #define ice_mdd_rx_str(event)		_ice_mdd_rx_str(event).str
648 
649 #define ice_fw_lldp_status(lldp_status) _ice_fw_lldp_status(lldp_status).str
650 
651 /**
652  * ice_enable_intr - Enable interrupts for given vector
653  * @hw: the device private HW structure
654  * @vector: the interrupt index in PF space
655  *
656  * In MSI or Legacy interrupt mode, interrupt 0 is the only valid index.
657  */
658 static inline void
659 ice_enable_intr(struct ice_hw *hw, int vector)
660 {
661 	u32 dyn_ctl;
662 
663 	/* Use ITR_NONE so that ITR configuration is not changed. */
664 	dyn_ctl = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
665 		  (ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S);
666 	wr32(hw, GLINT_DYN_CTL(vector), dyn_ctl);
667 }
668 
669 /**
670  * ice_disable_intr - Disable interrupts for given vector
671  * @hw: the device private HW structure
672  * @vector: the interrupt index in PF space
673  *
674  * In MSI or Legacy interrupt mode, interrupt 0 is the only valid index.
675  */
676 static inline void
677 ice_disable_intr(struct ice_hw *hw, int vector)
678 {
679 	u32 dyn_ctl;
680 
681 	/* Use ITR_NONE so that ITR configuration is not changed. */
682 	dyn_ctl = ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S;
683 	wr32(hw, GLINT_DYN_CTL(vector), dyn_ctl);
684 }
685 
686 /**
687  * ice_is_tx_desc_done - determine if a Tx descriptor is done
688  * @txd: the Tx descriptor to check
689  *
690  * Returns true if hardware is done with a Tx descriptor and software is
691  * capable of re-using it.
692  */
693 static inline bool
694 ice_is_tx_desc_done(struct ice_tx_desc *txd)
695 {
696 	return (((txd->cmd_type_offset_bsz & ICE_TXD_QW1_DTYPE_M)
697 		 >> ICE_TXD_QW1_DTYPE_S) == ICE_TX_DESC_DTYPE_DESC_DONE);
698 }
699 
700 /**
701  * ice_get_pf_id - Get the PF id from the hardware registers
702  * @hw: the ice hardware structure
703  *
704  * Reads the PF_FUNC_RID register and extracts the function number from it.
705  * Intended to be used in cases where hw->pf_id hasn't yet been assigned by
706  * ice_init_hw.
707  *
708  * @pre this function should be called only after PCI register access has been
709  * setup, and prior to ice_init_hw. After hardware has been initialized, the
710  * cached hw->pf_id value can be used.
711  */
712 static inline u8
713 ice_get_pf_id(struct ice_hw *hw)
714 {
715 	return (u8)((rd32(hw, PF_FUNC_RID) & PF_FUNC_RID_FUNCTION_NUMBER_M) >>
716 		    PF_FUNC_RID_FUNCTION_NUMBER_S);
717 }
718 
719 /* Details of how to re-initialize depend on the networking stack */
720 void ice_request_stack_reinit(struct ice_softc *sc);
721 
722 /* Details of how to check if the network stack is detaching us */
723 bool ice_driver_is_detaching(struct ice_softc *sc);
724 
725 int  ice_process_ctrlq(struct ice_softc *sc, enum ice_ctl_q q_type, u16 *pending);
726 int  ice_map_bar(device_t dev, struct ice_bar_info *bar, int bar_num);
727 void ice_free_bar(device_t dev, struct ice_bar_info *bar);
728 void ice_set_ctrlq_len(struct ice_hw *hw);
729 void ice_release_vsi(struct ice_vsi *vsi);
730 struct ice_vsi *ice_alloc_vsi(struct ice_softc *sc, enum ice_vsi_type type);
731 int  ice_alloc_vsi_qmap(struct ice_vsi *vsi, const int max_tx_queues,
732 		       const int max_rx_queues);
733 void ice_free_vsi_qmaps(struct ice_vsi *vsi);
734 int  ice_initialize_vsi(struct ice_vsi *vsi);
735 void ice_deinit_vsi(struct ice_vsi *vsi);
736 uint64_t ice_aq_speed_to_rate(struct ice_port_info *pi);
737 int  ice_get_phy_type_low(uint64_t phy_type_low);
738 int  ice_get_phy_type_high(uint64_t phy_type_high);
739 enum ice_status ice_add_media_types(struct ice_softc *sc, struct ifmedia *media);
740 void ice_configure_rxq_interrupts(struct ice_vsi *vsi);
741 void ice_configure_txq_interrupts(struct ice_vsi *vsi);
742 void ice_flush_rxq_interrupts(struct ice_vsi *vsi);
743 void ice_flush_txq_interrupts(struct ice_vsi *vsi);
744 int  ice_cfg_vsi_for_tx(struct ice_vsi *vsi);
745 int  ice_cfg_vsi_for_rx(struct ice_vsi *vsi);
746 int  ice_control_rx_queues(struct ice_vsi *vsi, bool enable);
747 int  ice_cfg_pf_default_mac_filters(struct ice_softc *sc);
748 int  ice_rm_pf_default_mac_filters(struct ice_softc *sc);
749 void ice_print_nvm_version(struct ice_softc *sc);
750 void ice_update_vsi_hw_stats(struct ice_vsi *vsi);
751 void ice_reset_vsi_stats(struct ice_vsi *vsi);
752 void ice_update_pf_stats(struct ice_softc *sc);
753 void ice_reset_pf_stats(struct ice_softc *sc);
754 void ice_add_device_sysctls(struct ice_softc *sc);
755 void ice_log_hmc_error(struct ice_hw *hw, device_t dev);
756 void ice_add_sysctls_eth_stats(struct sysctl_ctx_list *ctx,
757 			       struct sysctl_oid *parent,
758 			       struct ice_eth_stats *stats);
759 void ice_add_vsi_sysctls(struct ice_vsi *vsi);
760 void ice_add_sysctls_mac_stats(struct sysctl_ctx_list *ctx,
761 			       struct sysctl_oid *parent,
762 			       struct ice_hw_port_stats *stats);
763 void ice_configure_misc_interrupts(struct ice_softc *sc);
764 int ice_sync_multicast_filters(struct ice_softc *sc);
765 enum ice_status ice_add_vlan_hw_filter(struct ice_vsi *vsi, u16 vid);
766 enum ice_status ice_remove_vlan_hw_filter(struct ice_vsi *vsi, u16 vid);
767 void ice_add_vsi_tunables(struct ice_vsi *vsi, struct sysctl_oid *parent);
768 void ice_del_vsi_sysctl_ctx(struct ice_vsi *vsi);
769 void ice_add_device_tunables(struct ice_softc *sc);
770 int  ice_add_vsi_mac_filter(struct ice_vsi *vsi, const u8 *addr);
771 int  ice_remove_vsi_mac_filter(struct ice_vsi *vsi, const u8 *addr);
772 int  ice_vsi_disable_tx(struct ice_vsi *vsi);
773 void ice_vsi_add_txqs_ctx(struct ice_vsi *vsi);
774 void ice_vsi_add_rxqs_ctx(struct ice_vsi *vsi);
775 void ice_vsi_del_txqs_ctx(struct ice_vsi *vsi);
776 void ice_vsi_del_rxqs_ctx(struct ice_vsi *vsi);
777 void ice_add_txq_sysctls(struct ice_tx_queue *txq);
778 void ice_add_rxq_sysctls(struct ice_rx_queue *rxq);
779 int  ice_config_rss(struct ice_vsi *vsi);
780 void ice_clean_all_vsi_rss_cfg(struct ice_softc *sc);
781 void ice_load_pkg_file(struct ice_softc *sc);
782 void ice_log_pkg_init(struct ice_softc *sc, enum ice_status *pkg_status);
783 uint64_t ice_get_ifnet_counter(struct ice_vsi *vsi, ift_counter counter);
784 void ice_save_pci_info(struct ice_hw *hw, device_t dev);
785 int  ice_replay_all_vsi_cfg(struct ice_softc *sc);
786 void ice_link_up_msg(struct ice_softc *sc);
787 int  ice_update_laa_mac(struct ice_softc *sc);
788 void ice_get_and_print_bus_info(struct ice_softc *sc);
789 const char *ice_fec_str(enum ice_fec_mode mode);
790 const char *ice_fc_str(enum ice_fc_mode mode);
791 const char *ice_fwd_act_str(enum ice_sw_fwd_act_type action);
792 const char * ice_state_to_str(enum ice_state state);
793 int  ice_init_link_events(struct ice_softc *sc);
794 void ice_configure_rx_itr(struct ice_vsi *vsi);
795 void ice_configure_tx_itr(struct ice_vsi *vsi);
796 void ice_setup_pf_vsi(struct ice_softc *sc);
797 void ice_handle_mdd_event(struct ice_softc *sc);
798 void ice_init_dcb_setup(struct ice_softc *sc);
799 int  ice_send_version(struct ice_softc *sc);
800 int ice_cfg_pf_ethertype_filters(struct ice_softc *sc);
801 void ice_init_link_configuration(struct ice_softc *sc);
802 void ice_init_saved_phy_cfg(struct ice_softc *sc);
803 void ice_apply_saved_phy_cfg(struct ice_softc *sc);
804 void ice_set_link_management_mode(struct ice_softc *sc);
805 int ice_module_event_handler(module_t mod, int what, void *arg);
806 int ice_handle_nvm_access_ioctl(struct ice_softc *sc, struct ifdrv *ifd);
807 int ice_handle_i2c_req(struct ice_softc *sc, struct ifi2creq *req);
808 int ice_read_sff_eeprom(struct ice_softc *sc, u16 dev_addr, u16 offset, u8* data, u16 length);
809 int ice_alloc_intr_tracking(struct ice_softc *sc);
810 void ice_free_intr_tracking(struct ice_softc *sc);
811 void ice_set_default_local_lldp_mib(struct ice_softc *sc);
812 
813 #endif /* _ICE_LIB_H_ */
814