1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright (c) 2024, Intel Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * 3. Neither the name of the Intel Corporation nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /** 33 * @file ice_lib.h 34 * @brief header for generic device and sysctl functions 35 * 36 * Contains definitions and function declarations for the ice_lib.c file. It 37 * does not depend on the iflib networking stack. 38 */ 39 40 #ifndef _ICE_LIB_H_ 41 #define _ICE_LIB_H_ 42 43 #include <sys/types.h> 44 #include <sys/bus.h> 45 #include <sys/rman.h> 46 #include <sys/socket.h> 47 #include <sys/sbuf.h> 48 #include <sys/sysctl.h> 49 #include <sys/syslog.h> 50 #include <sys/module.h> 51 #include <sys/proc.h> 52 53 #include <net/if.h> 54 #include <net/if_var.h> 55 #include <net/if_media.h> 56 #include <net/ethernet.h> 57 #include <net/if_types.h> 58 59 #include <sys/bitstring.h> 60 61 #include "ice_dcb.h" 62 #include "ice_type.h" 63 #include "ice_common.h" 64 #include "ice_flow.h" 65 #include "ice_sched.h" 66 #include "ice_resmgr.h" 67 68 #include "ice_rdma_internal.h" 69 70 #include "ice_rss.h" 71 72 /* Hide debug sysctls unless INVARIANTS is enabled */ 73 #ifdef INVARIANTS 74 #define ICE_CTLFLAG_DEBUG 0 75 #else 76 #define ICE_CTLFLAG_DEBUG CTLFLAG_SKIP 77 #endif 78 79 /** 80 * for_each_set_bit - For loop over each set bit in a bit string 81 * @bit: storage for the bit index 82 * @data: address of data block to loop over 83 * @nbits: maximum number of bits to loop over 84 * 85 * macro to create a for loop over a bit string, which runs the body once for 86 * each bit that is set in the string. The bit variable will be set to the 87 * index of each set bit in the string, with zero representing the first bit. 88 */ 89 #define for_each_set_bit(bit, data, nbits) \ 90 for (bit_ffs((bitstr_t *)(data), (nbits), &(bit)); \ 91 (bit) != -1; \ 92 bit_ffs_at((bitstr_t *)(data), (bit) + 1, (nbits), &(bit))) 93 94 /** 95 * @var broadcastaddr 96 * @brief broadcast MAC address 97 * 98 * constant defining the broadcast MAC address, used for programming the 99 * broadcast address as a MAC filter for the PF VSI. 100 */ 101 static const u8 broadcastaddr[ETHER_ADDR_LEN] = { 102 0xff, 0xff, 0xff, 0xff, 0xff, 0xff 103 }; 104 105 MALLOC_DECLARE(M_ICE); 106 107 extern const char ice_driver_version[]; 108 extern const uint8_t ice_major_version; 109 extern const uint8_t ice_minor_version; 110 extern const uint8_t ice_patch_version; 111 extern const uint8_t ice_rc_version; 112 113 /* global sysctl indicating whether the Tx FC filter should be enabled */ 114 extern bool ice_enable_tx_fc_filter; 115 116 /* global sysctl indicating whether the Tx LLDP filter should be enabled */ 117 extern bool ice_enable_tx_lldp_filter; 118 119 /* global sysctl indicating whether FW health status events should be enabled */ 120 extern bool ice_enable_health_events; 121 122 /* global sysctl indicating whether to enable 5-layer scheduler topology */ 123 extern bool ice_tx_balance_en; 124 125 /** 126 * @struct ice_bar_info 127 * @brief PCI BAR mapping information 128 * 129 * Contains data about a PCI BAR that the driver has mapped for use. 130 */ 131 struct ice_bar_info { 132 struct resource *res; 133 bus_space_tag_t tag; 134 bus_space_handle_t handle; 135 bus_size_t size; 136 int rid; 137 }; 138 139 /* Alignment for queues */ 140 #define DBA_ALIGN 128 141 142 /* Maximum TSO size is (256K)-1 */ 143 #define ICE_TSO_SIZE ((256*1024) - 1) 144 145 /* Minimum size for TSO MSS */ 146 #define ICE_MIN_TSO_MSS 64 147 148 #define ICE_MAX_TX_SEGS 8 149 #define ICE_MAX_TSO_SEGS 128 150 151 #define ICE_MAX_DMA_SEG_SIZE ((16*1024) - 1) 152 153 #define ICE_MAX_RX_SEGS 5 154 155 #define ICE_MAX_TSO_HDR_SEGS 3 156 157 #define ICE_MSIX_BAR 3 158 159 #define ICE_DEFAULT_DESC_COUNT 1024 160 #define ICE_MAX_DESC_COUNT 8160 161 #define ICE_MIN_DESC_COUNT 64 162 #define ICE_DESC_COUNT_INCR 32 163 164 /* List of hardware offloads we support */ 165 #define ICE_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_TCP | CSUM_IP_UDP | CSUM_IP_SCTP | \ 166 CSUM_IP6_TCP| CSUM_IP6_UDP | CSUM_IP6_SCTP | \ 167 CSUM_IP_TSO | CSUM_IP6_TSO) 168 169 /* Macros to decide what kind of hardware offload to enable */ 170 #define ICE_CSUM_TCP (CSUM_IP_TCP|CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP6_TCP) 171 #define ICE_CSUM_UDP (CSUM_IP_UDP|CSUM_IP6_UDP) 172 #define ICE_CSUM_SCTP (CSUM_IP_SCTP|CSUM_IP6_SCTP) 173 #define ICE_CSUM_IP (CSUM_IP|CSUM_IP_TSO) 174 175 /* List of known RX CSUM offload flags */ 176 #define ICE_RX_CSUM_FLAGS (CSUM_L3_CALC | CSUM_L3_VALID | CSUM_L4_CALC | \ 177 CSUM_L4_VALID | CSUM_L5_CALC | CSUM_L5_VALID | \ 178 CSUM_COALESCED) 179 180 /* List of interface capabilities supported by ice hardware */ 181 #define ICE_FULL_CAPS \ 182 (IFCAP_TSO4 | IFCAP_TSO6 | \ 183 IFCAP_TXCSUM | IFCAP_TXCSUM_IPV6 | \ 184 IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6 | \ 185 IFCAP_VLAN_HWFILTER | IFCAP_VLAN_HWTSO | \ 186 IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWTSO | \ 187 IFCAP_VLAN_MTU | IFCAP_JUMBO_MTU | IFCAP_LRO) 188 189 /* Safe mode disables support for hardware checksums and TSO */ 190 #define ICE_SAFE_CAPS \ 191 (ICE_FULL_CAPS & ~(IFCAP_HWCSUM | IFCAP_TSO | \ 192 IFCAP_VLAN_HWTSO | IFCAP_VLAN_HWCSUM)) 193 194 #define ICE_CAPS(sc) \ 195 (ice_is_bit_set(sc->feat_en, ICE_FEATURE_SAFE_MODE) ? ICE_SAFE_CAPS : ICE_FULL_CAPS) 196 197 /** 198 * ICE_NVM_ACCESS 199 * @brief Private ioctl command number for NVM access ioctls 200 * 201 * The ioctl command number used by NVM update for accessing the driver for 202 * NVM access commands. 203 */ 204 #define ICE_NVM_ACCESS \ 205 (((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 5) 206 207 /** 208 * ICE_DEBUG_DUMP 209 * @brief Private ioctl command number for retrieving debug dump data 210 * 211 * The ioctl command number used by a userspace tool for accessing the driver for 212 * getting debug dump data from the firmware. 213 */ 214 #define ICE_DEBUG_DUMP \ 215 (((((((('E' << 4) + '1') << 4) + 'K') << 4) + 'G') << 4) | 6) 216 217 #define ICE_AQ_LEN 1023 218 #define ICE_MBXQ_LEN 512 219 #define ICE_SBQ_LEN 512 220 221 #define ICE_CTRLQ_WORK_LIMIT 256 222 223 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 224 225 /* wait up to 50 microseconds for queue state change */ 226 #define ICE_Q_WAIT_RETRY_LIMIT 5 227 228 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 229 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 230 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 231 232 /* 233 * For now, set this to the hardware maximum. Each function gets a smaller 234 * number assigned to it in hw->func_caps.guar_num_vsi, though there 235 * appears to be no guarantee that is the maximum number that a function 236 * can use. 237 */ 238 #define ICE_MAX_VSI_AVAILABLE 768 239 240 /* Maximum size of a single frame (for Tx and Rx) */ 241 #define ICE_MAX_FRAME_SIZE ICE_AQ_SET_MAC_FRAME_SIZE_MAX 242 243 /* Maximum MTU size */ 244 #define ICE_MAX_MTU (ICE_MAX_FRAME_SIZE - \ 245 ETHER_HDR_LEN - ETHER_CRC_LEN - ETHER_VLAN_ENCAP_LEN) 246 247 /* 248 * Hardware requires that TSO packets have an segment size of at least 64 249 * bytes. To avoid sending bad frames to the hardware, the driver forces the 250 * MSS for all TSO packets to have a segment size of at least 64 bytes. 251 * 252 * However, if the MTU is reduced below a certain size, then the resulting 253 * larger MSS can result in transmitting segmented frames with a packet size 254 * larger than the MTU. 255 * 256 * Avoid this by preventing the MTU from being lowered below this limit. 257 * Alternative solutions require changing the TCP stack to disable offloading 258 * the segmentation when the requested segment size goes below 64 bytes. 259 */ 260 #define ICE_MIN_MTU 112 261 262 /* 263 * The default number of queues reserved for a VF is 4, according to the 264 * AVF Base Mode specification. 265 */ 266 #define ICE_DEFAULT_VF_QUEUES 4 267 268 /* 269 * An invalid VSI number to indicate that mirroring should be disabled. 270 */ 271 #define ICE_INVALID_MIRROR_VSI ((u16)-1) 272 /* 273 * The maximum number of RX queues allowed per TC in a VSI. 274 */ 275 #define ICE_MAX_RXQS_PER_TC 256 276 277 /* 278 * There are three settings that can be updated independently or 279 * altogether: Link speed, FEC, and Flow Control. These macros allow 280 * the caller to specify which setting(s) to update. 281 */ 282 #define ICE_APPLY_LS BIT(0) 283 #define ICE_APPLY_FEC BIT(1) 284 #define ICE_APPLY_FC BIT(2) 285 #define ICE_APPLY_LS_FEC (ICE_APPLY_LS | ICE_APPLY_FEC) 286 #define ICE_APPLY_LS_FC (ICE_APPLY_LS | ICE_APPLY_FC) 287 #define ICE_APPLY_FEC_FC (ICE_APPLY_FEC | ICE_APPLY_FC) 288 #define ICE_APPLY_LS_FEC_FC (ICE_APPLY_LS_FEC | ICE_APPLY_FC) 289 290 /** 291 * @enum ice_dyn_idx_t 292 * @brief Dynamic Control ITR indexes 293 * 294 * This enum matches hardware bits and is meant to be used by DYN_CTLN 295 * registers and QINT registers or more generally anywhere in the manual 296 * mentioning ITR_INDX, ITR_NONE cannot be used as an index 'n' into any 297 * register but instead is a special value meaning "don't update" ITR0/1/2. 298 */ 299 enum ice_dyn_idx_t { 300 ICE_IDX_ITR0 = 0, 301 ICE_IDX_ITR1 = 1, 302 ICE_IDX_ITR2 = 2, 303 ICE_ITR_NONE = 3 /* ITR_NONE must not be used as an index */ 304 }; 305 306 /* By convenction ITR0 is used for RX, and ITR1 is used for TX */ 307 #define ICE_RX_ITR ICE_IDX_ITR0 308 #define ICE_TX_ITR ICE_IDX_ITR1 309 310 #define ICE_ITR_MAX 8160 311 312 /* Define the default Tx and Rx ITR as 50us (translates to ~20k int/sec max) */ 313 #define ICE_DFLT_TX_ITR 50 314 #define ICE_DFLT_RX_ITR 50 315 316 /** 317 * ice_itr_to_reg - Convert an ITR setting into its register equivalent 318 * @hw: The device HW structure 319 * @itr_setting: the ITR setting to convert 320 * 321 * Based on the hardware ITR granularity, convert an ITR setting into the 322 * correct value to prepare programming to the HW. 323 */ 324 static inline u16 ice_itr_to_reg(struct ice_hw *hw, u16 itr_setting) 325 { 326 return itr_setting / hw->itr_gran; 327 } 328 329 /** 330 * @enum ice_rx_dtype 331 * @brief DTYPE header split options 332 * 333 * This enum matches the Rx context bits to define whether header split is 334 * enabled or not. 335 */ 336 enum ice_rx_dtype { 337 ICE_RX_DTYPE_NO_SPLIT = 0, 338 ICE_RX_DTYPE_HEADER_SPLIT = 1, 339 ICE_RX_DTYPE_SPLIT_ALWAYS = 2, 340 }; 341 342 /* Strings used for displaying FEC mode 343 * 344 * Use ice_fec_str() to get these unless these need to be embedded in a 345 * string constant. 346 */ 347 #define ICE_FEC_STRING_AUTO "Auto" 348 #define ICE_FEC_STRING_RS "RS-FEC" 349 #define ICE_FEC_STRING_BASER "FC-FEC/BASE-R" 350 #define ICE_FEC_STRING_NONE "None" 351 #define ICE_FEC_STRING_DIS_AUTO "Auto (w/ No-FEC)" 352 353 /* Strings used for displaying Flow Control mode 354 * 355 * Use ice_fc_str() to get these unless these need to be embedded in a 356 * string constant. 357 */ 358 #define ICE_FC_STRING_FULL "Full" 359 #define ICE_FC_STRING_TX "Tx" 360 #define ICE_FC_STRING_RX "Rx" 361 #define ICE_FC_STRING_NONE "None" 362 363 /* 364 * The number of times the ice_handle_i2c_req function will retry reading 365 * I2C data via the Admin Queue before returning EBUSY. 366 */ 367 #define ICE_I2C_MAX_RETRIES 10 368 369 /* 370 * The Start LLDP Agent AQ command will fail if it's sent too soon after 371 * the LLDP agent is stopped. The period between the stop and start 372 * commands must currently be at least 2 seconds. 373 */ 374 #define ICE_START_LLDP_RETRY_WAIT (2 * hz) 375 376 /* 377 * Only certain cluster IDs are valid for the FW debug dump functionality, 378 * so define a mask of those here. 379 */ 380 #define ICE_FW_DEBUG_DUMP_VALID_CLUSTER_MASK 0x4001AF 381 382 struct ice_softc; 383 384 /** 385 * @enum ice_rx_cso_stat 386 * @brief software checksum offload statistics 387 * 388 * Enumeration of possible checksum offload statistics captured by software 389 * during the Rx path. 390 */ 391 enum ice_rx_cso_stat { 392 ICE_CSO_STAT_RX_IP4_ERR, 393 ICE_CSO_STAT_RX_IP6_ERR, 394 ICE_CSO_STAT_RX_L3_ERR, 395 ICE_CSO_STAT_RX_TCP_ERR, 396 ICE_CSO_STAT_RX_UDP_ERR, 397 ICE_CSO_STAT_RX_SCTP_ERR, 398 ICE_CSO_STAT_RX_L4_ERR, 399 ICE_CSO_STAT_RX_COUNT 400 }; 401 402 /** 403 * @enum ice_tx_cso_stat 404 * @brief software checksum offload statistics 405 * 406 * Enumeration of possible checksum offload statistics captured by software 407 * during the Tx path. 408 */ 409 enum ice_tx_cso_stat { 410 ICE_CSO_STAT_TX_TCP, 411 ICE_CSO_STAT_TX_UDP, 412 ICE_CSO_STAT_TX_SCTP, 413 ICE_CSO_STAT_TX_IP4, 414 ICE_CSO_STAT_TX_IP6, 415 ICE_CSO_STAT_TX_L3_ERR, 416 ICE_CSO_STAT_TX_L4_ERR, 417 ICE_CSO_STAT_TX_COUNT 418 }; 419 420 /** 421 * @struct tx_stats 422 * @brief software Tx statistics 423 * 424 * Contains software counted Tx statistics for a single queue 425 */ 426 struct tx_stats { 427 /* Soft Stats */ 428 u64 tx_bytes; 429 u64 tx_packets; 430 u64 mss_too_small; 431 u64 cso[ICE_CSO_STAT_TX_COUNT]; 432 }; 433 434 /** 435 * @struct rx_stats 436 * @brief software Rx statistics 437 * 438 * Contains software counted Rx statistics for a single queue 439 */ 440 struct rx_stats { 441 /* Soft Stats */ 442 u64 rx_packets; 443 u64 rx_bytes; 444 u64 desc_errs; 445 u64 cso[ICE_CSO_STAT_RX_COUNT]; 446 }; 447 448 /** 449 * @struct ice_vsi_hw_stats 450 * @brief hardware statistics for a VSI 451 * 452 * Stores statistics that are generated by hardware for a VSI. 453 */ 454 struct ice_vsi_hw_stats { 455 struct ice_eth_stats prev; 456 struct ice_eth_stats cur; 457 bool offsets_loaded; 458 }; 459 460 /** 461 * @struct ice_pf_hw_stats 462 * @brief hardware statistics for a PF 463 * 464 * Stores statistics that are generated by hardware for each PF. 465 */ 466 struct ice_pf_hw_stats { 467 struct ice_hw_port_stats prev; 468 struct ice_hw_port_stats cur; 469 bool offsets_loaded; 470 }; 471 472 /** 473 * @struct ice_pf_sw_stats 474 * @brief software statistics for a PF 475 * 476 * Contains software generated statistics relevant to a PF. 477 */ 478 struct ice_pf_sw_stats { 479 /* # of reset events handled, by type */ 480 u32 corer_count; 481 u32 globr_count; 482 u32 empr_count; 483 u32 pfr_count; 484 485 /* # of detected MDD events for Tx and Rx */ 486 u32 tx_mdd_count; 487 u32 rx_mdd_count; 488 }; 489 490 /** 491 * @struct ice_tc_info 492 * @brief Traffic class information for a VSI 493 * 494 * Stores traffic class information used in configuring 495 * a VSI. 496 */ 497 struct ice_tc_info { 498 u16 qoffset; /* Offset in VSI queue space */ 499 u16 qcount_tx; /* TX queues for this Traffic Class */ 500 u16 qcount_rx; /* RX queues */ 501 }; 502 503 /** 504 * @struct ice_vsi 505 * @brief VSI structure 506 * 507 * Contains data relevant to a single VSI 508 */ 509 struct ice_vsi { 510 /* back pointer to the softc */ 511 struct ice_softc *sc; 512 513 bool dynamic; /* if true, dynamically allocated */ 514 515 enum ice_vsi_type type; /* type of this VSI */ 516 u16 idx; /* software index to sc->all_vsi[] */ 517 518 u16 *tx_qmap; /* Tx VSI to PF queue mapping */ 519 u16 *rx_qmap; /* Rx VSI to PF queue mapping */ 520 521 enum ice_resmgr_alloc_type qmap_type; 522 523 struct ice_tx_queue *tx_queues; /* Tx queue array */ 524 struct ice_rx_queue *rx_queues; /* Rx queue array */ 525 526 int num_tx_queues; 527 int num_rx_queues; 528 int num_vectors; 529 530 int16_t rx_itr; 531 int16_t tx_itr; 532 533 /* RSS configuration */ 534 u16 rss_table_size; /* HW RSS table size */ 535 u8 rss_lut_type; /* Used to configure Get/Set RSS LUT AQ call */ 536 537 int max_frame_size; 538 u16 mbuf_sz; 539 540 struct ice_aqc_vsi_props info; 541 542 /* DCB configuration */ 543 u8 num_tcs; /* Total number of enabled TCs */ 544 u16 tc_map; /* bitmap of enabled Traffic Classes */ 545 /* Information for each traffic class */ 546 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 547 548 /* context for per-VSI sysctls */ 549 struct sysctl_ctx_list ctx; 550 struct sysctl_oid *vsi_node; 551 552 /* context for per-txq sysctls */ 553 struct sysctl_ctx_list txqs_ctx; 554 struct sysctl_oid *txqs_node; 555 556 /* context for per-rxq sysctls */ 557 struct sysctl_ctx_list rxqs_ctx; 558 struct sysctl_oid *rxqs_node; 559 560 /* VSI-level stats */ 561 struct ice_vsi_hw_stats hw_stats; 562 563 /* VSI mirroring details */ 564 u16 mirror_src_vsi; 565 u16 rule_mir_ingress; 566 u16 rule_mir_egress; 567 }; 568 569 /** 570 * @struct ice_debug_dump_cmd 571 * @brief arguments/return value for debug dump ioctl 572 */ 573 struct ice_debug_dump_cmd { 574 u32 offset; /* offset to read/write from table, in bytes */ 575 u16 cluster_id; /* also used to get next cluster id */ 576 u16 table_id; 577 u16 data_size; /* size of data field, in bytes */ 578 u16 reserved1; 579 u32 reserved2; 580 u8 data[]; 581 }; 582 583 /** 584 * @enum ice_state 585 * @brief Driver state flags 586 * 587 * Used to indicate the status of various driver events. Intended to be 588 * modified only using atomic operations, so that we can use it even in places 589 * which aren't locked. 590 */ 591 enum ice_state { 592 ICE_STATE_CONTROLQ_EVENT_PENDING, 593 ICE_STATE_VFLR_PENDING, 594 ICE_STATE_MDD_PENDING, 595 ICE_STATE_RESET_OICR_RECV, 596 ICE_STATE_RESET_PFR_REQ, 597 ICE_STATE_PREPARED_FOR_RESET, 598 ICE_STATE_SUBIF_NEEDS_REINIT, 599 ICE_STATE_RESET_FAILED, 600 ICE_STATE_DRIVER_INITIALIZED, 601 ICE_STATE_NO_MEDIA, 602 ICE_STATE_RECOVERY_MODE, 603 ICE_STATE_ROLLBACK_MODE, 604 ICE_STATE_LINK_STATUS_REPORTED, 605 ICE_STATE_ATTACHING, 606 ICE_STATE_DETACHING, 607 ICE_STATE_LINK_DEFAULT_OVERRIDE_PENDING, 608 ICE_STATE_LLDP_RX_FLTR_FROM_DRIVER, 609 ICE_STATE_MULTIPLE_TCS, 610 ICE_STATE_DO_FW_DEBUG_DUMP, 611 ICE_STATE_LINK_ACTIVE_ON_DOWN, 612 ICE_STATE_FIRST_INIT_LINK, 613 ICE_STATE_DO_CREATE_MIRR_INTFC, 614 ICE_STATE_DO_DESTROY_MIRR_INTFC, 615 /* This entry must be last */ 616 ICE_STATE_LAST, 617 }; 618 619 /* Functions for setting and checking driver state. Note the functions take 620 * bit positions, not bitmasks. The atomic_testandset_32 and 621 * atomic_testandclear_32 operations require bit positions, while the 622 * atomic_set_32 and atomic_clear_32 require bitmasks. This can easily lead to 623 * programming error, so we provide wrapper functions to avoid this. 624 */ 625 626 /** 627 * ice_set_state - Set the specified state 628 * @s: the state bitmap 629 * @bit: the state to set 630 * 631 * Atomically update the state bitmap with the specified bit set. 632 */ 633 static inline void 634 ice_set_state(volatile u32 *s, enum ice_state bit) 635 { 636 /* atomic_set_32 expects a bitmask */ 637 atomic_set_32(s, BIT(bit)); 638 } 639 640 /** 641 * ice_clear_state - Clear the specified state 642 * @s: the state bitmap 643 * @bit: the state to clear 644 * 645 * Atomically update the state bitmap with the specified bit cleared. 646 */ 647 static inline void 648 ice_clear_state(volatile u32 *s, enum ice_state bit) 649 { 650 /* atomic_clear_32 expects a bitmask */ 651 atomic_clear_32(s, BIT(bit)); 652 } 653 654 /** 655 * ice_testandset_state - Test and set the specified state 656 * @s: the state bitmap 657 * @bit: the bit to test 658 * 659 * Atomically update the state bitmap, setting the specified bit. Returns the 660 * previous value of the bit. 661 */ 662 static inline u32 663 ice_testandset_state(volatile u32 *s, enum ice_state bit) 664 { 665 /* atomic_testandset_32 expects a bit position */ 666 return atomic_testandset_32(s, bit); 667 } 668 669 /** 670 * ice_testandclear_state - Test and clear the specified state 671 * @s: the state bitmap 672 * @bit: the bit to test 673 * 674 * Atomically update the state bitmap, clearing the specified bit. Returns the 675 * previous value of the bit. 676 */ 677 static inline u32 678 ice_testandclear_state(volatile u32 *s, enum ice_state bit) 679 { 680 /* atomic_testandclear_32 expects a bit position */ 681 return atomic_testandclear_32(s, bit); 682 } 683 684 /** 685 * ice_test_state - Test the specified state 686 * @s: the state bitmap 687 * @bit: the bit to test 688 * 689 * Return true if the state is set, false otherwise. Use this only if the flow 690 * does not need to update the state. If you must update the state as well, 691 * prefer ice_testandset_state or ice_testandclear_state. 692 */ 693 static inline u32 694 ice_test_state(volatile u32 *s, enum ice_state bit) 695 { 696 return (*s & BIT(bit)) ? true : false; 697 } 698 699 /** 700 * @struct ice_str_buf 701 * @brief static length buffer for string returning 702 * 703 * Structure containing a fixed size string buffer, used to implement 704 * numeric->string conversion functions that may want to return non-constant 705 * strings. 706 * 707 * This allows returning a fixed size string that is generated by a conversion 708 * function, and then copied to the used location without needing to use an 709 * explicit local variable passed by reference. 710 */ 711 struct ice_str_buf { 712 char str[ICE_STR_BUF_LEN]; 713 }; 714 715 struct ice_str_buf _ice_aq_str(enum ice_aq_err aq_err); 716 struct ice_str_buf _ice_status_str(enum ice_status status); 717 struct ice_str_buf _ice_err_str(int err); 718 struct ice_str_buf _ice_fltr_flag_str(u16 flag); 719 struct ice_str_buf _ice_log_sev_str(u8 log_level); 720 struct ice_str_buf _ice_mdd_tx_tclan_str(u8 event); 721 struct ice_str_buf _ice_mdd_tx_pqm_str(u8 event); 722 struct ice_str_buf _ice_mdd_rx_str(u8 event); 723 struct ice_str_buf _ice_fw_lldp_status(u32 lldp_status); 724 725 #define ice_aq_str(err) _ice_aq_str(err).str 726 #define ice_status_str(err) _ice_status_str(err).str 727 #define ice_err_str(err) _ice_err_str(err).str 728 #define ice_fltr_flag_str(flag) _ice_fltr_flag_str(flag).str 729 730 #define ice_mdd_tx_tclan_str(event) _ice_mdd_tx_tclan_str(event).str 731 #define ice_mdd_tx_pqm_str(event) _ice_mdd_tx_pqm_str(event).str 732 #define ice_mdd_rx_str(event) _ice_mdd_rx_str(event).str 733 734 #define ice_log_sev_str(log_level) _ice_log_sev_str(log_level).str 735 #define ice_fw_lldp_status(lldp_status) _ice_fw_lldp_status(lldp_status).str 736 737 /** 738 * ice_enable_intr - Enable interrupts for given vector 739 * @hw: the device private HW structure 740 * @vector: the interrupt index in PF space 741 * 742 * In MSI or Legacy interrupt mode, interrupt 0 is the only valid index. 743 */ 744 static inline void 745 ice_enable_intr(struct ice_hw *hw, int vector) 746 { 747 u32 dyn_ctl; 748 749 /* Use ITR_NONE so that ITR configuration is not changed. */ 750 dyn_ctl = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 751 (ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S); 752 wr32(hw, GLINT_DYN_CTL(vector), dyn_ctl); 753 } 754 755 /** 756 * ice_disable_intr - Disable interrupts for given vector 757 * @hw: the device private HW structure 758 * @vector: the interrupt index in PF space 759 * 760 * In MSI or Legacy interrupt mode, interrupt 0 is the only valid index. 761 */ 762 static inline void 763 ice_disable_intr(struct ice_hw *hw, int vector) 764 { 765 u32 dyn_ctl; 766 767 /* Use ITR_NONE so that ITR configuration is not changed. */ 768 dyn_ctl = ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S; 769 wr32(hw, GLINT_DYN_CTL(vector), dyn_ctl); 770 } 771 772 /** 773 * ice_is_tx_desc_done - determine if a Tx descriptor is done 774 * @txd: the Tx descriptor to check 775 * 776 * Returns true if hardware is done with a Tx descriptor and software is 777 * capable of re-using it. 778 */ 779 static inline bool 780 ice_is_tx_desc_done(struct ice_tx_desc *txd) 781 { 782 return (((txd->cmd_type_offset_bsz & ICE_TXD_QW1_DTYPE_M) 783 >> ICE_TXD_QW1_DTYPE_S) == ICE_TX_DESC_DTYPE_DESC_DONE); 784 } 785 786 /** 787 * ice_get_pf_id - Get the PF id from the hardware registers 788 * @hw: the ice hardware structure 789 * 790 * Reads the PF_FUNC_RID register and extracts the function number from it. 791 * Intended to be used in cases where hw->pf_id hasn't yet been assigned by 792 * ice_init_hw. 793 * 794 * @pre this function should be called only after PCI register access has been 795 * setup, and prior to ice_init_hw. After hardware has been initialized, the 796 * cached hw->pf_id value can be used. 797 */ 798 static inline u8 799 ice_get_pf_id(struct ice_hw *hw) 800 { 801 return (u8)((rd32(hw, PF_FUNC_RID) & PF_FUNC_RID_FUNCTION_NUMBER_M) >> 802 PF_FUNC_RID_FUNCTION_NUMBER_S); 803 } 804 805 /* Details of how to re-initialize depend on the networking stack */ 806 void ice_request_stack_reinit(struct ice_softc *sc); 807 808 /* Details of how to check if the network stack is detaching us */ 809 bool ice_driver_is_detaching(struct ice_softc *sc); 810 811 /* Details of how to setup/teardown a mirror interface */ 812 /** 813 * @brief Create an interface for mirroring 814 */ 815 int ice_create_mirror_interface(struct ice_softc *sc); 816 /** 817 * @brief Destroy created mirroring interface 818 */ 819 void ice_destroy_mirror_interface(struct ice_softc *sc); 820 821 const char * ice_fw_module_str(enum ice_aqc_fw_logging_mod module); 822 void ice_add_fw_logging_tunables(struct ice_softc *sc, 823 struct sysctl_oid *parent); 824 void ice_handle_fw_log_event(struct ice_softc *sc, struct ice_aq_desc *desc, 825 void *buf); 826 827 int ice_process_ctrlq(struct ice_softc *sc, enum ice_ctl_q q_type, u16 *pending); 828 int ice_map_bar(device_t dev, struct ice_bar_info *bar, int bar_num); 829 void ice_free_bar(device_t dev, struct ice_bar_info *bar); 830 void ice_set_ctrlq_len(struct ice_hw *hw); 831 void ice_release_vsi(struct ice_vsi *vsi); 832 struct ice_vsi *ice_alloc_vsi(struct ice_softc *sc, enum ice_vsi_type type); 833 void ice_alloc_vsi_qmap(struct ice_vsi *vsi, const int max_tx_queues, 834 const int max_rx_queues); 835 void ice_free_vsi_qmaps(struct ice_vsi *vsi); 836 int ice_initialize_vsi(struct ice_vsi *vsi); 837 void ice_deinit_vsi(struct ice_vsi *vsi); 838 uint64_t ice_aq_speed_to_rate(struct ice_port_info *pi); 839 int ice_get_phy_type_low(uint64_t phy_type_low); 840 int ice_get_phy_type_high(uint64_t phy_type_high); 841 enum ice_status ice_add_media_types(struct ice_softc *sc, struct ifmedia *media); 842 void ice_configure_rxq_interrupt(struct ice_hw *hw, u16 rxqid, u16 vector, u8 itr_idx); 843 void ice_configure_all_rxq_interrupts(struct ice_vsi *vsi); 844 void ice_configure_txq_interrupt(struct ice_hw *hw, u16 txqid, u16 vector, u8 itr_idx); 845 void ice_configure_all_txq_interrupts(struct ice_vsi *vsi); 846 void ice_flush_rxq_interrupts(struct ice_vsi *vsi); 847 void ice_flush_txq_interrupts(struct ice_vsi *vsi); 848 int ice_cfg_vsi_for_tx(struct ice_vsi *vsi); 849 int ice_cfg_vsi_for_rx(struct ice_vsi *vsi); 850 int ice_control_rx_queue(struct ice_vsi *vsi, u16 qidx, bool enable); 851 int ice_control_all_rx_queues(struct ice_vsi *vsi, bool enable); 852 int ice_cfg_pf_default_mac_filters(struct ice_softc *sc); 853 int ice_rm_pf_default_mac_filters(struct ice_softc *sc); 854 void ice_print_nvm_version(struct ice_softc *sc); 855 void ice_update_vsi_hw_stats(struct ice_vsi *vsi); 856 void ice_reset_vsi_stats(struct ice_vsi *vsi); 857 void ice_update_pf_stats(struct ice_softc *sc); 858 void ice_reset_pf_stats(struct ice_softc *sc); 859 void ice_add_device_sysctls(struct ice_softc *sc); 860 void ice_log_hmc_error(struct ice_hw *hw, device_t dev); 861 void ice_add_sysctls_eth_stats(struct sysctl_ctx_list *ctx, 862 struct sysctl_oid *parent, 863 struct ice_eth_stats *stats); 864 void ice_add_vsi_sysctls(struct ice_vsi *vsi); 865 void ice_add_sysctls_mac_stats(struct sysctl_ctx_list *ctx, 866 struct sysctl_oid *parent, 867 struct ice_hw_port_stats *stats); 868 void ice_configure_misc_interrupts(struct ice_softc *sc); 869 int ice_sync_multicast_filters(struct ice_softc *sc); 870 enum ice_status ice_add_vlan_hw_filters(struct ice_vsi *vsi, u16 *vid, 871 u16 length); 872 enum ice_status ice_add_vlan_hw_filter(struct ice_vsi *vsi, u16 vid); 873 enum ice_status ice_remove_vlan_hw_filters(struct ice_vsi *vsi, u16 *vid, 874 u16 length); 875 enum ice_status ice_remove_vlan_hw_filter(struct ice_vsi *vsi, u16 vid); 876 void ice_add_vsi_tunables(struct ice_vsi *vsi, struct sysctl_oid *parent); 877 void ice_del_vsi_sysctl_ctx(struct ice_vsi *vsi); 878 void ice_add_device_tunables(struct ice_softc *sc); 879 int ice_add_vsi_mac_filter(struct ice_vsi *vsi, const u8 *addr); 880 int ice_remove_vsi_mac_filter(struct ice_vsi *vsi, const u8 *addr); 881 int ice_vsi_disable_tx(struct ice_vsi *vsi); 882 void ice_vsi_add_txqs_ctx(struct ice_vsi *vsi); 883 void ice_vsi_add_rxqs_ctx(struct ice_vsi *vsi); 884 void ice_vsi_del_txqs_ctx(struct ice_vsi *vsi); 885 void ice_vsi_del_rxqs_ctx(struct ice_vsi *vsi); 886 void ice_add_txq_sysctls(struct ice_tx_queue *txq); 887 void ice_add_rxq_sysctls(struct ice_rx_queue *rxq); 888 int ice_config_rss(struct ice_vsi *vsi); 889 void ice_clean_all_vsi_rss_cfg(struct ice_softc *sc); 890 enum ice_status ice_load_pkg_file(struct ice_softc *sc); 891 void ice_log_pkg_init(struct ice_softc *sc, enum ice_ddp_state pkg_status); 892 uint64_t ice_get_ifnet_counter(struct ice_vsi *vsi, ift_counter counter); 893 void ice_save_pci_info(struct ice_hw *hw, device_t dev); 894 int ice_replay_all_vsi_cfg(struct ice_softc *sc); 895 void ice_link_up_msg(struct ice_softc *sc); 896 int ice_update_laa_mac(struct ice_softc *sc); 897 void ice_get_and_print_bus_info(struct ice_softc *sc); 898 const char *ice_fec_str(enum ice_fec_mode mode); 899 const char *ice_fc_str(enum ice_fc_mode mode); 900 const char *ice_fwd_act_str(enum ice_sw_fwd_act_type action); 901 const char *ice_state_to_str(enum ice_state state); 902 int ice_init_link_events(struct ice_softc *sc); 903 void ice_configure_rx_itr(struct ice_vsi *vsi); 904 void ice_configure_tx_itr(struct ice_vsi *vsi); 905 void ice_setup_pf_vsi(struct ice_softc *sc); 906 void ice_handle_mdd_event(struct ice_softc *sc); 907 void ice_init_dcb_setup(struct ice_softc *sc); 908 int ice_send_version(struct ice_softc *sc); 909 int ice_cfg_pf_ethertype_filters(struct ice_softc *sc); 910 void ice_init_link_configuration(struct ice_softc *sc); 911 void ice_init_saved_phy_cfg(struct ice_softc *sc); 912 int ice_apply_saved_phy_cfg(struct ice_softc *sc, u8 settings); 913 void ice_set_link_management_mode(struct ice_softc *sc); 914 int ice_module_event_handler(module_t mod, int what, void *arg); 915 int ice_handle_nvm_access_ioctl(struct ice_softc *sc, struct ifdrv *ifd); 916 int ice_handle_i2c_req(struct ice_softc *sc, struct ifi2creq *req); 917 int ice_read_sff_eeprom(struct ice_softc *sc, u16 dev_addr, u16 offset, u8* data, u16 length); 918 int ice_alloc_intr_tracking(struct ice_softc *sc); 919 void ice_free_intr_tracking(struct ice_softc *sc); 920 void ice_set_default_local_lldp_mib(struct ice_softc *sc); 921 void ice_set_link(struct ice_softc *sc, bool enabled); 922 void ice_add_rx_lldp_filter(struct ice_softc *sc); 923 void ice_init_health_events(struct ice_softc *sc); 924 void ice_cfg_pba_num(struct ice_softc *sc); 925 int ice_handle_debug_dump_ioctl(struct ice_softc *sc, struct ifdrv *ifd); 926 u8 ice_dcb_get_tc_map(const struct ice_dcbx_cfg *dcbcfg); 927 void ice_do_dcb_reconfig(struct ice_softc *sc, bool pending_mib); 928 int ice_setup_vsi_mirroring(struct ice_vsi *vsi); 929 930 #endif /* _ICE_LIB_H_ */ 931