1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright (c) 2020, Intel Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * 3. Neither the name of the Intel Corporation nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 /*$FreeBSD$*/ 32 33 #ifndef _ICE_LAN_TX_RX_H_ 34 #define _ICE_LAN_TX_RX_H_ 35 #include "ice_osdep.h" 36 37 /* Rx Descriptors */ 38 union ice_16byte_rx_desc { 39 struct { 40 __le64 pkt_addr; /* Packet buffer address */ 41 __le64 hdr_addr; /* Header buffer address */ 42 } read; 43 struct { 44 struct { 45 struct { 46 __le16 mirroring_status; 47 __le16 l2tag1; 48 } lo_dword; 49 union { 50 __le32 rss; /* RSS Hash */ 51 __le32 fd_id; /* Flow Director filter ID */ 52 } hi_dword; 53 } qword0; 54 struct { 55 /* ext status/error/PTYPE/length */ 56 __le64 status_error_len; 57 } qword1; 58 } wb; /* writeback */ 59 }; 60 61 union ice_32byte_rx_desc { 62 struct { 63 __le64 pkt_addr; /* Packet buffer address */ 64 __le64 hdr_addr; /* Header buffer address */ 65 /* bit 0 of hdr_addr is DD bit */ 66 __le64 rsvd1; 67 __le64 rsvd2; 68 } read; 69 struct { 70 struct { 71 struct { 72 __le16 mirroring_status; 73 __le16 l2tag1; 74 } lo_dword; 75 union { 76 __le32 rss; /* RSS Hash */ 77 __le32 fd_id; /* Flow Director filter ID */ 78 } hi_dword; 79 } qword0; 80 struct { 81 /* status/error/PTYPE/length */ 82 __le64 status_error_len; 83 } qword1; 84 struct { 85 __le16 ext_status; /* extended status */ 86 __le16 rsvd; 87 __le16 l2tag2_1; 88 __le16 l2tag2_2; 89 } qword2; 90 struct { 91 __le32 reserved; 92 __le32 fd_id; 93 } qword3; 94 } wb; /* writeback */ 95 }; 96 97 struct ice_fltr_desc { 98 __le64 qidx_compq_space_stat; 99 __le64 dtype_cmd_vsi_fdid; 100 }; 101 102 #define ICE_FXD_FLTR_QW0_QINDEX_S 0 103 #define ICE_FXD_FLTR_QW0_QINDEX_M (0x7FFULL << ICE_FXD_FLTR_QW0_QINDEX_S) 104 #define ICE_FXD_FLTR_QW0_COMP_Q_S 11 105 #define ICE_FXD_FLTR_QW0_COMP_Q_M BIT_ULL(ICE_FXD_FLTR_QW0_COMP_Q_S) 106 #define ICE_FXD_FLTR_QW0_COMP_Q_ZERO 0x0ULL 107 #define ICE_FXD_FLTR_QW0_COMP_Q_QINDX 0x1ULL 108 109 #define ICE_FXD_FLTR_QW0_COMP_REPORT_S 12 110 #define ICE_FXD_FLTR_QW0_COMP_REPORT_M \ 111 (0x3ULL << ICE_FXD_FLTR_QW0_COMP_REPORT_S) 112 #define ICE_FXD_FLTR_QW0_COMP_REPORT_NONE 0x0ULL 113 #define ICE_FXD_FLTR_QW0_COMP_REPORT_SW_FAIL 0x1ULL 114 #define ICE_FXD_FLTR_QW0_COMP_REPORT_SW 0x2ULL 115 116 #define ICE_FXD_FLTR_QW0_FD_SPACE_S 14 117 #define ICE_FXD_FLTR_QW0_FD_SPACE_M (0x3ULL << ICE_FXD_FLTR_QW0_FD_SPACE_S) 118 #define ICE_FXD_FLTR_QW0_FD_SPACE_GUAR 0x0ULL 119 #define ICE_FXD_FLTR_QW0_FD_SPACE_BEST_EFFORT 0x1ULL 120 #define ICE_FXD_FLTR_QW0_FD_SPACE_GUAR_BEST 0x2ULL 121 #define ICE_FXD_FLTR_QW0_FD_SPACE_BEST_GUAR 0x3ULL 122 123 #define ICE_FXD_FLTR_QW0_STAT_CNT_S 16 124 #define ICE_FXD_FLTR_QW0_STAT_CNT_M \ 125 (0x1FFFULL << ICE_FXD_FLTR_QW0_STAT_CNT_S) 126 #define ICE_FXD_FLTR_QW0_STAT_ENA_S 29 127 #define ICE_FXD_FLTR_QW0_STAT_ENA_M (0x3ULL << ICE_FXD_FLTR_QW0_STAT_ENA_S) 128 #define ICE_FXD_FLTR_QW0_STAT_ENA_NONE 0x0ULL 129 #define ICE_FXD_FLTR_QW0_STAT_ENA_PKTS 0x1ULL 130 #define ICE_FXD_FLTR_QW0_STAT_ENA_BYTES 0x2ULL 131 #define ICE_FXD_FLTR_QW0_STAT_ENA_PKTS_BYTES 0x3ULL 132 133 #define ICE_FXD_FLTR_QW0_EVICT_ENA_S 31 134 #define ICE_FXD_FLTR_QW0_EVICT_ENA_M BIT_ULL(ICE_FXD_FLTR_QW0_EVICT_ENA_S) 135 #define ICE_FXD_FLTR_QW0_EVICT_ENA_FALSE 0x0ULL 136 #define ICE_FXD_FLTR_QW0_EVICT_ENA_TRUE 0x1ULL 137 138 #define ICE_FXD_FLTR_QW0_TO_Q_S 32 139 #define ICE_FXD_FLTR_QW0_TO_Q_M (0x7ULL << ICE_FXD_FLTR_QW0_TO_Q_S) 140 #define ICE_FXD_FLTR_QW0_TO_Q_EQUALS_QINDEX 0x0ULL 141 142 #define ICE_FXD_FLTR_QW0_TO_Q_PRI_S 35 143 #define ICE_FXD_FLTR_QW0_TO_Q_PRI_M (0x7ULL << ICE_FXD_FLTR_QW0_TO_Q_PRI_S) 144 #define ICE_FXD_FLTR_QW0_TO_Q_PRIO1 0x1ULL 145 146 #define ICE_FXD_FLTR_QW0_DPU_RECIPE_S 38 147 #define ICE_FXD_FLTR_QW0_DPU_RECIPE_M \ 148 (0x3ULL << ICE_FXD_FLTR_QW0_DPU_RECIPE_S) 149 #define ICE_FXD_FLTR_QW0_DPU_RECIPE_DFLT 0x0ULL 150 151 #define ICE_FXD_FLTR_QW0_DROP_S 40 152 #define ICE_FXD_FLTR_QW0_DROP_M BIT_ULL(ICE_FXD_FLTR_QW0_DROP_S) 153 #define ICE_FXD_FLTR_QW0_DROP_NO 0x0ULL 154 #define ICE_FXD_FLTR_QW0_DROP_YES 0x1ULL 155 156 #define ICE_FXD_FLTR_QW0_FLEX_PRI_S 41 157 #define ICE_FXD_FLTR_QW0_FLEX_PRI_M (0x7ULL << ICE_FXD_FLTR_QW0_FLEX_PRI_S) 158 #define ICE_FXD_FLTR_QW0_FLEX_PRI_NONE 0x0ULL 159 160 #define ICE_FXD_FLTR_QW0_FLEX_MDID_S 44 161 #define ICE_FXD_FLTR_QW0_FLEX_MDID_M (0xFULL << ICE_FXD_FLTR_QW0_FLEX_MDID_S) 162 #define ICE_FXD_FLTR_QW0_FLEX_MDID0 0x0ULL 163 164 #define ICE_FXD_FLTR_QW0_FLEX_VAL_S 48 165 #define ICE_FXD_FLTR_QW0_FLEX_VAL_M \ 166 (0xFFFFULL << ICE_FXD_FLTR_QW0_FLEX_VAL_S) 167 #define ICE_FXD_FLTR_QW0_FLEX_VAL0 0x0ULL 168 169 #define ICE_FXD_FLTR_QW1_DTYPE_S 0 170 #define ICE_FXD_FLTR_QW1_DTYPE_M (0xFULL << ICE_FXD_FLTR_QW1_DTYPE_S) 171 #define ICE_FXD_FLTR_QW1_PCMD_S 4 172 #define ICE_FXD_FLTR_QW1_PCMD_M BIT_ULL(ICE_FXD_FLTR_QW1_PCMD_S) 173 #define ICE_FXD_FLTR_QW1_PCMD_ADD 0x0ULL 174 #define ICE_FXD_FLTR_QW1_PCMD_REMOVE 0x1ULL 175 176 #define ICE_FXD_FLTR_QW1_PROF_PRI_S 5 177 #define ICE_FXD_FLTR_QW1_PROF_PRI_M (0x7ULL << ICE_FXD_FLTR_QW1_PROF_PRI_S) 178 #define ICE_FXD_FLTR_QW1_PROF_PRIO_ZERO 0x0ULL 179 180 #define ICE_FXD_FLTR_QW1_PROF_S 8 181 #define ICE_FXD_FLTR_QW1_PROF_M (0x3FULL << ICE_FXD_FLTR_QW1_PROF_S) 182 #define ICE_FXD_FLTR_QW1_PROF_ZERO 0x0ULL 183 184 #define ICE_FXD_FLTR_QW1_FD_VSI_S 14 185 #define ICE_FXD_FLTR_QW1_FD_VSI_M (0x3FFULL << ICE_FXD_FLTR_QW1_FD_VSI_S) 186 #define ICE_FXD_FLTR_QW1_SWAP_S 24 187 #define ICE_FXD_FLTR_QW1_SWAP_M BIT_ULL(ICE_FXD_FLTR_QW1_SWAP_S) 188 #define ICE_FXD_FLTR_QW1_SWAP_NOT_SET 0x0ULL 189 #define ICE_FXD_FLTR_QW1_SWAP_SET 0x1ULL 190 191 #define ICE_FXD_FLTR_QW1_FDID_PRI_S 25 192 #define ICE_FXD_FLTR_QW1_FDID_PRI_M (0x7ULL << ICE_FXD_FLTR_QW1_FDID_PRI_S) 193 #define ICE_FXD_FLTR_QW1_FDID_PRI_ONE 0x1ULL 194 195 #define ICE_FXD_FLTR_QW1_FDID_MDID_S 28 196 #define ICE_FXD_FLTR_QW1_FDID_MDID_M (0xFULL << ICE_FXD_FLTR_QW1_FDID_MDID_S) 197 #define ICE_FXD_FLTR_QW1_FDID_MDID_FD 0x05ULL 198 199 #define ICE_FXD_FLTR_QW1_FDID_S 32 200 #define ICE_FXD_FLTR_QW1_FDID_M \ 201 (0xFFFFFFFFULL << ICE_FXD_FLTR_QW1_FDID_S) 202 #define ICE_FXD_FLTR_QW1_FDID_ZERO 0x0ULL 203 204 enum ice_rx_desc_status_bits { 205 /* Note: These are predefined bit offsets */ 206 ICE_RX_DESC_STATUS_DD_S = 0, 207 ICE_RX_DESC_STATUS_EOF_S = 1, 208 ICE_RX_DESC_STATUS_L2TAG1P_S = 2, 209 ICE_RX_DESC_STATUS_L3L4P_S = 3, 210 ICE_RX_DESC_STATUS_CRCP_S = 4, 211 ICE_RX_DESC_STATUS_TSYNINDX_S = 5, 212 ICE_RX_DESC_STATUS_TSYNVALID_S = 7, 213 ICE_RX_DESC_STATUS_EXT_UDP_0_S = 8, 214 ICE_RX_DESC_STATUS_UMBCAST_S = 9, 215 ICE_RX_DESC_STATUS_FLM_S = 11, 216 ICE_RX_DESC_STATUS_FLTSTAT_S = 12, 217 ICE_RX_DESC_STATUS_LPBK_S = 14, 218 ICE_RX_DESC_STATUS_IPV6EXADD_S = 15, 219 ICE_RX_DESC_STATUS_RESERVED2_S = 16, 220 ICE_RX_DESC_STATUS_INT_UDP_0_S = 18, 221 ICE_RX_DESC_STATUS_LAST /* this entry must be last!!! */ 222 }; 223 224 #define ICE_RXD_QW1_STATUS_S 0 225 #define ICE_RXD_QW1_STATUS_M ((BIT(ICE_RX_DESC_STATUS_LAST) - 1) << \ 226 ICE_RXD_QW1_STATUS_S) 227 228 #define ICE_RXD_QW1_STATUS_TSYNINDX_S ICE_RX_DESC_STATUS_TSYNINDX_S 229 #define ICE_RXD_QW1_STATUS_TSYNINDX_M (0x3UL << ICE_RXD_QW1_STATUS_TSYNINDX_S) 230 231 #define ICE_RXD_QW1_STATUS_TSYNVALID_S ICE_RX_DESC_STATUS_TSYNVALID_S 232 #define ICE_RXD_QW1_STATUS_TSYNVALID_M BIT_ULL(ICE_RXD_QW1_STATUS_TSYNVALID_S) 233 234 enum ice_rx_desc_fltstat_values { 235 ICE_RX_DESC_FLTSTAT_NO_DATA = 0, 236 ICE_RX_DESC_FLTSTAT_RSV_FD_ID = 1, /* 16byte desc? FD_ID : RSV */ 237 ICE_RX_DESC_FLTSTAT_RSV = 2, 238 ICE_RX_DESC_FLTSTAT_RSS_HASH = 3, 239 }; 240 241 #define ICE_RXD_QW1_ERROR_S 19 242 #define ICE_RXD_QW1_ERROR_M (0xFFUL << ICE_RXD_QW1_ERROR_S) 243 244 enum ice_rx_desc_error_bits { 245 /* Note: These are predefined bit offsets */ 246 ICE_RX_DESC_ERROR_RXE_S = 0, 247 ICE_RX_DESC_ERROR_RECIPE_S = 1, 248 ICE_RX_DESC_ERROR_HBO_S = 2, 249 ICE_RX_DESC_ERROR_L3L4E_S = 3, /* 3 BITS */ 250 ICE_RX_DESC_ERROR_IPE_S = 3, 251 ICE_RX_DESC_ERROR_L4E_S = 4, 252 ICE_RX_DESC_ERROR_EIPE_S = 5, 253 ICE_RX_DESC_ERROR_OVERSIZE_S = 6, 254 ICE_RX_DESC_ERROR_PPRS_S = 7 255 }; 256 257 enum ice_rx_desc_error_l3l4e_masks { 258 ICE_RX_DESC_ERROR_L3L4E_NONE = 0, 259 ICE_RX_DESC_ERROR_L3L4E_PROT = 1, 260 }; 261 262 #define ICE_RXD_QW1_PTYPE_S 30 263 #define ICE_RXD_QW1_PTYPE_M (0xFFULL << ICE_RXD_QW1_PTYPE_S) 264 265 /* Packet type non-ip values */ 266 enum ice_rx_l2_ptype { 267 ICE_RX_PTYPE_L2_RESERVED = 0, 268 ICE_RX_PTYPE_L2_MAC_PAY2 = 1, 269 ICE_RX_PTYPE_L2_FIP_PAY2 = 3, 270 ICE_RX_PTYPE_L2_OUI_PAY2 = 4, 271 ICE_RX_PTYPE_L2_MACCNTRL_PAY2 = 5, 272 ICE_RX_PTYPE_L2_LLDP_PAY2 = 6, 273 ICE_RX_PTYPE_L2_ECP_PAY2 = 7, 274 ICE_RX_PTYPE_L2_EVB_PAY2 = 8, 275 ICE_RX_PTYPE_L2_QCN_PAY2 = 9, 276 ICE_RX_PTYPE_L2_EAPOL_PAY2 = 10, 277 ICE_RX_PTYPE_L2_ARP = 11, 278 }; 279 280 struct ice_rx_ptype_decoded { 281 u32 ptype:10; 282 u32 known:1; 283 u32 outer_ip:1; 284 u32 outer_ip_ver:2; 285 u32 outer_frag:1; 286 u32 tunnel_type:3; 287 u32 tunnel_end_prot:2; 288 u32 tunnel_end_frag:1; 289 u32 inner_prot:4; 290 u32 payload_layer:3; 291 }; 292 293 enum ice_rx_ptype_outer_ip { 294 ICE_RX_PTYPE_OUTER_L2 = 0, 295 ICE_RX_PTYPE_OUTER_IP = 1, 296 }; 297 298 enum ice_rx_ptype_outer_ip_ver { 299 ICE_RX_PTYPE_OUTER_NONE = 0, 300 ICE_RX_PTYPE_OUTER_IPV4 = 1, 301 ICE_RX_PTYPE_OUTER_IPV6 = 2, 302 }; 303 304 enum ice_rx_ptype_outer_fragmented { 305 ICE_RX_PTYPE_NOT_FRAG = 0, 306 ICE_RX_PTYPE_FRAG = 1, 307 }; 308 309 enum ice_rx_ptype_tunnel_type { 310 ICE_RX_PTYPE_TUNNEL_NONE = 0, 311 ICE_RX_PTYPE_TUNNEL_IP_IP = 1, 312 ICE_RX_PTYPE_TUNNEL_IP_GRENAT = 2, 313 ICE_RX_PTYPE_TUNNEL_IP_GRENAT_MAC = 3, 314 ICE_RX_PTYPE_TUNNEL_IP_GRENAT_MAC_VLAN = 4, 315 }; 316 317 enum ice_rx_ptype_tunnel_end_prot { 318 ICE_RX_PTYPE_TUNNEL_END_NONE = 0, 319 ICE_RX_PTYPE_TUNNEL_END_IPV4 = 1, 320 ICE_RX_PTYPE_TUNNEL_END_IPV6 = 2, 321 }; 322 323 enum ice_rx_ptype_inner_prot { 324 ICE_RX_PTYPE_INNER_PROT_NONE = 0, 325 ICE_RX_PTYPE_INNER_PROT_UDP = 1, 326 ICE_RX_PTYPE_INNER_PROT_TCP = 2, 327 ICE_RX_PTYPE_INNER_PROT_SCTP = 3, 328 ICE_RX_PTYPE_INNER_PROT_ICMP = 4, 329 }; 330 331 enum ice_rx_ptype_payload_layer { 332 ICE_RX_PTYPE_PAYLOAD_LAYER_NONE = 0, 333 ICE_RX_PTYPE_PAYLOAD_LAYER_PAY2 = 1, 334 ICE_RX_PTYPE_PAYLOAD_LAYER_PAY3 = 2, 335 ICE_RX_PTYPE_PAYLOAD_LAYER_PAY4 = 3, 336 }; 337 338 #define ICE_RXD_QW1_LEN_PBUF_S 38 339 #define ICE_RXD_QW1_LEN_PBUF_M (0x3FFFULL << ICE_RXD_QW1_LEN_PBUF_S) 340 341 #define ICE_RXD_QW1_LEN_HBUF_S 52 342 #define ICE_RXD_QW1_LEN_HBUF_M (0x7FFULL << ICE_RXD_QW1_LEN_HBUF_S) 343 344 #define ICE_RXD_QW1_LEN_SPH_S 63 345 #define ICE_RXD_QW1_LEN_SPH_M BIT_ULL(ICE_RXD_QW1_LEN_SPH_S) 346 347 enum ice_rx_desc_ext_status_bits { 348 /* Note: These are predefined bit offsets */ 349 ICE_RX_DESC_EXT_STATUS_L2TAG2P_S = 0, 350 ICE_RX_DESC_EXT_STATUS_L2TAG3P_S = 1, 351 ICE_RX_DESC_EXT_STATUS_FLEXBL_S = 2, 352 ICE_RX_DESC_EXT_STATUS_FLEXBH_S = 4, 353 ICE_RX_DESC_EXT_STATUS_FDLONGB_S = 9, 354 ICE_RX_DESC_EXT_STATUS_PELONGB_S = 11, 355 }; 356 357 enum ice_rx_desc_pe_status_bits { 358 /* Note: These are predefined bit offsets */ 359 ICE_RX_DESC_PE_STATUS_QPID_S = 0, /* 18 BITS */ 360 ICE_RX_DESC_PE_STATUS_L4PORT_S = 0, /* 16 BITS */ 361 ICE_RX_DESC_PE_STATUS_IPINDEX_S = 16, /* 8 BITS */ 362 ICE_RX_DESC_PE_STATUS_QPIDHIT_S = 24, 363 ICE_RX_DESC_PE_STATUS_APBVTHIT_S = 25, 364 ICE_RX_DESC_PE_STATUS_PORTV_S = 26, 365 ICE_RX_DESC_PE_STATUS_URG_S = 27, 366 ICE_RX_DESC_PE_STATUS_IPFRAG_S = 28, 367 ICE_RX_DESC_PE_STATUS_IPOPT_S = 29 368 }; 369 370 #define ICE_RX_PROG_STATUS_DESC_LEN_S 38 371 #define ICE_RX_PROG_STATUS_DESC_LEN 0x2000000 372 373 #define ICE_RX_PROG_STATUS_DESC_QW1_PROGID_S 2 374 #define ICE_RX_PROG_STATUS_DESC_QW1_PROGID_M \ 375 (0x7UL << ICE_RX_PROG_STATUS_DESC_QW1_PROGID_S) 376 377 #define ICE_RX_PROG_STATUS_DESC_QW1_ERROR_S 19 378 #define ICE_RX_PROG_STATUS_DESC_QW1_ERROR_M \ 379 (0x3FUL << ICE_RX_PROG_STATUS_DESC_QW1_ERROR_S) 380 381 enum ice_rx_prog_status_desc_status_bits { 382 /* Note: These are predefined bit offsets */ 383 ICE_RX_PROG_STATUS_DESC_DD_S = 0, 384 ICE_RX_PROG_STATUS_DESC_PROG_ID_S = 2 /* 3 BITS */ 385 }; 386 387 enum ice_rx_prog_status_desc_prog_id_masks { 388 ICE_RX_PROG_STATUS_DESC_FD_FLTR_STATUS = 1, 389 }; 390 391 enum ice_rx_prog_status_desc_error_bits { 392 /* Note: These are predefined bit offsets */ 393 ICE_RX_PROG_STATUS_DESC_FD_TBL_FULL_S = 0, 394 ICE_RX_PROG_STATUS_DESC_NO_FD_ENTRY_S = 1, 395 }; 396 397 /* Rx Flex Descriptors 398 * These descriptors are used instead of the legacy version descriptors when 399 * ice_rlan_ctx.adv_desc is set 400 */ 401 402 union ice_32b_rx_flex_desc { 403 struct { 404 __le64 pkt_addr; /* Packet buffer address */ 405 __le64 hdr_addr; /* Header buffer address */ 406 /* bit 0 of hdr_addr is DD bit */ 407 __le64 rsvd1; 408 __le64 rsvd2; 409 } read; 410 struct { 411 /* Qword 0 */ 412 u8 rxdid; /* descriptor builder profile ID */ 413 u8 mir_id_umb_cast; /* mirror=[5:0], umb=[7:6] */ 414 __le16 ptype_flex_flags0; /* ptype=[9:0], ff0=[15:10] */ 415 __le16 pkt_len; /* [15:14] are reserved */ 416 __le16 hdr_len_sph_flex_flags1; /* header=[10:0] */ 417 /* sph=[11:11] */ 418 /* ff1/ext=[15:12] */ 419 420 /* Qword 1 */ 421 __le16 status_error0; 422 __le16 l2tag1; 423 __le16 flex_meta0; 424 __le16 flex_meta1; 425 426 /* Qword 2 */ 427 __le16 status_error1; 428 u8 flex_flags2; 429 u8 time_stamp_low; 430 __le16 l2tag2_1st; 431 __le16 l2tag2_2nd; 432 433 /* Qword 3 */ 434 __le16 flex_meta2; 435 __le16 flex_meta3; 436 union { 437 struct { 438 __le16 flex_meta4; 439 __le16 flex_meta5; 440 } flex; 441 __le32 ts_high; 442 } flex_ts; 443 } wb; /* writeback */ 444 }; 445 446 /* Rx Flex Descriptor NIC Profile 447 * RxDID Profile ID 2 448 * Flex-field 0: RSS hash lower 16-bits 449 * Flex-field 1: RSS hash upper 16-bits 450 * Flex-field 2: Flow ID lower 16-bits 451 * Flex-field 3: Flow ID higher 16-bits 452 * Flex-field 4: reserved, VLAN ID taken from L2Tag 453 */ 454 struct ice_32b_rx_flex_desc_nic { 455 /* Qword 0 */ 456 u8 rxdid; 457 u8 mir_id_umb_cast; 458 __le16 ptype_flexi_flags0; 459 __le16 pkt_len; 460 __le16 hdr_len_sph_flex_flags1; 461 462 /* Qword 1 */ 463 __le16 status_error0; 464 __le16 l2tag1; 465 __le32 rss_hash; 466 467 /* Qword 2 */ 468 __le16 status_error1; 469 u8 flexi_flags2; 470 u8 ts_low; 471 __le16 l2tag2_1st; 472 __le16 l2tag2_2nd; 473 474 /* Qword 3 */ 475 __le32 flow_id; 476 union { 477 struct { 478 __le16 rsvd; 479 __le16 flow_id_ipv6; 480 } flex; 481 __le32 ts_high; 482 } flex_ts; 483 }; 484 485 /* Rx Flex Descriptor Switch Profile 486 * RxDID Profile ID 3 487 * Flex-field 0: Source VSI 488 */ 489 struct ice_32b_rx_flex_desc_sw { 490 /* Qword 0 */ 491 u8 rxdid; 492 u8 mir_id_umb_cast; 493 __le16 ptype_flexi_flags0; 494 __le16 pkt_len; 495 __le16 hdr_len_sph_flex_flags1; 496 497 /* Qword 1 */ 498 __le16 status_error0; 499 __le16 l2tag1; 500 __le16 src_vsi; /* [10:15] are reserved */ 501 __le16 flex_md1_rsvd; 502 503 /* Qword 2 */ 504 __le16 status_error1; 505 u8 flex_flags2; 506 u8 ts_low; 507 __le16 l2tag2_1st; 508 __le16 l2tag2_2nd; 509 510 /* Qword 3 */ 511 __le32 rsvd; /* flex words 2-3 are reserved */ 512 __le32 ts_high; 513 }; 514 515 /* Rx Flex Descriptor NIC VEB Profile 516 * RxDID Profile ID 4 517 * Flex-field 0: Destination VSI 518 */ 519 struct ice_32b_rx_flex_desc_nic_veb_dbg { 520 /* Qword 0 */ 521 u8 rxdid; 522 u8 mir_id_umb_cast; 523 __le16 ptype_flexi_flags0; 524 __le16 pkt_len; 525 __le16 hdr_len_sph_flex_flags1; 526 527 /* Qword 1 */ 528 __le16 status_error0; 529 __le16 l2tag1; 530 __le16 dst_vsi; /* [0:12]: destination VSI */ 531 /* 13: VSI valid bit */ 532 /* [14:15] are reserved */ 533 __le16 flex_field_1; 534 535 /* Qword 2 */ 536 __le16 status_error1; 537 u8 flex_flags2; 538 u8 ts_low; 539 __le16 l2tag2_1st; 540 __le16 l2tag2_2nd; 541 542 /* Qword 3 */ 543 __le32 rsvd; /* flex words 2-3 are reserved */ 544 __le32 ts_high; 545 }; 546 547 /* Rx Flex Descriptor NIC ACL Profile 548 * RxDID Profile ID 5 549 * Flex-field 0: ACL Counter 0 550 * Flex-field 1: ACL Counter 1 551 * Flex-field 2: ACL Counter 2 552 */ 553 struct ice_32b_rx_flex_desc_nic_acl_dbg { 554 /* Qword 0 */ 555 u8 rxdid; 556 u8 mir_id_umb_cast; 557 __le16 ptype_flexi_flags0; 558 __le16 pkt_len; 559 __le16 hdr_len_sph_flex_flags1; 560 561 /* Qword 1 */ 562 __le16 status_error0; 563 __le16 l2tag1; 564 __le16 acl_ctr0; 565 __le16 acl_ctr1; 566 567 /* Qword 2 */ 568 __le16 status_error1; 569 u8 flex_flags2; 570 u8 ts_low; 571 __le16 l2tag2_1st; 572 __le16 l2tag2_2nd; 573 574 /* Qword 3 */ 575 __le16 acl_ctr2; 576 __le16 rsvd; /* flex words 2-3 are reserved */ 577 __le32 ts_high; 578 }; 579 580 /* Rx Flex Descriptor NIC Profile 581 * RxDID Profile ID 6 582 * Flex-field 0: RSS hash lower 16-bits 583 * Flex-field 1: RSS hash upper 16-bits 584 * Flex-field 2: Flow ID lower 16-bits 585 * Flex-field 3: Source VSI 586 * Flex-field 4: reserved, VLAN ID taken from L2Tag 587 */ 588 struct ice_32b_rx_flex_desc_nic_2 { 589 /* Qword 0 */ 590 u8 rxdid; 591 u8 mir_id_umb_cast; 592 __le16 ptype_flexi_flags0; 593 __le16 pkt_len; 594 __le16 hdr_len_sph_flex_flags1; 595 596 /* Qword 1 */ 597 __le16 status_error0; 598 __le16 l2tag1; 599 __le32 rss_hash; 600 601 /* Qword 2 */ 602 __le16 status_error1; 603 u8 flexi_flags2; 604 u8 ts_low; 605 __le16 l2tag2_1st; 606 __le16 l2tag2_2nd; 607 608 /* Qword 3 */ 609 __le16 flow_id; 610 __le16 src_vsi; 611 union { 612 struct { 613 __le16 rsvd; 614 __le16 flow_id_ipv6; 615 } flex; 616 __le32 ts_high; 617 } flex_ts; 618 }; 619 620 /* Receive Flex Descriptor profile IDs: There are a total 621 * of 64 profiles where profile IDs 0/1 are for legacy; and 622 * profiles 2-63 are flex profiles that can be programmed 623 * with a specific metadata (profile 7 reserved for HW) 624 */ 625 enum ice_rxdid { 626 ICE_RXDID_LEGACY_0 = 0, 627 ICE_RXDID_LEGACY_1 = 1, 628 ICE_RXDID_FLEX_NIC = 2, 629 ICE_RXDID_FLEX_NIC_2 = 6, 630 ICE_RXDID_HW = 7, 631 ICE_RXDID_LAST = 63, 632 }; 633 634 /* Recceive Flex descriptor Dword Index */ 635 enum ice_flex_word { 636 ICE_RX_FLEX_DWORD_0 = 0, 637 ICE_RX_FLEX_DWORD_1, 638 ICE_RX_FLEX_DWORD_2, 639 ICE_RX_FLEX_DWORD_3, 640 ICE_RX_FLEX_DWORD_4, 641 ICE_RX_FLEX_DWORD_5 642 }; 643 644 /* Receive Flex Descriptor Rx opcode values */ 645 enum ice_flex_opcode { 646 ICE_RX_OPC_DEBUG = 0, 647 ICE_RX_OPC_MDID, 648 ICE_RX_OPC_EXTRACT, 649 ICE_RX_OPC_PROTID 650 }; 651 652 /* Receive Descriptor MDID values that access packet flags */ 653 enum ice_flex_mdid_pkt_flags { 654 ICE_RX_MDID_PKT_FLAGS_15_0 = 20, 655 ICE_RX_MDID_PKT_FLAGS_31_16, 656 ICE_RX_MDID_PKT_FLAGS_47_32, 657 ICE_RX_MDID_PKT_FLAGS_63_48, 658 }; 659 660 /* Generic descriptor MDID values */ 661 enum ice_flex_mdid { 662 ICE_MDID_GENERIC_WORD_0, 663 ICE_MDID_GENERIC_WORD_1, 664 ICE_MDID_GENERIC_WORD_2, 665 ICE_MDID_GENERIC_WORD_3, 666 ICE_MDID_GENERIC_WORD_4, 667 ICE_MDID_FLOW_ID_LOWER, 668 ICE_MDID_FLOW_ID_HIGH, 669 ICE_MDID_RX_DESCR_PROF_IDX, 670 ICE_MDID_RX_PKT_DROP, 671 ICE_MDID_RX_DST_Q = 12, 672 ICE_MDID_RX_DST_VSI, 673 ICE_MDID_SRC_VSI = 19, 674 ICE_MDID_ACL_NOP = 55, 675 /* Entry 56 */ 676 ICE_MDID_RX_HASH_LOW, 677 ICE_MDID_ACL_CNTR_PKT = ICE_MDID_RX_HASH_LOW, 678 /* Entry 57 */ 679 ICE_MDID_RX_HASH_HIGH, 680 ICE_MDID_ACL_CNTR_BYTES = ICE_MDID_RX_HASH_HIGH, 681 ICE_MDID_ACL_CNTR_PKT_BYTES 682 }; 683 684 /* for ice_32byte_rx_flex_desc.mir_id_umb_cast member */ 685 #define ICE_RX_FLEX_DESC_MIRROR_M (0x3F) /* 6-bits */ 686 687 /* Rx/Tx Flag64 packet flag bits */ 688 enum ice_flg64_bits { 689 ICE_FLG_PKT_DSI = 0, 690 /* If there is a 1 in this bit position then that means Rx packet */ 691 ICE_FLG_PKT_DIR = 4, 692 ICE_FLG_EVLAN_x8100 = 14, 693 ICE_FLG_EVLAN_x9100, 694 ICE_FLG_VLAN_x8100, 695 ICE_FLG_TNL_MAC = 22, 696 ICE_FLG_TNL_VLAN, 697 ICE_FLG_PKT_FRG, 698 ICE_FLG_FIN = 32, 699 ICE_FLG_SYN, 700 ICE_FLG_RST, 701 ICE_FLG_TNL0 = 38, 702 ICE_FLG_TNL1, 703 ICE_FLG_TNL2, 704 ICE_FLG_UDP_GRE, 705 ICE_FLG_RSVD = 63 706 }; 707 708 enum ice_rx_flex_desc_umb_cast_bits { /* field is 2 bits long */ 709 ICE_RX_FLEX_DESC_UMB_CAST_S = 6, 710 ICE_RX_FLEX_DESC_UMB_CAST_LAST /* this entry must be last!!! */ 711 }; 712 713 enum ice_umbcast_dest_addr_types { 714 ICE_DEST_UNICAST = 0, 715 ICE_DEST_MULTICAST, 716 ICE_DEST_BROADCAST, 717 ICE_DEST_MIRRORED, 718 }; 719 720 /* for ice_32byte_rx_flex_desc.ptype_flexi_flags0 member */ 721 #define ICE_RX_FLEX_DESC_PTYPE_M (0x3FF) /* 10-bits */ 722 723 enum ice_rx_flex_desc_flexi_flags0_bits { /* field is 6 bits long */ 724 ICE_RX_FLEX_DESC_FLEXI_FLAGS0_S = 10, 725 ICE_RX_FLEX_DESC_FLEXI_FLAGS0_LAST /* this entry must be last!!! */ 726 }; 727 728 /* for ice_32byte_rx_flex_desc.pkt_length member */ 729 #define ICE_RX_FLX_DESC_PKT_LEN_M (0x3FFF) /* 14-bits */ 730 731 /* for ice_32byte_rx_flex_desc.header_length_sph_flexi_flags1 member */ 732 #define ICE_RX_FLEX_DESC_HEADER_LEN_M (0x7FF) /* 11-bits */ 733 734 enum ice_rx_flex_desc_sph_bits { /* field is 1 bit long */ 735 ICE_RX_FLEX_DESC_SPH_S = 11, 736 ICE_RX_FLEX_DESC_SPH_LAST /* this entry must be last!!! */ 737 }; 738 739 enum ice_rx_flex_desc_flexi_flags1_bits { /* field is 4 bits long */ 740 ICE_RX_FLEX_DESC_FLEXI_FLAGS1_S = 12, 741 ICE_RX_FLEX_DESC_FLEXI_FLAGS1_LAST /* this entry must be last!!! */ 742 }; 743 744 enum ice_rx_flex_desc_ext_status_bits { /* field is 4 bits long */ 745 ICE_RX_FLEX_DESC_EXT_STATUS_EXT_UDP_S = 12, 746 ICE_RX_FLEX_DESC_EXT_STATUS_INT_UDP_S = 13, 747 ICE_RX_FLEX_DESC_EXT_STATUS_RECIPE_S = 14, 748 ICE_RX_FLEX_DESC_EXT_STATUS_OVERSIZE_S = 15, 749 ICE_RX_FLEX_DESC_EXT_STATUS_LAST /* entry must be last!!! */ 750 }; 751 752 enum ice_rx_flex_desc_status_error_0_bits { 753 /* Note: These are predefined bit offsets */ 754 ICE_RX_FLEX_DESC_STATUS0_DD_S = 0, 755 ICE_RX_FLEX_DESC_STATUS0_EOF_S, 756 ICE_RX_FLEX_DESC_STATUS0_HBO_S, 757 ICE_RX_FLEX_DESC_STATUS0_L3L4P_S, 758 ICE_RX_FLEX_DESC_STATUS0_XSUM_IPE_S, 759 ICE_RX_FLEX_DESC_STATUS0_XSUM_L4E_S, 760 ICE_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S, 761 ICE_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S, 762 ICE_RX_FLEX_DESC_STATUS0_LPBK_S, 763 ICE_RX_FLEX_DESC_STATUS0_IPV6EXADD_S, 764 ICE_RX_FLEX_DESC_STATUS0_RXE_S, 765 ICE_RX_FLEX_DESC_STATUS0_CRCP_S, 766 ICE_RX_FLEX_DESC_STATUS0_RSS_VALID_S, 767 ICE_RX_FLEX_DESC_STATUS0_L2TAG1P_S, 768 ICE_RX_FLEX_DESC_STATUS0_XTRMD0_VALID_S, 769 ICE_RX_FLEX_DESC_STATUS0_XTRMD1_VALID_S, 770 ICE_RX_FLEX_DESC_STATUS0_LAST /* this entry must be last!!! */ 771 }; 772 773 enum ice_rx_flex_desc_status_error_1_bits { 774 /* Note: These are predefined bit offsets */ 775 ICE_RX_FLEX_DESC_STATUS1_CPM_S = 0, /* 4 bits */ 776 ICE_RX_FLEX_DESC_STATUS1_NAT_S = 4, 777 ICE_RX_FLEX_DESC_STATUS1_CRYPTO_S = 5, 778 /* [10:6] reserved */ 779 ICE_RX_FLEX_DESC_STATUS1_L2TAG2P_S = 11, 780 ICE_RX_FLEX_DESC_STATUS1_XTRMD2_VALID_S = 12, 781 ICE_RX_FLEX_DESC_STATUS1_XTRMD3_VALID_S = 13, 782 ICE_RX_FLEX_DESC_STATUS1_XTRMD4_VALID_S = 14, 783 ICE_RX_FLEX_DESC_STATUS1_XTRMD5_VALID_S = 15, 784 ICE_RX_FLEX_DESC_STATUS1_LAST /* this entry must be last!!! */ 785 }; 786 787 enum ice_rx_flex_desc_exstat_bits { 788 /* Note: These are predefined bit offsets */ 789 ICE_RX_FLEX_DESC_EXSTAT_EXTUDP_S = 0, 790 ICE_RX_FLEX_DESC_EXSTAT_INTUDP_S = 1, 791 ICE_RX_FLEX_DESC_EXSTAT_RECIPE_S = 2, 792 ICE_RX_FLEX_DESC_EXSTAT_OVERSIZE_S = 3, 793 }; 794 795 #define ICE_RXQ_CTX_SIZE_DWORDS 8 796 #define ICE_RXQ_CTX_SZ (ICE_RXQ_CTX_SIZE_DWORDS * sizeof(u32)) 797 #define ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS 22 798 #define ICE_TX_DRBELL_Q_CTX_SIZE_DWORDS 5 799 #define GLTCLAN_CQ_CNTX(i, CQ) (GLTCLAN_CQ_CNTX0(CQ) + ((i) * 0x0800)) 800 801 /* RLAN Rx queue context data 802 * 803 * The sizes of the variables may be larger than needed due to crossing byte 804 * boundaries. If we do not have the width of the variable set to the correct 805 * size then we could end up shifting bits off the top of the variable when the 806 * variable is at the top of a byte and crosses over into the next byte. 807 */ 808 struct ice_rlan_ctx { 809 u16 head; 810 u16 cpuid; /* bigger than needed, see above for reason */ 811 #define ICE_RLAN_BASE_S 7 812 u64 base; 813 u16 qlen; 814 #define ICE_RLAN_CTX_DBUF_S 7 815 u16 dbuf; /* bigger than needed, see above for reason */ 816 #define ICE_RLAN_CTX_HBUF_S 6 817 u16 hbuf; /* bigger than needed, see above for reason */ 818 u8 dtype; 819 u8 dsize; 820 u8 crcstrip; 821 u8 l2tsel; 822 u8 hsplit_0; 823 u8 hsplit_1; 824 u8 showiv; 825 u32 rxmax; /* bigger than needed, see above for reason */ 826 u8 tphrdesc_ena; 827 u8 tphwdesc_ena; 828 u8 tphdata_ena; 829 u8 tphhead_ena; 830 u16 lrxqthresh; /* bigger than needed, see above for reason */ 831 u8 prefena; /* NOTE: normally must be set to 1 at init */ 832 }; 833 834 struct ice_ctx_ele { 835 u16 offset; 836 u16 size_of; 837 u16 width; 838 u16 lsb; 839 }; 840 841 #define ICE_CTX_STORE(_struct, _ele, _width, _lsb) { \ 842 .offset = offsetof(struct _struct, _ele), \ 843 .size_of = FIELD_SIZEOF(struct _struct, _ele), \ 844 .width = _width, \ 845 .lsb = _lsb, \ 846 } 847 848 /* for hsplit_0 field of Rx RLAN context */ 849 enum ice_rlan_ctx_rx_hsplit_0 { 850 ICE_RLAN_RX_HSPLIT_0_NO_SPLIT = 0, 851 ICE_RLAN_RX_HSPLIT_0_SPLIT_L2 = 1, 852 ICE_RLAN_RX_HSPLIT_0_SPLIT_IP = 2, 853 ICE_RLAN_RX_HSPLIT_0_SPLIT_TCP_UDP = 4, 854 ICE_RLAN_RX_HSPLIT_0_SPLIT_SCTP = 8, 855 }; 856 857 /* for hsplit_1 field of Rx RLAN context */ 858 enum ice_rlan_ctx_rx_hsplit_1 { 859 ICE_RLAN_RX_HSPLIT_1_NO_SPLIT = 0, 860 ICE_RLAN_RX_HSPLIT_1_SPLIT_L2 = 1, 861 ICE_RLAN_RX_HSPLIT_1_SPLIT_ALWAYS = 2, 862 }; 863 864 /* Tx Descriptor */ 865 struct ice_tx_desc { 866 __le64 buf_addr; /* Address of descriptor's data buf */ 867 __le64 cmd_type_offset_bsz; 868 }; 869 870 #define ICE_TXD_QW1_DTYPE_S 0 871 #define ICE_TXD_QW1_DTYPE_M (0xFUL << ICE_TXD_QW1_DTYPE_S) 872 873 enum ice_tx_desc_dtype_value { 874 ICE_TX_DESC_DTYPE_DATA = 0x0, 875 ICE_TX_DESC_DTYPE_CTX = 0x1, 876 ICE_TX_DESC_DTYPE_IPSEC = 0x3, 877 ICE_TX_DESC_DTYPE_FLTR_PROG = 0x8, 878 ICE_TX_DESC_DTYPE_HLP_META = 0x9, 879 /* DESC_DONE - HW has completed write-back of descriptor */ 880 ICE_TX_DESC_DTYPE_DESC_DONE = 0xF, 881 }; 882 883 #define ICE_TXD_QW1_CMD_S 4 884 #define ICE_TXD_QW1_CMD_M (0xFFFUL << ICE_TXD_QW1_CMD_S) 885 886 enum ice_tx_desc_cmd_bits { 887 ICE_TX_DESC_CMD_EOP = 0x0001, 888 ICE_TX_DESC_CMD_RS = 0x0002, 889 ICE_TX_DESC_CMD_RSVD = 0x0004, 890 ICE_TX_DESC_CMD_IL2TAG1 = 0x0008, 891 ICE_TX_DESC_CMD_DUMMY = 0x0010, 892 ICE_TX_DESC_CMD_IIPT_NONIP = 0x0000, 893 ICE_TX_DESC_CMD_IIPT_IPV6 = 0x0020, 894 ICE_TX_DESC_CMD_IIPT_IPV4 = 0x0040, 895 ICE_TX_DESC_CMD_IIPT_IPV4_CSUM = 0x0060, 896 ICE_TX_DESC_CMD_RSVD2 = 0x0080, 897 ICE_TX_DESC_CMD_L4T_EOFT_UNK = 0x0000, 898 ICE_TX_DESC_CMD_L4T_EOFT_TCP = 0x0100, 899 ICE_TX_DESC_CMD_L4T_EOFT_SCTP = 0x0200, 900 ICE_TX_DESC_CMD_L4T_EOFT_UDP = 0x0300, 901 ICE_TX_DESC_CMD_RE = 0x0400, 902 ICE_TX_DESC_CMD_RSVD3 = 0x0800, 903 }; 904 905 #define ICE_TXD_QW1_OFFSET_S 16 906 #define ICE_TXD_QW1_OFFSET_M (0x3FFFFULL << ICE_TXD_QW1_OFFSET_S) 907 908 enum ice_tx_desc_len_fields { 909 /* Note: These are predefined bit offsets */ 910 ICE_TX_DESC_LEN_MACLEN_S = 0, /* 7 BITS */ 911 ICE_TX_DESC_LEN_IPLEN_S = 7, /* 7 BITS */ 912 ICE_TX_DESC_LEN_L4_LEN_S = 14 /* 4 BITS */ 913 }; 914 915 #define ICE_TXD_QW1_MACLEN_M (0x7FUL << ICE_TX_DESC_LEN_MACLEN_S) 916 #define ICE_TXD_QW1_IPLEN_M (0x7FUL << ICE_TX_DESC_LEN_IPLEN_S) 917 #define ICE_TXD_QW1_L4LEN_M (0xFUL << ICE_TX_DESC_LEN_L4_LEN_S) 918 919 /* Tx descriptor field limits in bytes */ 920 #define ICE_TXD_MACLEN_MAX ((ICE_TXD_QW1_MACLEN_M >> \ 921 ICE_TX_DESC_LEN_MACLEN_S) * ICE_BYTES_PER_WORD) 922 #define ICE_TXD_IPLEN_MAX ((ICE_TXD_QW1_IPLEN_M >> \ 923 ICE_TX_DESC_LEN_IPLEN_S) * ICE_BYTES_PER_DWORD) 924 #define ICE_TXD_L4LEN_MAX ((ICE_TXD_QW1_L4LEN_M >> \ 925 ICE_TX_DESC_LEN_L4_LEN_S) * ICE_BYTES_PER_DWORD) 926 927 #define ICE_TXD_QW1_TX_BUF_SZ_S 34 928 #define ICE_TXD_QW1_TX_BUF_SZ_M (0x3FFFULL << ICE_TXD_QW1_TX_BUF_SZ_S) 929 930 #define ICE_TXD_QW1_L2TAG1_S 48 931 #define ICE_TXD_QW1_L2TAG1_M (0xFFFFULL << ICE_TXD_QW1_L2TAG1_S) 932 933 /* Context descriptors */ 934 struct ice_tx_ctx_desc { 935 __le32 tunneling_params; 936 __le16 l2tag2; 937 __le16 rsvd; 938 __le64 qw1; 939 }; 940 941 #define ICE_TXD_CTX_QW1_DTYPE_S 0 942 #define ICE_TXD_CTX_QW1_DTYPE_M (0xFUL << ICE_TXD_CTX_QW1_DTYPE_S) 943 944 #define ICE_TXD_CTX_QW1_CMD_S 4 945 #define ICE_TXD_CTX_QW1_CMD_M (0x7FUL << ICE_TXD_CTX_QW1_CMD_S) 946 947 #define ICE_TXD_CTX_QW1_IPSEC_S 11 948 #define ICE_TXD_CTX_QW1_IPSEC_M (0x7FUL << ICE_TXD_CTX_QW1_IPSEC_S) 949 950 #define ICE_TXD_CTX_QW1_TSO_LEN_S 30 951 #define ICE_TXD_CTX_QW1_TSO_LEN_M \ 952 (0x3FFFFULL << ICE_TXD_CTX_QW1_TSO_LEN_S) 953 954 #define ICE_TXD_CTX_QW1_TSYN_S ICE_TXD_CTX_QW1_TSO_LEN_S 955 #define ICE_TXD_CTX_QW1_TSYN_M ICE_TXD_CTX_QW1_TSO_LEN_M 956 957 #define ICE_TXD_CTX_QW1_MSS_S 50 958 #define ICE_TXD_CTX_QW1_MSS_M (0x3FFFULL << ICE_TXD_CTX_QW1_MSS_S) 959 #define ICE_TXD_CTX_MIN_MSS 64 960 #define ICE_TXD_CTX_MAX_MSS 9668 961 962 #define ICE_TXD_CTX_QW1_VSI_S 50 963 #define ICE_TXD_CTX_QW1_VSI_M (0x3FFULL << ICE_TXD_CTX_QW1_VSI_S) 964 965 enum ice_tx_ctx_desc_cmd_bits { 966 ICE_TX_CTX_DESC_TSO = 0x01, 967 ICE_TX_CTX_DESC_TSYN = 0x02, 968 ICE_TX_CTX_DESC_IL2TAG2 = 0x04, 969 ICE_TX_CTX_DESC_IL2TAG2_IL2H = 0x08, 970 ICE_TX_CTX_DESC_SWTCH_NOTAG = 0x00, 971 ICE_TX_CTX_DESC_SWTCH_UPLINK = 0x10, 972 ICE_TX_CTX_DESC_SWTCH_LOCAL = 0x20, 973 ICE_TX_CTX_DESC_SWTCH_VSI = 0x30, 974 ICE_TX_CTX_DESC_RESERVED = 0x40 975 }; 976 977 enum ice_tx_ctx_desc_eipt_offload { 978 ICE_TX_CTX_EIPT_NONE = 0x0, 979 ICE_TX_CTX_EIPT_IPV6 = 0x1, 980 ICE_TX_CTX_EIPT_IPV4_NO_CSUM = 0x2, 981 ICE_TX_CTX_EIPT_IPV4 = 0x3 982 }; 983 984 #define ICE_TXD_CTX_QW0_EIPT_S 0 985 #define ICE_TXD_CTX_QW0_EIPT_M (0x3ULL << ICE_TXD_CTX_QW0_EIPT_S) 986 987 #define ICE_TXD_CTX_QW0_EIPLEN_S 2 988 #define ICE_TXD_CTX_QW0_EIPLEN_M (0x7FUL << ICE_TXD_CTX_QW0_EIPLEN_S) 989 990 #define ICE_TXD_CTX_QW0_L4TUNT_S 9 991 #define ICE_TXD_CTX_QW0_L4TUNT_M (0x3ULL << ICE_TXD_CTX_QW0_L4TUNT_S) 992 993 #define ICE_TXD_CTX_UDP_TUNNELING BIT_ULL(ICE_TXD_CTX_QW0_L4TUNT_S) 994 #define ICE_TXD_CTX_GRE_TUNNELING (0x2ULL << ICE_TXD_CTX_QW0_L4TUNT_S) 995 996 #define ICE_TXD_CTX_QW0_EIP_NOINC_S 11 997 #define ICE_TXD_CTX_QW0_EIP_NOINC_M BIT_ULL(ICE_TXD_CTX_QW0_EIP_NOINC_S) 998 999 #define ICE_TXD_CTX_EIP_NOINC_IPID_CONST ICE_TXD_CTX_QW0_EIP_NOINC_M 1000 1001 #define ICE_TXD_CTX_QW0_NATLEN_S 12 1002 #define ICE_TXD_CTX_QW0_NATLEN_M (0X7FULL << ICE_TXD_CTX_QW0_NATLEN_S) 1003 1004 #define ICE_TXD_CTX_QW0_DECTTL_S 19 1005 #define ICE_TXD_CTX_QW0_DECTTL_M (0xFULL << ICE_TXD_CTX_QW0_DECTTL_S) 1006 1007 #define ICE_TXD_CTX_QW0_L4T_CS_S 23 1008 #define ICE_TXD_CTX_QW0_L4T_CS_M BIT_ULL(ICE_TXD_CTX_QW0_L4T_CS_S) 1009 1010 #define ICE_LAN_TXQ_MAX_QGRPS 127 1011 #define ICE_LAN_TXQ_MAX_QDIS 1023 1012 1013 /* Tx queue context data 1014 * 1015 * The sizes of the variables may be larger than needed due to crossing byte 1016 * boundaries. If we do not have the width of the variable set to the correct 1017 * size then we could end up shifting bits off the top of the variable when the 1018 * variable is at the top of a byte and crosses over into the next byte. 1019 */ 1020 struct ice_tlan_ctx { 1021 #define ICE_TLAN_CTX_BASE_S 7 1022 u64 base; /* base is defined in 128-byte units */ 1023 u8 port_num; 1024 u16 cgd_num; /* bigger than needed, see above for reason */ 1025 u8 pf_num; 1026 u16 vmvf_num; 1027 u8 vmvf_type; 1028 #define ICE_TLAN_CTX_VMVF_TYPE_VF 0 1029 #define ICE_TLAN_CTX_VMVF_TYPE_VMQ 1 1030 #define ICE_TLAN_CTX_VMVF_TYPE_PF 2 1031 u16 src_vsi; 1032 u8 tsyn_ena; 1033 u8 internal_usage_flag; 1034 u8 alt_vlan; 1035 u16 cpuid; /* bigger than needed, see above for reason */ 1036 u8 wb_mode; 1037 u8 tphrd_desc; 1038 u8 tphrd; 1039 u8 tphwr_desc; 1040 u16 cmpq_id; 1041 u16 qnum_in_func; 1042 u8 itr_notification_mode; 1043 u8 adjust_prof_id; 1044 u32 qlen; /* bigger than needed, see above for reason */ 1045 u8 quanta_prof_idx; 1046 u8 tso_ena; 1047 u16 tso_qnum; 1048 u8 legacy_int; 1049 u8 drop_ena; 1050 u8 cache_prof_idx; 1051 u8 pkt_shaper_prof_idx; 1052 u8 int_q_state; /* width not needed - internal do not write */ 1053 }; 1054 1055 /* LAN Tx Completion Queue data */ 1056 #pragma pack(1) 1057 struct ice_tx_cmpltnq { 1058 u16 txq_id; 1059 u8 generation; 1060 u16 tx_head; 1061 u8 cmpl_type; 1062 }; 1063 #pragma pack() 1064 1065 /* FIXME: move to a .c file that references this variable */ 1066 /* LAN Tx Completion Queue data info */ 1067 static const struct ice_ctx_ele ice_tx_cmpltnq_info[] = { 1068 /* Field Width LSB */ 1069 ICE_CTX_STORE(ice_tx_cmpltnq, txq_id, 14, 0), 1070 ICE_CTX_STORE(ice_tx_cmpltnq, generation, 1, 15), 1071 ICE_CTX_STORE(ice_tx_cmpltnq, tx_head, 13, 16), 1072 ICE_CTX_STORE(ice_tx_cmpltnq, cmpl_type, 3, 29), 1073 { 0 } 1074 }; 1075 1076 /* LAN Tx Completion Queue Context */ 1077 #pragma pack(1) 1078 struct ice_tx_cmpltnq_ctx { 1079 u64 base; 1080 u32 q_len; 1081 #define ICE_TX_CMPLTNQ_CTX_Q_LEN_S 4 1082 u8 generation; 1083 u32 wrt_ptr; 1084 u8 pf_num; 1085 u16 vmvf_num; 1086 u8 vmvf_type; 1087 u8 tph_desc_wr; 1088 u8 cpuid; 1089 u32 cmpltn_cache[16]; 1090 }; 1091 #pragma pack() 1092 1093 /* LAN Tx Doorbell Descriptor Format */ 1094 struct ice_tx_drbell_fmt { 1095 u16 txq_id; 1096 u8 dd; 1097 u8 rs; 1098 u32 db; 1099 }; 1100 1101 /* FIXME: move to a .c file that references this variable */ 1102 /* LAN Tx Doorbell Descriptor format info */ 1103 static const struct ice_ctx_ele ice_tx_drbell_fmt_info[] = { 1104 /* Field Width LSB */ 1105 ICE_CTX_STORE(ice_tx_drbell_fmt, txq_id, 14, 0), 1106 ICE_CTX_STORE(ice_tx_drbell_fmt, dd, 1, 14), 1107 ICE_CTX_STORE(ice_tx_drbell_fmt, rs, 1, 15), 1108 ICE_CTX_STORE(ice_tx_drbell_fmt, db, 32, 32), 1109 { 0 } 1110 }; 1111 1112 /* LAN Tx Doorbell Queue Context */ 1113 #pragma pack(1) 1114 struct ice_tx_drbell_q_ctx { 1115 u64 base; 1116 u16 ring_len; 1117 u8 pf_num; 1118 u16 vf_num; 1119 u8 vmvf_type; 1120 u8 cpuid; 1121 u8 tph_desc_rd; 1122 u8 tph_desc_wr; 1123 u8 db_q_en; 1124 u16 rd_head; 1125 u16 rd_tail; 1126 }; 1127 #pragma pack() 1128 1129 /* The ice_ptype_lkup table is used to convert from the 10-bit ptype in the 1130 * hardware to a bit-field that can be used by SW to more easily determine the 1131 * packet type. 1132 * 1133 * Macros are used to shorten the table lines and make this table human 1134 * readable. 1135 * 1136 * We store the PTYPE in the top byte of the bit field - this is just so that 1137 * we can check that the table doesn't have a row missing, as the index into 1138 * the table should be the PTYPE. 1139 * 1140 * Typical work flow: 1141 * 1142 * IF NOT ice_ptype_lkup[ptype].known 1143 * THEN 1144 * Packet is unknown 1145 * ELSE IF ice_ptype_lkup[ptype].outer_ip == ICE_RX_PTYPE_OUTER_IP 1146 * Use the rest of the fields to look at the tunnels, inner protocols, etc 1147 * ELSE 1148 * Use the enum ice_rx_l2_ptype to decode the packet type 1149 * ENDIF 1150 */ 1151 1152 /* macro to make the table lines short */ 1153 #define ICE_PTT(PTYPE, OUTER_IP, OUTER_IP_VER, OUTER_FRAG, T, TE, TEF, I, PL)\ 1154 { PTYPE, \ 1155 1, \ 1156 ICE_RX_PTYPE_OUTER_##OUTER_IP, \ 1157 ICE_RX_PTYPE_OUTER_##OUTER_IP_VER, \ 1158 ICE_RX_PTYPE_##OUTER_FRAG, \ 1159 ICE_RX_PTYPE_TUNNEL_##T, \ 1160 ICE_RX_PTYPE_TUNNEL_END_##TE, \ 1161 ICE_RX_PTYPE_##TEF, \ 1162 ICE_RX_PTYPE_INNER_PROT_##I, \ 1163 ICE_RX_PTYPE_PAYLOAD_LAYER_##PL } 1164 1165 #define ICE_PTT_UNUSED_ENTRY(PTYPE) { PTYPE, 0, 0, 0, 0, 0, 0, 0, 0, 0 } 1166 1167 /* shorter macros makes the table fit but are terse */ 1168 #define ICE_RX_PTYPE_NOF ICE_RX_PTYPE_NOT_FRAG 1169 #define ICE_RX_PTYPE_FRG ICE_RX_PTYPE_FRAG 1170 1171 /* Lookup table mapping the HW PTYPE to the bit field for decoding */ 1172 static const struct ice_rx_ptype_decoded ice_ptype_lkup[] = { 1173 /* L2 Packet types */ 1174 ICE_PTT_UNUSED_ENTRY(0), 1175 ICE_PTT(1, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2), 1176 ICE_PTT(2, L2, NONE, NOF, NONE, NONE, NOF, NONE, NONE), 1177 ICE_PTT_UNUSED_ENTRY(3), 1178 ICE_PTT_UNUSED_ENTRY(4), 1179 ICE_PTT_UNUSED_ENTRY(5), 1180 ICE_PTT(6, L2, NONE, NOF, NONE, NONE, NOF, NONE, NONE), 1181 ICE_PTT(7, L2, NONE, NOF, NONE, NONE, NOF, NONE, NONE), 1182 ICE_PTT_UNUSED_ENTRY(8), 1183 ICE_PTT_UNUSED_ENTRY(9), 1184 ICE_PTT(10, L2, NONE, NOF, NONE, NONE, NOF, NONE, NONE), 1185 ICE_PTT(11, L2, NONE, NOF, NONE, NONE, NOF, NONE, NONE), 1186 ICE_PTT_UNUSED_ENTRY(12), 1187 ICE_PTT_UNUSED_ENTRY(13), 1188 ICE_PTT_UNUSED_ENTRY(14), 1189 ICE_PTT_UNUSED_ENTRY(15), 1190 ICE_PTT_UNUSED_ENTRY(16), 1191 ICE_PTT_UNUSED_ENTRY(17), 1192 ICE_PTT_UNUSED_ENTRY(18), 1193 ICE_PTT_UNUSED_ENTRY(19), 1194 ICE_PTT_UNUSED_ENTRY(20), 1195 ICE_PTT_UNUSED_ENTRY(21), 1196 1197 /* Non Tunneled IPv4 */ 1198 ICE_PTT(22, IP, IPV4, FRG, NONE, NONE, NOF, NONE, PAY3), 1199 ICE_PTT(23, IP, IPV4, NOF, NONE, NONE, NOF, NONE, PAY3), 1200 ICE_PTT(24, IP, IPV4, NOF, NONE, NONE, NOF, UDP, PAY4), 1201 ICE_PTT_UNUSED_ENTRY(25), 1202 ICE_PTT(26, IP, IPV4, NOF, NONE, NONE, NOF, TCP, PAY4), 1203 ICE_PTT(27, IP, IPV4, NOF, NONE, NONE, NOF, SCTP, PAY4), 1204 ICE_PTT(28, IP, IPV4, NOF, NONE, NONE, NOF, ICMP, PAY4), 1205 1206 /* IPv4 --> IPv4 */ 1207 ICE_PTT(29, IP, IPV4, NOF, IP_IP, IPV4, FRG, NONE, PAY3), 1208 ICE_PTT(30, IP, IPV4, NOF, IP_IP, IPV4, NOF, NONE, PAY3), 1209 ICE_PTT(31, IP, IPV4, NOF, IP_IP, IPV4, NOF, UDP, PAY4), 1210 ICE_PTT_UNUSED_ENTRY(32), 1211 ICE_PTT(33, IP, IPV4, NOF, IP_IP, IPV4, NOF, TCP, PAY4), 1212 ICE_PTT(34, IP, IPV4, NOF, IP_IP, IPV4, NOF, SCTP, PAY4), 1213 ICE_PTT(35, IP, IPV4, NOF, IP_IP, IPV4, NOF, ICMP, PAY4), 1214 1215 /* IPv4 --> IPv6 */ 1216 ICE_PTT(36, IP, IPV4, NOF, IP_IP, IPV6, FRG, NONE, PAY3), 1217 ICE_PTT(37, IP, IPV4, NOF, IP_IP, IPV6, NOF, NONE, PAY3), 1218 ICE_PTT(38, IP, IPV4, NOF, IP_IP, IPV6, NOF, UDP, PAY4), 1219 ICE_PTT_UNUSED_ENTRY(39), 1220 ICE_PTT(40, IP, IPV4, NOF, IP_IP, IPV6, NOF, TCP, PAY4), 1221 ICE_PTT(41, IP, IPV4, NOF, IP_IP, IPV6, NOF, SCTP, PAY4), 1222 ICE_PTT(42, IP, IPV4, NOF, IP_IP, IPV6, NOF, ICMP, PAY4), 1223 1224 /* IPv4 --> GRE/NAT */ 1225 ICE_PTT(43, IP, IPV4, NOF, IP_GRENAT, NONE, NOF, NONE, PAY3), 1226 1227 /* IPv4 --> GRE/NAT --> IPv4 */ 1228 ICE_PTT(44, IP, IPV4, NOF, IP_GRENAT, IPV4, FRG, NONE, PAY3), 1229 ICE_PTT(45, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, NONE, PAY3), 1230 ICE_PTT(46, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, UDP, PAY4), 1231 ICE_PTT_UNUSED_ENTRY(47), 1232 ICE_PTT(48, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, TCP, PAY4), 1233 ICE_PTT(49, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, SCTP, PAY4), 1234 ICE_PTT(50, IP, IPV4, NOF, IP_GRENAT, IPV4, NOF, ICMP, PAY4), 1235 1236 /* IPv4 --> GRE/NAT --> IPv6 */ 1237 ICE_PTT(51, IP, IPV4, NOF, IP_GRENAT, IPV6, FRG, NONE, PAY3), 1238 ICE_PTT(52, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, NONE, PAY3), 1239 ICE_PTT(53, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, UDP, PAY4), 1240 ICE_PTT_UNUSED_ENTRY(54), 1241 ICE_PTT(55, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, TCP, PAY4), 1242 ICE_PTT(56, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, SCTP, PAY4), 1243 ICE_PTT(57, IP, IPV4, NOF, IP_GRENAT, IPV6, NOF, ICMP, PAY4), 1244 1245 /* IPv4 --> GRE/NAT --> MAC */ 1246 ICE_PTT(58, IP, IPV4, NOF, IP_GRENAT_MAC, NONE, NOF, NONE, PAY3), 1247 1248 /* IPv4 --> GRE/NAT --> MAC --> IPv4 */ 1249 ICE_PTT(59, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, FRG, NONE, PAY3), 1250 ICE_PTT(60, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, NONE, PAY3), 1251 ICE_PTT(61, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, UDP, PAY4), 1252 ICE_PTT_UNUSED_ENTRY(62), 1253 ICE_PTT(63, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, TCP, PAY4), 1254 ICE_PTT(64, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, SCTP, PAY4), 1255 ICE_PTT(65, IP, IPV4, NOF, IP_GRENAT_MAC, IPV4, NOF, ICMP, PAY4), 1256 1257 /* IPv4 --> GRE/NAT -> MAC --> IPv6 */ 1258 ICE_PTT(66, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, FRG, NONE, PAY3), 1259 ICE_PTT(67, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, NONE, PAY3), 1260 ICE_PTT(68, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, UDP, PAY4), 1261 ICE_PTT_UNUSED_ENTRY(69), 1262 ICE_PTT(70, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, TCP, PAY4), 1263 ICE_PTT(71, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, SCTP, PAY4), 1264 ICE_PTT(72, IP, IPV4, NOF, IP_GRENAT_MAC, IPV6, NOF, ICMP, PAY4), 1265 1266 /* IPv4 --> GRE/NAT --> MAC/VLAN */ 1267 ICE_PTT(73, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, NONE, NOF, NONE, PAY3), 1268 1269 /* IPv4 ---> GRE/NAT -> MAC/VLAN --> IPv4 */ 1270 ICE_PTT(74, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, FRG, NONE, PAY3), 1271 ICE_PTT(75, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, NONE, PAY3), 1272 ICE_PTT(76, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, UDP, PAY4), 1273 ICE_PTT_UNUSED_ENTRY(77), 1274 ICE_PTT(78, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, TCP, PAY4), 1275 ICE_PTT(79, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, SCTP, PAY4), 1276 ICE_PTT(80, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, ICMP, PAY4), 1277 1278 /* IPv4 -> GRE/NAT -> MAC/VLAN --> IPv6 */ 1279 ICE_PTT(81, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, FRG, NONE, PAY3), 1280 ICE_PTT(82, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, NONE, PAY3), 1281 ICE_PTT(83, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, UDP, PAY4), 1282 ICE_PTT_UNUSED_ENTRY(84), 1283 ICE_PTT(85, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, TCP, PAY4), 1284 ICE_PTT(86, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, SCTP, PAY4), 1285 ICE_PTT(87, IP, IPV4, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, ICMP, PAY4), 1286 1287 /* Non Tunneled IPv6 */ 1288 ICE_PTT(88, IP, IPV6, FRG, NONE, NONE, NOF, NONE, PAY3), 1289 ICE_PTT(89, IP, IPV6, NOF, NONE, NONE, NOF, NONE, PAY3), 1290 ICE_PTT(90, IP, IPV6, NOF, NONE, NONE, NOF, UDP, PAY3), 1291 ICE_PTT_UNUSED_ENTRY(91), 1292 ICE_PTT(92, IP, IPV6, NOF, NONE, NONE, NOF, TCP, PAY4), 1293 ICE_PTT(93, IP, IPV6, NOF, NONE, NONE, NOF, SCTP, PAY4), 1294 ICE_PTT(94, IP, IPV6, NOF, NONE, NONE, NOF, ICMP, PAY4), 1295 1296 /* IPv6 --> IPv4 */ 1297 ICE_PTT(95, IP, IPV6, NOF, IP_IP, IPV4, FRG, NONE, PAY3), 1298 ICE_PTT(96, IP, IPV6, NOF, IP_IP, IPV4, NOF, NONE, PAY3), 1299 ICE_PTT(97, IP, IPV6, NOF, IP_IP, IPV4, NOF, UDP, PAY4), 1300 ICE_PTT_UNUSED_ENTRY(98), 1301 ICE_PTT(99, IP, IPV6, NOF, IP_IP, IPV4, NOF, TCP, PAY4), 1302 ICE_PTT(100, IP, IPV6, NOF, IP_IP, IPV4, NOF, SCTP, PAY4), 1303 ICE_PTT(101, IP, IPV6, NOF, IP_IP, IPV4, NOF, ICMP, PAY4), 1304 1305 /* IPv6 --> IPv6 */ 1306 ICE_PTT(102, IP, IPV6, NOF, IP_IP, IPV6, FRG, NONE, PAY3), 1307 ICE_PTT(103, IP, IPV6, NOF, IP_IP, IPV6, NOF, NONE, PAY3), 1308 ICE_PTT(104, IP, IPV6, NOF, IP_IP, IPV6, NOF, UDP, PAY4), 1309 ICE_PTT_UNUSED_ENTRY(105), 1310 ICE_PTT(106, IP, IPV6, NOF, IP_IP, IPV6, NOF, TCP, PAY4), 1311 ICE_PTT(107, IP, IPV6, NOF, IP_IP, IPV6, NOF, SCTP, PAY4), 1312 ICE_PTT(108, IP, IPV6, NOF, IP_IP, IPV6, NOF, ICMP, PAY4), 1313 1314 /* IPv6 --> GRE/NAT */ 1315 ICE_PTT(109, IP, IPV6, NOF, IP_GRENAT, NONE, NOF, NONE, PAY3), 1316 1317 /* IPv6 --> GRE/NAT -> IPv4 */ 1318 ICE_PTT(110, IP, IPV6, NOF, IP_GRENAT, IPV4, FRG, NONE, PAY3), 1319 ICE_PTT(111, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, NONE, PAY3), 1320 ICE_PTT(112, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, UDP, PAY4), 1321 ICE_PTT_UNUSED_ENTRY(113), 1322 ICE_PTT(114, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, TCP, PAY4), 1323 ICE_PTT(115, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, SCTP, PAY4), 1324 ICE_PTT(116, IP, IPV6, NOF, IP_GRENAT, IPV4, NOF, ICMP, PAY4), 1325 1326 /* IPv6 --> GRE/NAT -> IPv6 */ 1327 ICE_PTT(117, IP, IPV6, NOF, IP_GRENAT, IPV6, FRG, NONE, PAY3), 1328 ICE_PTT(118, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, NONE, PAY3), 1329 ICE_PTT(119, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, UDP, PAY4), 1330 ICE_PTT_UNUSED_ENTRY(120), 1331 ICE_PTT(121, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, TCP, PAY4), 1332 ICE_PTT(122, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, SCTP, PAY4), 1333 ICE_PTT(123, IP, IPV6, NOF, IP_GRENAT, IPV6, NOF, ICMP, PAY4), 1334 1335 /* IPv6 --> GRE/NAT -> MAC */ 1336 ICE_PTT(124, IP, IPV6, NOF, IP_GRENAT_MAC, NONE, NOF, NONE, PAY3), 1337 1338 /* IPv6 --> GRE/NAT -> MAC -> IPv4 */ 1339 ICE_PTT(125, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, FRG, NONE, PAY3), 1340 ICE_PTT(126, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, NONE, PAY3), 1341 ICE_PTT(127, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, UDP, PAY4), 1342 ICE_PTT_UNUSED_ENTRY(128), 1343 ICE_PTT(129, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, TCP, PAY4), 1344 ICE_PTT(130, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, SCTP, PAY4), 1345 ICE_PTT(131, IP, IPV6, NOF, IP_GRENAT_MAC, IPV4, NOF, ICMP, PAY4), 1346 1347 /* IPv6 --> GRE/NAT -> MAC -> IPv6 */ 1348 ICE_PTT(132, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, FRG, NONE, PAY3), 1349 ICE_PTT(133, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, NONE, PAY3), 1350 ICE_PTT(134, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, UDP, PAY4), 1351 ICE_PTT_UNUSED_ENTRY(135), 1352 ICE_PTT(136, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, TCP, PAY4), 1353 ICE_PTT(137, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, SCTP, PAY4), 1354 ICE_PTT(138, IP, IPV6, NOF, IP_GRENAT_MAC, IPV6, NOF, ICMP, PAY4), 1355 1356 /* IPv6 --> GRE/NAT -> MAC/VLAN */ 1357 ICE_PTT(139, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, NONE, NOF, NONE, PAY3), 1358 1359 /* IPv6 --> GRE/NAT -> MAC/VLAN --> IPv4 */ 1360 ICE_PTT(140, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, FRG, NONE, PAY3), 1361 ICE_PTT(141, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, NONE, PAY3), 1362 ICE_PTT(142, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, UDP, PAY4), 1363 ICE_PTT_UNUSED_ENTRY(143), 1364 ICE_PTT(144, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, TCP, PAY4), 1365 ICE_PTT(145, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, SCTP, PAY4), 1366 ICE_PTT(146, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV4, NOF, ICMP, PAY4), 1367 1368 /* IPv6 --> GRE/NAT -> MAC/VLAN --> IPv6 */ 1369 ICE_PTT(147, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, FRG, NONE, PAY3), 1370 ICE_PTT(148, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, NONE, PAY3), 1371 ICE_PTT(149, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, UDP, PAY4), 1372 ICE_PTT_UNUSED_ENTRY(150), 1373 ICE_PTT(151, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, TCP, PAY4), 1374 ICE_PTT(152, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, SCTP, PAY4), 1375 ICE_PTT(153, IP, IPV6, NOF, IP_GRENAT_MAC_VLAN, IPV6, NOF, ICMP, PAY4), 1376 1377 /* unused entries */ 1378 ICE_PTT_UNUSED_ENTRY(154), 1379 ICE_PTT_UNUSED_ENTRY(155), 1380 ICE_PTT_UNUSED_ENTRY(156), 1381 ICE_PTT_UNUSED_ENTRY(157), 1382 ICE_PTT_UNUSED_ENTRY(158), 1383 ICE_PTT_UNUSED_ENTRY(159), 1384 1385 ICE_PTT_UNUSED_ENTRY(160), 1386 ICE_PTT_UNUSED_ENTRY(161), 1387 ICE_PTT_UNUSED_ENTRY(162), 1388 ICE_PTT_UNUSED_ENTRY(163), 1389 ICE_PTT_UNUSED_ENTRY(164), 1390 ICE_PTT_UNUSED_ENTRY(165), 1391 ICE_PTT_UNUSED_ENTRY(166), 1392 ICE_PTT_UNUSED_ENTRY(167), 1393 ICE_PTT_UNUSED_ENTRY(168), 1394 ICE_PTT_UNUSED_ENTRY(169), 1395 1396 ICE_PTT_UNUSED_ENTRY(170), 1397 ICE_PTT_UNUSED_ENTRY(171), 1398 ICE_PTT_UNUSED_ENTRY(172), 1399 ICE_PTT_UNUSED_ENTRY(173), 1400 ICE_PTT_UNUSED_ENTRY(174), 1401 ICE_PTT_UNUSED_ENTRY(175), 1402 ICE_PTT_UNUSED_ENTRY(176), 1403 ICE_PTT_UNUSED_ENTRY(177), 1404 ICE_PTT_UNUSED_ENTRY(178), 1405 ICE_PTT_UNUSED_ENTRY(179), 1406 1407 ICE_PTT_UNUSED_ENTRY(180), 1408 ICE_PTT_UNUSED_ENTRY(181), 1409 ICE_PTT_UNUSED_ENTRY(182), 1410 ICE_PTT_UNUSED_ENTRY(183), 1411 ICE_PTT_UNUSED_ENTRY(184), 1412 ICE_PTT_UNUSED_ENTRY(185), 1413 ICE_PTT_UNUSED_ENTRY(186), 1414 ICE_PTT_UNUSED_ENTRY(187), 1415 ICE_PTT_UNUSED_ENTRY(188), 1416 ICE_PTT_UNUSED_ENTRY(189), 1417 1418 ICE_PTT_UNUSED_ENTRY(190), 1419 ICE_PTT_UNUSED_ENTRY(191), 1420 ICE_PTT_UNUSED_ENTRY(192), 1421 ICE_PTT_UNUSED_ENTRY(193), 1422 ICE_PTT_UNUSED_ENTRY(194), 1423 ICE_PTT_UNUSED_ENTRY(195), 1424 ICE_PTT_UNUSED_ENTRY(196), 1425 ICE_PTT_UNUSED_ENTRY(197), 1426 ICE_PTT_UNUSED_ENTRY(198), 1427 ICE_PTT_UNUSED_ENTRY(199), 1428 1429 ICE_PTT_UNUSED_ENTRY(200), 1430 ICE_PTT_UNUSED_ENTRY(201), 1431 ICE_PTT_UNUSED_ENTRY(202), 1432 ICE_PTT_UNUSED_ENTRY(203), 1433 ICE_PTT_UNUSED_ENTRY(204), 1434 ICE_PTT_UNUSED_ENTRY(205), 1435 ICE_PTT_UNUSED_ENTRY(206), 1436 ICE_PTT_UNUSED_ENTRY(207), 1437 ICE_PTT_UNUSED_ENTRY(208), 1438 ICE_PTT_UNUSED_ENTRY(209), 1439 1440 ICE_PTT_UNUSED_ENTRY(210), 1441 ICE_PTT_UNUSED_ENTRY(211), 1442 ICE_PTT_UNUSED_ENTRY(212), 1443 ICE_PTT_UNUSED_ENTRY(213), 1444 ICE_PTT_UNUSED_ENTRY(214), 1445 ICE_PTT_UNUSED_ENTRY(215), 1446 ICE_PTT_UNUSED_ENTRY(216), 1447 ICE_PTT_UNUSED_ENTRY(217), 1448 ICE_PTT_UNUSED_ENTRY(218), 1449 ICE_PTT_UNUSED_ENTRY(219), 1450 1451 ICE_PTT_UNUSED_ENTRY(220), 1452 ICE_PTT_UNUSED_ENTRY(221), 1453 ICE_PTT_UNUSED_ENTRY(222), 1454 ICE_PTT_UNUSED_ENTRY(223), 1455 ICE_PTT_UNUSED_ENTRY(224), 1456 ICE_PTT_UNUSED_ENTRY(225), 1457 ICE_PTT_UNUSED_ENTRY(226), 1458 ICE_PTT_UNUSED_ENTRY(227), 1459 ICE_PTT_UNUSED_ENTRY(228), 1460 ICE_PTT_UNUSED_ENTRY(229), 1461 1462 ICE_PTT_UNUSED_ENTRY(230), 1463 ICE_PTT_UNUSED_ENTRY(231), 1464 ICE_PTT_UNUSED_ENTRY(232), 1465 ICE_PTT_UNUSED_ENTRY(233), 1466 ICE_PTT_UNUSED_ENTRY(234), 1467 ICE_PTT_UNUSED_ENTRY(235), 1468 ICE_PTT_UNUSED_ENTRY(236), 1469 ICE_PTT_UNUSED_ENTRY(237), 1470 ICE_PTT_UNUSED_ENTRY(238), 1471 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ICE_PTT_UNUSED_ENTRY(569), 1835 1836 ICE_PTT_UNUSED_ENTRY(570), 1837 ICE_PTT_UNUSED_ENTRY(571), 1838 ICE_PTT_UNUSED_ENTRY(572), 1839 ICE_PTT_UNUSED_ENTRY(573), 1840 ICE_PTT_UNUSED_ENTRY(574), 1841 ICE_PTT_UNUSED_ENTRY(575), 1842 ICE_PTT_UNUSED_ENTRY(576), 1843 ICE_PTT_UNUSED_ENTRY(577), 1844 ICE_PTT_UNUSED_ENTRY(578), 1845 ICE_PTT_UNUSED_ENTRY(579), 1846 1847 ICE_PTT_UNUSED_ENTRY(580), 1848 ICE_PTT_UNUSED_ENTRY(581), 1849 ICE_PTT_UNUSED_ENTRY(582), 1850 ICE_PTT_UNUSED_ENTRY(583), 1851 ICE_PTT_UNUSED_ENTRY(584), 1852 ICE_PTT_UNUSED_ENTRY(585), 1853 ICE_PTT_UNUSED_ENTRY(586), 1854 ICE_PTT_UNUSED_ENTRY(587), 1855 ICE_PTT_UNUSED_ENTRY(588), 1856 ICE_PTT_UNUSED_ENTRY(589), 1857 1858 ICE_PTT_UNUSED_ENTRY(590), 1859 ICE_PTT_UNUSED_ENTRY(591), 1860 ICE_PTT_UNUSED_ENTRY(592), 1861 ICE_PTT_UNUSED_ENTRY(593), 1862 ICE_PTT_UNUSED_ENTRY(594), 1863 ICE_PTT_UNUSED_ENTRY(595), 1864 ICE_PTT_UNUSED_ENTRY(596), 1865 ICE_PTT_UNUSED_ENTRY(597), 1866 ICE_PTT_UNUSED_ENTRY(598), 1867 ICE_PTT_UNUSED_ENTRY(599), 1868 1869 ICE_PTT_UNUSED_ENTRY(600), 1870 ICE_PTT_UNUSED_ENTRY(601), 1871 ICE_PTT_UNUSED_ENTRY(602), 1872 ICE_PTT_UNUSED_ENTRY(603), 1873 ICE_PTT_UNUSED_ENTRY(604), 1874 ICE_PTT_UNUSED_ENTRY(605), 1875 ICE_PTT_UNUSED_ENTRY(606), 1876 ICE_PTT_UNUSED_ENTRY(607), 1877 ICE_PTT_UNUSED_ENTRY(608), 1878 ICE_PTT_UNUSED_ENTRY(609), 1879 1880 ICE_PTT_UNUSED_ENTRY(610), 1881 ICE_PTT_UNUSED_ENTRY(611), 1882 ICE_PTT_UNUSED_ENTRY(612), 1883 ICE_PTT_UNUSED_ENTRY(613), 1884 ICE_PTT_UNUSED_ENTRY(614), 1885 ICE_PTT_UNUSED_ENTRY(615), 1886 ICE_PTT_UNUSED_ENTRY(616), 1887 ICE_PTT_UNUSED_ENTRY(617), 1888 ICE_PTT_UNUSED_ENTRY(618), 1889 ICE_PTT_UNUSED_ENTRY(619), 1890 1891 ICE_PTT_UNUSED_ENTRY(620), 1892 ICE_PTT_UNUSED_ENTRY(621), 1893 ICE_PTT_UNUSED_ENTRY(622), 1894 ICE_PTT_UNUSED_ENTRY(623), 1895 ICE_PTT_UNUSED_ENTRY(624), 1896 ICE_PTT_UNUSED_ENTRY(625), 1897 ICE_PTT_UNUSED_ENTRY(626), 1898 ICE_PTT_UNUSED_ENTRY(627), 1899 ICE_PTT_UNUSED_ENTRY(628), 1900 ICE_PTT_UNUSED_ENTRY(629), 1901 1902 ICE_PTT_UNUSED_ENTRY(630), 1903 ICE_PTT_UNUSED_ENTRY(631), 1904 ICE_PTT_UNUSED_ENTRY(632), 1905 ICE_PTT_UNUSED_ENTRY(633), 1906 ICE_PTT_UNUSED_ENTRY(634), 1907 ICE_PTT_UNUSED_ENTRY(635), 1908 ICE_PTT_UNUSED_ENTRY(636), 1909 ICE_PTT_UNUSED_ENTRY(637), 1910 ICE_PTT_UNUSED_ENTRY(638), 1911 ICE_PTT_UNUSED_ENTRY(639), 1912 1913 ICE_PTT_UNUSED_ENTRY(640), 1914 ICE_PTT_UNUSED_ENTRY(641), 1915 ICE_PTT_UNUSED_ENTRY(642), 1916 ICE_PTT_UNUSED_ENTRY(643), 1917 ICE_PTT_UNUSED_ENTRY(644), 1918 ICE_PTT_UNUSED_ENTRY(645), 1919 ICE_PTT_UNUSED_ENTRY(646), 1920 ICE_PTT_UNUSED_ENTRY(647), 1921 ICE_PTT_UNUSED_ENTRY(648), 1922 ICE_PTT_UNUSED_ENTRY(649), 1923 1924 ICE_PTT_UNUSED_ENTRY(650), 1925 ICE_PTT_UNUSED_ENTRY(651), 1926 ICE_PTT_UNUSED_ENTRY(652), 1927 ICE_PTT_UNUSED_ENTRY(653), 1928 ICE_PTT_UNUSED_ENTRY(654), 1929 ICE_PTT_UNUSED_ENTRY(655), 1930 ICE_PTT_UNUSED_ENTRY(656), 1931 ICE_PTT_UNUSED_ENTRY(657), 1932 ICE_PTT_UNUSED_ENTRY(658), 1933 ICE_PTT_UNUSED_ENTRY(659), 1934 1935 ICE_PTT_UNUSED_ENTRY(660), 1936 ICE_PTT_UNUSED_ENTRY(661), 1937 ICE_PTT_UNUSED_ENTRY(662), 1938 ICE_PTT_UNUSED_ENTRY(663), 1939 ICE_PTT_UNUSED_ENTRY(664), 1940 ICE_PTT_UNUSED_ENTRY(665), 1941 ICE_PTT_UNUSED_ENTRY(666), 1942 ICE_PTT_UNUSED_ENTRY(667), 1943 ICE_PTT_UNUSED_ENTRY(668), 1944 ICE_PTT_UNUSED_ENTRY(669), 1945 1946 ICE_PTT_UNUSED_ENTRY(670), 1947 ICE_PTT_UNUSED_ENTRY(671), 1948 ICE_PTT_UNUSED_ENTRY(672), 1949 ICE_PTT_UNUSED_ENTRY(673), 1950 ICE_PTT_UNUSED_ENTRY(674), 1951 ICE_PTT_UNUSED_ENTRY(675), 1952 ICE_PTT_UNUSED_ENTRY(676), 1953 ICE_PTT_UNUSED_ENTRY(677), 1954 ICE_PTT_UNUSED_ENTRY(678), 1955 ICE_PTT_UNUSED_ENTRY(679), 1956 1957 ICE_PTT_UNUSED_ENTRY(680), 1958 ICE_PTT_UNUSED_ENTRY(681), 1959 ICE_PTT_UNUSED_ENTRY(682), 1960 ICE_PTT_UNUSED_ENTRY(683), 1961 ICE_PTT_UNUSED_ENTRY(684), 1962 ICE_PTT_UNUSED_ENTRY(685), 1963 ICE_PTT_UNUSED_ENTRY(686), 1964 ICE_PTT_UNUSED_ENTRY(687), 1965 ICE_PTT_UNUSED_ENTRY(688), 1966 ICE_PTT_UNUSED_ENTRY(689), 1967 1968 ICE_PTT_UNUSED_ENTRY(690), 1969 ICE_PTT_UNUSED_ENTRY(691), 1970 ICE_PTT_UNUSED_ENTRY(692), 1971 ICE_PTT_UNUSED_ENTRY(693), 1972 ICE_PTT_UNUSED_ENTRY(694), 1973 ICE_PTT_UNUSED_ENTRY(695), 1974 ICE_PTT_UNUSED_ENTRY(696), 1975 ICE_PTT_UNUSED_ENTRY(697), 1976 ICE_PTT_UNUSED_ENTRY(698), 1977 ICE_PTT_UNUSED_ENTRY(699), 1978 1979 ICE_PTT_UNUSED_ENTRY(700), 1980 ICE_PTT_UNUSED_ENTRY(701), 1981 ICE_PTT_UNUSED_ENTRY(702), 1982 ICE_PTT_UNUSED_ENTRY(703), 1983 ICE_PTT_UNUSED_ENTRY(704), 1984 ICE_PTT_UNUSED_ENTRY(705), 1985 ICE_PTT_UNUSED_ENTRY(706), 1986 ICE_PTT_UNUSED_ENTRY(707), 1987 ICE_PTT_UNUSED_ENTRY(708), 1988 ICE_PTT_UNUSED_ENTRY(709), 1989 1990 ICE_PTT_UNUSED_ENTRY(710), 1991 ICE_PTT_UNUSED_ENTRY(711), 1992 ICE_PTT_UNUSED_ENTRY(712), 1993 ICE_PTT_UNUSED_ENTRY(713), 1994 ICE_PTT_UNUSED_ENTRY(714), 1995 ICE_PTT_UNUSED_ENTRY(715), 1996 ICE_PTT_UNUSED_ENTRY(716), 1997 ICE_PTT_UNUSED_ENTRY(717), 1998 ICE_PTT_UNUSED_ENTRY(718), 1999 ICE_PTT_UNUSED_ENTRY(719), 2000 2001 ICE_PTT_UNUSED_ENTRY(720), 2002 ICE_PTT_UNUSED_ENTRY(721), 2003 ICE_PTT_UNUSED_ENTRY(722), 2004 ICE_PTT_UNUSED_ENTRY(723), 2005 ICE_PTT_UNUSED_ENTRY(724), 2006 ICE_PTT_UNUSED_ENTRY(725), 2007 ICE_PTT_UNUSED_ENTRY(726), 2008 ICE_PTT_UNUSED_ENTRY(727), 2009 ICE_PTT_UNUSED_ENTRY(728), 2010 ICE_PTT_UNUSED_ENTRY(729), 2011 2012 ICE_PTT_UNUSED_ENTRY(730), 2013 ICE_PTT_UNUSED_ENTRY(731), 2014 ICE_PTT_UNUSED_ENTRY(732), 2015 ICE_PTT_UNUSED_ENTRY(733), 2016 ICE_PTT_UNUSED_ENTRY(734), 2017 ICE_PTT_UNUSED_ENTRY(735), 2018 ICE_PTT_UNUSED_ENTRY(736), 2019 ICE_PTT_UNUSED_ENTRY(737), 2020 ICE_PTT_UNUSED_ENTRY(738), 2021 ICE_PTT_UNUSED_ENTRY(739), 2022 2023 ICE_PTT_UNUSED_ENTRY(740), 2024 ICE_PTT_UNUSED_ENTRY(741), 2025 ICE_PTT_UNUSED_ENTRY(742), 2026 ICE_PTT_UNUSED_ENTRY(743), 2027 ICE_PTT_UNUSED_ENTRY(744), 2028 ICE_PTT_UNUSED_ENTRY(745), 2029 ICE_PTT_UNUSED_ENTRY(746), 2030 ICE_PTT_UNUSED_ENTRY(747), 2031 ICE_PTT_UNUSED_ENTRY(748), 2032 ICE_PTT_UNUSED_ENTRY(749), 2033 2034 ICE_PTT_UNUSED_ENTRY(750), 2035 ICE_PTT_UNUSED_ENTRY(751), 2036 ICE_PTT_UNUSED_ENTRY(752), 2037 ICE_PTT_UNUSED_ENTRY(753), 2038 ICE_PTT_UNUSED_ENTRY(754), 2039 ICE_PTT_UNUSED_ENTRY(755), 2040 ICE_PTT_UNUSED_ENTRY(756), 2041 ICE_PTT_UNUSED_ENTRY(757), 2042 ICE_PTT_UNUSED_ENTRY(758), 2043 ICE_PTT_UNUSED_ENTRY(759), 2044 2045 ICE_PTT_UNUSED_ENTRY(760), 2046 ICE_PTT_UNUSED_ENTRY(761), 2047 ICE_PTT_UNUSED_ENTRY(762), 2048 ICE_PTT_UNUSED_ENTRY(763), 2049 ICE_PTT_UNUSED_ENTRY(764), 2050 ICE_PTT_UNUSED_ENTRY(765), 2051 ICE_PTT_UNUSED_ENTRY(766), 2052 ICE_PTT_UNUSED_ENTRY(767), 2053 ICE_PTT_UNUSED_ENTRY(768), 2054 ICE_PTT_UNUSED_ENTRY(769), 2055 2056 ICE_PTT_UNUSED_ENTRY(770), 2057 ICE_PTT_UNUSED_ENTRY(771), 2058 ICE_PTT_UNUSED_ENTRY(772), 2059 ICE_PTT_UNUSED_ENTRY(773), 2060 ICE_PTT_UNUSED_ENTRY(774), 2061 ICE_PTT_UNUSED_ENTRY(775), 2062 ICE_PTT_UNUSED_ENTRY(776), 2063 ICE_PTT_UNUSED_ENTRY(777), 2064 ICE_PTT_UNUSED_ENTRY(778), 2065 ICE_PTT_UNUSED_ENTRY(779), 2066 2067 ICE_PTT_UNUSED_ENTRY(780), 2068 ICE_PTT_UNUSED_ENTRY(781), 2069 ICE_PTT_UNUSED_ENTRY(782), 2070 ICE_PTT_UNUSED_ENTRY(783), 2071 ICE_PTT_UNUSED_ENTRY(784), 2072 ICE_PTT_UNUSED_ENTRY(785), 2073 ICE_PTT_UNUSED_ENTRY(786), 2074 ICE_PTT_UNUSED_ENTRY(787), 2075 ICE_PTT_UNUSED_ENTRY(788), 2076 ICE_PTT_UNUSED_ENTRY(789), 2077 2078 ICE_PTT_UNUSED_ENTRY(790), 2079 ICE_PTT_UNUSED_ENTRY(791), 2080 ICE_PTT_UNUSED_ENTRY(792), 2081 ICE_PTT_UNUSED_ENTRY(793), 2082 ICE_PTT_UNUSED_ENTRY(794), 2083 ICE_PTT_UNUSED_ENTRY(795), 2084 ICE_PTT_UNUSED_ENTRY(796), 2085 ICE_PTT_UNUSED_ENTRY(797), 2086 ICE_PTT_UNUSED_ENTRY(798), 2087 ICE_PTT_UNUSED_ENTRY(799), 2088 2089 ICE_PTT_UNUSED_ENTRY(800), 2090 ICE_PTT_UNUSED_ENTRY(801), 2091 ICE_PTT_UNUSED_ENTRY(802), 2092 ICE_PTT_UNUSED_ENTRY(803), 2093 ICE_PTT_UNUSED_ENTRY(804), 2094 ICE_PTT_UNUSED_ENTRY(805), 2095 ICE_PTT_UNUSED_ENTRY(806), 2096 ICE_PTT_UNUSED_ENTRY(807), 2097 ICE_PTT_UNUSED_ENTRY(808), 2098 ICE_PTT_UNUSED_ENTRY(809), 2099 2100 ICE_PTT_UNUSED_ENTRY(810), 2101 ICE_PTT_UNUSED_ENTRY(811), 2102 ICE_PTT_UNUSED_ENTRY(812), 2103 ICE_PTT_UNUSED_ENTRY(813), 2104 ICE_PTT_UNUSED_ENTRY(814), 2105 ICE_PTT_UNUSED_ENTRY(815), 2106 ICE_PTT_UNUSED_ENTRY(816), 2107 ICE_PTT_UNUSED_ENTRY(817), 2108 ICE_PTT_UNUSED_ENTRY(818), 2109 ICE_PTT_UNUSED_ENTRY(819), 2110 2111 ICE_PTT_UNUSED_ENTRY(820), 2112 ICE_PTT_UNUSED_ENTRY(821), 2113 ICE_PTT_UNUSED_ENTRY(822), 2114 ICE_PTT_UNUSED_ENTRY(823), 2115 ICE_PTT_UNUSED_ENTRY(824), 2116 ICE_PTT_UNUSED_ENTRY(825), 2117 ICE_PTT_UNUSED_ENTRY(826), 2118 ICE_PTT_UNUSED_ENTRY(827), 2119 ICE_PTT_UNUSED_ENTRY(828), 2120 ICE_PTT_UNUSED_ENTRY(829), 2121 2122 ICE_PTT_UNUSED_ENTRY(830), 2123 ICE_PTT_UNUSED_ENTRY(831), 2124 ICE_PTT_UNUSED_ENTRY(832), 2125 ICE_PTT_UNUSED_ENTRY(833), 2126 ICE_PTT_UNUSED_ENTRY(834), 2127 ICE_PTT_UNUSED_ENTRY(835), 2128 ICE_PTT_UNUSED_ENTRY(836), 2129 ICE_PTT_UNUSED_ENTRY(837), 2130 ICE_PTT_UNUSED_ENTRY(838), 2131 ICE_PTT_UNUSED_ENTRY(839), 2132 2133 ICE_PTT_UNUSED_ENTRY(840), 2134 ICE_PTT_UNUSED_ENTRY(841), 2135 ICE_PTT_UNUSED_ENTRY(842), 2136 ICE_PTT_UNUSED_ENTRY(843), 2137 ICE_PTT_UNUSED_ENTRY(844), 2138 ICE_PTT_UNUSED_ENTRY(845), 2139 ICE_PTT_UNUSED_ENTRY(846), 2140 ICE_PTT_UNUSED_ENTRY(847), 2141 ICE_PTT_UNUSED_ENTRY(848), 2142 ICE_PTT_UNUSED_ENTRY(849), 2143 2144 ICE_PTT_UNUSED_ENTRY(850), 2145 ICE_PTT_UNUSED_ENTRY(851), 2146 ICE_PTT_UNUSED_ENTRY(852), 2147 ICE_PTT_UNUSED_ENTRY(853), 2148 ICE_PTT_UNUSED_ENTRY(854), 2149 ICE_PTT_UNUSED_ENTRY(855), 2150 ICE_PTT_UNUSED_ENTRY(856), 2151 ICE_PTT_UNUSED_ENTRY(857), 2152 ICE_PTT_UNUSED_ENTRY(858), 2153 ICE_PTT_UNUSED_ENTRY(859), 2154 2155 ICE_PTT_UNUSED_ENTRY(860), 2156 ICE_PTT_UNUSED_ENTRY(861), 2157 ICE_PTT_UNUSED_ENTRY(862), 2158 ICE_PTT_UNUSED_ENTRY(863), 2159 ICE_PTT_UNUSED_ENTRY(864), 2160 ICE_PTT_UNUSED_ENTRY(865), 2161 ICE_PTT_UNUSED_ENTRY(866), 2162 ICE_PTT_UNUSED_ENTRY(867), 2163 ICE_PTT_UNUSED_ENTRY(868), 2164 ICE_PTT_UNUSED_ENTRY(869), 2165 2166 ICE_PTT_UNUSED_ENTRY(870), 2167 ICE_PTT_UNUSED_ENTRY(871), 2168 ICE_PTT_UNUSED_ENTRY(872), 2169 ICE_PTT_UNUSED_ENTRY(873), 2170 ICE_PTT_UNUSED_ENTRY(874), 2171 ICE_PTT_UNUSED_ENTRY(875), 2172 ICE_PTT_UNUSED_ENTRY(876), 2173 ICE_PTT_UNUSED_ENTRY(877), 2174 ICE_PTT_UNUSED_ENTRY(878), 2175 ICE_PTT_UNUSED_ENTRY(879), 2176 2177 ICE_PTT_UNUSED_ENTRY(880), 2178 ICE_PTT_UNUSED_ENTRY(881), 2179 ICE_PTT_UNUSED_ENTRY(882), 2180 ICE_PTT_UNUSED_ENTRY(883), 2181 ICE_PTT_UNUSED_ENTRY(884), 2182 ICE_PTT_UNUSED_ENTRY(885), 2183 ICE_PTT_UNUSED_ENTRY(886), 2184 ICE_PTT_UNUSED_ENTRY(887), 2185 ICE_PTT_UNUSED_ENTRY(888), 2186 ICE_PTT_UNUSED_ENTRY(889), 2187 2188 ICE_PTT_UNUSED_ENTRY(890), 2189 ICE_PTT_UNUSED_ENTRY(891), 2190 ICE_PTT_UNUSED_ENTRY(892), 2191 ICE_PTT_UNUSED_ENTRY(893), 2192 ICE_PTT_UNUSED_ENTRY(894), 2193 ICE_PTT_UNUSED_ENTRY(895), 2194 ICE_PTT_UNUSED_ENTRY(896), 2195 ICE_PTT_UNUSED_ENTRY(897), 2196 ICE_PTT_UNUSED_ENTRY(898), 2197 ICE_PTT_UNUSED_ENTRY(899), 2198 2199 ICE_PTT_UNUSED_ENTRY(900), 2200 ICE_PTT_UNUSED_ENTRY(901), 2201 ICE_PTT_UNUSED_ENTRY(902), 2202 ICE_PTT_UNUSED_ENTRY(903), 2203 ICE_PTT_UNUSED_ENTRY(904), 2204 ICE_PTT_UNUSED_ENTRY(905), 2205 ICE_PTT_UNUSED_ENTRY(906), 2206 ICE_PTT_UNUSED_ENTRY(907), 2207 ICE_PTT_UNUSED_ENTRY(908), 2208 ICE_PTT_UNUSED_ENTRY(909), 2209 2210 ICE_PTT_UNUSED_ENTRY(910), 2211 ICE_PTT_UNUSED_ENTRY(911), 2212 ICE_PTT_UNUSED_ENTRY(912), 2213 ICE_PTT_UNUSED_ENTRY(913), 2214 ICE_PTT_UNUSED_ENTRY(914), 2215 ICE_PTT_UNUSED_ENTRY(915), 2216 ICE_PTT_UNUSED_ENTRY(916), 2217 ICE_PTT_UNUSED_ENTRY(917), 2218 ICE_PTT_UNUSED_ENTRY(918), 2219 ICE_PTT_UNUSED_ENTRY(919), 2220 2221 ICE_PTT_UNUSED_ENTRY(920), 2222 ICE_PTT_UNUSED_ENTRY(921), 2223 ICE_PTT_UNUSED_ENTRY(922), 2224 ICE_PTT_UNUSED_ENTRY(923), 2225 ICE_PTT_UNUSED_ENTRY(924), 2226 ICE_PTT_UNUSED_ENTRY(925), 2227 ICE_PTT_UNUSED_ENTRY(926), 2228 ICE_PTT_UNUSED_ENTRY(927), 2229 ICE_PTT_UNUSED_ENTRY(928), 2230 ICE_PTT_UNUSED_ENTRY(929), 2231 2232 ICE_PTT_UNUSED_ENTRY(930), 2233 ICE_PTT_UNUSED_ENTRY(931), 2234 ICE_PTT_UNUSED_ENTRY(932), 2235 ICE_PTT_UNUSED_ENTRY(933), 2236 ICE_PTT_UNUSED_ENTRY(934), 2237 ICE_PTT_UNUSED_ENTRY(935), 2238 ICE_PTT_UNUSED_ENTRY(936), 2239 ICE_PTT_UNUSED_ENTRY(937), 2240 ICE_PTT_UNUSED_ENTRY(938), 2241 ICE_PTT_UNUSED_ENTRY(939), 2242 2243 ICE_PTT_UNUSED_ENTRY(940), 2244 ICE_PTT_UNUSED_ENTRY(941), 2245 ICE_PTT_UNUSED_ENTRY(942), 2246 ICE_PTT_UNUSED_ENTRY(943), 2247 ICE_PTT_UNUSED_ENTRY(944), 2248 ICE_PTT_UNUSED_ENTRY(945), 2249 ICE_PTT_UNUSED_ENTRY(946), 2250 ICE_PTT_UNUSED_ENTRY(947), 2251 ICE_PTT_UNUSED_ENTRY(948), 2252 ICE_PTT_UNUSED_ENTRY(949), 2253 2254 ICE_PTT_UNUSED_ENTRY(950), 2255 ICE_PTT_UNUSED_ENTRY(951), 2256 ICE_PTT_UNUSED_ENTRY(952), 2257 ICE_PTT_UNUSED_ENTRY(953), 2258 ICE_PTT_UNUSED_ENTRY(954), 2259 ICE_PTT_UNUSED_ENTRY(955), 2260 ICE_PTT_UNUSED_ENTRY(956), 2261 ICE_PTT_UNUSED_ENTRY(957), 2262 ICE_PTT_UNUSED_ENTRY(958), 2263 ICE_PTT_UNUSED_ENTRY(959), 2264 2265 ICE_PTT_UNUSED_ENTRY(960), 2266 ICE_PTT_UNUSED_ENTRY(961), 2267 ICE_PTT_UNUSED_ENTRY(962), 2268 ICE_PTT_UNUSED_ENTRY(963), 2269 ICE_PTT_UNUSED_ENTRY(964), 2270 ICE_PTT_UNUSED_ENTRY(965), 2271 ICE_PTT_UNUSED_ENTRY(966), 2272 ICE_PTT_UNUSED_ENTRY(967), 2273 ICE_PTT_UNUSED_ENTRY(968), 2274 ICE_PTT_UNUSED_ENTRY(969), 2275 2276 ICE_PTT_UNUSED_ENTRY(970), 2277 ICE_PTT_UNUSED_ENTRY(971), 2278 ICE_PTT_UNUSED_ENTRY(972), 2279 ICE_PTT_UNUSED_ENTRY(973), 2280 ICE_PTT_UNUSED_ENTRY(974), 2281 ICE_PTT_UNUSED_ENTRY(975), 2282 ICE_PTT_UNUSED_ENTRY(976), 2283 ICE_PTT_UNUSED_ENTRY(977), 2284 ICE_PTT_UNUSED_ENTRY(978), 2285 ICE_PTT_UNUSED_ENTRY(979), 2286 2287 ICE_PTT_UNUSED_ENTRY(980), 2288 ICE_PTT_UNUSED_ENTRY(981), 2289 ICE_PTT_UNUSED_ENTRY(982), 2290 ICE_PTT_UNUSED_ENTRY(983), 2291 ICE_PTT_UNUSED_ENTRY(984), 2292 ICE_PTT_UNUSED_ENTRY(985), 2293 ICE_PTT_UNUSED_ENTRY(986), 2294 ICE_PTT_UNUSED_ENTRY(987), 2295 ICE_PTT_UNUSED_ENTRY(988), 2296 ICE_PTT_UNUSED_ENTRY(989), 2297 2298 ICE_PTT_UNUSED_ENTRY(990), 2299 ICE_PTT_UNUSED_ENTRY(991), 2300 ICE_PTT_UNUSED_ENTRY(992), 2301 ICE_PTT_UNUSED_ENTRY(993), 2302 ICE_PTT_UNUSED_ENTRY(994), 2303 ICE_PTT_UNUSED_ENTRY(995), 2304 ICE_PTT_UNUSED_ENTRY(996), 2305 ICE_PTT_UNUSED_ENTRY(997), 2306 ICE_PTT_UNUSED_ENTRY(998), 2307 ICE_PTT_UNUSED_ENTRY(999), 2308 2309 ICE_PTT_UNUSED_ENTRY(1000), 2310 ICE_PTT_UNUSED_ENTRY(1001), 2311 ICE_PTT_UNUSED_ENTRY(1002), 2312 ICE_PTT_UNUSED_ENTRY(1003), 2313 ICE_PTT_UNUSED_ENTRY(1004), 2314 ICE_PTT_UNUSED_ENTRY(1005), 2315 ICE_PTT_UNUSED_ENTRY(1006), 2316 ICE_PTT_UNUSED_ENTRY(1007), 2317 ICE_PTT_UNUSED_ENTRY(1008), 2318 ICE_PTT_UNUSED_ENTRY(1009), 2319 2320 ICE_PTT_UNUSED_ENTRY(1010), 2321 ICE_PTT_UNUSED_ENTRY(1011), 2322 ICE_PTT_UNUSED_ENTRY(1012), 2323 ICE_PTT_UNUSED_ENTRY(1013), 2324 ICE_PTT_UNUSED_ENTRY(1014), 2325 ICE_PTT_UNUSED_ENTRY(1015), 2326 ICE_PTT_UNUSED_ENTRY(1016), 2327 ICE_PTT_UNUSED_ENTRY(1017), 2328 ICE_PTT_UNUSED_ENTRY(1018), 2329 ICE_PTT_UNUSED_ENTRY(1019), 2330 2331 ICE_PTT_UNUSED_ENTRY(1020), 2332 ICE_PTT_UNUSED_ENTRY(1021), 2333 ICE_PTT_UNUSED_ENTRY(1022), 2334 ICE_PTT_UNUSED_ENTRY(1023), 2335 }; 2336 2337 static inline struct ice_rx_ptype_decoded ice_decode_rx_desc_ptype(u16 ptype) 2338 { 2339 return ice_ptype_lkup[ptype]; 2340 } 2341 2342 #define ICE_LINK_SPEED_UNKNOWN 0 2343 #define ICE_LINK_SPEED_10MBPS 10 2344 #define ICE_LINK_SPEED_100MBPS 100 2345 #define ICE_LINK_SPEED_1000MBPS 1000 2346 #define ICE_LINK_SPEED_2500MBPS 2500 2347 #define ICE_LINK_SPEED_5000MBPS 5000 2348 #define ICE_LINK_SPEED_10000MBPS 10000 2349 #define ICE_LINK_SPEED_20000MBPS 20000 2350 #define ICE_LINK_SPEED_25000MBPS 25000 2351 #define ICE_LINK_SPEED_40000MBPS 40000 2352 #define ICE_LINK_SPEED_50000MBPS 50000 2353 #define ICE_LINK_SPEED_100000MBPS 100000 2354 2355 #endif /* _ICE_LAN_TX_RX_H_ */ 2356