15b81b6b3SRodney W. Grimes /* 25b81b6b3SRodney W. Grimes * Intel 8237 DMA Controller 35b81b6b3SRodney W. Grimes */ 45b81b6b3SRodney W. Grimes 55b81b6b3SRodney W. Grimes #define DMA37MD_SINGLE 0x40 /* single pass mode */ 65b81b6b3SRodney W. Grimes #define DMA37MD_CASCADE 0xc0 /* cascade mode */ 70c9159ecSAndrey A. Chernov #define DMA37MD_AUTO 0x50 /* autoinitialise single pass mode */ 85b81b6b3SRodney W. Grimes #define DMA37MD_WRITE 0x04 /* read the device, write memory operation */ 95b81b6b3SRodney W. Grimes #define DMA37MD_READ 0x08 /* write the device, read memory operation */ 10