1 /* 2 * cyclades cyclom-y serial driver 3 * Andrew Herbert <andrew@werple.apana.org.au>, 17 August 1993 4 * 5 * Copyright (c) 1993 Andrew Herbert. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name Andrew Herbert may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED 20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 22 * NO EVENT SHALL I BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 23 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 24 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 25 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 26 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 27 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #define CD1400_NO_OF_CHANNELS 4 /* four serial channels per chip */ 32 #define CD1400_FIFOSIZE 12 /* 12 chars */ 33 34 /* register definitions */ 35 36 #define CD1400_CCR 2*0x05 /* channel control */ 37 #define CD1400_CMD_RESET 0x81 /* full reset */ 38 39 #define CD1400_SRER 2*0x06 /* service request enable */ 40 41 #define CD1400_GFRCR 2*0x40 /* global firmware revision code */ 42 43 #define CD1400_LIVR 2*0x18 /* local intr vector */ 44 #define CD1400_MIVR 2*0x41 /* modem intr vector */ 45 #define CD1400_TIVR 2*0x42 /* transmit intr vector */ 46 #define CD1400_RIVR 2*0x43 /* receive intr vector */ 47 #define CD1400_RIVR_EXCEPTION (1<<2) /* receive exception bit */ 48 49 #define CD1400_RICR 2*0x44 /* receive intr channel */ 50 #define CD1400_TICR 2*0x45 /* transmit intr channel */ 51 #define CD1400_MICR 2*0x46 /* modem intr channel */ 52 53 #define CD1400_RDCR 2*0x0e /* rx data count */ 54 55 #define CD1400_EOSRR 2*0x60 /* end of service request */ 56 #define CD1400_RDSR 2*0x62 /* rx data/status */ 57 #define CD1400_RDSR_OVERRUN (1<<0) /* rx overrun error */ 58 #define CD1400_RDSR_FRAMING (1<<1) /* rx framing error */ 59 #define CD1400_RDSR_PARITY (1<<2) /* rx parity error */ 60 #define CD1400_RDSR_BREAK (1<<3) /* rx break */ 61 #define CD1400_RDSR_SPECIAL (7<<4) /* rx special char */ 62 #define CD1400_RDSR_SPECIAL_SHIFT 4 /* rx special char shift */ 63 #define CD1400_RDSR_TIMEOUT (1<<7) /* rx timeout */ 64 65 #define CD1400_TDR 2*0x63 /* tx data */ 66 67 #define CD1400_MISR 2*0x4c /* modem intr status */ 68 #define CD1400_MISR_DSRd (1<<7) /* DSR delta */ 69 #define CD1400_MISR_CTSd (1<<6) /* CTS delta */ 70 #define CD1400_MISR_RId (1<<5) /* RI delta */ 71 #define CD1400_MISR_CDd (1<<4) /* CD delta */ 72 73 #define CD1400_MSVR 2*0x6d /* modem signals */ 74 #define CD1400_MSVR_DSR (1<<7) /* !DSR line */ 75 #define CD1400_MSVR_CTS (1<<6) /* !CTS line */ 76 #define CD1400_MSVR_RI (1<<5) /* !RI line */ 77 #define CD1400_MSVR_CD (1<<4) /* !CD line */ 78 #define CD1400_MSVR_DTR (1<<1) /* DTR line */ 79 80 #define CD1400_DTR 2*0x6d /* dtr control */ 81 #define CD1400_DTR_CLEAR 0 82 #define CD1400_DTR_SET (1<<1) 83 84 #define CD1400_PPR 2*0x7e 85 #define CD1400_CLOCK_25_1MS 0x31 86 87 #define CD1400_CAR 2*0x68 /* channel access */ 88 89 #define CD1400_RIR 2*0x6B /* receive interrupt status */ 90 #define CD1400_TIR 2*0x6A /* transmit interrupt status */ 91 #define CD1400_MIR 2*0x69 /* modem interrupt status */ 92 93 #define CD1400_RBPR 2*0x78 /* receive baud rate period */ 94 #define CD1400_RCOR 2*0x7C /* receive clock option */ 95 #define CD1400_TBPR 2*0x72 /* transmit baud rate period */ 96 #define CD1400_TCOR 2*0x76 /* transmit clock option */ 97 98 #define CD1400_COR1 2*0x08 /* channel option 1 */ 99 #define CD1400_COR2 2*0x09 /* channel option 2 */ 100 #define CD1400_COR3 2*0x0A /* channel option 3 */ 101 #define CD1400_COR4 2*0x1E /* channel option 4 */ 102 #define CD1400_COR5 2*0x1F /* channel option 5 */ 103 104 #define CD1400_SCHR1 2*0x1A /* special character 1 */ 105 #define CD1400_SCHR2 2*0x1B /* special character 2 */ 106 #define CD1400_SCHR3 2*0x1C /* special character 3 */ 107 #define CD1400_SCHR4 2*0x1D /* special character 4 */ 108 109 #define CD1400_MCOR1 2*0x15 /* modem change 1 */ 110 #define CD1400_MCOR2 2*0x16 /* modem change 2 */ 111 #define CD1400_RTPR 2*0x21 /* receive timeout period */ 112 113 #define CD1400_SVRR 2*0x67 /* service request */ 114 #define CD1400_SVRR_RX (1<<0) 115 #define CD1400_SVRR_TX (1<<1) 116 #define CD1400_SVRR_MDM (1<<2) 117 118 /* hardware SVCACK addresses, for use in interrupt handlers */ 119 #define CD1400_SVCACKR 0x100 120 #define CD1400_SVCACKT 0x200 121 #define CD1400_SVCACKM 0x300 122