1*ca853deeSEric Joyner /* SPDX-License-Identifier: BSD-3-Clause */
2*ca853deeSEric Joyner /* Copyright (c) 2021, Intel Corporation
3*ca853deeSEric Joyner * All rights reserved.
4*ca853deeSEric Joyner *
5*ca853deeSEric Joyner * Redistribution and use in source and binary forms, with or without
6*ca853deeSEric Joyner * modification, are permitted provided that the following conditions are met:
7*ca853deeSEric Joyner *
8*ca853deeSEric Joyner * 1. Redistributions of source code must retain the above copyright notice,
9*ca853deeSEric Joyner * this list of conditions and the following disclaimer.
10*ca853deeSEric Joyner *
11*ca853deeSEric Joyner * 2. Redistributions in binary form must reproduce the above copyright
12*ca853deeSEric Joyner * notice, this list of conditions and the following disclaimer in the
13*ca853deeSEric Joyner * documentation and/or other materials provided with the distribution.
14*ca853deeSEric Joyner *
15*ca853deeSEric Joyner * 3. Neither the name of the Intel Corporation nor the names of its
16*ca853deeSEric Joyner * contributors may be used to endorse or promote products derived from
17*ca853deeSEric Joyner * this software without specific prior written permission.
18*ca853deeSEric Joyner *
19*ca853deeSEric Joyner * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20*ca853deeSEric Joyner * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21*ca853deeSEric Joyner * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22*ca853deeSEric Joyner * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23*ca853deeSEric Joyner * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24*ca853deeSEric Joyner * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25*ca853deeSEric Joyner * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26*ca853deeSEric Joyner * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27*ca853deeSEric Joyner * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28*ca853deeSEric Joyner * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29*ca853deeSEric Joyner * POSSIBILITY OF SUCH DAMAGE.
30*ca853deeSEric Joyner */
31*ca853deeSEric Joyner
32*ca853deeSEric Joyner /**
33*ca853deeSEric Joyner * @file iavf_sysctls_common.h
34*ca853deeSEric Joyner * @brief Sysctls common to the legacy and iflib drivers
35*ca853deeSEric Joyner *
36*ca853deeSEric Joyner * Contains global sysctl definitions which are shared between the legacy and
37*ca853deeSEric Joyner * iflib driver implementations.
38*ca853deeSEric Joyner */
39*ca853deeSEric Joyner #ifndef _IAVF_SYSCTLS_COMMON_H_
40*ca853deeSEric Joyner #define _IAVF_SYSCTLS_COMMON_H_
41*ca853deeSEric Joyner
42*ca853deeSEric Joyner #include <sys/sysctl.h>
43*ca853deeSEric Joyner
44*ca853deeSEric Joyner /* Root node for tunables */
45*ca853deeSEric Joyner static SYSCTL_NODE(_hw, OID_AUTO, iavf, CTLFLAG_RD, 0,
46*ca853deeSEric Joyner "IAVF driver parameters");
47*ca853deeSEric Joyner
48*ca853deeSEric Joyner /**
49*ca853deeSEric Joyner * @var iavf_enable_head_writeback
50*ca853deeSEric Joyner * @brief Sysctl to control Tx descriptor completion method
51*ca853deeSEric Joyner *
52*ca853deeSEric Joyner * Global sysctl value indicating whether to enable the head writeback method
53*ca853deeSEric Joyner * of Tx descriptor completion notification.
54*ca853deeSEric Joyner *
55*ca853deeSEric Joyner * @remark Head writeback has been deprecated and will only work on 700-series
56*ca853deeSEric Joyner * virtual functions only.
57*ca853deeSEric Joyner */
58*ca853deeSEric Joyner static int iavf_enable_head_writeback = 0;
59*ca853deeSEric Joyner SYSCTL_INT(_hw_iavf, OID_AUTO, enable_head_writeback, CTLFLAG_RDTUN,
60*ca853deeSEric Joyner &iavf_enable_head_writeback, 0,
61*ca853deeSEric Joyner "For detecting last completed TX descriptor by hardware, use value written by HW instead of checking descriptors. For 700 series VFs only.");
62*ca853deeSEric Joyner
63*ca853deeSEric Joyner /**
64*ca853deeSEric Joyner * @var iavf_core_debug_mask
65*ca853deeSEric Joyner * @brief Debug mask for driver messages
66*ca853deeSEric Joyner *
67*ca853deeSEric Joyner * Global sysctl value used to control what set of debug messages are printed.
68*ca853deeSEric Joyner * Used by messages in core driver code.
69*ca853deeSEric Joyner */
70*ca853deeSEric Joyner static int iavf_core_debug_mask = 0;
71*ca853deeSEric Joyner SYSCTL_INT(_hw_iavf, OID_AUTO, core_debug_mask, CTLFLAG_RDTUN,
72*ca853deeSEric Joyner &iavf_core_debug_mask, 0,
73*ca853deeSEric Joyner "Display debug statements that are printed in non-shared code");
74*ca853deeSEric Joyner
75*ca853deeSEric Joyner /**
76*ca853deeSEric Joyner * @var iavf_shared_debug_mask
77*ca853deeSEric Joyner * @brief Debug mask for shared code messages
78*ca853deeSEric Joyner *
79*ca853deeSEric Joyner * Global sysctl value used to control what set of debug messages are printed.
80*ca853deeSEric Joyner * Used by messages in shared device logic code.
81*ca853deeSEric Joyner */
82*ca853deeSEric Joyner static int iavf_shared_debug_mask = 0;
83*ca853deeSEric Joyner SYSCTL_INT(_hw_iavf, OID_AUTO, shared_debug_mask, CTLFLAG_RDTUN,
84*ca853deeSEric Joyner &iavf_shared_debug_mask, 0,
85*ca853deeSEric Joyner "Display debug statements that are printed in shared code");
86*ca853deeSEric Joyner
87*ca853deeSEric Joyner /**
88*ca853deeSEric Joyner * @var iavf_rx_itr
89*ca853deeSEric Joyner * @brief Rx interrupt throttling rate
90*ca853deeSEric Joyner *
91*ca853deeSEric Joyner * Controls the default interrupt throttling rate for receive interrupts.
92*ca853deeSEric Joyner */
93*ca853deeSEric Joyner int iavf_rx_itr = IAVF_ITR_8K;
94*ca853deeSEric Joyner SYSCTL_INT(_hw_iavf, OID_AUTO, rx_itr, CTLFLAG_RDTUN,
95*ca853deeSEric Joyner &iavf_rx_itr, 0, "RX Interrupt Rate");
96*ca853deeSEric Joyner
97*ca853deeSEric Joyner /**
98*ca853deeSEric Joyner * @var iavf_tx_itr
99*ca853deeSEric Joyner * @brief Tx interrupt throttling rate
100*ca853deeSEric Joyner *
101*ca853deeSEric Joyner * Controls the default interrupt throttling rate for transmit interrupts.
102*ca853deeSEric Joyner */
103*ca853deeSEric Joyner int iavf_tx_itr = IAVF_ITR_4K;
104*ca853deeSEric Joyner SYSCTL_INT(_hw_iavf, OID_AUTO, tx_itr, CTLFLAG_RDTUN,
105*ca853deeSEric Joyner &iavf_tx_itr, 0, "TX Interrupt Rate");
106*ca853deeSEric Joyner
107*ca853deeSEric Joyner /**
108*ca853deeSEric Joyner * iavf_save_tunables - Sanity check and save off tunable values
109*ca853deeSEric Joyner * @sc: device softc
110*ca853deeSEric Joyner *
111*ca853deeSEric Joyner * @pre "iavf_drv_info.h" is included before this file
112*ca853deeSEric Joyner * @pre dev pointer in sc is valid
113*ca853deeSEric Joyner */
114*ca853deeSEric Joyner static void
iavf_save_tunables(struct iavf_sc * sc)115*ca853deeSEric Joyner iavf_save_tunables(struct iavf_sc *sc)
116*ca853deeSEric Joyner {
117*ca853deeSEric Joyner device_t dev = sc->dev;
118*ca853deeSEric Joyner u16 pci_device_id = pci_get_device(dev);
119*ca853deeSEric Joyner
120*ca853deeSEric Joyner /* Save tunable information */
121*ca853deeSEric Joyner sc->dbg_mask = (enum iavf_dbg_mask)iavf_core_debug_mask;
122*ca853deeSEric Joyner sc->hw.debug_mask = iavf_shared_debug_mask;
123*ca853deeSEric Joyner
124*ca853deeSEric Joyner if (pci_device_id == IAVF_DEV_ID_VF ||
125*ca853deeSEric Joyner pci_device_id == IAVF_DEV_ID_X722_VF)
126*ca853deeSEric Joyner sc->vsi.enable_head_writeback = !!(iavf_enable_head_writeback);
127*ca853deeSEric Joyner else if (iavf_enable_head_writeback) {
128*ca853deeSEric Joyner device_printf(dev, "Head writeback can only be enabled on 700 series Virtual Functions\n");
129*ca853deeSEric Joyner device_printf(dev, "Using descriptor writeback instead...\n");
130*ca853deeSEric Joyner sc->vsi.enable_head_writeback = 0;
131*ca853deeSEric Joyner }
132*ca853deeSEric Joyner
133*ca853deeSEric Joyner if (iavf_tx_itr < 0 || iavf_tx_itr > IAVF_MAX_ITR) {
134*ca853deeSEric Joyner device_printf(dev, "Invalid tx_itr value of %d set!\n",
135*ca853deeSEric Joyner iavf_tx_itr);
136*ca853deeSEric Joyner device_printf(dev, "tx_itr must be between %d and %d, "
137*ca853deeSEric Joyner "inclusive\n",
138*ca853deeSEric Joyner 0, IAVF_MAX_ITR);
139*ca853deeSEric Joyner device_printf(dev, "Using default value of %d instead\n",
140*ca853deeSEric Joyner IAVF_ITR_4K);
141*ca853deeSEric Joyner sc->tx_itr = IAVF_ITR_4K;
142*ca853deeSEric Joyner } else
143*ca853deeSEric Joyner sc->tx_itr = iavf_tx_itr;
144*ca853deeSEric Joyner
145*ca853deeSEric Joyner if (iavf_rx_itr < 0 || iavf_rx_itr > IAVF_MAX_ITR) {
146*ca853deeSEric Joyner device_printf(dev, "Invalid rx_itr value of %d set!\n",
147*ca853deeSEric Joyner iavf_rx_itr);
148*ca853deeSEric Joyner device_printf(dev, "rx_itr must be between %d and %d, "
149*ca853deeSEric Joyner "inclusive\n",
150*ca853deeSEric Joyner 0, IAVF_MAX_ITR);
151*ca853deeSEric Joyner device_printf(dev, "Using default value of %d instead\n",
152*ca853deeSEric Joyner IAVF_ITR_8K);
153*ca853deeSEric Joyner sc->rx_itr = IAVF_ITR_8K;
154*ca853deeSEric Joyner } else
155*ca853deeSEric Joyner sc->rx_itr = iavf_rx_itr;
156*ca853deeSEric Joyner }
157*ca853deeSEric Joyner #endif /* _IAVF_SYSCTLS_COMMON_H_ */
158