1*ca853deeSEric Joyner /* SPDX-License-Identifier: BSD-3-Clause */ 2*ca853deeSEric Joyner /* Copyright (c) 2021, Intel Corporation 3*ca853deeSEric Joyner * All rights reserved. 4*ca853deeSEric Joyner * 5*ca853deeSEric Joyner * Redistribution and use in source and binary forms, with or without 6*ca853deeSEric Joyner * modification, are permitted provided that the following conditions are met: 7*ca853deeSEric Joyner * 8*ca853deeSEric Joyner * 1. Redistributions of source code must retain the above copyright notice, 9*ca853deeSEric Joyner * this list of conditions and the following disclaimer. 10*ca853deeSEric Joyner * 11*ca853deeSEric Joyner * 2. Redistributions in binary form must reproduce the above copyright 12*ca853deeSEric Joyner * notice, this list of conditions and the following disclaimer in the 13*ca853deeSEric Joyner * documentation and/or other materials provided with the distribution. 14*ca853deeSEric Joyner * 15*ca853deeSEric Joyner * 3. Neither the name of the Intel Corporation nor the names of its 16*ca853deeSEric Joyner * contributors may be used to endorse or promote products derived from 17*ca853deeSEric Joyner * this software without specific prior written permission. 18*ca853deeSEric Joyner * 19*ca853deeSEric Joyner * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20*ca853deeSEric Joyner * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21*ca853deeSEric Joyner * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22*ca853deeSEric Joyner * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23*ca853deeSEric Joyner * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24*ca853deeSEric Joyner * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25*ca853deeSEric Joyner * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26*ca853deeSEric Joyner * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27*ca853deeSEric Joyner * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28*ca853deeSEric Joyner * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29*ca853deeSEric Joyner * POSSIBILITY OF SUCH DAMAGE. 30*ca853deeSEric Joyner */ 31*ca853deeSEric Joyner 32*ca853deeSEric Joyner #ifndef _IAVF_ADMINQ_CMD_H_ 33*ca853deeSEric Joyner #define _IAVF_ADMINQ_CMD_H_ 34*ca853deeSEric Joyner 35*ca853deeSEric Joyner /* This header file defines the iavf Admin Queue commands and is shared between 36*ca853deeSEric Joyner * iavf Firmware and Software. Do not change the names in this file to IAVF 37*ca853deeSEric Joyner * because this file should be diff-able against the iavf version, even 38*ca853deeSEric Joyner * though many parts have been removed in this VF version. 39*ca853deeSEric Joyner * 40*ca853deeSEric Joyner * This file needs to comply with the Linux Kernel coding style. 41*ca853deeSEric Joyner */ 42*ca853deeSEric Joyner 43*ca853deeSEric Joyner #define IAVF_FW_API_VERSION_MAJOR 0x0001 44*ca853deeSEric Joyner #define IAVF_FW_API_VERSION_MINOR_X722 0x0006 45*ca853deeSEric Joyner #define IAVF_FW_API_VERSION_MINOR_X710 0x0007 46*ca853deeSEric Joyner 47*ca853deeSEric Joyner #define IAVF_FW_MINOR_VERSION(_h) ((_h)->mac.type == IAVF_MAC_XL710 ? \ 48*ca853deeSEric Joyner IAVF_FW_API_VERSION_MINOR_X710 : \ 49*ca853deeSEric Joyner IAVF_FW_API_VERSION_MINOR_X722) 50*ca853deeSEric Joyner 51*ca853deeSEric Joyner /* API version 1.7 implements additional link and PHY-specific APIs */ 52*ca853deeSEric Joyner #define IAVF_MINOR_VER_GET_LINK_INFO_XL710 0x0007 53*ca853deeSEric Joyner /* API version 1.6 for X722 devices adds ability to stop FW LLDP agent */ 54*ca853deeSEric Joyner #define IAVF_MINOR_VER_FW_LLDP_STOPPABLE_X722 0x0006 55*ca853deeSEric Joyner 56*ca853deeSEric Joyner struct iavf_aq_desc { 57*ca853deeSEric Joyner __le16 flags; 58*ca853deeSEric Joyner __le16 opcode; 59*ca853deeSEric Joyner __le16 datalen; 60*ca853deeSEric Joyner __le16 retval; 61*ca853deeSEric Joyner __le32 cookie_high; 62*ca853deeSEric Joyner __le32 cookie_low; 63*ca853deeSEric Joyner union { 64*ca853deeSEric Joyner struct { 65*ca853deeSEric Joyner __le32 param0; 66*ca853deeSEric Joyner __le32 param1; 67*ca853deeSEric Joyner __le32 param2; 68*ca853deeSEric Joyner __le32 param3; 69*ca853deeSEric Joyner } internal; 70*ca853deeSEric Joyner struct { 71*ca853deeSEric Joyner __le32 param0; 72*ca853deeSEric Joyner __le32 param1; 73*ca853deeSEric Joyner __le32 addr_high; 74*ca853deeSEric Joyner __le32 addr_low; 75*ca853deeSEric Joyner } external; 76*ca853deeSEric Joyner u8 raw[16]; 77*ca853deeSEric Joyner } params; 78*ca853deeSEric Joyner }; 79*ca853deeSEric Joyner 80*ca853deeSEric Joyner /* Flags sub-structure 81*ca853deeSEric Joyner * |0 |1 |2 |3 |4 |5 |6 |7 |8 |9 |10 |11 |12 |13 |14 |15 | 82*ca853deeSEric Joyner * |DD |CMP|ERR|VFE| * * RESERVED * * |LB |RD |VFC|BUF|SI |EI |FE | 83*ca853deeSEric Joyner */ 84*ca853deeSEric Joyner 85*ca853deeSEric Joyner /* command flags and offsets*/ 86*ca853deeSEric Joyner #define IAVF_AQ_FLAG_DD_SHIFT 0 87*ca853deeSEric Joyner #define IAVF_AQ_FLAG_CMP_SHIFT 1 88*ca853deeSEric Joyner #define IAVF_AQ_FLAG_ERR_SHIFT 2 89*ca853deeSEric Joyner #define IAVF_AQ_FLAG_VFE_SHIFT 3 90*ca853deeSEric Joyner #define IAVF_AQ_FLAG_LB_SHIFT 9 91*ca853deeSEric Joyner #define IAVF_AQ_FLAG_RD_SHIFT 10 92*ca853deeSEric Joyner #define IAVF_AQ_FLAG_VFC_SHIFT 11 93*ca853deeSEric Joyner #define IAVF_AQ_FLAG_BUF_SHIFT 12 94*ca853deeSEric Joyner #define IAVF_AQ_FLAG_SI_SHIFT 13 95*ca853deeSEric Joyner #define IAVF_AQ_FLAG_EI_SHIFT 14 96*ca853deeSEric Joyner #define IAVF_AQ_FLAG_FE_SHIFT 15 97*ca853deeSEric Joyner 98*ca853deeSEric Joyner #define IAVF_AQ_FLAG_DD (1 << IAVF_AQ_FLAG_DD_SHIFT) /* 0x1 */ 99*ca853deeSEric Joyner #define IAVF_AQ_FLAG_CMP (1 << IAVF_AQ_FLAG_CMP_SHIFT) /* 0x2 */ 100*ca853deeSEric Joyner #define IAVF_AQ_FLAG_ERR (1 << IAVF_AQ_FLAG_ERR_SHIFT) /* 0x4 */ 101*ca853deeSEric Joyner #define IAVF_AQ_FLAG_VFE (1 << IAVF_AQ_FLAG_VFE_SHIFT) /* 0x8 */ 102*ca853deeSEric Joyner #define IAVF_AQ_FLAG_LB (1 << IAVF_AQ_FLAG_LB_SHIFT) /* 0x200 */ 103*ca853deeSEric Joyner #define IAVF_AQ_FLAG_RD (1 << IAVF_AQ_FLAG_RD_SHIFT) /* 0x400 */ 104*ca853deeSEric Joyner #define IAVF_AQ_FLAG_VFC (1 << IAVF_AQ_FLAG_VFC_SHIFT) /* 0x800 */ 105*ca853deeSEric Joyner #define IAVF_AQ_FLAG_BUF (1 << IAVF_AQ_FLAG_BUF_SHIFT) /* 0x1000 */ 106*ca853deeSEric Joyner #define IAVF_AQ_FLAG_SI (1 << IAVF_AQ_FLAG_SI_SHIFT) /* 0x2000 */ 107*ca853deeSEric Joyner #define IAVF_AQ_FLAG_EI (1 << IAVF_AQ_FLAG_EI_SHIFT) /* 0x4000 */ 108*ca853deeSEric Joyner #define IAVF_AQ_FLAG_FE (1 << IAVF_AQ_FLAG_FE_SHIFT) /* 0x8000 */ 109*ca853deeSEric Joyner 110*ca853deeSEric Joyner /* error codes */ 111*ca853deeSEric Joyner enum iavf_admin_queue_err { 112*ca853deeSEric Joyner IAVF_AQ_RC_OK = 0, /* success */ 113*ca853deeSEric Joyner IAVF_AQ_RC_EPERM = 1, /* Operation not permitted */ 114*ca853deeSEric Joyner IAVF_AQ_RC_ENOENT = 2, /* No such element */ 115*ca853deeSEric Joyner IAVF_AQ_RC_ESRCH = 3, /* Bad opcode */ 116*ca853deeSEric Joyner IAVF_AQ_RC_EINTR = 4, /* operation interrupted */ 117*ca853deeSEric Joyner IAVF_AQ_RC_EIO = 5, /* I/O error */ 118*ca853deeSEric Joyner IAVF_AQ_RC_ENXIO = 6, /* No such resource */ 119*ca853deeSEric Joyner IAVF_AQ_RC_E2BIG = 7, /* Arg too long */ 120*ca853deeSEric Joyner IAVF_AQ_RC_EAGAIN = 8, /* Try again */ 121*ca853deeSEric Joyner IAVF_AQ_RC_ENOMEM = 9, /* Out of memory */ 122*ca853deeSEric Joyner IAVF_AQ_RC_EACCES = 10, /* Permission denied */ 123*ca853deeSEric Joyner IAVF_AQ_RC_EFAULT = 11, /* Bad address */ 124*ca853deeSEric Joyner IAVF_AQ_RC_EBUSY = 12, /* Device or resource busy */ 125*ca853deeSEric Joyner IAVF_AQ_RC_EEXIST = 13, /* object already exists */ 126*ca853deeSEric Joyner IAVF_AQ_RC_EINVAL = 14, /* Invalid argument */ 127*ca853deeSEric Joyner IAVF_AQ_RC_ENOTTY = 15, /* Not a typewriter */ 128*ca853deeSEric Joyner IAVF_AQ_RC_ENOSPC = 16, /* No space left or alloc failure */ 129*ca853deeSEric Joyner IAVF_AQ_RC_ENOSYS = 17, /* Function not implemented */ 130*ca853deeSEric Joyner IAVF_AQ_RC_ERANGE = 18, /* Parameter out of range */ 131*ca853deeSEric Joyner IAVF_AQ_RC_EFLUSHED = 19, /* Cmd flushed due to prev cmd error */ 132*ca853deeSEric Joyner IAVF_AQ_RC_BAD_ADDR = 20, /* Descriptor contains a bad pointer */ 133*ca853deeSEric Joyner IAVF_AQ_RC_EMODE = 21, /* Op not allowed in current dev mode */ 134*ca853deeSEric Joyner IAVF_AQ_RC_EFBIG = 22, /* File too large */ 135*ca853deeSEric Joyner }; 136*ca853deeSEric Joyner 137*ca853deeSEric Joyner /* Admin Queue command opcodes */ 138*ca853deeSEric Joyner enum iavf_admin_queue_opc { 139*ca853deeSEric Joyner /* aq commands */ 140*ca853deeSEric Joyner iavf_aqc_opc_get_version = 0x0001, 141*ca853deeSEric Joyner iavf_aqc_opc_driver_version = 0x0002, 142*ca853deeSEric Joyner iavf_aqc_opc_queue_shutdown = 0x0003, 143*ca853deeSEric Joyner iavf_aqc_opc_set_pf_context = 0x0004, 144*ca853deeSEric Joyner 145*ca853deeSEric Joyner /* resource ownership */ 146*ca853deeSEric Joyner iavf_aqc_opc_request_resource = 0x0008, 147*ca853deeSEric Joyner iavf_aqc_opc_release_resource = 0x0009, 148*ca853deeSEric Joyner 149*ca853deeSEric Joyner iavf_aqc_opc_list_func_capabilities = 0x000A, 150*ca853deeSEric Joyner iavf_aqc_opc_list_dev_capabilities = 0x000B, 151*ca853deeSEric Joyner 152*ca853deeSEric Joyner /* Proxy commands */ 153*ca853deeSEric Joyner iavf_aqc_opc_set_proxy_config = 0x0104, 154*ca853deeSEric Joyner iavf_aqc_opc_set_ns_proxy_table_entry = 0x0105, 155*ca853deeSEric Joyner 156*ca853deeSEric Joyner /* LAA */ 157*ca853deeSEric Joyner iavf_aqc_opc_mac_address_read = 0x0107, 158*ca853deeSEric Joyner iavf_aqc_opc_mac_address_write = 0x0108, 159*ca853deeSEric Joyner 160*ca853deeSEric Joyner /* PXE */ 161*ca853deeSEric Joyner iavf_aqc_opc_clear_pxe_mode = 0x0110, 162*ca853deeSEric Joyner 163*ca853deeSEric Joyner /* WoL commands */ 164*ca853deeSEric Joyner iavf_aqc_opc_set_wol_filter = 0x0120, 165*ca853deeSEric Joyner iavf_aqc_opc_get_wake_reason = 0x0121, 166*ca853deeSEric Joyner iavf_aqc_opc_clear_all_wol_filters = 0x025E, 167*ca853deeSEric Joyner 168*ca853deeSEric Joyner /* internal switch commands */ 169*ca853deeSEric Joyner iavf_aqc_opc_get_switch_config = 0x0200, 170*ca853deeSEric Joyner iavf_aqc_opc_add_statistics = 0x0201, 171*ca853deeSEric Joyner iavf_aqc_opc_remove_statistics = 0x0202, 172*ca853deeSEric Joyner iavf_aqc_opc_set_port_parameters = 0x0203, 173*ca853deeSEric Joyner iavf_aqc_opc_get_switch_resource_alloc = 0x0204, 174*ca853deeSEric Joyner iavf_aqc_opc_set_switch_config = 0x0205, 175*ca853deeSEric Joyner iavf_aqc_opc_rx_ctl_reg_read = 0x0206, 176*ca853deeSEric Joyner iavf_aqc_opc_rx_ctl_reg_write = 0x0207, 177*ca853deeSEric Joyner 178*ca853deeSEric Joyner iavf_aqc_opc_add_vsi = 0x0210, 179*ca853deeSEric Joyner iavf_aqc_opc_update_vsi_parameters = 0x0211, 180*ca853deeSEric Joyner iavf_aqc_opc_get_vsi_parameters = 0x0212, 181*ca853deeSEric Joyner 182*ca853deeSEric Joyner iavf_aqc_opc_add_pv = 0x0220, 183*ca853deeSEric Joyner iavf_aqc_opc_update_pv_parameters = 0x0221, 184*ca853deeSEric Joyner iavf_aqc_opc_get_pv_parameters = 0x0222, 185*ca853deeSEric Joyner 186*ca853deeSEric Joyner iavf_aqc_opc_add_veb = 0x0230, 187*ca853deeSEric Joyner iavf_aqc_opc_update_veb_parameters = 0x0231, 188*ca853deeSEric Joyner iavf_aqc_opc_get_veb_parameters = 0x0232, 189*ca853deeSEric Joyner 190*ca853deeSEric Joyner iavf_aqc_opc_delete_element = 0x0243, 191*ca853deeSEric Joyner 192*ca853deeSEric Joyner iavf_aqc_opc_add_macvlan = 0x0250, 193*ca853deeSEric Joyner iavf_aqc_opc_remove_macvlan = 0x0251, 194*ca853deeSEric Joyner iavf_aqc_opc_add_vlan = 0x0252, 195*ca853deeSEric Joyner iavf_aqc_opc_remove_vlan = 0x0253, 196*ca853deeSEric Joyner iavf_aqc_opc_set_vsi_promiscuous_modes = 0x0254, 197*ca853deeSEric Joyner iavf_aqc_opc_add_tag = 0x0255, 198*ca853deeSEric Joyner iavf_aqc_opc_remove_tag = 0x0256, 199*ca853deeSEric Joyner iavf_aqc_opc_add_multicast_etag = 0x0257, 200*ca853deeSEric Joyner iavf_aqc_opc_remove_multicast_etag = 0x0258, 201*ca853deeSEric Joyner iavf_aqc_opc_update_tag = 0x0259, 202*ca853deeSEric Joyner iavf_aqc_opc_add_control_packet_filter = 0x025A, 203*ca853deeSEric Joyner iavf_aqc_opc_remove_control_packet_filter = 0x025B, 204*ca853deeSEric Joyner iavf_aqc_opc_add_cloud_filters = 0x025C, 205*ca853deeSEric Joyner iavf_aqc_opc_remove_cloud_filters = 0x025D, 206*ca853deeSEric Joyner iavf_aqc_opc_clear_wol_switch_filters = 0x025E, 207*ca853deeSEric Joyner iavf_aqc_opc_replace_cloud_filters = 0x025F, 208*ca853deeSEric Joyner 209*ca853deeSEric Joyner iavf_aqc_opc_add_mirror_rule = 0x0260, 210*ca853deeSEric Joyner iavf_aqc_opc_delete_mirror_rule = 0x0261, 211*ca853deeSEric Joyner 212*ca853deeSEric Joyner /* Dynamic Device Personalization */ 213*ca853deeSEric Joyner iavf_aqc_opc_write_personalization_profile = 0x0270, 214*ca853deeSEric Joyner iavf_aqc_opc_get_personalization_profile_list = 0x0271, 215*ca853deeSEric Joyner 216*ca853deeSEric Joyner /* DCB commands */ 217*ca853deeSEric Joyner iavf_aqc_opc_dcb_ignore_pfc = 0x0301, 218*ca853deeSEric Joyner iavf_aqc_opc_dcb_updated = 0x0302, 219*ca853deeSEric Joyner iavf_aqc_opc_set_dcb_parameters = 0x0303, 220*ca853deeSEric Joyner 221*ca853deeSEric Joyner /* TX scheduler */ 222*ca853deeSEric Joyner iavf_aqc_opc_configure_vsi_bw_limit = 0x0400, 223*ca853deeSEric Joyner iavf_aqc_opc_configure_vsi_ets_sla_bw_limit = 0x0406, 224*ca853deeSEric Joyner iavf_aqc_opc_configure_vsi_tc_bw = 0x0407, 225*ca853deeSEric Joyner iavf_aqc_opc_query_vsi_bw_config = 0x0408, 226*ca853deeSEric Joyner iavf_aqc_opc_query_vsi_ets_sla_config = 0x040A, 227*ca853deeSEric Joyner iavf_aqc_opc_configure_switching_comp_bw_limit = 0x0410, 228*ca853deeSEric Joyner 229*ca853deeSEric Joyner iavf_aqc_opc_enable_switching_comp_ets = 0x0413, 230*ca853deeSEric Joyner iavf_aqc_opc_modify_switching_comp_ets = 0x0414, 231*ca853deeSEric Joyner iavf_aqc_opc_disable_switching_comp_ets = 0x0415, 232*ca853deeSEric Joyner iavf_aqc_opc_configure_switching_comp_ets_bw_limit = 0x0416, 233*ca853deeSEric Joyner iavf_aqc_opc_configure_switching_comp_bw_config = 0x0417, 234*ca853deeSEric Joyner iavf_aqc_opc_query_switching_comp_ets_config = 0x0418, 235*ca853deeSEric Joyner iavf_aqc_opc_query_port_ets_config = 0x0419, 236*ca853deeSEric Joyner iavf_aqc_opc_query_switching_comp_bw_config = 0x041A, 237*ca853deeSEric Joyner iavf_aqc_opc_suspend_port_tx = 0x041B, 238*ca853deeSEric Joyner iavf_aqc_opc_resume_port_tx = 0x041C, 239*ca853deeSEric Joyner iavf_aqc_opc_configure_partition_bw = 0x041D, 240*ca853deeSEric Joyner /* hmc */ 241*ca853deeSEric Joyner iavf_aqc_opc_query_hmc_resource_profile = 0x0500, 242*ca853deeSEric Joyner iavf_aqc_opc_set_hmc_resource_profile = 0x0501, 243*ca853deeSEric Joyner 244*ca853deeSEric Joyner /* phy commands*/ 245*ca853deeSEric Joyner 246*ca853deeSEric Joyner /* phy commands*/ 247*ca853deeSEric Joyner iavf_aqc_opc_get_phy_abilities = 0x0600, 248*ca853deeSEric Joyner iavf_aqc_opc_set_phy_config = 0x0601, 249*ca853deeSEric Joyner iavf_aqc_opc_set_mac_config = 0x0603, 250*ca853deeSEric Joyner iavf_aqc_opc_set_link_restart_an = 0x0605, 251*ca853deeSEric Joyner iavf_aqc_opc_get_link_status = 0x0607, 252*ca853deeSEric Joyner iavf_aqc_opc_set_phy_int_mask = 0x0613, 253*ca853deeSEric Joyner iavf_aqc_opc_get_local_advt_reg = 0x0614, 254*ca853deeSEric Joyner iavf_aqc_opc_set_local_advt_reg = 0x0615, 255*ca853deeSEric Joyner iavf_aqc_opc_get_partner_advt = 0x0616, 256*ca853deeSEric Joyner iavf_aqc_opc_set_lb_modes = 0x0618, 257*ca853deeSEric Joyner iavf_aqc_opc_get_phy_wol_caps = 0x0621, 258*ca853deeSEric Joyner iavf_aqc_opc_set_phy_debug = 0x0622, 259*ca853deeSEric Joyner iavf_aqc_opc_upload_ext_phy_fm = 0x0625, 260*ca853deeSEric Joyner iavf_aqc_opc_run_phy_activity = 0x0626, 261*ca853deeSEric Joyner iavf_aqc_opc_set_phy_register = 0x0628, 262*ca853deeSEric Joyner iavf_aqc_opc_get_phy_register = 0x0629, 263*ca853deeSEric Joyner 264*ca853deeSEric Joyner /* NVM commands */ 265*ca853deeSEric Joyner iavf_aqc_opc_nvm_read = 0x0701, 266*ca853deeSEric Joyner iavf_aqc_opc_nvm_erase = 0x0702, 267*ca853deeSEric Joyner iavf_aqc_opc_nvm_update = 0x0703, 268*ca853deeSEric Joyner iavf_aqc_opc_nvm_config_read = 0x0704, 269*ca853deeSEric Joyner iavf_aqc_opc_nvm_config_write = 0x0705, 270*ca853deeSEric Joyner iavf_aqc_opc_nvm_progress = 0x0706, 271*ca853deeSEric Joyner iavf_aqc_opc_oem_post_update = 0x0720, 272*ca853deeSEric Joyner iavf_aqc_opc_thermal_sensor = 0x0721, 273*ca853deeSEric Joyner 274*ca853deeSEric Joyner /* virtualization commands */ 275*ca853deeSEric Joyner iavf_aqc_opc_send_msg_to_pf = 0x0801, 276*ca853deeSEric Joyner iavf_aqc_opc_send_msg_to_vf = 0x0802, 277*ca853deeSEric Joyner iavf_aqc_opc_send_msg_to_peer = 0x0803, 278*ca853deeSEric Joyner 279*ca853deeSEric Joyner /* alternate structure */ 280*ca853deeSEric Joyner iavf_aqc_opc_alternate_write = 0x0900, 281*ca853deeSEric Joyner iavf_aqc_opc_alternate_write_indirect = 0x0901, 282*ca853deeSEric Joyner iavf_aqc_opc_alternate_read = 0x0902, 283*ca853deeSEric Joyner iavf_aqc_opc_alternate_read_indirect = 0x0903, 284*ca853deeSEric Joyner iavf_aqc_opc_alternate_write_done = 0x0904, 285*ca853deeSEric Joyner iavf_aqc_opc_alternate_set_mode = 0x0905, 286*ca853deeSEric Joyner iavf_aqc_opc_alternate_clear_port = 0x0906, 287*ca853deeSEric Joyner 288*ca853deeSEric Joyner /* LLDP commands */ 289*ca853deeSEric Joyner iavf_aqc_opc_lldp_get_mib = 0x0A00, 290*ca853deeSEric Joyner iavf_aqc_opc_lldp_update_mib = 0x0A01, 291*ca853deeSEric Joyner iavf_aqc_opc_lldp_add_tlv = 0x0A02, 292*ca853deeSEric Joyner iavf_aqc_opc_lldp_update_tlv = 0x0A03, 293*ca853deeSEric Joyner iavf_aqc_opc_lldp_delete_tlv = 0x0A04, 294*ca853deeSEric Joyner iavf_aqc_opc_lldp_stop = 0x0A05, 295*ca853deeSEric Joyner iavf_aqc_opc_lldp_start = 0x0A06, 296*ca853deeSEric Joyner iavf_aqc_opc_get_cee_dcb_cfg = 0x0A07, 297*ca853deeSEric Joyner iavf_aqc_opc_lldp_set_local_mib = 0x0A08, 298*ca853deeSEric Joyner iavf_aqc_opc_lldp_stop_start_spec_agent = 0x0A09, 299*ca853deeSEric Joyner 300*ca853deeSEric Joyner /* Tunnel commands */ 301*ca853deeSEric Joyner iavf_aqc_opc_add_udp_tunnel = 0x0B00, 302*ca853deeSEric Joyner iavf_aqc_opc_del_udp_tunnel = 0x0B01, 303*ca853deeSEric Joyner iavf_aqc_opc_set_rss_key = 0x0B02, 304*ca853deeSEric Joyner iavf_aqc_opc_set_rss_lut = 0x0B03, 305*ca853deeSEric Joyner iavf_aqc_opc_get_rss_key = 0x0B04, 306*ca853deeSEric Joyner iavf_aqc_opc_get_rss_lut = 0x0B05, 307*ca853deeSEric Joyner 308*ca853deeSEric Joyner /* Async Events */ 309*ca853deeSEric Joyner iavf_aqc_opc_event_lan_overflow = 0x1001, 310*ca853deeSEric Joyner 311*ca853deeSEric Joyner /* OEM commands */ 312*ca853deeSEric Joyner iavf_aqc_opc_oem_parameter_change = 0xFE00, 313*ca853deeSEric Joyner iavf_aqc_opc_oem_device_status_change = 0xFE01, 314*ca853deeSEric Joyner iavf_aqc_opc_oem_ocsd_initialize = 0xFE02, 315*ca853deeSEric Joyner iavf_aqc_opc_oem_ocbb_initialize = 0xFE03, 316*ca853deeSEric Joyner 317*ca853deeSEric Joyner /* debug commands */ 318*ca853deeSEric Joyner iavf_aqc_opc_debug_read_reg = 0xFF03, 319*ca853deeSEric Joyner iavf_aqc_opc_debug_write_reg = 0xFF04, 320*ca853deeSEric Joyner iavf_aqc_opc_debug_modify_reg = 0xFF07, 321*ca853deeSEric Joyner iavf_aqc_opc_debug_dump_internals = 0xFF08, 322*ca853deeSEric Joyner }; 323*ca853deeSEric Joyner 324*ca853deeSEric Joyner /* command structures and indirect data structures */ 325*ca853deeSEric Joyner 326*ca853deeSEric Joyner /* Structure naming conventions: 327*ca853deeSEric Joyner * - no suffix for direct command descriptor structures 328*ca853deeSEric Joyner * - _data for indirect sent data 329*ca853deeSEric Joyner * - _resp for indirect return data (data which is both will use _data) 330*ca853deeSEric Joyner * - _completion for direct return data 331*ca853deeSEric Joyner * - _element_ for repeated elements (may also be _data or _resp) 332*ca853deeSEric Joyner * 333*ca853deeSEric Joyner * Command structures are expected to overlay the params.raw member of the basic 334*ca853deeSEric Joyner * descriptor, and as such cannot exceed 16 bytes in length. 335*ca853deeSEric Joyner */ 336*ca853deeSEric Joyner 337*ca853deeSEric Joyner /* This macro is used to generate a compilation error if a structure 338*ca853deeSEric Joyner * is not exactly the correct length. It gives a divide by zero error if the 339*ca853deeSEric Joyner * structure is not of the correct size, otherwise it creates an enum that is 340*ca853deeSEric Joyner * never used. 341*ca853deeSEric Joyner */ 342*ca853deeSEric Joyner #define IAVF_CHECK_STRUCT_LEN(n, X) enum iavf_static_assert_enum_##X \ 343*ca853deeSEric Joyner { iavf_static_assert_##X = (n)/((sizeof(struct X) == (n)) ? 1 : 0) } 344*ca853deeSEric Joyner 345*ca853deeSEric Joyner /* This macro is used extensively to ensure that command structures are 16 346*ca853deeSEric Joyner * bytes in length as they have to map to the raw array of that size. 347*ca853deeSEric Joyner */ 348*ca853deeSEric Joyner #define IAVF_CHECK_CMD_LENGTH(X) IAVF_CHECK_STRUCT_LEN(16, X) 349*ca853deeSEric Joyner 350*ca853deeSEric Joyner /* Queue Shutdown (direct 0x0003) */ 351*ca853deeSEric Joyner struct iavf_aqc_queue_shutdown { 352*ca853deeSEric Joyner __le32 driver_unloading; 353*ca853deeSEric Joyner #define IAVF_AQ_DRIVER_UNLOADING 0x1 354*ca853deeSEric Joyner u8 reserved[12]; 355*ca853deeSEric Joyner }; 356*ca853deeSEric Joyner 357*ca853deeSEric Joyner IAVF_CHECK_CMD_LENGTH(iavf_aqc_queue_shutdown); 358*ca853deeSEric Joyner 359*ca853deeSEric Joyner #define IAVF_AQC_WOL_PRESERVE_STATUS 0x200 360*ca853deeSEric Joyner #define IAVF_AQC_MC_MAG_EN 0x0100 361*ca853deeSEric Joyner #define IAVF_AQC_WOL_PRESERVE_ON_PFR 0x0200 362*ca853deeSEric Joyner 363*ca853deeSEric Joyner struct iavf_aqc_vsi_properties_data { 364*ca853deeSEric Joyner /* first 96 byte are written by SW */ 365*ca853deeSEric Joyner __le16 valid_sections; 366*ca853deeSEric Joyner #define IAVF_AQ_VSI_PROP_SWITCH_VALID 0x0001 367*ca853deeSEric Joyner #define IAVF_AQ_VSI_PROP_SECURITY_VALID 0x0002 368*ca853deeSEric Joyner #define IAVF_AQ_VSI_PROP_VLAN_VALID 0x0004 369*ca853deeSEric Joyner #define IAVF_AQ_VSI_PROP_CAS_PV_VALID 0x0008 370*ca853deeSEric Joyner #define IAVF_AQ_VSI_PROP_INGRESS_UP_VALID 0x0010 371*ca853deeSEric Joyner #define IAVF_AQ_VSI_PROP_EGRESS_UP_VALID 0x0020 372*ca853deeSEric Joyner #define IAVF_AQ_VSI_PROP_QUEUE_MAP_VALID 0x0040 373*ca853deeSEric Joyner #define IAVF_AQ_VSI_PROP_QUEUE_OPT_VALID 0x0080 374*ca853deeSEric Joyner #define IAVF_AQ_VSI_PROP_OUTER_UP_VALID 0x0100 375*ca853deeSEric Joyner #define IAVF_AQ_VSI_PROP_SCHED_VALID 0x0200 376*ca853deeSEric Joyner /* switch section */ 377*ca853deeSEric Joyner __le16 switch_id; /* 12bit id combined with flags below */ 378*ca853deeSEric Joyner #define IAVF_AQ_VSI_SW_ID_SHIFT 0x0000 379*ca853deeSEric Joyner #define IAVF_AQ_VSI_SW_ID_MASK (0xFFF << IAVF_AQ_VSI_SW_ID_SHIFT) 380*ca853deeSEric Joyner #define IAVF_AQ_VSI_SW_ID_FLAG_NOT_STAG 0x1000 381*ca853deeSEric Joyner #define IAVF_AQ_VSI_SW_ID_FLAG_ALLOW_LB 0x2000 382*ca853deeSEric Joyner #define IAVF_AQ_VSI_SW_ID_FLAG_LOCAL_LB 0x4000 383*ca853deeSEric Joyner u8 sw_reserved[2]; 384*ca853deeSEric Joyner /* security section */ 385*ca853deeSEric Joyner u8 sec_flags; 386*ca853deeSEric Joyner #define IAVF_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD 0x01 387*ca853deeSEric Joyner #define IAVF_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK 0x02 388*ca853deeSEric Joyner #define IAVF_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK 0x04 389*ca853deeSEric Joyner u8 sec_reserved; 390*ca853deeSEric Joyner /* VLAN section */ 391*ca853deeSEric Joyner __le16 pvid; /* VLANS include priority bits */ 392*ca853deeSEric Joyner __le16 fcoe_pvid; 393*ca853deeSEric Joyner u8 port_vlan_flags; 394*ca853deeSEric Joyner #define IAVF_AQ_VSI_PVLAN_MODE_SHIFT 0x00 395*ca853deeSEric Joyner #define IAVF_AQ_VSI_PVLAN_MODE_MASK (0x03 << \ 396*ca853deeSEric Joyner IAVF_AQ_VSI_PVLAN_MODE_SHIFT) 397*ca853deeSEric Joyner #define IAVF_AQ_VSI_PVLAN_MODE_TAGGED 0x01 398*ca853deeSEric Joyner #define IAVF_AQ_VSI_PVLAN_MODE_UNTAGGED 0x02 399*ca853deeSEric Joyner #define IAVF_AQ_VSI_PVLAN_MODE_ALL 0x03 400*ca853deeSEric Joyner #define IAVF_AQ_VSI_PVLAN_INSERT_PVID 0x04 401*ca853deeSEric Joyner #define IAVF_AQ_VSI_PVLAN_EMOD_SHIFT 0x03 402*ca853deeSEric Joyner #define IAVF_AQ_VSI_PVLAN_EMOD_MASK (0x3 << \ 403*ca853deeSEric Joyner IAVF_AQ_VSI_PVLAN_EMOD_SHIFT) 404*ca853deeSEric Joyner #define IAVF_AQ_VSI_PVLAN_EMOD_STR_BOTH 0x0 405*ca853deeSEric Joyner #define IAVF_AQ_VSI_PVLAN_EMOD_STR_UP 0x08 406*ca853deeSEric Joyner #define IAVF_AQ_VSI_PVLAN_EMOD_STR 0x10 407*ca853deeSEric Joyner #define IAVF_AQ_VSI_PVLAN_EMOD_NOTHING 0x18 408*ca853deeSEric Joyner u8 pvlan_reserved[3]; 409*ca853deeSEric Joyner /* ingress egress up sections */ 410*ca853deeSEric Joyner __le32 ingress_table; /* bitmap, 3 bits per up */ 411*ca853deeSEric Joyner #define IAVF_AQ_VSI_UP_TABLE_UP0_SHIFT 0 412*ca853deeSEric Joyner #define IAVF_AQ_VSI_UP_TABLE_UP0_MASK (0x7 << \ 413*ca853deeSEric Joyner IAVF_AQ_VSI_UP_TABLE_UP0_SHIFT) 414*ca853deeSEric Joyner #define IAVF_AQ_VSI_UP_TABLE_UP1_SHIFT 3 415*ca853deeSEric Joyner #define IAVF_AQ_VSI_UP_TABLE_UP1_MASK (0x7 << \ 416*ca853deeSEric Joyner IAVF_AQ_VSI_UP_TABLE_UP1_SHIFT) 417*ca853deeSEric Joyner #define IAVF_AQ_VSI_UP_TABLE_UP2_SHIFT 6 418*ca853deeSEric Joyner #define IAVF_AQ_VSI_UP_TABLE_UP2_MASK (0x7 << \ 419*ca853deeSEric Joyner IAVF_AQ_VSI_UP_TABLE_UP2_SHIFT) 420*ca853deeSEric Joyner #define IAVF_AQ_VSI_UP_TABLE_UP3_SHIFT 9 421*ca853deeSEric Joyner #define IAVF_AQ_VSI_UP_TABLE_UP3_MASK (0x7 << \ 422*ca853deeSEric Joyner IAVF_AQ_VSI_UP_TABLE_UP3_SHIFT) 423*ca853deeSEric Joyner #define IAVF_AQ_VSI_UP_TABLE_UP4_SHIFT 12 424*ca853deeSEric Joyner #define IAVF_AQ_VSI_UP_TABLE_UP4_MASK (0x7 << \ 425*ca853deeSEric Joyner IAVF_AQ_VSI_UP_TABLE_UP4_SHIFT) 426*ca853deeSEric Joyner #define IAVF_AQ_VSI_UP_TABLE_UP5_SHIFT 15 427*ca853deeSEric Joyner #define IAVF_AQ_VSI_UP_TABLE_UP5_MASK (0x7 << \ 428*ca853deeSEric Joyner IAVF_AQ_VSI_UP_TABLE_UP5_SHIFT) 429*ca853deeSEric Joyner #define IAVF_AQ_VSI_UP_TABLE_UP6_SHIFT 18 430*ca853deeSEric Joyner #define IAVF_AQ_VSI_UP_TABLE_UP6_MASK (0x7 << \ 431*ca853deeSEric Joyner IAVF_AQ_VSI_UP_TABLE_UP6_SHIFT) 432*ca853deeSEric Joyner #define IAVF_AQ_VSI_UP_TABLE_UP7_SHIFT 21 433*ca853deeSEric Joyner #define IAVF_AQ_VSI_UP_TABLE_UP7_MASK (0x7 << \ 434*ca853deeSEric Joyner IAVF_AQ_VSI_UP_TABLE_UP7_SHIFT) 435*ca853deeSEric Joyner __le32 egress_table; /* same defines as for ingress table */ 436*ca853deeSEric Joyner /* cascaded PV section */ 437*ca853deeSEric Joyner __le16 cas_pv_tag; 438*ca853deeSEric Joyner u8 cas_pv_flags; 439*ca853deeSEric Joyner #define IAVF_AQ_VSI_CAS_PV_TAGX_SHIFT 0x00 440*ca853deeSEric Joyner #define IAVF_AQ_VSI_CAS_PV_TAGX_MASK (0x03 << \ 441*ca853deeSEric Joyner IAVF_AQ_VSI_CAS_PV_TAGX_SHIFT) 442*ca853deeSEric Joyner #define IAVF_AQ_VSI_CAS_PV_TAGX_LEAVE 0x00 443*ca853deeSEric Joyner #define IAVF_AQ_VSI_CAS_PV_TAGX_REMOVE 0x01 444*ca853deeSEric Joyner #define IAVF_AQ_VSI_CAS_PV_TAGX_COPY 0x02 445*ca853deeSEric Joyner #define IAVF_AQ_VSI_CAS_PV_INSERT_TAG 0x10 446*ca853deeSEric Joyner #define IAVF_AQ_VSI_CAS_PV_ETAG_PRUNE 0x20 447*ca853deeSEric Joyner #define IAVF_AQ_VSI_CAS_PV_ACCEPT_HOST_TAG 0x40 448*ca853deeSEric Joyner u8 cas_pv_reserved; 449*ca853deeSEric Joyner /* queue mapping section */ 450*ca853deeSEric Joyner __le16 mapping_flags; 451*ca853deeSEric Joyner #define IAVF_AQ_VSI_QUE_MAP_CONTIG 0x0 452*ca853deeSEric Joyner #define IAVF_AQ_VSI_QUE_MAP_NONCONTIG 0x1 453*ca853deeSEric Joyner __le16 queue_mapping[16]; 454*ca853deeSEric Joyner #define IAVF_AQ_VSI_QUEUE_SHIFT 0x0 455*ca853deeSEric Joyner #define IAVF_AQ_VSI_QUEUE_MASK (0x7FF << IAVF_AQ_VSI_QUEUE_SHIFT) 456*ca853deeSEric Joyner __le16 tc_mapping[8]; 457*ca853deeSEric Joyner #define IAVF_AQ_VSI_TC_QUE_OFFSET_SHIFT 0 458*ca853deeSEric Joyner #define IAVF_AQ_VSI_TC_QUE_OFFSET_MASK (0x1FF << \ 459*ca853deeSEric Joyner IAVF_AQ_VSI_TC_QUE_OFFSET_SHIFT) 460*ca853deeSEric Joyner #define IAVF_AQ_VSI_TC_QUE_NUMBER_SHIFT 9 461*ca853deeSEric Joyner #define IAVF_AQ_VSI_TC_QUE_NUMBER_MASK (0x7 << \ 462*ca853deeSEric Joyner IAVF_AQ_VSI_TC_QUE_NUMBER_SHIFT) 463*ca853deeSEric Joyner /* queueing option section */ 464*ca853deeSEric Joyner u8 queueing_opt_flags; 465*ca853deeSEric Joyner #define IAVF_AQ_VSI_QUE_OPT_MULTICAST_UDP_ENA 0x04 466*ca853deeSEric Joyner #define IAVF_AQ_VSI_QUE_OPT_UNICAST_UDP_ENA 0x08 467*ca853deeSEric Joyner #define IAVF_AQ_VSI_QUE_OPT_TCP_ENA 0x10 468*ca853deeSEric Joyner #define IAVF_AQ_VSI_QUE_OPT_FCOE_ENA 0x20 469*ca853deeSEric Joyner #define IAVF_AQ_VSI_QUE_OPT_RSS_LUT_PF 0x00 470*ca853deeSEric Joyner #define IAVF_AQ_VSI_QUE_OPT_RSS_LUT_VSI 0x40 471*ca853deeSEric Joyner u8 queueing_opt_reserved[3]; 472*ca853deeSEric Joyner /* scheduler section */ 473*ca853deeSEric Joyner u8 up_enable_bits; 474*ca853deeSEric Joyner u8 sched_reserved; 475*ca853deeSEric Joyner /* outer up section */ 476*ca853deeSEric Joyner __le32 outer_up_table; /* same structure and defines as ingress tbl */ 477*ca853deeSEric Joyner u8 cmd_reserved[8]; 478*ca853deeSEric Joyner /* last 32 bytes are written by FW */ 479*ca853deeSEric Joyner __le16 qs_handle[8]; 480*ca853deeSEric Joyner #define IAVF_AQ_VSI_QS_HANDLE_INVALID 0xFFFF 481*ca853deeSEric Joyner __le16 stat_counter_idx; 482*ca853deeSEric Joyner __le16 sched_id; 483*ca853deeSEric Joyner u8 resp_reserved[12]; 484*ca853deeSEric Joyner }; 485*ca853deeSEric Joyner 486*ca853deeSEric Joyner IAVF_CHECK_STRUCT_LEN(128, iavf_aqc_vsi_properties_data); 487*ca853deeSEric Joyner 488*ca853deeSEric Joyner /* Get VEB Parameters (direct 0x0232) 489*ca853deeSEric Joyner * uses iavf_aqc_switch_seid for the descriptor 490*ca853deeSEric Joyner */ 491*ca853deeSEric Joyner struct iavf_aqc_get_veb_parameters_completion { 492*ca853deeSEric Joyner __le16 seid; 493*ca853deeSEric Joyner __le16 switch_id; 494*ca853deeSEric Joyner __le16 veb_flags; /* only the first/last flags from 0x0230 is valid */ 495*ca853deeSEric Joyner __le16 statistic_index; 496*ca853deeSEric Joyner __le16 vebs_used; 497*ca853deeSEric Joyner __le16 vebs_free; 498*ca853deeSEric Joyner u8 reserved[4]; 499*ca853deeSEric Joyner }; 500*ca853deeSEric Joyner 501*ca853deeSEric Joyner IAVF_CHECK_CMD_LENGTH(iavf_aqc_get_veb_parameters_completion); 502*ca853deeSEric Joyner 503*ca853deeSEric Joyner #define IAVF_LINK_SPEED_100MB_SHIFT 0x1 504*ca853deeSEric Joyner #define IAVF_LINK_SPEED_1000MB_SHIFT 0x2 505*ca853deeSEric Joyner #define IAVF_LINK_SPEED_10GB_SHIFT 0x3 506*ca853deeSEric Joyner #define IAVF_LINK_SPEED_40GB_SHIFT 0x4 507*ca853deeSEric Joyner #define IAVF_LINK_SPEED_20GB_SHIFT 0x5 508*ca853deeSEric Joyner #define IAVF_LINK_SPEED_25GB_SHIFT 0x6 509*ca853deeSEric Joyner 510*ca853deeSEric Joyner enum iavf_aq_link_speed { 511*ca853deeSEric Joyner IAVF_LINK_SPEED_UNKNOWN = 0, 512*ca853deeSEric Joyner IAVF_LINK_SPEED_100MB = (1 << IAVF_LINK_SPEED_100MB_SHIFT), 513*ca853deeSEric Joyner IAVF_LINK_SPEED_1GB = (1 << IAVF_LINK_SPEED_1000MB_SHIFT), 514*ca853deeSEric Joyner IAVF_LINK_SPEED_10GB = (1 << IAVF_LINK_SPEED_10GB_SHIFT), 515*ca853deeSEric Joyner IAVF_LINK_SPEED_40GB = (1 << IAVF_LINK_SPEED_40GB_SHIFT), 516*ca853deeSEric Joyner IAVF_LINK_SPEED_20GB = (1 << IAVF_LINK_SPEED_20GB_SHIFT), 517*ca853deeSEric Joyner IAVF_LINK_SPEED_25GB = (1 << IAVF_LINK_SPEED_25GB_SHIFT), 518*ca853deeSEric Joyner }; 519*ca853deeSEric Joyner 520*ca853deeSEric Joyner #define IAVF_AQ_LINK_UP_FUNCTION 0x01 521*ca853deeSEric Joyner 522*ca853deeSEric Joyner /* Send to PF command (indirect 0x0801) id is only used by PF 523*ca853deeSEric Joyner * Send to VF command (indirect 0x0802) id is only used by PF 524*ca853deeSEric Joyner * Send to Peer PF command (indirect 0x0803) 525*ca853deeSEric Joyner */ 526*ca853deeSEric Joyner struct iavf_aqc_pf_vf_message { 527*ca853deeSEric Joyner __le32 id; 528*ca853deeSEric Joyner u8 reserved[4]; 529*ca853deeSEric Joyner __le32 addr_high; 530*ca853deeSEric Joyner __le32 addr_low; 531*ca853deeSEric Joyner }; 532*ca853deeSEric Joyner 533*ca853deeSEric Joyner IAVF_CHECK_CMD_LENGTH(iavf_aqc_pf_vf_message); 534*ca853deeSEric Joyner 535*ca853deeSEric Joyner /* Get CEE DCBX Oper Config (0x0A07) 536*ca853deeSEric Joyner * uses the generic descriptor struct 537*ca853deeSEric Joyner * returns below as indirect response 538*ca853deeSEric Joyner */ 539*ca853deeSEric Joyner 540*ca853deeSEric Joyner #define IAVF_AQC_CEE_APP_FCOE_SHIFT 0x0 541*ca853deeSEric Joyner #define IAVF_AQC_CEE_APP_FCOE_MASK (0x7 << IAVF_AQC_CEE_APP_FCOE_SHIFT) 542*ca853deeSEric Joyner #define IAVF_AQC_CEE_APP_ISCSI_SHIFT 0x3 543*ca853deeSEric Joyner #define IAVF_AQC_CEE_APP_ISCSI_MASK (0x7 << IAVF_AQC_CEE_APP_ISCSI_SHIFT) 544*ca853deeSEric Joyner #define IAVF_AQC_CEE_APP_FIP_SHIFT 0x8 545*ca853deeSEric Joyner #define IAVF_AQC_CEE_APP_FIP_MASK (0x7 << IAVF_AQC_CEE_APP_FIP_SHIFT) 546*ca853deeSEric Joyner 547*ca853deeSEric Joyner #define IAVF_AQC_CEE_PG_STATUS_SHIFT 0x0 548*ca853deeSEric Joyner #define IAVF_AQC_CEE_PG_STATUS_MASK (0x7 << IAVF_AQC_CEE_PG_STATUS_SHIFT) 549*ca853deeSEric Joyner #define IAVF_AQC_CEE_PFC_STATUS_SHIFT 0x3 550*ca853deeSEric Joyner #define IAVF_AQC_CEE_PFC_STATUS_MASK (0x7 << IAVF_AQC_CEE_PFC_STATUS_SHIFT) 551*ca853deeSEric Joyner #define IAVF_AQC_CEE_APP_STATUS_SHIFT 0x8 552*ca853deeSEric Joyner #define IAVF_AQC_CEE_APP_STATUS_MASK (0x7 << IAVF_AQC_CEE_APP_STATUS_SHIFT) 553*ca853deeSEric Joyner #define IAVF_AQC_CEE_FCOE_STATUS_SHIFT 0x8 554*ca853deeSEric Joyner #define IAVF_AQC_CEE_FCOE_STATUS_MASK (0x7 << IAVF_AQC_CEE_FCOE_STATUS_SHIFT) 555*ca853deeSEric Joyner #define IAVF_AQC_CEE_ISCSI_STATUS_SHIFT 0xB 556*ca853deeSEric Joyner #define IAVF_AQC_CEE_ISCSI_STATUS_MASK (0x7 << IAVF_AQC_CEE_ISCSI_STATUS_SHIFT) 557*ca853deeSEric Joyner #define IAVF_AQC_CEE_FIP_STATUS_SHIFT 0x10 558*ca853deeSEric Joyner #define IAVF_AQC_CEE_FIP_STATUS_MASK (0x7 << IAVF_AQC_CEE_FIP_STATUS_SHIFT) 559*ca853deeSEric Joyner 560*ca853deeSEric Joyner /* struct iavf_aqc_get_cee_dcb_cfg_v1_resp was originally defined with 561*ca853deeSEric Joyner * word boundary layout issues, which the Linux compilers silently deal 562*ca853deeSEric Joyner * with by adding padding, making the actual struct larger than designed. 563*ca853deeSEric Joyner * However, the FW compiler for the NIC is less lenient and complains 564*ca853deeSEric Joyner * about the struct. Hence, the struct defined here has an extra byte in 565*ca853deeSEric Joyner * fields reserved3 and reserved4 to directly acknowledge that padding, 566*ca853deeSEric Joyner * and the new length is used in the length check macro. 567*ca853deeSEric Joyner */ 568*ca853deeSEric Joyner struct iavf_aqc_get_cee_dcb_cfg_v1_resp { 569*ca853deeSEric Joyner u8 reserved1; 570*ca853deeSEric Joyner u8 oper_num_tc; 571*ca853deeSEric Joyner u8 oper_prio_tc[4]; 572*ca853deeSEric Joyner u8 reserved2; 573*ca853deeSEric Joyner u8 oper_tc_bw[8]; 574*ca853deeSEric Joyner u8 oper_pfc_en; 575*ca853deeSEric Joyner u8 reserved3[2]; 576*ca853deeSEric Joyner __le16 oper_app_prio; 577*ca853deeSEric Joyner u8 reserved4[2]; 578*ca853deeSEric Joyner __le16 tlv_status; 579*ca853deeSEric Joyner }; 580*ca853deeSEric Joyner 581*ca853deeSEric Joyner IAVF_CHECK_STRUCT_LEN(0x18, iavf_aqc_get_cee_dcb_cfg_v1_resp); 582*ca853deeSEric Joyner 583*ca853deeSEric Joyner struct iavf_aqc_get_cee_dcb_cfg_resp { 584*ca853deeSEric Joyner u8 oper_num_tc; 585*ca853deeSEric Joyner u8 oper_prio_tc[4]; 586*ca853deeSEric Joyner u8 oper_tc_bw[8]; 587*ca853deeSEric Joyner u8 oper_pfc_en; 588*ca853deeSEric Joyner __le16 oper_app_prio; 589*ca853deeSEric Joyner __le32 tlv_status; 590*ca853deeSEric Joyner u8 reserved[12]; 591*ca853deeSEric Joyner }; 592*ca853deeSEric Joyner 593*ca853deeSEric Joyner IAVF_CHECK_STRUCT_LEN(0x20, iavf_aqc_get_cee_dcb_cfg_resp); 594*ca853deeSEric Joyner 595*ca853deeSEric Joyner /* Set Local LLDP MIB (indirect 0x0A08) 596*ca853deeSEric Joyner * Used to replace the local MIB of a given LLDP agent. e.g. DCBx 597*ca853deeSEric Joyner */ 598*ca853deeSEric Joyner struct iavf_aqc_lldp_set_local_mib { 599*ca853deeSEric Joyner #define SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT 0 600*ca853deeSEric Joyner #define SET_LOCAL_MIB_AC_TYPE_DCBX_MASK (1 << \ 601*ca853deeSEric Joyner SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT) 602*ca853deeSEric Joyner #define SET_LOCAL_MIB_AC_TYPE_LOCAL_MIB 0x0 603*ca853deeSEric Joyner #define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_SHIFT (1) 604*ca853deeSEric Joyner #define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_MASK (1 << \ 605*ca853deeSEric Joyner SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_SHIFT) 606*ca853deeSEric Joyner #define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS 0x1 607*ca853deeSEric Joyner u8 type; 608*ca853deeSEric Joyner u8 reserved0; 609*ca853deeSEric Joyner __le16 length; 610*ca853deeSEric Joyner u8 reserved1[4]; 611*ca853deeSEric Joyner __le32 address_high; 612*ca853deeSEric Joyner __le32 address_low; 613*ca853deeSEric Joyner }; 614*ca853deeSEric Joyner 615*ca853deeSEric Joyner IAVF_CHECK_CMD_LENGTH(iavf_aqc_lldp_set_local_mib); 616*ca853deeSEric Joyner 617*ca853deeSEric Joyner struct iavf_aqc_lldp_set_local_mib_resp { 618*ca853deeSEric Joyner #define SET_LOCAL_MIB_RESP_EVENT_TRIGGERED_MASK 0x01 619*ca853deeSEric Joyner u8 status; 620*ca853deeSEric Joyner u8 reserved[15]; 621*ca853deeSEric Joyner }; 622*ca853deeSEric Joyner 623*ca853deeSEric Joyner IAVF_CHECK_STRUCT_LEN(0x10, iavf_aqc_lldp_set_local_mib_resp); 624*ca853deeSEric Joyner 625*ca853deeSEric Joyner /* Stop/Start LLDP Agent (direct 0x0A09) 626*ca853deeSEric Joyner * Used for stopping/starting specific LLDP agent. e.g. DCBx 627*ca853deeSEric Joyner */ 628*ca853deeSEric Joyner struct iavf_aqc_lldp_stop_start_specific_agent { 629*ca853deeSEric Joyner #define IAVF_AQC_START_SPECIFIC_AGENT_SHIFT 0 630*ca853deeSEric Joyner #define IAVF_AQC_START_SPECIFIC_AGENT_MASK \ 631*ca853deeSEric Joyner (1 << IAVF_AQC_START_SPECIFIC_AGENT_SHIFT) 632*ca853deeSEric Joyner u8 command; 633*ca853deeSEric Joyner u8 reserved[15]; 634*ca853deeSEric Joyner }; 635*ca853deeSEric Joyner 636*ca853deeSEric Joyner IAVF_CHECK_CMD_LENGTH(iavf_aqc_lldp_stop_start_specific_agent); 637*ca853deeSEric Joyner 638*ca853deeSEric Joyner struct iavf_aqc_get_set_rss_key { 639*ca853deeSEric Joyner #define IAVF_AQC_SET_RSS_KEY_VSI_VALID (0x1 << 15) 640*ca853deeSEric Joyner #define IAVF_AQC_SET_RSS_KEY_VSI_ID_SHIFT 0 641*ca853deeSEric Joyner #define IAVF_AQC_SET_RSS_KEY_VSI_ID_MASK (0x3FF << \ 642*ca853deeSEric Joyner IAVF_AQC_SET_RSS_KEY_VSI_ID_SHIFT) 643*ca853deeSEric Joyner __le16 vsi_id; 644*ca853deeSEric Joyner u8 reserved[6]; 645*ca853deeSEric Joyner __le32 addr_high; 646*ca853deeSEric Joyner __le32 addr_low; 647*ca853deeSEric Joyner }; 648*ca853deeSEric Joyner 649*ca853deeSEric Joyner IAVF_CHECK_CMD_LENGTH(iavf_aqc_get_set_rss_key); 650*ca853deeSEric Joyner 651*ca853deeSEric Joyner struct iavf_aqc_get_set_rss_key_data { 652*ca853deeSEric Joyner u8 standard_rss_key[0x28]; 653*ca853deeSEric Joyner u8 extended_hash_key[0xc]; 654*ca853deeSEric Joyner }; 655*ca853deeSEric Joyner 656*ca853deeSEric Joyner IAVF_CHECK_STRUCT_LEN(0x34, iavf_aqc_get_set_rss_key_data); 657*ca853deeSEric Joyner 658*ca853deeSEric Joyner struct iavf_aqc_get_set_rss_lut { 659*ca853deeSEric Joyner #define IAVF_AQC_SET_RSS_LUT_VSI_VALID (0x1 << 15) 660*ca853deeSEric Joyner #define IAVF_AQC_SET_RSS_LUT_VSI_ID_SHIFT 0 661*ca853deeSEric Joyner #define IAVF_AQC_SET_RSS_LUT_VSI_ID_MASK (0x3FF << \ 662*ca853deeSEric Joyner IAVF_AQC_SET_RSS_LUT_VSI_ID_SHIFT) 663*ca853deeSEric Joyner __le16 vsi_id; 664*ca853deeSEric Joyner #define IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT 0 665*ca853deeSEric Joyner #define IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_MASK (0x1 << \ 666*ca853deeSEric Joyner IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) 667*ca853deeSEric Joyner 668*ca853deeSEric Joyner #define IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_VSI 0 669*ca853deeSEric Joyner #define IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_PF 1 670*ca853deeSEric Joyner __le16 flags; 671*ca853deeSEric Joyner u8 reserved[4]; 672*ca853deeSEric Joyner __le32 addr_high; 673*ca853deeSEric Joyner __le32 addr_low; 674*ca853deeSEric Joyner }; 675*ca853deeSEric Joyner 676*ca853deeSEric Joyner IAVF_CHECK_CMD_LENGTH(iavf_aqc_get_set_rss_lut); 677*ca853deeSEric Joyner #endif /* _IAVF_ADMINQ_CMD_H_ */ 678