1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2010 Fabien Thomas 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * Intel Uncore PMCs. 31 */ 32 33 #include <sys/cdefs.h> 34 #include <sys/param.h> 35 #include <sys/bus.h> 36 #include <sys/pmc.h> 37 #include <sys/pmckern.h> 38 #include <sys/systm.h> 39 40 #include <machine/intr_machdep.h> 41 #include <x86/apicvar.h> 42 #include <machine/cpu.h> 43 #include <machine/cpufunc.h> 44 #include <machine/specialreg.h> 45 46 #define UCF_PMC_CAPS \ 47 (PMC_CAP_READ | PMC_CAP_WRITE) 48 49 #define UCP_PMC_CAPS \ 50 (PMC_CAP_EDGE | PMC_CAP_THRESHOLD | PMC_CAP_READ | PMC_CAP_WRITE | \ 51 PMC_CAP_INVERT | PMC_CAP_QUALIFIER | PMC_CAP_PRECISE) 52 53 #define SELECTSEL(x) \ 54 (((x) == PMC_CPU_INTEL_SANDYBRIDGE || (x) == PMC_CPU_INTEL_HASWELL) ? \ 55 UCP_CB0_EVSEL0 : UCP_EVSEL0) 56 57 #define SELECTOFF(x) \ 58 (((x) == PMC_CPU_INTEL_SANDYBRIDGE || (x) == PMC_CPU_INTEL_HASWELL) ? \ 59 UCF_OFFSET_SB : UCF_OFFSET) 60 61 static enum pmc_cputype uncore_cputype; 62 63 struct uncore_cpu { 64 volatile uint32_t pc_ucfctrl; /* Fixed function control. */ 65 volatile uint64_t pc_globalctrl; /* Global control register. */ 66 struct pmc_hw pc_uncorepmcs[]; 67 }; 68 69 static struct uncore_cpu **uncore_pcpu; 70 71 static uint64_t uncore_pmcmask; 72 73 static int uncore_ucf_ri; /* relative index of fixed counters */ 74 static int uncore_ucf_width; 75 static int uncore_ucf_npmc; 76 77 static int uncore_ucp_width; 78 static int uncore_ucp_npmc; 79 80 static int 81 uncore_pcpu_noop(struct pmc_mdep *md, int cpu) 82 { 83 (void) md; 84 (void) cpu; 85 return (0); 86 } 87 88 static int 89 uncore_pcpu_init(struct pmc_mdep *md, int cpu) 90 { 91 struct pmc_cpu *pc; 92 struct uncore_cpu *cc; 93 struct pmc_hw *phw; 94 int uncore_ri, n, npmc; 95 96 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 97 ("[ucf,%d] insane cpu number %d", __LINE__, cpu)); 98 99 PMCDBG1(MDP,INI,1,"uncore-init cpu=%d", cpu); 100 101 uncore_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP].pcd_ri; 102 npmc = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP].pcd_num; 103 npmc += md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCF].pcd_num; 104 105 cc = malloc(sizeof(struct uncore_cpu) + npmc * sizeof(struct pmc_hw), 106 M_PMC, M_WAITOK | M_ZERO); 107 108 uncore_pcpu[cpu] = cc; 109 pc = pmc_pcpu[cpu]; 110 111 KASSERT(pc != NULL && cc != NULL, 112 ("[uncore,%d] NULL per-cpu structures cpu=%d", __LINE__, cpu)); 113 114 for (n = 0, phw = cc->pc_uncorepmcs; n < npmc; n++, phw++) { 115 phw->phw_state = PMC_PHW_FLAG_IS_ENABLED | 116 PMC_PHW_CPU_TO_STATE(cpu) | 117 PMC_PHW_INDEX_TO_STATE(n + uncore_ri); 118 phw->phw_pmc = NULL; 119 pc->pc_hwpmcs[n + uncore_ri] = phw; 120 } 121 122 return (0); 123 } 124 125 static int 126 uncore_pcpu_fini(struct pmc_mdep *md, int cpu) 127 { 128 int uncore_ri, n, npmc; 129 struct pmc_cpu *pc; 130 struct uncore_cpu *cc; 131 132 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 133 ("[uncore,%d] insane cpu number (%d)", __LINE__, cpu)); 134 135 PMCDBG1(MDP,INI,1,"uncore-pcpu-fini cpu=%d", cpu); 136 137 if ((cc = uncore_pcpu[cpu]) == NULL) 138 return (0); 139 140 uncore_pcpu[cpu] = NULL; 141 142 pc = pmc_pcpu[cpu]; 143 144 KASSERT(pc != NULL, ("[uncore,%d] NULL per-cpu %d state", __LINE__, 145 cpu)); 146 147 npmc = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP].pcd_num; 148 uncore_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP].pcd_ri; 149 150 for (n = 0; n < npmc; n++) 151 wrmsr(SELECTSEL(uncore_cputype) + n, 0); 152 153 wrmsr(UCF_CTRL, 0); 154 npmc += md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCF].pcd_num; 155 156 for (n = 0; n < npmc; n++) 157 pc->pc_hwpmcs[n + uncore_ri] = NULL; 158 159 free(cc, M_PMC); 160 161 return (0); 162 } 163 164 /* 165 * Fixed function counters. 166 */ 167 168 static pmc_value_t 169 ucf_perfctr_value_to_reload_count(pmc_value_t v) 170 { 171 172 /* If the PMC has overflowed, return a reload count of zero. */ 173 if ((v & (1ULL << (uncore_ucf_width - 1))) == 0) 174 return (0); 175 v &= (1ULL << uncore_ucf_width) - 1; 176 return (1ULL << uncore_ucf_width) - v; 177 } 178 179 static pmc_value_t 180 ucf_reload_count_to_perfctr_value(pmc_value_t rlc) 181 { 182 return (1ULL << uncore_ucf_width) - rlc; 183 } 184 185 static int 186 ucf_allocate_pmc(int cpu, int ri, struct pmc *pm, 187 const struct pmc_op_pmcallocate *a) 188 { 189 uint32_t flags; 190 191 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 192 ("[uncore,%d] illegal CPU %d", __LINE__, cpu)); 193 194 PMCDBG2(MDP,ALL,1, "ucf-allocate ri=%d reqcaps=0x%x", ri, pm->pm_caps); 195 196 if (ri < 0 || ri > uncore_ucf_npmc) 197 return (EINVAL); 198 199 if (a->pm_class != PMC_CLASS_UCF) 200 return (EINVAL); 201 202 flags = UCF_EN; 203 204 pm->pm_md.pm_ucf.pm_ucf_ctrl = (flags << (ri * 4)); 205 206 PMCDBG1(MDP,ALL,2, "ucf-allocate config=0x%jx", 207 (uintmax_t) pm->pm_md.pm_ucf.pm_ucf_ctrl); 208 209 return (0); 210 } 211 212 static int 213 ucf_config_pmc(int cpu, int ri, struct pmc *pm) 214 { 215 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 216 ("[uncore,%d] illegal CPU %d", __LINE__, cpu)); 217 218 KASSERT(ri >= 0 && ri < uncore_ucf_npmc, 219 ("[uncore,%d] illegal row-index %d", __LINE__, ri)); 220 221 PMCDBG3(MDP,CFG,1, "ucf-config cpu=%d ri=%d pm=%p", cpu, ri, pm); 222 223 KASSERT(uncore_pcpu[cpu] != NULL, ("[uncore,%d] null per-cpu %d", __LINE__, 224 cpu)); 225 226 uncore_pcpu[cpu]->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc = pm; 227 228 return (0); 229 } 230 231 static int 232 ucf_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc) 233 { 234 struct pmc_hw *phw; 235 236 phw = &uncore_pcpu[cpu]->pc_uncorepmcs[ri + uncore_ucf_ri]; 237 238 snprintf(pi->pm_name, sizeof(pi->pm_name), "UCF-%d", ri); 239 pi->pm_class = PMC_CLASS_UCF; 240 241 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) { 242 pi->pm_enabled = TRUE; 243 *ppmc = phw->phw_pmc; 244 } else { 245 pi->pm_enabled = FALSE; 246 *ppmc = NULL; 247 } 248 249 return (0); 250 } 251 252 static int 253 ucf_get_config(int cpu, int ri, struct pmc **ppm) 254 { 255 *ppm = uncore_pcpu[cpu]->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc; 256 257 return (0); 258 } 259 260 static int 261 ucf_read_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t *v) 262 { 263 pmc_value_t tmp; 264 265 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 266 ("[uncore,%d] illegal cpu value %d", __LINE__, cpu)); 267 KASSERT(ri >= 0 && ri < uncore_ucf_npmc, 268 ("[uncore,%d] illegal row-index %d", __LINE__, ri)); 269 270 tmp = rdmsr(UCF_CTR0 + ri); 271 272 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) 273 *v = ucf_perfctr_value_to_reload_count(tmp); 274 else 275 *v = tmp; 276 277 PMCDBG3(MDP,REA,1, "ucf-read cpu=%d ri=%d -> v=%jx", cpu, ri, *v); 278 279 return (0); 280 } 281 282 static int 283 ucf_release_pmc(int cpu, int ri, struct pmc *pmc) 284 { 285 PMCDBG3(MDP,REL,1, "ucf-release cpu=%d ri=%d pm=%p", cpu, ri, pmc); 286 287 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 288 ("[uncore,%d] illegal CPU value %d", __LINE__, cpu)); 289 KASSERT(ri >= 0 && ri < uncore_ucf_npmc, 290 ("[uncore,%d] illegal row-index %d", __LINE__, ri)); 291 292 KASSERT(uncore_pcpu[cpu]->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc == NULL, 293 ("[uncore,%d] PHW pmc non-NULL", __LINE__)); 294 295 return (0); 296 } 297 298 static int 299 ucf_start_pmc(int cpu, int ri, struct pmc *pm) 300 { 301 struct uncore_cpu *ucfc; 302 303 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 304 ("[uncore,%d] illegal CPU value %d", __LINE__, cpu)); 305 KASSERT(ri >= 0 && ri < uncore_ucf_npmc, 306 ("[uncore,%d] illegal row-index %d", __LINE__, ri)); 307 308 PMCDBG2(MDP,STA,1,"ucf-start cpu=%d ri=%d", cpu, ri); 309 310 ucfc = uncore_pcpu[cpu]; 311 ucfc->pc_ucfctrl |= pm->pm_md.pm_ucf.pm_ucf_ctrl; 312 313 wrmsr(UCF_CTRL, ucfc->pc_ucfctrl); 314 315 ucfc->pc_globalctrl |= (1ULL << (ri + SELECTOFF(uncore_cputype))); 316 wrmsr(UC_GLOBAL_CTRL, ucfc->pc_globalctrl); 317 318 PMCDBG4(MDP,STA,1,"ucfctrl=%x(%x) globalctrl=%jx(%jx)", 319 ucfc->pc_ucfctrl, (uint32_t) rdmsr(UCF_CTRL), 320 ucfc->pc_globalctrl, rdmsr(UC_GLOBAL_CTRL)); 321 322 return (0); 323 } 324 325 static int 326 ucf_stop_pmc(int cpu, int ri, struct pmc *pm __unused) 327 { 328 uint32_t fc; 329 struct uncore_cpu *ucfc; 330 331 PMCDBG2(MDP,STO,1,"ucf-stop cpu=%d ri=%d", cpu, ri); 332 333 ucfc = uncore_pcpu[cpu]; 334 335 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 336 ("[uncore,%d] illegal CPU value %d", __LINE__, cpu)); 337 KASSERT(ri >= 0 && ri < uncore_ucf_npmc, 338 ("[uncore,%d] illegal row-index %d", __LINE__, ri)); 339 340 fc = (UCF_MASK << (ri * 4)); 341 342 ucfc->pc_ucfctrl &= ~fc; 343 344 PMCDBG1(MDP,STO,1,"ucf-stop ucfctrl=%x", ucfc->pc_ucfctrl); 345 wrmsr(UCF_CTRL, ucfc->pc_ucfctrl); 346 347 /* Don't need to write UC_GLOBAL_CTRL, one disable is enough. */ 348 349 PMCDBG4(MDP,STO,1,"ucfctrl=%x(%x) globalctrl=%jx(%jx)", 350 ucfc->pc_ucfctrl, (uint32_t) rdmsr(UCF_CTRL), 351 ucfc->pc_globalctrl, rdmsr(UC_GLOBAL_CTRL)); 352 353 return (0); 354 } 355 356 static int 357 ucf_write_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t v) 358 { 359 struct uncore_cpu *cc; 360 361 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 362 ("[uncore,%d] illegal cpu value %d", __LINE__, cpu)); 363 KASSERT(ri >= 0 && ri < uncore_ucf_npmc, 364 ("[uncore,%d] illegal row-index %d", __LINE__, ri)); 365 366 cc = uncore_pcpu[cpu]; 367 368 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) 369 v = ucf_reload_count_to_perfctr_value(v); 370 371 wrmsr(UCF_CTRL, 0); /* Turn off fixed counters */ 372 wrmsr(UCF_CTR0 + ri, v); 373 wrmsr(UCF_CTRL, cc->pc_ucfctrl); 374 375 PMCDBG4(MDP,WRI,1, "ucf-write cpu=%d ri=%d v=%jx ucfctrl=%jx ", 376 cpu, ri, v, (uintmax_t) rdmsr(UCF_CTRL)); 377 378 return (0); 379 } 380 381 382 static void 383 ucf_initialize(struct pmc_mdep *md, int maxcpu, int npmc, int pmcwidth) 384 { 385 struct pmc_classdep *pcd; 386 387 KASSERT(md != NULL, ("[ucf,%d] md is NULL", __LINE__)); 388 389 PMCDBG0(MDP,INI,1, "ucf-initialize"); 390 391 pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCF]; 392 393 pcd->pcd_caps = UCF_PMC_CAPS; 394 pcd->pcd_class = PMC_CLASS_UCF; 395 pcd->pcd_num = npmc; 396 pcd->pcd_ri = md->pmd_npmc; 397 pcd->pcd_width = pmcwidth; 398 399 pcd->pcd_allocate_pmc = ucf_allocate_pmc; 400 pcd->pcd_config_pmc = ucf_config_pmc; 401 pcd->pcd_describe = ucf_describe; 402 pcd->pcd_get_config = ucf_get_config; 403 pcd->pcd_get_msr = NULL; 404 pcd->pcd_pcpu_fini = uncore_pcpu_noop; 405 pcd->pcd_pcpu_init = uncore_pcpu_noop; 406 pcd->pcd_read_pmc = ucf_read_pmc; 407 pcd->pcd_release_pmc = ucf_release_pmc; 408 pcd->pcd_start_pmc = ucf_start_pmc; 409 pcd->pcd_stop_pmc = ucf_stop_pmc; 410 pcd->pcd_write_pmc = ucf_write_pmc; 411 412 md->pmd_npmc += npmc; 413 } 414 415 /* 416 * Intel programmable PMCs. 417 */ 418 419 /* 420 * Event descriptor tables. 421 * 422 * For each event id, we track: 423 * 424 * 1. The CPUs that the event is valid for. 425 * 426 * 2. If the event uses a fixed UMASK, the value of the umask field. 427 * If the event doesn't use a fixed UMASK, a mask of legal bits 428 * to check against. 429 */ 430 431 struct ucp_event_descr { 432 enum pmc_event ucp_ev; 433 unsigned char ucp_evcode; 434 unsigned char ucp_umask; 435 unsigned char ucp_flags; 436 }; 437 438 #define UCP_F_I7 (1 << 0) /* CPU: Core i7 */ 439 #define UCP_F_WM (1 << 1) /* CPU: Westmere */ 440 #define UCP_F_SB (1 << 2) /* CPU: Sandy Bridge */ 441 #define UCP_F_HW (1 << 3) /* CPU: Haswell */ 442 #define UCP_F_FM (1 << 4) /* Fixed mask */ 443 444 #define UCP_F_ALLCPUS \ 445 (UCP_F_I7 | UCP_F_WM) 446 447 #define UCP_F_CMASK 0xFF000000 448 449 static pmc_value_t 450 ucp_perfctr_value_to_reload_count(pmc_value_t v) 451 { 452 v &= (1ULL << uncore_ucp_width) - 1; 453 return (1ULL << uncore_ucp_width) - v; 454 } 455 456 static pmc_value_t 457 ucp_reload_count_to_perfctr_value(pmc_value_t rlc) 458 { 459 return (1ULL << uncore_ucp_width) - rlc; 460 } 461 462 /* 463 * Counter specific event information for Sandybridge and Haswell 464 */ 465 static int 466 ucp_event_sb_hw_ok_on_counter(uint8_t ev, int ri) 467 { 468 uint32_t mask; 469 470 switch (ev) { 471 /* 472 * Events valid only on counter 0. 473 */ 474 case 0x80: 475 case 0x83: 476 mask = (1 << 0); 477 break; 478 479 default: 480 mask = ~0; /* Any row index is ok. */ 481 } 482 483 return (mask & (1 << ri)); 484 } 485 486 static int 487 ucp_allocate_pmc(int cpu, int ri, struct pmc *pm, 488 const struct pmc_op_pmcallocate *a) 489 { 490 uint8_t ev; 491 const struct pmc_md_ucp_op_pmcallocate *ucp; 492 493 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 494 ("[uncore,%d] illegal CPU %d", __LINE__, cpu)); 495 KASSERT(ri >= 0 && ri < uncore_ucp_npmc, 496 ("[uncore,%d] illegal row-index value %d", __LINE__, ri)); 497 498 if (a->pm_class != PMC_CLASS_UCP) 499 return (EINVAL); 500 501 ucp = &a->pm_md.pm_ucp; 502 ev = UCP_EVSEL(ucp->pm_ucp_config); 503 switch (uncore_cputype) { 504 case PMC_CPU_INTEL_HASWELL: 505 case PMC_CPU_INTEL_SANDYBRIDGE: 506 if (ucp_event_sb_hw_ok_on_counter(ev, ri) == 0) 507 return (EINVAL); 508 break; 509 default: 510 break; 511 } 512 513 pm->pm_md.pm_ucp.pm_ucp_evsel = ucp->pm_ucp_config | UCP_EN; 514 515 return (0); 516 } 517 518 static int 519 ucp_config_pmc(int cpu, int ri, struct pmc *pm) 520 { 521 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 522 ("[uncore,%d] illegal CPU %d", __LINE__, cpu)); 523 524 KASSERT(ri >= 0 && ri < uncore_ucp_npmc, 525 ("[uncore,%d] illegal row-index %d", __LINE__, ri)); 526 527 PMCDBG3(MDP,CFG,1, "ucp-config cpu=%d ri=%d pm=%p", cpu, ri, pm); 528 529 KASSERT(uncore_pcpu[cpu] != NULL, ("[uncore,%d] null per-cpu %d", __LINE__, 530 cpu)); 531 532 uncore_pcpu[cpu]->pc_uncorepmcs[ri].phw_pmc = pm; 533 534 return (0); 535 } 536 537 static int 538 ucp_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc) 539 { 540 struct pmc_hw *phw; 541 542 phw = &uncore_pcpu[cpu]->pc_uncorepmcs[ri]; 543 544 snprintf(pi->pm_name, sizeof(pi->pm_name), "UCP-%d", ri); 545 pi->pm_class = PMC_CLASS_UCP; 546 547 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) { 548 pi->pm_enabled = TRUE; 549 *ppmc = phw->phw_pmc; 550 } else { 551 pi->pm_enabled = FALSE; 552 *ppmc = NULL; 553 } 554 555 return (0); 556 } 557 558 static int 559 ucp_get_config(int cpu, int ri, struct pmc **ppm) 560 { 561 *ppm = uncore_pcpu[cpu]->pc_uncorepmcs[ri].phw_pmc; 562 563 return (0); 564 } 565 566 static int 567 ucp_read_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t *v) 568 { 569 pmc_value_t tmp; 570 571 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 572 ("[uncore,%d] illegal cpu value %d", __LINE__, cpu)); 573 KASSERT(ri >= 0 && ri < uncore_ucp_npmc, 574 ("[uncore,%d] illegal row-index %d", __LINE__, ri)); 575 576 tmp = rdmsr(UCP_PMC0 + ri); 577 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) 578 *v = ucp_perfctr_value_to_reload_count(tmp); 579 else 580 *v = tmp; 581 582 PMCDBG4(MDP,REA,1, "ucp-read cpu=%d ri=%d msr=0x%x -> v=%jx", cpu, ri, 583 ri, *v); 584 585 return (0); 586 } 587 588 static int 589 ucp_release_pmc(int cpu, int ri, struct pmc *pm) 590 { 591 (void) pm; 592 593 PMCDBG3(MDP,REL,1, "ucp-release cpu=%d ri=%d pm=%p", cpu, ri, 594 pm); 595 596 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 597 ("[uncore,%d] illegal CPU value %d", __LINE__, cpu)); 598 KASSERT(ri >= 0 && ri < uncore_ucp_npmc, 599 ("[uncore,%d] illegal row-index %d", __LINE__, ri)); 600 601 KASSERT(uncore_pcpu[cpu]->pc_uncorepmcs[ri].phw_pmc 602 == NULL, ("[uncore,%d] PHW pmc non-NULL", __LINE__)); 603 604 return (0); 605 } 606 607 static int 608 ucp_start_pmc(int cpu, int ri, struct pmc *pm) 609 { 610 uint64_t evsel; 611 struct uncore_cpu *cc; 612 613 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 614 ("[uncore,%d] illegal CPU value %d", __LINE__, cpu)); 615 KASSERT(ri >= 0 && ri < uncore_ucp_npmc, 616 ("[uncore,%d] illegal row-index %d", __LINE__, ri)); 617 618 cc = uncore_pcpu[cpu]; 619 620 PMCDBG2(MDP,STA,1, "ucp-start cpu=%d ri=%d", cpu, ri); 621 622 evsel = pm->pm_md.pm_ucp.pm_ucp_evsel; 623 624 PMCDBG4(MDP,STA,2, 625 "ucp-start/2 cpu=%d ri=%d evselmsr=0x%x evsel=0x%x", 626 cpu, ri, SELECTSEL(uncore_cputype) + ri, evsel); 627 628 wrmsr(SELECTSEL(uncore_cputype) + ri, evsel); 629 630 cc->pc_globalctrl |= (1ULL << ri); 631 wrmsr(UC_GLOBAL_CTRL, cc->pc_globalctrl); 632 633 return (0); 634 } 635 636 static int 637 ucp_stop_pmc(int cpu, int ri, struct pmc *pm __unused) 638 { 639 640 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 641 ("[uncore,%d] illegal cpu value %d", __LINE__, cpu)); 642 KASSERT(ri >= 0 && ri < uncore_ucp_npmc, 643 ("[uncore,%d] illegal row index %d", __LINE__, ri)); 644 645 PMCDBG2(MDP,STO,1, "ucp-stop cpu=%d ri=%d", cpu, ri); 646 647 /* stop hw. */ 648 wrmsr(SELECTSEL(uncore_cputype) + ri, 0); 649 650 /* Don't need to write UC_GLOBAL_CTRL, one disable is enough. */ 651 652 return (0); 653 } 654 655 static int 656 ucp_write_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t v) 657 { 658 659 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 660 ("[uncore,%d] illegal cpu value %d", __LINE__, cpu)); 661 KASSERT(ri >= 0 && ri < uncore_ucp_npmc, 662 ("[uncore,%d] illegal row index %d", __LINE__, ri)); 663 664 PMCDBG4(MDP,WRI,1, "ucp-write cpu=%d ri=%d msr=0x%x v=%jx", cpu, ri, 665 UCP_PMC0 + ri, v); 666 667 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm))) 668 v = ucp_reload_count_to_perfctr_value(v); 669 670 /* 671 * Write the new value to the counter. The counter will be in 672 * a stopped state when the pcd_write() entry point is called. 673 */ 674 675 wrmsr(UCP_PMC0 + ri, v); 676 677 return (0); 678 } 679 680 681 static void 682 ucp_initialize(struct pmc_mdep *md, int maxcpu, int npmc, int pmcwidth) 683 { 684 struct pmc_classdep *pcd; 685 686 KASSERT(md != NULL, ("[ucp,%d] md is NULL", __LINE__)); 687 688 PMCDBG0(MDP,INI,1, "ucp-initialize"); 689 690 pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP]; 691 692 pcd->pcd_caps = UCP_PMC_CAPS; 693 pcd->pcd_class = PMC_CLASS_UCP; 694 pcd->pcd_num = npmc; 695 pcd->pcd_ri = md->pmd_npmc; 696 pcd->pcd_width = pmcwidth; 697 698 pcd->pcd_allocate_pmc = ucp_allocate_pmc; 699 pcd->pcd_config_pmc = ucp_config_pmc; 700 pcd->pcd_describe = ucp_describe; 701 pcd->pcd_get_config = ucp_get_config; 702 pcd->pcd_get_msr = NULL; 703 pcd->pcd_pcpu_fini = uncore_pcpu_fini; 704 pcd->pcd_pcpu_init = uncore_pcpu_init; 705 pcd->pcd_read_pmc = ucp_read_pmc; 706 pcd->pcd_release_pmc = ucp_release_pmc; 707 pcd->pcd_start_pmc = ucp_start_pmc; 708 pcd->pcd_stop_pmc = ucp_stop_pmc; 709 pcd->pcd_write_pmc = ucp_write_pmc; 710 711 md->pmd_npmc += npmc; 712 } 713 714 int 715 pmc_uncore_initialize(struct pmc_mdep *md, int maxcpu) 716 { 717 uncore_cputype = md->pmd_cputype; 718 uncore_pmcmask = 0; 719 720 /* 721 * Initialize programmable counters. 722 */ 723 724 uncore_ucp_npmc = 8; 725 uncore_ucp_width = 48; 726 727 uncore_pmcmask |= ((1ULL << uncore_ucp_npmc) - 1); 728 729 ucp_initialize(md, maxcpu, uncore_ucp_npmc, uncore_ucp_width); 730 731 /* 732 * Initialize fixed function counters, if present. 733 */ 734 uncore_ucf_ri = uncore_ucp_npmc; 735 uncore_ucf_npmc = 1; 736 uncore_ucf_width = 48; 737 738 ucf_initialize(md, maxcpu, uncore_ucf_npmc, uncore_ucf_width); 739 uncore_pmcmask |= ((1ULL << uncore_ucf_npmc) - 1) << SELECTOFF(uncore_cputype); 740 741 PMCDBG2(MDP,INI,1,"uncore-init pmcmask=0x%jx ucfri=%d", uncore_pmcmask, 742 uncore_ucf_ri); 743 744 uncore_pcpu = malloc(sizeof(*uncore_pcpu) * maxcpu, M_PMC, 745 M_ZERO | M_WAITOK); 746 747 return (0); 748 } 749 750 void 751 pmc_uncore_finalize(struct pmc_mdep *md) 752 { 753 PMCDBG0(MDP,INI,1, "uncore-finalize"); 754 755 free(uncore_pcpu, M_PMC); 756 uncore_pcpu = NULL; 757 } 758