1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2008 Joseph Koshy 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 #include <sys/param.h> 31 #include <sys/pmc.h> 32 #include <sys/pmckern.h> 33 #include <sys/systm.h> 34 35 #include <machine/specialreg.h> 36 37 /* 38 * TSC support. 39 */ 40 41 #define TSC_CAPS PMC_CAP_READ 42 43 struct tsc_descr { 44 struct pmc_descr pm_descr; /* "base class" */ 45 }; 46 47 static struct tsc_descr tsc_pmcdesc[TSC_NPMCS] = 48 { 49 { 50 .pm_descr = 51 { 52 .pd_name = "TSC", 53 .pd_class = PMC_CLASS_TSC, 54 .pd_caps = TSC_CAPS, 55 .pd_width = 64 56 } 57 } 58 }; 59 60 /* 61 * Per-CPU data structure for TSCs. 62 */ 63 64 struct tsc_cpu { 65 struct pmc_hw tc_hw; 66 }; 67 68 static struct tsc_cpu **tsc_pcpu; 69 70 static int 71 tsc_allocate_pmc(int cpu __diagused, int ri __diagused, struct pmc *pm __unused, 72 const struct pmc_op_pmcallocate *a) 73 { 74 75 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 76 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 77 KASSERT(ri >= 0 && ri < TSC_NPMCS, 78 ("[tsc,%d] illegal row index %d", __LINE__, ri)); 79 80 if (a->pm_class != PMC_CLASS_TSC) 81 return (EINVAL); 82 83 if (a->pm_ev != PMC_EV_TSC_TSC || 84 a->pm_mode != PMC_MODE_SC) 85 return (EINVAL); 86 87 return (0); 88 } 89 90 static int 91 tsc_config_pmc(int cpu, int ri, struct pmc *pm) 92 { 93 struct pmc_hw *phw; 94 95 PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); 96 97 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 98 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 99 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 100 101 phw = &tsc_pcpu[cpu]->tc_hw; 102 103 KASSERT(pm == NULL || phw->phw_pmc == NULL, 104 ("[tsc,%d] pm=%p phw->pm=%p hwpmc not unconfigured", __LINE__, 105 pm, phw->phw_pmc)); 106 107 phw->phw_pmc = pm; 108 109 return (0); 110 } 111 112 static int 113 tsc_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc) 114 { 115 const struct tsc_descr *pd; 116 struct pmc_hw *phw; 117 118 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 119 ("[tsc,%d] illegal CPU %d", __LINE__, cpu)); 120 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 121 122 phw = &tsc_pcpu[cpu]->tc_hw; 123 pd = &tsc_pmcdesc[ri]; 124 125 strlcpy(pi->pm_name, pd->pm_descr.pd_name, sizeof(pi->pm_name)); 126 pi->pm_class = pd->pm_descr.pd_class; 127 128 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) { 129 pi->pm_enabled = TRUE; 130 *ppmc = phw->phw_pmc; 131 } else { 132 pi->pm_enabled = FALSE; 133 *ppmc = NULL; 134 } 135 136 return (0); 137 } 138 139 static int 140 tsc_get_config(int cpu, int ri __diagused, struct pmc **ppm) 141 { 142 143 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 144 ("[tsc,%d] illegal CPU %d", __LINE__, cpu)); 145 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 146 147 *ppm = tsc_pcpu[cpu]->tc_hw.phw_pmc; 148 149 return (0); 150 } 151 152 static int 153 tsc_get_msr(int ri __diagused, uint32_t *msr) 154 { 155 156 KASSERT(ri >= 0 && ri < TSC_NPMCS, 157 ("[tsc,%d] ri %d out of range", __LINE__, ri)); 158 159 *msr = MSR_TSC; 160 161 return (0); 162 } 163 164 static int 165 tsc_pcpu_fini(struct pmc_mdep *md, int cpu) 166 { 167 int ri; 168 struct pmc_cpu *pc; 169 170 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 171 ("[tsc,%d] illegal cpu %d", __LINE__, cpu)); 172 KASSERT(tsc_pcpu[cpu] != NULL, ("[tsc,%d] null pcpu", __LINE__)); 173 174 free(tsc_pcpu[cpu], M_PMC); 175 tsc_pcpu[cpu] = NULL; 176 177 ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_ri; 178 179 pc = pmc_pcpu[cpu]; 180 pc->pc_hwpmcs[ri] = NULL; 181 182 return (0); 183 } 184 185 static int 186 tsc_pcpu_init(struct pmc_mdep *md, int cpu) 187 { 188 int ri; 189 struct pmc_cpu *pc; 190 struct tsc_cpu *tsc_pc; 191 192 193 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 194 ("[tsc,%d] illegal cpu %d", __LINE__, cpu)); 195 KASSERT(tsc_pcpu, ("[tsc,%d] null pcpu", __LINE__)); 196 KASSERT(tsc_pcpu[cpu] == NULL, ("[tsc,%d] non-null per-cpu", 197 __LINE__)); 198 199 tsc_pc = malloc(sizeof(struct tsc_cpu), M_PMC, M_WAITOK|M_ZERO); 200 201 tsc_pc->tc_hw.phw_state = PMC_PHW_FLAG_IS_ENABLED | 202 PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(0) | 203 PMC_PHW_FLAG_IS_SHAREABLE; 204 205 tsc_pcpu[cpu] = tsc_pc; 206 207 ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_ri; 208 209 KASSERT(pmc_pcpu, ("[tsc,%d] null generic pcpu", __LINE__)); 210 211 pc = pmc_pcpu[cpu]; 212 213 KASSERT(pc, ("[tsc,%d] null generic per-cpu", __LINE__)); 214 215 pc->pc_hwpmcs[ri] = &tsc_pc->tc_hw; 216 217 return (0); 218 } 219 220 static int 221 tsc_read_pmc(int cpu, int ri, struct pmc *pm, pmc_value_t *v) 222 { 223 enum pmc_mode mode __diagused; 224 225 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 226 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 227 KASSERT(ri == 0, ("[tsc,%d] illegal ri %d", __LINE__, ri)); 228 229 mode = PMC_TO_MODE(pm); 230 231 KASSERT(mode == PMC_MODE_SC, 232 ("[tsc,%d] illegal pmc mode %d", __LINE__, mode)); 233 234 PMCDBG1(MDP,REA,1,"tsc-read id=%d", ri); 235 236 *v = rdtsc(); 237 238 return (0); 239 } 240 241 static int 242 tsc_release_pmc(int cpu, int ri __diagused, struct pmc *pmc __unused) 243 { 244 struct pmc_hw *phw __diagused; 245 246 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 247 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 248 KASSERT(ri == 0, 249 ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 250 251 phw = &tsc_pcpu[cpu]->tc_hw; 252 253 KASSERT(phw->phw_pmc == NULL, 254 ("[tsc,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc)); 255 256 /* 257 * Nothing to do. 258 */ 259 return (0); 260 } 261 262 static int 263 tsc_start_pmc(int cpu __diagused, int ri __diagused, struct pmc *pm __unused) 264 { 265 266 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 267 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 268 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 269 270 return (0); /* TSCs are always running. */ 271 } 272 273 static int 274 tsc_stop_pmc(int cpu __diagused, int ri __diagused, struct pmc *pm __unused) 275 { 276 277 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 278 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 279 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 280 281 return (0); /* Cannot actually stop a TSC. */ 282 } 283 284 static int 285 tsc_write_pmc(int cpu __diagused, int ri __diagused, struct pmc *pm __unused, 286 pmc_value_t v __unused) 287 { 288 289 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 290 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 291 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 292 293 /* 294 * The TSCs are used as timecounters by the kernel, so even 295 * though some i386 CPUs support writeable TSCs, we don't 296 * support writing changing TSC values through the HWPMC API. 297 */ 298 return (0); 299 } 300 301 int 302 pmc_tsc_initialize(struct pmc_mdep *md, int maxcpu) 303 { 304 struct pmc_classdep *pcd; 305 306 KASSERT(md != NULL, ("[tsc,%d] md is NULL", __LINE__)); 307 KASSERT(md->pmd_nclass >= 1, ("[tsc,%d] dubious md->nclass %d", 308 __LINE__, md->pmd_nclass)); 309 310 tsc_pcpu = malloc(sizeof(struct tsc_cpu *) * maxcpu, M_PMC, 311 M_ZERO|M_WAITOK); 312 313 pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC]; 314 315 pcd->pcd_caps = PMC_CAP_READ; 316 pcd->pcd_class = PMC_CLASS_TSC; 317 pcd->pcd_num = TSC_NPMCS; 318 pcd->pcd_ri = md->pmd_npmc; 319 pcd->pcd_width = 64; 320 321 pcd->pcd_allocate_pmc = tsc_allocate_pmc; 322 pcd->pcd_config_pmc = tsc_config_pmc; 323 pcd->pcd_describe = tsc_describe; 324 pcd->pcd_get_config = tsc_get_config; 325 pcd->pcd_get_msr = tsc_get_msr; 326 pcd->pcd_pcpu_init = tsc_pcpu_init; 327 pcd->pcd_pcpu_fini = tsc_pcpu_fini; 328 pcd->pcd_read_pmc = tsc_read_pmc; 329 pcd->pcd_release_pmc = tsc_release_pmc; 330 pcd->pcd_start_pmc = tsc_start_pmc; 331 pcd->pcd_stop_pmc = tsc_stop_pmc; 332 pcd->pcd_write_pmc = tsc_write_pmc; 333 334 md->pmd_npmc += TSC_NPMCS; 335 336 return (0); 337 } 338 339 void 340 pmc_tsc_finalize(struct pmc_mdep *md __diagused) 341 { 342 #ifdef INVARIANTS 343 int i, ncpus; 344 345 ncpus = pmc_cpu_max(); 346 for (i = 0; i < ncpus; i++) 347 KASSERT(tsc_pcpu[i] == NULL, ("[tsc,%d] non-null pcpu cpu %d", 348 __LINE__, i)); 349 350 KASSERT(md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_class == 351 PMC_CLASS_TSC, ("[tsc,%d] class mismatch", __LINE__)); 352 #endif 353 354 free(tsc_pcpu, M_PMC); 355 tsc_pcpu = NULL; 356 } 357