1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2008 Joseph Koshy 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include <sys/param.h> 33 #include <sys/pmc.h> 34 #include <sys/pmckern.h> 35 #include <sys/systm.h> 36 37 #include <machine/specialreg.h> 38 39 /* 40 * TSC support. 41 */ 42 43 #define TSC_CAPS PMC_CAP_READ 44 45 struct tsc_descr { 46 struct pmc_descr pm_descr; /* "base class" */ 47 }; 48 49 static struct tsc_descr tsc_pmcdesc[TSC_NPMCS] = 50 { 51 { 52 .pm_descr = 53 { 54 .pd_name = "TSC", 55 .pd_class = PMC_CLASS_TSC, 56 .pd_caps = TSC_CAPS, 57 .pd_width = 64 58 } 59 } 60 }; 61 62 /* 63 * Per-CPU data structure for TSCs. 64 */ 65 66 struct tsc_cpu { 67 struct pmc_hw tc_hw; 68 }; 69 70 static struct tsc_cpu **tsc_pcpu; 71 72 static int 73 tsc_allocate_pmc(int cpu, int ri, struct pmc *pm, 74 const struct pmc_op_pmcallocate *a) 75 { 76 (void) cpu; 77 78 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 79 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 80 KASSERT(ri >= 0 && ri < TSC_NPMCS, 81 ("[tsc,%d] illegal row index %d", __LINE__, ri)); 82 83 if (a->pm_class != PMC_CLASS_TSC) 84 return (EINVAL); 85 86 if ((pm->pm_caps & TSC_CAPS) == 0) 87 return (EINVAL); 88 89 if ((pm->pm_caps & ~TSC_CAPS) != 0) 90 return (EPERM); 91 92 if (a->pm_ev != PMC_EV_TSC_TSC || 93 a->pm_mode != PMC_MODE_SC) 94 return (EINVAL); 95 96 return (0); 97 } 98 99 static int 100 tsc_config_pmc(int cpu, int ri, struct pmc *pm) 101 { 102 struct pmc_hw *phw; 103 104 PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm); 105 106 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 107 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 108 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 109 110 phw = &tsc_pcpu[cpu]->tc_hw; 111 112 KASSERT(pm == NULL || phw->phw_pmc == NULL, 113 ("[tsc,%d] pm=%p phw->pm=%p hwpmc not unconfigured", __LINE__, 114 pm, phw->phw_pmc)); 115 116 phw->phw_pmc = pm; 117 118 return (0); 119 } 120 121 static int 122 tsc_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc) 123 { 124 int error; 125 size_t copied; 126 const struct tsc_descr *pd; 127 struct pmc_hw *phw; 128 129 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 130 ("[tsc,%d] illegal CPU %d", __LINE__, cpu)); 131 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 132 133 phw = &tsc_pcpu[cpu]->tc_hw; 134 pd = &tsc_pmcdesc[ri]; 135 136 if ((error = copystr(pd->pm_descr.pd_name, pi->pm_name, 137 PMC_NAME_MAX, &copied)) != 0) 138 return (error); 139 140 pi->pm_class = pd->pm_descr.pd_class; 141 142 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) { 143 pi->pm_enabled = TRUE; 144 *ppmc = phw->phw_pmc; 145 } else { 146 pi->pm_enabled = FALSE; 147 *ppmc = NULL; 148 } 149 150 return (0); 151 } 152 153 static int 154 tsc_get_config(int cpu, int ri, struct pmc **ppm) 155 { 156 (void) ri; 157 158 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 159 ("[tsc,%d] illegal CPU %d", __LINE__, cpu)); 160 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 161 162 *ppm = tsc_pcpu[cpu]->tc_hw.phw_pmc; 163 164 return (0); 165 } 166 167 static int 168 tsc_get_msr(int ri, uint32_t *msr) 169 { 170 (void) ri; 171 172 KASSERT(ri >= 0 && ri < TSC_NPMCS, 173 ("[tsc,%d] ri %d out of range", __LINE__, ri)); 174 175 *msr = MSR_TSC; 176 177 return (0); 178 } 179 180 static int 181 tsc_pcpu_fini(struct pmc_mdep *md, int cpu) 182 { 183 int ri; 184 struct pmc_cpu *pc; 185 186 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 187 ("[tsc,%d] illegal cpu %d", __LINE__, cpu)); 188 KASSERT(tsc_pcpu[cpu] != NULL, ("[tsc,%d] null pcpu", __LINE__)); 189 190 free(tsc_pcpu[cpu], M_PMC); 191 tsc_pcpu[cpu] = NULL; 192 193 ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_ri; 194 195 pc = pmc_pcpu[cpu]; 196 pc->pc_hwpmcs[ri] = NULL; 197 198 return (0); 199 } 200 201 static int 202 tsc_pcpu_init(struct pmc_mdep *md, int cpu) 203 { 204 int ri; 205 struct pmc_cpu *pc; 206 struct tsc_cpu *tsc_pc; 207 208 209 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 210 ("[tsc,%d] illegal cpu %d", __LINE__, cpu)); 211 KASSERT(tsc_pcpu, ("[tsc,%d] null pcpu", __LINE__)); 212 KASSERT(tsc_pcpu[cpu] == NULL, ("[tsc,%d] non-null per-cpu", 213 __LINE__)); 214 215 tsc_pc = malloc(sizeof(struct tsc_cpu), M_PMC, M_WAITOK|M_ZERO); 216 217 tsc_pc->tc_hw.phw_state = PMC_PHW_FLAG_IS_ENABLED | 218 PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(0) | 219 PMC_PHW_FLAG_IS_SHAREABLE; 220 221 tsc_pcpu[cpu] = tsc_pc; 222 223 ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_ri; 224 225 KASSERT(pmc_pcpu, ("[tsc,%d] null generic pcpu", __LINE__)); 226 227 pc = pmc_pcpu[cpu]; 228 229 KASSERT(pc, ("[tsc,%d] null generic per-cpu", __LINE__)); 230 231 pc->pc_hwpmcs[ri] = &tsc_pc->tc_hw; 232 233 return (0); 234 } 235 236 static int 237 tsc_read_pmc(int cpu, int ri, pmc_value_t *v) 238 { 239 struct pmc *pm; 240 enum pmc_mode mode __diagused; 241 const struct pmc_hw *phw; 242 243 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 244 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 245 KASSERT(ri == 0, ("[tsc,%d] illegal ri %d", __LINE__, ri)); 246 247 phw = &tsc_pcpu[cpu]->tc_hw; 248 pm = phw->phw_pmc; 249 250 KASSERT(pm != NULL, 251 ("[tsc,%d] no owner for PHW [cpu%d,pmc%d]", __LINE__, cpu, ri)); 252 253 mode = PMC_TO_MODE(pm); 254 255 KASSERT(mode == PMC_MODE_SC, 256 ("[tsc,%d] illegal pmc mode %d", __LINE__, mode)); 257 258 PMCDBG1(MDP,REA,1,"tsc-read id=%d", ri); 259 260 *v = rdtsc(); 261 262 return (0); 263 } 264 265 static int 266 tsc_release_pmc(int cpu, int ri, struct pmc *pmc) 267 { 268 struct pmc_hw *phw __diagused; 269 270 (void) pmc; 271 272 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 273 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 274 KASSERT(ri == 0, 275 ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 276 277 phw = &tsc_pcpu[cpu]->tc_hw; 278 279 KASSERT(phw->phw_pmc == NULL, 280 ("[tsc,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc)); 281 282 /* 283 * Nothing to do. 284 */ 285 return (0); 286 } 287 288 static int 289 tsc_start_pmc(int cpu, int ri) 290 { 291 (void) cpu; 292 293 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 294 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 295 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 296 297 return (0); /* TSCs are always running. */ 298 } 299 300 static int 301 tsc_stop_pmc(int cpu, int ri) 302 { 303 (void) cpu; (void) ri; 304 305 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 306 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 307 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 308 309 return (0); /* Cannot actually stop a TSC. */ 310 } 311 312 static int 313 tsc_write_pmc(int cpu, int ri, pmc_value_t v) 314 { 315 (void) cpu; (void) ri; (void) v; 316 317 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(), 318 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu)); 319 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri)); 320 321 /* 322 * The TSCs are used as timecounters by the kernel, so even 323 * though some i386 CPUs support writeable TSCs, we don't 324 * support writing changing TSC values through the HWPMC API. 325 */ 326 return (0); 327 } 328 329 int 330 pmc_tsc_initialize(struct pmc_mdep *md, int maxcpu) 331 { 332 struct pmc_classdep *pcd; 333 334 KASSERT(md != NULL, ("[tsc,%d] md is NULL", __LINE__)); 335 KASSERT(md->pmd_nclass >= 1, ("[tsc,%d] dubious md->nclass %d", 336 __LINE__, md->pmd_nclass)); 337 338 tsc_pcpu = malloc(sizeof(struct tsc_cpu *) * maxcpu, M_PMC, 339 M_ZERO|M_WAITOK); 340 341 pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC]; 342 343 pcd->pcd_caps = PMC_CAP_READ; 344 pcd->pcd_class = PMC_CLASS_TSC; 345 pcd->pcd_num = TSC_NPMCS; 346 pcd->pcd_ri = md->pmd_npmc; 347 pcd->pcd_width = 64; 348 349 pcd->pcd_allocate_pmc = tsc_allocate_pmc; 350 pcd->pcd_config_pmc = tsc_config_pmc; 351 pcd->pcd_describe = tsc_describe; 352 pcd->pcd_get_config = tsc_get_config; 353 pcd->pcd_get_msr = tsc_get_msr; 354 pcd->pcd_pcpu_init = tsc_pcpu_init; 355 pcd->pcd_pcpu_fini = tsc_pcpu_fini; 356 pcd->pcd_read_pmc = tsc_read_pmc; 357 pcd->pcd_release_pmc = tsc_release_pmc; 358 pcd->pcd_start_pmc = tsc_start_pmc; 359 pcd->pcd_stop_pmc = tsc_stop_pmc; 360 pcd->pcd_write_pmc = tsc_write_pmc; 361 362 md->pmd_npmc += TSC_NPMCS; 363 364 return (0); 365 } 366 367 void 368 pmc_tsc_finalize(struct pmc_mdep *md) 369 { 370 #ifdef INVARIANTS 371 int i, ncpus; 372 373 ncpus = pmc_cpu_max(); 374 for (i = 0; i < ncpus; i++) 375 KASSERT(tsc_pcpu[i] == NULL, ("[tsc,%d] non-null pcpu cpu %d", 376 __LINE__, i)); 377 378 KASSERT(md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_class == 379 PMC_CLASS_TSC, ("[tsc,%d] class mismatch", __LINE__)); 380 381 #else 382 (void) md; 383 #endif 384 385 free(tsc_pcpu, M_PMC); 386 tsc_pcpu = NULL; 387 } 388