1 /*- 2 * Copyright (c) 2003-2005 Joseph Koshy 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/lock.h> 32 #include <sys/mutex.h> 33 #include <sys/pmckern.h> 34 #include <sys/smp.h> 35 #include <sys/systm.h> 36 37 #include <machine/cputypes.h> 38 #include <machine/md_var.h> 39 #include <machine/pmc_mdep.h> 40 #include <machine/specialreg.h> 41 42 struct pmc_mdep * 43 pmc_intel_initialize(void) 44 { 45 struct pmc_mdep *pmc_mdep; 46 enum pmc_cputype cputype; 47 int error, model; 48 49 KASSERT(strcmp(cpu_vendor, "GenuineIntel") == 0, 50 ("[intel,%d] Initializing non-intel processor", __LINE__)); 51 52 PMCDBG(MDP,INI,0, "intel-initialize cpuid=0x%x", cpu_id); 53 54 cputype = -1; 55 56 switch (cpu_id & 0xF00) { 57 case 0x500: /* Pentium family processors */ 58 cputype = PMC_CPU_INTEL_P5; 59 break; 60 case 0x600: /* Pentium Pro, Celeron, Pentium II & III */ 61 switch ((cpu_id & 0xF0) >> 4) { /* model number field */ 62 case 0x1: 63 cputype = PMC_CPU_INTEL_P6; 64 break; 65 case 0x3: case 0x5: 66 cputype = PMC_CPU_INTEL_PII; 67 break; 68 case 0x6: 69 cputype = PMC_CPU_INTEL_CL; 70 break; 71 case 0x7: case 0x8: case 0xA: case 0xB: 72 cputype = PMC_CPU_INTEL_PIII; 73 break; 74 case 0x9: case 0xD: 75 cputype = PMC_CPU_INTEL_PM; 76 break; 77 } 78 break; 79 case 0xF00: /* P4 */ 80 model = ((cpu_id & 0xF0000) >> 12) | ((cpu_id & 0xF0) >> 4); 81 if (model >= 0 && model <= 3) /* known models */ 82 cputype = PMC_CPU_INTEL_PIV; 83 break; 84 } 85 86 if ((int) cputype == -1) { 87 printf("pmc: Unknown Intel CPU.\n"); 88 return NULL; 89 } 90 91 MALLOC(pmc_mdep, struct pmc_mdep *, sizeof(struct pmc_mdep), 92 M_PMC, M_WAITOK|M_ZERO); 93 94 pmc_mdep->pmd_cputype = cputype; 95 pmc_mdep->pmd_nclass = 2; 96 pmc_mdep->pmd_classes[0] = PMC_CLASS_TSC; 97 pmc_mdep->pmd_nclasspmcs[0] = 1; 98 99 error = 0; 100 101 switch (cputype) { 102 103 /* 104 * Intel Pentium 4 Processors 105 */ 106 107 case PMC_CPU_INTEL_PIV: 108 error = pmc_initialize_p4(pmc_mdep); 109 break; 110 111 /* 112 * P6 Family Processors 113 */ 114 115 case PMC_CPU_INTEL_P6: 116 case PMC_CPU_INTEL_CL: 117 case PMC_CPU_INTEL_PII: 118 case PMC_CPU_INTEL_PIII: 119 case PMC_CPU_INTEL_PM: 120 121 error = pmc_initialize_p6(pmc_mdep); 122 break; 123 124 /* 125 * Intel Pentium PMCs. 126 */ 127 128 case PMC_CPU_INTEL_P5: 129 error = pmc_initialize_p5(pmc_mdep); 130 break; 131 132 default: 133 KASSERT(0,("[intel,%d] Unknown CPU type", __LINE__)); 134 } 135 136 if (error) { 137 FREE(pmc_mdep, M_PMC); 138 pmc_mdep = NULL; 139 } 140 141 return pmc_mdep; 142 } 143