1 /*- 2 * Copyright (c) 2003-2005 Joseph Koshy 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/lock.h> 32 #include <sys/mutex.h> 33 #include <sys/pmc.h> 34 #include <sys/pmckern.h> 35 #include <sys/smp.h> 36 #include <sys/systm.h> 37 38 #include <machine/cputypes.h> 39 #include <machine/md_var.h> 40 41 struct pmc_mdep * 42 pmc_intel_initialize(void) 43 { 44 struct pmc_mdep *pmc_mdep; 45 enum pmc_cputype cputype; 46 int error, model; 47 48 KASSERT(strcmp(cpu_vendor, "GenuineIntel") == 0, 49 ("[intel,%d] Initializing non-intel processor", __LINE__)); 50 51 PMCDBG(MDP,INI,0, "intel-initialize cpuid=0x%x", cpu_id); 52 53 cputype = -1; 54 55 switch (cpu_id & 0xF00) { 56 case 0x500: /* Pentium family processors */ 57 cputype = PMC_CPU_INTEL_P5; 58 break; 59 case 0x600: /* Pentium Pro, Celeron, Pentium II & III */ 60 switch ((cpu_id & 0xF0) >> 4) { /* model number field */ 61 case 0x1: 62 cputype = PMC_CPU_INTEL_P6; 63 break; 64 case 0x3: case 0x5: 65 cputype = PMC_CPU_INTEL_PII; 66 break; 67 case 0x6: 68 cputype = PMC_CPU_INTEL_CL; 69 break; 70 case 0x7: case 0x8: case 0xA: case 0xB: 71 cputype = PMC_CPU_INTEL_PIII; 72 break; 73 case 0x9: case 0xD: 74 cputype = PMC_CPU_INTEL_PM; 75 break; 76 } 77 break; 78 case 0xF00: /* P4 */ 79 model = ((cpu_id & 0xF0000) >> 12) | ((cpu_id & 0xF0) >> 4); 80 if (model >= 0 && model <= 3) /* known models */ 81 cputype = PMC_CPU_INTEL_PIV; 82 break; 83 } 84 85 if ((int) cputype == -1) { 86 printf("pmc: Unknown Intel CPU.\n"); 87 return NULL; 88 } 89 90 MALLOC(pmc_mdep, struct pmc_mdep *, sizeof(struct pmc_mdep), 91 M_PMC, M_WAITOK|M_ZERO); 92 93 pmc_mdep->pmd_cputype = cputype; 94 pmc_mdep->pmd_nclass = 2; 95 pmc_mdep->pmd_classes[0].pm_class = PMC_CLASS_TSC; 96 pmc_mdep->pmd_classes[0].pm_caps = PMC_CAP_READ; 97 pmc_mdep->pmd_classes[0].pm_width = 64; 98 pmc_mdep->pmd_nclasspmcs[0] = 1; 99 100 error = 0; 101 102 switch (cputype) { 103 104 /* 105 * Intel Pentium 4 Processors 106 */ 107 108 case PMC_CPU_INTEL_PIV: 109 error = pmc_initialize_p4(pmc_mdep); 110 break; 111 112 /* 113 * P6 Family Processors 114 */ 115 116 case PMC_CPU_INTEL_P6: 117 case PMC_CPU_INTEL_CL: 118 case PMC_CPU_INTEL_PII: 119 case PMC_CPU_INTEL_PIII: 120 case PMC_CPU_INTEL_PM: 121 122 error = pmc_initialize_p6(pmc_mdep); 123 break; 124 125 /* 126 * Intel Pentium PMCs. 127 */ 128 129 case PMC_CPU_INTEL_P5: 130 error = pmc_initialize_p5(pmc_mdep); 131 break; 132 133 default: 134 KASSERT(0,("[intel,%d] Unknown CPU type", __LINE__)); 135 } 136 137 if (error) { 138 FREE(pmc_mdep, M_PMC); 139 pmc_mdep = NULL; 140 } 141 142 return pmc_mdep; 143 } 144