1 /* 2 * Copyright (c) HighPoint Technologies, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 #include <dev/hptrr/hptrr_config.h> 29 /* $Id: os_bsd.c,v 1.11 2005/06/03 14:06:38 kdh Exp $ 30 * 31 * HighPoint RAID Driver for FreeBSD 32 * Copyright (C) 2005 HighPoint Technologies, Inc. All Rights Reserved. 33 */ 34 35 #include <dev/hptrr/os_bsd.h> 36 37 /* hardware access */ 38 HPT_U8 os_inb (void *port) { return inb((unsigned)(HPT_UPTR)port); } 39 HPT_U16 os_inw (void *port) { return inw((unsigned)(HPT_UPTR)port); } 40 HPT_U32 os_inl (void *port) { return inl((unsigned)(HPT_UPTR)port); } 41 42 void os_outb (void *port, HPT_U8 value) { outb((unsigned)(HPT_UPTR)port, (value)); } 43 void os_outw (void *port, HPT_U16 value) { outw((unsigned)(HPT_UPTR)port, (value)); } 44 void os_outl (void *port, HPT_U32 value) { outl((unsigned)(HPT_UPTR)port, (value)); } 45 46 void os_insw (void *port, HPT_U16 *buffer, HPT_U32 count) 47 { insw((unsigned)(HPT_UPTR)port, (void *)buffer, count); } 48 49 void os_outsw(void *port, HPT_U16 *buffer, HPT_U32 count) 50 { outsw((unsigned)(HPT_UPTR)port, (void *)buffer, count); } 51 52 HPT_U32 __dummy_reg = 0; 53 54 /* PCI configuration space */ 55 HPT_U8 os_pci_readb (void *osext, HPT_U8 offset) 56 { 57 return pci_read_config(((PHBA)osext)->pcidev, offset, 1); 58 } 59 60 HPT_U16 os_pci_readw (void *osext, HPT_U8 offset) 61 { 62 return pci_read_config(((PHBA)osext)->pcidev, offset, 2); 63 } 64 65 HPT_U32 os_pci_readl (void *osext, HPT_U8 offset) 66 { 67 return pci_read_config(((PHBA)osext)->pcidev, offset, 4); 68 } 69 70 void os_pci_writeb (void *osext, HPT_U8 offset, HPT_U8 value) 71 { 72 pci_write_config(((PHBA)osext)->pcidev, offset, value, 1); 73 } 74 75 void os_pci_writew (void *osext, HPT_U8 offset, HPT_U16 value) 76 { 77 pci_write_config(((PHBA)osext)->pcidev, offset, value, 2); 78 } 79 80 void os_pci_writel (void *osext, HPT_U8 offset, HPT_U32 value) 81 { 82 pci_write_config(((PHBA)osext)->pcidev, offset, value, 4); 83 } 84 85 void *os_map_pci_bar( 86 void *osext, 87 int index, 88 HPT_U32 offset, 89 HPT_U32 length 90 ) 91 { 92 PHBA hba = (PHBA)osext; 93 94 hba->pcibar[index].rid = 0x10 + index * 4; 95 96 if (pci_read_config(hba->pcidev, hba->pcibar[index].rid, 4) & 1) 97 hba->pcibar[index].type = SYS_RES_IOPORT; 98 else 99 hba->pcibar[index].type = SYS_RES_MEMORY; 100 101 hba->pcibar[index].res = bus_alloc_resource(hba->pcidev, 102 hba->pcibar[index].type, &hba->pcibar[index].rid, 0, ~0, length, RF_ACTIVE); 103 104 hba->pcibar[index].base = (char *)rman_get_virtual(hba->pcibar[index].res) + offset; 105 return hba->pcibar[index].base; 106 } 107 108 void os_unmap_pci_bar(void *osext, void *base) 109 { 110 PHBA hba = (PHBA)osext; 111 int index; 112 113 for (index=0; index<6; index++) { 114 if (hba->pcibar[index].base==base) { 115 bus_release_resource(hba->pcidev, hba->pcibar[index].type, 116 hba->pcibar[index].rid, hba->pcibar[index].res); 117 hba->pcibar[index].base = 0; 118 return; 119 } 120 } 121 } 122 123 void freelist_reserve(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT count) 124 { 125 PVBUS_EXT vbus_ext = osext; 126 127 if (vbus_ext->ext_type!=EXT_TYPE_VBUS) 128 vbus_ext = ((PHBA)osext)->vbus_ext; 129 130 list->next = vbus_ext->freelist_head; 131 vbus_ext->freelist_head = list; 132 list->dma = 0; 133 list->size = size; 134 list->head = 0; 135 #if DBG 136 list->reserved_count = 137 #endif 138 list->count = count; 139 } 140 141 void *freelist_get(struct freelist *list) 142 { 143 void * result; 144 if (list->count) { 145 HPT_ASSERT(list->head); 146 result = list->head; 147 list->head = *(void **)result; 148 list->count--; 149 return result; 150 } 151 return 0; 152 } 153 154 void freelist_put(struct freelist * list, void *p) 155 { 156 HPT_ASSERT(list->dma==0); 157 list->count++; 158 *(void **)p = list->head; 159 list->head = p; 160 } 161 162 void freelist_reserve_dma(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT alignment, HPT_UINT count) 163 { 164 PVBUS_EXT vbus_ext = osext; 165 166 if (vbus_ext->ext_type!=EXT_TYPE_VBUS) 167 vbus_ext = ((PHBA)osext)->vbus_ext; 168 169 list->next = vbus_ext->freelist_dma_head; 170 vbus_ext->freelist_dma_head = list; 171 list->dma = 1; 172 list->alignment = alignment; 173 list->size = size; 174 list->head = 0; 175 #if DBG 176 list->reserved_count = 177 #endif 178 list->count = count; 179 } 180 181 void *freelist_get_dma(struct freelist *list, BUS_ADDRESS *busaddr) 182 { 183 void *result; 184 HPT_ASSERT(list->dma); 185 result = freelist_get(list); 186 if (result) 187 *busaddr = *(BUS_ADDRESS *)((void **)result+1); 188 return result; 189 } 190 191 void freelist_put_dma(struct freelist *list, void *p, BUS_ADDRESS busaddr) 192 { 193 HPT_ASSERT(list->dma); 194 list->count++; 195 *(void **)p = list->head; 196 *(BUS_ADDRESS *)((void **)p+1) = busaddr; 197 list->head = p; 198 } 199 200 HPT_U32 os_get_stamp(void) 201 { 202 HPT_U32 stamp; 203 do { stamp = random(); } while (stamp==0); 204 return stamp; 205 } 206 207 void os_stallexec(HPT_U32 microseconds) 208 { 209 DELAY(microseconds); 210 } 211 212 static void os_timer_for_ldm(void *arg) 213 { 214 PVBUS_EXT vbus_ext = (PVBUS_EXT)arg; 215 ldm_on_timer((PVBUS)vbus_ext->vbus); 216 } 217 218 void os_request_timer(void * osext, HPT_U32 interval) 219 { 220 PVBUS_EXT vbus_ext = osext; 221 222 HPT_ASSERT(vbus_ext->ext_type==EXT_TYPE_VBUS); 223 224 callout_reset_sbt(&vbus_ext->timer, SBT_1US * interval, 0, 225 os_timer_for_ldm, vbus_ext, 0); 226 } 227 228 HPT_TIME os_query_time(void) 229 { 230 return ticks * (1000000 / hz); 231 } 232 233 void os_schedule_task(void *osext, OSM_TASK *task) 234 { 235 PVBUS_EXT vbus_ext = osext; 236 237 HPT_ASSERT(task->next==0); 238 239 if (vbus_ext->tasks==0) 240 vbus_ext->tasks = task; 241 else { 242 OSM_TASK *t = vbus_ext->tasks; 243 while (t->next) t = t->next; 244 t->next = task; 245 } 246 247 if (vbus_ext->worker.ta_context) 248 TASK_ENQUEUE(&vbus_ext->worker); 249 } 250 251 int os_revalidate_device(void *osext, int id) 252 { 253 254 return 0; 255 } 256 257 int os_query_remove_device(void *osext, int id) 258 { 259 return 0; 260 } 261 262 HPT_U8 os_get_vbus_seq(void *osext) 263 { 264 return ((PVBUS_EXT)osext)->sim->path_id; 265 } 266 267 int os_printk(char *fmt, ...) 268 { 269 va_list args; 270 static char buf[512]; 271 272 va_start(args, fmt); 273 vsnprintf(buf, sizeof(buf), fmt, args); 274 va_end(args); 275 return printf("%s: %s\n", driver_name, buf); 276 } 277 278 #if DBG 279 void os_check_stack(const char *location, int size){} 280 281 void __os_dbgbreak(const char *file, int line) 282 { 283 printf("*** break at %s:%d ***", file, line); 284 while (1); 285 } 286 287 int hptrr_dbg_level = 1; 288 #endif 289