1718cf2ccSPedro F. Giffuni /*- 2*4d846d26SWarner Losh * SPDX-License-Identifier: BSD-2-Clause 3718cf2ccSPedro F. Giffuni * 4b063a422SScott Long * Copyright (c) HighPoint Technologies, Inc. 5b063a422SScott Long * All rights reserved. 6b063a422SScott Long * 7b063a422SScott Long * Redistribution and use in source and binary forms, with or without 8b063a422SScott Long * modification, are permitted provided that the following conditions 9b063a422SScott Long * are met: 10b063a422SScott Long * 1. Redistributions of source code must retain the above copyright 11b063a422SScott Long * notice, this list of conditions and the following disclaimer. 12b063a422SScott Long * 2. Redistributions in binary form must reproduce the above copyright 13b063a422SScott Long * notice, this list of conditions and the following disclaimer in the 14b063a422SScott Long * documentation and/or other materials provided with the distribution. 15b063a422SScott Long * 16b063a422SScott Long * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17b063a422SScott Long * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18b063a422SScott Long * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19b063a422SScott Long * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20b063a422SScott Long * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21b063a422SScott Long * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22b063a422SScott Long * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23b063a422SScott Long * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24b063a422SScott Long * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25b063a422SScott Long * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26b063a422SScott Long * SUCH DAMAGE. 27b063a422SScott Long */ 28b063a422SScott Long #ifndef hptrr_CONFIG_H 29b063a422SScott Long #define hptrr_CONFIG_H 30b063a422SScott Long #define SUPPORT_ARRAY 31b063a422SScott Long #define __KERNEL__ 1 32b063a422SScott Long #define DRIVER_MINOR 16 33b063a422SScott Long #define TARGETNAME hptrr 34b063a422SScott Long #define __dummy_reg hptrr___dummy_reg 35b063a422SScott Long #define __ldm_alloc_cmd hptrr___ldm_alloc_cmd 364fdb276aSScott Long #define delay_between_spinup hptrr_delay_between_spinup 37b063a422SScott Long #define dmapool_active hptrr_dmapool_active 38b063a422SScott Long #define dmapool_get_page hptrr_dmapool_get_page 39b063a422SScott Long #define dmapool_get_page_at hptrr_dmapool_get_page_at 40b063a422SScott Long #define dmapool_make_order hptrr_dmapool_make_order 41b063a422SScott Long #define dmapool_max_class_pages hptrr_dmapool_max_class_pages 42b063a422SScott Long #define dmapool_put_page hptrr_dmapool_put_page 43b063a422SScott Long #define dmapool_register_client hptrr_dmapool_register_client 44b063a422SScott Long #define driver_name hptrr_driver_name 45b063a422SScott Long #define driver_name_long hptrr_driver_name_long 46b063a422SScott Long #define driver_ver hptrr_driver_ver 47b063a422SScott Long #define freelist_get hptrr_freelist_get 48b063a422SScott Long #define freelist_get_dma hptrr_freelist_get_dma 49b063a422SScott Long #define freelist_put hptrr_freelist_put 50b063a422SScott Long #define freelist_put_dma hptrr_freelist_put_dma 51b063a422SScott Long #define freelist_reserve hptrr_freelist_reserve 52b063a422SScott Long #define freelist_reserve_dma hptrr_freelist_reserve_dma 534fdb276aSScott Long #define gautorebuild hptrr_gautorebuild 544fdb276aSScott Long #define grebuildpriority hptrr_grebuildpriority 55b063a422SScott Long #define him_handle_to_vbus hptrr_him_handle_to_vbus 56b063a422SScott Long #define him_list hptrr_him_list 57b063a422SScott Long #define init_config hptrr_init_config 58b063a422SScott Long #define init_module_him_rr1720 hptrr_init_module_him_rr1720 59b063a422SScott Long #define init_module_him_rr174x_rr2210pm hptrr_init_module_him_rr174x_rr2210pm 60b063a422SScott Long #define init_module_him_rr222x_rr2240 hptrr_init_module_him_rr222x_rr2240 61b063a422SScott Long #define init_module_him_rr2310pm hptrr_init_module_him_rr2310pm 62b063a422SScott Long #define init_module_him_rr232x hptrr_init_module_him_rr232x 63b063a422SScott Long #define init_module_him_rr2340 hptrr_init_module_him_rr2340 64b063a422SScott Long #define init_module_him_rr2522pm hptrr_init_module_him_rr2522pm 65b063a422SScott Long #define init_module_jbod hptrr_init_module_jbod 66b063a422SScott Long #define init_module_partition hptrr_init_module_partition 67b063a422SScott Long #define init_module_raid0 hptrr_init_module_raid0 68b063a422SScott Long #define init_module_raid1 hptrr_init_module_raid1 69b063a422SScott Long #define init_module_raid5 hptrr_init_module_raid5 70b063a422SScott Long #define init_module_vdev_raw hptrr_init_module_vdev_raw 71b063a422SScott Long #define ldm_acquire_lock hptrr_ldm_acquire_lock 72b063a422SScott Long #define ldm_add_spare_to_array hptrr_ldm_add_spare_to_array 734fdb276aSScott Long #define ldm_alloc_cmds_R_6_46_69_43_16 hptrr_ldm_alloc_cmds_R_6_46_69_43_16 74b063a422SScott Long #define ldm_alloc_cmds_from_list hptrr_ldm_alloc_cmds_from_list 75b063a422SScott Long #define ldm_check_array_online hptrr_ldm_check_array_online 76b063a422SScott Long #define ldm_create_vbus hptrr_ldm_create_vbus 77b063a422SScott Long #define ldm_create_vdev hptrr_ldm_create_vdev 78b063a422SScott Long #define ldm_event_notify hptrr_ldm_event_notify 79b063a422SScott Long #define ldm_find_stamp hptrr_ldm_find_stamp 80b063a422SScott Long #define ldm_find_target hptrr_ldm_find_target 81b063a422SScott Long #define ldm_finish_cmd hptrr_ldm_finish_cmd 82b063a422SScott Long #define ldm_free_cmds hptrr_ldm_free_cmds 83b063a422SScott Long #define ldm_free_cmds_to_list hptrr_ldm_free_cmds_to_list 84b063a422SScott Long #define ldm_generic_member_failed hptrr_ldm_generic_member_failed 85b063a422SScott Long #define ldm_get_cmd_size hptrr_ldm_get_cmd_size 86b063a422SScott Long #define ldm_get_device_id hptrr_ldm_get_device_id 87b063a422SScott Long #define ldm_get_mem_info hptrr_ldm_get_mem_info 88b063a422SScott Long #define ldm_get_next_vbus hptrr_ldm_get_next_vbus 89b063a422SScott Long #define ldm_get_vbus_ext hptrr_ldm_get_vbus_ext 90b063a422SScott Long #define ldm_get_vbus_size hptrr_ldm_get_vbus_size 914fdb276aSScott Long #define ldm_ide_fixstring hptrr_ldm_ide_fixstring 92b063a422SScott Long #define ldm_idle hptrr_ldm_idle 93b063a422SScott Long #define ldm_initialize_vbus_async hptrr_ldm_initialize_vbus_async 94b063a422SScott Long #define ldm_intr hptrr_ldm_intr 95b063a422SScott Long #define ldm_ioctl hptrr_ldm_ioctl 96b063a422SScott Long #define ldm_on_timer hptrr_ldm_on_timer 97b063a422SScott Long #define ldm_queue_cmd hptrr_ldm_queue_cmd 98b063a422SScott Long #define ldm_queue_task hptrr_ldm_queue_task 99b063a422SScott Long #define ldm_queue_vbus_dpc hptrr_ldm_queue_vbus_dpc 100b063a422SScott Long #define ldm_register_adapter hptrr_ldm_register_adapter 101b063a422SScott Long #define ldm_register_device hptrr_ldm_register_device 1024fdb276aSScott Long #define ldm_register_him_R_6_46_69_43_16 hptrr_ldm_register_him_R_6_46_69_43_16 1034fdb276aSScott Long #define ldm_register_vdev_class_R_6_46_69_43_16 hptrr_ldm_register_vdev_class_R_6_46_69_43_16 104b063a422SScott Long #define ldm_release_lock hptrr_ldm_release_lock 105b063a422SScott Long #define ldm_release_vbus hptrr_ldm_release_vbus 106b063a422SScott Long #define ldm_release_vdev hptrr_ldm_release_vdev 107b063a422SScott Long #define ldm_remove_timer hptrr_ldm_remove_timer 108b063a422SScott Long #define ldm_request_timer hptrr_ldm_request_timer 109b063a422SScott Long #define ldm_reset_vbus hptrr_ldm_reset_vbus 110b063a422SScott Long #define ldm_resume hptrr_ldm_resume 111b063a422SScott Long #define ldm_set_autorebuild hptrr_ldm_set_autorebuild 112b063a422SScott Long #define ldm_set_rebuild_priority hptrr_ldm_set_rebuild_priority 113b063a422SScott Long #define ldm_shutdown hptrr_ldm_shutdown 114b063a422SScott Long #define ldm_suspend hptrr_ldm_suspend 115b063a422SScott Long #define ldm_sync_array_info hptrr_ldm_sync_array_info 116b063a422SScott Long #define ldm_sync_array_stamp hptrr_ldm_sync_array_stamp 117b063a422SScott Long #define ldm_timer_probe_device hptrr_ldm_timer_probe_device 118b063a422SScott Long #define ldm_unregister_device hptrr_ldm_unregister_device 119b063a422SScott Long #define log_sector_repair hptrr_log_sector_repair 120b063a422SScott Long #define num_drives_per_spinup hptrr_num_drives_per_spinup 121b063a422SScott Long #define os_get_stamp hptrr_os_get_stamp 122b063a422SScott Long #define os_get_vbus_seq hptrr_os_get_vbus_seq 123b063a422SScott Long #define os_inb hptrr_os_inb 124b063a422SScott Long #define os_inl hptrr_os_inl 125b063a422SScott Long #define os_insw hptrr_os_insw 126b063a422SScott Long #define os_inw hptrr_os_inw 127b063a422SScott Long #define os_map_pci_bar hptrr_os_map_pci_bar 1284fdb276aSScott Long #define os_max_cache_size hptrr_os_max_cache_size 129b063a422SScott Long #define os_outb hptrr_os_outb 130b063a422SScott Long #define os_outl hptrr_os_outl 131b063a422SScott Long #define os_outsw hptrr_os_outsw 132b063a422SScott Long #define os_outw hptrr_os_outw 133b063a422SScott Long #define os_pci_readb hptrr_os_pci_readb 134b063a422SScott Long #define os_pci_readl hptrr_os_pci_readl 135b063a422SScott Long #define os_pci_readw hptrr_os_pci_readw 136b063a422SScott Long #define os_pci_writeb hptrr_os_pci_writeb 137b063a422SScott Long #define os_pci_writel hptrr_os_pci_writel 138b063a422SScott Long #define os_pci_writew hptrr_os_pci_writew 139b063a422SScott Long #define os_printk hptrr_os_printk 140b063a422SScott Long #define os_query_remove_device hptrr_os_query_remove_device 141b063a422SScott Long #define os_query_time hptrr_os_query_time 142b063a422SScott Long #define os_request_timer hptrr_os_request_timer 143b063a422SScott Long #define os_revalidate_device hptrr_os_revalidate_device 144b063a422SScott Long #define os_schedule_task hptrr_os_schedule_task 145b063a422SScott Long #define os_stallexec hptrr_os_stallexec 146b063a422SScott Long #define os_unmap_pci_bar hptrr_os_unmap_pci_bar 147b063a422SScott Long #define osm_max_targets hptrr_osm_max_targets 148b063a422SScott Long #define vdev_queue_cmd hptrr_vdev_queue_cmd 149b063a422SScott Long #endif 150