11fdeb165SXin LI /* $Id: him.h,v 1.57 2011/02/21 06:03:21 zsf Exp $ */ 21fdeb165SXin LI /*- 31fdeb165SXin LI * Copyright (C) 2004-2005 HighPoint Technologies, Inc. 41fdeb165SXin LI * All rights reserved. 51fdeb165SXin LI * 61fdeb165SXin LI * Redistribution and use in source and binary forms, with or without 71fdeb165SXin LI * modification, are permitted provided that the following conditions 81fdeb165SXin LI * are met: 91fdeb165SXin LI * 1. Redistributions of source code must retain the above copyright 101fdeb165SXin LI * notice, this list of conditions and the following disclaimer. 111fdeb165SXin LI * 2. Redistributions in binary form must reproduce the above copyright 121fdeb165SXin LI * notice, this list of conditions and the following disclaimer in the 131fdeb165SXin LI * documentation and/or other materials provided with the distribution. 141fdeb165SXin LI * 151fdeb165SXin LI * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 161fdeb165SXin LI * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 171fdeb165SXin LI * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 181fdeb165SXin LI * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 191fdeb165SXin LI * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 201fdeb165SXin LI * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 211fdeb165SXin LI * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 221fdeb165SXin LI * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 231fdeb165SXin LI * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 241fdeb165SXin LI * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 251fdeb165SXin LI * SUCH DAMAGE. 261fdeb165SXin LI * 271fdeb165SXin LI * $FreeBSD$ 281fdeb165SXin LI */ 291fdeb165SXin LI #include <dev/hptnr/hptnr_config.h> 301fdeb165SXin LI #ifndef _HPT_HIM_H_ 311fdeb165SXin LI #define _HPT_HIM_H_ 321fdeb165SXin LI 331fdeb165SXin LI #define VERMAGIC_HIM 55 341fdeb165SXin LI 351fdeb165SXin LI #if defined(__cplusplus) 361fdeb165SXin LI extern "C" { 371fdeb165SXin LI #endif 381fdeb165SXin LI 391fdeb165SXin LI #include <dev/hptnr/list.h> 401fdeb165SXin LI 411fdeb165SXin LI #define SECTOR_TO_BYTE_SHIFT 9 421fdeb165SXin LI #define SECTOR_TO_BYTE(x) ((HPT_U32)(x) << SECTOR_TO_BYTE_SHIFT) 431fdeb165SXin LI #define BYTE_TO_SECTOR(x) ((x)>>SECTOR_TO_BYTE_SHIFT) 441fdeb165SXin LI 451fdeb165SXin LI typedef struct _PCI_ID 461fdeb165SXin LI { 471fdeb165SXin LI HPT_U16 vid; 481fdeb165SXin LI HPT_U16 did; 491fdeb165SXin LI HPT_U32 subsys; 501fdeb165SXin LI HPT_U8 rev; 511fdeb165SXin LI HPT_U8 nbase; 521fdeb165SXin LI HPT_U16 reserve; 531fdeb165SXin LI } 541fdeb165SXin LI PCI_ID; 551fdeb165SXin LI 561fdeb165SXin LI typedef struct _PCI_ADDRESS 571fdeb165SXin LI { 581fdeb165SXin LI HPT_U8 tree; 591fdeb165SXin LI HPT_U8 bus; 601fdeb165SXin LI HPT_U8 device; 611fdeb165SXin LI HPT_U8 function; 621fdeb165SXin LI } 631fdeb165SXin LI PCI_ADDRESS; 641fdeb165SXin LI 651fdeb165SXin LI typedef struct _HIM_ADAPTER_CONFIG 661fdeb165SXin LI { 671fdeb165SXin LI PCI_ADDRESS pci_addr; 681fdeb165SXin LI PCI_ID pci_id; 691fdeb165SXin LI 701fdeb165SXin LI HPT_U8 max_devices; 711fdeb165SXin LI 721fdeb165SXin LI HPT_U8 bProbeInInitializing:1; 731fdeb165SXin LI 741fdeb165SXin LI HPT_U8 bSpinupOneDevEachTime:1; 751fdeb165SXin LI 761fdeb165SXin LI HPT_U8 bGlobalNcq:1; 771fdeb165SXin LI HPT_U8 bSGPIOPartSupport:1; 781fdeb165SXin LI 791fdeb165SXin LI HPT_U8 bNeedSASIdleTimer:1; 801fdeb165SXin LI HPT_U8 reserved:3; 811fdeb165SXin LI 821fdeb165SXin LI HPT_U8 bDevsPerBus; 831fdeb165SXin LI HPT_U8 first_on_slot; 841fdeb165SXin LI 851fdeb165SXin LI HPT_U8 bChipType; 861fdeb165SXin LI HPT_U8 bChipIntrNum; 871fdeb165SXin LI HPT_U8 bChipFlags; 881fdeb165SXin LI HPT_U8 bNumBuses; 891fdeb165SXin LI 901fdeb165SXin LI HPT_U8 szVendorID[36]; 911fdeb165SXin LI HPT_U8 szProductID[36]; 921fdeb165SXin LI HPT_U32 nvramSize; 931fdeb165SXin LI HPT_U64 nvramAddress; 941fdeb165SXin LI HPT_U8 slot_index; 951fdeb165SXin LI HPT_U8 maxWidth; 961fdeb165SXin LI HPT_U8 currentWidth; 971fdeb165SXin LI HPT_U8 maxSpeed; 981fdeb165SXin LI HPT_U8 currentSpeed; 991fdeb165SXin LI HPT_U8 reserved2[7]; 1001fdeb165SXin LI } 1011fdeb165SXin LI HIM_ADAPTER_CONFIG, *PHIM_ADAPTER_CONFIG; 1021fdeb165SXin LI 1031fdeb165SXin LI typedef struct _HIM_CHANNEL_CONFIG 1041fdeb165SXin LI { 1051fdeb165SXin LI HPT_U32 io_port; 1061fdeb165SXin LI HPT_U32 ctl_port; 1071fdeb165SXin LI } HIM_CHANNEL_CONFIG, *PHIM_CHANNEL_CONFIG; 1081fdeb165SXin LI 1091fdeb165SXin LI typedef struct _HIM_DEVICE_FLAGS 1101fdeb165SXin LI { 1111fdeb165SXin LI HPT_UINT df_atapi :1; 1121fdeb165SXin LI HPT_UINT df_removable_drive :1; 1131fdeb165SXin LI HPT_UINT df_on_line :1; 1141fdeb165SXin LI HPT_UINT df_reduce_mode :1; 1151fdeb165SXin LI HPT_UINT df_sata :1; 1161fdeb165SXin LI HPT_UINT df_on_pm_port :1; 1171fdeb165SXin LI HPT_UINT df_support_read_ahead :1; 1181fdeb165SXin LI HPT_UINT df_read_ahead_enabled :1; 1191fdeb165SXin LI HPT_UINT df_support_write_cache :1; 1201fdeb165SXin LI HPT_UINT df_write_cache_enabled :1; 1211fdeb165SXin LI HPT_UINT df_cdrom_device :1; 1221fdeb165SXin LI HPT_UINT df_tape_device :1; 1231fdeb165SXin LI HPT_UINT df_support_tcq :1; 1241fdeb165SXin LI HPT_UINT df_tcq_enabled :1; 1251fdeb165SXin LI HPT_UINT df_support_ncq :1; 1261fdeb165SXin LI HPT_UINT df_ncq_enabled :1; 1271fdeb165SXin LI HPT_UINT df_sas :1; 1281fdeb165SXin LI HPT_UINT df_in_enclosure :1; 1291fdeb165SXin LI HPT_UINT df_ssd :1; 1301fdeb165SXin LI } DEVICE_FLAGS, *PDEVICE_FLAGS; 1311fdeb165SXin LI 1321fdeb165SXin LI #pragma pack(1) 1331fdeb165SXin LI typedef struct _IDENTIFY_DATA { 1341fdeb165SXin LI HPT_U16 GeneralConfiguration; 1351fdeb165SXin LI HPT_U16 NumberOfCylinders; 1361fdeb165SXin LI HPT_U16 Reserved1; 1371fdeb165SXin LI HPT_U16 NumberOfHeads; 1381fdeb165SXin LI HPT_U16 UnformattedBytesPerTrack; 1391fdeb165SXin LI HPT_U16 UnformattedBytesPerSector; 1401fdeb165SXin LI HPT_U8 SasAddress[8]; 1411fdeb165SXin LI HPT_U16 SerialNumber[10]; 1421fdeb165SXin LI HPT_U16 BufferType; 1431fdeb165SXin LI HPT_U16 BufferSectorSize; 1441fdeb165SXin LI HPT_U16 NumberOfEccBytes; 1451fdeb165SXin LI HPT_U16 FirmwareRevision[4]; 1461fdeb165SXin LI HPT_U16 ModelNumber[20]; 1471fdeb165SXin LI HPT_U8 MaximumBlockTransfer; 1481fdeb165SXin LI HPT_U8 VendorUnique2; 1491fdeb165SXin LI HPT_U16 DoubleWordIo; 1501fdeb165SXin LI HPT_U16 Capabilities; 1511fdeb165SXin LI HPT_U16 Reserved2; 1521fdeb165SXin LI HPT_U8 VendorUnique3; 1531fdeb165SXin LI HPT_U8 PioCycleTimingMode; 1541fdeb165SXin LI HPT_U8 VendorUnique4; 1551fdeb165SXin LI HPT_U8 DmaCycleTimingMode; 1561fdeb165SXin LI HPT_U16 TranslationFieldsValid; 1571fdeb165SXin LI HPT_U16 NumberOfCurrentCylinders; 1581fdeb165SXin LI HPT_U16 NumberOfCurrentHeads; 1591fdeb165SXin LI HPT_U16 CurrentSectorsPerTrack; 1601fdeb165SXin LI HPT_U32 CurrentSectorCapacity; 1611fdeb165SXin LI HPT_U16 CurrentMultiSectorSetting; 1621fdeb165SXin LI HPT_U32 UserAddressableSectors; 1631fdeb165SXin LI HPT_U8 SingleWordDMASupport; 1641fdeb165SXin LI HPT_U8 SingleWordDMAActive; 1651fdeb165SXin LI HPT_U8 MultiWordDMASupport; 1661fdeb165SXin LI HPT_U8 MultiWordDMAActive; 1671fdeb165SXin LI HPT_U8 AdvancedPIOModes; 1681fdeb165SXin LI HPT_U8 Reserved4; 1691fdeb165SXin LI HPT_U16 MinimumMWXferCycleTime; 1701fdeb165SXin LI HPT_U16 RecommendedMWXferCycleTime; 1711fdeb165SXin LI HPT_U16 MinimumPIOCycleTime; 1721fdeb165SXin LI HPT_U16 MinimumPIOCycleTimeIORDY; 1731fdeb165SXin LI HPT_U16 Reserved5[2]; 1741fdeb165SXin LI HPT_U16 ReleaseTimeOverlapped; 1751fdeb165SXin LI HPT_U16 ReleaseTimeServiceCommand; 1761fdeb165SXin LI HPT_U16 MajorRevision; 1771fdeb165SXin LI HPT_U16 MinorRevision; 1781fdeb165SXin LI HPT_U16 MaxQueueDepth; 1791fdeb165SXin LI HPT_U16 SataCapability; 1801fdeb165SXin LI HPT_U16 Reserved6[9]; 1811fdeb165SXin LI HPT_U16 CommandSupport; 1821fdeb165SXin LI HPT_U16 CommandEnable; 1831fdeb165SXin LI HPT_U16 UtralDmaMode; 1841fdeb165SXin LI HPT_U16 Reserved7[11]; 1851fdeb165SXin LI HPT_U32 Lba48BitLow; 1861fdeb165SXin LI HPT_U32 Lba48BitHigh; 1871fdeb165SXin LI HPT_U16 Reserved8[23]; 1881fdeb165SXin LI HPT_U16 SpecialFunctionsEnabled; 1891fdeb165SXin LI HPT_U16 Reserved9[128]; 1901fdeb165SXin LI } 1911fdeb165SXin LI #ifdef __GNUC__ 1921fdeb165SXin LI __attribute__((packed)) 1931fdeb165SXin LI #endif 1941fdeb165SXin LI IDENTIFY_DATA, *PIDENTIFY_DATA; 1951fdeb165SXin LI #pragma pack() 1961fdeb165SXin LI 1971fdeb165SXin LI typedef struct _HIM_DEVICE_CONFIG 1981fdeb165SXin LI { 1991fdeb165SXin LI HPT_U64 capacity; 200*e157d597SXin LI HPT_U32 logical_sector_size; 2011fdeb165SXin LI 2021fdeb165SXin LI DEVICE_FLAGS flags; 2031fdeb165SXin LI 2041fdeb165SXin LI HPT_U8 path_id; 2051fdeb165SXin LI HPT_U8 target_id; 2061fdeb165SXin LI HPT_U8 max_queue_depth; 2071fdeb165SXin LI HPT_U8 spin_up_mode; 2081fdeb165SXin LI 2091fdeb165SXin LI HPT_U8 reserved; 2101fdeb165SXin LI HPT_U8 transfer_mode; 2111fdeb165SXin LI HPT_U8 bMaxShowMode; 2121fdeb165SXin LI HPT_U8 bDeUsable_Mode; 2131fdeb165SXin LI 2141fdeb165SXin LI HPT_U16 max_sectors_per_cmd; 2151fdeb165SXin LI 2161fdeb165SXin LI PIDENTIFY_DATA pIdentifyData; 2171fdeb165SXin LI 2181fdeb165SXin LI 2191fdeb165SXin LI HPT_U8 fixed_path_id; /*equals to phy id */ 2201fdeb165SXin LI } 2211fdeb165SXin LI HIM_DEVICE_CONFIG, *PHIM_DEVICE_CONFIG; 2221fdeb165SXin LI 2231fdeb165SXin LI 2241fdeb165SXin LI #define _DIT_MODE 0 2251fdeb165SXin LI #define _DIT_601 1 2261fdeb165SXin LI #define _DIT_READ_AHEAD 2 2271fdeb165SXin LI #define _DIT_WRITE_CACHE 3 2281fdeb165SXin LI #define _DIT_TCQ 4 2291fdeb165SXin LI #define _DIT_NCQ 5 2301fdeb165SXin LI #define _DIT_BEEP_OFF 6 2311fdeb165SXin LI #define _DIT_SPIN_UP_MODE 7 2321fdeb165SXin LI #define _DIT_IDLE_STANDBY 8 2331fdeb165SXin LI #define _DIT_IDENTIFY 9 2341fdeb165SXin LI 2351fdeb165SXin LI #define SPIN_UP_MODE_NOSUPPORT 0 2361fdeb165SXin LI #define SPIN_UP_MODE_FULL 1 2371fdeb165SXin LI #define SPIN_UP_MODE_STANDBY 2 2381fdeb165SXin LI 2391fdeb165SXin LI struct tcq_control { 2401fdeb165SXin LI HPT_U8 enable; 2411fdeb165SXin LI HPT_U8 depth; 2421fdeb165SXin LI }; 2431fdeb165SXin LI 2441fdeb165SXin LI struct ncq_control { 2451fdeb165SXin LI HPT_U8 enable; 2461fdeb165SXin LI HPT_U8 depth; 2471fdeb165SXin LI }; 2481fdeb165SXin LI 2491fdeb165SXin LI typedef struct _HIM_ALTERABLE_DEV_INFO{ 2501fdeb165SXin LI HPT_U8 type; 2511fdeb165SXin LI union { 2521fdeb165SXin LI HPT_U8 mode; 2531fdeb165SXin LI HPT_U8 enable_read_ahead; 2541fdeb165SXin LI HPT_U8 enable_read_cache; 2551fdeb165SXin LI HPT_U8 enable_write_cache; 2561fdeb165SXin LI struct tcq_control tcq; 2571fdeb165SXin LI struct ncq_control ncq; 2581fdeb165SXin LI void * adapter; 2591fdeb165SXin LI HPT_U8 spin_up_mode; 2601fdeb165SXin LI HPT_U8 idle_standby_timeout; 2611fdeb165SXin LI HPT_U8 identify_indicator; 2621fdeb165SXin LI }u; 2631fdeb165SXin LI } HIM_ALTERABLE_DEV_INFO, *PHIM_ALTERABLE_DEV_INFO; 2641fdeb165SXin LI 2651fdeb165SXin LI struct _COMMAND; 2661fdeb165SXin LI struct _IOCTL_ARG; 2671fdeb165SXin LI 2681fdeb165SXin LI typedef void (*PROBE_CALLBACK)(void *arg, void *dev, int index); 2691fdeb165SXin LI 2701fdeb165SXin LI typedef struct _HIM { 2711fdeb165SXin LI char *name; 2721fdeb165SXin LI struct _HIM *next; 2731fdeb165SXin LI HPT_UINT max_sg_descriptors; 2741fdeb165SXin LI #define _HIM_INTERFACE(_type, _fn, _args) _type (* _fn) _args; 2751fdeb165SXin LI #include <dev/hptnr/himfuncs.h> 2761fdeb165SXin LI } 2771fdeb165SXin LI HIM, *PHIM; 2781fdeb165SXin LI 2791fdeb165SXin LI 2801fdeb165SXin LI #pragma pack(1) 2811fdeb165SXin LI #ifdef SG_FLAG_EOT 2821fdeb165SXin LI #error "don't use SG_FLAG_EOT with _SG.eot. clean the code!" 2831fdeb165SXin LI #endif 2841fdeb165SXin LI 2851fdeb165SXin LI typedef struct _SG { 2861fdeb165SXin LI HPT_U32 size; 2871fdeb165SXin LI HPT_UINT eot; 2881fdeb165SXin LI union { 2891fdeb165SXin LI HPT_U8 FAR * _logical; 2901fdeb165SXin LI BUS_ADDRESS bus; 2911fdeb165SXin LI } 2921fdeb165SXin LI addr; 2931fdeb165SXin LI } 2941fdeb165SXin LI SG, *PSG; 2951fdeb165SXin LI #pragma pack() 2961fdeb165SXin LI 2971fdeb165SXin LI typedef struct _AtaCommand 2981fdeb165SXin LI { 2991fdeb165SXin LI HPT_U64 Lba; 3001fdeb165SXin LI HPT_U16 nSectors; 3011fdeb165SXin LI HPT_U16 pad; 3021fdeb165SXin LI } AtaComm, *PAtaComm; 3031fdeb165SXin LI 3041fdeb165SXin LI #define ATA_CMD_NOP 0x0 3051fdeb165SXin LI 3061fdeb165SXin LI #define ATA_CMD_SET_FEATURES 0xef 3071fdeb165SXin LI #define ATA_CMD_FLUSH 0xE7 3081fdeb165SXin LI #define ATA_CMD_VERIFY 0x40 3091fdeb165SXin LI #define ATA_CMD_STANDBY 0xe2 3101fdeb165SXin LI #define ATA_CMD_READ_MULTI 0xC4 3111fdeb165SXin LI #define ATA_CMD_READ_MULTI_EXT 0x29 3121fdeb165SXin LI #define ATA_CMD_WRITE_MULTI 0xC5 3131fdeb165SXin LI #define ATA_CMD_WRITE_MULTI_EXT 0x39 3141fdeb165SXin LI #define ATA_CMD_WRITE_MULTI_FUA_EXT 0xCE 3151fdeb165SXin LI 3161fdeb165SXin LI #define ATA_CMD_READ_DMA 0xc8 /* IDE DMA read command */ 3171fdeb165SXin LI #define ATA_CMD_WRITE_DMA 0xca /* IDE DMA write command */ 3181fdeb165SXin LI #define ATA_CMD_READ_DMA_EXT 0x25 3191fdeb165SXin LI #define ATA_CMD_READ_QUEUE_EXT 0x26 3201fdeb165SXin LI #define ATA_CMD_READ_MAX_ADDR 0x27 3211fdeb165SXin LI #define ATA_CMD_READ_EXT 0x24 3221fdeb165SXin LI #define ATA_CMD_VERIFY_EXT 0x42 3231fdeb165SXin LI #define ATA_CMD_WRITE_DMA_EXT 0x35 3241fdeb165SXin LI #define ATA_CMD_WRITE_QUEUE_EXT 0x36 3251fdeb165SXin LI #define ATA_CMD_WRITE_EXT 0x34 3261fdeb165SXin LI 3271fdeb165SXin LI #define ATA_SET_FEATURES_XFER 0x3 3281fdeb165SXin LI #define ATA_SECTOR_SIZE 512 3291fdeb165SXin LI 3301fdeb165SXin LI typedef struct _PassthroughCmd { 3311fdeb165SXin LI HPT_U16 bFeaturesReg; 3321fdeb165SXin LI HPT_U16 bSectorCountReg; 3331fdeb165SXin LI HPT_U16 bLbaLowReg; 3341fdeb165SXin LI HPT_U16 bLbaMidReg; 3351fdeb165SXin LI HPT_U16 bLbaHighReg; 3361fdeb165SXin LI HPT_U8 bDriveHeadReg; 3371fdeb165SXin LI HPT_U8 bCommandReg; 3381fdeb165SXin LI HPT_U16 nSectors; 3391fdeb165SXin LI HPT_U8 *pDataBuffer; 3401fdeb165SXin LI } 3411fdeb165SXin LI PassthroughCmd; 3421fdeb165SXin LI 3431fdeb165SXin LI typedef struct _ScsiComm { 3441fdeb165SXin LI HPT_U8 cdbLength; 3451fdeb165SXin LI HPT_U8 senseLength; 3461fdeb165SXin LI HPT_U8 scsiStatus; 3471fdeb165SXin LI HPT_U8 reserve1; 3481fdeb165SXin LI HPT_U32 dataLength; 3491fdeb165SXin LI HPT_U8 cdb[16]; 3501fdeb165SXin LI HPT_U8 *senseBuffer; 3511fdeb165SXin LI } 3521fdeb165SXin LI ScsiComm; 3531fdeb165SXin LI 3541fdeb165SXin LI 3551fdeb165SXin LI #define CTRL_CMD_REBUILD 1 3561fdeb165SXin LI #define CTRL_CMD_VERIFY 2 3571fdeb165SXin LI #define CTRL_CMD_INIT 3 3581fdeb165SXin LI 3591fdeb165SXin LI 3601fdeb165SXin LI typedef struct _R5ControlCmd { 3611fdeb165SXin LI HPT_U64 StripeLine; 3621fdeb165SXin LI HPT_U16 Offset; 3631fdeb165SXin LI HPT_U8 Command; 3641fdeb165SXin LI HPT_U8 CmdTarget; 3651fdeb165SXin LI } 3661fdeb165SXin LI R5ControlCmd, *PR5ControlCmd; 3671fdeb165SXin LI 3681fdeb165SXin LI typedef struct _HPT_ADDRESS 3691fdeb165SXin LI { 3701fdeb165SXin LI HPT_U8 * logical; 3711fdeb165SXin LI BUS_ADDRESS bus; 3721fdeb165SXin LI } 3731fdeb165SXin LI HPT_ADDRESS; 3741fdeb165SXin LI 3751fdeb165SXin LI 3761fdeb165SXin LI typedef struct ctl_pages { 3771fdeb165SXin LI HPT_ADDRESS *pages; 3781fdeb165SXin LI HPT_UINT page_size; 3791fdeb165SXin LI HPT_UINT npages; 3801fdeb165SXin LI HPT_UINT min_sg_descriptors; 3811fdeb165SXin LI } CONTROL_PAGES, *PCONTROL_PAGES; 3821fdeb165SXin LI 3831fdeb165SXin LI typedef struct _R1ControlCmd { 3841fdeb165SXin LI HPT_U64 Lba; 3851fdeb165SXin LI HPT_U16 nSectors; 3861fdeb165SXin LI HPT_U8 Command; 3871fdeb165SXin LI HPT_U8 CmdTarget; 3881fdeb165SXin LI PCONTROL_PAGES ctl_pages; 3891fdeb165SXin LI } 3901fdeb165SXin LI R1ControlCmd, *PR1ControlCmd; 3911fdeb165SXin LI 3921fdeb165SXin LI typedef void (*TQ_PROC)(void *arg); 3931fdeb165SXin LI 3941fdeb165SXin LI struct tq_item { 3951fdeb165SXin LI TQ_PROC proc; 3961fdeb165SXin LI void *arg; 3971fdeb165SXin LI struct tq_item *next; 3981fdeb165SXin LI }; 3991fdeb165SXin LI 4001fdeb165SXin LI #define INIT_TQ_ITEM(t, p, a) \ 4011fdeb165SXin LI do { (t)->proc = p; (t)->arg = a; (t)->next = 0; } while (0) 4021fdeb165SXin LI 4031fdeb165SXin LI typedef struct _COMMAND 4041fdeb165SXin LI { 4051fdeb165SXin LI 4061fdeb165SXin LI struct _VBUS * vbus; 4071fdeb165SXin LI 4081fdeb165SXin LI struct freelist *grplist; 4091fdeb165SXin LI HPT_UINT grpcnt; 4101fdeb165SXin LI 4111fdeb165SXin LI 4121fdeb165SXin LI struct list_head q_link; 4131fdeb165SXin LI struct tq_item done_dpc; 4141fdeb165SXin LI 4151fdeb165SXin LI HPT_UINT extsize; 4161fdeb165SXin LI void *ext; 4171fdeb165SXin LI 4181fdeb165SXin LI 4191fdeb165SXin LI 4201fdeb165SXin LI void *target; 4211fdeb165SXin LI void *priv; 4221fdeb165SXin LI HPT_UPTR priv2; 4231fdeb165SXin LI 4241fdeb165SXin LI int priority; 4251fdeb165SXin LI struct lock_request *owned_lock; 4261fdeb165SXin LI struct lock_request *lock_req; 4271fdeb165SXin LI void (*dtor)(struct _COMMAND *, void *); 4281fdeb165SXin LI void *dtor_arg; 4291fdeb165SXin LI 4301fdeb165SXin LI union{ 4311fdeb165SXin LI AtaComm Ide; 4321fdeb165SXin LI PassthroughCmd Passthrough; 4331fdeb165SXin LI ScsiComm Scsi; 4341fdeb165SXin LI R5ControlCmd R5Control; 4351fdeb165SXin LI R1ControlCmd R1Control; 4361fdeb165SXin LI } uCmd; 4371fdeb165SXin LI 4381fdeb165SXin LI HPT_U8 type; /* CMD_TYPE_* */ 4391fdeb165SXin LI 4401fdeb165SXin LI struct { 4411fdeb165SXin LI HPT_U8 physical_sg: 1; 4421fdeb165SXin LI HPT_U8 data_in: 1; 4431fdeb165SXin LI HPT_U8 data_out: 1; 4441fdeb165SXin LI HPT_U8 transform : 1; 4451fdeb165SXin LI HPT_U8 hard_flush: 2; 4461fdeb165SXin LI HPT_U8 from_cc: 1; 4471fdeb165SXin LI HPT_U8 force_cc: 1; 4481fdeb165SXin LI } flags; 4491fdeb165SXin LI 4501fdeb165SXin LI /* return status */ 4511fdeb165SXin LI HPT_U8 Result; 4521fdeb165SXin LI /* retry count */ 4531fdeb165SXin LI HPT_U8 RetryCount; 4541fdeb165SXin LI 4551fdeb165SXin LI 4561fdeb165SXin LI PSG psg; 4571fdeb165SXin LI 4581fdeb165SXin LI 4591fdeb165SXin LI int (*buildsgl)(struct _COMMAND *cmd, PSG psg, int logical); 4601fdeb165SXin LI void (*done)(struct _COMMAND *cmd); 4611fdeb165SXin LI } 4621fdeb165SXin LI COMMAND, *PCOMMAND; 4631fdeb165SXin LI 4641fdeb165SXin LI /* command types */ 4651fdeb165SXin LI #define CMD_TYPE_IO 0 4661fdeb165SXin LI #define CMD_TYPE_CONTROL 1 4671fdeb165SXin LI #define CMD_TYPE_ATAPI 2 4681fdeb165SXin LI #define CMD_TYPE_SCSI CMD_TYPE_ATAPI 4691fdeb165SXin LI #define CMD_TYPE_PASSTHROUGH 3 4701fdeb165SXin LI #define CMD_TYPE_FLUSH 4 4711fdeb165SXin LI #define CMD_TYPE_IO_INDIRECT 0x80 4721fdeb165SXin LI 4731fdeb165SXin LI /* flush command flags */ 4741fdeb165SXin LI #define CF_HARD_FLUSH_CACHE 1 4751fdeb165SXin LI #define CF_HARD_FLUSH_STANDBY 2 4761fdeb165SXin LI 4771fdeb165SXin LI /* command return values */ 4781fdeb165SXin LI #define RETURN_PENDING 0 4791fdeb165SXin LI #define RETURN_SUCCESS 1 4801fdeb165SXin LI #define RETURN_BAD_DEVICE 2 4811fdeb165SXin LI #define RETURN_BAD_PARAMETER 3 4821fdeb165SXin LI #define RETURN_WRITE_NO_DRQ 4 4831fdeb165SXin LI #define RETURN_DEVICE_BUSY 5 4841fdeb165SXin LI #define RETURN_INVALID_REQUEST 6 4851fdeb165SXin LI #define RETURN_SELECTION_TIMEOUT 7 4861fdeb165SXin LI #define RETURN_IDE_ERROR 8 4871fdeb165SXin LI #define RETURN_NEED_LOGICAL_SG 9 4881fdeb165SXin LI #define RETURN_NEED_PHYSICAL_SG 10 4891fdeb165SXin LI #define RETURN_RETRY 11 4901fdeb165SXin LI #define RETURN_DATA_ERROR 12 4911fdeb165SXin LI #define RETURN_BUS_RESET 13 4921fdeb165SXin LI #define RETURN_BAD_TRANSFER_LENGTH 14 4931fdeb165SXin LI #define RETURN_INSUFFICIENT_MEMORY 15 4941fdeb165SXin LI #define RETURN_SECTOR_ERROR 16 4951fdeb165SXin LI #define RETURN_NEED_SPINUP 17 4961fdeb165SXin LI 4971fdeb165SXin LI #if defined(__cplusplus) 4981fdeb165SXin LI } 4991fdeb165SXin LI #endif 5001fdeb165SXin LI #endif 501