xref: /freebsd/sys/dev/hptmv/entry.c (revision e1ab829ad27af06df1ee508492022d5ca8f3e34d)
1d2bd3ab9SScott Long /*
2d2bd3ab9SScott Long  * Copyright (c) 2004-2005 HighPoint Technologies, Inc.
31713e81bSScott Long  * All rights reserved.
41713e81bSScott Long  *
51713e81bSScott Long  * Redistribution and use in source and binary forms, with or without
61713e81bSScott Long  * modification, are permitted provided that the following conditions
71713e81bSScott Long  * are met:
81713e81bSScott Long  * 1. Redistributions of source code must retain the above copyright
91713e81bSScott Long  *    notice, this list of conditions and the following disclaimer.
101713e81bSScott Long  * 2. Redistributions in binary form must reproduce the above copyright
111713e81bSScott Long  *    notice, this list of conditions and the following disclaimer in the
121713e81bSScott Long  *    documentation and/or other materials provided with the distribution.
131713e81bSScott Long  *
141713e81bSScott Long  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
151713e81bSScott Long  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
161713e81bSScott Long  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
171713e81bSScott Long  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
181713e81bSScott Long  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
191713e81bSScott Long  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
201713e81bSScott Long  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
211713e81bSScott Long  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
221713e81bSScott Long  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
231713e81bSScott Long  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
241713e81bSScott Long  * SUCH DAMAGE.
251713e81bSScott Long  *
261713e81bSScott Long  * $FreeBSD$
271713e81bSScott Long  */
28d2bd3ab9SScott Long 
291713e81bSScott Long #include <sys/param.h>
301713e81bSScott Long #include <sys/systm.h>
311713e81bSScott Long #include <sys/kernel.h>
321713e81bSScott Long #include <sys/bus.h>
331713e81bSScott Long #include <sys/malloc.h>
341713e81bSScott Long #include <sys/resource.h>
351713e81bSScott Long #include <sys/time.h>
361713e81bSScott Long #include <sys/callout.h>
371713e81bSScott Long #include <sys/signalvar.h>
381713e81bSScott Long #include <sys/eventhandler.h>
391713e81bSScott Long #include <sys/proc.h>
401713e81bSScott Long #include <sys/kthread.h>
411713e81bSScott Long 
42d2bd3ab9SScott Long #if (__FreeBSD_version >= 500000)
43d2bd3ab9SScott Long #include <sys/mutex.h>
44d2bd3ab9SScott Long #include <sys/module.h>
45d2bd3ab9SScott Long #endif
46d2bd3ab9SScott Long 
47d2bd3ab9SScott Long #if (__FreeBSD_version >= 500000)
481713e81bSScott Long #include <dev/pci/pcireg.h>
491713e81bSScott Long #include <dev/pci/pcivar.h>
50d2bd3ab9SScott Long #else
51d2bd3ab9SScott Long #include <pci/pcireg.h>
52d2bd3ab9SScott Long #include <pci/pcivar.h>
53d2bd3ab9SScott Long #include <machine/clock.h>
54d2bd3ab9SScott Long #include <sys/wait.h>
55d2bd3ab9SScott Long #include <sys/sysproto.h>
56d2bd3ab9SScott Long #endif
57d2bd3ab9SScott Long 
58d2bd3ab9SScott Long #ifndef __KERNEL__
59d2bd3ab9SScott Long #define __KERNEL__
60d2bd3ab9SScott Long #endif
611713e81bSScott Long 
621713e81bSScott Long #include <dev/hptmv/global.h>
631713e81bSScott Long #include <dev/hptmv/hptintf.h>
641713e81bSScott Long #include <dev/hptmv/osbsd.h>
65f7f3900bSScott Long #include <dev/hptmv/access601.h>
661713e81bSScott Long 
67d2bd3ab9SScott Long 
681713e81bSScott Long #ifdef DEBUG
691713e81bSScott Long #ifdef DEBUG_LEVEL
701713e81bSScott Long int hpt_dbg_level = DEBUG_LEVEL;
711713e81bSScott Long #else
721713e81bSScott Long int hpt_dbg_level = 0;
731713e81bSScott Long #endif
741713e81bSScott Long #endif
751713e81bSScott Long 
761713e81bSScott Long #define MV_ERROR printf
77d2bd3ab9SScott Long 
781713e81bSScott Long /*
791713e81bSScott Long  * CAM SIM entry points
801713e81bSScott Long  */
811713e81bSScott Long static int 	hpt_probe (device_t dev);
82d2bd3ab9SScott Long static void launch_worker_thread(void);
831713e81bSScott Long static int 	hpt_attach(device_t dev);
841713e81bSScott Long static int 	hpt_detach(device_t dev);
851713e81bSScott Long static int 	hpt_shutdown(device_t dev);
861713e81bSScott Long static void hpt_poll(struct cam_sim *sim);
871713e81bSScott Long static void hpt_intr(void *arg);
88d2bd3ab9SScott Long static void hpt_async(void *callback_arg, u_int32_t code, struct cam_path *path, void *arg);
891713e81bSScott Long static void hpt_action(struct cam_sim *sim, union ccb *ccb);
90d2bd3ab9SScott Long 
91d2bd3ab9SScott Long static device_method_t driver_methods[] = {
92d2bd3ab9SScott Long 	/* Device interface */
93d2bd3ab9SScott Long 	DEVMETHOD(device_probe,		hpt_probe),
94d2bd3ab9SScott Long 	DEVMETHOD(device_attach,	hpt_attach),
95d2bd3ab9SScott Long 	DEVMETHOD(device_detach,	hpt_detach),
96d2bd3ab9SScott Long 
97d2bd3ab9SScott Long /*	DEVMETHOD(device_shutdown,	hpt_shutdown), */
98d2bd3ab9SScott Long 	{ 0, 0 }
99d2bd3ab9SScott Long };
100d2bd3ab9SScott Long 
101d2bd3ab9SScott Long static driver_t hpt_pci_driver = {
102d2bd3ab9SScott Long 	__str(PROC_DIR_NAME),
103d2bd3ab9SScott Long 	driver_methods,
104d2bd3ab9SScott Long 	sizeof(IAL_ADAPTER_T)
105d2bd3ab9SScott Long };
106d2bd3ab9SScott Long 
107d2bd3ab9SScott Long static devclass_t	hpt_devclass;
108d2bd3ab9SScott Long 
109d2bd3ab9SScott Long #define __DRIVER_MODULE(p1, p2, p3, p4, p5, p6) DRIVER_MODULE(p1, p2, p3, p4, p5, p6)
110d2bd3ab9SScott Long __DRIVER_MODULE(PROC_DIR_NAME, pci, hpt_pci_driver, hpt_devclass, 0, 0);
111d2bd3ab9SScott Long 
112d2bd3ab9SScott Long #define ccb_ccb_ptr spriv_ptr0
113d2bd3ab9SScott Long #define ccb_adapter ccb_h.spriv_ptr1
114d2bd3ab9SScott Long 
1151713e81bSScott Long static void SetInquiryData(PINQUIRYDATA inquiryData, PVDevice pVDev);
1161713e81bSScott Long static void HPTLIBAPI OsSendCommand (_VBUS_ARG union ccb * ccb);
1171713e81bSScott Long static void HPTLIBAPI fOsCommandDone(_VBUS_ARG PCommand pCmd);
1181713e81bSScott Long static void ccb_done(union ccb *ccb);
1191713e81bSScott Long static void hpt_queue_ccb(union ccb **ccb_Q, union ccb *ccb);
1201713e81bSScott Long static void hpt_free_ccb(union ccb **ccb_Q, union ccb *ccb);
1211713e81bSScott Long static void	hptmv_free_edma_queues(IAL_ADAPTER_T *pAdapter);
1221713e81bSScott Long static void	hptmv_free_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum);
1231713e81bSScott Long static void	handleEdmaError(_VBUS_ARG PCommand pCmd);
1241713e81bSScott Long static int	hptmv_init_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum);
1251713e81bSScott Long static int	fResetActiveCommands(PVBus _vbus_p);
1261713e81bSScott Long static void	fRegisterVdevice(IAL_ADAPTER_T *pAdapter);
1271713e81bSScott Long static int	hptmv_allocate_edma_queues(IAL_ADAPTER_T *pAdapter);
1281713e81bSScott Long static void	hptmv_handle_event_disconnect(void *data);
1291713e81bSScott Long static void	hptmv_handle_event_connect(void *data);
1301713e81bSScott Long static int	start_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum);
1311713e81bSScott Long static void	init_vdev_params(IAL_ADAPTER_T *pAdapter, MV_U8 channel);
1321713e81bSScott Long static int	hptmv_parse_identify_results(MV_SATA_CHANNEL *pMvSataChannel);
1331713e81bSScott Long static int HPTLIBAPI fOsBuildSgl(_VBUS_ARG PCommand pCmd, FPSCAT_GATH pSg,
1341713e81bSScott Long     int logical);
1351713e81bSScott Long static MV_BOOLEAN CommandCompletionCB(MV_SATA_ADAPTER *pMvSataAdapter,
1361713e81bSScott Long     MV_U8 channelNum, MV_COMPLETION_TYPE comp_type, MV_VOID_PTR commandId,
1371713e81bSScott Long     MV_U16 responseFlags, MV_U32 timeStamp,
1381713e81bSScott Long     MV_STORAGE_DEVICE_REGISTERS *registerStruct);
1391713e81bSScott Long static MV_BOOLEAN hptmv_event_notify(MV_SATA_ADAPTER *pMvSataAdapter,
1401713e81bSScott Long     MV_EVENT_TYPE eventType, MV_U32 param1, MV_U32 param2);
1411713e81bSScott Long 
1421713e81bSScott Long #define ccb_ccb_ptr spriv_ptr0
1431713e81bSScott Long #define ccb_adapter ccb_h.spriv_ptr1
1441713e81bSScott Long 
1451713e81bSScott Long IAL_ADAPTER_T *gIal_Adapter = 0;
1461713e81bSScott Long IAL_ADAPTER_T *pCurAdapter = 0;
147d2bd3ab9SScott Long static MV_SATA_CHANNEL gMvSataChannels[MAX_VBUS][MV_SATA_CHANNELS_NUM];
1481713e81bSScott Long 
1491713e81bSScott Long typedef struct st_HPT_DPC {
1501713e81bSScott Long 	IAL_ADAPTER_T *pAdapter;
1511713e81bSScott Long 	void (*dpc)(IAL_ADAPTER_T *, void *, UCHAR);
1521713e81bSScott Long 	void *arg;
1531713e81bSScott Long 	UCHAR flags;
1541713e81bSScott Long } ST_HPT_DPC;
1551713e81bSScott Long 
1561713e81bSScott Long #define MAX_DPC 16
1571713e81bSScott Long UCHAR DPC_Request_Nums = 0;
1581713e81bSScott Long static ST_HPT_DPC DpcQueue[MAX_DPC];
1591713e81bSScott Long static int DpcQueue_First=0;
1601713e81bSScott Long static int DpcQueue_Last = 0;
1611713e81bSScott Long 
162d2bd3ab9SScott Long char DRIVER_VERSION[] = "v1.12 (" __DATE__ " " __TIME__ ")";
1631713e81bSScott Long 
164d2bd3ab9SScott Long #if (__FreeBSD_version >= 500000)
165d2bd3ab9SScott Long static struct mtx driver_lock;
166d2bd3ab9SScott Long intrmask_t lock_driver()
167d2bd3ab9SScott Long {
1681713e81bSScott Long 
169d2bd3ab9SScott Long 	intrmask_t spl = 0;
170d2bd3ab9SScott Long 	mtx_lock_spin(&driver_lock);
171d2bd3ab9SScott Long 	return spl;
172d2bd3ab9SScott Long }
173d2bd3ab9SScott Long void unlock_driver(intrmask_t spl)
174d2bd3ab9SScott Long {
175d2bd3ab9SScott Long 	mtx_unlock_spin(&driver_lock);
176d2bd3ab9SScott Long }
177d2bd3ab9SScott Long #else
178d2bd3ab9SScott Long static int driver_locked = 0;
179d2bd3ab9SScott Long intrmask_t lock_driver()
1801713e81bSScott Long {
1811713e81bSScott Long 	intrmask_t spl = splcam();
182d2bd3ab9SScott Long loop:
183d2bd3ab9SScott Long 	while (driver_locked)
184d2bd3ab9SScott Long 		tsleep(&driver_locked, PRIBIO, "hptlck", hz);
185d2bd3ab9SScott Long 	atomic_add_int(&driver_locked, 1);
186d2bd3ab9SScott Long 	if (driver_locked>1) {
187d2bd3ab9SScott Long 		atomic_subtract_int(&driver_locked, 1);
188d2bd3ab9SScott Long 		goto loop;
189d2bd3ab9SScott Long 	}
1901713e81bSScott Long 	return spl;
1911713e81bSScott Long }
1921713e81bSScott Long 
193d2bd3ab9SScott Long void unlock_driver(intrmask_t spl)
1941713e81bSScott Long {
195d2bd3ab9SScott Long 	atomic_subtract_int(&driver_locked, 1);
196d2bd3ab9SScott Long 	if (driver_locked==0) {
197d2bd3ab9SScott Long 		wakeup(&driver_locked);
198d2bd3ab9SScott Long 	}
1991713e81bSScott Long 	splx(spl);
2001713e81bSScott Long }
201d2bd3ab9SScott Long #endif
2021713e81bSScott Long 
2031713e81bSScott Long /*******************************************************************************
2041713e81bSScott Long  *	Name:	hptmv_free_channel
2051713e81bSScott Long  *
2061713e81bSScott Long  *	Description:	free allocated queues for the given channel
2071713e81bSScott Long  *
2081713e81bSScott Long  *	Parameters:    	pMvSataAdapter - pointer to the RR182x controler this
2091713e81bSScott Long  * 					channel connected to.
2101713e81bSScott Long  *			channelNum - channel number.
2111713e81bSScott Long  *
2121713e81bSScott Long  ******************************************************************************/
2131713e81bSScott Long static void
2141713e81bSScott Long hptmv_free_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum)
2151713e81bSScott Long {
2161713e81bSScott Long 	HPT_ASSERT(channelNum < MV_SATA_CHANNELS_NUM);
2171713e81bSScott Long 	pAdapter->mvSataAdapter.sataChannel[channelNum] = NULL;
218d2bd3ab9SScott Long }
2191713e81bSScott Long 
220d2bd3ab9SScott Long static void failDevice(PVDevice pVDev)
2211713e81bSScott Long {
222d2bd3ab9SScott Long 	PVBus _vbus_p = pVDev->pVBus;
223d2bd3ab9SScott Long 	IAL_ADAPTER_T *pAdapter = (IAL_ADAPTER_T *)_vbus_p->OsExt;
224d2bd3ab9SScott Long 
2251713e81bSScott Long 	pVDev->u.disk.df_on_line = 0;
2261713e81bSScott Long 	pVDev->vf_online = 0;
227d2bd3ab9SScott Long 	if (pVDev->pfnDeviceFailed)
228d2bd3ab9SScott Long 		CallWhenIdle(_VBUS_P (DPC_PROC)pVDev->pfnDeviceFailed, pVDev);
229d2bd3ab9SScott Long 
230d2bd3ab9SScott Long 	fNotifyGUI(ET_DEVICE_REMOVED, pVDev);
231d2bd3ab9SScott Long 
232d2bd3ab9SScott Long #ifndef FOR_DEMO
233d2bd3ab9SScott Long 	if (pAdapter->ver_601==2 && !pAdapter->beeping) {
234d2bd3ab9SScott Long 		pAdapter->beeping = 1;
235d2bd3ab9SScott Long 		BeepOn(pAdapter->mvSataAdapter.adapterIoBaseAddress);
236d2bd3ab9SScott Long 		set_fail_led(&pAdapter->mvSataAdapter, pVDev->u.disk.mv->channelNumber, 1);
2371713e81bSScott Long 	}
238d2bd3ab9SScott Long #endif
2391713e81bSScott Long }
2401713e81bSScott Long 
2411713e81bSScott Long int MvSataResetChannel(MV_SATA_ADAPTER *pMvSataAdapter, MV_U8 channel);
242d2bd3ab9SScott Long /*void fDeviceSendCommand(_VBUS_ARG PCommand pCmd); */
2431713e81bSScott Long 
2441713e81bSScott Long static void
2451713e81bSScott Long handleEdmaError(_VBUS_ARG PCommand pCmd)
2461713e81bSScott Long {
2471713e81bSScott Long 	PDevice pDevice = &pCmd->pVDevice->u.disk;
2481713e81bSScott Long 	MV_SATA_ADAPTER * pSataAdapter = pDevice->mv->mvSataAdapter;
2491713e81bSScott Long 
2501713e81bSScott Long 	if (!pDevice->df_on_line) {
2511713e81bSScott Long 		KdPrint(("Device is offline"));
2521713e81bSScott Long 		pCmd->Result = RETURN_BAD_DEVICE;
2531713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
2541713e81bSScott Long 		return;
2551713e81bSScott Long 	}
2561713e81bSScott Long 
2571713e81bSScott Long 	if (pCmd->RetryCount++>5) {
258d2bd3ab9SScott Long 		hpt_printk(("too many retries on channel(%d)\n", pDevice->mv->channelNumber));
259d2bd3ab9SScott Long failed:
260d2bd3ab9SScott Long 		failDevice(pCmd->pVDevice);
2611713e81bSScott Long 		pCmd->Result = RETURN_IDE_ERROR;
2621713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
2631713e81bSScott Long 		return;
2641713e81bSScott Long 	}
265d2bd3ab9SScott Long 
266d2bd3ab9SScott Long 	/* reset the channel and retry the command */
267d2bd3ab9SScott Long 	if (MvSataResetChannel(pSataAdapter, pDevice->mv->channelNumber))
268d2bd3ab9SScott Long 		goto failed;
269d2bd3ab9SScott Long 
270d2bd3ab9SScott Long 	fNotifyGUI(ET_DEVICE_ERROR, Map2pVDevice(pDevice));
271d2bd3ab9SScott Long 
272d2bd3ab9SScott Long 	hpt_printk(("Retry on channel(%d)\n", pDevice->mv->channelNumber));
2731713e81bSScott Long 	fDeviceSendCommand(_VBUS_P pCmd);
2741713e81bSScott Long }
2751713e81bSScott Long 
2761713e81bSScott Long /****************************************************************
2771713e81bSScott Long  *	Name:	hptmv_init_channel
2781713e81bSScott Long  *
279d2bd3ab9SScott Long  *	Description:	allocate request and response queues for the EDMA of the
280d2bd3ab9SScott Long  *					given channel and sets other fields.
281d2bd3ab9SScott Long  *
2821713e81bSScott Long  *	Parameters:
2831713e81bSScott Long  *		pAdapter - pointer to the emulated adapter data structure
2841713e81bSScott Long  *		channelNum - channel number.
2851713e81bSScott Long  *	Return:	0 on success, otherwise on failure
2861713e81bSScott Long  ****************************************************************/
2871713e81bSScott Long static int
2881713e81bSScott Long hptmv_init_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum)
2891713e81bSScott Long {
2901713e81bSScott Long 	MV_SATA_CHANNEL *pMvSataChannel;
2911713e81bSScott Long 	dma_addr_t    req_dma_addr;
2921713e81bSScott Long 	dma_addr_t    rsp_dma_addr;
2931713e81bSScott Long 
2941713e81bSScott Long 	if (channelNum >= MV_SATA_CHANNELS_NUM)
2951713e81bSScott Long 	{
2961713e81bSScott Long 		MV_ERROR("RR182x[%d]: Bad channelNum=%d",
2971713e81bSScott Long 				 pAdapter->mvSataAdapter.adapterId, channelNum);
2981713e81bSScott Long 		return -1;
2991713e81bSScott Long 	}
3001713e81bSScott Long 
301d2bd3ab9SScott Long 	pMvSataChannel = &gMvSataChannels[pAdapter->mvSataAdapter.adapterId][channelNum];
3021713e81bSScott Long 	pAdapter->mvSataAdapter.sataChannel[channelNum] = pMvSataChannel;
3031713e81bSScott Long 	pMvSataChannel->channelNumber = channelNum;
3041713e81bSScott Long 	pMvSataChannel->lba48Address = MV_FALSE;
3051713e81bSScott Long 	pMvSataChannel->maxReadTransfer = MV_FALSE;
3061713e81bSScott Long 
307d2bd3ab9SScott Long 	pMvSataChannel->requestQueue = (struct mvDmaRequestQueueEntry *)
308d2bd3ab9SScott Long 								   (pAdapter->requestsArrayBaseAlignedAddr + (channelNum * MV_EDMA_REQUEST_QUEUE_SIZE));
309d2bd3ab9SScott Long 	req_dma_addr = pAdapter->requestsArrayBaseDmaAlignedAddr + (channelNum * MV_EDMA_REQUEST_QUEUE_SIZE);
3101713e81bSScott Long 
3111713e81bSScott Long 
312d2bd3ab9SScott Long 	KdPrint(("requestQueue addr is 0x%llX", (HPT_U64)(ULONG_PTR)req_dma_addr));
3131713e81bSScott Long 
3141713e81bSScott Long 	/* check the 1K alignment of the request queue*/
3151713e81bSScott Long 	if (req_dma_addr & 0x3ff)
3161713e81bSScott Long 	{
317d2bd3ab9SScott Long 		MV_ERROR("RR182x[%d]: request queue allocated isn't 1 K aligned,"
318d2bd3ab9SScott Long 				 " dma_addr=%llx channel=%d\n", pAdapter->mvSataAdapter.adapterId,
319d2bd3ab9SScott Long 				 (HPT_U64)(ULONG_PTR)req_dma_addr, channelNum);
3201713e81bSScott Long 		return -1;
3211713e81bSScott Long 	}
3221713e81bSScott Long 	pMvSataChannel->requestQueuePciLowAddress = req_dma_addr;
3231713e81bSScott Long 	pMvSataChannel->requestQueuePciHiAddress = 0;
3241713e81bSScott Long 	KdPrint(("RR182x[%d,%d]: request queue allocated: 0x%p",
3251713e81bSScott Long 			  pAdapter->mvSataAdapter.adapterId, channelNum,
3261713e81bSScott Long 			  pMvSataChannel->requestQueue));
327d2bd3ab9SScott Long 	pMvSataChannel->responseQueue = (struct mvDmaResponseQueueEntry *)
328d2bd3ab9SScott Long 									(pAdapter->responsesArrayBaseAlignedAddr + (channelNum * MV_EDMA_RESPONSE_QUEUE_SIZE));
329d2bd3ab9SScott Long 	rsp_dma_addr = pAdapter->responsesArrayBaseDmaAlignedAddr + (channelNum * MV_EDMA_RESPONSE_QUEUE_SIZE);
3301713e81bSScott Long 
3311713e81bSScott Long 	/* check the 256 alignment of the response queue*/
3321713e81bSScott Long 	if (rsp_dma_addr & 0xff)
3331713e81bSScott Long 	{
334d2bd3ab9SScott Long 		MV_ERROR("RR182x[%d,%d]: response queue allocated isn't 256 byte "
335d2bd3ab9SScott Long 				 "aligned, dma_addr=%llx\n",
336d2bd3ab9SScott Long 				 pAdapter->mvSataAdapter.adapterId, channelNum, (HPT_U64)(ULONG_PTR)rsp_dma_addr);
3371713e81bSScott Long 		return -1;
3381713e81bSScott Long 	}
3391713e81bSScott Long 	pMvSataChannel->responseQueuePciLowAddress = rsp_dma_addr;
3401713e81bSScott Long 	pMvSataChannel->responseQueuePciHiAddress = 0;
3411713e81bSScott Long 	KdPrint(("RR182x[%d,%d]: response queue allocated: 0x%p",
3421713e81bSScott Long 			  pAdapter->mvSataAdapter.adapterId, channelNum,
3431713e81bSScott Long 			  pMvSataChannel->responseQueue));
3441713e81bSScott Long 
3451713e81bSScott Long 	pAdapter->mvChannel[channelNum].online = MV_TRUE;
3461713e81bSScott Long 	return 0;
3471713e81bSScott Long }
3481713e81bSScott Long 
3491713e81bSScott Long /******************************************************************************
3501713e81bSScott Long  *	Name: hptmv_parse_identify_results
3511713e81bSScott Long  *
352d2bd3ab9SScott Long  *	Description:	this functions parses the identify command results, checks
353d2bd3ab9SScott Long  *					that the connected deives can be accesed by RR182x EDMA,
354d2bd3ab9SScott Long  *					and updates the channel stucture accordingly.
355d2bd3ab9SScott Long  *
3561713e81bSScott Long  *	Parameters:     pMvSataChannel, pointer to the channel data structure.
3571713e81bSScott Long  *
3581713e81bSScott Long  *	Returns:       	=0 ->success, < 0 ->failure.
3591713e81bSScott Long  *
3601713e81bSScott Long  ******************************************************************************/
3611713e81bSScott Long static int
3621713e81bSScott Long hptmv_parse_identify_results(MV_SATA_CHANNEL *pMvSataChannel)
3631713e81bSScott Long {
3641713e81bSScott Long 	MV_U16  *iden = pMvSataChannel->identifyDevice;
3651713e81bSScott Long 
3661713e81bSScott Long 	/*LBA addressing*/
367d2bd3ab9SScott Long 	if (! (iden[IDEN_CAPACITY_1_OFFSET] & 0x200))
368d2bd3ab9SScott Long 	{
3691713e81bSScott Long 		KdPrint(("IAL Error in IDENTIFY info: LBA not supported\n"));
3701713e81bSScott Long 		return -1;
371d2bd3ab9SScott Long 	}
372d2bd3ab9SScott Long 	else
373d2bd3ab9SScott Long 	{
3741713e81bSScott Long 		KdPrint(("%25s - %s\n", "Capabilities", "LBA supported"));
3751713e81bSScott Long 	}
3761713e81bSScott Long 	/*DMA support*/
377d2bd3ab9SScott Long 	if (! (iden[IDEN_CAPACITY_1_OFFSET] & 0x100))
378d2bd3ab9SScott Long 	{
3791713e81bSScott Long 		KdPrint(("IAL Error in IDENTIFY info: DMA not supported\n"));
3801713e81bSScott Long 		return -1;
381d2bd3ab9SScott Long 	}
382d2bd3ab9SScott Long 	else
383d2bd3ab9SScott Long 	{
3841713e81bSScott Long 		KdPrint(("%25s - %s\n", "Capabilities", "DMA supported"));
3851713e81bSScott Long 	}
3861713e81bSScott Long 	/* PIO */
387d2bd3ab9SScott Long 	if ((iden[IDEN_VALID] & 2) == 0)
388d2bd3ab9SScott Long 	{
389d2bd3ab9SScott Long 		KdPrint(("IAL Error in IDENTIFY info: not able to find PIO mode\n"));
3901713e81bSScott Long 		return -1;
3911713e81bSScott Long 	}
3921713e81bSScott Long 	KdPrint(("%25s - 0x%02x\n", "PIO modes supported",
3931713e81bSScott Long 			  iden[IDEN_PIO_MODE_SPPORTED] & 0xff));
3941713e81bSScott Long 
3951713e81bSScott Long 	/*UDMA*/
396d2bd3ab9SScott Long 	if ((iden[IDEN_VALID] & 4) == 0)
397d2bd3ab9SScott Long 	{
398d2bd3ab9SScott Long 		KdPrint(("IAL Error in IDENTIFY info: not able to find UDMA mode\n"));
3991713e81bSScott Long 		return -1;
4001713e81bSScott Long 	}
4011713e81bSScott Long 
4021713e81bSScott Long 	/* 48 bit address */
403d2bd3ab9SScott Long 	if ((iden[IDEN_SUPPORTED_COMMANDS2] & 0x400))
404d2bd3ab9SScott Long 	{
4051713e81bSScott Long 		KdPrint(("%25s - %s\n", "LBA48 addressing", "supported"));
4061713e81bSScott Long 		pMvSataChannel->lba48Address = MV_TRUE;
407d2bd3ab9SScott Long 	}
408d2bd3ab9SScott Long 	else
409d2bd3ab9SScott Long 	{
4101713e81bSScott Long 		KdPrint(("%25s - %s\n", "LBA48 addressing", "Not supported"));
4111713e81bSScott Long 		pMvSataChannel->lba48Address = MV_FALSE;
4121713e81bSScott Long 	}
4131713e81bSScott Long 	return 0;
4141713e81bSScott Long }
4151713e81bSScott Long 
4161713e81bSScott Long static void
4171713e81bSScott Long init_vdev_params(IAL_ADAPTER_T *pAdapter, MV_U8 channel)
4181713e81bSScott Long {
419d2bd3ab9SScott Long 	PVDevice pVDev = &pAdapter->VDevices[channel];
420d2bd3ab9SScott Long 	MV_SATA_CHANNEL *pMvSataChannel = pAdapter->mvSataAdapter.sataChannel[channel];
421d2bd3ab9SScott Long 	MV_U16_PTR IdentifyData = pMvSataChannel->identifyDevice;
4221713e81bSScott Long 
4231713e81bSScott Long 	pMvSataChannel->outstandingCommands = 0;
4241713e81bSScott Long 
4251713e81bSScott Long 	pVDev->u.disk.mv         = pMvSataChannel;
4261713e81bSScott Long 	pVDev->u.disk.df_on_line = 1;
4271713e81bSScott Long 	pVDev->u.disk.pVBus      = &pAdapter->VBus;
4281713e81bSScott Long 	pVDev->pVBus             = &pAdapter->VBus;
4291713e81bSScott Long 
4301713e81bSScott Long #ifdef SUPPORT_48BIT_LBA
4311713e81bSScott Long 	if (pMvSataChannel->lba48Address == MV_TRUE)
432d2bd3ab9SScott Long 		pVDev->u.disk.dDeRealCapacity = ((IdentifyData[101]<<16) | IdentifyData[100]) - 1;
4331713e81bSScott Long 	else
4341713e81bSScott Long #endif
4351713e81bSScott Long 	if(IdentifyData[53] & 1) {
4361713e81bSScott Long 	pVDev->u.disk.dDeRealCapacity =
437d2bd3ab9SScott Long 	  (((IdentifyData[58]<<16 | IdentifyData[57]) < (IdentifyData[61]<<16 | IdentifyData[60])) ?
4381713e81bSScott Long 		  (IdentifyData[61]<<16 | IdentifyData[60]) :
4391713e81bSScott Long 				(IdentifyData[58]<<16 | IdentifyData[57])) - 1;
4401713e81bSScott Long 	} else
4411713e81bSScott Long 		pVDev->u.disk.dDeRealCapacity =
4421713e81bSScott Long 				 (IdentifyData[61]<<16 | IdentifyData[60]) - 1;
4431713e81bSScott Long 
4441713e81bSScott Long 	pVDev->u.disk.bDeUsable_Mode = pVDev->u.disk.bDeModeSetting =
445d2bd3ab9SScott Long 		pAdapter->mvChannel[channel].maxPioModeSupported - MV_ATA_TRANSFER_PIO_0;
4461713e81bSScott Long 
4471713e81bSScott Long 	if (pAdapter->mvChannel[channel].maxUltraDmaModeSupported!=0xFF) {
4481713e81bSScott Long 		pVDev->u.disk.bDeUsable_Mode = pVDev->u.disk.bDeModeSetting =
449d2bd3ab9SScott Long 			pAdapter->mvChannel[channel].maxUltraDmaModeSupported - MV_ATA_TRANSFER_UDMA_0 + 8;
4501713e81bSScott Long 	}
4511713e81bSScott Long }
4521713e81bSScott Long 
453d2bd3ab9SScott Long static void device_change(IAL_ADAPTER_T *pAdapter , MV_U8 channelIndex, int plugged)
4541713e81bSScott Long {
4551713e81bSScott Long 	PVDevice pVDev;
456d2bd3ab9SScott Long 	MV_SATA_ADAPTER  *pMvSataAdapter = &pAdapter->mvSataAdapter;
457d2bd3ab9SScott Long 	MV_SATA_CHANNEL  *pMvSataChannel = pMvSataAdapter->sataChannel[channelIndex];
4581713e81bSScott Long 
459d2bd3ab9SScott Long 	if (!pMvSataChannel) return;
4601713e81bSScott Long 
461d2bd3ab9SScott Long 	if (plugged)
462d2bd3ab9SScott Long 	{
4631713e81bSScott Long 		pVDev = &(pAdapter->VDevices[channelIndex]);
4641713e81bSScott Long 		init_vdev_params(pAdapter, channelIndex);
4651713e81bSScott Long 
4661713e81bSScott Long 		pVDev->VDeviceType = pVDev->u.disk.df_atapi? VD_ATAPI :
467d2bd3ab9SScott Long 			pVDev->u.disk.df_removable_drive? VD_REMOVABLE : VD_SINGLE_DISK;
4681713e81bSScott Long 
469d2bd3ab9SScott Long 		pVDev->VDeviceCapacity = pVDev->u.disk.dDeRealCapacity-SAVE_FOR_RAID_INFO;
4701713e81bSScott Long 		pVDev->pfnSendCommand = pfnSendCommand[pVDev->VDeviceType];
4711713e81bSScott Long 		pVDev->pfnDeviceFailed = pfnDeviceFailed[pVDev->VDeviceType];
4721713e81bSScott Long 		pVDev->vf_online = 1;
4731713e81bSScott Long 
4741713e81bSScott Long #ifdef SUPPORT_ARRAY
475d2bd3ab9SScott Long 		if(pVDev->pParent)
476d2bd3ab9SScott Long 		{
4771713e81bSScott Long 			int iMember;
478d2bd3ab9SScott Long 			for(iMember = 0; iMember < 	pVDev->pParent->u.array.bArnMember; iMember++)
4791713e81bSScott Long 				if((PVDevice)pVDev->pParent->u.array.pMember[iMember] == pVDev)
4801713e81bSScott Long 					pVDev->pParent->u.array.pMember[iMember] = NULL;
4811713e81bSScott Long 			pVDev->pParent = NULL;
4821713e81bSScott Long 		}
4831713e81bSScott Long #endif
4841713e81bSScott Long 		fNotifyGUI(ET_DEVICE_PLUGGED,pVDev);
4851713e81bSScott Long 		fCheckBootable(pVDev);
4861713e81bSScott Long 		RegisterVDevice(pVDev);
4871713e81bSScott Long 
4881713e81bSScott Long #ifndef FOR_DEMO
4891713e81bSScott Long 		if (pAdapter->beeping) {
4901713e81bSScott Long 			pAdapter->beeping = 0;
4911713e81bSScott Long 			BeepOff(pAdapter->mvSataAdapter.adapterIoBaseAddress);
4921713e81bSScott Long 		}
4931713e81bSScott Long #endif
4941713e81bSScott Long 
495d2bd3ab9SScott Long 	}
496d2bd3ab9SScott Long 	else
497d2bd3ab9SScott Long 	{
4981713e81bSScott Long 		pVDev  = &(pAdapter->VDevices[channelIndex]);
499d2bd3ab9SScott Long 		failDevice(pVDev);
5001713e81bSScott Long 	}
5011713e81bSScott Long }
5021713e81bSScott Long 
5031713e81bSScott Long static int
5041713e81bSScott Long start_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum)
5051713e81bSScott Long {
506d2bd3ab9SScott Long 	MV_SATA_ADAPTER *pMvSataAdapter = &pAdapter->mvSataAdapter;
507d2bd3ab9SScott Long 	MV_SATA_CHANNEL *pMvSataChannel = pMvSataAdapter->sataChannel[channelNum];
508d2bd3ab9SScott Long 	MV_CHANNEL		*pChannelInfo = &(pAdapter->mvChannel[channelNum]);
5091713e81bSScott Long 	MV_U32          udmaMode,pioMode;
5101713e81bSScott Long 
5111713e81bSScott Long 	KdPrint(("RR182x [%d]: start channel (%d)", pMvSataAdapter->adapterId,
5121713e81bSScott Long 			 channelNum));
5131713e81bSScott Long 
5141713e81bSScott Long 
5151713e81bSScott Long 	/* Software reset channel */
516d2bd3ab9SScott Long 	if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channelNum) == MV_FALSE)
517d2bd3ab9SScott Long 	{
5181713e81bSScott Long 		MV_ERROR("RR182x [%d,%d]: failed to perform Software reset\n",
5191713e81bSScott Long 				 pMvSataAdapter->adapterId, channelNum);
5201713e81bSScott Long 		return -1;
5211713e81bSScott Long 	}
5221713e81bSScott Long 
5231713e81bSScott Long 	/* Hardware reset channel */
524d2bd3ab9SScott Long 	if (mvSataChannelHardReset(pMvSataAdapter, channelNum) == MV_FALSE)
525d2bd3ab9SScott Long 	{
526d2bd3ab9SScott Long 		/* If failed, try again - this is when trying to hardreset a channel */
527d2bd3ab9SScott Long 		/* when drive is just spinning up */
5281713e81bSScott Long 		StallExec(5000000); /* wait 5 sec before trying again */
529d2bd3ab9SScott Long 		if (mvSataChannelHardReset(pMvSataAdapter, channelNum) == MV_FALSE)
530d2bd3ab9SScott Long 		{
531d2bd3ab9SScott Long 			MV_ERROR("RR182x [%d,%d]: failed to perform Hard reset\n",
5321713e81bSScott Long 					 pMvSataAdapter->adapterId, channelNum);
5331713e81bSScott Long 			return -1;
5341713e81bSScott Long 		}
5351713e81bSScott Long 	}
5361713e81bSScott Long 
537d2bd3ab9SScott Long 	/* identify device*/
538d2bd3ab9SScott Long 	if (mvStorageDevATAIdentifyDevice(pMvSataAdapter, channelNum) == MV_FALSE)
539d2bd3ab9SScott Long 	{
540d2bd3ab9SScott Long 		MV_ERROR("RR182x [%d,%d]: failed to perform ATA Identify command\n"
541d2bd3ab9SScott Long 				 , pMvSataAdapter->adapterId, channelNum);
542d2bd3ab9SScott Long 		return -1;
543d2bd3ab9SScott Long 	}
544d2bd3ab9SScott Long 	if (hptmv_parse_identify_results(pMvSataChannel))
545d2bd3ab9SScott Long 	{
546d2bd3ab9SScott Long 		MV_ERROR("RR182x [%d,%d]: Error in parsing ATA Identify message\n"
547d2bd3ab9SScott Long 				 , pMvSataAdapter->adapterId, channelNum);
548d2bd3ab9SScott Long 		return -1;
549d2bd3ab9SScott Long 	}
550d2bd3ab9SScott Long 
551d2bd3ab9SScott Long 	/* mvStorageDevATASetFeatures */
552d2bd3ab9SScott Long 	/* Disable 8 bit PIO in case CFA enabled */
553d2bd3ab9SScott Long 	if (pMvSataChannel->identifyDevice[86] & 4)
554d2bd3ab9SScott Long 	{
555d2bd3ab9SScott Long 		KdPrint(("RR182x [%d]: Disable 8 bit PIO (CFA enabled) \n",
556d2bd3ab9SScott Long 				  pMvSataAdapter->adapterId));
557d2bd3ab9SScott Long 		if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
558d2bd3ab9SScott Long 									   MV_ATA_SET_FEATURES_DISABLE_8_BIT_PIO, 0,
559d2bd3ab9SScott Long 									   0, 0, 0) == MV_FALSE)
560d2bd3ab9SScott Long 		{
561d2bd3ab9SScott Long 			MV_ERROR("RR182x [%d]: channel %d: mvStorageDevATASetFeatures"
562d2bd3ab9SScott Long 					 " failed\n", pMvSataAdapter->adapterId, channelNum);
563d2bd3ab9SScott Long 			return -1;
564d2bd3ab9SScott Long 		}
565d2bd3ab9SScott Long 	}
5661713e81bSScott Long 	/* Write cache */
567d2bd3ab9SScott Long #ifdef ENABLE_WRITE_CACHE
568d2bd3ab9SScott Long 	if (pMvSataChannel->identifyDevice[82] & 0x20)
569d2bd3ab9SScott Long 	{
570d2bd3ab9SScott Long 		if (!(pMvSataChannel->identifyDevice[85] & 0x20)) /* if not enabled by default */
571d2bd3ab9SScott Long 		{
572d2bd3ab9SScott Long 			if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
573d2bd3ab9SScott Long 										   MV_ATA_SET_FEATURES_ENABLE_WCACHE, 0,
574d2bd3ab9SScott Long 										   0, 0, 0) == MV_FALSE)
575d2bd3ab9SScott Long 			{
576d2bd3ab9SScott Long 				MV_ERROR("RR182x [%d]: channel %d: mvStorageDevATASetFeatures failed\n",
5771713e81bSScott Long 						 pMvSataAdapter->adapterId, channelNum);
5781713e81bSScott Long 				return -1;
5791713e81bSScott Long 			}
5801713e81bSScott Long 		}
5811713e81bSScott Long 		KdPrint(("RR182x [%d]: channel %d, write cache enabled\n",
5821713e81bSScott Long 				  pMvSataAdapter->adapterId, channelNum));
583d2bd3ab9SScott Long 	}
584d2bd3ab9SScott Long 	else
585d2bd3ab9SScott Long 	{
5861713e81bSScott Long 		KdPrint(("RR182x [%d]: channel %d, write cache not supported\n",
5871713e81bSScott Long 				  pMvSataAdapter->adapterId, channelNum));
5881713e81bSScott Long 	}
589d2bd3ab9SScott Long #else /* disable write cache */
590d2bd3ab9SScott Long 	{
591d2bd3ab9SScott Long 		if (pMvSataChannel->identifyDevice[85] & 0x20)
592d2bd3ab9SScott Long 		{
5931713e81bSScott Long 			KdPrint(("RR182x [%d]: channel =%d, disable write cache\n",
5941713e81bSScott Long 					  pMvSataAdapter->adapterId, channelNum));
5951713e81bSScott Long 			if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
596d2bd3ab9SScott Long 										   MV_ATA_SET_FEATURES_DISABLE_WCACHE, 0,
597d2bd3ab9SScott Long 										   0, 0, 0) == MV_FALSE)
598d2bd3ab9SScott Long 			{
599d2bd3ab9SScott Long 				MV_ERROR("RR182x [%d]: channel %d: mvStorageDevATASetFeatures failed\n",
6001713e81bSScott Long 						 pMvSataAdapter->adapterId, channelNum);
6011713e81bSScott Long 				return -1;
6021713e81bSScott Long 			}
6031713e81bSScott Long 		}
6041713e81bSScott Long 		KdPrint(("RR182x [%d]: channel=%d, write cache disabled\n",
6051713e81bSScott Long 				  pMvSataAdapter->adapterId, channelNum));
606d2bd3ab9SScott Long 	}
6071713e81bSScott Long #endif
6081713e81bSScott Long 
6091713e81bSScott Long 	/* Set transfer mode */
6101713e81bSScott Long 	KdPrint(("RR182x [%d] Set transfer mode XFER_PIO_SLOW\n",
6111713e81bSScott Long 			  pMvSataAdapter->adapterId));
6121713e81bSScott Long 	if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
613d2bd3ab9SScott Long 								   MV_ATA_SET_FEATURES_TRANSFER,
614d2bd3ab9SScott Long 								   MV_ATA_TRANSFER_PIO_SLOW, 0, 0, 0) ==
615d2bd3ab9SScott Long 		MV_FALSE)
616d2bd3ab9SScott Long 	{
6171713e81bSScott Long 		MV_ERROR("RR182x [%d] channel %d: Set Features failed\n",
6181713e81bSScott Long 				 pMvSataAdapter->adapterId, channelNum);
6191713e81bSScott Long 		return -1;
6201713e81bSScott Long 	}
6211713e81bSScott Long 
622d2bd3ab9SScott Long 	if (pMvSataChannel->identifyDevice[IDEN_PIO_MODE_SPPORTED] & 1)
623d2bd3ab9SScott Long 	{
6241713e81bSScott Long 		pioMode = MV_ATA_TRANSFER_PIO_4;
625d2bd3ab9SScott Long 	}
626d2bd3ab9SScott Long 	else if (pMvSataChannel->identifyDevice[IDEN_PIO_MODE_SPPORTED] & 2)
627d2bd3ab9SScott Long 	{
6281713e81bSScott Long 		pioMode = MV_ATA_TRANSFER_PIO_3;
629d2bd3ab9SScott Long 	}
630d2bd3ab9SScott Long 	else
631d2bd3ab9SScott Long 	{
632d2bd3ab9SScott Long 		MV_ERROR("IAL Error in IDENTIFY info: PIO modes 3 and 4 not supported\n");
6331713e81bSScott Long 		pioMode = MV_ATA_TRANSFER_PIO_SLOW;
6341713e81bSScott Long 	}
6351713e81bSScott Long 
6361713e81bSScott Long 	KdPrint(("RR182x [%d] Set transfer mode XFER_PIO_4\n",
6371713e81bSScott Long 			  pMvSataAdapter->adapterId));
6381713e81bSScott Long 	pAdapter->mvChannel[channelNum].maxPioModeSupported = pioMode;
6391713e81bSScott Long 	if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
640d2bd3ab9SScott Long 								   MV_ATA_SET_FEATURES_TRANSFER,
641d2bd3ab9SScott Long 								   pioMode, 0, 0, 0) == MV_FALSE)
642d2bd3ab9SScott Long 	{
6431713e81bSScott Long 		MV_ERROR("RR182x [%d] channel %d: Set Features failed\n",
6441713e81bSScott Long 				 pMvSataAdapter->adapterId, channelNum);
6451713e81bSScott Long 		return -1;
6461713e81bSScott Long 	}
6471713e81bSScott Long 
6481713e81bSScott Long 	udmaMode = MV_ATA_TRANSFER_UDMA_0;
649d2bd3ab9SScott Long 	if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x40)
650d2bd3ab9SScott Long 	{
6511713e81bSScott Long 		udmaMode =  MV_ATA_TRANSFER_UDMA_6;
652d2bd3ab9SScott Long 	}
653d2bd3ab9SScott Long 	else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x20)
654d2bd3ab9SScott Long 	{
6551713e81bSScott Long 		udmaMode =  MV_ATA_TRANSFER_UDMA_5;
656d2bd3ab9SScott Long 	}
657d2bd3ab9SScott Long 	else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x10)
658d2bd3ab9SScott Long 	{
6591713e81bSScott Long 		udmaMode =  MV_ATA_TRANSFER_UDMA_4;
660d2bd3ab9SScott Long 	}
661d2bd3ab9SScott Long 	else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 8)
662d2bd3ab9SScott Long 	{
6631713e81bSScott Long 		udmaMode =  MV_ATA_TRANSFER_UDMA_3;
664d2bd3ab9SScott Long 	}
665d2bd3ab9SScott Long 	else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 4)
666d2bd3ab9SScott Long 	{
6671713e81bSScott Long 		udmaMode =  MV_ATA_TRANSFER_UDMA_2;
6681713e81bSScott Long 	}
6691713e81bSScott Long 
6701713e81bSScott Long 	KdPrint(("RR182x [%d] Set transfer mode XFER_UDMA_%d\n",
6711713e81bSScott Long 			  pMvSataAdapter->adapterId, udmaMode & 0xf));
6721713e81bSScott Long 	pChannelInfo->maxUltraDmaModeSupported = udmaMode;
6731713e81bSScott Long 
674d2bd3ab9SScott Long 	/*if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
675d2bd3ab9SScott Long 								   MV_ATA_SET_FEATURES_TRANSFER, udmaMode,
676d2bd3ab9SScott Long 								   0, 0, 0) == MV_FALSE)
677d2bd3ab9SScott Long 	{
6781713e81bSScott Long 		MV_ERROR("RR182x [%d] channel %d: Set Features failed\n",
6791713e81bSScott Long 				 pMvSataAdapter->adapterId, channelNum);
6801713e81bSScott Long 		return -1;
681d2bd3ab9SScott Long 	}*/
6821713e81bSScott Long 	if (pChannelInfo->maxUltraDmaModeSupported == 0xFF)
6831713e81bSScott Long 		return TRUE;
684d2bd3ab9SScott Long 	else
685d2bd3ab9SScott Long 		do
686d2bd3ab9SScott Long 		{
6871713e81bSScott Long 			if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
6881713e81bSScott Long 								   MV_ATA_SET_FEATURES_TRANSFER,
689d2bd3ab9SScott Long 								   pChannelInfo->maxUltraDmaModeSupported,
690d2bd3ab9SScott Long 								   0, 0, 0) == MV_FALSE)
691d2bd3ab9SScott Long 			{
692d2bd3ab9SScott Long 				if (pChannelInfo->maxUltraDmaModeSupported > MV_ATA_TRANSFER_UDMA_0)
693d2bd3ab9SScott Long 				{
694d2bd3ab9SScott Long 					if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channelNum) == MV_FALSE)
695d2bd3ab9SScott Long 					{
696d2bd3ab9SScott Long 						MV_REG_WRITE_BYTE(pMvSataAdapter->adapterIoBaseAddress,
697d2bd3ab9SScott Long 										  pMvSataChannel->eDmaRegsOffset +
698d2bd3ab9SScott Long 										  0x11c, /* command reg */
699d2bd3ab9SScott Long 										  MV_ATA_COMMAND_IDLE_IMMEDIATE);
7001713e81bSScott Long 						mvMicroSecondsDelay(10000);
7011713e81bSScott Long 						mvSataChannelHardReset(pMvSataAdapter, channelNum);
702d2bd3ab9SScott Long 						if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channelNum) == MV_FALSE)
7031713e81bSScott Long 							return FALSE;
7041713e81bSScott Long 					}
705d2bd3ab9SScott Long 					if (mvSataChannelHardReset(pMvSataAdapter, channelNum) == MV_FALSE)
7061713e81bSScott Long 						return FALSE;
7071713e81bSScott Long 					pChannelInfo->maxUltraDmaModeSupported--;
708d2bd3ab9SScott Long 					continue;
709d2bd3ab9SScott Long 				}
710d2bd3ab9SScott Long 				else   return FALSE;
711d2bd3ab9SScott Long 			}
712d2bd3ab9SScott Long 			break;
7131713e81bSScott Long 		}while (1);
7141713e81bSScott Long 
7151713e81bSScott Long 	/* Read look ahead */
716d2bd3ab9SScott Long #ifdef ENABLE_READ_AHEAD
717d2bd3ab9SScott Long 	if (pMvSataChannel->identifyDevice[82] & 0x40)
718d2bd3ab9SScott Long 	{
719d2bd3ab9SScott Long 		if (!(pMvSataChannel->identifyDevice[85] & 0x40)) /* if not enabled by default */
720d2bd3ab9SScott Long 		{
721d2bd3ab9SScott Long 			if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
722d2bd3ab9SScott Long 										   MV_ATA_SET_FEATURES_ENABLE_RLA, 0, 0,
723d2bd3ab9SScott Long 										   0, 0) == MV_FALSE)
724d2bd3ab9SScott Long 			{
725d2bd3ab9SScott Long 				MV_ERROR("RR182x [%d] channel %d: Set Features failed\n",
726d2bd3ab9SScott Long 						 pMvSataAdapter->adapterId, channelNum);
7271713e81bSScott Long 				return -1;
7281713e81bSScott Long 			}
7291713e81bSScott Long 		}
7301713e81bSScott Long 		KdPrint(("RR182x [%d]: channel=%d, read look ahead enabled\n",
7311713e81bSScott Long 				  pMvSataAdapter->adapterId, channelNum));
732d2bd3ab9SScott Long 	}
733d2bd3ab9SScott Long 	else
734d2bd3ab9SScott Long 	{
735d2bd3ab9SScott Long 		KdPrint(("RR182x [%d]: channel %d, Read Look Ahead not supported\n",
736d2bd3ab9SScott Long 				  pMvSataAdapter->adapterId, channelNum));
7371713e81bSScott Long 	}
7381713e81bSScott Long #else
739d2bd3ab9SScott Long 	{
740d2bd3ab9SScott Long 		if (pMvSataChannel->identifyDevice[86] & 0x20)
741d2bd3ab9SScott Long 		{
7421713e81bSScott Long 			KdPrint(("RR182x [%d]:channel %d, disable read look ahead\n",
7431713e81bSScott Long 					  pMvSataAdapter->adapterId, channelNum));
7441713e81bSScott Long 			if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
745d2bd3ab9SScott Long 										   MV_ATA_SET_FEATURES_DISABLE_RLA, 0, 0,
746d2bd3ab9SScott Long 										   0, 0) == MV_FALSE)
747d2bd3ab9SScott Long 			{
748d2bd3ab9SScott Long 				MV_ERROR("RR182x [%d]:channel %d:  ATA Set Features failed\n",
749d2bd3ab9SScott Long 						 pMvSataAdapter->adapterId, channelNum);
7501713e81bSScott Long 				return -1;
7511713e81bSScott Long 			}
7521713e81bSScott Long 		}
7531713e81bSScott Long 		KdPrint(("RR182x [%d]:channel %d, read look ahead disabled\n",
7541713e81bSScott Long 				  pMvSataAdapter->adapterId, channelNum));
755d2bd3ab9SScott Long 	}
7561713e81bSScott Long #endif
7571713e81bSScott Long 
758d2bd3ab9SScott Long 
759d2bd3ab9SScott Long 	{
760d2bd3ab9SScott Long 		KdPrint(("RR182x [%d]: channel %d config EDMA, Non Queued Mode\n",
761d2bd3ab9SScott Long 				  pMvSataAdapter->adapterId,
762d2bd3ab9SScott Long 				  channelNum));
763d2bd3ab9SScott Long 		if (mvSataConfigEdmaMode(pMvSataAdapter, channelNum,
764d2bd3ab9SScott Long 								 MV_EDMA_MODE_NOT_QUEUED, 0) == MV_FALSE)
765d2bd3ab9SScott Long 		{
766d2bd3ab9SScott Long 			MV_ERROR("RR182x [%d] channel %d Error: mvSataConfigEdmaMode failed\n",
7671713e81bSScott Long 					 pMvSataAdapter->adapterId, channelNum);
7681713e81bSScott Long 			return -1;
7691713e81bSScott Long 		}
7701713e81bSScott Long 	}
7711713e81bSScott Long 	/* Enable EDMA */
772d2bd3ab9SScott Long 	if (mvSataEnableChannelDma(pMvSataAdapter, channelNum) == MV_FALSE)
773d2bd3ab9SScott Long 	{
7741713e81bSScott Long 		MV_ERROR("RR182x [%d] Failed to enable DMA, channel=%d\n",
7751713e81bSScott Long 				 pMvSataAdapter->adapterId, channelNum);
7761713e81bSScott Long 		return -1;
7771713e81bSScott Long 	}
7781713e81bSScott Long 	MV_ERROR("RR182x [%d,%d]: channel started successfully\n",
7791713e81bSScott Long 			 pMvSataAdapter->adapterId, channelNum);
7801713e81bSScott Long 
7811713e81bSScott Long #ifndef FOR_DEMO
7821713e81bSScott Long 	set_fail_led(pMvSataAdapter, channelNum, 0);
7831713e81bSScott Long #endif
7841713e81bSScott Long 	return 0;
7851713e81bSScott Long }
7861713e81bSScott Long 
7871713e81bSScott Long static void
7881713e81bSScott Long hptmv_handle_event(void * data, int flag)
7891713e81bSScott Long {
790d2bd3ab9SScott Long 	IAL_ADAPTER_T   *pAdapter = (IAL_ADAPTER_T *)data;
791d2bd3ab9SScott Long 	MV_SATA_ADAPTER *pMvSataAdapter = &pAdapter->mvSataAdapter;
7921713e81bSScott Long 	MV_U8           channelIndex;
7931713e81bSScott Long 
794d2bd3ab9SScott Long /*	mvOsSemTake(&pMvSataAdapter->semaphore); */
795d2bd3ab9SScott Long 	for (channelIndex = 0; channelIndex < MV_SATA_CHANNELS_NUM; channelIndex++)
796d2bd3ab9SScott Long 	{
797d2bd3ab9SScott Long 		switch(pAdapter->sataEvents[channelIndex])
798d2bd3ab9SScott Long 		{
7991713e81bSScott Long 			case SATA_EVENT_CHANNEL_CONNECTED:
8001713e81bSScott Long 				/* Handle only connects */
8011713e81bSScott Long 				if (flag == 1)
8021713e81bSScott Long 					break;
8031713e81bSScott Long 				KdPrint(("RR182x [%d,%d]: new device connected\n",
8041713e81bSScott Long 						 pMvSataAdapter->adapterId, channelIndex));
8051713e81bSScott Long 				hptmv_init_channel(pAdapter, channelIndex);
806d2bd3ab9SScott Long 				if (mvSataConfigureChannel( pMvSataAdapter, channelIndex) == MV_FALSE)
807d2bd3ab9SScott Long 				{
8081713e81bSScott Long 					MV_ERROR("RR182x [%d,%d] Failed to configure\n",
809d2bd3ab9SScott Long 							 pMvSataAdapter->adapterId, channelIndex);
8101713e81bSScott Long 					hptmv_free_channel(pAdapter, channelIndex);
811d2bd3ab9SScott Long 				}
812d2bd3ab9SScott Long 				else
813d2bd3ab9SScott Long 				{
814d2bd3ab9SScott Long 					/*mvSataChannelHardReset(pMvSataAdapter, channel);*/
815d2bd3ab9SScott Long 					if (start_channel( pAdapter, channelIndex))
816d2bd3ab9SScott Long 					{
817d2bd3ab9SScott Long 						MV_ERROR("RR182x [%d,%d]Failed to start channel\n",
818d2bd3ab9SScott Long 								 pMvSataAdapter->adapterId, channelIndex);
819d2bd3ab9SScott Long 						hptmv_free_channel(pAdapter, channelIndex);
820d2bd3ab9SScott Long 					}
821d2bd3ab9SScott Long 					else
822d2bd3ab9SScott Long 					{
823d2bd3ab9SScott Long 						device_change(pAdapter, channelIndex, TRUE);
8241713e81bSScott Long 					}
8251713e81bSScott Long 				}
826d2bd3ab9SScott Long 				pAdapter->sataEvents[channelIndex] = SATA_EVENT_NO_CHANGE;
8271713e81bSScott Long 			   break;
8281713e81bSScott Long 
8291713e81bSScott Long 			case SATA_EVENT_CHANNEL_DISCONNECTED:
8301713e81bSScott Long 				/* Handle only disconnects */
8311713e81bSScott Long 				if (flag == 0)
8321713e81bSScott Long 					break;
8331713e81bSScott Long 				KdPrint(("RR182x [%d,%d]: device disconnected\n",
8341713e81bSScott Long 						 pMvSataAdapter->adapterId, channelIndex));
8351713e81bSScott Long 					/* Flush pending commands */
836d2bd3ab9SScott Long 				if(pMvSataAdapter->sataChannel[channelIndex])
837d2bd3ab9SScott Long 				{
8381713e81bSScott Long 					_VBUS_INST(&pAdapter->VBus)
839d2bd3ab9SScott Long 					mvSataFlushDmaQueue (pMvSataAdapter, channelIndex,
840d2bd3ab9SScott Long 										 MV_FLUSH_TYPE_CALLBACK);
8411713e81bSScott Long 					CheckPendingCall(_VBUS_P0);
842d2bd3ab9SScott Long 					mvSataRemoveChannel(pMvSataAdapter,channelIndex);
8431713e81bSScott Long 					hptmv_free_channel(pAdapter, channelIndex);
844d2bd3ab9SScott Long 					pMvSataAdapter->sataChannel[channelIndex] = NULL;
8451713e81bSScott Long 					KdPrint(("RR182x [%d,%d]: channel removed\n",
846d2bd3ab9SScott Long 						 pMvSataAdapter->adapterId, channelIndex));
847d2bd3ab9SScott Long 					if (pAdapter->outstandingCommands==0 && DPC_Request_Nums==0)
8481713e81bSScott Long 						Check_Idle_Call(pAdapter);
8491713e81bSScott Long 				}
850d2bd3ab9SScott Long 				else
851d2bd3ab9SScott Long 				{
852d2bd3ab9SScott Long 					KdPrint(("RR182x [%d,%d]: channel already removed!!\n",
853d2bd3ab9SScott Long 							 pMvSataAdapter->adapterId, channelIndex));
854d2bd3ab9SScott Long 				}
855d2bd3ab9SScott Long 				pAdapter->sataEvents[channelIndex] = SATA_EVENT_NO_CHANGE;
8561713e81bSScott Long 				break;
8571713e81bSScott Long 
8581713e81bSScott Long 			case SATA_EVENT_NO_CHANGE:
8591713e81bSScott Long 				break;
8601713e81bSScott Long 
8611713e81bSScott Long 			default:
8621713e81bSScott Long 				break;
8631713e81bSScott Long 		}
8641713e81bSScott Long 	}
865d2bd3ab9SScott Long /*	mvOsSemRelease(&pMvSataAdapter->semaphore); */
8661713e81bSScott Long }
8671713e81bSScott Long 
8681713e81bSScott Long #define EVENT_CONNECT					1
8691713e81bSScott Long #define EVENT_DISCONNECT				0
8701713e81bSScott Long 
8711713e81bSScott Long static void
8721713e81bSScott Long hptmv_handle_event_connect(void *data)
8731713e81bSScott Long {
8741713e81bSScott Long   hptmv_handle_event (data, 0);
8751713e81bSScott Long }
8761713e81bSScott Long 
8771713e81bSScott Long static void
8781713e81bSScott Long hptmv_handle_event_disconnect(void *data)
8791713e81bSScott Long {
8801713e81bSScott Long   hptmv_handle_event (data, 1);
8811713e81bSScott Long }
8821713e81bSScott Long 
8831713e81bSScott Long static MV_BOOLEAN
8841713e81bSScott Long hptmv_event_notify(MV_SATA_ADAPTER *pMvSataAdapter, MV_EVENT_TYPE eventType,
8851713e81bSScott Long 								   MV_U32 param1, MV_U32 param2)
8861713e81bSScott Long {
8871713e81bSScott Long 	IAL_ADAPTER_T   *pAdapter = pMvSataAdapter->IALData;
8881713e81bSScott Long 
889d2bd3ab9SScott Long 	switch (eventType)
890d2bd3ab9SScott Long 	{
8911713e81bSScott Long 		case MV_EVENT_TYPE_SATA_CABLE:
8921713e81bSScott Long 			{
8931713e81bSScott Long 				MV_U8   channel = param2;
8941713e81bSScott Long 
895d2bd3ab9SScott Long 				if (param1 == EVENT_CONNECT)
896d2bd3ab9SScott Long 				{
897d2bd3ab9SScott Long 					pAdapter->sataEvents[channel] = SATA_EVENT_CHANNEL_CONNECTED;
898d2bd3ab9SScott Long 					KdPrint(("RR182x [%d,%d]: device connected event received\n",
899d2bd3ab9SScott Long 							 pMvSataAdapter->adapterId, channel));
900d2bd3ab9SScott Long 					/* Delete previous timers (if multiple drives connected in the same time */
901d2bd3ab9SScott Long 					pAdapter->event_timer_connect = timeout(hptmv_handle_event_connect, pAdapter, 10*hz);
902d2bd3ab9SScott Long 				}
903d2bd3ab9SScott Long 				else if (param1 == EVENT_DISCONNECT)
904d2bd3ab9SScott Long 				{
905d2bd3ab9SScott Long 					pAdapter->sataEvents[channel] = SATA_EVENT_CHANNEL_DISCONNECTED;
906d2bd3ab9SScott Long 					KdPrint(("RR182x [%d,%d]: device disconnected event received \n",
907d2bd3ab9SScott Long 							 pMvSataAdapter->adapterId, channel));
9081713e81bSScott Long 					device_change(pAdapter, channel, FALSE);
909d2bd3ab9SScott Long 					/* Delete previous timers (if multiple drives disconnected in the same time */
910d2bd3ab9SScott Long 					/*pAdapter->event_timer_disconnect = timeout(hptmv_handle_event_disconnect, pAdapter, 10*hz); */
911d2bd3ab9SScott Long 					/*It is not necessary to wait, handle it directly*/
912d2bd3ab9SScott Long 					hptmv_handle_event_disconnect(pAdapter);
913d2bd3ab9SScott Long 				}
914d2bd3ab9SScott Long 				else
915d2bd3ab9SScott Long 				{
916d2bd3ab9SScott Long 
9171713e81bSScott Long 					MV_ERROR("RR182x: illigal value for param1(%d) at "
9181713e81bSScott Long 							 "connect/disconect event, host=%d\n", param1,
9191713e81bSScott Long 							 pMvSataAdapter->adapterId );
9201713e81bSScott Long 
9211713e81bSScott Long 				}
9221713e81bSScott Long 			}
923d2bd3ab9SScott Long 			break;
9241713e81bSScott Long 		case MV_EVENT_TYPE_ADAPTER_ERROR:
9251713e81bSScott Long 			KdPrint(("RR182x: DEVICE error event received, pci cause "
9261713e81bSScott Long 					  "reg=%x,  don't how to handle this\n", param1));
9271713e81bSScott Long 			return MV_TRUE;
9281713e81bSScott Long 		default:
9291713e81bSScott Long 			MV_ERROR("RR182x[%d]: unknown event type (%d)\n",
9301713e81bSScott Long 					 pMvSataAdapter->adapterId, eventType);
9311713e81bSScott Long 			return MV_FALSE;
9321713e81bSScott Long 	}
9331713e81bSScott Long 	return MV_TRUE;
9341713e81bSScott Long }
9351713e81bSScott Long 
9361713e81bSScott Long static int
9371713e81bSScott Long hptmv_allocate_edma_queues(IAL_ADAPTER_T *pAdapter)
9381713e81bSScott Long {
939d2bd3ab9SScott Long 	pAdapter->requestsArrayBaseAddr = (MV_U8 *)contigmalloc(REQUESTS_ARRAY_SIZE,
940d2bd3ab9SScott Long 			M_DEVBUF, M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0ul);
941d2bd3ab9SScott Long 	if (pAdapter->requestsArrayBaseAddr == NULL)
942d2bd3ab9SScott Long 	{
943d2bd3ab9SScott Long 		MV_ERROR("RR182x[%d]: Failed to allocate memory for EDMA request"
944d2bd3ab9SScott Long 				 " queues\n", pAdapter->mvSataAdapter.adapterId);
9451713e81bSScott Long 		return -1;
9461713e81bSScott Long 	}
947d2bd3ab9SScott Long 	pAdapter->requestsArrayBaseDmaAddr = fOsPhysicalAddress(pAdapter->requestsArrayBaseAddr);
948d2bd3ab9SScott Long 	pAdapter->requestsArrayBaseAlignedAddr = pAdapter->requestsArrayBaseAddr;
9491713e81bSScott Long 	pAdapter->requestsArrayBaseAlignedAddr += MV_EDMA_REQUEST_QUEUE_SIZE;
950d2bd3ab9SScott Long 	pAdapter->requestsArrayBaseAlignedAddr  = (MV_U8 *)
951d2bd3ab9SScott Long 		(((ULONG_PTR)pAdapter->requestsArrayBaseAlignedAddr) & ~(ULONG_PTR)(MV_EDMA_REQUEST_QUEUE_SIZE - 1));
952d2bd3ab9SScott Long 	pAdapter->requestsArrayBaseDmaAlignedAddr = pAdapter->requestsArrayBaseDmaAddr;
9531713e81bSScott Long 	pAdapter->requestsArrayBaseDmaAlignedAddr += MV_EDMA_REQUEST_QUEUE_SIZE;
954d2bd3ab9SScott Long 	pAdapter->requestsArrayBaseDmaAlignedAddr &= ~(ULONG_PTR)(MV_EDMA_REQUEST_QUEUE_SIZE - 1);
9551713e81bSScott Long 
956d2bd3ab9SScott Long 	if ((pAdapter->requestsArrayBaseDmaAlignedAddr - pAdapter->requestsArrayBaseDmaAddr) !=
957d2bd3ab9SScott Long 		(pAdapter->requestsArrayBaseAlignedAddr - pAdapter->requestsArrayBaseAddr))
958d2bd3ab9SScott Long 	{
9591713e81bSScott Long 		MV_ERROR("RR182x[%d]: Error in Request Quueues Alignment\n",
9601713e81bSScott Long 				 pAdapter->mvSataAdapter.adapterId);
961d2bd3ab9SScott Long 		contigfree(pAdapter->requestsArrayBaseAddr, REQUESTS_ARRAY_SIZE, M_DEVBUF);
9621713e81bSScott Long 		return -1;
9631713e81bSScott Long 	}
9641713e81bSScott Long 	/* response queues */
965d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseAddr = (MV_U8 *)contigmalloc(RESPONSES_ARRAY_SIZE,
966d2bd3ab9SScott Long 			M_DEVBUF, M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0ul);
967d2bd3ab9SScott Long 	if (pAdapter->responsesArrayBaseAddr == NULL)
968d2bd3ab9SScott Long 	{
969d2bd3ab9SScott Long 		MV_ERROR("RR182x[%d]: Failed to allocate memory for EDMA response"
970d2bd3ab9SScott Long 				 " queues\n", pAdapter->mvSataAdapter.adapterId);
971d2bd3ab9SScott Long 		contigfree(pAdapter->requestsArrayBaseAddr, RESPONSES_ARRAY_SIZE, M_DEVBUF);
9721713e81bSScott Long 		return -1;
9731713e81bSScott Long 	}
974d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseDmaAddr = fOsPhysicalAddress(pAdapter->responsesArrayBaseAddr);
975d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseAlignedAddr = pAdapter->responsesArrayBaseAddr;
9761713e81bSScott Long 	pAdapter->responsesArrayBaseAlignedAddr += MV_EDMA_RESPONSE_QUEUE_SIZE;
977d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseAlignedAddr  = (MV_U8 *)
978d2bd3ab9SScott Long 		(((ULONG_PTR)pAdapter->responsesArrayBaseAlignedAddr) & ~(ULONG_PTR)(MV_EDMA_RESPONSE_QUEUE_SIZE - 1));
979d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseDmaAlignedAddr = pAdapter->responsesArrayBaseDmaAddr;
980d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseDmaAlignedAddr += MV_EDMA_RESPONSE_QUEUE_SIZE;
981d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseDmaAlignedAddr &= ~(ULONG_PTR)(MV_EDMA_RESPONSE_QUEUE_SIZE - 1);
9821713e81bSScott Long 
983d2bd3ab9SScott Long 	if ((pAdapter->responsesArrayBaseDmaAlignedAddr - pAdapter->responsesArrayBaseDmaAddr) !=
984d2bd3ab9SScott Long 		(pAdapter->responsesArrayBaseAlignedAddr - pAdapter->responsesArrayBaseAddr))
985d2bd3ab9SScott Long 	{
9861713e81bSScott Long 		MV_ERROR("RR182x[%d]: Error in Response Quueues Alignment\n",
9871713e81bSScott Long 				 pAdapter->mvSataAdapter.adapterId);
988d2bd3ab9SScott Long 		contigfree(pAdapter->requestsArrayBaseAddr, REQUESTS_ARRAY_SIZE, M_DEVBUF);
989d2bd3ab9SScott Long 		contigfree(pAdapter->responsesArrayBaseAddr, RESPONSES_ARRAY_SIZE, M_DEVBUF);
9901713e81bSScott Long 		return -1;
9911713e81bSScott Long 	}
9921713e81bSScott Long 	return 0;
9931713e81bSScott Long }
9941713e81bSScott Long 
9951713e81bSScott Long static void
9961713e81bSScott Long hptmv_free_edma_queues(IAL_ADAPTER_T *pAdapter)
9971713e81bSScott Long {
998d2bd3ab9SScott Long 	contigfree(pAdapter->requestsArrayBaseAddr, REQUESTS_ARRAY_SIZE, M_DEVBUF);
999d2bd3ab9SScott Long 	contigfree(pAdapter->responsesArrayBaseAddr, RESPONSES_ARRAY_SIZE, M_DEVBUF);
10001713e81bSScott Long }
10011713e81bSScott Long 
10021713e81bSScott Long static PVOID
10031713e81bSScott Long AllocatePRDTable(IAL_ADAPTER_T *pAdapter)
10041713e81bSScott Long {
10051713e81bSScott Long 	PVOID ret;
10061713e81bSScott Long 	if (pAdapter->pFreePRDLink) {
1007d2bd3ab9SScott Long 		KdPrint(("pAdapter->pFreePRDLink:%p\n",pAdapter->pFreePRDLink));
10081713e81bSScott Long 		ret = pAdapter->pFreePRDLink;
10091713e81bSScott Long 		pAdapter->pFreePRDLink = *(void**)ret;
10101713e81bSScott Long 		return ret;
10111713e81bSScott Long 	}
10121713e81bSScott Long 	return NULL;
10131713e81bSScott Long }
10141713e81bSScott Long 
10151713e81bSScott Long static void
10161713e81bSScott Long FreePRDTable(IAL_ADAPTER_T *pAdapter, PVOID PRDTable)
10171713e81bSScott Long {
10181713e81bSScott Long 	*(void**)PRDTable = pAdapter->pFreePRDLink;
10191713e81bSScott Long 	pAdapter->pFreePRDLink = PRDTable;
10201713e81bSScott Long }
10211713e81bSScott Long 
10221713e81bSScott Long extern PVDevice fGetFirstChild(PVDevice pLogical);
10231713e81bSScott Long extern void fResetBootMark(PVDevice pLogical);
10241713e81bSScott Long static void
10251713e81bSScott Long fRegisterVdevice(IAL_ADAPTER_T *pAdapter)
10261713e81bSScott Long {
10271713e81bSScott Long 	PVDevice pPhysical, pLogical;
10281713e81bSScott Long 	PVBus  pVBus;
10291713e81bSScott Long 	int i,j;
10301713e81bSScott Long 
10311713e81bSScott Long 	for(i=0;i<MV_SATA_CHANNELS_NUM;i++) {
10321713e81bSScott Long 		pPhysical = &(pAdapter->VDevices[i]);
10331713e81bSScott Long 		pLogical = pPhysical;
10341713e81bSScott Long 		while (pLogical->pParent) pLogical = pLogical->pParent;
10351713e81bSScott Long 		if (pLogical->vf_online==0) {
10361713e81bSScott Long 			pPhysical->vf_bootmark = pLogical->vf_bootmark = 0;
10371713e81bSScott Long 			continue;
10381713e81bSScott Long 		}
1039d2bd3ab9SScott Long 		if (pLogical->VDeviceType==VD_SPARE || pPhysical!=fGetFirstChild(pLogical))
10401713e81bSScott Long 			continue;
10411713e81bSScott Long 
10421713e81bSScott Long 		pVBus = &pAdapter->VBus;
1043d2bd3ab9SScott Long 		if(pVBus)
1044d2bd3ab9SScott Long 		{
10451713e81bSScott Long 			j=0;
1046d2bd3ab9SScott Long 			while(j<MAX_VDEVICE_PER_VBUS && pVBus->pVDevice[j]) j++;
10471713e81bSScott Long 			if(j<MAX_VDEVICE_PER_VBUS){
10481713e81bSScott Long 				pVBus->pVDevice[j] = pLogical;
10491713e81bSScott Long 				pLogical->pVBus = pVBus;
10501713e81bSScott Long 
10511713e81bSScott Long 				if (j>0 && pLogical->vf_bootmark) {
10521713e81bSScott Long 					if (pVBus->pVDevice[0]->vf_bootmark) {
10531713e81bSScott Long 						fResetBootMark(pLogical);
1054d2bd3ab9SScott Long 					}
1055d2bd3ab9SScott Long 					else {
1056d2bd3ab9SScott Long 						do { pVBus->pVDevice[j] = pVBus->pVDevice[j-1]; } while (--j);
10571713e81bSScott Long 						pVBus->pVDevice[0] = pLogical;
10581713e81bSScott Long 					}
10591713e81bSScott Long 				}
10601713e81bSScott Long 			}
10611713e81bSScott Long 		}
10621713e81bSScott Long 	}
10631713e81bSScott Long }
10641713e81bSScott Long 
10651713e81bSScott Long PVDevice
10661713e81bSScott Long GetSpareDisk(_VBUS_ARG PVDevice pArray)
10671713e81bSScott Long {
1068d2bd3ab9SScott Long 	IAL_ADAPTER_T *pAdapter = (IAL_ADAPTER_T *)pArray->pVBus->OsExt;
1069d2bd3ab9SScott Long 	ULONG capacity = LongDiv(pArray->VDeviceCapacity, pArray->u.array.bArnMember-1);
10701713e81bSScott Long 	ULONG thiscap, maxcap = MAX_LBA_T;
10711713e81bSScott Long 	PVDevice pVDevice, pFind = NULL;
10721713e81bSScott Long 	int i;
10731713e81bSScott Long 
1074d2bd3ab9SScott Long 	for(i=0;i<MV_SATA_CHANNELS_NUM;i++)
1075d2bd3ab9SScott Long 	{
10761713e81bSScott Long 		pVDevice = &pAdapter->VDevices[i];
10771713e81bSScott Long 		if(!pVDevice)
10781713e81bSScott Long 			continue;
1079d2bd3ab9SScott Long 		thiscap = pArray->vf_format_v2? pVDevice->u.disk.dDeRealCapacity : pVDevice->VDeviceCapacity;
10801713e81bSScott Long 		/* find the smallest usable spare disk */
10811713e81bSScott Long 		if (pVDevice->VDeviceType==VD_SPARE &&
1082d2bd3ab9SScott Long 			pVDevice->u.disk.df_on_line &&
1083d2bd3ab9SScott Long 			thiscap < maxcap &&
1084d2bd3ab9SScott Long 			thiscap >= capacity)
1085d2bd3ab9SScott Long 		{
10861713e81bSScott Long 				maxcap = pVDevice->VDeviceCapacity;
10871713e81bSScott Long 				pFind = pVDevice;
10881713e81bSScott Long 		}
10891713e81bSScott Long 	}
10901713e81bSScott Long 	return pFind;
10911713e81bSScott Long }
10921713e81bSScott Long 
10931713e81bSScott Long /******************************************************************
10941713e81bSScott Long  * IO ATA Command
10951713e81bSScott Long  *******************************************************************/
10961713e81bSScott Long int HPTLIBAPI
10971713e81bSScott Long fDeReadWrite(PDevice pDev, ULONG Lba, UCHAR Cmd, void *tmpBuffer)
10981713e81bSScott Long {
10991713e81bSScott Long 	return mvReadWrite(pDev->mv, Lba, Cmd, tmpBuffer);
11001713e81bSScott Long }
11011713e81bSScott Long 
11021713e81bSScott Long void HPTLIBAPI fDeSelectMode(PDevice pDev, UCHAR NewMode)
11031713e81bSScott Long {
1104d2bd3ab9SScott Long 	MV_SATA_CHANNEL *pSataChannel = pDev->mv;
1105d2bd3ab9SScott Long 	MV_SATA_ADAPTER *pSataAdapter = pSataChannel->mvSataAdapter;
1106d2bd3ab9SScott Long 	MV_U8 channelIndex = pSataChannel->channelNumber;
11071713e81bSScott Long 	UCHAR mvMode;
11081713e81bSScott Long 	/* 508x don't use MW-DMA? */
11091713e81bSScott Long 	if (NewMode>4 && NewMode<8) NewMode = 4;
11101713e81bSScott Long 	pDev->bDeModeSetting = NewMode;
11111713e81bSScott Long 	if (NewMode<=4)
11121713e81bSScott Long 		mvMode = MV_ATA_TRANSFER_PIO_0 + NewMode;
11131713e81bSScott Long 	else
11141713e81bSScott Long 		mvMode = MV_ATA_TRANSFER_UDMA_0 + (NewMode-8);
11151713e81bSScott Long 
11161713e81bSScott Long 	/*To fix 88i8030 bug*/
11171713e81bSScott Long 	if (mvMode > MV_ATA_TRANSFER_UDMA_0 && mvMode < MV_ATA_TRANSFER_UDMA_4)
11181713e81bSScott Long 		mvMode = MV_ATA_TRANSFER_UDMA_0;
11191713e81bSScott Long 
11201713e81bSScott Long 	mvSataDisableChannelDma(pSataAdapter, channelIndex);
11211713e81bSScott Long 	/* Flush pending commands */
11221713e81bSScott Long 	mvSataFlushDmaQueue (pSataAdapter, channelIndex, MV_FLUSH_TYPE_NONE);
11231713e81bSScott Long 
11241713e81bSScott Long 	if (mvStorageDevATASetFeatures(pSataAdapter, channelIndex,
1125d2bd3ab9SScott Long 								   MV_ATA_SET_FEATURES_TRANSFER,
1126d2bd3ab9SScott Long 								   mvMode, 0, 0, 0) == MV_FALSE)
1127d2bd3ab9SScott Long 	{
11281713e81bSScott Long 		KdPrint(("channel %d: Set Features failed\n", channelIndex));
11291713e81bSScott Long 	}
11301713e81bSScott Long 	/* Enable EDMA */
11311713e81bSScott Long 	if (mvSataEnableChannelDma(pSataAdapter, channelIndex) == MV_FALSE)
11321713e81bSScott Long 		KdPrint(("Failed to enable DMA, channel=%d", channelIndex));
11331713e81bSScott Long }
11341713e81bSScott Long 
11351713e81bSScott Long #ifdef SUPPORT_ARRAY
11361713e81bSScott Long #define IdeRegisterVDevice  fCheckArray
11371713e81bSScott Long #else
11381713e81bSScott Long void
11391713e81bSScott Long IdeRegisterVDevice(PDevice pDev)
11401713e81bSScott Long {
11411713e81bSScott Long 	PVDevice pVDev = Map2pVDevice(pDev);
11421713e81bSScott Long 
11431713e81bSScott Long 	pVDev->VDeviceType = pDev->df_atapi? VD_ATAPI :
11441713e81bSScott Long 						 pDev->df_removable_drive? VD_REMOVABLE : VD_SINGLE_DISK;
11451713e81bSScott Long 	pVDev->vf_online = 1;
11461713e81bSScott Long 	pVDev->VDeviceCapacity = pDev->dDeRealCapacity;
11471713e81bSScott Long 	pVDev->pfnSendCommand = pfnSendCommand[pVDev->VDeviceType];
11481713e81bSScott Long 	pVDev->pfnDeviceFailed = pfnDeviceFailed[pVDev->VDeviceType];
11491713e81bSScott Long }
11501713e81bSScott Long #endif
11511713e81bSScott Long 
1152d2bd3ab9SScott Long static __inline PBUS_DMAMAP
1153d2bd3ab9SScott Long dmamap_get(struct IALAdapter * pAdapter)
1154d2bd3ab9SScott Long {
1155d2bd3ab9SScott Long 	PBUS_DMAMAP	p = pAdapter->pbus_dmamap_list;
1156d2bd3ab9SScott Long 	if (p)
1157d2bd3ab9SScott Long 		pAdapter->pbus_dmamap_list = p-> next;
1158d2bd3ab9SScott Long 	return p;
1159d2bd3ab9SScott Long }
1160d2bd3ab9SScott Long 
1161d2bd3ab9SScott Long static __inline void
1162d2bd3ab9SScott Long dmamap_put(PBUS_DMAMAP p)
1163d2bd3ab9SScott Long {
1164d2bd3ab9SScott Long 	p->next = p->pAdapter->pbus_dmamap_list;
1165d2bd3ab9SScott Long 	p->pAdapter->pbus_dmamap_list = p;
1166d2bd3ab9SScott Long }
1167d2bd3ab9SScott Long 
1168d2bd3ab9SScott Long /*Since mtx not provide the initialize when declare, so we Final init here to initialize the global mtx*/
1169d2bd3ab9SScott Long #if __FreeBSD_version >= 500000
1170d2bd3ab9SScott Long static void hpt_init(void *dummy)
1171d2bd3ab9SScott Long {
1172d2bd3ab9SScott Long 	mtx_init(&driver_lock, "hptlock", NULL, MTX_SPIN);
1173d2bd3ab9SScott Long }
1174d2bd3ab9SScott Long SYSINIT(hptinit, SI_SUB_CONFIGURE, SI_ORDER_FIRST, hpt_init, NULL);
1175d2bd3ab9SScott Long #endif
1176d2bd3ab9SScott Long 
11771713e81bSScott Long static int num_adapters = 0;
11781713e81bSScott Long static int
11791713e81bSScott Long init_adapter(IAL_ADAPTER_T *pAdapter)
11801713e81bSScott Long {
11811713e81bSScott Long 	PVBus _vbus_p = &pAdapter->VBus;
11821713e81bSScott Long 	MV_SATA_ADAPTER *pMvSataAdapter;
1183d2bd3ab9SScott Long 	int i, channel, rid;
11841713e81bSScott Long 
11851713e81bSScott Long 	PVDevice pVDev;
11861713e81bSScott Long 
11871713e81bSScott Long 	intrmask_t oldspl = lock_driver();
11881713e81bSScott Long 
11891713e81bSScott Long 	pAdapter->next = 0;
11901713e81bSScott Long 
11911713e81bSScott Long 	if(gIal_Adapter == 0){
11921713e81bSScott Long 		gIal_Adapter = pAdapter;
11931713e81bSScott Long 		pCurAdapter = gIal_Adapter;
1194d2bd3ab9SScott Long 	}
1195d2bd3ab9SScott Long 	else {
11961713e81bSScott Long 		pCurAdapter->next = pAdapter;
11971713e81bSScott Long 		pCurAdapter = pAdapter;
11981713e81bSScott Long 	}
11991713e81bSScott Long 
12001713e81bSScott Long 	pAdapter->outstandingCommands = 0;
12011713e81bSScott Long 
12021713e81bSScott Long 	pMvSataAdapter = &(pAdapter->mvSataAdapter);
12031713e81bSScott Long 	_vbus_p->OsExt = (void *)pAdapter;
12041713e81bSScott Long 	pMvSataAdapter->IALData = pAdapter;
12051713e81bSScott Long 
1206d2bd3ab9SScott Long 	if (bus_dma_tag_create(NULL,/* parent */
1207d2bd3ab9SScott Long 			4,	/* alignment */
1208d2bd3ab9SScott Long 			BUS_SPACE_MAXADDR_32BIT+1, /* boundary */
1209d2bd3ab9SScott Long 			BUS_SPACE_MAXADDR,	/* lowaddr */
1210d2bd3ab9SScott Long 			BUS_SPACE_MAXADDR,	/* highaddr */
1211d2bd3ab9SScott Long 			NULL, NULL, 		/* filter, filterarg */
1212d2bd3ab9SScott Long 			PAGE_SIZE * (MAX_SG_DESCRIPTORS-1), /* maxsize */
1213d2bd3ab9SScott Long 			MAX_SG_DESCRIPTORS, /* nsegments */
1214d2bd3ab9SScott Long 			0x10000,	/* maxsegsize */
1215d2bd3ab9SScott Long 			BUS_DMA_WAITOK, 	/* flags */
1216d2bd3ab9SScott Long #if __FreeBSD_version>502000
1217d2bd3ab9SScott Long 			busdma_lock_mutex,	/* lockfunc */
1218d2bd3ab9SScott Long 			&driver_lock,		/* lockfuncarg */
1219d2bd3ab9SScott Long #endif
1220d2bd3ab9SScott Long 			&pAdapter->io_dma_parent /* tag */))
1221d2bd3ab9SScott Long 		{
1222d2bd3ab9SScott Long 			return ENXIO;;
12231713e81bSScott Long 	}
12241713e81bSScott Long 
12251713e81bSScott Long 
1226d2bd3ab9SScott Long 	if (hptmv_allocate_edma_queues(pAdapter))
1227d2bd3ab9SScott Long 	{
12281713e81bSScott Long 		MV_ERROR("RR182x: Failed to allocate memory for EDMA queues\n");
1229d2bd3ab9SScott Long 		unlock_driver(oldspl);
1230d2bd3ab9SScott Long 		return ENOMEM;
12311713e81bSScott Long 	}
12321713e81bSScott Long 
12331713e81bSScott Long 	/* also map EPROM address */
12341713e81bSScott Long 	rid = 0x10;
1235d2bd3ab9SScott Long 	if (!(pAdapter->mem_res = bus_alloc_resource(pAdapter->hpt_dev, SYS_RES_MEMORY, &rid,
1236d2bd3ab9SScott Long 			0, ~0, MV_SATA_PCI_BAR0_SPACE_SIZE+0x40000, RF_ACTIVE))
1237d2bd3ab9SScott Long 		||
1238d2bd3ab9SScott Long 		!(pMvSataAdapter->adapterIoBaseAddress = rman_get_virtual(pAdapter->mem_res)))
1239d2bd3ab9SScott Long 	{
12401713e81bSScott Long 		MV_ERROR("RR182x: Failed to remap memory space\n");
1241d2bd3ab9SScott Long 		hptmv_free_edma_queues(pAdapter);
1242d2bd3ab9SScott Long 		unlock_driver(oldspl);
1243d2bd3ab9SScott Long 		return ENXIO;
12441713e81bSScott Long 	}
1245d2bd3ab9SScott Long 	else
1246d2bd3ab9SScott Long 	{
1247d2bd3ab9SScott Long 		KdPrint(("RR182x: io base address 0x%p\n", pMvSataAdapter->adapterIoBaseAddress));
1248d2bd3ab9SScott Long 	}
12491713e81bSScott Long 
12501713e81bSScott Long 	pMvSataAdapter->adapterId = num_adapters++;
12511713e81bSScott Long 	/* get the revision ID */
1252d2bd3ab9SScott Long 	pMvSataAdapter->pciConfigRevisionId = pci_read_config(pAdapter->hpt_dev, PCIR_REVID, 1);
12531713e81bSScott Long 	pMvSataAdapter->pciConfigDeviceId = pci_get_device(pAdapter->hpt_dev);
12541713e81bSScott Long 
12551713e81bSScott Long 	/* init RR182x */
12561713e81bSScott Long 	pMvSataAdapter->intCoalThre[0]= 1;
12571713e81bSScott Long 	pMvSataAdapter->intCoalThre[1]= 1;
12581713e81bSScott Long 	pMvSataAdapter->intTimeThre[0] = 1;
12591713e81bSScott Long 	pMvSataAdapter->intTimeThre[1] = 1;
12601713e81bSScott Long 	pMvSataAdapter->pciCommand = 0x0107E371;
12611713e81bSScott Long 	pMvSataAdapter->pciSerrMask = 0xd77fe6ul;
12621713e81bSScott Long 	pMvSataAdapter->pciInterruptMask = 0xd77fe6ul;
12631713e81bSScott Long 	pMvSataAdapter->mvSataEventNotify = hptmv_event_notify;
12641713e81bSScott Long 
1265d2bd3ab9SScott Long 	if (mvSataInitAdapter(pMvSataAdapter) == MV_FALSE)
1266d2bd3ab9SScott Long 	{
12671713e81bSScott Long 		MV_ERROR("RR182x[%d]: core failed to initialize the adapter\n",
12681713e81bSScott Long 				 pMvSataAdapter->adapterId);
1269d2bd3ab9SScott Long unregister:
1270d2bd3ab9SScott Long 		bus_release_resource(pAdapter->hpt_dev, SYS_RES_MEMORY, rid, pAdapter->mem_res);
1271d2bd3ab9SScott Long 		hptmv_free_edma_queues(pAdapter);
1272d2bd3ab9SScott Long 		unlock_driver(oldspl);
1273d2bd3ab9SScott Long 		return ENXIO;
12741713e81bSScott Long 	}
12751713e81bSScott Long 	pAdapter->ver_601 = pMvSataAdapter->pcbVersion;
12761713e81bSScott Long 
12771713e81bSScott Long #ifndef FOR_DEMO
12781713e81bSScott Long 	set_fail_leds(pMvSataAdapter, 0);
12791713e81bSScott Long #endif
12801713e81bSScott Long 
12811713e81bSScott Long 	/* setup command blocks */
12821713e81bSScott Long 	KdPrint(("Allocate command blocks\n"));
12831713e81bSScott Long 	_vbus_(pFreeCommands) = 0;
1284d2bd3ab9SScott Long 	pAdapter->pCommandBlocks =
1285d2bd3ab9SScott Long 		malloc(sizeof(struct _Command) * MAX_COMMAND_BLOCKS_FOR_EACH_VBUS, M_DEVBUF, M_NOWAIT);
12867d9aed9cSScott Long 	KdPrint(("pCommandBlocks:%p\n",pAdapter->pCommandBlocks));
1287d2bd3ab9SScott Long 	if (!pAdapter->pCommandBlocks) {
1288d2bd3ab9SScott Long 		MV_ERROR("insufficient memory\n");
1289d2bd3ab9SScott Long 		goto unregister;
12901713e81bSScott Long 	}
12911713e81bSScott Long 
1292d2bd3ab9SScott Long 	for (i=0; i<MAX_COMMAND_BLOCKS_FOR_EACH_VBUS; i++) {
1293d2bd3ab9SScott Long 		FreeCommand(_VBUS_P &(pAdapter->pCommandBlocks[i]));
1294d2bd3ab9SScott Long 	}
1295d2bd3ab9SScott Long 
1296d2bd3ab9SScott Long 	/*Set up the bus_dmamap*/
1297d2bd3ab9SScott Long 	pAdapter->pbus_dmamap = (PBUS_DMAMAP)malloc (sizeof(struct _BUS_DMAMAP) * MAX_QUEUE_COMM, M_DEVBUF, M_NOWAIT);
1298d2bd3ab9SScott Long 	if(!pAdapter->pbus_dmamap) {
1299d2bd3ab9SScott Long 		MV_ERROR("insufficient memory\n");
1300d2bd3ab9SScott Long 		free(pAdapter->pCommandBlocks, M_DEVBUF);
1301d2bd3ab9SScott Long 		goto unregister;
1302d2bd3ab9SScott Long 	}
1303d2bd3ab9SScott Long 
1304d2bd3ab9SScott Long 	memset((void *)pAdapter->pbus_dmamap, 0, sizeof(struct _BUS_DMAMAP) * MAX_QUEUE_COMM);
1305d2bd3ab9SScott Long 	pAdapter->pbus_dmamap_list = 0;
1306d2bd3ab9SScott Long 	for (i=0; i < MAX_QUEUE_COMM; i++) {
1307d2bd3ab9SScott Long 		PBUS_DMAMAP  pmap = &(pAdapter->pbus_dmamap[i]);
1308d2bd3ab9SScott Long 		pmap->pAdapter = pAdapter;
1309d2bd3ab9SScott Long 		dmamap_put(pmap);
1310d2bd3ab9SScott Long 
1311d2bd3ab9SScott Long 		if(bus_dmamap_create(pAdapter->io_dma_parent, 0, &pmap->dma_map)) {
1312d2bd3ab9SScott Long 			MV_ERROR("Can not allocate dma map\n");
1313d2bd3ab9SScott Long 			free(pAdapter->pCommandBlocks, M_DEVBUF);
1314d2bd3ab9SScott Long 			free(pAdapter->pbus_dmamap, M_DEVBUF);
1315d2bd3ab9SScott Long 			goto unregister;
1316d2bd3ab9SScott Long 		}
1317d2bd3ab9SScott Long 	}
13181713e81bSScott Long 	/* setup PRD Tables */
13191713e81bSScott Long 	KdPrint(("Allocate PRD Tables\n"));
13201713e81bSScott Long 	pAdapter->pFreePRDLink = 0;
13211713e81bSScott Long 
1322d2bd3ab9SScott Long 	pAdapter->prdTableAddr = (PUCHAR)contigmalloc(
1323d2bd3ab9SScott Long 		(PRD_ENTRIES_SIZE*PRD_TABLES_FOR_VBUS + 32), M_DEVBUF, M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0ul);
13241713e81bSScott Long 
13257d9aed9cSScott Long 	KdPrint(("prdTableAddr:%p\n",pAdapter->prdTableAddr));
13261713e81bSScott Long 	if (!pAdapter->prdTableAddr) {
13271713e81bSScott Long 		MV_ERROR("insufficient PRD Tables\n");
13281713e81bSScott Long 		goto unregister;
13291713e81bSScott Long 	}
1330d2bd3ab9SScott Long 	pAdapter->prdTableAlignedAddr = (PUCHAR)(((ULONG_PTR)pAdapter->prdTableAddr + 0x1f) & ~(ULONG_PTR)0x1fL);
1331d2bd3ab9SScott Long 	{
1332d2bd3ab9SScott Long 		PUCHAR PRDTable = pAdapter->prdTableAlignedAddr;
1333d2bd3ab9SScott Long 		for (i=0; i<PRD_TABLES_FOR_VBUS; i++)
1334d2bd3ab9SScott Long 		{
1335d2bd3ab9SScott Long /*			KdPrint(("i=%d,pAdapter->pFreePRDLink=%p\n",i,pAdapter->pFreePRDLink)); */
13361713e81bSScott Long 			FreePRDTable(pAdapter, PRDTable);
13371713e81bSScott Long 			PRDTable += PRD_ENTRIES_SIZE;
13381713e81bSScott Long 		}
1339d2bd3ab9SScott Long 	}
13401713e81bSScott Long 
13411713e81bSScott Long 	/* enable the adapter interrupts */
13421713e81bSScott Long 
13431713e81bSScott Long 	/* configure and start the connected channels*/
1344d2bd3ab9SScott Long 	for (channel = 0; channel < MV_SATA_CHANNELS_NUM; channel++)
1345d2bd3ab9SScott Long 	{
13461713e81bSScott Long 		pAdapter->mvChannel[channel].online = MV_FALSE;
13471713e81bSScott Long 		if (mvSataIsStorageDeviceConnected(pMvSataAdapter, channel)
1348d2bd3ab9SScott Long 			== MV_TRUE)
1349d2bd3ab9SScott Long 		{
13501713e81bSScott Long 			KdPrint(("RR182x[%d]: channel %d is connected\n",
13511713e81bSScott Long 					  pMvSataAdapter->adapterId, channel));
13521713e81bSScott Long 
1353d2bd3ab9SScott Long 			if (hptmv_init_channel(pAdapter, channel) == 0)
1354d2bd3ab9SScott Long 			{
1355d2bd3ab9SScott Long 				if (mvSataConfigureChannel(pMvSataAdapter, channel) == MV_FALSE)
1356d2bd3ab9SScott Long 				{
1357d2bd3ab9SScott Long 					MV_ERROR("RR182x[%d]: Failed to configure channel"
1358d2bd3ab9SScott Long 							 " %d\n",pMvSataAdapter->adapterId, channel);
13591713e81bSScott Long 					hptmv_free_channel(pAdapter, channel);
13601713e81bSScott Long 				}
1361d2bd3ab9SScott Long 				else
1362d2bd3ab9SScott Long 				{
1363d2bd3ab9SScott Long 					if (start_channel(pAdapter, channel))
1364d2bd3ab9SScott Long 					{
13651713e81bSScott Long 						MV_ERROR("RR182x[%d]: Failed to start channel,"
13661713e81bSScott Long 								 " channel=%d\n",pMvSataAdapter->adapterId,
13671713e81bSScott Long 								 channel);
13681713e81bSScott Long 						hptmv_free_channel(pAdapter, channel);
13691713e81bSScott Long 					}
13701713e81bSScott Long 					pAdapter->mvChannel[channel].online = MV_TRUE;
1371d2bd3ab9SScott Long 					/*  mvSataChannelSetEdmaLoopBackMode(pMvSataAdapter,
1372d2bd3ab9SScott Long 													   channel,
1373d2bd3ab9SScott Long 													   MV_TRUE);*/
1374d2bd3ab9SScott Long 				}
1375d2bd3ab9SScott Long 			}
13761713e81bSScott Long 		}
13771713e81bSScott Long 		KdPrint(("pAdapter->mvChannel[channel].online:%x, channel:%d\n",
13781713e81bSScott Long 			pAdapter->mvChannel[channel].online, channel));
13791713e81bSScott Long 	}
13801713e81bSScott Long 
13811713e81bSScott Long #ifdef SUPPORT_ARRAY
13821713e81bSScott Long 	for(i = MAX_ARRAY_DEVICE - 1; i >= 0; i--) {
13831713e81bSScott Long 		pVDev = ArrayTables(i);
13841713e81bSScott Long 		mArFreeArrayTable(pVDev);
13851713e81bSScott Long 	}
13861713e81bSScott Long #endif
13871713e81bSScott Long 
13881713e81bSScott Long 	KdPrint(("Initialize Devices\n"));
13891713e81bSScott Long 	for (channel = 0; channel < MV_SATA_CHANNELS_NUM; channel++) {
1390d2bd3ab9SScott Long 		MV_SATA_CHANNEL *pMvSataChannel = pMvSataAdapter->sataChannel[channel];
13911713e81bSScott Long 		if (pMvSataChannel) {
13921713e81bSScott Long 			init_vdev_params(pAdapter, channel);
13931713e81bSScott Long 			IdeRegisterVDevice(&pAdapter->VDevices[channel].u.disk);
13941713e81bSScott Long 		}
13951713e81bSScott Long 	}
13961713e81bSScott Long #ifdef SUPPORT_ARRAY
13971713e81bSScott Long 	CheckArrayCritical(_VBUS_P0);
13981713e81bSScott Long #endif
13991713e81bSScott Long 	_vbus_p->nInstances = 1;
14001713e81bSScott Long 	fRegisterVdevice(pAdapter);
14011713e81bSScott Long 
14021713e81bSScott Long 	for (channel=0;channel<MV_SATA_CHANNELS_NUM;channel++) {
14031713e81bSScott Long 		pVDev = _vbus_p->pVDevice[channel];
14041713e81bSScott Long 		if (pVDev && pVDev->vf_online)
14051713e81bSScott Long 			fCheckBootable(pVDev);
14061713e81bSScott Long 	}
14071713e81bSScott Long 
14081713e81bSScott Long #if defined(SUPPORT_ARRAY) && defined(_RAID5N_)
14091713e81bSScott Long 	init_raid5_memory(_VBUS_P0);
14101713e81bSScott Long 	_vbus_(r5).enable_write_back = 1;
1411d2bd3ab9SScott Long 	printf("RR182x: RAID5 write-back %s\n", _vbus_(r5).enable_write_back? "enabled" : "disabled");
14121713e81bSScott Long #endif
14131713e81bSScott Long 
14141713e81bSScott Long 	mvSataUnmaskAdapterInterrupt(pMvSataAdapter);
14151713e81bSScott Long 	unlock_driver(oldspl);
14161713e81bSScott Long 	return 0;
14171713e81bSScott Long }
14181713e81bSScott Long 
14191713e81bSScott Long int
14201713e81bSScott Long MvSataResetChannel(MV_SATA_ADAPTER *pMvSataAdapter, MV_U8 channel)
14211713e81bSScott Long {
14221713e81bSScott Long 	IAL_ADAPTER_T   *pAdapter = (IAL_ADAPTER_T *)pMvSataAdapter->IALData;
14231713e81bSScott Long 
14241713e81bSScott Long 	mvSataDisableChannelDma(pMvSataAdapter, channel);
14251713e81bSScott Long 	/* Flush pending commands */
14261713e81bSScott Long 	mvSataFlushDmaQueue (pMvSataAdapter, channel, MV_FLUSH_TYPE_CALLBACK);
14271713e81bSScott Long 
14281713e81bSScott Long 	/* Software reset channel */
1429d2bd3ab9SScott Long 	if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channel) == MV_FALSE)
1430d2bd3ab9SScott Long 	{
14311713e81bSScott Long 		MV_ERROR("RR182x [%d,%d]: failed to perform Software reset\n",
14321713e81bSScott Long 				 pMvSataAdapter->adapterId, channel);
1433d2bd3ab9SScott Long 		hptmv_free_channel(pAdapter, channel);
14341713e81bSScott Long 		return -1;
14351713e81bSScott Long 	}
14361713e81bSScott Long 
14371713e81bSScott Long 	/* Hardware reset channel */
1438d2bd3ab9SScott Long 	if (mvSataChannelHardReset(pMvSataAdapter, channel)== MV_FALSE)
1439d2bd3ab9SScott Long 	{
1440d2bd3ab9SScott Long 		MV_ERROR("RR182x [%d,%d] Failed to Hard reser the SATA channel\n",
1441d2bd3ab9SScott Long 				 pMvSataAdapter->adapterId, channel);
14421713e81bSScott Long 		hptmv_free_channel(pAdapter, channel);
14431713e81bSScott Long 		return -1;
14441713e81bSScott Long 	}
14451713e81bSScott Long 
1446d2bd3ab9SScott Long 	if (mvSataIsStorageDeviceConnected(pMvSataAdapter, channel) == MV_FALSE)
1447d2bd3ab9SScott Long 	{
14481713e81bSScott Long 		 MV_ERROR("RR182x [%d,%d] Failed to Connect Device\n",
14491713e81bSScott Long 				 pMvSataAdapter->adapterId, channel);
14501713e81bSScott Long 		hptmv_free_channel(pAdapter, channel);
14511713e81bSScott Long 		return -1;
1452d2bd3ab9SScott Long 	}else
1453d2bd3ab9SScott Long 	{
1454d2bd3ab9SScott Long 		MV_ERROR("channel %d: perform recalibrate command", channel);
1455d2bd3ab9SScott Long 		if (!mvStorageDevATAExecuteNonUDMACommand(pMvSataAdapter, channel,
1456d2bd3ab9SScott Long 								MV_NON_UDMA_PROTOCOL_NON_DATA,
1457d2bd3ab9SScott Long 								MV_FALSE,
1458d2bd3ab9SScott Long 								NULL,	 /* pBuffer*/
1459d2bd3ab9SScott Long 								0,		 /* count  */
1460d2bd3ab9SScott Long 								0,		/*features*/
1461d2bd3ab9SScott Long 										/* sectorCount */
1462d2bd3ab9SScott Long 								0,
1463d2bd3ab9SScott Long 								0,	/* lbaLow */
1464d2bd3ab9SScott Long 								0,	/* lbaMid */
1465d2bd3ab9SScott Long 									/* lbaHigh */
1466d2bd3ab9SScott Long 								0,
1467d2bd3ab9SScott Long 								0,		/* device */
1468d2bd3ab9SScott Long 										/* command */
1469d2bd3ab9SScott Long 								0x10))
1470d2bd3ab9SScott Long 			MV_ERROR("channel %d: recalibrate failed", channel);
1471d2bd3ab9SScott Long 
14721713e81bSScott Long 		/* Set transfer mode */
14731713e81bSScott Long 		if((mvStorageDevATASetFeatures(pMvSataAdapter, channel,
1474d2bd3ab9SScott Long 						MV_ATA_SET_FEATURES_TRANSFER,
1475d2bd3ab9SScott Long 						MV_ATA_TRANSFER_PIO_SLOW, 0, 0, 0) == MV_FALSE) ||
14761713e81bSScott Long 			(mvStorageDevATASetFeatures(pMvSataAdapter, channel,
14771713e81bSScott Long 						MV_ATA_SET_FEATURES_TRANSFER,
1478d2bd3ab9SScott Long 						pAdapter->mvChannel[channel].maxPioModeSupported, 0, 0, 0) == MV_FALSE) ||
1479d2bd3ab9SScott Long 			(mvStorageDevATASetFeatures(pMvSataAdapter, channel,
1480d2bd3ab9SScott Long 						MV_ATA_SET_FEATURES_TRANSFER,
1481d2bd3ab9SScott Long 						pAdapter->mvChannel[channel].maxUltraDmaModeSupported, 0, 0, 0) == MV_FALSE) )
1482d2bd3ab9SScott Long 		{
14831713e81bSScott Long 			MV_ERROR("channel %d: Set Features failed", channel);
14841713e81bSScott Long 			hptmv_free_channel(pAdapter, channel);
14851713e81bSScott Long 			return -1;
14861713e81bSScott Long 		}
14871713e81bSScott Long 		/* Enable EDMA */
1488d2bd3ab9SScott Long 		if (mvSataEnableChannelDma(pMvSataAdapter, channel) == MV_FALSE)
1489d2bd3ab9SScott Long 		{
14901713e81bSScott Long 			MV_ERROR("Failed to enable DMA, channel=%d", channel);
14911713e81bSScott Long 			hptmv_free_channel(pAdapter, channel);
14921713e81bSScott Long 			return -1;
14931713e81bSScott Long 		}
14941713e81bSScott Long 	}
14951713e81bSScott Long 	return 0;
14961713e81bSScott Long }
14971713e81bSScott Long 
14981713e81bSScott Long static int
14991713e81bSScott Long fResetActiveCommands(PVBus _vbus_p)
15001713e81bSScott Long {
1501d2bd3ab9SScott Long 	MV_SATA_ADAPTER *pMvSataAdapter = &((IAL_ADAPTER_T *)_vbus_p->OsExt)->mvSataAdapter;
15021713e81bSScott Long 	MV_U8 channel;
15031713e81bSScott Long 	for (channel=0;channel< MV_SATA_CHANNELS_NUM;channel++) {
1504d2bd3ab9SScott Long 		if (pMvSataAdapter->sataChannel[channel] && pMvSataAdapter->sataChannel[channel]->outstandingCommands)
1505d2bd3ab9SScott Long 			MvSataResetChannel(pMvSataAdapter,channel);
15061713e81bSScott Long 	}
15071713e81bSScott Long 	return 0;
15081713e81bSScott Long }
15091713e81bSScott Long 
1510d2bd3ab9SScott Long void fCompleteAllCommandsSynchronously(PVBus _vbus_p)
15111713e81bSScott Long {
15121713e81bSScott Long 	UINT cont;
15131713e81bSScott Long 	ULONG ticks = 0;
15141713e81bSScott Long 	MV_U8 channel;
1515d2bd3ab9SScott Long 	MV_SATA_ADAPTER *pMvSataAdapter = &((IAL_ADAPTER_T *)_vbus_p->OsExt)->mvSataAdapter;
15161713e81bSScott Long 	MV_SATA_CHANNEL *pMvSataChannel;
15171713e81bSScott Long 
15181713e81bSScott Long 	do {
15191713e81bSScott Long check_cmds:
15201713e81bSScott Long 		cont = 0;
15211713e81bSScott Long 		CheckPendingCall(_VBUS_P0);
15221713e81bSScott Long #ifdef _RAID5N_
15231713e81bSScott Long 		dataxfer_poll();
15241713e81bSScott Long 		xor_poll();
15251713e81bSScott Long #endif
15261713e81bSScott Long 		for (channel=0;channel< MV_SATA_CHANNELS_NUM;channel++) {
15271713e81bSScott Long 			pMvSataChannel = pMvSataAdapter->sataChannel[channel];
1528d2bd3ab9SScott Long 			if (pMvSataChannel && pMvSataChannel->outstandingCommands)
1529d2bd3ab9SScott Long 			{
15301713e81bSScott Long 				while (pMvSataChannel->outstandingCommands) {
1531d2bd3ab9SScott Long 					if (!mvSataInterruptServiceRoutine(pMvSataAdapter)) {
15321713e81bSScott Long 						StallExec(1000);
15331713e81bSScott Long 						if (ticks++ > 3000) {
1534d2bd3ab9SScott Long 							MvSataResetChannel(pMvSataAdapter,channel);
15351713e81bSScott Long 							goto check_cmds;
15361713e81bSScott Long 						}
1537d2bd3ab9SScott Long 					}
1538d2bd3ab9SScott Long 					else
15391713e81bSScott Long 						ticks = 0;
15401713e81bSScott Long 				}
15411713e81bSScott Long 				cont = 1;
15421713e81bSScott Long 			}
15431713e81bSScott Long 		}
15441713e81bSScott Long 	} while (cont);
15451713e81bSScott Long }
15461713e81bSScott Long 
15471713e81bSScott Long void
15481713e81bSScott Long fResetVBus(_VBUS_ARG0)
15491713e81bSScott Long {
15507d9aed9cSScott Long 	KdPrint(("fMvResetBus(%p)", _vbus_p));
15511713e81bSScott Long 
15521713e81bSScott Long 	/* some commands may already finished. */
15531713e81bSScott Long 	CheckPendingCall(_VBUS_P0);
15541713e81bSScott Long 
15551713e81bSScott Long 	fResetActiveCommands(_vbus_p);
15561713e81bSScott Long 	/*
15571713e81bSScott Long 	 * the other pending commands may still be finished successfully.
15581713e81bSScott Long 	 */
15591713e81bSScott Long 	fCompleteAllCommandsSynchronously(_vbus_p);
15601713e81bSScott Long 
15611713e81bSScott Long 	/* Now there should be no pending commands. No more action needed. */
15621713e81bSScott Long 	CheckIdleCall(_VBUS_P0);
15631713e81bSScott Long 
15641713e81bSScott Long 	KdPrint(("fMvResetBus() done"));
15651713e81bSScott Long }
15661713e81bSScott Long 
1567d2bd3ab9SScott Long /*No rescan function*/
15681713e81bSScott Long void
15691713e81bSScott Long fRescanAllDevice(_VBUS_ARG0)
15701713e81bSScott Long {
15711713e81bSScott Long }
15721713e81bSScott Long 
15731713e81bSScott Long static MV_BOOLEAN
1574d2bd3ab9SScott Long CommandCompletionCB(MV_SATA_ADAPTER *pMvSataAdapter,
1575d2bd3ab9SScott Long 					MV_U8 channelNum,
1576d2bd3ab9SScott Long 					MV_COMPLETION_TYPE comp_type,
1577d2bd3ab9SScott Long 					MV_VOID_PTR commandId,
1578d2bd3ab9SScott Long 					MV_U16 responseFlags,
1579d2bd3ab9SScott Long 					MV_U32 timeStamp,
1580d2bd3ab9SScott Long 					MV_STORAGE_DEVICE_REGISTERS *registerStruct)
15811713e81bSScott Long {
15821713e81bSScott Long 	PCommand pCmd = (PCommand) commandId;
15831713e81bSScott Long 	_VBUS_INST(pCmd->pVDevice->pVBus)
15841713e81bSScott Long 
15851713e81bSScott Long 	if (pCmd->uScratch.sata_param.prdAddr)
1586d2bd3ab9SScott Long 		FreePRDTable(pMvSataAdapter->IALData,pCmd->uScratch.sata_param.prdAddr);
15871713e81bSScott Long 
1588d2bd3ab9SScott Long 	switch (comp_type)
1589d2bd3ab9SScott Long 	{
15901713e81bSScott Long 	case MV_COMPLETION_TYPE_NORMAL:
15911713e81bSScott Long 		pCmd->Result = RETURN_SUCCESS;
15921713e81bSScott Long 		break;
15931713e81bSScott Long 	case MV_COMPLETION_TYPE_ABORT:
15941713e81bSScott Long 		pCmd->Result = RETURN_BUS_RESET;
15951713e81bSScott Long 		break;
15961713e81bSScott Long 	case MV_COMPLETION_TYPE_ERROR:
1597d2bd3ab9SScott Long 		 MV_ERROR("IAL: COMPLETION ERROR, adapter %d, channel %d, flags=%x\n",
1598d2bd3ab9SScott Long 				 pMvSataAdapter->adapterId, channelNum, responseFlags);
15991713e81bSScott Long 
16001713e81bSScott Long 		if (responseFlags & 4) {
1601d2bd3ab9SScott Long 			MV_ERROR("ATA regs: error %x, sector count %x, LBA low %x, LBA mid %x,"
1602d2bd3ab9SScott Long 				" LBA high %x, device %x, status %x\n",
1603d2bd3ab9SScott Long 				registerStruct->errorRegister,
16041713e81bSScott Long 				registerStruct->sectorCountRegister,
16051713e81bSScott Long 				registerStruct->lbaLowRegister,
16061713e81bSScott Long 				registerStruct->lbaMidRegister,
16071713e81bSScott Long 				registerStruct->lbaHighRegister,
16081713e81bSScott Long 				registerStruct->deviceRegister,
16091713e81bSScott Long 				registerStruct->statusRegister);
16101713e81bSScott Long 		}
1611d2bd3ab9SScott Long 		/*We can't do handleEdmaError directly here, because CommandCompletionCB is called by
1612d2bd3ab9SScott Long 		 * mv's ISR, if we retry the command, than the internel data structure may be destroyed*/
16131713e81bSScott Long 		pCmd->uScratch.sata_param.responseFlags = responseFlags;
1614d2bd3ab9SScott Long 		pCmd->uScratch.sata_param.bIdeStatus = registerStruct->statusRegister;
1615d2bd3ab9SScott Long 		pCmd->uScratch.sata_param.errorRegister = registerStruct->errorRegister;
16161713e81bSScott Long 		pCmd->pVDevice->u.disk.QueueLength--;
16171713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)handleEdmaError,pCmd);
16181713e81bSScott Long 		return TRUE;
16191713e81bSScott Long 
16201713e81bSScott Long 	default:
16211713e81bSScott Long 		MV_ERROR(" Unknown completion type (%d)\n", comp_type);
16221713e81bSScott Long 		return MV_FALSE;
16231713e81bSScott Long 	}
16241713e81bSScott Long 
1625d2bd3ab9SScott Long 	if (pCmd->uCmd.Ide.Command == IDE_COMMAND_VERIFY && pCmd->uScratch.sata_param.cmd_priv > 1) {
16261713e81bSScott Long 		pCmd->uScratch.sata_param.cmd_priv --;
16271713e81bSScott Long 		return TRUE;
16281713e81bSScott Long 	}
16291713e81bSScott Long 	pCmd->pVDevice->u.disk.QueueLength--;
16301713e81bSScott Long 	CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
16311713e81bSScott Long 	return TRUE;
16321713e81bSScott Long }
16331713e81bSScott Long 
16341713e81bSScott Long void
16351713e81bSScott Long fDeviceSendCommand(_VBUS_ARG PCommand pCmd)
16361713e81bSScott Long {
16371713e81bSScott Long 	MV_SATA_EDMA_PRD_ENTRY  *pPRDTable = 0;
16381713e81bSScott Long 	MV_SATA_ADAPTER *pMvSataAdapter;
16391713e81bSScott Long 	MV_SATA_CHANNEL *pMvSataChannel;
1640d2bd3ab9SScott Long 	PVDevice pVDevice = pCmd->pVDevice;
1641d2bd3ab9SScott Long 	PDevice  pDevice = &pVDevice->u.disk;
1642d2bd3ab9SScott Long 	ULONG    Lba = pCmd->uCmd.Ide.Lba;
1643d2bd3ab9SScott Long 	USHORT   nSector = pCmd->uCmd.Ide.nSectors;
1644d2bd3ab9SScott Long 
16451713e81bSScott Long 	MV_QUEUE_COMMAND_RESULT result;
16461713e81bSScott Long 	MV_QUEUE_COMMAND_INFO commandInfo;
1647d2bd3ab9SScott Long 	MV_UDMA_COMMAND_PARAMS  *pUdmaParams = &commandInfo.commandParams.udmaCommand;
1648d2bd3ab9SScott Long 	MV_NONE_UDMA_COMMAND_PARAMS *pNoUdmaParams = &commandInfo.commandParams.NoneUdmaCommand;
1649d2bd3ab9SScott Long 
16501713e81bSScott Long 	MV_BOOLEAN is48bit = MV_FALSE;
16511713e81bSScott Long 	MV_U8      channel;
16521713e81bSScott Long 	int        i=0;
16531713e81bSScott Long 
16541713e81bSScott Long 	DECLARE_BUFFER(FPSCAT_GATH, tmpSg);
16551713e81bSScott Long 
16561713e81bSScott Long 	if (!pDevice->df_on_line) {
16571713e81bSScott Long 		MV_ERROR("Device is offline");
16581713e81bSScott Long 		pCmd->Result = RETURN_BAD_DEVICE;
16591713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
16601713e81bSScott Long 		return;
16611713e81bSScott Long 	}
16621713e81bSScott Long 
16631713e81bSScott Long 	pDevice->HeadPosition = pCmd->uCmd.Ide.Lba + pCmd->uCmd.Ide.nSectors;
16641713e81bSScott Long 	pMvSataChannel = pDevice->mv;
16651713e81bSScott Long 	pMvSataAdapter = pMvSataChannel->mvSataAdapter;
16661713e81bSScott Long 	channel = pMvSataChannel->channelNumber;
16671713e81bSScott Long 
1668d2bd3ab9SScott Long 	/* old RAID0 has hidden lba. Remember to clear dDeHiddenLba when delete array! */
16691713e81bSScott Long 	Lba += pDevice->dDeHiddenLba;
16701713e81bSScott Long 	/* check LBA */
16711713e81bSScott Long 	if (Lba+nSector-1 > pDevice->dDeRealCapacity) {
16721713e81bSScott Long 		pCmd->Result = RETURN_INVALID_REQUEST;
16731713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
16741713e81bSScott Long 		return;
16751713e81bSScott Long 	}
16761713e81bSScott Long 
16771713e81bSScott Long 	if(Lba & 0xF0000000){
16781713e81bSScott Long 		is48bit = MV_TRUE;
16791713e81bSScott Long 	}
16801713e81bSScott Long 
1681d2bd3ab9SScott Long 	switch (pCmd->uCmd.Ide.Command)
1682d2bd3ab9SScott Long 	{
16831713e81bSScott Long 	case IDE_COMMAND_READ:
16841713e81bSScott Long 	case IDE_COMMAND_WRITE:
16851713e81bSScott Long 		if (pDevice->bDeModeSetting<8) goto pio;
16861713e81bSScott Long 
16871713e81bSScott Long 		commandInfo.type = MV_QUEUED_COMMAND_TYPE_UDMA;
16881713e81bSScott Long 		pUdmaParams->isEXT = is48bit;
16891713e81bSScott Long 		pUdmaParams->numOfSectors = nSector;
16901713e81bSScott Long 		pUdmaParams->lowLBAAddress = Lba;
16911713e81bSScott Long 		pUdmaParams->highLBAAddress = 0;
16921713e81bSScott Long 		pUdmaParams->prdHighAddr = 0;
16931713e81bSScott Long 		pUdmaParams->callBack = CommandCompletionCB;
16941713e81bSScott Long 		pUdmaParams->commandId = (MV_VOID_PTR )pCmd;
16951713e81bSScott Long 		if(pCmd->uCmd.Ide.Command == IDE_COMMAND_READ)
16961713e81bSScott Long 			pUdmaParams->readWrite = MV_UDMA_TYPE_READ;
16971713e81bSScott Long 		else
16981713e81bSScott Long 			pUdmaParams->readWrite = MV_UDMA_TYPE_WRITE;
16991713e81bSScott Long 
17001713e81bSScott Long 		if (pCmd->pSgTable && pCmd->cf_physical_sg) {
17011713e81bSScott Long 			FPSCAT_GATH sg1=tmpSg, sg2=pCmd->pSgTable;
1702d2bd3ab9SScott Long 			do { *sg1++=*sg2; } while ((sg2++->wSgFlag & SG_FLAG_EOT)==0);
1703d2bd3ab9SScott Long 		}
1704d2bd3ab9SScott Long 		else {
1705d2bd3ab9SScott Long 			if (!pCmd->pfnBuildSgl || !pCmd->pfnBuildSgl(_VBUS_P pCmd, tmpSg, 0)) {
17061713e81bSScott Long pio:
17071713e81bSScott Long 				mvSataDisableChannelDma(pMvSataAdapter, channel);
1708d2bd3ab9SScott Long 				mvSataFlushDmaQueue(pMvSataAdapter, channel, MV_FLUSH_TYPE_CALLBACK);
17091713e81bSScott Long 
17101713e81bSScott Long 				if (pCmd->pSgTable && pCmd->cf_physical_sg==0) {
17111713e81bSScott Long 					FPSCAT_GATH sg1=tmpSg, sg2=pCmd->pSgTable;
1712d2bd3ab9SScott Long 					do { *sg1++=*sg2; } while ((sg2++->wSgFlag & SG_FLAG_EOT)==0);
1713d2bd3ab9SScott Long 				}
1714d2bd3ab9SScott Long 				else {
1715d2bd3ab9SScott Long 					if (!pCmd->pfnBuildSgl || !pCmd->pfnBuildSgl(_VBUS_P pCmd, tmpSg, 1)) {
17161713e81bSScott Long 						pCmd->Result = RETURN_NEED_LOGICAL_SG;
17171713e81bSScott Long 						goto finish_cmd;
17181713e81bSScott Long 					}
1719d2bd3ab9SScott Long 				}
17201713e81bSScott Long 
17211713e81bSScott Long 				do {
1722d2bd3ab9SScott Long 					ULONG size = tmpSg->wSgSize? tmpSg->wSgSize : 0x10000;
17231713e81bSScott Long 					ULONG_PTR addr = tmpSg->dSgAddress;
17241713e81bSScott Long 					if (size & 0x1ff) {
17251713e81bSScott Long 						pCmd->Result = RETURN_INVALID_REQUEST;
17261713e81bSScott Long 						goto finish_cmd;
17271713e81bSScott Long 					}
1728d2bd3ab9SScott Long 					if (mvStorageDevATAExecuteNonUDMACommand(pMvSataAdapter, channel,
1729d2bd3ab9SScott Long 						(pCmd->cf_data_out)?MV_NON_UDMA_PROTOCOL_PIO_DATA_OUT:MV_NON_UDMA_PROTOCOL_PIO_DATA_IN,
1730d2bd3ab9SScott Long 						is48bit,
1731d2bd3ab9SScott Long 						(MV_U16_PTR)addr,
17321713e81bSScott Long 						size >> 1,	/* count       */
17331713e81bSScott Long 						0,		/* features  N/A  */
17341713e81bSScott Long 						(MV_U16)(size>>9),	/*sector count*/
1735d2bd3ab9SScott Long 						(MV_U16)(  (is48bit? (MV_U16)((Lba >> 16) & 0xFF00) : 0 )  | (UCHAR)(Lba & 0xFF) ), /*lbalow*/
17361713e81bSScott Long 						(MV_U16)((Lba >> 8) & 0xFF), /* lbaMid      */
1737d2bd3ab9SScott Long 						(MV_U16)((Lba >> 16) & 0xFF),/* lbaHigh     */
1738d2bd3ab9SScott Long 						(MV_U8)(0x40 | (is48bit ? 0 : (UCHAR)(Lba >> 24) & 0xFF )),/* device      */
1739d2bd3ab9SScott Long 						(MV_U8)(is48bit ? (pCmd->cf_data_in?IDE_COMMAND_READ_EXT:IDE_COMMAND_WRITE_EXT):pCmd->uCmd.Ide.Command)
1740d2bd3ab9SScott Long 					)==MV_FALSE)
1741d2bd3ab9SScott Long 					{
17421713e81bSScott Long 						pCmd->Result = RETURN_IDE_ERROR;
17431713e81bSScott Long 						goto finish_cmd;
17441713e81bSScott Long 					}
17451713e81bSScott Long 					Lba += size>>9;
17461713e81bSScott Long 					if(Lba & 0xF0000000) is48bit = MV_TRUE;
17471713e81bSScott Long 				}
17481713e81bSScott Long 				while ((tmpSg++->wSgFlag & SG_FLAG_EOT)==0);
17491713e81bSScott Long 				pCmd->Result = RETURN_SUCCESS;
17501713e81bSScott Long finish_cmd:
17511713e81bSScott Long 				mvSataEnableChannelDma(pMvSataAdapter,channel);
1752d2bd3ab9SScott Long 				CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
17531713e81bSScott Long 				return;
17541713e81bSScott Long 			}
1755d2bd3ab9SScott Long 		}
17561713e81bSScott Long 
1757d2bd3ab9SScott Long 		pPRDTable = (MV_SATA_EDMA_PRD_ENTRY *) AllocatePRDTable(pMvSataAdapter->IALData);
17587d9aed9cSScott Long 		KdPrint(("pPRDTable:%p\n",pPRDTable));
17591713e81bSScott Long 		if (!pPRDTable) {
17601713e81bSScott Long 			pCmd->Result = RETURN_DEVICE_BUSY;
1761d2bd3ab9SScott Long 			CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
17621713e81bSScott Long 			HPT_ASSERT(0);
17631713e81bSScott Long 			return;
17641713e81bSScott Long 		}
17651713e81bSScott Long 
17661713e81bSScott Long 		do{
1767d2bd3ab9SScott Long 			pPRDTable[i].highBaseAddr = (sizeof(tmpSg->dSgAddress)>4 ? (MV_U32)(tmpSg->dSgAddress>>32) : 0);
17681713e81bSScott Long 			pPRDTable[i].flags = (MV_U16)tmpSg->wSgFlag;
17691713e81bSScott Long 			pPRDTable[i].byteCount = (MV_U16)tmpSg->wSgSize;
17701713e81bSScott Long 			pPRDTable[i].lowBaseAddr = (MV_U32)tmpSg->dSgAddress;
17711713e81bSScott Long 			pPRDTable[i].reserved = 0;
17721713e81bSScott Long 			i++;
17731713e81bSScott Long 		}while((tmpSg++->wSgFlag & SG_FLAG_EOT)==0);
17741713e81bSScott Long 
1775d2bd3ab9SScott Long 		pUdmaParams->prdLowAddr = (ULONG)fOsPhysicalAddress(pPRDTable);
1776d2bd3ab9SScott Long 		if ((pUdmaParams->numOfSectors == 256) && (pMvSataChannel->lba48Address == MV_FALSE)) {
17771713e81bSScott Long 			pUdmaParams->numOfSectors = 0;
17781713e81bSScott Long 		}
17791713e81bSScott Long 
17801713e81bSScott Long 		pCmd->uScratch.sata_param.prdAddr = (PVOID)pPRDTable;
17811713e81bSScott Long 
1782d2bd3ab9SScott Long 		result = mvSataQueueCommand(pMvSataAdapter, channel, &commandInfo);
17831713e81bSScott Long 
1784d2bd3ab9SScott Long 		if (result != MV_QUEUE_COMMAND_RESULT_OK)
1785d2bd3ab9SScott Long 		{
17861713e81bSScott Long queue_failed:
1787d2bd3ab9SScott Long 			switch (result)
1788d2bd3ab9SScott Long 			{
17891713e81bSScott Long 			case MV_QUEUE_COMMAND_RESULT_BAD_LBA_ADDRESS:
1790d2bd3ab9SScott Long 				MV_ERROR("IAL Error: Edma Queue command failed. Bad LBA "
1791d2bd3ab9SScott Long 						 "LBA[31:0](0x%08x)\n", pUdmaParams->lowLBAAddress);
17921713e81bSScott Long 				pCmd->Result = RETURN_IDE_ERROR;
17931713e81bSScott Long 				break;
17941713e81bSScott Long 			case MV_QUEUE_COMMAND_RESULT_QUEUED_MODE_DISABLED:
1795d2bd3ab9SScott Long 				MV_ERROR("IAL Error: Edma Queue command failed. EDMA"
1796d2bd3ab9SScott Long 						 " disabled adapter %d channel %d\n",
17971713e81bSScott Long 						 pMvSataAdapter->adapterId, channel);
17981713e81bSScott Long 				mvSataEnableChannelDma(pMvSataAdapter,channel);
17991713e81bSScott Long 				pCmd->Result = RETURN_IDE_ERROR;
18001713e81bSScott Long 				break;
18011713e81bSScott Long 			case MV_QUEUE_COMMAND_RESULT_FULL:
1802d2bd3ab9SScott Long 				MV_ERROR("IAL Error: Edma Queue command failed. Queue is"
1803d2bd3ab9SScott Long 						 " Full adapter %d channel %d\n",
18041713e81bSScott Long 						 pMvSataAdapter->adapterId, channel);
18051713e81bSScott Long 				pCmd->Result = RETURN_DEVICE_BUSY;
18061713e81bSScott Long 				break;
18071713e81bSScott Long 			case MV_QUEUE_COMMAND_RESULT_BAD_PARAMS:
1808d2bd3ab9SScott Long 				MV_ERROR("IAL Error: Edma Queue command failed. (Bad "
1809d2bd3ab9SScott Long 						 "Params), pMvSataAdapter: %p,  pSataChannel: %p.\n",
1810d2bd3ab9SScott Long 						 pMvSataAdapter, pMvSataAdapter->sataChannel[channel]);
18111713e81bSScott Long 				pCmd->Result = RETURN_IDE_ERROR;
18121713e81bSScott Long 				break;
18131713e81bSScott Long 			default:
1814d2bd3ab9SScott Long 				MV_ERROR("IAL Error: Bad result value (%d) from queue"
1815d2bd3ab9SScott Long 						 " command\n", result);
18161713e81bSScott Long 				pCmd->Result = RETURN_IDE_ERROR;
18171713e81bSScott Long 			}
18181713e81bSScott Long 			if(pPRDTable)
1819d2bd3ab9SScott Long 				FreePRDTable(pMvSataAdapter->IALData,pPRDTable);
1820d2bd3ab9SScott Long 			CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
18211713e81bSScott Long 		}
18221713e81bSScott Long 		pDevice->QueueLength++;
18231713e81bSScott Long 		return;
18241713e81bSScott Long 
18251713e81bSScott Long 	case IDE_COMMAND_VERIFY:
18261713e81bSScott Long 		commandInfo.type = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
18271713e81bSScott Long 		pNoUdmaParams->bufPtr = NULL;
18281713e81bSScott Long 		pNoUdmaParams->callBack = CommandCompletionCB;
18291713e81bSScott Long 		pNoUdmaParams->commandId = (MV_VOID_PTR)pCmd;
18301713e81bSScott Long 		pNoUdmaParams->count = 0;
18311713e81bSScott Long 		pNoUdmaParams->features = 0;
18321713e81bSScott Long 		pNoUdmaParams->protocolType = MV_NON_UDMA_PROTOCOL_NON_DATA;
18331713e81bSScott Long 
18341713e81bSScott Long 		pCmd->uScratch.sata_param.cmd_priv = 1;
18351713e81bSScott Long 		if (pMvSataChannel->lba48Address == MV_TRUE){
1836d2bd3ab9SScott Long 			pNoUdmaParams->command = MV_ATA_COMMAND_READ_VERIFY_SECTORS_EXT;
18371713e81bSScott Long 			pNoUdmaParams->isEXT = MV_TRUE;
1838d2bd3ab9SScott Long 			pNoUdmaParams->lbaHigh = (MV_U16)((Lba & 0xff0000) >> 16);
18391713e81bSScott Long 			pNoUdmaParams->lbaMid = (MV_U16)((Lba & 0xff00) >> 8);
18401713e81bSScott Long 			pNoUdmaParams->lbaLow =
18411713e81bSScott Long 				(MV_U16)(((Lba & 0xff000000) >> 16)| (Lba & 0xff));
18421713e81bSScott Long 			pNoUdmaParams->sectorCount = nSector;
18431713e81bSScott Long 			pNoUdmaParams->device = 0x40;
1844d2bd3ab9SScott Long 			result = mvSataQueueCommand(pMvSataAdapter, channel, &commandInfo);
18451713e81bSScott Long 			if (result != MV_QUEUE_COMMAND_RESULT_OK){
18461713e81bSScott Long 				goto queue_failed;
18471713e81bSScott Long 			}
18481713e81bSScott Long 			return;
18491713e81bSScott Long 		}
1850d2bd3ab9SScott Long 		else{
18511713e81bSScott Long 			pNoUdmaParams->command = MV_ATA_COMMAND_READ_VERIFY_SECTORS;
18521713e81bSScott Long 			pNoUdmaParams->isEXT = MV_FALSE;
18531713e81bSScott Long 			pNoUdmaParams->lbaHigh = (MV_U16)((Lba & 0xff0000) >> 16);
18541713e81bSScott Long 			pNoUdmaParams->lbaMid = (MV_U16)((Lba & 0xff00) >> 8);
18551713e81bSScott Long 			pNoUdmaParams->lbaLow = (MV_U16)(Lba & 0xff);
18561713e81bSScott Long 			pNoUdmaParams->sectorCount = 0xff & nSector;
18571713e81bSScott Long 			pNoUdmaParams->device = (MV_U8)(0x40 |
18581713e81bSScott Long 				((Lba & 0xf000000) >> 24));
18591713e81bSScott Long 			pNoUdmaParams->callBack = CommandCompletionCB;
1860d2bd3ab9SScott Long 			result = mvSataQueueCommand(pMvSataAdapter, channel, &commandInfo);
1861d2bd3ab9SScott Long 			/*FIXME: how about the commands already queued? but marvel also forgets to consider this*/
18621713e81bSScott Long 			if (result != MV_QUEUE_COMMAND_RESULT_OK){
18631713e81bSScott Long 				goto queue_failed;
18641713e81bSScott Long 			}
1865d2bd3ab9SScott Long 		}
18661713e81bSScott Long 		break;
18671713e81bSScott Long 	default:
18681713e81bSScott Long 		pCmd->Result = RETURN_INVALID_REQUEST;
18691713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
18701713e81bSScott Long 		break;
18711713e81bSScott Long 	}
18721713e81bSScott Long }
18731713e81bSScott Long 
18741713e81bSScott Long /**********************************************************
18751713e81bSScott Long  *
18761713e81bSScott Long  *	Probe the hostadapter.
18771713e81bSScott Long  *
18781713e81bSScott Long  **********************************************************/
18791713e81bSScott Long static int
18801713e81bSScott Long hpt_probe(device_t dev)
18811713e81bSScott Long {
18821713e81bSScott Long 	if ((pci_get_vendor(dev) == MV_SATA_VENDOR_ID) &&
18831713e81bSScott Long 		(pci_get_device(dev) == MV_SATA_DEVICE_ID_5081
18841713e81bSScott Long #ifdef FOR_DEMO
18851713e81bSScott Long 		|| pci_get_device(dev) == MV_SATA_DEVICE_ID_5080
18861713e81bSScott Long #endif
1887d2bd3ab9SScott Long 		))
1888d2bd3ab9SScott Long 	{
18891713e81bSScott Long 		KdPrintI((CONTROLLER_NAME " found\n"));
18901713e81bSScott Long 		device_set_desc(dev, CONTROLLER_NAME);
18911713e81bSScott Long 		return 0;
18921713e81bSScott Long 	}
18931713e81bSScott Long 	else
18941713e81bSScott Long 		return(ENXIO);
18951713e81bSScott Long }
18961713e81bSScott Long 
18971713e81bSScott Long /***********************************************************
18981713e81bSScott Long  *
18991713e81bSScott Long  *      Auto configuration:  attach and init a host adapter.
19001713e81bSScott Long  *
19011713e81bSScott Long  ***********************************************************/
19021713e81bSScott Long static int
19031713e81bSScott Long hpt_attach(device_t dev)
19041713e81bSScott Long {
1905d2bd3ab9SScott Long 	IAL_ADAPTER_T * pAdapter = device_get_softc(dev);
19061713e81bSScott Long 	int rid;
19071713e81bSScott Long 	union ccb *ccb;
19081713e81bSScott Long 	struct cam_devq *devq;
19091713e81bSScott Long 	struct cam_sim *hpt_vsim;
19101713e81bSScott Long 
19111713e81bSScott Long 	printf("%s Version %s \n", DRIVER_NAME, DRIVER_VERSION);
19121713e81bSScott Long 
1913d2bd3ab9SScott Long 	if (!pAdapter)
1914d2bd3ab9SScott Long 	{
1915d2bd3ab9SScott Long 		pAdapter = (IAL_ADAPTER_T *)malloc(sizeof (IAL_ADAPTER_T), M_DEVBUF, M_NOWAIT);
1916d2bd3ab9SScott Long #if __FreeBSD_version > 410000
1917d2bd3ab9SScott Long 		device_set_softc(dev, (void *)pAdapter);
1918d2bd3ab9SScott Long #else
1919d2bd3ab9SScott Long 		device_set_driver(dev, (driver_t *)pAdapter);
1920d2bd3ab9SScott Long #endif
1921d2bd3ab9SScott Long 	}
1922d2bd3ab9SScott Long 
1923d2bd3ab9SScott Long 	if (!pAdapter) return (ENOMEM);
1924d2bd3ab9SScott Long 	bzero(pAdapter, sizeof(IAL_ADAPTER_T));
1925d2bd3ab9SScott Long 
19261713e81bSScott Long 	pAdapter->hpt_dev = dev;
19271713e81bSScott Long 
19281713e81bSScott Long 	rid = init_adapter(pAdapter);
19291713e81bSScott Long 	if (rid)
19301713e81bSScott Long 		return rid;
19311713e81bSScott Long 
19321713e81bSScott Long 	rid = 0;
1933d2bd3ab9SScott Long 	if ((pAdapter->hpt_irq = bus_alloc_resource(pAdapter->hpt_dev, SYS_RES_IRQ, &rid, 0, ~0ul, 1, RF_SHAREABLE | RF_ACTIVE)) == NULL)
1934d2bd3ab9SScott Long 	{
19351713e81bSScott Long 		hpt_printk(("can't allocate interrupt\n"));
19361713e81bSScott Long 		return(ENXIO);
19371713e81bSScott Long 	}
19381713e81bSScott Long 
1939d2bd3ab9SScott Long 	if(bus_setup_intr(pAdapter->hpt_dev, pAdapter->hpt_irq, INTR_TYPE_CAM, hpt_intr, pAdapter, &pAdapter->hpt_intr))
1940d2bd3ab9SScott Long 	{
19411713e81bSScott Long 		hpt_printk(("can't set up interrupt\n"));
19421713e81bSScott Long 		free(pAdapter, M_DEVBUF);
19431713e81bSScott Long 		return(ENXIO);
19441713e81bSScott Long 	}
19451713e81bSScott Long 
1946d2bd3ab9SScott Long 
1947d2bd3ab9SScott Long 	if((ccb = (union ccb *)malloc(sizeof(*ccb), M_DEVBUF, M_WAITOK)) != (union ccb*)NULL)
1948d2bd3ab9SScott Long 	{
1949d2bd3ab9SScott Long 		bzero(ccb, sizeof(*ccb));
19501713e81bSScott Long 		ccb->ccb_h.pinfo.priority = 1;
19511713e81bSScott Long 		ccb->ccb_h.pinfo.index = CAM_UNQUEUED_INDEX;
1952d2bd3ab9SScott Long 	}
1953d2bd3ab9SScott Long 	else
1954d2bd3ab9SScott Long 	{
19551713e81bSScott Long 		return ENOMEM;
19561713e81bSScott Long 	}
19571713e81bSScott Long 	/*
19581713e81bSScott Long 	 * Create the device queue for our SIM(s).
19591713e81bSScott Long 	 */
1960d2bd3ab9SScott Long 	if((devq = cam_simq_alloc(8/*MAX_QUEUE_COMM*/)) == NULL)
1961d2bd3ab9SScott Long 	{
19621713e81bSScott Long 		KdPrint(("ENXIO\n"));
19631713e81bSScott Long 		return ENOMEM;
19641713e81bSScott Long 	}
19651713e81bSScott Long 
19661713e81bSScott Long 	/*
19671713e81bSScott Long 	 * Construct our SIM entry
19681713e81bSScott Long 	 */
19691713e81bSScott Long 	if ((hpt_vsim = cam_sim_alloc(hpt_action, hpt_poll, __str(PROC_DIR_NAME),
1970d2bd3ab9SScott Long 			pAdapter, device_get_unit(pAdapter->hpt_dev), /*untagged*/1, /*tagged*/8,  devq)) == NULL)	{
19711713e81bSScott Long 		cam_simq_free(devq);
19721713e81bSScott Long 		return ENOMEM;
19731713e81bSScott Long 	}
19741713e81bSScott Long 
1975d2bd3ab9SScott Long 	if(xpt_bus_register(hpt_vsim, 0) != CAM_SUCCESS)
1976d2bd3ab9SScott Long 	{
19771713e81bSScott Long 		cam_sim_free(hpt_vsim, /*free devq*/ TRUE);
19781713e81bSScott Long 		hpt_vsim = NULL;
19791713e81bSScott Long 		return ENXIO;
19801713e81bSScott Long 	}
19811713e81bSScott Long 
19821713e81bSScott Long 	if(xpt_create_path(&pAdapter->path, /*periph */ NULL,
1983d2bd3ab9SScott Long 			cam_sim_path(hpt_vsim), CAM_TARGET_WILDCARD,
1984d2bd3ab9SScott Long 			CAM_LUN_WILDCARD) != CAM_REQ_CMP)
1985d2bd3ab9SScott Long 	{
19861713e81bSScott Long 		xpt_bus_deregister(cam_sim_path(hpt_vsim));
19871713e81bSScott Long 		cam_sim_free(hpt_vsim, /*free_devq*/TRUE);
19881713e81bSScott Long 		hpt_vsim = NULL;
19891713e81bSScott Long 		return ENXIO;
19901713e81bSScott Long 	}
19911713e81bSScott Long 
19921713e81bSScott Long 	xpt_setup_ccb(&(ccb->ccb_h), pAdapter->path, /*priority*/5);
19931713e81bSScott Long 	ccb->ccb_h.func_code = XPT_SASYNC_CB;
19941713e81bSScott Long 	ccb->csa.event_enable = AC_LOST_DEVICE;
19951713e81bSScott Long 	ccb->csa.callback = hpt_async;
19961713e81bSScott Long 	ccb->csa.callback_arg = hpt_vsim;
19971713e81bSScott Long 	xpt_action((union ccb *)ccb);
19981713e81bSScott Long 	free(ccb, M_DEVBUF);
19991713e81bSScott Long 
2000d2bd3ab9SScott Long 	/* Register shutdown handler, and start the work thread. */
20016e0e5d36SNate Lawson 	if (device_get_unit(dev) == 0) {
20026e0e5d36SNate Lawson 		pAdapter->eh = EVENTHANDLER_REGISTER(shutdown_final,
20036e0e5d36SNate Lawson 			hpt_shutdown, dev, SHUTDOWN_PRI_DEFAULT);
2004d2bd3ab9SScott Long 		if (pAdapter->eh)
20056e0e5d36SNate Lawson 			launch_worker_thread();
20066e0e5d36SNate Lawson 		else
2007d2bd3ab9SScott Long 			hpt_printk(("shutdown event registration failed\n"));
20086e0e5d36SNate Lawson 	}
20091713e81bSScott Long 
20101713e81bSScott Long 	return 0;
20111713e81bSScott Long }
20121713e81bSScott Long 
20131713e81bSScott Long static int
20141713e81bSScott Long hpt_detach(device_t dev)
20151713e81bSScott Long {
20161713e81bSScott Long 	return (EBUSY);
20171713e81bSScott Long }
20181713e81bSScott Long 
2019d2bd3ab9SScott Long 
20201713e81bSScott Long /***************************************************************
20211713e81bSScott Long  * The poll function is used to simulate the interrupt when
20221713e81bSScott Long  * the interrupt subsystem is not functioning.
20231713e81bSScott Long  *
20241713e81bSScott Long  ***************************************************************/
20251713e81bSScott Long static void
20261713e81bSScott Long hpt_poll(struct cam_sim *sim)
20271713e81bSScott Long {
20281713e81bSScott Long 	hpt_intr((void *)cam_sim_softc(sim));
20291713e81bSScott Long }
20301713e81bSScott Long 
20311713e81bSScott Long /****************************************************************
20321713e81bSScott Long  *	Name:	hpt_intr
20331713e81bSScott Long  *	Description:	Interrupt handler.
20341713e81bSScott Long  ****************************************************************/
20351713e81bSScott Long static void
20361713e81bSScott Long hpt_intr(void *arg)
20371713e81bSScott Long {
20381713e81bSScott Long 	IAL_ADAPTER_T *pAdapter = (IAL_ADAPTER_T *)arg;
2039d2bd3ab9SScott Long 	intrmask_t oldspl = lock_driver();
20401713e81bSScott Long 
20411713e81bSScott Long 	/* KdPrintI(("----- Entering Isr() -----\n")); */
2042d2bd3ab9SScott Long 	if (mvSataInterruptServiceRoutine(&pAdapter->mvSataAdapter) == MV_TRUE)
2043d2bd3ab9SScott Long 	{
20441713e81bSScott Long 		_VBUS_INST(&pAdapter->VBus)
20451713e81bSScott Long 		CheckPendingCall(_VBUS_P0);
20461713e81bSScott Long 	}
20471713e81bSScott Long 
20481713e81bSScott Long 	/* KdPrintI(("----- Leaving Isr() -----\n")); */
20491713e81bSScott Long 	unlock_driver(oldspl);
20501713e81bSScott Long }
20511713e81bSScott Long 
20521713e81bSScott Long /**********************************************************
20531713e81bSScott Long  * 			Asynchronous Events
20541713e81bSScott Long  *********************************************************/
20551713e81bSScott Long #if (!defined(UNREFERENCED_PARAMETER))
20561713e81bSScott Long #define UNREFERENCED_PARAMETER(x) (void)(x)
20571713e81bSScott Long #endif
20581713e81bSScott Long 
20591713e81bSScott Long static void
20601713e81bSScott Long hpt_async(void * callback_arg, u_int32_t code, struct cam_path * path,
20611713e81bSScott Long     void * arg)
20621713e81bSScott Long {
20631713e81bSScott Long 	/* debug XXXX */
20641713e81bSScott Long 	panic("Here");
20651713e81bSScott Long 	UNREFERENCED_PARAMETER(callback_arg);
20661713e81bSScott Long 	UNREFERENCED_PARAMETER(code);
20671713e81bSScott Long 	UNREFERENCED_PARAMETER(path);
20681713e81bSScott Long 	UNREFERENCED_PARAMETER(arg);
20691713e81bSScott Long 
20701713e81bSScott Long }
20711713e81bSScott Long 
20721713e81bSScott Long static void
20731713e81bSScott Long FlushAdapter(IAL_ADAPTER_T *pAdapter)
20741713e81bSScott Long {
20751713e81bSScott Long 	int i;
20761713e81bSScott Long 
20771713e81bSScott Long 	hpt_printk(("flush all devices\n"));
20781713e81bSScott Long 
20791713e81bSScott Long 	/* flush all devices */
20801713e81bSScott Long 	for (i=0; i<MAX_VDEVICE_PER_VBUS; i++) {
20811713e81bSScott Long 		PVDevice pVDev = pAdapter->VBus.pVDevice[i];
2082d2bd3ab9SScott Long 		if(pVDev) fFlushVDev(pVDev);
20831713e81bSScott Long 	}
20841713e81bSScott Long }
20851713e81bSScott Long 
20861713e81bSScott Long static int
20871713e81bSScott Long hpt_shutdown(device_t dev)
20881713e81bSScott Long {
20891713e81bSScott Long 		IAL_ADAPTER_T *pAdapter;
20901713e81bSScott Long 
20911713e81bSScott Long 		pAdapter = device_get_softc(dev);
20921713e81bSScott Long 		if (pAdapter == NULL)
20931713e81bSScott Long 			return (EINVAL);
20941713e81bSScott Long 
20951713e81bSScott Long 		EVENTHANDLER_DEREGISTER(shutdown_final, pAdapter->eh);
20961713e81bSScott Long 		FlushAdapter(pAdapter);
2097d2bd3ab9SScott Long 		  /* give the flush some time to happen,
2098d2bd3ab9SScott Long 		    *otherwise "shutdown -p now" will make file system corrupted */
2099d2bd3ab9SScott Long 		DELAY(1000 * 1000 * 5);
21001713e81bSScott Long 		return 0;
21011713e81bSScott Long }
21021713e81bSScott Long 
21031713e81bSScott Long void
21041713e81bSScott Long Check_Idle_Call(IAL_ADAPTER_T *pAdapter)
21051713e81bSScott Long {
21061713e81bSScott Long 	_VBUS_INST(&pAdapter->VBus)
21071713e81bSScott Long 
21081713e81bSScott Long 	if (mWaitingForIdle(_VBUS_P0)) {
21091713e81bSScott Long 		CheckIdleCall(_VBUS_P0);
21101713e81bSScott Long #ifdef SUPPORT_ARRAY
2111d2bd3ab9SScott Long 		{
2112d2bd3ab9SScott Long 			int i;
21131713e81bSScott Long 			PVDevice pArray;
2114d2bd3ab9SScott Long 			for(i = 0; i < MAX_ARRAY_PER_VBUS; i++){
21151713e81bSScott Long 				if ((pArray=ArrayTables(i))->u.array.dArStamp==0)
21161713e81bSScott Long 					continue;
21171713e81bSScott Long 				else if (pArray->u.array.rf_auto_rebuild) {
21181713e81bSScott Long 						KdPrint(("auto rebuild.\n"));
21191713e81bSScott Long 						pArray->u.array.rf_auto_rebuild = 0;
2120d2bd3ab9SScott Long 						hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapter, pArray, DUPLICATE);
2121d2bd3ab9SScott Long 				}
21221713e81bSScott Long 			}
21231713e81bSScott Long 		}
21241713e81bSScott Long #endif
21251713e81bSScott Long 	}
21261713e81bSScott Long 	/* launch the awaiting commands blocked by mWaitingForIdle */
2127d2bd3ab9SScott Long 	while(pAdapter->pending_Q!= NULL)
2128d2bd3ab9SScott Long 	{
21291713e81bSScott Long 		_VBUS_INST(&pAdapter->VBus)
2130d2bd3ab9SScott Long 		union ccb *ccb = (union ccb *)pAdapter->pending_Q->ccb_h.ccb_ccb_ptr;
21311713e81bSScott Long 		hpt_free_ccb(&pAdapter->pending_Q, ccb);
21321713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)OsSendCommand, ccb);
21331713e81bSScott Long 	}
21341713e81bSScott Long }
21351713e81bSScott Long 
21361713e81bSScott Long static void
21371713e81bSScott Long ccb_done(union ccb *ccb)
21381713e81bSScott Long {
2139d2bd3ab9SScott Long 	PBUS_DMAMAP pmap = (PBUS_DMAMAP)ccb->ccb_adapter;
2140d2bd3ab9SScott Long 	IAL_ADAPTER_T * pAdapter = pmap->pAdapter;
2141d2bd3ab9SScott Long 	KdPrintI(("ccb_done: ccb %p status %x\n", ccb, ccb->ccb_h.status));
21421713e81bSScott Long 
2143d2bd3ab9SScott Long 	dmamap_put(pmap);
21441713e81bSScott Long 	xpt_done(ccb);
21451713e81bSScott Long 
21461713e81bSScott Long 	pAdapter->outstandingCommands--;
21471713e81bSScott Long 
2148d2bd3ab9SScott Long 	if (pAdapter->outstandingCommands == 0)
2149d2bd3ab9SScott Long 	{
21501713e81bSScott Long 		if(DPC_Request_Nums == 0)
21511713e81bSScott Long 			Check_Idle_Call(pAdapter);
21521713e81bSScott Long 	}
21531713e81bSScott Long }
21541713e81bSScott Long 
21551713e81bSScott Long /****************************************************************
21561713e81bSScott Long  *	Name:	hpt_action
21571713e81bSScott Long  *	Description:	Process a queued command from the CAM layer.
21581713e81bSScott Long  *	Parameters:		sim - Pointer to SIM object
21591713e81bSScott Long  *					ccb - Pointer to SCSI command structure.
21601713e81bSScott Long  ****************************************************************/
21611713e81bSScott Long 
21621713e81bSScott Long void
21631713e81bSScott Long hpt_action(struct cam_sim *sim, union ccb *ccb)
21641713e81bSScott Long {
21651713e81bSScott Long 	intrmask_t oldspl;
21661713e81bSScott Long 	IAL_ADAPTER_T * pAdapter = (IAL_ADAPTER_T *) cam_sim_softc(sim);
2167d2bd3ab9SScott Long 	PBUS_DMAMAP  pmap;
21681713e81bSScott Long 	_VBUS_INST(&pAdapter->VBus)
21691713e81bSScott Long 
2170e1ab829aSScott Long 	CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("hpt_action\n"));
2171d2bd3ab9SScott Long 	KdPrint(("hpt_action(%lx,%lx{%x})\n", (u_long)sim, (u_long)ccb, ccb->ccb_h.func_code));
21721713e81bSScott Long 
2173d2bd3ab9SScott Long 	switch (ccb->ccb_h.func_code)
2174d2bd3ab9SScott Long 	{
21751713e81bSScott Long 		case XPT_SCSI_IO:	/* Execute the requested I/O operation */
2176d2bd3ab9SScott Long 		{
21771713e81bSScott Long 			/* ccb->ccb_h.path_id is not our bus id - don't check it */
21781713e81bSScott Long 
21791713e81bSScott Long 			if (ccb->ccb_h.target_lun)	{
21801713e81bSScott Long 				ccb->ccb_h.status = CAM_LUN_INVALID;
21811713e81bSScott Long 				xpt_done(ccb);
21821713e81bSScott Long 				return;
21831713e81bSScott Long 			}
21841713e81bSScott Long 			if (ccb->ccb_h.target_id >= MAX_VDEVICE_PER_VBUS ||
21851713e81bSScott Long 				pAdapter->VBus.pVDevice[ccb->ccb_h.target_id]==0) {
21861713e81bSScott Long 				ccb->ccb_h.status = CAM_TID_INVALID;
21871713e81bSScott Long 				xpt_done(ccb);
21881713e81bSScott Long 				return;
21891713e81bSScott Long 			}
21901713e81bSScott Long 
21911713e81bSScott Long 			oldspl = lock_driver();
21921713e81bSScott Long 			if (pAdapter->outstandingCommands==0 && DPC_Request_Nums==0)
21931713e81bSScott Long 				Check_Idle_Call(pAdapter);
21941713e81bSScott Long 
2195d2bd3ab9SScott Long 			pmap = dmamap_get(pAdapter);
2196d2bd3ab9SScott Long 			HPT_ASSERT(pmap);
2197d2bd3ab9SScott Long 			ccb->ccb_adapter = pmap;
2198d2bd3ab9SScott Long 			memset((void *)pmap->psg, 0,  sizeof(pmap->psg));
2199d2bd3ab9SScott Long 
22001713e81bSScott Long 			if (mWaitingForIdle(_VBUS_P0))
22011713e81bSScott Long 				hpt_queue_ccb(&pAdapter->pending_Q, ccb);
22021713e81bSScott Long 			else
22031713e81bSScott Long 				OsSendCommand(_VBUS_P ccb);
22041713e81bSScott Long 			unlock_driver(oldspl);
22051713e81bSScott Long 
22061713e81bSScott Long 			/* KdPrint(("leave scsiio\n")); */
22071713e81bSScott Long 			break;
2208d2bd3ab9SScott Long 		}
22091713e81bSScott Long 
22101713e81bSScott Long 		case XPT_RESET_BUS:
22111713e81bSScott Long 			KdPrint(("reset bus\n"));
22121713e81bSScott Long 			oldspl = lock_driver();
22131713e81bSScott Long 			fResetVBus(_VBUS_P0);
22141713e81bSScott Long 			unlock_driver(oldspl);
22151713e81bSScott Long 			xpt_done(ccb);
22161713e81bSScott Long 			break;
22171713e81bSScott Long 
22181713e81bSScott Long 		case XPT_RESET_DEV:	/* Bus Device Reset the specified SCSI device */
22191713e81bSScott Long 		case XPT_EN_LUN:		/* Enable LUN as a target */
22201713e81bSScott Long 		case XPT_TARGET_IO:		/* Execute target I/O request */
22211713e81bSScott Long 		case XPT_ACCEPT_TARGET_IO:	/* Accept Host Target Mode CDB */
22221713e81bSScott Long 		case XPT_CONT_TARGET_IO:	/* Continue Host Target I/O Connection*/
22231713e81bSScott Long 		case XPT_ABORT:			/* Abort the specified CCB */
22241713e81bSScott Long 		case XPT_TERM_IO:		/* Terminate the I/O process */
22251713e81bSScott Long 			/* XXX Implement */
22261713e81bSScott Long 			ccb->ccb_h.status = CAM_REQ_INVALID;
22271713e81bSScott Long 			xpt_done(ccb);
22281713e81bSScott Long 			break;
22291713e81bSScott Long 
22301713e81bSScott Long 		case XPT_GET_TRAN_SETTINGS:
22311713e81bSScott Long 		case XPT_SET_TRAN_SETTINGS:
22321713e81bSScott Long 			/* XXX Implement */
22331713e81bSScott Long 			ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
22341713e81bSScott Long 			xpt_done(ccb);
22351713e81bSScott Long 			break;
22361713e81bSScott Long 
22371713e81bSScott Long 		case XPT_CALC_GEOMETRY:
22381713e81bSScott Long 		{
22391713e81bSScott Long 			struct	  ccb_calc_geometry *ccg;
22401713e81bSScott Long 			u_int32_t size_mb;
22411713e81bSScott Long 			u_int32_t secs_per_cylinder;
22421713e81bSScott Long 
22431713e81bSScott Long 			ccg = &ccb->ccg;
22441713e81bSScott Long 			size_mb = ccg->volume_size / ((1024L * 1024L) / ccg->block_size);
22451713e81bSScott Long 
22461713e81bSScott Long 			if (size_mb > 1024 ) {
22471713e81bSScott Long 				ccg->heads = 255;
22481713e81bSScott Long 				ccg->secs_per_track = 63;
22491713e81bSScott Long 			} else {
22501713e81bSScott Long 				ccg->heads = 64;
22511713e81bSScott Long 				ccg->secs_per_track = 32;
22521713e81bSScott Long 			}
22531713e81bSScott Long 			secs_per_cylinder = ccg->heads * ccg->secs_per_track;
22541713e81bSScott Long 			ccg->cylinders = ccg->volume_size / secs_per_cylinder;
22551713e81bSScott Long 			ccb->ccb_h.status = CAM_REQ_CMP;
22561713e81bSScott Long 			xpt_done(ccb);
22571713e81bSScott Long 			break;
22581713e81bSScott Long 		}
22591713e81bSScott Long 
22601713e81bSScott Long 		case XPT_PATH_INQ:		/* Path routing inquiry */
22611713e81bSScott Long 		{
22621713e81bSScott Long 			struct ccb_pathinq *cpi = &ccb->cpi;
22631713e81bSScott Long 
22641713e81bSScott Long 			cpi->version_num = 1; /* XXX??? */
22651713e81bSScott Long 			cpi->hba_inquiry = PI_SDTR_ABLE;
22661713e81bSScott Long 			cpi->target_sprt = 0;
22671713e81bSScott Long 			/* Not necessary to reset bus */
22681713e81bSScott Long 			cpi->hba_misc = PIM_NOBUSRESET;
22691713e81bSScott Long 			cpi->hba_eng_cnt = 0;
22701713e81bSScott Long 
22711713e81bSScott Long 			cpi->max_target = MAX_VDEVICE_PER_VBUS;
22721713e81bSScott Long 			cpi->max_lun = 0;
22731713e81bSScott Long 			cpi->initiator_id = MAX_VDEVICE_PER_VBUS;
22741713e81bSScott Long 
22751713e81bSScott Long 			cpi->bus_id = cam_sim_bus(sim);
22761713e81bSScott Long 			cpi->base_transfer_speed = 3300;
22771713e81bSScott Long 			strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
22781713e81bSScott Long 			strncpy(cpi->hba_vid, "HPT   ", HBA_IDLEN);
22791713e81bSScott Long 			strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
22801713e81bSScott Long 			cpi->unit_number = cam_sim_unit(sim);
22811713e81bSScott Long 			cpi->ccb_h.status = CAM_REQ_CMP;
22821713e81bSScott Long 			xpt_done(ccb);
22831713e81bSScott Long 			break;
22841713e81bSScott Long 		}
22851713e81bSScott Long 
22861713e81bSScott Long 		default:
22871713e81bSScott Long 			KdPrint(("invalid cmd\n"));
22881713e81bSScott Long 			ccb->ccb_h.status = CAM_REQ_INVALID;
22891713e81bSScott Long 			xpt_done(ccb);
22901713e81bSScott Long 			break;
22911713e81bSScott Long 	}
22921713e81bSScott Long 	/* KdPrint(("leave hpt_action..............\n")); */
22931713e81bSScott Long }
22941713e81bSScott Long 
22951713e81bSScott Long /* shall be called at lock_driver() */
22961713e81bSScott Long static void
22971713e81bSScott Long hpt_queue_ccb(union ccb **ccb_Q, union ccb *ccb)
22981713e81bSScott Long {
22991713e81bSScott Long 	if(*ccb_Q == NULL)
23001713e81bSScott Long 		ccb->ccb_h.ccb_ccb_ptr = ccb;
23011713e81bSScott Long 	else {
23021713e81bSScott Long 		ccb->ccb_h.ccb_ccb_ptr = (*ccb_Q)->ccb_h.ccb_ccb_ptr;
23031713e81bSScott Long 		(*ccb_Q)->ccb_h.ccb_ccb_ptr = (char *)ccb;
23041713e81bSScott Long 	}
23051713e81bSScott Long 
23061713e81bSScott Long 	*ccb_Q = ccb;
23071713e81bSScott Long }
23081713e81bSScott Long 
23091713e81bSScott Long /* shall be called at lock_driver() */
23101713e81bSScott Long static void
23111713e81bSScott Long hpt_free_ccb(union ccb **ccb_Q, union ccb *ccb)
23121713e81bSScott Long {
23131713e81bSScott Long 	union ccb *TempCCB;
23141713e81bSScott Long 
23151713e81bSScott Long 	TempCCB = *ccb_Q;
23161713e81bSScott Long 
2317d2bd3ab9SScott Long 	if(ccb->ccb_h.ccb_ccb_ptr == ccb) /*it means SCpnt is the last one in CURRCMDs*/
23181713e81bSScott Long 		*ccb_Q = NULL;
23191713e81bSScott Long 	else {
23201713e81bSScott Long 		while(TempCCB->ccb_h.ccb_ccb_ptr != (char *)ccb)
23211713e81bSScott Long 			TempCCB = (union ccb *)TempCCB->ccb_h.ccb_ccb_ptr;
23221713e81bSScott Long 
23231713e81bSScott Long 		TempCCB->ccb_h.ccb_ccb_ptr = ccb->ccb_h.ccb_ccb_ptr;
23241713e81bSScott Long 
23251713e81bSScott Long 		if(*ccb_Q == ccb)
23261713e81bSScott Long 			*ccb_Q = TempCCB;
23271713e81bSScott Long 	}
23281713e81bSScott Long }
23291713e81bSScott Long 
23301713e81bSScott Long #ifdef SUPPORT_ARRAY
23311713e81bSScott Long /***************************************************************************
23321713e81bSScott Long  * Function:     hpt_worker_thread
23331713e81bSScott Long  * Description:  Do background rebuilding. Execute in kernel thread context.
23341713e81bSScott Long  * Returns:      None
23351713e81bSScott Long  ***************************************************************************/
23361713e81bSScott Long static void hpt_worker_thread(void)
23371713e81bSScott Long {
23381713e81bSScott Long 	intrmask_t oldspl;
23391713e81bSScott Long 
23401713e81bSScott Long 	for(;;)	{
23411713e81bSScott Long 		while (DpcQueue_First!=DpcQueue_Last) {
23421713e81bSScott Long 			ST_HPT_DPC p;
23431713e81bSScott Long 			oldspl = lock_driver();
23441713e81bSScott Long 			p = DpcQueue[DpcQueue_First];
23451713e81bSScott Long 			DpcQueue_First++;
23461713e81bSScott Long 			DpcQueue_First %= MAX_DPC;
23471713e81bSScott Long 			DPC_Request_Nums++;
23481713e81bSScott Long 			unlock_driver(oldspl);
23491713e81bSScott Long 			p.dpc(p.pAdapter, p.arg, p.flags);
23501713e81bSScott Long 
23511713e81bSScott Long 			oldspl = lock_driver();
23521713e81bSScott Long 			DPC_Request_Nums--;
2353d2bd3ab9SScott Long 			/* since we may have prevented Check_Idle_Call, do it here */
23541713e81bSScott Long 			if (DPC_Request_Nums==0) {
23551713e81bSScott Long 				if (p.pAdapter->outstandingCommands == 0) {
23561713e81bSScott Long 					_VBUS_INST(&p.pAdapter->VBus);
23571713e81bSScott Long 					Check_Idle_Call(p.pAdapter);
23581713e81bSScott Long 					CheckPendingCall(_VBUS_P0);
23591713e81bSScott Long 				}
23601713e81bSScott Long 			}
23611713e81bSScott Long 			unlock_driver(oldspl);
23621713e81bSScott Long 
2363d2bd3ab9SScott Long 			/*Schedule out*/
2364d2bd3ab9SScott Long #if (__FreeBSD_version < 500000)
2365d2bd3ab9SScott Long 			YIELD_THREAD;
2366d2bd3ab9SScott Long #else
2367d2bd3ab9SScott Long 			tsleep((caddr_t)hpt_worker_thread, PPAUSE, "sched", 1);
2368d2bd3ab9SScott Long #endif
2369d2bd3ab9SScott Long 			if (SIGISMEMBER(curproc->p_siglist, SIGSTOP)) {
23701713e81bSScott Long 				/* abort rebuilding process. */
2371d2bd3ab9SScott Long 				IAL_ADAPTER_T *pAdapter;
2372d2bd3ab9SScott Long 				PVDevice      pArray;
2373d2bd3ab9SScott Long 				PVBus         _vbus_p;
2374d2bd3ab9SScott Long 				int i;
23751713e81bSScott Long 				pAdapter = gIal_Adapter;
2376d2bd3ab9SScott Long 
23771713e81bSScott Long 				while(pAdapter != 0){
2378d2bd3ab9SScott Long 
23791713e81bSScott Long 					_vbus_p = &pAdapter->VBus;
2380d2bd3ab9SScott Long 
2381d2bd3ab9SScott Long 					for (i=0;i<MAX_ARRAY_PER_VBUS;i++)
2382d2bd3ab9SScott Long 					{
23831713e81bSScott Long 						if ((pArray=ArrayTables(i))->u.array.dArStamp==0)
23841713e81bSScott Long 							continue;
2385d2bd3ab9SScott Long 						else if (pArray->u.array.rf_rebuilding ||
23861713e81bSScott Long 								pArray->u.array.rf_verifying ||
2387d2bd3ab9SScott Long 								pArray->u.array.rf_initializing)
2388d2bd3ab9SScott Long 							{
23891713e81bSScott Long 								pArray->u.array.rf_abort_rebuild = 1;
23901713e81bSScott Long 							}
23911713e81bSScott Long 					}
23921713e81bSScott Long 					pAdapter = pAdapter->next;
23931713e81bSScott Long 				}
23941713e81bSScott Long 			}
2395d2bd3ab9SScott Long 		}
23961713e81bSScott Long 
2397d2bd3ab9SScott Long /*Remove this debug option*/
2398d2bd3ab9SScott Long /*
23991713e81bSScott Long #ifdef DEBUG
24001713e81bSScott Long 		if (SIGISMEMBER(curproc->p_siglist, SIGSTOP))
2401d2bd3ab9SScott Long 			tsleep((caddr_t)hpt_worker_thread, PPAUSE, "hptrdy", 2*hz);
24021713e81bSScott Long #endif
2403d2bd3ab9SScott Long */
24041713e81bSScott Long 	#if (__FreeBSD_version >= 500043)
24051713e81bSScott Long 		kthread_suspend_check(curproc);
24061713e81bSScott Long 	#else
24071713e81bSScott Long 		kproc_suspend_loop(curproc);
24081713e81bSScott Long 	#endif
2409d2bd3ab9SScott Long 		tsleep((caddr_t)hpt_worker_thread, PPAUSE, "hptrdy", 2*hz);  /* wait for something to do */
24101713e81bSScott Long 	}
24111713e81bSScott Long }
24121713e81bSScott Long 
24131713e81bSScott Long static struct proc *hptdaemonproc;
24141713e81bSScott Long static struct kproc_desc hpt_kp = {
24151713e81bSScott Long 	"hpt_wt",
24161713e81bSScott Long 	hpt_worker_thread,
24171713e81bSScott Long 	&hptdaemonproc
24181713e81bSScott Long };
24191713e81bSScott Long 
2420d2bd3ab9SScott Long /*Start this thread in the hpt_attach, to prevent kernel from loading it without our controller.*/
24211713e81bSScott Long static void
24221713e81bSScott Long launch_worker_thread(void)
24231713e81bSScott Long {
24241713e81bSScott Long 	IAL_ADAPTER_T *pAdapTemp;
24251713e81bSScott Long 
24261713e81bSScott Long 	kproc_start(&hpt_kp);
24271713e81bSScott Long 
24281713e81bSScott Long 	for (pAdapTemp = gIal_Adapter; pAdapTemp; pAdapTemp = pAdapTemp->next) {
24291713e81bSScott Long 
24301713e81bSScott Long 		_VBUS_INST(&pAdapTemp->VBus)
24311713e81bSScott Long 		int i;
24321713e81bSScott Long 		PVDevice pVDev;
24331713e81bSScott Long 
24341713e81bSScott Long 		for(i = 0; i < MAX_ARRAY_PER_VBUS; i++)
24351713e81bSScott Long 			if ((pVDev=ArrayTables(i))->u.array.dArStamp==0)
24361713e81bSScott Long 				continue;
2437d2bd3ab9SScott Long 			else{
2438d2bd3ab9SScott Long 				if (pVDev->u.array.rf_need_rebuild && !pVDev->u.array.rf_rebuilding)
2439d2bd3ab9SScott Long 					hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapTemp, pVDev,
2440d2bd3ab9SScott Long 					(UCHAR)((pVDev->u.array.CriticalMembers || pVDev->VDeviceType == VD_RAID_1)? DUPLICATE : REBUILD_PARITY));
24411713e81bSScott Long 			}
24421713e81bSScott Long 	}
24431713e81bSScott Long 
24441713e81bSScott Long 	/*
2445d2bd3ab9SScott Long 	 * hpt_worker_thread needs to be suspended after shutdown sync, when fs sync finished.
24461713e81bSScott Long 	 */
24471713e81bSScott Long #if (__FreeBSD_version < 500043)
2448d2bd3ab9SScott Long 	EVENTHANDLER_REGISTER(shutdown_post_sync, shutdown_kproc, hptdaemonproc, SHUTDOWN_PRI_FIRST);
24491713e81bSScott Long #else
2450d2bd3ab9SScott Long 	EVENTHANDLER_REGISTER(shutdown_post_sync, kproc_shutdown, hptdaemonproc, SHUTDOWN_PRI_FIRST);
24511713e81bSScott Long #endif
24521713e81bSScott Long }
2453d2bd3ab9SScott Long /*
2454d2bd3ab9SScott Long  *SYSINIT(hptwt, SI_SUB_KTHREAD_IDLE, SI_ORDER_FIRST, launch_worker_thread, NULL);
2455d2bd3ab9SScott Long */
24561713e81bSScott Long 
2457d2bd3ab9SScott Long #endif
24581713e81bSScott Long 
24591713e81bSScott Long /********************************************************************************/
24601713e81bSScott Long 
2461d2bd3ab9SScott Long int HPTLIBAPI fOsBuildSgl(_VBUS_ARG PCommand pCmd, FPSCAT_GATH pSg, int logical)
24621713e81bSScott Long {
2463d2bd3ab9SScott Long 	union ccb *ccb = (union ccb *)pCmd->pOrgCommand;
2464d2bd3ab9SScott Long 	bus_dma_segment_t *sgList = (bus_dma_segment_t *)ccb->csio.data_ptr;
24651713e81bSScott Long 	int idx;
24661713e81bSScott Long 
24671713e81bSScott Long 	if(logical) {
2468d2bd3ab9SScott Long 		if (ccb->ccb_h.flags & CAM_DATA_PHYS)
2469d2bd3ab9SScott Long 			panic("physical address unsupported");
24701713e81bSScott Long 
2471d2bd3ab9SScott Long 		if (ccb->ccb_h.flags & CAM_SCATTER_VALID) {
2472d2bd3ab9SScott Long 			if (ccb->ccb_h.flags & CAM_SG_LIST_PHYS)
2473d2bd3ab9SScott Long 				panic("physical address unsupported");
2474d2bd3ab9SScott Long 
2475d2bd3ab9SScott Long 			for (idx = 0; idx < ccb->csio.sglist_cnt; idx++) {
2476d2bd3ab9SScott Long 				pSg[idx].dSgAddress = (ULONG_PTR)(UCHAR *)sgList[idx].ds_addr;
2477d2bd3ab9SScott Long 				pSg[idx].wSgSize = sgList[idx].ds_len;
2478d2bd3ab9SScott Long 				pSg[idx].wSgFlag = (idx==ccb->csio.sglist_cnt-1)? SG_FLAG_EOT : 0;
2479d2bd3ab9SScott Long 			}
2480d2bd3ab9SScott Long 		}
2481d2bd3ab9SScott Long 		else {
2482d2bd3ab9SScott Long 			pSg->dSgAddress = (ULONG_PTR)(UCHAR *)ccb->csio.data_ptr;
2483d2bd3ab9SScott Long 			pSg->wSgSize = ccb->csio.dxfer_len;
24841713e81bSScott Long 			pSg->wSgFlag = SG_FLAG_EOT;
2485d2bd3ab9SScott Long 		}
24861713e81bSScott Long 		return TRUE;
24871713e81bSScott Long 	}
24881713e81bSScott Long 
2489d2bd3ab9SScott Long 	/* since we have provided physical sg, nobody will ask us to build physical sg */
2490d2bd3ab9SScott Long 	HPT_ASSERT(0);
24911713e81bSScott Long 	return FALSE;
24921713e81bSScott Long }
24931713e81bSScott Long 
24941713e81bSScott Long /*******************************************************************************/
24951713e81bSScott Long ULONG HPTLIBAPI
24961713e81bSScott Long GetStamp(void)
24971713e81bSScott Long {
24981713e81bSScott Long 	/*
24991713e81bSScott Long 	 * the system variable, ticks, can't be used since it hasn't yet been active
25001713e81bSScott Long 	 * when our driver starts (ticks==0, it's a invalid stamp value)
25011713e81bSScott Long 	 */
2502d2bd3ab9SScott Long 	ULONG stamp;
2503d2bd3ab9SScott Long 	do { stamp = random(); } while (stamp==0);
25041713e81bSScott Long 	return stamp;
25051713e81bSScott Long }
25061713e81bSScott Long 
25071713e81bSScott Long 
25081713e81bSScott Long static void
25091713e81bSScott Long SetInquiryData(PINQUIRYDATA inquiryData, PVDevice pVDev)
25101713e81bSScott Long {
25111713e81bSScott Long 	int i;
2512d2bd3ab9SScott Long 	IDENTIFY_DATA2 *pIdentify = (IDENTIFY_DATA2*)pVDev->u.disk.mv->identifyDevice;
25131713e81bSScott Long 
25141713e81bSScott Long 	inquiryData->DeviceType = T_DIRECT; /*DIRECT_ACCESS_DEVICE*/
25151713e81bSScott Long 	inquiryData->AdditionalLength = (UCHAR)(sizeof(INQUIRYDATA) - 5);
25161713e81bSScott Long #ifndef SERIAL_CMDS
25171713e81bSScott Long 	inquiryData->CommandQueue = 1;
25181713e81bSScott Long #endif
25191713e81bSScott Long 
25201713e81bSScott Long 	switch(pVDev->VDeviceType) {
25211713e81bSScott Long 	case VD_SINGLE_DISK:
25221713e81bSScott Long 	case VD_ATAPI:
25231713e81bSScott Long 	case VD_REMOVABLE:
25241713e81bSScott Long 		/* Set the removable bit, if applicable. */
2525d2bd3ab9SScott Long 		if ((pVDev->u.disk.df_removable_drive) || (pIdentify->GeneralConfiguration & 0x80))
25261713e81bSScott Long 			inquiryData->RemovableMedia = 1;
25271713e81bSScott Long 
25281713e81bSScott Long 		/* Fill in vendor identification fields. */
2529d2bd3ab9SScott Long 		for (i = 0; i < 20; i += 2) {
2530d2bd3ab9SScott Long 			inquiryData->VendorId[i] 	= ((PUCHAR)pIdentify->ModelNumber)[i + 1];
2531d2bd3ab9SScott Long 			inquiryData->VendorId[i+1] 	= ((PUCHAR)pIdentify->ModelNumber)[i];
25321713e81bSScott Long 
25331713e81bSScott Long 		}
25341713e81bSScott Long 
25351713e81bSScott Long 		/* Initialize unused portion of product id. */
25361713e81bSScott Long 		for (i = 0; i < 4; i++) inquiryData->ProductId[12+i] = ' ';
25371713e81bSScott Long 
25381713e81bSScott Long 		/* firmware revision */
2539d2bd3ab9SScott Long 		for (i = 0; i < 4; i += 2)
2540d2bd3ab9SScott Long 		{
2541d2bd3ab9SScott Long 			inquiryData->ProductRevisionLevel[i] 	= ((PUCHAR)pIdentify->FirmwareRevision)[i+1];
2542d2bd3ab9SScott Long 			inquiryData->ProductRevisionLevel[i+1] 	= ((PUCHAR)pIdentify->FirmwareRevision)[i];
25431713e81bSScott Long 		}
25441713e81bSScott Long 		break;
25451713e81bSScott Long 	default:
25461713e81bSScott Long 		memcpy(&inquiryData->VendorId, "RR182x  ", 8);
25471713e81bSScott Long #ifdef SUPPORT_ARRAY
25481713e81bSScott Long 		switch(pVDev->VDeviceType){
25491713e81bSScott Long 		case VD_RAID_0:
2550d2bd3ab9SScott Long 			if ((pVDev->u.array.pMember[0] && mIsArray(pVDev->u.array.pMember[0])) ||
2551d2bd3ab9SScott Long 				(pVDev->u.array.pMember[1] && mIsArray(pVDev->u.array.pMember[1])))
2552d2bd3ab9SScott Long 				memcpy(&inquiryData->ProductId, "RAID 1/0 Array  ", 16);
25531713e81bSScott Long 			else
2554d2bd3ab9SScott Long 				memcpy(&inquiryData->ProductId, "RAID 0 Array    ", 16);
25551713e81bSScott Long 			break;
25561713e81bSScott Long 		case VD_RAID_1:
2557d2bd3ab9SScott Long 			if ((pVDev->u.array.pMember[0] && mIsArray(pVDev->u.array.pMember[0])) ||
2558d2bd3ab9SScott Long 				(pVDev->u.array.pMember[1] && mIsArray(pVDev->u.array.pMember[1])))
2559d2bd3ab9SScott Long 				memcpy(&inquiryData->ProductId, "RAID 0/1 Array  ", 16);
25601713e81bSScott Long 			else
2561d2bd3ab9SScott Long 				memcpy(&inquiryData->ProductId, "RAID 1 Array    ", 16);
25621713e81bSScott Long 			break;
25631713e81bSScott Long 		case VD_RAID_5:
25641713e81bSScott Long 			memcpy(&inquiryData->ProductId, "RAID 5 Array    ", 16);
25651713e81bSScott Long 			break;
25661713e81bSScott Long 		case VD_JBOD:
25671713e81bSScott Long 			memcpy(&inquiryData->ProductId, "JBOD Array      ", 16);
25681713e81bSScott Long 			break;
25691713e81bSScott Long 		}
25701713e81bSScott Long #endif
25711713e81bSScott Long 		memcpy(&inquiryData->ProductRevisionLevel, "3.00", 4);
25721713e81bSScott Long 		break;
25731713e81bSScott Long 	}
25741713e81bSScott Long }
25751713e81bSScott Long 
25761713e81bSScott Long static void
25771713e81bSScott Long hpt_timeout(void *arg)
25781713e81bSScott Long {
2579d2bd3ab9SScott Long 	_VBUS_INST(&((PBUS_DMAMAP)((union ccb *)arg)->ccb_adapter)->pAdapter->VBus)
2580d2bd3ab9SScott Long 	intrmask_t oldspl = lock_driver();
25811713e81bSScott Long 	fResetVBus(_VBUS_P0);
25821713e81bSScott Long 	unlock_driver(oldspl);
25831713e81bSScott Long }
25841713e81bSScott Long 
2585d2bd3ab9SScott Long static void
2586d2bd3ab9SScott Long hpt_io_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
2587d2bd3ab9SScott Long {
2588d2bd3ab9SScott Long 	PCommand pCmd = (PCommand)arg;
2589d2bd3ab9SScott Long 	union ccb *ccb = pCmd->pOrgCommand;
2590d2bd3ab9SScott Long 	struct ccb_hdr *ccb_h = &ccb->ccb_h;
2591d2bd3ab9SScott Long 	PBUS_DMAMAP pmap = (PBUS_DMAMAP) ccb->ccb_adapter;
2592d2bd3ab9SScott Long 	IAL_ADAPTER_T *pAdapter = pmap->pAdapter;
2593d2bd3ab9SScott Long 	PVDevice	pVDev = pAdapter->VBus.pVDevice[ccb_h->target_id];
2594d2bd3ab9SScott Long 	FPSCAT_GATH psg = pCmd->pSgTable;
2595d2bd3ab9SScott Long 	int idx;
2596d2bd3ab9SScott Long 	_VBUS_INST(pVDev->pVBus)
2597d2bd3ab9SScott Long 
2598d2bd3ab9SScott Long 	HPT_ASSERT(pCmd->cf_physical_sg);
2599d2bd3ab9SScott Long 
2600d2bd3ab9SScott Long 	if (error || nsegs == 0)
2601d2bd3ab9SScott Long 		panic("busdma error");
2602d2bd3ab9SScott Long 
2603d2bd3ab9SScott Long 	HPT_ASSERT(nsegs<= MAX_SG_DESCRIPTORS);
2604d2bd3ab9SScott Long 
2605d2bd3ab9SScott Long 	for (idx = 0; idx < nsegs; idx++, psg++) {
2606d2bd3ab9SScott Long 		psg->dSgAddress = (ULONG_PTR)(UCHAR *)segs[idx].ds_addr;
2607d2bd3ab9SScott Long 		psg->wSgSize = segs[idx].ds_len;
2608d2bd3ab9SScott Long 		psg->wSgFlag = (idx == nsegs-1)? SG_FLAG_EOT: 0;
2609d2bd3ab9SScott Long /*		KdPrint(("psg[%d]:add=%p,size=%x,flag=%x\n", idx, psg->dSgAddress,psg->wSgSize,psg->wSgFlag)); */
2610d2bd3ab9SScott Long 	}
2611d2bd3ab9SScott Long /*	psg[-1].wSgFlag = SG_FLAG_EOT; */
2612d2bd3ab9SScott Long 
2613d2bd3ab9SScott Long 	if (pCmd->cf_data_in) {
2614d2bd3ab9SScott Long 		bus_dmamap_sync(pAdapter->io_dma_parent, pmap->dma_map, BUS_DMASYNC_PREREAD);
2615d2bd3ab9SScott Long 	}
2616d2bd3ab9SScott Long 	else if (pCmd->cf_data_out) {
2617d2bd3ab9SScott Long 		bus_dmamap_sync(pAdapter->io_dma_parent, pmap->dma_map, BUS_DMASYNC_PREWRITE);
2618d2bd3ab9SScott Long 	}
2619d2bd3ab9SScott Long 
2620d2bd3ab9SScott Long 	ccb->ccb_h.timeout_ch = timeout(hpt_timeout, (caddr_t)ccb, 20*hz);
2621d2bd3ab9SScott Long 	pVDev->pfnSendCommand(_VBUS_P pCmd);
2622d2bd3ab9SScott Long 	CheckPendingCall(_VBUS_P0);
2623d2bd3ab9SScott Long }
2624d2bd3ab9SScott Long 
2625d2bd3ab9SScott Long 
2626d2bd3ab9SScott Long 
26271713e81bSScott Long static void HPTLIBAPI
26281713e81bSScott Long OsSendCommand(_VBUS_ARG union ccb *ccb)
26291713e81bSScott Long {
2630d2bd3ab9SScott Long 	PBUS_DMAMAP pmap = (PBUS_DMAMAP)ccb->ccb_adapter;
2631d2bd3ab9SScott Long 	IAL_ADAPTER_T *pAdapter = pmap->pAdapter;
2632d2bd3ab9SScott Long 	struct ccb_hdr *ccb_h = &ccb->ccb_h;
2633d2bd3ab9SScott Long 	struct ccb_scsiio *csio = &ccb->csio;
2634d2bd3ab9SScott Long 	PVDevice	pVDev = pAdapter->VBus.pVDevice[ccb_h->target_id];
26351713e81bSScott Long 
26367d9aed9cSScott Long 	KdPrintI(("OsSendCommand: ccb %p  cdb %x-%x-%x\n",
26371713e81bSScott Long 		ccb,
26381713e81bSScott Long 		*(ULONG *)&ccb->csio.cdb_io.cdb_bytes[0],
26391713e81bSScott Long 		*(ULONG *)&ccb->csio.cdb_io.cdb_bytes[4],
26401713e81bSScott Long 		*(ULONG *)&ccb->csio.cdb_io.cdb_bytes[8]
26411713e81bSScott Long 	));
26421713e81bSScott Long 
26431713e81bSScott Long 	pAdapter->outstandingCommands++;
26441713e81bSScott Long 
26451713e81bSScott Long 	if (pVDev == NULL || pVDev->vf_online == 0) {
26461713e81bSScott Long 		ccb->ccb_h.status = CAM_REQ_INVALID;
26471713e81bSScott Long 		ccb_done(ccb);
26481713e81bSScott Long 		goto Command_Complished;
26491713e81bSScott Long 	}
26501713e81bSScott Long 
26511713e81bSScott Long 	switch(ccb->csio.cdb_io.cdb_bytes[0])
26521713e81bSScott Long 	{
26531713e81bSScott Long 		case TEST_UNIT_READY:
26541713e81bSScott Long 		case START_STOP_UNIT:
26551713e81bSScott Long 		case SYNCHRONIZE_CACHE:
26561713e81bSScott Long 			/* FALLTHROUGH */
26571713e81bSScott Long 			ccb->ccb_h.status = CAM_REQ_CMP;
26581713e81bSScott Long 			break;
26591713e81bSScott Long 
26601713e81bSScott Long 		case INQUIRY:
26611713e81bSScott Long 			ZeroMemory(ccb->csio.data_ptr, ccb->csio.dxfer_len);
26621713e81bSScott Long 			SetInquiryData((PINQUIRYDATA)ccb->csio.data_ptr, pVDev);
26631713e81bSScott Long 			ccb_h->status = CAM_REQ_CMP;
26641713e81bSScott Long 			break;
26651713e81bSScott Long 
26661713e81bSScott Long 		case READ_CAPACITY:
26671713e81bSScott Long 		{
26681713e81bSScott Long 			UCHAR swip[4];
26691713e81bSScott Long 			/* Claim 512 byte blocks (big-endian). */
26701713e81bSScott Long 			((PREAD_CAPACITY_DATA)csio->data_ptr)->BytesPerBlock = 0x20000;
26711713e81bSScott Long 			*(ULONG*)swip = pVDev->VDeviceCapacity - 1;
26721713e81bSScott Long 			((PREAD_CAPACITY_DATA)csio->data_ptr)->LogicalBlockAddress =
26731713e81bSScott Long 				(swip[0] << 24) |  (swip[1] << 16) | (swip[2] << 8) | swip[3];
26741713e81bSScott Long 			ccb_h->status = CAM_REQ_CMP;
26751713e81bSScott Long 			break;
26761713e81bSScott Long 		}
26771713e81bSScott Long 
26781713e81bSScott Long 		case READ_6:
26791713e81bSScott Long 		case WRITE_6:
26801713e81bSScott Long 		case READ_10:
26811713e81bSScott Long 		case WRITE_10:
26821713e81bSScott Long 		case 0x13:
26831713e81bSScott Long 		case 0x2f:
26841713e81bSScott Long 		{
26851713e81bSScott Long 			UCHAR Cdb[16];
26861713e81bSScott Long 			UCHAR CdbLength;
26871713e81bSScott Long 			_VBUS_INST(pVDev->pVBus)
2688d2bd3ab9SScott Long 			PCommand pCmd = AllocateCommand(_VBUS_P0);
26891713e81bSScott Long 			HPT_ASSERT(pCmd);
26901713e81bSScott Long 
26911713e81bSScott Long 			CdbLength = csio->cdb_len;
2692d2bd3ab9SScott Long 			if ((ccb->ccb_h.flags & CAM_CDB_POINTER) != 0)
2693d2bd3ab9SScott Long 			{
2694d2bd3ab9SScott Long 				if ((ccb->ccb_h.flags & CAM_CDB_PHYS) == 0)
2695d2bd3ab9SScott Long 				{
26961713e81bSScott Long 					bcopy(csio->cdb_io.cdb_ptr, Cdb, CdbLength);
2697d2bd3ab9SScott Long 				}
2698d2bd3ab9SScott Long 				else
2699d2bd3ab9SScott Long 				{
27001713e81bSScott Long 					KdPrintE(("ERROR!!!\n"));
27011713e81bSScott Long 					ccb->ccb_h.status = CAM_REQ_INVALID;
27021713e81bSScott Long 					break;
27031713e81bSScott Long 				}
2704d2bd3ab9SScott Long 			}
2705d2bd3ab9SScott Long 			else
2706d2bd3ab9SScott Long 			{
27071713e81bSScott Long 				bcopy(csio->cdb_io.cdb_bytes, Cdb, CdbLength);
27081713e81bSScott Long 			}
27091713e81bSScott Long 
2710d2bd3ab9SScott Long 			pCmd->pOrgCommand = ccb;
27111713e81bSScott Long 			pCmd->pVDevice = pVDev;
27121713e81bSScott Long 			pCmd->pfnCompletion = fOsCommandDone;
27131713e81bSScott Long 			pCmd->pfnBuildSgl = fOsBuildSgl;
2714d2bd3ab9SScott Long 			pCmd->pSgTable = pmap->psg;
27151713e81bSScott Long 
2716d2bd3ab9SScott Long 			switch (Cdb[0])
2717d2bd3ab9SScott Long 			{
27181713e81bSScott Long 				case READ_6:
27191713e81bSScott Long 				case WRITE_6:
27201713e81bSScott Long 				case 0x13:
2721d2bd3ab9SScott Long 					pCmd->uCmd.Ide.Lba =  ((ULONG)Cdb[1] << 16) | ((ULONG)Cdb[2] << 8) | (ULONG)Cdb[3];
27221713e81bSScott Long 					pCmd->uCmd.Ide.nSectors = (USHORT) Cdb[4];
27231713e81bSScott Long 					break;
2724d2bd3ab9SScott Long 
27251713e81bSScott Long 				default:
2726d2bd3ab9SScott Long 					pCmd->uCmd.Ide.Lba = (ULONG)Cdb[5] | ((ULONG)Cdb[4] << 8) | ((ULONG)Cdb[3] << 16) | ((ULONG)Cdb[2] << 24);
2727d2bd3ab9SScott Long 					pCmd->uCmd.Ide.nSectors = (USHORT) Cdb[8] | ((USHORT)Cdb[7]<<8);
27281713e81bSScott Long 					break;
27291713e81bSScott Long 			}
27301713e81bSScott Long 
2731d2bd3ab9SScott Long 			switch (Cdb[0])
2732d2bd3ab9SScott Long 			{
27331713e81bSScott Long 				case READ_6:
27341713e81bSScott Long 				case READ_10:
27351713e81bSScott Long 					pCmd->uCmd.Ide.Command = IDE_COMMAND_READ;
27361713e81bSScott Long 					pCmd->cf_data_in = 1;
27371713e81bSScott Long 					break;
27381713e81bSScott Long 
27391713e81bSScott Long 				case WRITE_6:
27401713e81bSScott Long 				case WRITE_10:
27411713e81bSScott Long 					pCmd->uCmd.Ide.Command = IDE_COMMAND_WRITE;
27421713e81bSScott Long 					pCmd->cf_data_out = 1;
27431713e81bSScott Long 					break;
27441713e81bSScott Long 				case 0x13:
27451713e81bSScott Long 				case 0x2f:
27461713e81bSScott Long 					pCmd->uCmd.Ide.Command = IDE_COMMAND_VERIFY;
27471713e81bSScott Long 					break;
27481713e81bSScott Long 			}
2749d2bd3ab9SScott Long /*///////////////////////// */
2750d2bd3ab9SScott Long 			if (ccb->ccb_h.flags & CAM_SCATTER_VALID) {
2751d2bd3ab9SScott Long 				int idx;
2752d2bd3ab9SScott Long 				bus_dma_segment_t *sgList = (bus_dma_segment_t *)ccb->csio.data_ptr;
2753d2bd3ab9SScott Long 
2754d2bd3ab9SScott Long 				if (ccb->ccb_h.flags & CAM_SG_LIST_PHYS)
2755d2bd3ab9SScott Long 					pCmd->cf_physical_sg = 1;
2756d2bd3ab9SScott Long 
2757d2bd3ab9SScott Long 				for (idx = 0; idx < ccb->csio.sglist_cnt; idx++) {
2758d2bd3ab9SScott Long 					pCmd->pSgTable[idx].dSgAddress = (ULONG_PTR)(UCHAR *)sgList[idx].ds_addr;
2759d2bd3ab9SScott Long 					pCmd->pSgTable[idx].wSgSize = sgList[idx].ds_len;
2760d2bd3ab9SScott Long 					pCmd->pSgTable[idx].wSgFlag= (idx==ccb->csio.sglist_cnt-1)?SG_FLAG_EOT: 0;
2761d2bd3ab9SScott Long 				}
27621713e81bSScott Long 
27631713e81bSScott Long 				ccb->ccb_h.timeout_ch = timeout(hpt_timeout, (caddr_t)ccb, 20*hz);
27641713e81bSScott Long 				pVDev->pfnSendCommand(_VBUS_P pCmd);
2765d2bd3ab9SScott Long 			}
2766d2bd3ab9SScott Long 			else {
2767d2bd3ab9SScott Long 				int error;
2768d2bd3ab9SScott Long 				pCmd->cf_physical_sg = 1;
2769d2bd3ab9SScott Long 				error = bus_dmamap_load(pAdapter->io_dma_parent,
2770d2bd3ab9SScott Long 							pmap->dma_map,
2771d2bd3ab9SScott Long 							ccb->csio.data_ptr, ccb->csio.dxfer_len,
2772d2bd3ab9SScott Long 							hpt_io_dmamap_callback, pCmd,
2773d2bd3ab9SScott Long 					    		BUS_DMA_WAITOK
2774d2bd3ab9SScott Long 						);
2775d2bd3ab9SScott Long 				KdPrint(("bus_dmamap_load return %d\n", error));
2776d2bd3ab9SScott Long 				if (error && error!=EINPROGRESS) {
2777d2bd3ab9SScott Long 					hpt_printk(("bus_dmamap_load error %d\n", error));
2778d2bd3ab9SScott Long 					FreeCommand(_VBUS_P pCmd);
2779d2bd3ab9SScott Long 					ccb->ccb_h.status = CAM_REQ_CMP_ERR;
2780d2bd3ab9SScott Long 					dmamap_put(pmap);
2781d2bd3ab9SScott Long 					pAdapter->outstandingCommands--;
2782d2bd3ab9SScott Long 					xpt_done(ccb);
2783d2bd3ab9SScott Long 				}
2784d2bd3ab9SScott Long 			}
27851713e81bSScott Long 			goto Command_Complished;
27861713e81bSScott Long 		}
27871713e81bSScott Long 
27881713e81bSScott Long 		default:
27891713e81bSScott Long 			ccb->ccb_h.status = CAM_REQ_INVALID;
27901713e81bSScott Long 			break;
27911713e81bSScott Long 	}
27921713e81bSScott Long 	ccb_done(ccb);
27931713e81bSScott Long Command_Complished:
27941713e81bSScott Long 	CheckPendingCall(_VBUS_P0);
27951713e81bSScott Long 	return;
27961713e81bSScott Long }
27971713e81bSScott Long 
27981713e81bSScott Long static void HPTLIBAPI
27991713e81bSScott Long fOsCommandDone(_VBUS_ARG PCommand pCmd)
28001713e81bSScott Long {
2801d2bd3ab9SScott Long 	union ccb *ccb = pCmd->pOrgCommand;
2802d2bd3ab9SScott Long 	PBUS_DMAMAP pmap = (PBUS_DMAMAP)ccb->ccb_adapter;
2803d2bd3ab9SScott Long 	IAL_ADAPTER_T *pAdapter = pmap->pAdapter;
28041713e81bSScott Long 
2805d2bd3ab9SScott Long 	KdPrint(("fOsCommandDone(pcmd=%p, result=%d)\n", pCmd, pCmd->Result));
28061713e81bSScott Long 
28071713e81bSScott Long 	untimeout(hpt_timeout, (caddr_t)ccb, ccb->ccb_h.timeout_ch);
28081713e81bSScott Long 
28091713e81bSScott Long 	switch(pCmd->Result) {
28101713e81bSScott Long 	case RETURN_SUCCESS:
28111713e81bSScott Long 		ccb->ccb_h.status = CAM_REQ_CMP;
28121713e81bSScott Long 		break;
28131713e81bSScott Long 	case RETURN_BAD_DEVICE:
28141713e81bSScott Long 		ccb->ccb_h.status = CAM_DEV_NOT_THERE;
28151713e81bSScott Long 		break;
28161713e81bSScott Long 	case RETURN_DEVICE_BUSY:
28171713e81bSScott Long 		ccb->ccb_h.status = CAM_BUSY;
28181713e81bSScott Long 		break;
28191713e81bSScott Long 	case RETURN_INVALID_REQUEST:
28201713e81bSScott Long 		ccb->ccb_h.status = CAM_REQ_INVALID;
28211713e81bSScott Long 		break;
28221713e81bSScott Long 	case RETURN_SELECTION_TIMEOUT:
28231713e81bSScott Long 		ccb->ccb_h.status = CAM_SEL_TIMEOUT;
28241713e81bSScott Long 		break;
28251713e81bSScott Long 	case RETURN_RETRY:
28261713e81bSScott Long 		ccb->ccb_h.status = CAM_BUSY;
28271713e81bSScott Long 		break;
28281713e81bSScott Long 	default:
28291713e81bSScott Long 		ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
28301713e81bSScott Long 		break;
28311713e81bSScott Long 	}
28321713e81bSScott Long 
2833d2bd3ab9SScott Long 	if (pCmd->cf_data_in) {
2834d2bd3ab9SScott Long 		bus_dmamap_sync(pAdapter->io_dma_parent, pmap->dma_map, BUS_DMASYNC_POSTREAD);
28351713e81bSScott Long 	}
2836d2bd3ab9SScott Long 	else if (pCmd->cf_data_in) {
2837d2bd3ab9SScott Long 		bus_dmamap_sync(pAdapter->io_dma_parent, pmap->dma_map, BUS_DMASYNC_POSTWRITE);
2838d2bd3ab9SScott Long 	}
28391713e81bSScott Long 
2840d2bd3ab9SScott Long 	bus_dmamap_unload(pAdapter->io_dma_parent, pmap->dma_map);
2841d2bd3ab9SScott Long 
28421713e81bSScott Long 	FreeCommand(_VBUS_P pCmd);
28431713e81bSScott Long 	ccb_done(ccb);
28441713e81bSScott Long }
28451713e81bSScott Long 
28461713e81bSScott Long int
28471713e81bSScott Long hpt_queue_dpc(HPT_DPC dpc, IAL_ADAPTER_T * pAdapter, void *arg, UCHAR flags)
28481713e81bSScott Long {
28491713e81bSScott Long 	int p;
28501713e81bSScott Long 
28511713e81bSScott Long 	p = (DpcQueue_Last + 1) % MAX_DPC;
28521713e81bSScott Long 	if (p==DpcQueue_First) {
28531713e81bSScott Long 		KdPrint(("DPC Queue full!\n"));
28541713e81bSScott Long 		return -1;
28551713e81bSScott Long 	}
28561713e81bSScott Long 
28571713e81bSScott Long 	DpcQueue[DpcQueue_Last].dpc = dpc;
28581713e81bSScott Long 	DpcQueue[DpcQueue_Last].pAdapter = pAdapter;
28591713e81bSScott Long 	DpcQueue[DpcQueue_Last].arg = arg;
28601713e81bSScott Long 	DpcQueue[DpcQueue_Last].flags = flags;
28611713e81bSScott Long 	DpcQueue_Last = p;
28621713e81bSScott Long 
28631713e81bSScott Long 	return 0;
28641713e81bSScott Long }
28651713e81bSScott Long 
28661713e81bSScott Long #ifdef _RAID5N_
28671713e81bSScott Long /*
2868d2bd3ab9SScott Long  * Allocate memory above 16M, otherwise we may eat all low memory for ISA devices.
2869d2bd3ab9SScott Long  * How about the memory for 5081 request/response array and PRD table?
28701713e81bSScott Long  */
28711713e81bSScott Long void
28721713e81bSScott Long *os_alloc_page(_VBUS_ARG0)
28731713e81bSScott Long {
2874d2bd3ab9SScott Long 	return (void *)contigmalloc(0x1000, M_DEVBUF, M_NOWAIT, 0x1000000, 0xffffffff, PAGE_SIZE, 0ul);
28751713e81bSScott Long }
2876d2bd3ab9SScott Long 
28771713e81bSScott Long void
28781713e81bSScott Long *os_alloc_dma_page(_VBUS_ARG0)
28791713e81bSScott Long {
2880d2bd3ab9SScott Long 	return (void *)contigmalloc(0x1000, M_DEVBUF, M_NOWAIT, 0x1000000, 0xffffffff, PAGE_SIZE, 0ul);
28811713e81bSScott Long }
28821713e81bSScott Long 
28831713e81bSScott Long void
28841713e81bSScott Long os_free_page(_VBUS_ARG void *p)
28851713e81bSScott Long {
28861713e81bSScott Long 	contigfree(p, 0x1000, M_DEVBUF);
28871713e81bSScott Long }
28881713e81bSScott Long 
28891713e81bSScott Long void
28901713e81bSScott Long os_free_dma_page(_VBUS_ARG void *p)
28911713e81bSScott Long {
28921713e81bSScott Long 	contigfree(p, 0x1000, M_DEVBUF);
28931713e81bSScott Long }
28941713e81bSScott Long 
28951713e81bSScott Long void
28961713e81bSScott Long DoXor1(ULONG *p0, ULONG *p1, ULONG *p2, UINT nBytes)
28971713e81bSScott Long {
28981713e81bSScott Long 	UINT i;
2899d2bd3ab9SScott Long 	for (i = 0; i < nBytes / 4; i++) *p0++ = *p1++ ^ *p2++;
29001713e81bSScott Long }
29011713e81bSScott Long 
29021713e81bSScott Long void
29031713e81bSScott Long DoXor2(ULONG *p0, ULONG *p2, UINT nBytes)
29041713e81bSScott Long {
29051713e81bSScott Long 	UINT i;
2906d2bd3ab9SScott Long 	for (i = 0; i < nBytes / 4; i++) *p0++ ^= *p2++;
29071713e81bSScott Long }
29081713e81bSScott Long #endif
2909