xref: /freebsd/sys/dev/hptmv/entry.c (revision d45ce511db38167b35f58ee08a8ea9364547ac77)
1d2bd3ab9SScott Long /*
2d2bd3ab9SScott Long  * Copyright (c) 2004-2005 HighPoint Technologies, Inc.
31713e81bSScott Long  * All rights reserved.
41713e81bSScott Long  *
51713e81bSScott Long  * Redistribution and use in source and binary forms, with or without
61713e81bSScott Long  * modification, are permitted provided that the following conditions
71713e81bSScott Long  * are met:
81713e81bSScott Long  * 1. Redistributions of source code must retain the above copyright
91713e81bSScott Long  *    notice, this list of conditions and the following disclaimer.
101713e81bSScott Long  * 2. Redistributions in binary form must reproduce the above copyright
111713e81bSScott Long  *    notice, this list of conditions and the following disclaimer in the
121713e81bSScott Long  *    documentation and/or other materials provided with the distribution.
131713e81bSScott Long  *
141713e81bSScott Long  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
151713e81bSScott Long  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
161713e81bSScott Long  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
171713e81bSScott Long  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
181713e81bSScott Long  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
191713e81bSScott Long  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
201713e81bSScott Long  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
211713e81bSScott Long  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
221713e81bSScott Long  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
231713e81bSScott Long  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
241713e81bSScott Long  * SUCH DAMAGE.
251713e81bSScott Long  */
26d2bd3ab9SScott Long 
27f3b080e6SMarius Strobl #include <sys/cdefs.h>
28f3b080e6SMarius Strobl __FBSDID("$FreeBSD$");
29f3b080e6SMarius Strobl 
301713e81bSScott Long #include <sys/param.h>
311713e81bSScott Long #include <sys/systm.h>
321713e81bSScott Long #include <sys/kernel.h>
331713e81bSScott Long #include <sys/bus.h>
341713e81bSScott Long #include <sys/malloc.h>
351713e81bSScott Long #include <sys/resource.h>
361713e81bSScott Long #include <sys/time.h>
371713e81bSScott Long #include <sys/callout.h>
381713e81bSScott Long #include <sys/signalvar.h>
391713e81bSScott Long #include <sys/eventhandler.h>
401713e81bSScott Long #include <sys/proc.h>
411713e81bSScott Long #include <sys/kthread.h>
421713e81bSScott Long 
43d2bd3ab9SScott Long #if (__FreeBSD_version >= 500000)
44d2bd3ab9SScott Long #include <sys/mutex.h>
45d2bd3ab9SScott Long #include <sys/module.h>
46d2bd3ab9SScott Long #endif
47d2bd3ab9SScott Long 
48d2bd3ab9SScott Long #if (__FreeBSD_version >= 500000)
491713e81bSScott Long #include <dev/pci/pcireg.h>
501713e81bSScott Long #include <dev/pci/pcivar.h>
51d2bd3ab9SScott Long #else
52d2bd3ab9SScott Long #include <pci/pcireg.h>
53d2bd3ab9SScott Long #include <pci/pcivar.h>
54d2bd3ab9SScott Long #include <sys/wait.h>
55d2bd3ab9SScott Long #include <sys/sysproto.h>
56d2bd3ab9SScott Long #endif
57d2bd3ab9SScott Long 
58d2bd3ab9SScott Long #ifndef __KERNEL__
59d2bd3ab9SScott Long #define __KERNEL__
60d2bd3ab9SScott Long #endif
611713e81bSScott Long 
621713e81bSScott Long #include <dev/hptmv/global.h>
631713e81bSScott Long #include <dev/hptmv/hptintf.h>
641713e81bSScott Long #include <dev/hptmv/osbsd.h>
65f7f3900bSScott Long #include <dev/hptmv/access601.h>
661713e81bSScott Long 
67d2bd3ab9SScott Long 
681713e81bSScott Long #ifdef DEBUG
691713e81bSScott Long #ifdef DEBUG_LEVEL
701713e81bSScott Long int hpt_dbg_level = DEBUG_LEVEL;
711713e81bSScott Long #else
721713e81bSScott Long int hpt_dbg_level = 0;
731713e81bSScott Long #endif
741713e81bSScott Long #endif
751713e81bSScott Long 
761713e81bSScott Long #define MV_ERROR printf
77d2bd3ab9SScott Long 
781713e81bSScott Long /*
791713e81bSScott Long  * CAM SIM entry points
801713e81bSScott Long  */
811713e81bSScott Long static int 	hpt_probe (device_t dev);
82d2bd3ab9SScott Long static void launch_worker_thread(void);
831713e81bSScott Long static int 	hpt_attach(device_t dev);
841713e81bSScott Long static int 	hpt_detach(device_t dev);
851713e81bSScott Long static int 	hpt_shutdown(device_t dev);
861713e81bSScott Long static void hpt_poll(struct cam_sim *sim);
871713e81bSScott Long static void hpt_intr(void *arg);
88d2bd3ab9SScott Long static void hpt_async(void *callback_arg, u_int32_t code, struct cam_path *path, void *arg);
891713e81bSScott Long static void hpt_action(struct cam_sim *sim, union ccb *ccb);
90d2bd3ab9SScott Long 
91d2bd3ab9SScott Long static device_method_t driver_methods[] = {
92d2bd3ab9SScott Long 	/* Device interface */
93d2bd3ab9SScott Long 	DEVMETHOD(device_probe,		hpt_probe),
94d2bd3ab9SScott Long 	DEVMETHOD(device_attach,	hpt_attach),
95d2bd3ab9SScott Long 	DEVMETHOD(device_detach,	hpt_detach),
96d2bd3ab9SScott Long 
97cd3ef666SXin LI 	DEVMETHOD(device_shutdown,	hpt_shutdown),
98f3b080e6SMarius Strobl 	DEVMETHOD_END
99d2bd3ab9SScott Long };
100d2bd3ab9SScott Long 
101d2bd3ab9SScott Long static driver_t hpt_pci_driver = {
102d2bd3ab9SScott Long 	__str(PROC_DIR_NAME),
103d2bd3ab9SScott Long 	driver_methods,
104d2bd3ab9SScott Long 	sizeof(IAL_ADAPTER_T)
105d2bd3ab9SScott Long };
106d2bd3ab9SScott Long 
107d2bd3ab9SScott Long static devclass_t	hpt_devclass;
108d2bd3ab9SScott Long 
109d2bd3ab9SScott Long #define __DRIVER_MODULE(p1, p2, p3, p4, p5, p6) DRIVER_MODULE(p1, p2, p3, p4, p5, p6)
110d2bd3ab9SScott Long __DRIVER_MODULE(PROC_DIR_NAME, pci, hpt_pci_driver, hpt_devclass, 0, 0);
111*d45ce511SEitan Adler MODULE_DEPEND(PROC_DIR_NAME, cam, 1, 1, 1);
112d2bd3ab9SScott Long 
113d2bd3ab9SScott Long #define ccb_ccb_ptr spriv_ptr0
114d2bd3ab9SScott Long #define ccb_adapter ccb_h.spriv_ptr1
115d2bd3ab9SScott Long 
1161713e81bSScott Long static void SetInquiryData(PINQUIRYDATA inquiryData, PVDevice pVDev);
1171713e81bSScott Long static void HPTLIBAPI OsSendCommand (_VBUS_ARG union ccb * ccb);
1181713e81bSScott Long static void HPTLIBAPI fOsCommandDone(_VBUS_ARG PCommand pCmd);
1191713e81bSScott Long static void ccb_done(union ccb *ccb);
1201713e81bSScott Long static void hpt_queue_ccb(union ccb **ccb_Q, union ccb *ccb);
1211713e81bSScott Long static void hpt_free_ccb(union ccb **ccb_Q, union ccb *ccb);
1221713e81bSScott Long static void	hptmv_free_edma_queues(IAL_ADAPTER_T *pAdapter);
1231713e81bSScott Long static void	hptmv_free_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum);
1241713e81bSScott Long static void	handleEdmaError(_VBUS_ARG PCommand pCmd);
1251713e81bSScott Long static int	hptmv_init_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum);
1261713e81bSScott Long static int	fResetActiveCommands(PVBus _vbus_p);
1271713e81bSScott Long static void	fRegisterVdevice(IAL_ADAPTER_T *pAdapter);
1281713e81bSScott Long static int	hptmv_allocate_edma_queues(IAL_ADAPTER_T *pAdapter);
1291713e81bSScott Long static void	hptmv_handle_event_disconnect(void *data);
1301713e81bSScott Long static void	hptmv_handle_event_connect(void *data);
1311713e81bSScott Long static int	start_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum);
1321713e81bSScott Long static void	init_vdev_params(IAL_ADAPTER_T *pAdapter, MV_U8 channel);
1331713e81bSScott Long static int	hptmv_parse_identify_results(MV_SATA_CHANNEL *pMvSataChannel);
1341713e81bSScott Long static int HPTLIBAPI fOsBuildSgl(_VBUS_ARG PCommand pCmd, FPSCAT_GATH pSg,
1351713e81bSScott Long     int logical);
1361713e81bSScott Long static MV_BOOLEAN CommandCompletionCB(MV_SATA_ADAPTER *pMvSataAdapter,
1371713e81bSScott Long     MV_U8 channelNum, MV_COMPLETION_TYPE comp_type, MV_VOID_PTR commandId,
1381713e81bSScott Long     MV_U16 responseFlags, MV_U32 timeStamp,
1391713e81bSScott Long     MV_STORAGE_DEVICE_REGISTERS *registerStruct);
1401713e81bSScott Long static MV_BOOLEAN hptmv_event_notify(MV_SATA_ADAPTER *pMvSataAdapter,
1411713e81bSScott Long     MV_EVENT_TYPE eventType, MV_U32 param1, MV_U32 param2);
1421713e81bSScott Long 
1431713e81bSScott Long #define ccb_ccb_ptr spriv_ptr0
1441713e81bSScott Long #define ccb_adapter ccb_h.spriv_ptr1
1451713e81bSScott Long 
1461713e81bSScott Long IAL_ADAPTER_T *gIal_Adapter = 0;
1471713e81bSScott Long IAL_ADAPTER_T *pCurAdapter = 0;
148d2bd3ab9SScott Long static MV_SATA_CHANNEL gMvSataChannels[MAX_VBUS][MV_SATA_CHANNELS_NUM];
1491713e81bSScott Long 
1501713e81bSScott Long typedef struct st_HPT_DPC {
1511713e81bSScott Long 	IAL_ADAPTER_T *pAdapter;
1521713e81bSScott Long 	void (*dpc)(IAL_ADAPTER_T *, void *, UCHAR);
1531713e81bSScott Long 	void *arg;
1541713e81bSScott Long 	UCHAR flags;
1551713e81bSScott Long } ST_HPT_DPC;
1561713e81bSScott Long 
1571713e81bSScott Long #define MAX_DPC 16
1581713e81bSScott Long UCHAR DPC_Request_Nums = 0;
1591713e81bSScott Long static ST_HPT_DPC DpcQueue[MAX_DPC];
1601713e81bSScott Long static int DpcQueue_First=0;
1611713e81bSScott Long static int DpcQueue_Last = 0;
1621713e81bSScott Long 
16364470755SXin LI char DRIVER_VERSION[] = "v1.16";
1641713e81bSScott Long 
165d2bd3ab9SScott Long #if (__FreeBSD_version >= 500000)
166d2bd3ab9SScott Long static struct mtx driver_lock;
167d2bd3ab9SScott Long intrmask_t lock_driver()
168d2bd3ab9SScott Long {
1691713e81bSScott Long 
170d2bd3ab9SScott Long 	intrmask_t spl = 0;
1714ed23cf2SJohn Baldwin 	mtx_lock(&driver_lock);
172d2bd3ab9SScott Long 	return spl;
173d2bd3ab9SScott Long }
174d2bd3ab9SScott Long void unlock_driver(intrmask_t spl)
175d2bd3ab9SScott Long {
1764ed23cf2SJohn Baldwin 	mtx_unlock(&driver_lock);
177d2bd3ab9SScott Long }
178d2bd3ab9SScott Long #else
179d2bd3ab9SScott Long static int driver_locked = 0;
180d2bd3ab9SScott Long intrmask_t lock_driver()
1811713e81bSScott Long {
1821713e81bSScott Long 	intrmask_t spl = splcam();
183d2bd3ab9SScott Long loop:
184d2bd3ab9SScott Long 	while (driver_locked)
185d2bd3ab9SScott Long 		tsleep(&driver_locked, PRIBIO, "hptlck", hz);
186d2bd3ab9SScott Long 	atomic_add_int(&driver_locked, 1);
187d2bd3ab9SScott Long 	if (driver_locked>1) {
188d2bd3ab9SScott Long 		atomic_subtract_int(&driver_locked, 1);
189d2bd3ab9SScott Long 		goto loop;
190d2bd3ab9SScott Long 	}
1911713e81bSScott Long 	return spl;
1921713e81bSScott Long }
1931713e81bSScott Long 
194d2bd3ab9SScott Long void unlock_driver(intrmask_t spl)
1951713e81bSScott Long {
196d2bd3ab9SScott Long 	atomic_subtract_int(&driver_locked, 1);
197d2bd3ab9SScott Long 	if (driver_locked==0) {
198d2bd3ab9SScott Long 		wakeup(&driver_locked);
199d2bd3ab9SScott Long 	}
2001713e81bSScott Long 	splx(spl);
2011713e81bSScott Long }
202d2bd3ab9SScott Long #endif
2031713e81bSScott Long 
2041713e81bSScott Long /*******************************************************************************
2051713e81bSScott Long  *	Name:	hptmv_free_channel
2061713e81bSScott Long  *
2071713e81bSScott Long  *	Description:	free allocated queues for the given channel
2081713e81bSScott Long  *
20964470755SXin LI  *	Parameters:    	pMvSataAdapter - pointer to the RR18xx controler this
2101713e81bSScott Long  * 					channel connected to.
2111713e81bSScott Long  *			channelNum - channel number.
2121713e81bSScott Long  *
2131713e81bSScott Long  ******************************************************************************/
2141713e81bSScott Long static void
2151713e81bSScott Long hptmv_free_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum)
2161713e81bSScott Long {
2171713e81bSScott Long 	HPT_ASSERT(channelNum < MV_SATA_CHANNELS_NUM);
2181713e81bSScott Long 	pAdapter->mvSataAdapter.sataChannel[channelNum] = NULL;
219d2bd3ab9SScott Long }
2201713e81bSScott Long 
221d2bd3ab9SScott Long static void failDevice(PVDevice pVDev)
2221713e81bSScott Long {
223d2bd3ab9SScott Long 	PVBus _vbus_p = pVDev->pVBus;
224d2bd3ab9SScott Long 	IAL_ADAPTER_T *pAdapter = (IAL_ADAPTER_T *)_vbus_p->OsExt;
225d2bd3ab9SScott Long 
2261713e81bSScott Long 	pVDev->u.disk.df_on_line = 0;
2271713e81bSScott Long 	pVDev->vf_online = 0;
228d2bd3ab9SScott Long 	if (pVDev->pfnDeviceFailed)
229d2bd3ab9SScott Long 		CallWhenIdle(_VBUS_P (DPC_PROC)pVDev->pfnDeviceFailed, pVDev);
230d2bd3ab9SScott Long 
231d2bd3ab9SScott Long 	fNotifyGUI(ET_DEVICE_REMOVED, pVDev);
232d2bd3ab9SScott Long 
233d2bd3ab9SScott Long #ifndef FOR_DEMO
234d2bd3ab9SScott Long 	if (pAdapter->ver_601==2 && !pAdapter->beeping) {
235d2bd3ab9SScott Long 		pAdapter->beeping = 1;
236d2bd3ab9SScott Long 		BeepOn(pAdapter->mvSataAdapter.adapterIoBaseAddress);
237d2bd3ab9SScott Long 		set_fail_led(&pAdapter->mvSataAdapter, pVDev->u.disk.mv->channelNumber, 1);
2381713e81bSScott Long 	}
239d2bd3ab9SScott Long #endif
2401713e81bSScott Long }
2411713e81bSScott Long 
2421713e81bSScott Long int MvSataResetChannel(MV_SATA_ADAPTER *pMvSataAdapter, MV_U8 channel);
2431713e81bSScott Long 
2441713e81bSScott Long static void
2451713e81bSScott Long handleEdmaError(_VBUS_ARG PCommand pCmd)
2461713e81bSScott Long {
2471713e81bSScott Long 	PDevice pDevice = &pCmd->pVDevice->u.disk;
2481713e81bSScott Long 	MV_SATA_ADAPTER * pSataAdapter = pDevice->mv->mvSataAdapter;
2491713e81bSScott Long 
2501713e81bSScott Long 	if (!pDevice->df_on_line) {
2511713e81bSScott Long 		KdPrint(("Device is offline"));
2521713e81bSScott Long 		pCmd->Result = RETURN_BAD_DEVICE;
2531713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
2541713e81bSScott Long 		return;
2551713e81bSScott Long 	}
2561713e81bSScott Long 
2571713e81bSScott Long 	if (pCmd->RetryCount++>5) {
258d2bd3ab9SScott Long 		hpt_printk(("too many retries on channel(%d)\n", pDevice->mv->channelNumber));
259d2bd3ab9SScott Long failed:
260d2bd3ab9SScott Long 		failDevice(pCmd->pVDevice);
2611713e81bSScott Long 		pCmd->Result = RETURN_IDE_ERROR;
2621713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
2631713e81bSScott Long 		return;
2641713e81bSScott Long 	}
265d2bd3ab9SScott Long 
266d2bd3ab9SScott Long 	/* reset the channel and retry the command */
267d2bd3ab9SScott Long 	if (MvSataResetChannel(pSataAdapter, pDevice->mv->channelNumber))
268d2bd3ab9SScott Long 		goto failed;
269d2bd3ab9SScott Long 
270d2bd3ab9SScott Long 	fNotifyGUI(ET_DEVICE_ERROR, Map2pVDevice(pDevice));
271d2bd3ab9SScott Long 
272d2bd3ab9SScott Long 	hpt_printk(("Retry on channel(%d)\n", pDevice->mv->channelNumber));
2731713e81bSScott Long 	fDeviceSendCommand(_VBUS_P pCmd);
2741713e81bSScott Long }
2751713e81bSScott Long 
2761713e81bSScott Long /****************************************************************
2771713e81bSScott Long  *	Name:	hptmv_init_channel
2781713e81bSScott Long  *
279d2bd3ab9SScott Long  *	Description:	allocate request and response queues for the EDMA of the
280d2bd3ab9SScott Long  *					given channel and sets other fields.
281d2bd3ab9SScott Long  *
2821713e81bSScott Long  *	Parameters:
2831713e81bSScott Long  *		pAdapter - pointer to the emulated adapter data structure
2841713e81bSScott Long  *		channelNum - channel number.
2851713e81bSScott Long  *	Return:	0 on success, otherwise on failure
2861713e81bSScott Long  ****************************************************************/
2871713e81bSScott Long static int
2881713e81bSScott Long hptmv_init_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum)
2891713e81bSScott Long {
2901713e81bSScott Long 	MV_SATA_CHANNEL *pMvSataChannel;
2911713e81bSScott Long 	dma_addr_t    req_dma_addr;
2921713e81bSScott Long 	dma_addr_t    rsp_dma_addr;
2931713e81bSScott Long 
2941713e81bSScott Long 	if (channelNum >= MV_SATA_CHANNELS_NUM)
2951713e81bSScott Long 	{
29664470755SXin LI 		MV_ERROR("RR18xx[%d]: Bad channelNum=%d",
2971713e81bSScott Long 				 pAdapter->mvSataAdapter.adapterId, channelNum);
2981713e81bSScott Long 		return -1;
2991713e81bSScott Long 	}
3001713e81bSScott Long 
301d2bd3ab9SScott Long 	pMvSataChannel = &gMvSataChannels[pAdapter->mvSataAdapter.adapterId][channelNum];
3021713e81bSScott Long 	pAdapter->mvSataAdapter.sataChannel[channelNum] = pMvSataChannel;
3031713e81bSScott Long 	pMvSataChannel->channelNumber = channelNum;
3041713e81bSScott Long 	pMvSataChannel->lba48Address = MV_FALSE;
3051713e81bSScott Long 	pMvSataChannel->maxReadTransfer = MV_FALSE;
3061713e81bSScott Long 
307d2bd3ab9SScott Long 	pMvSataChannel->requestQueue = (struct mvDmaRequestQueueEntry *)
308d2bd3ab9SScott Long 								   (pAdapter->requestsArrayBaseAlignedAddr + (channelNum * MV_EDMA_REQUEST_QUEUE_SIZE));
309d2bd3ab9SScott Long 	req_dma_addr = pAdapter->requestsArrayBaseDmaAlignedAddr + (channelNum * MV_EDMA_REQUEST_QUEUE_SIZE);
3101713e81bSScott Long 
3111713e81bSScott Long 
312d2bd3ab9SScott Long 	KdPrint(("requestQueue addr is 0x%llX", (HPT_U64)(ULONG_PTR)req_dma_addr));
3131713e81bSScott Long 
3141713e81bSScott Long 	/* check the 1K alignment of the request queue*/
3151713e81bSScott Long 	if (req_dma_addr & 0x3ff)
3161713e81bSScott Long 	{
31764470755SXin LI 		MV_ERROR("RR18xx[%d]: request queue allocated isn't 1 K aligned,"
318d2bd3ab9SScott Long 				 " dma_addr=%llx channel=%d\n", pAdapter->mvSataAdapter.adapterId,
319d2bd3ab9SScott Long 				 (HPT_U64)(ULONG_PTR)req_dma_addr, channelNum);
3201713e81bSScott Long 		return -1;
3211713e81bSScott Long 	}
3221713e81bSScott Long 	pMvSataChannel->requestQueuePciLowAddress = req_dma_addr;
3231713e81bSScott Long 	pMvSataChannel->requestQueuePciHiAddress = 0;
32464470755SXin LI 	KdPrint(("RR18xx[%d,%d]: request queue allocated: 0x%p",
3251713e81bSScott Long 			  pAdapter->mvSataAdapter.adapterId, channelNum,
3261713e81bSScott Long 			  pMvSataChannel->requestQueue));
327d2bd3ab9SScott Long 	pMvSataChannel->responseQueue = (struct mvDmaResponseQueueEntry *)
328d2bd3ab9SScott Long 									(pAdapter->responsesArrayBaseAlignedAddr + (channelNum * MV_EDMA_RESPONSE_QUEUE_SIZE));
329d2bd3ab9SScott Long 	rsp_dma_addr = pAdapter->responsesArrayBaseDmaAlignedAddr + (channelNum * MV_EDMA_RESPONSE_QUEUE_SIZE);
3301713e81bSScott Long 
3311713e81bSScott Long 	/* check the 256 alignment of the response queue*/
3321713e81bSScott Long 	if (rsp_dma_addr & 0xff)
3331713e81bSScott Long 	{
33464470755SXin LI 		MV_ERROR("RR18xx[%d,%d]: response queue allocated isn't 256 byte "
335d2bd3ab9SScott Long 				 "aligned, dma_addr=%llx\n",
336d2bd3ab9SScott Long 				 pAdapter->mvSataAdapter.adapterId, channelNum, (HPT_U64)(ULONG_PTR)rsp_dma_addr);
3371713e81bSScott Long 		return -1;
3381713e81bSScott Long 	}
3391713e81bSScott Long 	pMvSataChannel->responseQueuePciLowAddress = rsp_dma_addr;
3401713e81bSScott Long 	pMvSataChannel->responseQueuePciHiAddress = 0;
34164470755SXin LI 	KdPrint(("RR18xx[%d,%d]: response queue allocated: 0x%p",
3421713e81bSScott Long 			  pAdapter->mvSataAdapter.adapterId, channelNum,
3431713e81bSScott Long 			  pMvSataChannel->responseQueue));
3441713e81bSScott Long 
3451713e81bSScott Long 	pAdapter->mvChannel[channelNum].online = MV_TRUE;
3461713e81bSScott Long 	return 0;
3471713e81bSScott Long }
3481713e81bSScott Long 
3491713e81bSScott Long /******************************************************************************
3501713e81bSScott Long  *	Name: hptmv_parse_identify_results
3511713e81bSScott Long  *
352d2bd3ab9SScott Long  *	Description:	this functions parses the identify command results, checks
35364470755SXin LI  *					that the connected deives can be accesed by RR18xx EDMA,
354d2bd3ab9SScott Long  *					and updates the channel stucture accordingly.
355d2bd3ab9SScott Long  *
3561713e81bSScott Long  *	Parameters:     pMvSataChannel, pointer to the channel data structure.
3571713e81bSScott Long  *
3581713e81bSScott Long  *	Returns:       	=0 ->success, < 0 ->failure.
3591713e81bSScott Long  *
3601713e81bSScott Long  ******************************************************************************/
3611713e81bSScott Long static int
3621713e81bSScott Long hptmv_parse_identify_results(MV_SATA_CHANNEL *pMvSataChannel)
3631713e81bSScott Long {
3641713e81bSScott Long 	MV_U16  *iden = pMvSataChannel->identifyDevice;
3651713e81bSScott Long 
3661713e81bSScott Long 	/*LBA addressing*/
367d2bd3ab9SScott Long 	if (! (iden[IDEN_CAPACITY_1_OFFSET] & 0x200))
368d2bd3ab9SScott Long 	{
3691713e81bSScott Long 		KdPrint(("IAL Error in IDENTIFY info: LBA not supported\n"));
3701713e81bSScott Long 		return -1;
371d2bd3ab9SScott Long 	}
372d2bd3ab9SScott Long 	else
373d2bd3ab9SScott Long 	{
3741713e81bSScott Long 		KdPrint(("%25s - %s\n", "Capabilities", "LBA supported"));
3751713e81bSScott Long 	}
3761713e81bSScott Long 	/*DMA support*/
377d2bd3ab9SScott Long 	if (! (iden[IDEN_CAPACITY_1_OFFSET] & 0x100))
378d2bd3ab9SScott Long 	{
3791713e81bSScott Long 		KdPrint(("IAL Error in IDENTIFY info: DMA not supported\n"));
3801713e81bSScott Long 		return -1;
381d2bd3ab9SScott Long 	}
382d2bd3ab9SScott Long 	else
383d2bd3ab9SScott Long 	{
3841713e81bSScott Long 		KdPrint(("%25s - %s\n", "Capabilities", "DMA supported"));
3851713e81bSScott Long 	}
3861713e81bSScott Long 	/* PIO */
387d2bd3ab9SScott Long 	if ((iden[IDEN_VALID] & 2) == 0)
388d2bd3ab9SScott Long 	{
389d2bd3ab9SScott Long 		KdPrint(("IAL Error in IDENTIFY info: not able to find PIO mode\n"));
3901713e81bSScott Long 		return -1;
3911713e81bSScott Long 	}
3921713e81bSScott Long 	KdPrint(("%25s - 0x%02x\n", "PIO modes supported",
3931713e81bSScott Long 			  iden[IDEN_PIO_MODE_SPPORTED] & 0xff));
3941713e81bSScott Long 
3951713e81bSScott Long 	/*UDMA*/
396d2bd3ab9SScott Long 	if ((iden[IDEN_VALID] & 4) == 0)
397d2bd3ab9SScott Long 	{
398d2bd3ab9SScott Long 		KdPrint(("IAL Error in IDENTIFY info: not able to find UDMA mode\n"));
3991713e81bSScott Long 		return -1;
4001713e81bSScott Long 	}
4011713e81bSScott Long 
4021713e81bSScott Long 	/* 48 bit address */
403d2bd3ab9SScott Long 	if ((iden[IDEN_SUPPORTED_COMMANDS2] & 0x400))
404d2bd3ab9SScott Long 	{
4051713e81bSScott Long 		KdPrint(("%25s - %s\n", "LBA48 addressing", "supported"));
4061713e81bSScott Long 		pMvSataChannel->lba48Address = MV_TRUE;
407d2bd3ab9SScott Long 	}
408d2bd3ab9SScott Long 	else
409d2bd3ab9SScott Long 	{
4101713e81bSScott Long 		KdPrint(("%25s - %s\n", "LBA48 addressing", "Not supported"));
4111713e81bSScott Long 		pMvSataChannel->lba48Address = MV_FALSE;
4121713e81bSScott Long 	}
4131713e81bSScott Long 	return 0;
4141713e81bSScott Long }
4151713e81bSScott Long 
4161713e81bSScott Long static void
4171713e81bSScott Long init_vdev_params(IAL_ADAPTER_T *pAdapter, MV_U8 channel)
4181713e81bSScott Long {
419d2bd3ab9SScott Long 	PVDevice pVDev = &pAdapter->VDevices[channel];
420d2bd3ab9SScott Long 	MV_SATA_CHANNEL *pMvSataChannel = pAdapter->mvSataAdapter.sataChannel[channel];
421d2bd3ab9SScott Long 	MV_U16_PTR IdentifyData = pMvSataChannel->identifyDevice;
4221713e81bSScott Long 
4231713e81bSScott Long 	pMvSataChannel->outstandingCommands = 0;
4241713e81bSScott Long 
4251713e81bSScott Long 	pVDev->u.disk.mv         = pMvSataChannel;
4261713e81bSScott Long 	pVDev->u.disk.df_on_line = 1;
4271713e81bSScott Long 	pVDev->u.disk.pVBus      = &pAdapter->VBus;
4281713e81bSScott Long 	pVDev->pVBus             = &pAdapter->VBus;
4291713e81bSScott Long 
4301713e81bSScott Long #ifdef SUPPORT_48BIT_LBA
4311713e81bSScott Long 	if (pMvSataChannel->lba48Address == MV_TRUE)
432d2bd3ab9SScott Long 		pVDev->u.disk.dDeRealCapacity = ((IdentifyData[101]<<16) | IdentifyData[100]) - 1;
4331713e81bSScott Long 	else
4341713e81bSScott Long #endif
4351713e81bSScott Long 	if(IdentifyData[53] & 1) {
4361713e81bSScott Long 	pVDev->u.disk.dDeRealCapacity =
437d2bd3ab9SScott Long 	  (((IdentifyData[58]<<16 | IdentifyData[57]) < (IdentifyData[61]<<16 | IdentifyData[60])) ?
4381713e81bSScott Long 		  (IdentifyData[61]<<16 | IdentifyData[60]) :
4391713e81bSScott Long 				(IdentifyData[58]<<16 | IdentifyData[57])) - 1;
4401713e81bSScott Long 	} else
4411713e81bSScott Long 		pVDev->u.disk.dDeRealCapacity =
4421713e81bSScott Long 				 (IdentifyData[61]<<16 | IdentifyData[60]) - 1;
4431713e81bSScott Long 
4441713e81bSScott Long 	pVDev->u.disk.bDeUsable_Mode = pVDev->u.disk.bDeModeSetting =
445d2bd3ab9SScott Long 		pAdapter->mvChannel[channel].maxPioModeSupported - MV_ATA_TRANSFER_PIO_0;
4461713e81bSScott Long 
4471713e81bSScott Long 	if (pAdapter->mvChannel[channel].maxUltraDmaModeSupported!=0xFF) {
4481713e81bSScott Long 		pVDev->u.disk.bDeUsable_Mode = pVDev->u.disk.bDeModeSetting =
449d2bd3ab9SScott Long 			pAdapter->mvChannel[channel].maxUltraDmaModeSupported - MV_ATA_TRANSFER_UDMA_0 + 8;
4501713e81bSScott Long 	}
4511713e81bSScott Long }
4521713e81bSScott Long 
453d2bd3ab9SScott Long static void device_change(IAL_ADAPTER_T *pAdapter , MV_U8 channelIndex, int plugged)
4541713e81bSScott Long {
4551713e81bSScott Long 	PVDevice pVDev;
456d2bd3ab9SScott Long 	MV_SATA_ADAPTER  *pMvSataAdapter = &pAdapter->mvSataAdapter;
457d2bd3ab9SScott Long 	MV_SATA_CHANNEL  *pMvSataChannel = pMvSataAdapter->sataChannel[channelIndex];
4581713e81bSScott Long 
459d2bd3ab9SScott Long 	if (!pMvSataChannel) return;
4601713e81bSScott Long 
461d2bd3ab9SScott Long 	if (plugged)
462d2bd3ab9SScott Long 	{
4631713e81bSScott Long 		pVDev = &(pAdapter->VDevices[channelIndex]);
4641713e81bSScott Long 		init_vdev_params(pAdapter, channelIndex);
4651713e81bSScott Long 
4661713e81bSScott Long 		pVDev->VDeviceType = pVDev->u.disk.df_atapi? VD_ATAPI :
467d2bd3ab9SScott Long 			pVDev->u.disk.df_removable_drive? VD_REMOVABLE : VD_SINGLE_DISK;
4681713e81bSScott Long 
469d2bd3ab9SScott Long 		pVDev->VDeviceCapacity = pVDev->u.disk.dDeRealCapacity-SAVE_FOR_RAID_INFO;
4701713e81bSScott Long 		pVDev->pfnSendCommand = pfnSendCommand[pVDev->VDeviceType];
4711713e81bSScott Long 		pVDev->pfnDeviceFailed = pfnDeviceFailed[pVDev->VDeviceType];
4721713e81bSScott Long 		pVDev->vf_online = 1;
4731713e81bSScott Long 
4741713e81bSScott Long #ifdef SUPPORT_ARRAY
475d2bd3ab9SScott Long 		if(pVDev->pParent)
476d2bd3ab9SScott Long 		{
4771713e81bSScott Long 			int iMember;
478d2bd3ab9SScott Long 			for(iMember = 0; iMember < 	pVDev->pParent->u.array.bArnMember; iMember++)
4791713e81bSScott Long 				if((PVDevice)pVDev->pParent->u.array.pMember[iMember] == pVDev)
4801713e81bSScott Long 					pVDev->pParent->u.array.pMember[iMember] = NULL;
4811713e81bSScott Long 			pVDev->pParent = NULL;
4821713e81bSScott Long 		}
4831713e81bSScott Long #endif
4841713e81bSScott Long 		fNotifyGUI(ET_DEVICE_PLUGGED,pVDev);
4851713e81bSScott Long 		fCheckBootable(pVDev);
4861713e81bSScott Long 		RegisterVDevice(pVDev);
4871713e81bSScott Long 
4881713e81bSScott Long #ifndef FOR_DEMO
4891713e81bSScott Long 		if (pAdapter->beeping) {
4901713e81bSScott Long 			pAdapter->beeping = 0;
4911713e81bSScott Long 			BeepOff(pAdapter->mvSataAdapter.adapterIoBaseAddress);
4921713e81bSScott Long 		}
4931713e81bSScott Long #endif
4941713e81bSScott Long 
495d2bd3ab9SScott Long 	}
496d2bd3ab9SScott Long 	else
497d2bd3ab9SScott Long 	{
4981713e81bSScott Long 		pVDev  = &(pAdapter->VDevices[channelIndex]);
499d2bd3ab9SScott Long 		failDevice(pVDev);
5001713e81bSScott Long 	}
5011713e81bSScott Long }
5021713e81bSScott Long 
5031713e81bSScott Long static int
5041713e81bSScott Long start_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum)
5051713e81bSScott Long {
506d2bd3ab9SScott Long 	MV_SATA_ADAPTER *pMvSataAdapter = &pAdapter->mvSataAdapter;
507d2bd3ab9SScott Long 	MV_SATA_CHANNEL *pMvSataChannel = pMvSataAdapter->sataChannel[channelNum];
508d2bd3ab9SScott Long 	MV_CHANNEL		*pChannelInfo = &(pAdapter->mvChannel[channelNum]);
5091713e81bSScott Long 	MV_U32          udmaMode,pioMode;
5101713e81bSScott Long 
51164470755SXin LI 	KdPrint(("RR18xx [%d]: start channel (%d)", pMvSataAdapter->adapterId,
5121713e81bSScott Long 			 channelNum));
5131713e81bSScott Long 
5141713e81bSScott Long 
5151713e81bSScott Long 	/* Software reset channel */
516d2bd3ab9SScott Long 	if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channelNum) == MV_FALSE)
517d2bd3ab9SScott Long 	{
51864470755SXin LI 		MV_ERROR("RR18xx [%d,%d]: failed to perform Software reset\n",
5191713e81bSScott Long 				 pMvSataAdapter->adapterId, channelNum);
5201713e81bSScott Long 		return -1;
5211713e81bSScott Long 	}
5221713e81bSScott Long 
5231713e81bSScott Long 	/* Hardware reset channel */
524d2bd3ab9SScott Long 	if (mvSataChannelHardReset(pMvSataAdapter, channelNum) == MV_FALSE)
525d2bd3ab9SScott Long 	{
526d2bd3ab9SScott Long 		/* If failed, try again - this is when trying to hardreset a channel */
527d2bd3ab9SScott Long 		/* when drive is just spinning up */
5281713e81bSScott Long 		StallExec(5000000); /* wait 5 sec before trying again */
529d2bd3ab9SScott Long 		if (mvSataChannelHardReset(pMvSataAdapter, channelNum) == MV_FALSE)
530d2bd3ab9SScott Long 		{
53164470755SXin LI 			MV_ERROR("RR18xx [%d,%d]: failed to perform Hard reset\n",
5321713e81bSScott Long 					 pMvSataAdapter->adapterId, channelNum);
5331713e81bSScott Long 			return -1;
5341713e81bSScott Long 		}
5351713e81bSScott Long 	}
5361713e81bSScott Long 
537d2bd3ab9SScott Long 	/* identify device*/
538d2bd3ab9SScott Long 	if (mvStorageDevATAIdentifyDevice(pMvSataAdapter, channelNum) == MV_FALSE)
539d2bd3ab9SScott Long 	{
54064470755SXin LI 		MV_ERROR("RR18xx [%d,%d]: failed to perform ATA Identify command\n"
541d2bd3ab9SScott Long 				 , pMvSataAdapter->adapterId, channelNum);
542d2bd3ab9SScott Long 		return -1;
543d2bd3ab9SScott Long 	}
544d2bd3ab9SScott Long 	if (hptmv_parse_identify_results(pMvSataChannel))
545d2bd3ab9SScott Long 	{
54664470755SXin LI 		MV_ERROR("RR18xx [%d,%d]: Error in parsing ATA Identify message\n"
547d2bd3ab9SScott Long 				 , pMvSataAdapter->adapterId, channelNum);
548d2bd3ab9SScott Long 		return -1;
549d2bd3ab9SScott Long 	}
550d2bd3ab9SScott Long 
551d2bd3ab9SScott Long 	/* mvStorageDevATASetFeatures */
552d2bd3ab9SScott Long 	/* Disable 8 bit PIO in case CFA enabled */
553d2bd3ab9SScott Long 	if (pMvSataChannel->identifyDevice[86] & 4)
554d2bd3ab9SScott Long 	{
55564470755SXin LI 		KdPrint(("RR18xx [%d]: Disable 8 bit PIO (CFA enabled) \n",
556d2bd3ab9SScott Long 				  pMvSataAdapter->adapterId));
557d2bd3ab9SScott Long 		if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
558d2bd3ab9SScott Long 									   MV_ATA_SET_FEATURES_DISABLE_8_BIT_PIO, 0,
559d2bd3ab9SScott Long 									   0, 0, 0) == MV_FALSE)
560d2bd3ab9SScott Long 		{
56164470755SXin LI 			MV_ERROR("RR18xx [%d]: channel %d: mvStorageDevATASetFeatures"
562d2bd3ab9SScott Long 					 " failed\n", pMvSataAdapter->adapterId, channelNum);
563d2bd3ab9SScott Long 			return -1;
564d2bd3ab9SScott Long 		}
565d2bd3ab9SScott Long 	}
5661713e81bSScott Long 	/* Write cache */
567d2bd3ab9SScott Long #ifdef ENABLE_WRITE_CACHE
568d2bd3ab9SScott Long 	if (pMvSataChannel->identifyDevice[82] & 0x20)
569d2bd3ab9SScott Long 	{
570d2bd3ab9SScott Long 		if (!(pMvSataChannel->identifyDevice[85] & 0x20)) /* if not enabled by default */
571d2bd3ab9SScott Long 		{
572d2bd3ab9SScott Long 			if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
573d2bd3ab9SScott Long 										   MV_ATA_SET_FEATURES_ENABLE_WCACHE, 0,
574d2bd3ab9SScott Long 										   0, 0, 0) == MV_FALSE)
575d2bd3ab9SScott Long 			{
57664470755SXin LI 				MV_ERROR("RR18xx [%d]: channel %d: mvStorageDevATASetFeatures failed\n",
5771713e81bSScott Long 						 pMvSataAdapter->adapterId, channelNum);
5781713e81bSScott Long 				return -1;
5791713e81bSScott Long 			}
5801713e81bSScott Long 		}
58164470755SXin LI 		KdPrint(("RR18xx [%d]: channel %d, write cache enabled\n",
5821713e81bSScott Long 				  pMvSataAdapter->adapterId, channelNum));
583d2bd3ab9SScott Long 	}
584d2bd3ab9SScott Long 	else
585d2bd3ab9SScott Long 	{
58664470755SXin LI 		KdPrint(("RR18xx [%d]: channel %d, write cache not supported\n",
5871713e81bSScott Long 				  pMvSataAdapter->adapterId, channelNum));
5881713e81bSScott Long 	}
589d2bd3ab9SScott Long #else /* disable write cache */
590d2bd3ab9SScott Long 	{
591d2bd3ab9SScott Long 		if (pMvSataChannel->identifyDevice[85] & 0x20)
592d2bd3ab9SScott Long 		{
59364470755SXin LI 			KdPrint(("RR18xx [%d]: channel =%d, disable write cache\n",
5941713e81bSScott Long 					  pMvSataAdapter->adapterId, channelNum));
5951713e81bSScott Long 			if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
596d2bd3ab9SScott Long 										   MV_ATA_SET_FEATURES_DISABLE_WCACHE, 0,
597d2bd3ab9SScott Long 										   0, 0, 0) == MV_FALSE)
598d2bd3ab9SScott Long 			{
59964470755SXin LI 				MV_ERROR("RR18xx [%d]: channel %d: mvStorageDevATASetFeatures failed\n",
6001713e81bSScott Long 						 pMvSataAdapter->adapterId, channelNum);
6011713e81bSScott Long 				return -1;
6021713e81bSScott Long 			}
6031713e81bSScott Long 		}
60464470755SXin LI 		KdPrint(("RR18xx [%d]: channel=%d, write cache disabled\n",
6051713e81bSScott Long 				  pMvSataAdapter->adapterId, channelNum));
606d2bd3ab9SScott Long 	}
6071713e81bSScott Long #endif
6081713e81bSScott Long 
6091713e81bSScott Long 	/* Set transfer mode */
61064470755SXin LI 	KdPrint(("RR18xx [%d] Set transfer mode XFER_PIO_SLOW\n",
6111713e81bSScott Long 			  pMvSataAdapter->adapterId));
6121713e81bSScott Long 	if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
613d2bd3ab9SScott Long 								   MV_ATA_SET_FEATURES_TRANSFER,
614d2bd3ab9SScott Long 								   MV_ATA_TRANSFER_PIO_SLOW, 0, 0, 0) ==
615d2bd3ab9SScott Long 		MV_FALSE)
616d2bd3ab9SScott Long 	{
61764470755SXin LI 		MV_ERROR("RR18xx [%d] channel %d: Set Features failed\n",
6181713e81bSScott Long 				 pMvSataAdapter->adapterId, channelNum);
6191713e81bSScott Long 		return -1;
6201713e81bSScott Long 	}
6211713e81bSScott Long 
622d2bd3ab9SScott Long 	if (pMvSataChannel->identifyDevice[IDEN_PIO_MODE_SPPORTED] & 1)
623d2bd3ab9SScott Long 	{
6241713e81bSScott Long 		pioMode = MV_ATA_TRANSFER_PIO_4;
625d2bd3ab9SScott Long 	}
626d2bd3ab9SScott Long 	else if (pMvSataChannel->identifyDevice[IDEN_PIO_MODE_SPPORTED] & 2)
627d2bd3ab9SScott Long 	{
6281713e81bSScott Long 		pioMode = MV_ATA_TRANSFER_PIO_3;
629d2bd3ab9SScott Long 	}
630d2bd3ab9SScott Long 	else
631d2bd3ab9SScott Long 	{
632d2bd3ab9SScott Long 		MV_ERROR("IAL Error in IDENTIFY info: PIO modes 3 and 4 not supported\n");
6331713e81bSScott Long 		pioMode = MV_ATA_TRANSFER_PIO_SLOW;
6341713e81bSScott Long 	}
6351713e81bSScott Long 
63664470755SXin LI 	KdPrint(("RR18xx [%d] Set transfer mode XFER_PIO_4\n",
6371713e81bSScott Long 			  pMvSataAdapter->adapterId));
6381713e81bSScott Long 	pAdapter->mvChannel[channelNum].maxPioModeSupported = pioMode;
6391713e81bSScott Long 	if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
640d2bd3ab9SScott Long 								   MV_ATA_SET_FEATURES_TRANSFER,
641d2bd3ab9SScott Long 								   pioMode, 0, 0, 0) == MV_FALSE)
642d2bd3ab9SScott Long 	{
64364470755SXin LI 		MV_ERROR("RR18xx [%d] channel %d: Set Features failed\n",
6441713e81bSScott Long 				 pMvSataAdapter->adapterId, channelNum);
6451713e81bSScott Long 		return -1;
6461713e81bSScott Long 	}
6471713e81bSScott Long 
6481713e81bSScott Long 	udmaMode = MV_ATA_TRANSFER_UDMA_0;
649d2bd3ab9SScott Long 	if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x40)
650d2bd3ab9SScott Long 	{
6511713e81bSScott Long 		udmaMode =  MV_ATA_TRANSFER_UDMA_6;
652d2bd3ab9SScott Long 	}
653d2bd3ab9SScott Long 	else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x20)
654d2bd3ab9SScott Long 	{
6551713e81bSScott Long 		udmaMode =  MV_ATA_TRANSFER_UDMA_5;
656d2bd3ab9SScott Long 	}
657d2bd3ab9SScott Long 	else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x10)
658d2bd3ab9SScott Long 	{
6591713e81bSScott Long 		udmaMode =  MV_ATA_TRANSFER_UDMA_4;
660d2bd3ab9SScott Long 	}
661d2bd3ab9SScott Long 	else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 8)
662d2bd3ab9SScott Long 	{
6631713e81bSScott Long 		udmaMode =  MV_ATA_TRANSFER_UDMA_3;
664d2bd3ab9SScott Long 	}
665d2bd3ab9SScott Long 	else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 4)
666d2bd3ab9SScott Long 	{
6671713e81bSScott Long 		udmaMode =  MV_ATA_TRANSFER_UDMA_2;
6681713e81bSScott Long 	}
6691713e81bSScott Long 
67064470755SXin LI 	KdPrint(("RR18xx [%d] Set transfer mode XFER_UDMA_%d\n",
6711713e81bSScott Long 			  pMvSataAdapter->adapterId, udmaMode & 0xf));
6721713e81bSScott Long 	pChannelInfo->maxUltraDmaModeSupported = udmaMode;
6731713e81bSScott Long 
674d2bd3ab9SScott Long 	/*if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
675d2bd3ab9SScott Long 								   MV_ATA_SET_FEATURES_TRANSFER, udmaMode,
676d2bd3ab9SScott Long 								   0, 0, 0) == MV_FALSE)
677d2bd3ab9SScott Long 	{
67864470755SXin LI 		MV_ERROR("RR18xx [%d] channel %d: Set Features failed\n",
6791713e81bSScott Long 				 pMvSataAdapter->adapterId, channelNum);
6801713e81bSScott Long 		return -1;
681d2bd3ab9SScott Long 	}*/
6821713e81bSScott Long 	if (pChannelInfo->maxUltraDmaModeSupported == 0xFF)
6831713e81bSScott Long 		return TRUE;
684d2bd3ab9SScott Long 	else
685d2bd3ab9SScott Long 		do
686d2bd3ab9SScott Long 		{
6871713e81bSScott Long 			if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
6881713e81bSScott Long 								   MV_ATA_SET_FEATURES_TRANSFER,
689d2bd3ab9SScott Long 								   pChannelInfo->maxUltraDmaModeSupported,
690d2bd3ab9SScott Long 								   0, 0, 0) == MV_FALSE)
691d2bd3ab9SScott Long 			{
692d2bd3ab9SScott Long 				if (pChannelInfo->maxUltraDmaModeSupported > MV_ATA_TRANSFER_UDMA_0)
693d2bd3ab9SScott Long 				{
694d2bd3ab9SScott Long 					if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channelNum) == MV_FALSE)
695d2bd3ab9SScott Long 					{
696d2bd3ab9SScott Long 						MV_REG_WRITE_BYTE(pMvSataAdapter->adapterIoBaseAddress,
697d2bd3ab9SScott Long 										  pMvSataChannel->eDmaRegsOffset +
698d2bd3ab9SScott Long 										  0x11c, /* command reg */
699d2bd3ab9SScott Long 										  MV_ATA_COMMAND_IDLE_IMMEDIATE);
7001713e81bSScott Long 						mvMicroSecondsDelay(10000);
7011713e81bSScott Long 						mvSataChannelHardReset(pMvSataAdapter, channelNum);
702d2bd3ab9SScott Long 						if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channelNum) == MV_FALSE)
7031713e81bSScott Long 							return FALSE;
7041713e81bSScott Long 					}
705d2bd3ab9SScott Long 					if (mvSataChannelHardReset(pMvSataAdapter, channelNum) == MV_FALSE)
7061713e81bSScott Long 						return FALSE;
7071713e81bSScott Long 					pChannelInfo->maxUltraDmaModeSupported--;
708d2bd3ab9SScott Long 					continue;
709d2bd3ab9SScott Long 				}
710d2bd3ab9SScott Long 				else   return FALSE;
711d2bd3ab9SScott Long 			}
712d2bd3ab9SScott Long 			break;
7131713e81bSScott Long 		}while (1);
7141713e81bSScott Long 
7151713e81bSScott Long 	/* Read look ahead */
716d2bd3ab9SScott Long #ifdef ENABLE_READ_AHEAD
717d2bd3ab9SScott Long 	if (pMvSataChannel->identifyDevice[82] & 0x40)
718d2bd3ab9SScott Long 	{
719d2bd3ab9SScott Long 		if (!(pMvSataChannel->identifyDevice[85] & 0x40)) /* if not enabled by default */
720d2bd3ab9SScott Long 		{
721d2bd3ab9SScott Long 			if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
722d2bd3ab9SScott Long 										   MV_ATA_SET_FEATURES_ENABLE_RLA, 0, 0,
723d2bd3ab9SScott Long 										   0, 0) == MV_FALSE)
724d2bd3ab9SScott Long 			{
72564470755SXin LI 				MV_ERROR("RR18xx [%d] channel %d: Set Features failed\n",
726d2bd3ab9SScott Long 						 pMvSataAdapter->adapterId, channelNum);
7271713e81bSScott Long 				return -1;
7281713e81bSScott Long 			}
7291713e81bSScott Long 		}
73064470755SXin LI 		KdPrint(("RR18xx [%d]: channel=%d, read look ahead enabled\n",
7311713e81bSScott Long 				  pMvSataAdapter->adapterId, channelNum));
732d2bd3ab9SScott Long 	}
733d2bd3ab9SScott Long 	else
734d2bd3ab9SScott Long 	{
73564470755SXin LI 		KdPrint(("RR18xx [%d]: channel %d, Read Look Ahead not supported\n",
736d2bd3ab9SScott Long 				  pMvSataAdapter->adapterId, channelNum));
7371713e81bSScott Long 	}
7381713e81bSScott Long #else
739d2bd3ab9SScott Long 	{
740d2bd3ab9SScott Long 		if (pMvSataChannel->identifyDevice[86] & 0x20)
741d2bd3ab9SScott Long 		{
74264470755SXin LI 			KdPrint(("RR18xx [%d]:channel %d, disable read look ahead\n",
7431713e81bSScott Long 					  pMvSataAdapter->adapterId, channelNum));
7441713e81bSScott Long 			if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
745d2bd3ab9SScott Long 										   MV_ATA_SET_FEATURES_DISABLE_RLA, 0, 0,
746d2bd3ab9SScott Long 										   0, 0) == MV_FALSE)
747d2bd3ab9SScott Long 			{
74864470755SXin LI 				MV_ERROR("RR18xx [%d]:channel %d:  ATA Set Features failed\n",
749d2bd3ab9SScott Long 						 pMvSataAdapter->adapterId, channelNum);
7501713e81bSScott Long 				return -1;
7511713e81bSScott Long 			}
7521713e81bSScott Long 		}
75364470755SXin LI 		KdPrint(("RR18xx [%d]:channel %d, read look ahead disabled\n",
7541713e81bSScott Long 				  pMvSataAdapter->adapterId, channelNum));
755d2bd3ab9SScott Long 	}
7561713e81bSScott Long #endif
7571713e81bSScott Long 
758d2bd3ab9SScott Long 
759d2bd3ab9SScott Long 	{
76064470755SXin LI 		KdPrint(("RR18xx [%d]: channel %d config EDMA, Non Queued Mode\n",
761d2bd3ab9SScott Long 				  pMvSataAdapter->adapterId,
762d2bd3ab9SScott Long 				  channelNum));
763d2bd3ab9SScott Long 		if (mvSataConfigEdmaMode(pMvSataAdapter, channelNum,
764d2bd3ab9SScott Long 								 MV_EDMA_MODE_NOT_QUEUED, 0) == MV_FALSE)
765d2bd3ab9SScott Long 		{
76664470755SXin LI 			MV_ERROR("RR18xx [%d] channel %d Error: mvSataConfigEdmaMode failed\n",
7671713e81bSScott Long 					 pMvSataAdapter->adapterId, channelNum);
7681713e81bSScott Long 			return -1;
7691713e81bSScott Long 		}
7701713e81bSScott Long 	}
7711713e81bSScott Long 	/* Enable EDMA */
772d2bd3ab9SScott Long 	if (mvSataEnableChannelDma(pMvSataAdapter, channelNum) == MV_FALSE)
773d2bd3ab9SScott Long 	{
77464470755SXin LI 		MV_ERROR("RR18xx [%d] Failed to enable DMA, channel=%d\n",
7751713e81bSScott Long 				 pMvSataAdapter->adapterId, channelNum);
7761713e81bSScott Long 		return -1;
7771713e81bSScott Long 	}
77864470755SXin LI 	MV_ERROR("RR18xx [%d,%d]: channel started successfully\n",
7791713e81bSScott Long 			 pMvSataAdapter->adapterId, channelNum);
7801713e81bSScott Long 
7811713e81bSScott Long #ifndef FOR_DEMO
7821713e81bSScott Long 	set_fail_led(pMvSataAdapter, channelNum, 0);
7831713e81bSScott Long #endif
7841713e81bSScott Long 	return 0;
7851713e81bSScott Long }
7861713e81bSScott Long 
7871713e81bSScott Long static void
7881713e81bSScott Long hptmv_handle_event(void * data, int flag)
7891713e81bSScott Long {
790d2bd3ab9SScott Long 	IAL_ADAPTER_T   *pAdapter = (IAL_ADAPTER_T *)data;
791d2bd3ab9SScott Long 	MV_SATA_ADAPTER *pMvSataAdapter = &pAdapter->mvSataAdapter;
7921713e81bSScott Long 	MV_U8           channelIndex;
7931713e81bSScott Long 
794d2bd3ab9SScott Long /*	mvOsSemTake(&pMvSataAdapter->semaphore); */
795d2bd3ab9SScott Long 	for (channelIndex = 0; channelIndex < MV_SATA_CHANNELS_NUM; channelIndex++)
796d2bd3ab9SScott Long 	{
797d2bd3ab9SScott Long 		switch(pAdapter->sataEvents[channelIndex])
798d2bd3ab9SScott Long 		{
7991713e81bSScott Long 			case SATA_EVENT_CHANNEL_CONNECTED:
8001713e81bSScott Long 				/* Handle only connects */
8011713e81bSScott Long 				if (flag == 1)
8021713e81bSScott Long 					break;
80364470755SXin LI 				KdPrint(("RR18xx [%d,%d]: new device connected\n",
8041713e81bSScott Long 						 pMvSataAdapter->adapterId, channelIndex));
8051713e81bSScott Long 				hptmv_init_channel(pAdapter, channelIndex);
806d2bd3ab9SScott Long 				if (mvSataConfigureChannel( pMvSataAdapter, channelIndex) == MV_FALSE)
807d2bd3ab9SScott Long 				{
80864470755SXin LI 					MV_ERROR("RR18xx [%d,%d] Failed to configure\n",
809d2bd3ab9SScott Long 							 pMvSataAdapter->adapterId, channelIndex);
8101713e81bSScott Long 					hptmv_free_channel(pAdapter, channelIndex);
811d2bd3ab9SScott Long 				}
812d2bd3ab9SScott Long 				else
813d2bd3ab9SScott Long 				{
814d2bd3ab9SScott Long 					/*mvSataChannelHardReset(pMvSataAdapter, channel);*/
815d2bd3ab9SScott Long 					if (start_channel( pAdapter, channelIndex))
816d2bd3ab9SScott Long 					{
81764470755SXin LI 						MV_ERROR("RR18xx [%d,%d]Failed to start channel\n",
818d2bd3ab9SScott Long 								 pMvSataAdapter->adapterId, channelIndex);
819d2bd3ab9SScott Long 						hptmv_free_channel(pAdapter, channelIndex);
820d2bd3ab9SScott Long 					}
821d2bd3ab9SScott Long 					else
822d2bd3ab9SScott Long 					{
823d2bd3ab9SScott Long 						device_change(pAdapter, channelIndex, TRUE);
8241713e81bSScott Long 					}
8251713e81bSScott Long 				}
826d2bd3ab9SScott Long 				pAdapter->sataEvents[channelIndex] = SATA_EVENT_NO_CHANGE;
8271713e81bSScott Long 			   break;
8281713e81bSScott Long 
8291713e81bSScott Long 			case SATA_EVENT_CHANNEL_DISCONNECTED:
8301713e81bSScott Long 				/* Handle only disconnects */
8311713e81bSScott Long 				if (flag == 0)
8321713e81bSScott Long 					break;
83364470755SXin LI 				KdPrint(("RR18xx [%d,%d]: device disconnected\n",
8341713e81bSScott Long 						 pMvSataAdapter->adapterId, channelIndex));
8351713e81bSScott Long 					/* Flush pending commands */
836d2bd3ab9SScott Long 				if(pMvSataAdapter->sataChannel[channelIndex])
837d2bd3ab9SScott Long 				{
8381713e81bSScott Long 					_VBUS_INST(&pAdapter->VBus)
839d2bd3ab9SScott Long 					mvSataFlushDmaQueue (pMvSataAdapter, channelIndex,
840d2bd3ab9SScott Long 										 MV_FLUSH_TYPE_CALLBACK);
8411713e81bSScott Long 					CheckPendingCall(_VBUS_P0);
842d2bd3ab9SScott Long 					mvSataRemoveChannel(pMvSataAdapter,channelIndex);
8431713e81bSScott Long 					hptmv_free_channel(pAdapter, channelIndex);
844d2bd3ab9SScott Long 					pMvSataAdapter->sataChannel[channelIndex] = NULL;
84564470755SXin LI 					KdPrint(("RR18xx [%d,%d]: channel removed\n",
846d2bd3ab9SScott Long 						 pMvSataAdapter->adapterId, channelIndex));
847d2bd3ab9SScott Long 					if (pAdapter->outstandingCommands==0 && DPC_Request_Nums==0)
8481713e81bSScott Long 						Check_Idle_Call(pAdapter);
8491713e81bSScott Long 				}
850d2bd3ab9SScott Long 				else
851d2bd3ab9SScott Long 				{
85264470755SXin LI 					KdPrint(("RR18xx [%d,%d]: channel already removed!!\n",
853d2bd3ab9SScott Long 							 pMvSataAdapter->adapterId, channelIndex));
854d2bd3ab9SScott Long 				}
855d2bd3ab9SScott Long 				pAdapter->sataEvents[channelIndex] = SATA_EVENT_NO_CHANGE;
8561713e81bSScott Long 				break;
8571713e81bSScott Long 
8581713e81bSScott Long 			case SATA_EVENT_NO_CHANGE:
8591713e81bSScott Long 				break;
8601713e81bSScott Long 
8611713e81bSScott Long 			default:
8621713e81bSScott Long 				break;
8631713e81bSScott Long 		}
8641713e81bSScott Long 	}
865d2bd3ab9SScott Long /*	mvOsSemRelease(&pMvSataAdapter->semaphore); */
8661713e81bSScott Long }
8671713e81bSScott Long 
8681713e81bSScott Long #define EVENT_CONNECT					1
8691713e81bSScott Long #define EVENT_DISCONNECT				0
8701713e81bSScott Long 
8711713e81bSScott Long static void
8721713e81bSScott Long hptmv_handle_event_connect(void *data)
8731713e81bSScott Long {
8741713e81bSScott Long   hptmv_handle_event (data, 0);
8751713e81bSScott Long }
8761713e81bSScott Long 
8771713e81bSScott Long static void
8781713e81bSScott Long hptmv_handle_event_disconnect(void *data)
8791713e81bSScott Long {
8801713e81bSScott Long   hptmv_handle_event (data, 1);
8811713e81bSScott Long }
8821713e81bSScott Long 
8831713e81bSScott Long static MV_BOOLEAN
8841713e81bSScott Long hptmv_event_notify(MV_SATA_ADAPTER *pMvSataAdapter, MV_EVENT_TYPE eventType,
8851713e81bSScott Long 								   MV_U32 param1, MV_U32 param2)
8861713e81bSScott Long {
8871713e81bSScott Long 	IAL_ADAPTER_T   *pAdapter = pMvSataAdapter->IALData;
8881713e81bSScott Long 
889d2bd3ab9SScott Long 	switch (eventType)
890d2bd3ab9SScott Long 	{
8911713e81bSScott Long 		case MV_EVENT_TYPE_SATA_CABLE:
8921713e81bSScott Long 			{
8931713e81bSScott Long 				MV_U8   channel = param2;
8941713e81bSScott Long 
895d2bd3ab9SScott Long 				if (param1 == EVENT_CONNECT)
896d2bd3ab9SScott Long 				{
897d2bd3ab9SScott Long 					pAdapter->sataEvents[channel] = SATA_EVENT_CHANNEL_CONNECTED;
89864470755SXin LI 					KdPrint(("RR18xx [%d,%d]: device connected event received\n",
899d2bd3ab9SScott Long 							 pMvSataAdapter->adapterId, channel));
900d2bd3ab9SScott Long 					/* Delete previous timers (if multiple drives connected in the same time */
901d2bd3ab9SScott Long 					pAdapter->event_timer_connect = timeout(hptmv_handle_event_connect, pAdapter, 10*hz);
902d2bd3ab9SScott Long 				}
903d2bd3ab9SScott Long 				else if (param1 == EVENT_DISCONNECT)
904d2bd3ab9SScott Long 				{
905d2bd3ab9SScott Long 					pAdapter->sataEvents[channel] = SATA_EVENT_CHANNEL_DISCONNECTED;
90664470755SXin LI 					KdPrint(("RR18xx [%d,%d]: device disconnected event received \n",
907d2bd3ab9SScott Long 							 pMvSataAdapter->adapterId, channel));
9081713e81bSScott Long 					device_change(pAdapter, channel, FALSE);
909d2bd3ab9SScott Long 					/* Delete previous timers (if multiple drives disconnected in the same time */
910d2bd3ab9SScott Long 					/*pAdapter->event_timer_disconnect = timeout(hptmv_handle_event_disconnect, pAdapter, 10*hz); */
911d2bd3ab9SScott Long 					/*It is not necessary to wait, handle it directly*/
912d2bd3ab9SScott Long 					hptmv_handle_event_disconnect(pAdapter);
913d2bd3ab9SScott Long 				}
914d2bd3ab9SScott Long 				else
915d2bd3ab9SScott Long 				{
916d2bd3ab9SScott Long 
91764470755SXin LI 					MV_ERROR("RR18xx: illigal value for param1(%d) at "
9181713e81bSScott Long 							 "connect/disconect event, host=%d\n", param1,
9191713e81bSScott Long 							 pMvSataAdapter->adapterId );
9201713e81bSScott Long 
9211713e81bSScott Long 				}
9221713e81bSScott Long 			}
923d2bd3ab9SScott Long 			break;
9241713e81bSScott Long 		case MV_EVENT_TYPE_ADAPTER_ERROR:
92564470755SXin LI 			KdPrint(("RR18xx: DEVICE error event received, pci cause "
9261713e81bSScott Long 					  "reg=%x,  don't how to handle this\n", param1));
9271713e81bSScott Long 			return MV_TRUE;
9281713e81bSScott Long 		default:
92964470755SXin LI 			MV_ERROR("RR18xx[%d]: unknown event type (%d)\n",
9301713e81bSScott Long 					 pMvSataAdapter->adapterId, eventType);
9311713e81bSScott Long 			return MV_FALSE;
9321713e81bSScott Long 	}
9331713e81bSScott Long 	return MV_TRUE;
9341713e81bSScott Long }
9351713e81bSScott Long 
9361713e81bSScott Long static int
9371713e81bSScott Long hptmv_allocate_edma_queues(IAL_ADAPTER_T *pAdapter)
9381713e81bSScott Long {
939d2bd3ab9SScott Long 	pAdapter->requestsArrayBaseAddr = (MV_U8 *)contigmalloc(REQUESTS_ARRAY_SIZE,
940d2bd3ab9SScott Long 			M_DEVBUF, M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0ul);
941d2bd3ab9SScott Long 	if (pAdapter->requestsArrayBaseAddr == NULL)
942d2bd3ab9SScott Long 	{
94364470755SXin LI 		MV_ERROR("RR18xx[%d]: Failed to allocate memory for EDMA request"
944d2bd3ab9SScott Long 				 " queues\n", pAdapter->mvSataAdapter.adapterId);
9451713e81bSScott Long 		return -1;
9461713e81bSScott Long 	}
947d2bd3ab9SScott Long 	pAdapter->requestsArrayBaseDmaAddr = fOsPhysicalAddress(pAdapter->requestsArrayBaseAddr);
948d2bd3ab9SScott Long 	pAdapter->requestsArrayBaseAlignedAddr = pAdapter->requestsArrayBaseAddr;
9491713e81bSScott Long 	pAdapter->requestsArrayBaseAlignedAddr += MV_EDMA_REQUEST_QUEUE_SIZE;
950d2bd3ab9SScott Long 	pAdapter->requestsArrayBaseAlignedAddr  = (MV_U8 *)
951d2bd3ab9SScott Long 		(((ULONG_PTR)pAdapter->requestsArrayBaseAlignedAddr) & ~(ULONG_PTR)(MV_EDMA_REQUEST_QUEUE_SIZE - 1));
952d2bd3ab9SScott Long 	pAdapter->requestsArrayBaseDmaAlignedAddr = pAdapter->requestsArrayBaseDmaAddr;
9531713e81bSScott Long 	pAdapter->requestsArrayBaseDmaAlignedAddr += MV_EDMA_REQUEST_QUEUE_SIZE;
954d2bd3ab9SScott Long 	pAdapter->requestsArrayBaseDmaAlignedAddr &= ~(ULONG_PTR)(MV_EDMA_REQUEST_QUEUE_SIZE - 1);
9551713e81bSScott Long 
956d2bd3ab9SScott Long 	if ((pAdapter->requestsArrayBaseDmaAlignedAddr - pAdapter->requestsArrayBaseDmaAddr) !=
957d2bd3ab9SScott Long 		(pAdapter->requestsArrayBaseAlignedAddr - pAdapter->requestsArrayBaseAddr))
958d2bd3ab9SScott Long 	{
95964470755SXin LI 		MV_ERROR("RR18xx[%d]: Error in Request Quueues Alignment\n",
9601713e81bSScott Long 				 pAdapter->mvSataAdapter.adapterId);
961d2bd3ab9SScott Long 		contigfree(pAdapter->requestsArrayBaseAddr, REQUESTS_ARRAY_SIZE, M_DEVBUF);
9621713e81bSScott Long 		return -1;
9631713e81bSScott Long 	}
9641713e81bSScott Long 	/* response queues */
965d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseAddr = (MV_U8 *)contigmalloc(RESPONSES_ARRAY_SIZE,
966d2bd3ab9SScott Long 			M_DEVBUF, M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0ul);
967d2bd3ab9SScott Long 	if (pAdapter->responsesArrayBaseAddr == NULL)
968d2bd3ab9SScott Long 	{
96964470755SXin LI 		MV_ERROR("RR18xx[%d]: Failed to allocate memory for EDMA response"
970d2bd3ab9SScott Long 				 " queues\n", pAdapter->mvSataAdapter.adapterId);
971d2bd3ab9SScott Long 		contigfree(pAdapter->requestsArrayBaseAddr, RESPONSES_ARRAY_SIZE, M_DEVBUF);
9721713e81bSScott Long 		return -1;
9731713e81bSScott Long 	}
974d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseDmaAddr = fOsPhysicalAddress(pAdapter->responsesArrayBaseAddr);
975d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseAlignedAddr = pAdapter->responsesArrayBaseAddr;
9761713e81bSScott Long 	pAdapter->responsesArrayBaseAlignedAddr += MV_EDMA_RESPONSE_QUEUE_SIZE;
977d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseAlignedAddr  = (MV_U8 *)
978d2bd3ab9SScott Long 		(((ULONG_PTR)pAdapter->responsesArrayBaseAlignedAddr) & ~(ULONG_PTR)(MV_EDMA_RESPONSE_QUEUE_SIZE - 1));
979d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseDmaAlignedAddr = pAdapter->responsesArrayBaseDmaAddr;
980d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseDmaAlignedAddr += MV_EDMA_RESPONSE_QUEUE_SIZE;
981d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseDmaAlignedAddr &= ~(ULONG_PTR)(MV_EDMA_RESPONSE_QUEUE_SIZE - 1);
9821713e81bSScott Long 
983d2bd3ab9SScott Long 	if ((pAdapter->responsesArrayBaseDmaAlignedAddr - pAdapter->responsesArrayBaseDmaAddr) !=
984d2bd3ab9SScott Long 		(pAdapter->responsesArrayBaseAlignedAddr - pAdapter->responsesArrayBaseAddr))
985d2bd3ab9SScott Long 	{
98664470755SXin LI 		MV_ERROR("RR18xx[%d]: Error in Response Quueues Alignment\n",
9871713e81bSScott Long 				 pAdapter->mvSataAdapter.adapterId);
988d2bd3ab9SScott Long 		contigfree(pAdapter->requestsArrayBaseAddr, REQUESTS_ARRAY_SIZE, M_DEVBUF);
989d2bd3ab9SScott Long 		contigfree(pAdapter->responsesArrayBaseAddr, RESPONSES_ARRAY_SIZE, M_DEVBUF);
9901713e81bSScott Long 		return -1;
9911713e81bSScott Long 	}
9921713e81bSScott Long 	return 0;
9931713e81bSScott Long }
9941713e81bSScott Long 
9951713e81bSScott Long static void
9961713e81bSScott Long hptmv_free_edma_queues(IAL_ADAPTER_T *pAdapter)
9971713e81bSScott Long {
998d2bd3ab9SScott Long 	contigfree(pAdapter->requestsArrayBaseAddr, REQUESTS_ARRAY_SIZE, M_DEVBUF);
999d2bd3ab9SScott Long 	contigfree(pAdapter->responsesArrayBaseAddr, RESPONSES_ARRAY_SIZE, M_DEVBUF);
10001713e81bSScott Long }
10011713e81bSScott Long 
10021713e81bSScott Long static PVOID
10031713e81bSScott Long AllocatePRDTable(IAL_ADAPTER_T *pAdapter)
10041713e81bSScott Long {
10051713e81bSScott Long 	PVOID ret;
10061713e81bSScott Long 	if (pAdapter->pFreePRDLink) {
1007d2bd3ab9SScott Long 		KdPrint(("pAdapter->pFreePRDLink:%p\n",pAdapter->pFreePRDLink));
10081713e81bSScott Long 		ret = pAdapter->pFreePRDLink;
10091713e81bSScott Long 		pAdapter->pFreePRDLink = *(void**)ret;
10101713e81bSScott Long 		return ret;
10111713e81bSScott Long 	}
10121713e81bSScott Long 	return NULL;
10131713e81bSScott Long }
10141713e81bSScott Long 
10151713e81bSScott Long static void
10161713e81bSScott Long FreePRDTable(IAL_ADAPTER_T *pAdapter, PVOID PRDTable)
10171713e81bSScott Long {
10181713e81bSScott Long 	*(void**)PRDTable = pAdapter->pFreePRDLink;
10191713e81bSScott Long 	pAdapter->pFreePRDLink = PRDTable;
10201713e81bSScott Long }
10211713e81bSScott Long 
10221713e81bSScott Long extern PVDevice fGetFirstChild(PVDevice pLogical);
10231713e81bSScott Long extern void fResetBootMark(PVDevice pLogical);
10241713e81bSScott Long static void
10251713e81bSScott Long fRegisterVdevice(IAL_ADAPTER_T *pAdapter)
10261713e81bSScott Long {
10271713e81bSScott Long 	PVDevice pPhysical, pLogical;
10281713e81bSScott Long 	PVBus  pVBus;
10291713e81bSScott Long 	int i,j;
10301713e81bSScott Long 
10311713e81bSScott Long 	for(i=0;i<MV_SATA_CHANNELS_NUM;i++) {
10321713e81bSScott Long 		pPhysical = &(pAdapter->VDevices[i]);
10331713e81bSScott Long 		pLogical = pPhysical;
10341713e81bSScott Long 		while (pLogical->pParent) pLogical = pLogical->pParent;
10351713e81bSScott Long 		if (pLogical->vf_online==0) {
10361713e81bSScott Long 			pPhysical->vf_bootmark = pLogical->vf_bootmark = 0;
10371713e81bSScott Long 			continue;
10381713e81bSScott Long 		}
1039d2bd3ab9SScott Long 		if (pLogical->VDeviceType==VD_SPARE || pPhysical!=fGetFirstChild(pLogical))
10401713e81bSScott Long 			continue;
10411713e81bSScott Long 
10421713e81bSScott Long 		pVBus = &pAdapter->VBus;
1043d2bd3ab9SScott Long 		if(pVBus)
1044d2bd3ab9SScott Long 		{
10451713e81bSScott Long 			j=0;
1046d2bd3ab9SScott Long 			while(j<MAX_VDEVICE_PER_VBUS && pVBus->pVDevice[j]) j++;
10471713e81bSScott Long 			if(j<MAX_VDEVICE_PER_VBUS){
10481713e81bSScott Long 				pVBus->pVDevice[j] = pLogical;
10491713e81bSScott Long 				pLogical->pVBus = pVBus;
10501713e81bSScott Long 
10511713e81bSScott Long 				if (j>0 && pLogical->vf_bootmark) {
10521713e81bSScott Long 					if (pVBus->pVDevice[0]->vf_bootmark) {
10531713e81bSScott Long 						fResetBootMark(pLogical);
1054d2bd3ab9SScott Long 					}
1055d2bd3ab9SScott Long 					else {
1056d2bd3ab9SScott Long 						do { pVBus->pVDevice[j] = pVBus->pVDevice[j-1]; } while (--j);
10571713e81bSScott Long 						pVBus->pVDevice[0] = pLogical;
10581713e81bSScott Long 					}
10591713e81bSScott Long 				}
10601713e81bSScott Long 			}
10611713e81bSScott Long 		}
10621713e81bSScott Long 	}
10631713e81bSScott Long }
10641713e81bSScott Long 
10651713e81bSScott Long PVDevice
10661713e81bSScott Long GetSpareDisk(_VBUS_ARG PVDevice pArray)
10671713e81bSScott Long {
1068d2bd3ab9SScott Long 	IAL_ADAPTER_T *pAdapter = (IAL_ADAPTER_T *)pArray->pVBus->OsExt;
106964470755SXin LI 	LBA_T capacity = LongDiv(pArray->VDeviceCapacity, pArray->u.array.bArnMember-1);
107064470755SXin LI 	LBA_T thiscap, maxcap = MAX_LBA_T;
10711713e81bSScott Long 	PVDevice pVDevice, pFind = NULL;
10721713e81bSScott Long 	int i;
10731713e81bSScott Long 
1074d2bd3ab9SScott Long 	for(i=0;i<MV_SATA_CHANNELS_NUM;i++)
1075d2bd3ab9SScott Long 	{
10761713e81bSScott Long 		pVDevice = &pAdapter->VDevices[i];
10771713e81bSScott Long 		if(!pVDevice)
10781713e81bSScott Long 			continue;
1079d2bd3ab9SScott Long 		thiscap = pArray->vf_format_v2? pVDevice->u.disk.dDeRealCapacity : pVDevice->VDeviceCapacity;
10801713e81bSScott Long 		/* find the smallest usable spare disk */
10811713e81bSScott Long 		if (pVDevice->VDeviceType==VD_SPARE &&
1082d2bd3ab9SScott Long 			pVDevice->u.disk.df_on_line &&
1083d2bd3ab9SScott Long 			thiscap < maxcap &&
1084d2bd3ab9SScott Long 			thiscap >= capacity)
1085d2bd3ab9SScott Long 		{
10861713e81bSScott Long 				maxcap = pVDevice->VDeviceCapacity;
10871713e81bSScott Long 				pFind = pVDevice;
10881713e81bSScott Long 		}
10891713e81bSScott Long 	}
10901713e81bSScott Long 	return pFind;
10911713e81bSScott Long }
10921713e81bSScott Long 
10931713e81bSScott Long /******************************************************************
10941713e81bSScott Long  * IO ATA Command
10951713e81bSScott Long  *******************************************************************/
10961713e81bSScott Long int HPTLIBAPI
10971713e81bSScott Long fDeReadWrite(PDevice pDev, ULONG Lba, UCHAR Cmd, void *tmpBuffer)
10981713e81bSScott Long {
10991713e81bSScott Long 	return mvReadWrite(pDev->mv, Lba, Cmd, tmpBuffer);
11001713e81bSScott Long }
11011713e81bSScott Long 
11021713e81bSScott Long void HPTLIBAPI fDeSelectMode(PDevice pDev, UCHAR NewMode)
11031713e81bSScott Long {
1104d2bd3ab9SScott Long 	MV_SATA_CHANNEL *pSataChannel = pDev->mv;
1105d2bd3ab9SScott Long 	MV_SATA_ADAPTER *pSataAdapter = pSataChannel->mvSataAdapter;
1106d2bd3ab9SScott Long 	MV_U8 channelIndex = pSataChannel->channelNumber;
11071713e81bSScott Long 	UCHAR mvMode;
11081713e81bSScott Long 	/* 508x don't use MW-DMA? */
11091713e81bSScott Long 	if (NewMode>4 && NewMode<8) NewMode = 4;
11101713e81bSScott Long 	pDev->bDeModeSetting = NewMode;
11111713e81bSScott Long 	if (NewMode<=4)
11121713e81bSScott Long 		mvMode = MV_ATA_TRANSFER_PIO_0 + NewMode;
11131713e81bSScott Long 	else
11141713e81bSScott Long 		mvMode = MV_ATA_TRANSFER_UDMA_0 + (NewMode-8);
11151713e81bSScott Long 
11161713e81bSScott Long 	/*To fix 88i8030 bug*/
11171713e81bSScott Long 	if (mvMode > MV_ATA_TRANSFER_UDMA_0 && mvMode < MV_ATA_TRANSFER_UDMA_4)
11181713e81bSScott Long 		mvMode = MV_ATA_TRANSFER_UDMA_0;
11191713e81bSScott Long 
11201713e81bSScott Long 	mvSataDisableChannelDma(pSataAdapter, channelIndex);
11211713e81bSScott Long 	/* Flush pending commands */
11221713e81bSScott Long 	mvSataFlushDmaQueue (pSataAdapter, channelIndex, MV_FLUSH_TYPE_NONE);
11231713e81bSScott Long 
11241713e81bSScott Long 	if (mvStorageDevATASetFeatures(pSataAdapter, channelIndex,
1125d2bd3ab9SScott Long 								   MV_ATA_SET_FEATURES_TRANSFER,
1126d2bd3ab9SScott Long 								   mvMode, 0, 0, 0) == MV_FALSE)
1127d2bd3ab9SScott Long 	{
11281713e81bSScott Long 		KdPrint(("channel %d: Set Features failed\n", channelIndex));
11291713e81bSScott Long 	}
11301713e81bSScott Long 	/* Enable EDMA */
11311713e81bSScott Long 	if (mvSataEnableChannelDma(pSataAdapter, channelIndex) == MV_FALSE)
11321713e81bSScott Long 		KdPrint(("Failed to enable DMA, channel=%d", channelIndex));
11331713e81bSScott Long }
11341713e81bSScott Long 
113564470755SXin LI int HPTLIBAPI fDeSetTCQ(PDevice pDev, int enable, int depth)
113664470755SXin LI {
113764470755SXin LI 	MV_SATA_CHANNEL *pSataChannel = pDev->mv;
113864470755SXin LI 	MV_SATA_ADAPTER *pSataAdapter = pSataChannel->mvSataAdapter;
113964470755SXin LI 	MV_U8 channelIndex = pSataChannel->channelNumber;
114064470755SXin LI 	IAL_ADAPTER_T *pAdapter = pSataAdapter->IALData;
114164470755SXin LI 	MV_CHANNEL		*channelInfo = &(pAdapter->mvChannel[channelIndex]);
114264470755SXin LI 	int dmaActive = pSataChannel->queueCommandsEnabled;
114364470755SXin LI 	int ret = 0;
114464470755SXin LI 
114564470755SXin LI 	if (dmaActive) {
114664470755SXin LI 		mvSataDisableChannelDma(pSataAdapter, channelIndex);
114764470755SXin LI 		mvSataFlushDmaQueue(pSataAdapter,channelIndex,MV_FLUSH_TYPE_CALLBACK);
114864470755SXin LI 	}
114964470755SXin LI 
115064470755SXin LI 	if (enable) {
115164470755SXin LI 		if (pSataChannel->queuedDMA == MV_EDMA_MODE_NOT_QUEUED &&
115264470755SXin LI 			(pSataChannel->identifyDevice[IDEN_SUPPORTED_COMMANDS2] & (0x2))) {
115364470755SXin LI 			UCHAR depth = ((pSataChannel->identifyDevice[IDEN_QUEUE_DEPTH]) & 0x1f) + 1;
115464470755SXin LI 			channelInfo->queueDepth = (depth==32)? 31 : depth;
115564470755SXin LI 			mvSataConfigEdmaMode(pSataAdapter, channelIndex, MV_EDMA_MODE_QUEUED, depth);
115664470755SXin LI 			ret = 1;
115764470755SXin LI 		}
115864470755SXin LI 	}
115964470755SXin LI 	else
116064470755SXin LI 	{
116164470755SXin LI 		if (pSataChannel->queuedDMA != MV_EDMA_MODE_NOT_QUEUED) {
116264470755SXin LI 			channelInfo->queueDepth = 2;
116364470755SXin LI 			mvSataConfigEdmaMode(pSataAdapter, channelIndex, MV_EDMA_MODE_NOT_QUEUED, 0);
116464470755SXin LI 			ret = 1;
116564470755SXin LI 		}
116664470755SXin LI 	}
116764470755SXin LI 
116864470755SXin LI 	if (dmaActive)
116964470755SXin LI 		mvSataEnableChannelDma(pSataAdapter,channelIndex);
117064470755SXin LI 	return ret;
117164470755SXin LI }
117264470755SXin LI 
117364470755SXin LI int HPTLIBAPI fDeSetNCQ(PDevice pDev, int enable, int depth)
117464470755SXin LI {
117564470755SXin LI 	return 0;
117664470755SXin LI }
117764470755SXin LI 
117864470755SXin LI int HPTLIBAPI fDeSetWriteCache(PDevice pDev, int enable)
117964470755SXin LI {
118064470755SXin LI 	MV_SATA_CHANNEL *pSataChannel = pDev->mv;
118164470755SXin LI 	MV_SATA_ADAPTER *pSataAdapter = pSataChannel->mvSataAdapter;
118264470755SXin LI 	MV_U8 channelIndex = pSataChannel->channelNumber;
118364470755SXin LI 	IAL_ADAPTER_T *pAdapter = pSataAdapter->IALData;
118464470755SXin LI 	MV_CHANNEL		*channelInfo = &(pAdapter->mvChannel[channelIndex]);
118564470755SXin LI 	int dmaActive = pSataChannel->queueCommandsEnabled;
118664470755SXin LI 	int ret = 0;
118764470755SXin LI 
118864470755SXin LI 	if (dmaActive) {
118964470755SXin LI 		mvSataDisableChannelDma(pSataAdapter, channelIndex);
119064470755SXin LI 		mvSataFlushDmaQueue(pSataAdapter,channelIndex,MV_FLUSH_TYPE_CALLBACK);
119164470755SXin LI 	}
119264470755SXin LI 
119364470755SXin LI 	if ((pSataChannel->identifyDevice[82] & (0x20))) {
119464470755SXin LI 		if (enable) {
119564470755SXin LI 			if (mvStorageDevATASetFeatures(pSataAdapter, channelIndex,
119664470755SXin LI 				MV_ATA_SET_FEATURES_ENABLE_WCACHE, 0, 0, 0, 0))
119764470755SXin LI 			{
119864470755SXin LI 				channelInfo->writeCacheEnabled = MV_TRUE;
119964470755SXin LI 				ret = 1;
120064470755SXin LI 			}
120164470755SXin LI 		}
120264470755SXin LI 		else {
120364470755SXin LI 			if (mvStorageDevATASetFeatures(pSataAdapter, channelIndex,
120464470755SXin LI 				MV_ATA_SET_FEATURES_DISABLE_WCACHE, 0, 0, 0, 0))
120564470755SXin LI 			{
120664470755SXin LI 				channelInfo->writeCacheEnabled = MV_FALSE;
120764470755SXin LI 				ret = 1;
120864470755SXin LI 			}
120964470755SXin LI 		}
121064470755SXin LI 	}
121164470755SXin LI 
121264470755SXin LI 	if (dmaActive)
121364470755SXin LI 		mvSataEnableChannelDma(pSataAdapter,channelIndex);
121464470755SXin LI 	return ret;
121564470755SXin LI }
121664470755SXin LI 
121764470755SXin LI int HPTLIBAPI fDeSetReadAhead(PDevice pDev, int enable)
121864470755SXin LI {
121964470755SXin LI 	MV_SATA_CHANNEL *pSataChannel = pDev->mv;
122064470755SXin LI 	MV_SATA_ADAPTER *pSataAdapter = pSataChannel->mvSataAdapter;
122164470755SXin LI 	MV_U8 channelIndex = pSataChannel->channelNumber;
122264470755SXin LI 	IAL_ADAPTER_T *pAdapter = pSataAdapter->IALData;
122364470755SXin LI 	MV_CHANNEL		*channelInfo = &(pAdapter->mvChannel[channelIndex]);
122464470755SXin LI 	int dmaActive = pSataChannel->queueCommandsEnabled;
122564470755SXin LI 	int ret = 0;
122664470755SXin LI 
122764470755SXin LI 	if (dmaActive) {
122864470755SXin LI 		mvSataDisableChannelDma(pSataAdapter, channelIndex);
122964470755SXin LI 		mvSataFlushDmaQueue(pSataAdapter,channelIndex,MV_FLUSH_TYPE_CALLBACK);
123064470755SXin LI 	}
123164470755SXin LI 
123264470755SXin LI 	if ((pSataChannel->identifyDevice[82] & (0x40))) {
123364470755SXin LI 		if (enable) {
123464470755SXin LI 			if (mvStorageDevATASetFeatures(pSataAdapter, channelIndex,
123564470755SXin LI 				MV_ATA_SET_FEATURES_ENABLE_RLA, 0, 0, 0, 0))
123664470755SXin LI 			{
123764470755SXin LI 				channelInfo->readAheadEnabled = MV_TRUE;
123864470755SXin LI 				ret = 1;
123964470755SXin LI 			}
124064470755SXin LI 		}
124164470755SXin LI 		else {
124264470755SXin LI 			if (mvStorageDevATASetFeatures(pSataAdapter, channelIndex,
124364470755SXin LI 				MV_ATA_SET_FEATURES_DISABLE_RLA, 0, 0, 0, 0))
124464470755SXin LI 			{
124564470755SXin LI 				channelInfo->readAheadEnabled = MV_FALSE;
124664470755SXin LI 				ret = 1;
124764470755SXin LI 			}
124864470755SXin LI 		}
124964470755SXin LI 	}
125064470755SXin LI 
125164470755SXin LI 	if (dmaActive)
125264470755SXin LI 		mvSataEnableChannelDma(pSataAdapter,channelIndex);
125364470755SXin LI 	return ret;
125464470755SXin LI }
125564470755SXin LI 
12561713e81bSScott Long #ifdef SUPPORT_ARRAY
12571713e81bSScott Long #define IdeRegisterVDevice  fCheckArray
12581713e81bSScott Long #else
12591713e81bSScott Long void
12601713e81bSScott Long IdeRegisterVDevice(PDevice pDev)
12611713e81bSScott Long {
12621713e81bSScott Long 	PVDevice pVDev = Map2pVDevice(pDev);
12631713e81bSScott Long 
12641713e81bSScott Long 	pVDev->VDeviceType = pDev->df_atapi? VD_ATAPI :
12651713e81bSScott Long 						 pDev->df_removable_drive? VD_REMOVABLE : VD_SINGLE_DISK;
12661713e81bSScott Long 	pVDev->vf_online = 1;
12671713e81bSScott Long 	pVDev->VDeviceCapacity = pDev->dDeRealCapacity;
12681713e81bSScott Long 	pVDev->pfnSendCommand = pfnSendCommand[pVDev->VDeviceType];
12691713e81bSScott Long 	pVDev->pfnDeviceFailed = pfnDeviceFailed[pVDev->VDeviceType];
12701713e81bSScott Long }
12711713e81bSScott Long #endif
12721713e81bSScott Long 
1273d2bd3ab9SScott Long static __inline PBUS_DMAMAP
1274d2bd3ab9SScott Long dmamap_get(struct IALAdapter * pAdapter)
1275d2bd3ab9SScott Long {
1276d2bd3ab9SScott Long 	PBUS_DMAMAP	p = pAdapter->pbus_dmamap_list;
1277d2bd3ab9SScott Long 	if (p)
1278d2bd3ab9SScott Long 		pAdapter->pbus_dmamap_list = p-> next;
1279d2bd3ab9SScott Long 	return p;
1280d2bd3ab9SScott Long }
1281d2bd3ab9SScott Long 
1282d2bd3ab9SScott Long static __inline void
1283d2bd3ab9SScott Long dmamap_put(PBUS_DMAMAP p)
1284d2bd3ab9SScott Long {
1285d2bd3ab9SScott Long 	p->next = p->pAdapter->pbus_dmamap_list;
1286d2bd3ab9SScott Long 	p->pAdapter->pbus_dmamap_list = p;
1287d2bd3ab9SScott Long }
1288d2bd3ab9SScott Long 
1289d2bd3ab9SScott Long /*Since mtx not provide the initialize when declare, so we Final init here to initialize the global mtx*/
1290d2bd3ab9SScott Long #if __FreeBSD_version >= 500000
129164470755SXin LI #define override_kernel_driver()
129264470755SXin LI 
1293d2bd3ab9SScott Long static void hpt_init(void *dummy)
1294d2bd3ab9SScott Long {
129564470755SXin LI 	override_kernel_driver();
129664470755SXin LI 	mtx_init(&driver_lock, "hptsleeplock", NULL, MTX_DEF);
1297d2bd3ab9SScott Long }
1298d2bd3ab9SScott Long SYSINIT(hptinit, SI_SUB_CONFIGURE, SI_ORDER_FIRST, hpt_init, NULL);
1299d2bd3ab9SScott Long #endif
1300d2bd3ab9SScott Long 
13011713e81bSScott Long static int num_adapters = 0;
13021713e81bSScott Long static int
13031713e81bSScott Long init_adapter(IAL_ADAPTER_T *pAdapter)
13041713e81bSScott Long {
13051713e81bSScott Long 	PVBus _vbus_p = &pAdapter->VBus;
13061713e81bSScott Long 	MV_SATA_ADAPTER *pMvSataAdapter;
1307d2bd3ab9SScott Long 	int i, channel, rid;
13081713e81bSScott Long 
13091713e81bSScott Long 	PVDevice pVDev;
13101713e81bSScott Long 
131164470755SXin LI 	intrmask_t oldspl = lock_driver();
131264470755SXin LI 
13131713e81bSScott Long 	pAdapter->next = 0;
13141713e81bSScott Long 
13151713e81bSScott Long 	if(gIal_Adapter == 0){
13161713e81bSScott Long 		gIal_Adapter = pAdapter;
13171713e81bSScott Long 		pCurAdapter = gIal_Adapter;
1318d2bd3ab9SScott Long 	}
1319d2bd3ab9SScott Long 	else {
13201713e81bSScott Long 		pCurAdapter->next = pAdapter;
13211713e81bSScott Long 		pCurAdapter = pAdapter;
13221713e81bSScott Long 	}
13231713e81bSScott Long 
13241713e81bSScott Long 	pAdapter->outstandingCommands = 0;
13251713e81bSScott Long 
13261713e81bSScott Long 	pMvSataAdapter = &(pAdapter->mvSataAdapter);
13271713e81bSScott Long 	_vbus_p->OsExt = (void *)pAdapter;
13281713e81bSScott Long 	pMvSataAdapter->IALData = pAdapter;
13291713e81bSScott Long 
1330b6f97155SScott Long 	if (bus_dma_tag_create(bus_get_dma_tag(pAdapter->hpt_dev),/* parent */
1331d2bd3ab9SScott Long 			4,	/* alignment */
1332d2bd3ab9SScott Long 			BUS_SPACE_MAXADDR_32BIT+1, /* boundary */
1333d2bd3ab9SScott Long 			BUS_SPACE_MAXADDR,	/* lowaddr */
1334d2bd3ab9SScott Long 			BUS_SPACE_MAXADDR,	/* highaddr */
1335d2bd3ab9SScott Long 			NULL, NULL, 		/* filter, filterarg */
1336d2bd3ab9SScott Long 			PAGE_SIZE * (MAX_SG_DESCRIPTORS-1), /* maxsize */
1337d2bd3ab9SScott Long 			MAX_SG_DESCRIPTORS, /* nsegments */
1338d2bd3ab9SScott Long 			0x10000,	/* maxsegsize */
1339d2bd3ab9SScott Long 			BUS_DMA_WAITOK, 	/* flags */
1340d2bd3ab9SScott Long #if __FreeBSD_version>502000
1341d2bd3ab9SScott Long 			busdma_lock_mutex,	/* lockfunc */
1342d2bd3ab9SScott Long 			&driver_lock,		/* lockfuncarg */
1343d2bd3ab9SScott Long #endif
1344d2bd3ab9SScott Long 			&pAdapter->io_dma_parent /* tag */))
1345d2bd3ab9SScott Long 		{
1346c2ede4b3SMartin Blapp 			return ENXIO;
13471713e81bSScott Long 	}
13481713e81bSScott Long 
13491713e81bSScott Long 
1350d2bd3ab9SScott Long 	if (hptmv_allocate_edma_queues(pAdapter))
1351d2bd3ab9SScott Long 	{
135264470755SXin LI 		MV_ERROR("RR18xx: Failed to allocate memory for EDMA queues\n");
135364470755SXin LI 		unlock_driver(oldspl);
1354d2bd3ab9SScott Long 		return ENOMEM;
13551713e81bSScott Long 	}
13561713e81bSScott Long 
13571713e81bSScott Long 	/* also map EPROM address */
13581713e81bSScott Long 	rid = 0x10;
1359d2bd3ab9SScott Long 	if (!(pAdapter->mem_res = bus_alloc_resource(pAdapter->hpt_dev, SYS_RES_MEMORY, &rid,
1360d2bd3ab9SScott Long 			0, ~0, MV_SATA_PCI_BAR0_SPACE_SIZE+0x40000, RF_ACTIVE))
1361d2bd3ab9SScott Long 		||
1362d2bd3ab9SScott Long 		!(pMvSataAdapter->adapterIoBaseAddress = rman_get_virtual(pAdapter->mem_res)))
1363d2bd3ab9SScott Long 	{
136464470755SXin LI 		MV_ERROR("RR18xx: Failed to remap memory space\n");
1365d2bd3ab9SScott Long 		hptmv_free_edma_queues(pAdapter);
136664470755SXin LI 		unlock_driver(oldspl);
1367d2bd3ab9SScott Long 		return ENXIO;
13681713e81bSScott Long 	}
1369d2bd3ab9SScott Long 	else
1370d2bd3ab9SScott Long 	{
137164470755SXin LI 		KdPrint(("RR18xx: io base address 0x%p\n", pMvSataAdapter->adapterIoBaseAddress));
1372d2bd3ab9SScott Long 	}
13731713e81bSScott Long 
13741713e81bSScott Long 	pMvSataAdapter->adapterId = num_adapters++;
13751713e81bSScott Long 	/* get the revision ID */
1376d2bd3ab9SScott Long 	pMvSataAdapter->pciConfigRevisionId = pci_read_config(pAdapter->hpt_dev, PCIR_REVID, 1);
13771713e81bSScott Long 	pMvSataAdapter->pciConfigDeviceId = pci_get_device(pAdapter->hpt_dev);
13781713e81bSScott Long 
137964470755SXin LI 	/* init RR18xx */
13801713e81bSScott Long 	pMvSataAdapter->intCoalThre[0]= 1;
13811713e81bSScott Long 	pMvSataAdapter->intCoalThre[1]= 1;
13821713e81bSScott Long 	pMvSataAdapter->intTimeThre[0] = 1;
13831713e81bSScott Long 	pMvSataAdapter->intTimeThre[1] = 1;
13841713e81bSScott Long 	pMvSataAdapter->pciCommand = 0x0107E371;
13851713e81bSScott Long 	pMvSataAdapter->pciSerrMask = 0xd77fe6ul;
13861713e81bSScott Long 	pMvSataAdapter->pciInterruptMask = 0xd77fe6ul;
13871713e81bSScott Long 	pMvSataAdapter->mvSataEventNotify = hptmv_event_notify;
13881713e81bSScott Long 
1389d2bd3ab9SScott Long 	if (mvSataInitAdapter(pMvSataAdapter) == MV_FALSE)
1390d2bd3ab9SScott Long 	{
139164470755SXin LI 		MV_ERROR("RR18xx[%d]: core failed to initialize the adapter\n",
13921713e81bSScott Long 				 pMvSataAdapter->adapterId);
1393d2bd3ab9SScott Long unregister:
1394d2bd3ab9SScott Long 		bus_release_resource(pAdapter->hpt_dev, SYS_RES_MEMORY, rid, pAdapter->mem_res);
1395d2bd3ab9SScott Long 		hptmv_free_edma_queues(pAdapter);
139664470755SXin LI 		unlock_driver(oldspl);
1397d2bd3ab9SScott Long 		return ENXIO;
13981713e81bSScott Long 	}
13991713e81bSScott Long 	pAdapter->ver_601 = pMvSataAdapter->pcbVersion;
14001713e81bSScott Long 
14011713e81bSScott Long #ifndef FOR_DEMO
14021713e81bSScott Long 	set_fail_leds(pMvSataAdapter, 0);
14031713e81bSScott Long #endif
14041713e81bSScott Long 
14051713e81bSScott Long 	/* setup command blocks */
14061713e81bSScott Long 	KdPrint(("Allocate command blocks\n"));
14071713e81bSScott Long 	_vbus_(pFreeCommands) = 0;
1408d2bd3ab9SScott Long 	pAdapter->pCommandBlocks =
1409d2bd3ab9SScott Long 		malloc(sizeof(struct _Command) * MAX_COMMAND_BLOCKS_FOR_EACH_VBUS, M_DEVBUF, M_NOWAIT);
14107d9aed9cSScott Long 	KdPrint(("pCommandBlocks:%p\n",pAdapter->pCommandBlocks));
1411d2bd3ab9SScott Long 	if (!pAdapter->pCommandBlocks) {
1412d2bd3ab9SScott Long 		MV_ERROR("insufficient memory\n");
1413d2bd3ab9SScott Long 		goto unregister;
14141713e81bSScott Long 	}
14151713e81bSScott Long 
1416d2bd3ab9SScott Long 	for (i=0; i<MAX_COMMAND_BLOCKS_FOR_EACH_VBUS; i++) {
1417d2bd3ab9SScott Long 		FreeCommand(_VBUS_P &(pAdapter->pCommandBlocks[i]));
1418d2bd3ab9SScott Long 	}
1419d2bd3ab9SScott Long 
1420d2bd3ab9SScott Long 	/*Set up the bus_dmamap*/
1421d2bd3ab9SScott Long 	pAdapter->pbus_dmamap = (PBUS_DMAMAP)malloc (sizeof(struct _BUS_DMAMAP) * MAX_QUEUE_COMM, M_DEVBUF, M_NOWAIT);
1422d2bd3ab9SScott Long 	if(!pAdapter->pbus_dmamap) {
1423d2bd3ab9SScott Long 		MV_ERROR("insufficient memory\n");
1424d2bd3ab9SScott Long 		free(pAdapter->pCommandBlocks, M_DEVBUF);
1425d2bd3ab9SScott Long 		goto unregister;
1426d2bd3ab9SScott Long 	}
1427d2bd3ab9SScott Long 
1428d2bd3ab9SScott Long 	memset((void *)pAdapter->pbus_dmamap, 0, sizeof(struct _BUS_DMAMAP) * MAX_QUEUE_COMM);
1429d2bd3ab9SScott Long 	pAdapter->pbus_dmamap_list = 0;
1430d2bd3ab9SScott Long 	for (i=0; i < MAX_QUEUE_COMM; i++) {
1431d2bd3ab9SScott Long 		PBUS_DMAMAP  pmap = &(pAdapter->pbus_dmamap[i]);
1432d2bd3ab9SScott Long 		pmap->pAdapter = pAdapter;
1433d2bd3ab9SScott Long 		dmamap_put(pmap);
1434d2bd3ab9SScott Long 
1435d2bd3ab9SScott Long 		if(bus_dmamap_create(pAdapter->io_dma_parent, 0, &pmap->dma_map)) {
1436d2bd3ab9SScott Long 			MV_ERROR("Can not allocate dma map\n");
1437d2bd3ab9SScott Long 			free(pAdapter->pCommandBlocks, M_DEVBUF);
1438d2bd3ab9SScott Long 			free(pAdapter->pbus_dmamap, M_DEVBUF);
1439d2bd3ab9SScott Long 			goto unregister;
1440d2bd3ab9SScott Long 		}
1441d2bd3ab9SScott Long 	}
14421713e81bSScott Long 	/* setup PRD Tables */
14431713e81bSScott Long 	KdPrint(("Allocate PRD Tables\n"));
14441713e81bSScott Long 	pAdapter->pFreePRDLink = 0;
14451713e81bSScott Long 
1446d2bd3ab9SScott Long 	pAdapter->prdTableAddr = (PUCHAR)contigmalloc(
1447d2bd3ab9SScott Long 		(PRD_ENTRIES_SIZE*PRD_TABLES_FOR_VBUS + 32), M_DEVBUF, M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0ul);
14481713e81bSScott Long 
14497d9aed9cSScott Long 	KdPrint(("prdTableAddr:%p\n",pAdapter->prdTableAddr));
14501713e81bSScott Long 	if (!pAdapter->prdTableAddr) {
14511713e81bSScott Long 		MV_ERROR("insufficient PRD Tables\n");
14521713e81bSScott Long 		goto unregister;
14531713e81bSScott Long 	}
1454d2bd3ab9SScott Long 	pAdapter->prdTableAlignedAddr = (PUCHAR)(((ULONG_PTR)pAdapter->prdTableAddr + 0x1f) & ~(ULONG_PTR)0x1fL);
1455d2bd3ab9SScott Long 	{
1456d2bd3ab9SScott Long 		PUCHAR PRDTable = pAdapter->prdTableAlignedAddr;
1457d2bd3ab9SScott Long 		for (i=0; i<PRD_TABLES_FOR_VBUS; i++)
1458d2bd3ab9SScott Long 		{
1459d2bd3ab9SScott Long /*			KdPrint(("i=%d,pAdapter->pFreePRDLink=%p\n",i,pAdapter->pFreePRDLink)); */
14601713e81bSScott Long 			FreePRDTable(pAdapter, PRDTable);
14611713e81bSScott Long 			PRDTable += PRD_ENTRIES_SIZE;
14621713e81bSScott Long 		}
1463d2bd3ab9SScott Long 	}
14641713e81bSScott Long 
14651713e81bSScott Long 	/* enable the adapter interrupts */
14661713e81bSScott Long 
14671713e81bSScott Long 	/* configure and start the connected channels*/
1468d2bd3ab9SScott Long 	for (channel = 0; channel < MV_SATA_CHANNELS_NUM; channel++)
1469d2bd3ab9SScott Long 	{
14701713e81bSScott Long 		pAdapter->mvChannel[channel].online = MV_FALSE;
14711713e81bSScott Long 		if (mvSataIsStorageDeviceConnected(pMvSataAdapter, channel)
1472d2bd3ab9SScott Long 			== MV_TRUE)
1473d2bd3ab9SScott Long 		{
147464470755SXin LI 			KdPrint(("RR18xx[%d]: channel %d is connected\n",
14751713e81bSScott Long 					  pMvSataAdapter->adapterId, channel));
14761713e81bSScott Long 
1477d2bd3ab9SScott Long 			if (hptmv_init_channel(pAdapter, channel) == 0)
1478d2bd3ab9SScott Long 			{
1479d2bd3ab9SScott Long 				if (mvSataConfigureChannel(pMvSataAdapter, channel) == MV_FALSE)
1480d2bd3ab9SScott Long 				{
148164470755SXin LI 					MV_ERROR("RR18xx[%d]: Failed to configure channel"
1482d2bd3ab9SScott Long 							 " %d\n",pMvSataAdapter->adapterId, channel);
14831713e81bSScott Long 					hptmv_free_channel(pAdapter, channel);
14841713e81bSScott Long 				}
1485d2bd3ab9SScott Long 				else
1486d2bd3ab9SScott Long 				{
1487d2bd3ab9SScott Long 					if (start_channel(pAdapter, channel))
1488d2bd3ab9SScott Long 					{
148964470755SXin LI 						MV_ERROR("RR18xx[%d]: Failed to start channel,"
14901713e81bSScott Long 								 " channel=%d\n",pMvSataAdapter->adapterId,
14911713e81bSScott Long 								 channel);
14921713e81bSScott Long 						hptmv_free_channel(pAdapter, channel);
14931713e81bSScott Long 					}
14941713e81bSScott Long 					pAdapter->mvChannel[channel].online = MV_TRUE;
1495d2bd3ab9SScott Long 					/*  mvSataChannelSetEdmaLoopBackMode(pMvSataAdapter,
1496d2bd3ab9SScott Long 													   channel,
1497d2bd3ab9SScott Long 													   MV_TRUE);*/
1498d2bd3ab9SScott Long 				}
1499d2bd3ab9SScott Long 			}
15001713e81bSScott Long 		}
15011713e81bSScott Long 		KdPrint(("pAdapter->mvChannel[channel].online:%x, channel:%d\n",
15021713e81bSScott Long 			pAdapter->mvChannel[channel].online, channel));
15031713e81bSScott Long 	}
15041713e81bSScott Long 
15051713e81bSScott Long #ifdef SUPPORT_ARRAY
15061713e81bSScott Long 	for(i = MAX_ARRAY_DEVICE - 1; i >= 0; i--) {
15071713e81bSScott Long 		pVDev = ArrayTables(i);
15081713e81bSScott Long 		mArFreeArrayTable(pVDev);
15091713e81bSScott Long 	}
15101713e81bSScott Long #endif
15111713e81bSScott Long 
15121713e81bSScott Long 	KdPrint(("Initialize Devices\n"));
15131713e81bSScott Long 	for (channel = 0; channel < MV_SATA_CHANNELS_NUM; channel++) {
1514d2bd3ab9SScott Long 		MV_SATA_CHANNEL *pMvSataChannel = pMvSataAdapter->sataChannel[channel];
15151713e81bSScott Long 		if (pMvSataChannel) {
15161713e81bSScott Long 			init_vdev_params(pAdapter, channel);
15171713e81bSScott Long 			IdeRegisterVDevice(&pAdapter->VDevices[channel].u.disk);
15181713e81bSScott Long 		}
15191713e81bSScott Long 	}
15201713e81bSScott Long #ifdef SUPPORT_ARRAY
15211713e81bSScott Long 	CheckArrayCritical(_VBUS_P0);
15221713e81bSScott Long #endif
15231713e81bSScott Long 	_vbus_p->nInstances = 1;
15241713e81bSScott Long 	fRegisterVdevice(pAdapter);
15251713e81bSScott Long 
15261713e81bSScott Long 	for (channel=0;channel<MV_SATA_CHANNELS_NUM;channel++) {
15271713e81bSScott Long 		pVDev = _vbus_p->pVDevice[channel];
15281713e81bSScott Long 		if (pVDev && pVDev->vf_online)
15291713e81bSScott Long 			fCheckBootable(pVDev);
15301713e81bSScott Long 	}
15311713e81bSScott Long 
15321713e81bSScott Long #if defined(SUPPORT_ARRAY) && defined(_RAID5N_)
15331713e81bSScott Long 	init_raid5_memory(_VBUS_P0);
15341713e81bSScott Long 	_vbus_(r5).enable_write_back = 1;
153564470755SXin LI 	printf("RR18xx: RAID5 write-back %s\n", _vbus_(r5).enable_write_back? "enabled" : "disabled");
15361713e81bSScott Long #endif
15371713e81bSScott Long 
15381713e81bSScott Long 	mvSataUnmaskAdapterInterrupt(pMvSataAdapter);
153964470755SXin LI 	unlock_driver(oldspl);
15401713e81bSScott Long 	return 0;
15411713e81bSScott Long }
15421713e81bSScott Long 
15431713e81bSScott Long int
15441713e81bSScott Long MvSataResetChannel(MV_SATA_ADAPTER *pMvSataAdapter, MV_U8 channel)
15451713e81bSScott Long {
15461713e81bSScott Long 	IAL_ADAPTER_T   *pAdapter = (IAL_ADAPTER_T *)pMvSataAdapter->IALData;
15471713e81bSScott Long 
15481713e81bSScott Long 	mvSataDisableChannelDma(pMvSataAdapter, channel);
15491713e81bSScott Long 	/* Flush pending commands */
15501713e81bSScott Long 	mvSataFlushDmaQueue (pMvSataAdapter, channel, MV_FLUSH_TYPE_CALLBACK);
15511713e81bSScott Long 
15521713e81bSScott Long 	/* Software reset channel */
1553d2bd3ab9SScott Long 	if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channel) == MV_FALSE)
1554d2bd3ab9SScott Long 	{
155564470755SXin LI 		MV_ERROR("RR18xx [%d,%d]: failed to perform Software reset\n",
15561713e81bSScott Long 				 pMvSataAdapter->adapterId, channel);
1557d2bd3ab9SScott Long 		hptmv_free_channel(pAdapter, channel);
15581713e81bSScott Long 		return -1;
15591713e81bSScott Long 	}
15601713e81bSScott Long 
15611713e81bSScott Long 	/* Hardware reset channel */
1562d2bd3ab9SScott Long 	if (mvSataChannelHardReset(pMvSataAdapter, channel)== MV_FALSE)
1563d2bd3ab9SScott Long 	{
156464470755SXin LI 		MV_ERROR("RR18xx [%d,%d] Failed to Hard reser the SATA channel\n",
1565d2bd3ab9SScott Long 				 pMvSataAdapter->adapterId, channel);
15661713e81bSScott Long 		hptmv_free_channel(pAdapter, channel);
15671713e81bSScott Long 		return -1;
15681713e81bSScott Long 	}
15691713e81bSScott Long 
1570d2bd3ab9SScott Long 	if (mvSataIsStorageDeviceConnected(pMvSataAdapter, channel) == MV_FALSE)
1571d2bd3ab9SScott Long 	{
157264470755SXin LI 		 MV_ERROR("RR18xx [%d,%d] Failed to Connect Device\n",
15731713e81bSScott Long 				 pMvSataAdapter->adapterId, channel);
15741713e81bSScott Long 		hptmv_free_channel(pAdapter, channel);
15751713e81bSScott Long 		return -1;
1576d2bd3ab9SScott Long 	}else
1577d2bd3ab9SScott Long 	{
1578d2bd3ab9SScott Long 		MV_ERROR("channel %d: perform recalibrate command", channel);
1579d2bd3ab9SScott Long 		if (!mvStorageDevATAExecuteNonUDMACommand(pMvSataAdapter, channel,
1580d2bd3ab9SScott Long 								MV_NON_UDMA_PROTOCOL_NON_DATA,
1581d2bd3ab9SScott Long 								MV_FALSE,
1582d2bd3ab9SScott Long 								NULL,	 /* pBuffer*/
1583d2bd3ab9SScott Long 								0,		 /* count  */
1584d2bd3ab9SScott Long 								0,		/*features*/
1585d2bd3ab9SScott Long 										/* sectorCount */
1586d2bd3ab9SScott Long 								0,
1587d2bd3ab9SScott Long 								0,	/* lbaLow */
1588d2bd3ab9SScott Long 								0,	/* lbaMid */
1589d2bd3ab9SScott Long 									/* lbaHigh */
1590d2bd3ab9SScott Long 								0,
1591d2bd3ab9SScott Long 								0,		/* device */
1592d2bd3ab9SScott Long 										/* command */
1593d2bd3ab9SScott Long 								0x10))
1594d2bd3ab9SScott Long 			MV_ERROR("channel %d: recalibrate failed", channel);
1595d2bd3ab9SScott Long 
15961713e81bSScott Long 		/* Set transfer mode */
15971713e81bSScott Long 		if((mvStorageDevATASetFeatures(pMvSataAdapter, channel,
1598d2bd3ab9SScott Long 						MV_ATA_SET_FEATURES_TRANSFER,
1599d2bd3ab9SScott Long 						MV_ATA_TRANSFER_PIO_SLOW, 0, 0, 0) == MV_FALSE) ||
16001713e81bSScott Long 			(mvStorageDevATASetFeatures(pMvSataAdapter, channel,
16011713e81bSScott Long 						MV_ATA_SET_FEATURES_TRANSFER,
1602d2bd3ab9SScott Long 						pAdapter->mvChannel[channel].maxPioModeSupported, 0, 0, 0) == MV_FALSE) ||
1603d2bd3ab9SScott Long 			(mvStorageDevATASetFeatures(pMvSataAdapter, channel,
1604d2bd3ab9SScott Long 						MV_ATA_SET_FEATURES_TRANSFER,
1605d2bd3ab9SScott Long 						pAdapter->mvChannel[channel].maxUltraDmaModeSupported, 0, 0, 0) == MV_FALSE) )
1606d2bd3ab9SScott Long 		{
16071713e81bSScott Long 			MV_ERROR("channel %d: Set Features failed", channel);
16081713e81bSScott Long 			hptmv_free_channel(pAdapter, channel);
16091713e81bSScott Long 			return -1;
16101713e81bSScott Long 		}
16111713e81bSScott Long 		/* Enable EDMA */
1612d2bd3ab9SScott Long 		if (mvSataEnableChannelDma(pMvSataAdapter, channel) == MV_FALSE)
1613d2bd3ab9SScott Long 		{
16141713e81bSScott Long 			MV_ERROR("Failed to enable DMA, channel=%d", channel);
16151713e81bSScott Long 			hptmv_free_channel(pAdapter, channel);
16161713e81bSScott Long 			return -1;
16171713e81bSScott Long 		}
16181713e81bSScott Long 	}
16191713e81bSScott Long 	return 0;
16201713e81bSScott Long }
16211713e81bSScott Long 
16221713e81bSScott Long static int
16231713e81bSScott Long fResetActiveCommands(PVBus _vbus_p)
16241713e81bSScott Long {
1625d2bd3ab9SScott Long 	MV_SATA_ADAPTER *pMvSataAdapter = &((IAL_ADAPTER_T *)_vbus_p->OsExt)->mvSataAdapter;
16261713e81bSScott Long 	MV_U8 channel;
16271713e81bSScott Long 	for (channel=0;channel< MV_SATA_CHANNELS_NUM;channel++) {
1628d2bd3ab9SScott Long 		if (pMvSataAdapter->sataChannel[channel] && pMvSataAdapter->sataChannel[channel]->outstandingCommands)
1629d2bd3ab9SScott Long 			MvSataResetChannel(pMvSataAdapter,channel);
16301713e81bSScott Long 	}
16311713e81bSScott Long 	return 0;
16321713e81bSScott Long }
16331713e81bSScott Long 
1634d2bd3ab9SScott Long void fCompleteAllCommandsSynchronously(PVBus _vbus_p)
16351713e81bSScott Long {
16361713e81bSScott Long 	UINT cont;
16371713e81bSScott Long 	ULONG ticks = 0;
16381713e81bSScott Long 	MV_U8 channel;
1639d2bd3ab9SScott Long 	MV_SATA_ADAPTER *pMvSataAdapter = &((IAL_ADAPTER_T *)_vbus_p->OsExt)->mvSataAdapter;
16401713e81bSScott Long 	MV_SATA_CHANNEL *pMvSataChannel;
16411713e81bSScott Long 
16421713e81bSScott Long 	do {
16431713e81bSScott Long check_cmds:
16441713e81bSScott Long 		cont = 0;
16451713e81bSScott Long 		CheckPendingCall(_VBUS_P0);
16461713e81bSScott Long #ifdef _RAID5N_
16471713e81bSScott Long 		dataxfer_poll();
16481713e81bSScott Long 		xor_poll();
16491713e81bSScott Long #endif
16501713e81bSScott Long 		for (channel=0;channel< MV_SATA_CHANNELS_NUM;channel++) {
16511713e81bSScott Long 			pMvSataChannel = pMvSataAdapter->sataChannel[channel];
1652d2bd3ab9SScott Long 			if (pMvSataChannel && pMvSataChannel->outstandingCommands)
1653d2bd3ab9SScott Long 			{
16541713e81bSScott Long 				while (pMvSataChannel->outstandingCommands) {
1655d2bd3ab9SScott Long 					if (!mvSataInterruptServiceRoutine(pMvSataAdapter)) {
16561713e81bSScott Long 						StallExec(1000);
16571713e81bSScott Long 						if (ticks++ > 3000) {
1658d2bd3ab9SScott Long 							MvSataResetChannel(pMvSataAdapter,channel);
16591713e81bSScott Long 							goto check_cmds;
16601713e81bSScott Long 						}
1661d2bd3ab9SScott Long 					}
1662d2bd3ab9SScott Long 					else
16631713e81bSScott Long 						ticks = 0;
16641713e81bSScott Long 				}
16651713e81bSScott Long 				cont = 1;
16661713e81bSScott Long 			}
16671713e81bSScott Long 		}
16681713e81bSScott Long 	} while (cont);
16691713e81bSScott Long }
16701713e81bSScott Long 
16711713e81bSScott Long void
16721713e81bSScott Long fResetVBus(_VBUS_ARG0)
16731713e81bSScott Long {
16747d9aed9cSScott Long 	KdPrint(("fMvResetBus(%p)", _vbus_p));
16751713e81bSScott Long 
16761713e81bSScott Long 	/* some commands may already finished. */
16771713e81bSScott Long 	CheckPendingCall(_VBUS_P0);
16781713e81bSScott Long 
16791713e81bSScott Long 	fResetActiveCommands(_vbus_p);
16801713e81bSScott Long 	/*
16811713e81bSScott Long 	 * the other pending commands may still be finished successfully.
16821713e81bSScott Long 	 */
16831713e81bSScott Long 	fCompleteAllCommandsSynchronously(_vbus_p);
16841713e81bSScott Long 
16851713e81bSScott Long 	/* Now there should be no pending commands. No more action needed. */
16861713e81bSScott Long 	CheckIdleCall(_VBUS_P0);
16871713e81bSScott Long 
16881713e81bSScott Long 	KdPrint(("fMvResetBus() done"));
16891713e81bSScott Long }
16901713e81bSScott Long 
1691d2bd3ab9SScott Long /*No rescan function*/
16921713e81bSScott Long void
16931713e81bSScott Long fRescanAllDevice(_VBUS_ARG0)
16941713e81bSScott Long {
16951713e81bSScott Long }
16961713e81bSScott Long 
16971713e81bSScott Long static MV_BOOLEAN
1698d2bd3ab9SScott Long CommandCompletionCB(MV_SATA_ADAPTER *pMvSataAdapter,
1699d2bd3ab9SScott Long 					MV_U8 channelNum,
1700d2bd3ab9SScott Long 					MV_COMPLETION_TYPE comp_type,
1701d2bd3ab9SScott Long 					MV_VOID_PTR commandId,
1702d2bd3ab9SScott Long 					MV_U16 responseFlags,
1703d2bd3ab9SScott Long 					MV_U32 timeStamp,
1704d2bd3ab9SScott Long 					MV_STORAGE_DEVICE_REGISTERS *registerStruct)
17051713e81bSScott Long {
17061713e81bSScott Long 	PCommand pCmd = (PCommand) commandId;
17071713e81bSScott Long 	_VBUS_INST(pCmd->pVDevice->pVBus)
17081713e81bSScott Long 
17091713e81bSScott Long 	if (pCmd->uScratch.sata_param.prdAddr)
1710d2bd3ab9SScott Long 		FreePRDTable(pMvSataAdapter->IALData,pCmd->uScratch.sata_param.prdAddr);
17111713e81bSScott Long 
1712d2bd3ab9SScott Long 	switch (comp_type)
1713d2bd3ab9SScott Long 	{
17141713e81bSScott Long 	case MV_COMPLETION_TYPE_NORMAL:
17151713e81bSScott Long 		pCmd->Result = RETURN_SUCCESS;
17161713e81bSScott Long 		break;
17171713e81bSScott Long 	case MV_COMPLETION_TYPE_ABORT:
17181713e81bSScott Long 		pCmd->Result = RETURN_BUS_RESET;
17191713e81bSScott Long 		break;
17201713e81bSScott Long 	case MV_COMPLETION_TYPE_ERROR:
1721d2bd3ab9SScott Long 		 MV_ERROR("IAL: COMPLETION ERROR, adapter %d, channel %d, flags=%x\n",
1722d2bd3ab9SScott Long 				 pMvSataAdapter->adapterId, channelNum, responseFlags);
17231713e81bSScott Long 
17241713e81bSScott Long 		if (responseFlags & 4) {
1725d2bd3ab9SScott Long 			MV_ERROR("ATA regs: error %x, sector count %x, LBA low %x, LBA mid %x,"
1726d2bd3ab9SScott Long 				" LBA high %x, device %x, status %x\n",
1727d2bd3ab9SScott Long 				registerStruct->errorRegister,
17281713e81bSScott Long 				registerStruct->sectorCountRegister,
17291713e81bSScott Long 				registerStruct->lbaLowRegister,
17301713e81bSScott Long 				registerStruct->lbaMidRegister,
17311713e81bSScott Long 				registerStruct->lbaHighRegister,
17321713e81bSScott Long 				registerStruct->deviceRegister,
17331713e81bSScott Long 				registerStruct->statusRegister);
17341713e81bSScott Long 		}
1735d2bd3ab9SScott Long 		/*We can't do handleEdmaError directly here, because CommandCompletionCB is called by
1736d2bd3ab9SScott Long 		 * mv's ISR, if we retry the command, than the internel data structure may be destroyed*/
17371713e81bSScott Long 		pCmd->uScratch.sata_param.responseFlags = responseFlags;
1738d2bd3ab9SScott Long 		pCmd->uScratch.sata_param.bIdeStatus = registerStruct->statusRegister;
1739d2bd3ab9SScott Long 		pCmd->uScratch.sata_param.errorRegister = registerStruct->errorRegister;
17401713e81bSScott Long 		pCmd->pVDevice->u.disk.QueueLength--;
17411713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)handleEdmaError,pCmd);
17421713e81bSScott Long 		return TRUE;
17431713e81bSScott Long 
17441713e81bSScott Long 	default:
17451713e81bSScott Long 		MV_ERROR(" Unknown completion type (%d)\n", comp_type);
17461713e81bSScott Long 		return MV_FALSE;
17471713e81bSScott Long 	}
17481713e81bSScott Long 
1749d2bd3ab9SScott Long 	if (pCmd->uCmd.Ide.Command == IDE_COMMAND_VERIFY && pCmd->uScratch.sata_param.cmd_priv > 1) {
17501713e81bSScott Long 		pCmd->uScratch.sata_param.cmd_priv --;
17511713e81bSScott Long 		return TRUE;
17521713e81bSScott Long 	}
17531713e81bSScott Long 	pCmd->pVDevice->u.disk.QueueLength--;
17541713e81bSScott Long 	CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
17551713e81bSScott Long 	return TRUE;
17561713e81bSScott Long }
17571713e81bSScott Long 
17581713e81bSScott Long void
17591713e81bSScott Long fDeviceSendCommand(_VBUS_ARG PCommand pCmd)
17601713e81bSScott Long {
17611713e81bSScott Long 	MV_SATA_EDMA_PRD_ENTRY  *pPRDTable = 0;
17621713e81bSScott Long 	MV_SATA_ADAPTER *pMvSataAdapter;
17631713e81bSScott Long 	MV_SATA_CHANNEL *pMvSataChannel;
1764d2bd3ab9SScott Long 	PVDevice pVDevice = pCmd->pVDevice;
1765d2bd3ab9SScott Long 	PDevice  pDevice = &pVDevice->u.disk;
176664470755SXin LI 	LBA_T    Lba = pCmd->uCmd.Ide.Lba;
1767d2bd3ab9SScott Long 	USHORT   nSector = pCmd->uCmd.Ide.nSectors;
1768d2bd3ab9SScott Long 
17691713e81bSScott Long 	MV_QUEUE_COMMAND_RESULT result;
17701713e81bSScott Long 	MV_QUEUE_COMMAND_INFO commandInfo;
1771d2bd3ab9SScott Long 	MV_UDMA_COMMAND_PARAMS  *pUdmaParams = &commandInfo.commandParams.udmaCommand;
1772d2bd3ab9SScott Long 	MV_NONE_UDMA_COMMAND_PARAMS *pNoUdmaParams = &commandInfo.commandParams.NoneUdmaCommand;
1773d2bd3ab9SScott Long 
177464470755SXin LI 	MV_BOOLEAN is48bit;
17751713e81bSScott Long 	MV_U8      channel;
17761713e81bSScott Long 	int        i=0;
17771713e81bSScott Long 
17781713e81bSScott Long 	DECLARE_BUFFER(FPSCAT_GATH, tmpSg);
17791713e81bSScott Long 
17801713e81bSScott Long 	if (!pDevice->df_on_line) {
17811713e81bSScott Long 		MV_ERROR("Device is offline");
17821713e81bSScott Long 		pCmd->Result = RETURN_BAD_DEVICE;
17831713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
17841713e81bSScott Long 		return;
17851713e81bSScott Long 	}
17861713e81bSScott Long 
17871713e81bSScott Long 	pDevice->HeadPosition = pCmd->uCmd.Ide.Lba + pCmd->uCmd.Ide.nSectors;
17881713e81bSScott Long 	pMvSataChannel = pDevice->mv;
17891713e81bSScott Long 	pMvSataAdapter = pMvSataChannel->mvSataAdapter;
17901713e81bSScott Long 	channel = pMvSataChannel->channelNumber;
17911713e81bSScott Long 
1792d2bd3ab9SScott Long 	/* old RAID0 has hidden lba. Remember to clear dDeHiddenLba when delete array! */
17931713e81bSScott Long 	Lba += pDevice->dDeHiddenLba;
17941713e81bSScott Long 	/* check LBA */
17951713e81bSScott Long 	if (Lba+nSector-1 > pDevice->dDeRealCapacity) {
17961713e81bSScott Long 		pCmd->Result = RETURN_INVALID_REQUEST;
17971713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
17981713e81bSScott Long 		return;
17991713e81bSScott Long 	}
18001713e81bSScott Long 
180164470755SXin LI 	/*
180264470755SXin LI 	 * always use 48bit LBA if drive supports it.
180364470755SXin LI 	 * Some Seagate drives report error if you use a 28-bit command
180464470755SXin LI 	 * to access sector 0xfffffff.
180564470755SXin LI 	 */
180664470755SXin LI 	is48bit = pMvSataChannel->lba48Address;
18071713e81bSScott Long 
1808d2bd3ab9SScott Long 	switch (pCmd->uCmd.Ide.Command)
1809d2bd3ab9SScott Long 	{
18101713e81bSScott Long 	case IDE_COMMAND_READ:
18111713e81bSScott Long 	case IDE_COMMAND_WRITE:
18121713e81bSScott Long 		if (pDevice->bDeModeSetting<8) goto pio;
18131713e81bSScott Long 
18141713e81bSScott Long 		commandInfo.type = MV_QUEUED_COMMAND_TYPE_UDMA;
18151713e81bSScott Long 		pUdmaParams->isEXT = is48bit;
18161713e81bSScott Long 		pUdmaParams->numOfSectors = nSector;
18171713e81bSScott Long 		pUdmaParams->lowLBAAddress = Lba;
18181713e81bSScott Long 		pUdmaParams->highLBAAddress = 0;
18191713e81bSScott Long 		pUdmaParams->prdHighAddr = 0;
18201713e81bSScott Long 		pUdmaParams->callBack = CommandCompletionCB;
18211713e81bSScott Long 		pUdmaParams->commandId = (MV_VOID_PTR )pCmd;
18221713e81bSScott Long 		if(pCmd->uCmd.Ide.Command == IDE_COMMAND_READ)
18231713e81bSScott Long 			pUdmaParams->readWrite = MV_UDMA_TYPE_READ;
18241713e81bSScott Long 		else
18251713e81bSScott Long 			pUdmaParams->readWrite = MV_UDMA_TYPE_WRITE;
18261713e81bSScott Long 
18271713e81bSScott Long 		if (pCmd->pSgTable && pCmd->cf_physical_sg) {
18281713e81bSScott Long 			FPSCAT_GATH sg1=tmpSg, sg2=pCmd->pSgTable;
1829d2bd3ab9SScott Long 			do { *sg1++=*sg2; } while ((sg2++->wSgFlag & SG_FLAG_EOT)==0);
1830d2bd3ab9SScott Long 		}
1831d2bd3ab9SScott Long 		else {
1832d2bd3ab9SScott Long 			if (!pCmd->pfnBuildSgl || !pCmd->pfnBuildSgl(_VBUS_P pCmd, tmpSg, 0)) {
18331713e81bSScott Long pio:
18341713e81bSScott Long 				mvSataDisableChannelDma(pMvSataAdapter, channel);
1835d2bd3ab9SScott Long 				mvSataFlushDmaQueue(pMvSataAdapter, channel, MV_FLUSH_TYPE_CALLBACK);
18361713e81bSScott Long 
18371713e81bSScott Long 				if (pCmd->pSgTable && pCmd->cf_physical_sg==0) {
18381713e81bSScott Long 					FPSCAT_GATH sg1=tmpSg, sg2=pCmd->pSgTable;
1839d2bd3ab9SScott Long 					do { *sg1++=*sg2; } while ((sg2++->wSgFlag & SG_FLAG_EOT)==0);
1840d2bd3ab9SScott Long 				}
1841d2bd3ab9SScott Long 				else {
1842d2bd3ab9SScott Long 					if (!pCmd->pfnBuildSgl || !pCmd->pfnBuildSgl(_VBUS_P pCmd, tmpSg, 1)) {
18431713e81bSScott Long 						pCmd->Result = RETURN_NEED_LOGICAL_SG;
18441713e81bSScott Long 						goto finish_cmd;
18451713e81bSScott Long 					}
1846d2bd3ab9SScott Long 				}
18471713e81bSScott Long 
18481713e81bSScott Long 				do {
1849d2bd3ab9SScott Long 					ULONG size = tmpSg->wSgSize? tmpSg->wSgSize : 0x10000;
18501713e81bSScott Long 					ULONG_PTR addr = tmpSg->dSgAddress;
18511713e81bSScott Long 					if (size & 0x1ff) {
18521713e81bSScott Long 						pCmd->Result = RETURN_INVALID_REQUEST;
18531713e81bSScott Long 						goto finish_cmd;
18541713e81bSScott Long 					}
1855d2bd3ab9SScott Long 					if (mvStorageDevATAExecuteNonUDMACommand(pMvSataAdapter, channel,
1856d2bd3ab9SScott Long 						(pCmd->cf_data_out)?MV_NON_UDMA_PROTOCOL_PIO_DATA_OUT:MV_NON_UDMA_PROTOCOL_PIO_DATA_IN,
1857d2bd3ab9SScott Long 						is48bit,
1858d2bd3ab9SScott Long 						(MV_U16_PTR)addr,
18591713e81bSScott Long 						size >> 1,	/* count       */
18601713e81bSScott Long 						0,		/* features  N/A  */
18611713e81bSScott Long 						(MV_U16)(size>>9),	/*sector count*/
1862d2bd3ab9SScott Long 						(MV_U16)(  (is48bit? (MV_U16)((Lba >> 16) & 0xFF00) : 0 )  | (UCHAR)(Lba & 0xFF) ), /*lbalow*/
18631713e81bSScott Long 						(MV_U16)((Lba >> 8) & 0xFF), /* lbaMid      */
1864d2bd3ab9SScott Long 						(MV_U16)((Lba >> 16) & 0xFF),/* lbaHigh     */
1865d2bd3ab9SScott Long 						(MV_U8)(0x40 | (is48bit ? 0 : (UCHAR)(Lba >> 24) & 0xFF )),/* device      */
1866d2bd3ab9SScott Long 						(MV_U8)(is48bit ? (pCmd->cf_data_in?IDE_COMMAND_READ_EXT:IDE_COMMAND_WRITE_EXT):pCmd->uCmd.Ide.Command)
1867d2bd3ab9SScott Long 					)==MV_FALSE)
1868d2bd3ab9SScott Long 					{
18691713e81bSScott Long 						pCmd->Result = RETURN_IDE_ERROR;
18701713e81bSScott Long 						goto finish_cmd;
18711713e81bSScott Long 					}
18721713e81bSScott Long 					Lba += size>>9;
18731713e81bSScott Long 					if(Lba & 0xF0000000) is48bit = MV_TRUE;
18741713e81bSScott Long 				}
18751713e81bSScott Long 				while ((tmpSg++->wSgFlag & SG_FLAG_EOT)==0);
18761713e81bSScott Long 				pCmd->Result = RETURN_SUCCESS;
18771713e81bSScott Long finish_cmd:
18781713e81bSScott Long 				mvSataEnableChannelDma(pMvSataAdapter,channel);
1879d2bd3ab9SScott Long 				CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
18801713e81bSScott Long 				return;
18811713e81bSScott Long 			}
1882d2bd3ab9SScott Long 		}
18831713e81bSScott Long 
1884d2bd3ab9SScott Long 		pPRDTable = (MV_SATA_EDMA_PRD_ENTRY *) AllocatePRDTable(pMvSataAdapter->IALData);
18857d9aed9cSScott Long 		KdPrint(("pPRDTable:%p\n",pPRDTable));
18861713e81bSScott Long 		if (!pPRDTable) {
18871713e81bSScott Long 			pCmd->Result = RETURN_DEVICE_BUSY;
1888d2bd3ab9SScott Long 			CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
18891713e81bSScott Long 			HPT_ASSERT(0);
18901713e81bSScott Long 			return;
18911713e81bSScott Long 		}
18921713e81bSScott Long 
18931713e81bSScott Long 		do{
1894d2bd3ab9SScott Long 			pPRDTable[i].highBaseAddr = (sizeof(tmpSg->dSgAddress)>4 ? (MV_U32)(tmpSg->dSgAddress>>32) : 0);
18951713e81bSScott Long 			pPRDTable[i].flags = (MV_U16)tmpSg->wSgFlag;
18961713e81bSScott Long 			pPRDTable[i].byteCount = (MV_U16)tmpSg->wSgSize;
18971713e81bSScott Long 			pPRDTable[i].lowBaseAddr = (MV_U32)tmpSg->dSgAddress;
18981713e81bSScott Long 			pPRDTable[i].reserved = 0;
18991713e81bSScott Long 			i++;
19001713e81bSScott Long 		}while((tmpSg++->wSgFlag & SG_FLAG_EOT)==0);
19011713e81bSScott Long 
1902d2bd3ab9SScott Long 		pUdmaParams->prdLowAddr = (ULONG)fOsPhysicalAddress(pPRDTable);
1903d2bd3ab9SScott Long 		if ((pUdmaParams->numOfSectors == 256) && (pMvSataChannel->lba48Address == MV_FALSE)) {
19041713e81bSScott Long 			pUdmaParams->numOfSectors = 0;
19051713e81bSScott Long 		}
19061713e81bSScott Long 
19071713e81bSScott Long 		pCmd->uScratch.sata_param.prdAddr = (PVOID)pPRDTable;
19081713e81bSScott Long 
1909d2bd3ab9SScott Long 		result = mvSataQueueCommand(pMvSataAdapter, channel, &commandInfo);
19101713e81bSScott Long 
1911d2bd3ab9SScott Long 		if (result != MV_QUEUE_COMMAND_RESULT_OK)
1912d2bd3ab9SScott Long 		{
19131713e81bSScott Long queue_failed:
1914d2bd3ab9SScott Long 			switch (result)
1915d2bd3ab9SScott Long 			{
19161713e81bSScott Long 			case MV_QUEUE_COMMAND_RESULT_BAD_LBA_ADDRESS:
1917d2bd3ab9SScott Long 				MV_ERROR("IAL Error: Edma Queue command failed. Bad LBA "
1918d2bd3ab9SScott Long 						 "LBA[31:0](0x%08x)\n", pUdmaParams->lowLBAAddress);
19191713e81bSScott Long 				pCmd->Result = RETURN_IDE_ERROR;
19201713e81bSScott Long 				break;
19211713e81bSScott Long 			case MV_QUEUE_COMMAND_RESULT_QUEUED_MODE_DISABLED:
1922d2bd3ab9SScott Long 				MV_ERROR("IAL Error: Edma Queue command failed. EDMA"
1923d2bd3ab9SScott Long 						 " disabled adapter %d channel %d\n",
19241713e81bSScott Long 						 pMvSataAdapter->adapterId, channel);
19251713e81bSScott Long 				mvSataEnableChannelDma(pMvSataAdapter,channel);
19261713e81bSScott Long 				pCmd->Result = RETURN_IDE_ERROR;
19271713e81bSScott Long 				break;
19281713e81bSScott Long 			case MV_QUEUE_COMMAND_RESULT_FULL:
1929d2bd3ab9SScott Long 				MV_ERROR("IAL Error: Edma Queue command failed. Queue is"
1930d2bd3ab9SScott Long 						 " Full adapter %d channel %d\n",
19311713e81bSScott Long 						 pMvSataAdapter->adapterId, channel);
19321713e81bSScott Long 				pCmd->Result = RETURN_DEVICE_BUSY;
19331713e81bSScott Long 				break;
19341713e81bSScott Long 			case MV_QUEUE_COMMAND_RESULT_BAD_PARAMS:
1935d2bd3ab9SScott Long 				MV_ERROR("IAL Error: Edma Queue command failed. (Bad "
1936d2bd3ab9SScott Long 						 "Params), pMvSataAdapter: %p,  pSataChannel: %p.\n",
1937d2bd3ab9SScott Long 						 pMvSataAdapter, pMvSataAdapter->sataChannel[channel]);
19381713e81bSScott Long 				pCmd->Result = RETURN_IDE_ERROR;
19391713e81bSScott Long 				break;
19401713e81bSScott Long 			default:
1941d2bd3ab9SScott Long 				MV_ERROR("IAL Error: Bad result value (%d) from queue"
1942d2bd3ab9SScott Long 						 " command\n", result);
19431713e81bSScott Long 				pCmd->Result = RETURN_IDE_ERROR;
19441713e81bSScott Long 			}
19451713e81bSScott Long 			if(pPRDTable)
1946d2bd3ab9SScott Long 				FreePRDTable(pMvSataAdapter->IALData,pPRDTable);
1947d2bd3ab9SScott Long 			CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
19481713e81bSScott Long 		}
19491713e81bSScott Long 		pDevice->QueueLength++;
19501713e81bSScott Long 		return;
19511713e81bSScott Long 
19521713e81bSScott Long 	case IDE_COMMAND_VERIFY:
19531713e81bSScott Long 		commandInfo.type = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
19541713e81bSScott Long 		pNoUdmaParams->bufPtr = NULL;
19551713e81bSScott Long 		pNoUdmaParams->callBack = CommandCompletionCB;
19561713e81bSScott Long 		pNoUdmaParams->commandId = (MV_VOID_PTR)pCmd;
19571713e81bSScott Long 		pNoUdmaParams->count = 0;
19581713e81bSScott Long 		pNoUdmaParams->features = 0;
19591713e81bSScott Long 		pNoUdmaParams->protocolType = MV_NON_UDMA_PROTOCOL_NON_DATA;
19601713e81bSScott Long 
19611713e81bSScott Long 		pCmd->uScratch.sata_param.cmd_priv = 1;
19621713e81bSScott Long 		if (pMvSataChannel->lba48Address == MV_TRUE){
1963d2bd3ab9SScott Long 			pNoUdmaParams->command = MV_ATA_COMMAND_READ_VERIFY_SECTORS_EXT;
19641713e81bSScott Long 			pNoUdmaParams->isEXT = MV_TRUE;
1965d2bd3ab9SScott Long 			pNoUdmaParams->lbaHigh = (MV_U16)((Lba & 0xff0000) >> 16);
19661713e81bSScott Long 			pNoUdmaParams->lbaMid = (MV_U16)((Lba & 0xff00) >> 8);
19671713e81bSScott Long 			pNoUdmaParams->lbaLow =
19681713e81bSScott Long 				(MV_U16)(((Lba & 0xff000000) >> 16)| (Lba & 0xff));
19691713e81bSScott Long 			pNoUdmaParams->sectorCount = nSector;
19701713e81bSScott Long 			pNoUdmaParams->device = 0x40;
1971d2bd3ab9SScott Long 			result = mvSataQueueCommand(pMvSataAdapter, channel, &commandInfo);
19721713e81bSScott Long 			if (result != MV_QUEUE_COMMAND_RESULT_OK){
19731713e81bSScott Long 				goto queue_failed;
19741713e81bSScott Long 			}
19751713e81bSScott Long 			return;
19761713e81bSScott Long 		}
1977d2bd3ab9SScott Long 		else{
19781713e81bSScott Long 			pNoUdmaParams->command = MV_ATA_COMMAND_READ_VERIFY_SECTORS;
19791713e81bSScott Long 			pNoUdmaParams->isEXT = MV_FALSE;
19801713e81bSScott Long 			pNoUdmaParams->lbaHigh = (MV_U16)((Lba & 0xff0000) >> 16);
19811713e81bSScott Long 			pNoUdmaParams->lbaMid = (MV_U16)((Lba & 0xff00) >> 8);
19821713e81bSScott Long 			pNoUdmaParams->lbaLow = (MV_U16)(Lba & 0xff);
19831713e81bSScott Long 			pNoUdmaParams->sectorCount = 0xff & nSector;
19841713e81bSScott Long 			pNoUdmaParams->device = (MV_U8)(0x40 |
19851713e81bSScott Long 				((Lba & 0xf000000) >> 24));
19861713e81bSScott Long 			pNoUdmaParams->callBack = CommandCompletionCB;
1987d2bd3ab9SScott Long 			result = mvSataQueueCommand(pMvSataAdapter, channel, &commandInfo);
1988d2bd3ab9SScott Long 			/*FIXME: how about the commands already queued? but marvel also forgets to consider this*/
19891713e81bSScott Long 			if (result != MV_QUEUE_COMMAND_RESULT_OK){
19901713e81bSScott Long 				goto queue_failed;
19911713e81bSScott Long 			}
1992d2bd3ab9SScott Long 		}
19931713e81bSScott Long 		break;
19941713e81bSScott Long 	default:
19951713e81bSScott Long 		pCmd->Result = RETURN_INVALID_REQUEST;
19961713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
19971713e81bSScott Long 		break;
19981713e81bSScott Long 	}
19991713e81bSScott Long }
20001713e81bSScott Long 
20011713e81bSScott Long /**********************************************************
20021713e81bSScott Long  *
20031713e81bSScott Long  *	Probe the hostadapter.
20041713e81bSScott Long  *
20051713e81bSScott Long  **********************************************************/
20061713e81bSScott Long static int
20071713e81bSScott Long hpt_probe(device_t dev)
20081713e81bSScott Long {
20091713e81bSScott Long 	if ((pci_get_vendor(dev) == MV_SATA_VENDOR_ID) &&
20101713e81bSScott Long 		(pci_get_device(dev) == MV_SATA_DEVICE_ID_5081
20111713e81bSScott Long #ifdef FOR_DEMO
20121713e81bSScott Long 		|| pci_get_device(dev) == MV_SATA_DEVICE_ID_5080
20131713e81bSScott Long #endif
2014d2bd3ab9SScott Long 		))
2015d2bd3ab9SScott Long 	{
20161713e81bSScott Long 		KdPrintI((CONTROLLER_NAME " found\n"));
20171713e81bSScott Long 		device_set_desc(dev, CONTROLLER_NAME);
20181713e81bSScott Long 		return 0;
20191713e81bSScott Long 	}
20201713e81bSScott Long 	else
20211713e81bSScott Long 		return(ENXIO);
20221713e81bSScott Long }
20231713e81bSScott Long 
20241713e81bSScott Long /***********************************************************
20251713e81bSScott Long  *
20261713e81bSScott Long  *      Auto configuration:  attach and init a host adapter.
20271713e81bSScott Long  *
20281713e81bSScott Long  ***********************************************************/
20291713e81bSScott Long static int
20301713e81bSScott Long hpt_attach(device_t dev)
20311713e81bSScott Long {
2032d2bd3ab9SScott Long 	IAL_ADAPTER_T * pAdapter = device_get_softc(dev);
20331713e81bSScott Long 	int rid;
20341713e81bSScott Long 	union ccb *ccb;
20351713e81bSScott Long 	struct cam_devq *devq;
20361713e81bSScott Long 	struct cam_sim *hpt_vsim;
20371713e81bSScott Long 
20381713e81bSScott Long 	printf("%s Version %s \n", DRIVER_NAME, DRIVER_VERSION);
20391713e81bSScott Long 
2040d2bd3ab9SScott Long 	if (!pAdapter)
2041d2bd3ab9SScott Long 	{
2042d2bd3ab9SScott Long 		pAdapter = (IAL_ADAPTER_T *)malloc(sizeof (IAL_ADAPTER_T), M_DEVBUF, M_NOWAIT);
2043d2bd3ab9SScott Long #if __FreeBSD_version > 410000
2044d2bd3ab9SScott Long 		device_set_softc(dev, (void *)pAdapter);
2045d2bd3ab9SScott Long #else
2046d2bd3ab9SScott Long 		device_set_driver(dev, (driver_t *)pAdapter);
2047d2bd3ab9SScott Long #endif
2048d2bd3ab9SScott Long 	}
2049d2bd3ab9SScott Long 
2050d2bd3ab9SScott Long 	if (!pAdapter) return (ENOMEM);
2051d2bd3ab9SScott Long 	bzero(pAdapter, sizeof(IAL_ADAPTER_T));
2052d2bd3ab9SScott Long 
20531713e81bSScott Long 	pAdapter->hpt_dev = dev;
20541713e81bSScott Long 
20551713e81bSScott Long 	rid = init_adapter(pAdapter);
20561713e81bSScott Long 	if (rid)
20571713e81bSScott Long 		return rid;
20581713e81bSScott Long 
20591713e81bSScott Long 	rid = 0;
2060d2bd3ab9SScott Long 	if ((pAdapter->hpt_irq = bus_alloc_resource(pAdapter->hpt_dev, SYS_RES_IRQ, &rid, 0, ~0ul, 1, RF_SHAREABLE | RF_ACTIVE)) == NULL)
2061d2bd3ab9SScott Long 	{
20621713e81bSScott Long 		hpt_printk(("can't allocate interrupt\n"));
20631713e81bSScott Long 		return(ENXIO);
20641713e81bSScott Long 	}
20651713e81bSScott Long 
206664470755SXin LI #if __FreeBSD_version <700000
206764470755SXin LI 	if (bus_setup_intr(pAdapter->hpt_dev, pAdapter->hpt_irq, INTR_TYPE_CAM,
206864470755SXin LI 				hpt_intr, pAdapter, &pAdapter->hpt_intr))
206964470755SXin LI #else
207064470755SXin LI 	if (bus_setup_intr(pAdapter->hpt_dev, pAdapter->hpt_irq, INTR_TYPE_CAM,
207164470755SXin LI 				NULL, hpt_intr, pAdapter, &pAdapter->hpt_intr))
207264470755SXin LI #endif
2073d2bd3ab9SScott Long 	{
20741713e81bSScott Long 		hpt_printk(("can't set up interrupt\n"));
20751713e81bSScott Long 		free(pAdapter, M_DEVBUF);
20761713e81bSScott Long 		return(ENXIO);
20771713e81bSScott Long 	}
20781713e81bSScott Long 
2079d2bd3ab9SScott Long 
2080d2bd3ab9SScott Long 	if((ccb = (union ccb *)malloc(sizeof(*ccb), M_DEVBUF, M_WAITOK)) != (union ccb*)NULL)
2081d2bd3ab9SScott Long 	{
2082d2bd3ab9SScott Long 		bzero(ccb, sizeof(*ccb));
20831713e81bSScott Long 		ccb->ccb_h.pinfo.priority = 1;
20841713e81bSScott Long 		ccb->ccb_h.pinfo.index = CAM_UNQUEUED_INDEX;
2085d2bd3ab9SScott Long 	}
2086d2bd3ab9SScott Long 	else
2087d2bd3ab9SScott Long 	{
20881713e81bSScott Long 		return ENOMEM;
20891713e81bSScott Long 	}
20901713e81bSScott Long 	/*
20911713e81bSScott Long 	 * Create the device queue for our SIM(s).
20921713e81bSScott Long 	 */
2093d2bd3ab9SScott Long 	if((devq = cam_simq_alloc(8/*MAX_QUEUE_COMM*/)) == NULL)
2094d2bd3ab9SScott Long 	{
20951713e81bSScott Long 		KdPrint(("ENXIO\n"));
20961713e81bSScott Long 		return ENOMEM;
20971713e81bSScott Long 	}
20981713e81bSScott Long 
20991713e81bSScott Long 	/*
21001713e81bSScott Long 	 * Construct our SIM entry
21011713e81bSScott Long 	 */
210264470755SXin LI #if __FreeBSD_version <700000
210364470755SXin LI 	hpt_vsim = cam_sim_alloc(hpt_action, hpt_poll, __str(PROC_DIR_NAME),
210464470755SXin LI 			pAdapter, device_get_unit(pAdapter->hpt_dev), 1, 8, devq);
210564470755SXin LI #else
210664470755SXin LI 	hpt_vsim = cam_sim_alloc(hpt_action, hpt_poll, __str(PROC_DIR_NAME),
210764470755SXin LI 			pAdapter, device_get_unit(pAdapter->hpt_dev), &Giant, 1, 8, devq);
210864470755SXin LI #endif
210964470755SXin LI 	if (hpt_vsim == NULL) {
21101713e81bSScott Long 		cam_simq_free(devq);
21111713e81bSScott Long 		return ENOMEM;
21121713e81bSScott Long 	}
21131713e81bSScott Long 
211464470755SXin LI #if __FreeBSD_version <700000
211564470755SXin LI 	if (xpt_bus_register(hpt_vsim, 0) != CAM_SUCCESS)
211664470755SXin LI #else
2117b50569b7SScott Long 	if (xpt_bus_register(hpt_vsim, dev, 0) != CAM_SUCCESS)
211864470755SXin LI #endif
2119d2bd3ab9SScott Long 	{
21201713e81bSScott Long 		cam_sim_free(hpt_vsim, /*free devq*/ TRUE);
21211713e81bSScott Long 		hpt_vsim = NULL;
21221713e81bSScott Long 		return ENXIO;
21231713e81bSScott Long 	}
21241713e81bSScott Long 
21251713e81bSScott Long 	if(xpt_create_path(&pAdapter->path, /*periph */ NULL,
2126d2bd3ab9SScott Long 			cam_sim_path(hpt_vsim), CAM_TARGET_WILDCARD,
2127d2bd3ab9SScott Long 			CAM_LUN_WILDCARD) != CAM_REQ_CMP)
2128d2bd3ab9SScott Long 	{
21291713e81bSScott Long 		xpt_bus_deregister(cam_sim_path(hpt_vsim));
21301713e81bSScott Long 		cam_sim_free(hpt_vsim, /*free_devq*/TRUE);
21311713e81bSScott Long 		hpt_vsim = NULL;
21321713e81bSScott Long 		return ENXIO;
21331713e81bSScott Long 	}
21341713e81bSScott Long 
21351713e81bSScott Long 	xpt_setup_ccb(&(ccb->ccb_h), pAdapter->path, /*priority*/5);
21361713e81bSScott Long 	ccb->ccb_h.func_code = XPT_SASYNC_CB;
21371713e81bSScott Long 	ccb->csa.event_enable = AC_LOST_DEVICE;
21381713e81bSScott Long 	ccb->csa.callback = hpt_async;
21391713e81bSScott Long 	ccb->csa.callback_arg = hpt_vsim;
21401713e81bSScott Long 	xpt_action((union ccb *)ccb);
21411713e81bSScott Long 	free(ccb, M_DEVBUF);
21421713e81bSScott Long 
2143cd3ef666SXin LI 	if (device_get_unit(dev) == 0) {
21448eadd1b2SXin LI 		/* Start the work thread.  XXX */
21456e0e5d36SNate Lawson 		launch_worker_thread();
21466e0e5d36SNate Lawson 	}
21471713e81bSScott Long 
21481713e81bSScott Long 	return 0;
21491713e81bSScott Long }
21501713e81bSScott Long 
21511713e81bSScott Long static int
21521713e81bSScott Long hpt_detach(device_t dev)
21531713e81bSScott Long {
21541713e81bSScott Long 	return (EBUSY);
21551713e81bSScott Long }
21561713e81bSScott Long 
2157d2bd3ab9SScott Long 
21581713e81bSScott Long /***************************************************************
21591713e81bSScott Long  * The poll function is used to simulate the interrupt when
21601713e81bSScott Long  * the interrupt subsystem is not functioning.
21611713e81bSScott Long  *
21621713e81bSScott Long  ***************************************************************/
21631713e81bSScott Long static void
21641713e81bSScott Long hpt_poll(struct cam_sim *sim)
21651713e81bSScott Long {
21661713e81bSScott Long 	hpt_intr((void *)cam_sim_softc(sim));
21671713e81bSScott Long }
21681713e81bSScott Long 
21691713e81bSScott Long /****************************************************************
21701713e81bSScott Long  *	Name:	hpt_intr
21711713e81bSScott Long  *	Description:	Interrupt handler.
21721713e81bSScott Long  ****************************************************************/
21731713e81bSScott Long static void
21741713e81bSScott Long hpt_intr(void *arg)
21751713e81bSScott Long {
21761713e81bSScott Long 	IAL_ADAPTER_T *pAdapter = (IAL_ADAPTER_T *)arg;
2177d2bd3ab9SScott Long 	intrmask_t oldspl = lock_driver();
21781713e81bSScott Long 
21791713e81bSScott Long 	/* KdPrintI(("----- Entering Isr() -----\n")); */
2180d2bd3ab9SScott Long 	if (mvSataInterruptServiceRoutine(&pAdapter->mvSataAdapter) == MV_TRUE)
2181d2bd3ab9SScott Long 	{
21821713e81bSScott Long 		_VBUS_INST(&pAdapter->VBus)
21831713e81bSScott Long 		CheckPendingCall(_VBUS_P0);
21841713e81bSScott Long 	}
21851713e81bSScott Long 
21861713e81bSScott Long 	/* KdPrintI(("----- Leaving Isr() -----\n")); */
21871713e81bSScott Long 	unlock_driver(oldspl);
21881713e81bSScott Long }
21891713e81bSScott Long 
21901713e81bSScott Long /**********************************************************
21911713e81bSScott Long  * 			Asynchronous Events
21921713e81bSScott Long  *********************************************************/
21931713e81bSScott Long #if (!defined(UNREFERENCED_PARAMETER))
21941713e81bSScott Long #define UNREFERENCED_PARAMETER(x) (void)(x)
21951713e81bSScott Long #endif
21961713e81bSScott Long 
21971713e81bSScott Long static void
21981713e81bSScott Long hpt_async(void * callback_arg, u_int32_t code, struct cam_path * path,
21991713e81bSScott Long     void * arg)
22001713e81bSScott Long {
22011713e81bSScott Long 	/* debug XXXX */
22021713e81bSScott Long 	panic("Here");
22031713e81bSScott Long 	UNREFERENCED_PARAMETER(callback_arg);
22041713e81bSScott Long 	UNREFERENCED_PARAMETER(code);
22051713e81bSScott Long 	UNREFERENCED_PARAMETER(path);
22061713e81bSScott Long 	UNREFERENCED_PARAMETER(arg);
22071713e81bSScott Long 
22081713e81bSScott Long }
22091713e81bSScott Long 
22101713e81bSScott Long static void
22111713e81bSScott Long FlushAdapter(IAL_ADAPTER_T *pAdapter)
22121713e81bSScott Long {
22131713e81bSScott Long 	int i;
22141713e81bSScott Long 
22151713e81bSScott Long 	hpt_printk(("flush all devices\n"));
22161713e81bSScott Long 
22171713e81bSScott Long 	/* flush all devices */
22181713e81bSScott Long 	for (i=0; i<MAX_VDEVICE_PER_VBUS; i++) {
22191713e81bSScott Long 		PVDevice pVDev = pAdapter->VBus.pVDevice[i];
2220d2bd3ab9SScott Long 		if(pVDev) fFlushVDev(pVDev);
22211713e81bSScott Long 	}
22221713e81bSScott Long }
22231713e81bSScott Long 
22241713e81bSScott Long static int
22251713e81bSScott Long hpt_shutdown(device_t dev)
22261713e81bSScott Long {
22271713e81bSScott Long 		IAL_ADAPTER_T *pAdapter;
22281713e81bSScott Long 
22291713e81bSScott Long 		pAdapter = device_get_softc(dev);
22301713e81bSScott Long 		if (pAdapter == NULL)
22311713e81bSScott Long 			return (EINVAL);
22321713e81bSScott Long 
22331713e81bSScott Long 		EVENTHANDLER_DEREGISTER(shutdown_final, pAdapter->eh);
22341713e81bSScott Long 		FlushAdapter(pAdapter);
2235d2bd3ab9SScott Long 		  /* give the flush some time to happen,
2236d2bd3ab9SScott Long 		    *otherwise "shutdown -p now" will make file system corrupted */
2237d2bd3ab9SScott Long 		DELAY(1000 * 1000 * 5);
22381713e81bSScott Long 		return 0;
22391713e81bSScott Long }
22401713e81bSScott Long 
22411713e81bSScott Long void
22421713e81bSScott Long Check_Idle_Call(IAL_ADAPTER_T *pAdapter)
22431713e81bSScott Long {
22441713e81bSScott Long 	_VBUS_INST(&pAdapter->VBus)
22451713e81bSScott Long 
22461713e81bSScott Long 	if (mWaitingForIdle(_VBUS_P0)) {
22471713e81bSScott Long 		CheckIdleCall(_VBUS_P0);
22481713e81bSScott Long #ifdef SUPPORT_ARRAY
2249d2bd3ab9SScott Long 		{
2250d2bd3ab9SScott Long 			int i;
22511713e81bSScott Long 			PVDevice pArray;
2252d2bd3ab9SScott Long 			for(i = 0; i < MAX_ARRAY_PER_VBUS; i++){
22531713e81bSScott Long 				if ((pArray=ArrayTables(i))->u.array.dArStamp==0)
22541713e81bSScott Long 					continue;
22551713e81bSScott Long 				else if (pArray->u.array.rf_auto_rebuild) {
22561713e81bSScott Long 						KdPrint(("auto rebuild.\n"));
22571713e81bSScott Long 						pArray->u.array.rf_auto_rebuild = 0;
2258d2bd3ab9SScott Long 						hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapter, pArray, DUPLICATE);
2259d2bd3ab9SScott Long 				}
22601713e81bSScott Long 			}
22611713e81bSScott Long 		}
22621713e81bSScott Long #endif
22631713e81bSScott Long 	}
22641713e81bSScott Long 	/* launch the awaiting commands blocked by mWaitingForIdle */
2265d2bd3ab9SScott Long 	while(pAdapter->pending_Q!= NULL)
2266d2bd3ab9SScott Long 	{
22671713e81bSScott Long 		_VBUS_INST(&pAdapter->VBus)
2268d2bd3ab9SScott Long 		union ccb *ccb = (union ccb *)pAdapter->pending_Q->ccb_h.ccb_ccb_ptr;
22691713e81bSScott Long 		hpt_free_ccb(&pAdapter->pending_Q, ccb);
22701713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)OsSendCommand, ccb);
22711713e81bSScott Long 	}
22721713e81bSScott Long }
22731713e81bSScott Long 
22741713e81bSScott Long static void
22751713e81bSScott Long ccb_done(union ccb *ccb)
22761713e81bSScott Long {
2277d2bd3ab9SScott Long 	PBUS_DMAMAP pmap = (PBUS_DMAMAP)ccb->ccb_adapter;
2278d2bd3ab9SScott Long 	IAL_ADAPTER_T * pAdapter = pmap->pAdapter;
2279d2bd3ab9SScott Long 	KdPrintI(("ccb_done: ccb %p status %x\n", ccb, ccb->ccb_h.status));
22801713e81bSScott Long 
2281d2bd3ab9SScott Long 	dmamap_put(pmap);
22821713e81bSScott Long 	xpt_done(ccb);
22831713e81bSScott Long 
22841713e81bSScott Long 	pAdapter->outstandingCommands--;
22851713e81bSScott Long 
2286d2bd3ab9SScott Long 	if (pAdapter->outstandingCommands == 0)
2287d2bd3ab9SScott Long 	{
22881713e81bSScott Long 		if(DPC_Request_Nums == 0)
22891713e81bSScott Long 			Check_Idle_Call(pAdapter);
22901713e81bSScott Long 	}
22911713e81bSScott Long }
22921713e81bSScott Long 
22931713e81bSScott Long /****************************************************************
22941713e81bSScott Long  *	Name:	hpt_action
22951713e81bSScott Long  *	Description:	Process a queued command from the CAM layer.
22961713e81bSScott Long  *	Parameters:		sim - Pointer to SIM object
22971713e81bSScott Long  *					ccb - Pointer to SCSI command structure.
22981713e81bSScott Long  ****************************************************************/
22991713e81bSScott Long 
23001713e81bSScott Long void
23011713e81bSScott Long hpt_action(struct cam_sim *sim, union ccb *ccb)
23021713e81bSScott Long {
23031713e81bSScott Long 	intrmask_t oldspl;
23041713e81bSScott Long 	IAL_ADAPTER_T * pAdapter = (IAL_ADAPTER_T *) cam_sim_softc(sim);
2305d2bd3ab9SScott Long 	PBUS_DMAMAP  pmap;
23061713e81bSScott Long 	_VBUS_INST(&pAdapter->VBus)
23071713e81bSScott Long 
2308e1ab829aSScott Long 	CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("hpt_action\n"));
2309d2bd3ab9SScott Long 	KdPrint(("hpt_action(%lx,%lx{%x})\n", (u_long)sim, (u_long)ccb, ccb->ccb_h.func_code));
23101713e81bSScott Long 
2311d2bd3ab9SScott Long 	switch (ccb->ccb_h.func_code)
2312d2bd3ab9SScott Long 	{
23131713e81bSScott Long 		case XPT_SCSI_IO:	/* Execute the requested I/O operation */
2314d2bd3ab9SScott Long 		{
23151713e81bSScott Long 			/* ccb->ccb_h.path_id is not our bus id - don't check it */
23161713e81bSScott Long 
23171713e81bSScott Long 			if (ccb->ccb_h.target_lun)	{
23181713e81bSScott Long 				ccb->ccb_h.status = CAM_LUN_INVALID;
23191713e81bSScott Long 				xpt_done(ccb);
23201713e81bSScott Long 				return;
23211713e81bSScott Long 			}
23221713e81bSScott Long 			if (ccb->ccb_h.target_id >= MAX_VDEVICE_PER_VBUS ||
23231713e81bSScott Long 				pAdapter->VBus.pVDevice[ccb->ccb_h.target_id]==0) {
23241713e81bSScott Long 				ccb->ccb_h.status = CAM_TID_INVALID;
23251713e81bSScott Long 				xpt_done(ccb);
23261713e81bSScott Long 				return;
23271713e81bSScott Long 			}
23281713e81bSScott Long 
23291713e81bSScott Long 			oldspl = lock_driver();
23301713e81bSScott Long 			if (pAdapter->outstandingCommands==0 && DPC_Request_Nums==0)
23311713e81bSScott Long 				Check_Idle_Call(pAdapter);
23321713e81bSScott Long 
2333d2bd3ab9SScott Long 			pmap = dmamap_get(pAdapter);
2334d2bd3ab9SScott Long 			HPT_ASSERT(pmap);
2335d2bd3ab9SScott Long 			ccb->ccb_adapter = pmap;
2336d2bd3ab9SScott Long 			memset((void *)pmap->psg, 0,  sizeof(pmap->psg));
2337d2bd3ab9SScott Long 
23381713e81bSScott Long 			if (mWaitingForIdle(_VBUS_P0))
23391713e81bSScott Long 				hpt_queue_ccb(&pAdapter->pending_Q, ccb);
23401713e81bSScott Long 			else
23411713e81bSScott Long 				OsSendCommand(_VBUS_P ccb);
23421713e81bSScott Long 			unlock_driver(oldspl);
23431713e81bSScott Long 
23441713e81bSScott Long 			/* KdPrint(("leave scsiio\n")); */
23451713e81bSScott Long 			break;
2346d2bd3ab9SScott Long 		}
23471713e81bSScott Long 
23481713e81bSScott Long 		case XPT_RESET_BUS:
23491713e81bSScott Long 			KdPrint(("reset bus\n"));
23501713e81bSScott Long 			oldspl = lock_driver();
23511713e81bSScott Long 			fResetVBus(_VBUS_P0);
23521713e81bSScott Long 			unlock_driver(oldspl);
23531713e81bSScott Long 			xpt_done(ccb);
23541713e81bSScott Long 			break;
23551713e81bSScott Long 
23561713e81bSScott Long 		case XPT_RESET_DEV:	/* Bus Device Reset the specified SCSI device */
23571713e81bSScott Long 		case XPT_EN_LUN:		/* Enable LUN as a target */
23581713e81bSScott Long 		case XPT_TARGET_IO:		/* Execute target I/O request */
23591713e81bSScott Long 		case XPT_ACCEPT_TARGET_IO:	/* Accept Host Target Mode CDB */
23601713e81bSScott Long 		case XPT_CONT_TARGET_IO:	/* Continue Host Target I/O Connection*/
23611713e81bSScott Long 		case XPT_ABORT:			/* Abort the specified CCB */
23621713e81bSScott Long 		case XPT_TERM_IO:		/* Terminate the I/O process */
23631713e81bSScott Long 			/* XXX Implement */
23641713e81bSScott Long 			ccb->ccb_h.status = CAM_REQ_INVALID;
23651713e81bSScott Long 			xpt_done(ccb);
23661713e81bSScott Long 			break;
23671713e81bSScott Long 
23681713e81bSScott Long 		case XPT_GET_TRAN_SETTINGS:
23691713e81bSScott Long 		case XPT_SET_TRAN_SETTINGS:
23701713e81bSScott Long 			/* XXX Implement */
23711713e81bSScott Long 			ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
23721713e81bSScott Long 			xpt_done(ccb);
23731713e81bSScott Long 			break;
23741713e81bSScott Long 
23751713e81bSScott Long 		case XPT_CALC_GEOMETRY:
2376f3b080e6SMarius Strobl #if __FreeBSD_version >= 500000
2377f3b080e6SMarius Strobl 			cam_calc_geometry(&ccb->ccg, 1);
2378f3b080e6SMarius Strobl #else
23791713e81bSScott Long 			{
23801713e81bSScott Long 			struct	  ccb_calc_geometry *ccg;
23811713e81bSScott Long 			u_int32_t size_mb;
23821713e81bSScott Long 			u_int32_t secs_per_cylinder;
23831713e81bSScott Long 
23841713e81bSScott Long 			ccg = &ccb->ccg;
23851713e81bSScott Long 			size_mb = ccg->volume_size / ((1024L * 1024L) / ccg->block_size);
23861713e81bSScott Long 
23871713e81bSScott Long 			if (size_mb > 1024 ) {
23881713e81bSScott Long 				ccg->heads = 255;
23891713e81bSScott Long 				ccg->secs_per_track = 63;
23901713e81bSScott Long 			} else {
23911713e81bSScott Long 				ccg->heads = 64;
23921713e81bSScott Long 				ccg->secs_per_track = 32;
23931713e81bSScott Long 			}
23941713e81bSScott Long 			secs_per_cylinder = ccg->heads * ccg->secs_per_track;
23951713e81bSScott Long 			ccg->cylinders = ccg->volume_size / secs_per_cylinder;
23961713e81bSScott Long 			ccb->ccb_h.status = CAM_REQ_CMP;
2397f3b080e6SMarius Strobl 			}
2398f3b080e6SMarius Strobl #endif
23991713e81bSScott Long 			xpt_done(ccb);
24001713e81bSScott Long 			break;
24011713e81bSScott Long 
24021713e81bSScott Long 		case XPT_PATH_INQ:		/* Path routing inquiry */
24031713e81bSScott Long 		{
24041713e81bSScott Long 			struct ccb_pathinq *cpi = &ccb->cpi;
24051713e81bSScott Long 
24061713e81bSScott Long 			cpi->version_num = 1; /* XXX??? */
24071713e81bSScott Long 			cpi->hba_inquiry = PI_SDTR_ABLE;
24081713e81bSScott Long 			cpi->target_sprt = 0;
24091713e81bSScott Long 			/* Not necessary to reset bus */
24101713e81bSScott Long 			cpi->hba_misc = PIM_NOBUSRESET;
24111713e81bSScott Long 			cpi->hba_eng_cnt = 0;
24121713e81bSScott Long 
24131713e81bSScott Long 			cpi->max_target = MAX_VDEVICE_PER_VBUS;
24141713e81bSScott Long 			cpi->max_lun = 0;
24151713e81bSScott Long 			cpi->initiator_id = MAX_VDEVICE_PER_VBUS;
24161713e81bSScott Long 
24171713e81bSScott Long 			cpi->bus_id = cam_sim_bus(sim);
24181713e81bSScott Long 			cpi->base_transfer_speed = 3300;
24191713e81bSScott Long 			strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
24201713e81bSScott Long 			strncpy(cpi->hba_vid, "HPT   ", HBA_IDLEN);
24211713e81bSScott Long 			strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
24221713e81bSScott Long 			cpi->unit_number = cam_sim_unit(sim);
24239085ea50SAlexander Motin 			cpi->transport = XPORT_SPI;
24249085ea50SAlexander Motin 			cpi->transport_version = 2;
24259085ea50SAlexander Motin 			cpi->protocol = PROTO_SCSI;
24269085ea50SAlexander Motin 			cpi->protocol_version = SCSI_REV_2;
24271713e81bSScott Long 			cpi->ccb_h.status = CAM_REQ_CMP;
24281713e81bSScott Long 			xpt_done(ccb);
24291713e81bSScott Long 			break;
24301713e81bSScott Long 		}
24311713e81bSScott Long 
24321713e81bSScott Long 		default:
24331713e81bSScott Long 			KdPrint(("invalid cmd\n"));
24341713e81bSScott Long 			ccb->ccb_h.status = CAM_REQ_INVALID;
24351713e81bSScott Long 			xpt_done(ccb);
24361713e81bSScott Long 			break;
24371713e81bSScott Long 	}
24381713e81bSScott Long 	/* KdPrint(("leave hpt_action..............\n")); */
24391713e81bSScott Long }
24401713e81bSScott Long 
24411713e81bSScott Long /* shall be called at lock_driver() */
24421713e81bSScott Long static void
24431713e81bSScott Long hpt_queue_ccb(union ccb **ccb_Q, union ccb *ccb)
24441713e81bSScott Long {
24451713e81bSScott Long 	if(*ccb_Q == NULL)
24461713e81bSScott Long 		ccb->ccb_h.ccb_ccb_ptr = ccb;
24471713e81bSScott Long 	else {
24481713e81bSScott Long 		ccb->ccb_h.ccb_ccb_ptr = (*ccb_Q)->ccb_h.ccb_ccb_ptr;
24491713e81bSScott Long 		(*ccb_Q)->ccb_h.ccb_ccb_ptr = (char *)ccb;
24501713e81bSScott Long 	}
24511713e81bSScott Long 
24521713e81bSScott Long 	*ccb_Q = ccb;
24531713e81bSScott Long }
24541713e81bSScott Long 
24551713e81bSScott Long /* shall be called at lock_driver() */
24561713e81bSScott Long static void
24571713e81bSScott Long hpt_free_ccb(union ccb **ccb_Q, union ccb *ccb)
24581713e81bSScott Long {
24591713e81bSScott Long 	union ccb *TempCCB;
24601713e81bSScott Long 
24611713e81bSScott Long 	TempCCB = *ccb_Q;
24621713e81bSScott Long 
2463d2bd3ab9SScott Long 	if(ccb->ccb_h.ccb_ccb_ptr == ccb) /*it means SCpnt is the last one in CURRCMDs*/
24641713e81bSScott Long 		*ccb_Q = NULL;
24651713e81bSScott Long 	else {
24661713e81bSScott Long 		while(TempCCB->ccb_h.ccb_ccb_ptr != (char *)ccb)
24671713e81bSScott Long 			TempCCB = (union ccb *)TempCCB->ccb_h.ccb_ccb_ptr;
24681713e81bSScott Long 
24691713e81bSScott Long 		TempCCB->ccb_h.ccb_ccb_ptr = ccb->ccb_h.ccb_ccb_ptr;
24701713e81bSScott Long 
24711713e81bSScott Long 		if(*ccb_Q == ccb)
24721713e81bSScott Long 			*ccb_Q = TempCCB;
24731713e81bSScott Long 	}
24741713e81bSScott Long }
24751713e81bSScott Long 
24761713e81bSScott Long #ifdef SUPPORT_ARRAY
24771713e81bSScott Long /***************************************************************************
24781713e81bSScott Long  * Function:     hpt_worker_thread
24791713e81bSScott Long  * Description:  Do background rebuilding. Execute in kernel thread context.
24801713e81bSScott Long  * Returns:      None
24811713e81bSScott Long  ***************************************************************************/
24821713e81bSScott Long static void hpt_worker_thread(void)
24831713e81bSScott Long {
24841713e81bSScott Long 	intrmask_t oldspl;
24851713e81bSScott Long 
24861713e81bSScott Long 	for(;;)	{
24871713e81bSScott Long 		while (DpcQueue_First!=DpcQueue_Last) {
24881713e81bSScott Long 			ST_HPT_DPC p;
24891713e81bSScott Long 			oldspl = lock_driver();
24901713e81bSScott Long 			p = DpcQueue[DpcQueue_First];
24911713e81bSScott Long 			DpcQueue_First++;
24921713e81bSScott Long 			DpcQueue_First %= MAX_DPC;
24931713e81bSScott Long 			DPC_Request_Nums++;
24941713e81bSScott Long 			unlock_driver(oldspl);
24951713e81bSScott Long 			p.dpc(p.pAdapter, p.arg, p.flags);
24961713e81bSScott Long 
24971713e81bSScott Long 			oldspl = lock_driver();
24981713e81bSScott Long 			DPC_Request_Nums--;
2499d2bd3ab9SScott Long 			/* since we may have prevented Check_Idle_Call, do it here */
25001713e81bSScott Long 			if (DPC_Request_Nums==0) {
25011713e81bSScott Long 				if (p.pAdapter->outstandingCommands == 0) {
25021713e81bSScott Long 					_VBUS_INST(&p.pAdapter->VBus);
25031713e81bSScott Long 					Check_Idle_Call(p.pAdapter);
25041713e81bSScott Long 					CheckPendingCall(_VBUS_P0);
25051713e81bSScott Long 				}
25061713e81bSScott Long 			}
25071713e81bSScott Long 			unlock_driver(oldspl);
25081713e81bSScott Long 
2509d2bd3ab9SScott Long 			/*Schedule out*/
2510d2bd3ab9SScott Long #if (__FreeBSD_version < 500000)
2511d2bd3ab9SScott Long 			YIELD_THREAD;
2512d2bd3ab9SScott Long #else
251364470755SXin LI #if (__FreeBSD_version > 700033)
25144d70511aSJohn Baldwin 			pause("sched", 1);
251564470755SXin LI #else
251664470755SXin LI 			tsleep((caddr_t)hpt_worker_thread, PPAUSE, "sched", 1);
251764470755SXin LI #endif
2518d2bd3ab9SScott Long #endif
2519d2bd3ab9SScott Long 			if (SIGISMEMBER(curproc->p_siglist, SIGSTOP)) {
25201713e81bSScott Long 				/* abort rebuilding process. */
2521d2bd3ab9SScott Long 				IAL_ADAPTER_T *pAdapter;
2522d2bd3ab9SScott Long 				PVDevice      pArray;
2523d2bd3ab9SScott Long 				PVBus         _vbus_p;
2524d2bd3ab9SScott Long 				int i;
25251713e81bSScott Long 				pAdapter = gIal_Adapter;
2526d2bd3ab9SScott Long 
25271713e81bSScott Long 				while(pAdapter != 0){
2528d2bd3ab9SScott Long 
25291713e81bSScott Long 					_vbus_p = &pAdapter->VBus;
2530d2bd3ab9SScott Long 
2531d2bd3ab9SScott Long 					for (i=0;i<MAX_ARRAY_PER_VBUS;i++)
2532d2bd3ab9SScott Long 					{
25331713e81bSScott Long 						if ((pArray=ArrayTables(i))->u.array.dArStamp==0)
25341713e81bSScott Long 							continue;
2535d2bd3ab9SScott Long 						else if (pArray->u.array.rf_rebuilding ||
25361713e81bSScott Long 								pArray->u.array.rf_verifying ||
2537d2bd3ab9SScott Long 								pArray->u.array.rf_initializing)
2538d2bd3ab9SScott Long 							{
25391713e81bSScott Long 								pArray->u.array.rf_abort_rebuild = 1;
25401713e81bSScott Long 							}
25411713e81bSScott Long 					}
25421713e81bSScott Long 					pAdapter = pAdapter->next;
25431713e81bSScott Long 				}
25441713e81bSScott Long 			}
2545d2bd3ab9SScott Long 		}
25461713e81bSScott Long 
2547d2bd3ab9SScott Long /*Remove this debug option*/
2548d2bd3ab9SScott Long /*
25491713e81bSScott Long #ifdef DEBUG
25501713e81bSScott Long 		if (SIGISMEMBER(curproc->p_siglist, SIGSTOP))
255164470755SXin LI #if (__FreeBSD_version > 700033)
25524d70511aSJohn Baldwin 			pause("hptrdy", 2*hz);
255364470755SXin LI #else
255464470755SXin LI 			tsleep((caddr_t)hpt_worker_thread, PPAUSE, "hptrdy", 2*hz);
255564470755SXin LI #endif
25561713e81bSScott Long #endif
2557d2bd3ab9SScott Long */
255864470755SXin LI 	#if (__FreeBSD_version >= 800002)
25593745c395SJulian Elischer 		kproc_suspend_check(curproc);
256064470755SXin LI 	#elif (__FreeBSD_version >= 500043)
256164470755SXin LI 		kthread_suspend_check(curproc);
25621713e81bSScott Long 	#else
25631713e81bSScott Long 		kproc_suspend_loop(curproc);
25641713e81bSScott Long 	#endif
256564470755SXin LI #if (__FreeBSD_version > 700033)
25664d70511aSJohn Baldwin 		pause("hptrdy", 2*hz);  /* wait for something to do */
256764470755SXin LI #else
256864470755SXin LI 		tsleep((caddr_t)hpt_worker_thread, PPAUSE, "hptrdy", 2*hz);  /* wait for something to do */
256964470755SXin LI #endif
25701713e81bSScott Long 	}
25711713e81bSScott Long }
25721713e81bSScott Long 
25731713e81bSScott Long static struct proc *hptdaemonproc;
25741713e81bSScott Long static struct kproc_desc hpt_kp = {
25751713e81bSScott Long 	"hpt_wt",
25761713e81bSScott Long 	hpt_worker_thread,
25771713e81bSScott Long 	&hptdaemonproc
25781713e81bSScott Long };
25791713e81bSScott Long 
2580d2bd3ab9SScott Long /*Start this thread in the hpt_attach, to prevent kernel from loading it without our controller.*/
25811713e81bSScott Long static void
25821713e81bSScott Long launch_worker_thread(void)
25831713e81bSScott Long {
25841713e81bSScott Long 	IAL_ADAPTER_T *pAdapTemp;
25851713e81bSScott Long 
25861713e81bSScott Long 	kproc_start(&hpt_kp);
25871713e81bSScott Long 
25881713e81bSScott Long 	for (pAdapTemp = gIal_Adapter; pAdapTemp; pAdapTemp = pAdapTemp->next) {
25891713e81bSScott Long 
25901713e81bSScott Long 		_VBUS_INST(&pAdapTemp->VBus)
25911713e81bSScott Long 		int i;
25921713e81bSScott Long 		PVDevice pVDev;
25931713e81bSScott Long 
25941713e81bSScott Long 		for(i = 0; i < MAX_ARRAY_PER_VBUS; i++)
25951713e81bSScott Long 			if ((pVDev=ArrayTables(i))->u.array.dArStamp==0)
25961713e81bSScott Long 				continue;
2597d2bd3ab9SScott Long 			else{
2598d2bd3ab9SScott Long 				if (pVDev->u.array.rf_need_rebuild && !pVDev->u.array.rf_rebuilding)
2599d2bd3ab9SScott Long 					hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapTemp, pVDev,
2600d2bd3ab9SScott Long 					(UCHAR)((pVDev->u.array.CriticalMembers || pVDev->VDeviceType == VD_RAID_1)? DUPLICATE : REBUILD_PARITY));
26011713e81bSScott Long 			}
26021713e81bSScott Long 	}
26031713e81bSScott Long 
26041713e81bSScott Long 	/*
2605d2bd3ab9SScott Long 	 * hpt_worker_thread needs to be suspended after shutdown sync, when fs sync finished.
26061713e81bSScott Long 	 */
26071713e81bSScott Long #if (__FreeBSD_version < 500043)
2608d2bd3ab9SScott Long 	EVENTHANDLER_REGISTER(shutdown_post_sync, shutdown_kproc, hptdaemonproc, SHUTDOWN_PRI_FIRST);
26091713e81bSScott Long #else
2610d2bd3ab9SScott Long 	EVENTHANDLER_REGISTER(shutdown_post_sync, kproc_shutdown, hptdaemonproc, SHUTDOWN_PRI_FIRST);
26111713e81bSScott Long #endif
26121713e81bSScott Long }
2613d2bd3ab9SScott Long /*
2614d2bd3ab9SScott Long  *SYSINIT(hptwt, SI_SUB_KTHREAD_IDLE, SI_ORDER_FIRST, launch_worker_thread, NULL);
2615d2bd3ab9SScott Long */
26161713e81bSScott Long 
2617d2bd3ab9SScott Long #endif
26181713e81bSScott Long 
26191713e81bSScott Long /********************************************************************************/
26201713e81bSScott Long 
2621d2bd3ab9SScott Long int HPTLIBAPI fOsBuildSgl(_VBUS_ARG PCommand pCmd, FPSCAT_GATH pSg, int logical)
26221713e81bSScott Long {
2623d2bd3ab9SScott Long 	union ccb *ccb = (union ccb *)pCmd->pOrgCommand;
2624d2bd3ab9SScott Long 	bus_dma_segment_t *sgList = (bus_dma_segment_t *)ccb->csio.data_ptr;
26251713e81bSScott Long 	int idx;
26261713e81bSScott Long 
26271713e81bSScott Long 	if(logical) {
2628d2bd3ab9SScott Long 		if (ccb->ccb_h.flags & CAM_DATA_PHYS)
2629d2bd3ab9SScott Long 			panic("physical address unsupported");
26301713e81bSScott Long 
2631d2bd3ab9SScott Long 		if (ccb->ccb_h.flags & CAM_SCATTER_VALID) {
2632d2bd3ab9SScott Long 			if (ccb->ccb_h.flags & CAM_SG_LIST_PHYS)
2633d2bd3ab9SScott Long 				panic("physical address unsupported");
2634d2bd3ab9SScott Long 
2635d2bd3ab9SScott Long 			for (idx = 0; idx < ccb->csio.sglist_cnt; idx++) {
2636d2bd3ab9SScott Long 				pSg[idx].dSgAddress = (ULONG_PTR)(UCHAR *)sgList[idx].ds_addr;
2637d2bd3ab9SScott Long 				pSg[idx].wSgSize = sgList[idx].ds_len;
2638d2bd3ab9SScott Long 				pSg[idx].wSgFlag = (idx==ccb->csio.sglist_cnt-1)? SG_FLAG_EOT : 0;
2639d2bd3ab9SScott Long 			}
2640d2bd3ab9SScott Long 		}
2641d2bd3ab9SScott Long 		else {
2642d2bd3ab9SScott Long 			pSg->dSgAddress = (ULONG_PTR)(UCHAR *)ccb->csio.data_ptr;
2643d2bd3ab9SScott Long 			pSg->wSgSize = ccb->csio.dxfer_len;
26441713e81bSScott Long 			pSg->wSgFlag = SG_FLAG_EOT;
2645d2bd3ab9SScott Long 		}
26461713e81bSScott Long 		return TRUE;
26471713e81bSScott Long 	}
26481713e81bSScott Long 
2649d2bd3ab9SScott Long 	/* since we have provided physical sg, nobody will ask us to build physical sg */
2650d2bd3ab9SScott Long 	HPT_ASSERT(0);
26511713e81bSScott Long 	return FALSE;
26521713e81bSScott Long }
26531713e81bSScott Long 
26541713e81bSScott Long /*******************************************************************************/
26551713e81bSScott Long ULONG HPTLIBAPI
26561713e81bSScott Long GetStamp(void)
26571713e81bSScott Long {
26581713e81bSScott Long 	/*
26591713e81bSScott Long 	 * the system variable, ticks, can't be used since it hasn't yet been active
26601713e81bSScott Long 	 * when our driver starts (ticks==0, it's a invalid stamp value)
26611713e81bSScott Long 	 */
2662d2bd3ab9SScott Long 	ULONG stamp;
2663d2bd3ab9SScott Long 	do { stamp = random(); } while (stamp==0);
26641713e81bSScott Long 	return stamp;
26651713e81bSScott Long }
26661713e81bSScott Long 
26671713e81bSScott Long 
26681713e81bSScott Long static void
26691713e81bSScott Long SetInquiryData(PINQUIRYDATA inquiryData, PVDevice pVDev)
26701713e81bSScott Long {
26711713e81bSScott Long 	int i;
2672d2bd3ab9SScott Long 	IDENTIFY_DATA2 *pIdentify = (IDENTIFY_DATA2*)pVDev->u.disk.mv->identifyDevice;
26731713e81bSScott Long 
26741713e81bSScott Long 	inquiryData->DeviceType = T_DIRECT; /*DIRECT_ACCESS_DEVICE*/
26751713e81bSScott Long 	inquiryData->AdditionalLength = (UCHAR)(sizeof(INQUIRYDATA) - 5);
26761713e81bSScott Long #ifndef SERIAL_CMDS
26771713e81bSScott Long 	inquiryData->CommandQueue = 1;
26781713e81bSScott Long #endif
26791713e81bSScott Long 
26801713e81bSScott Long 	switch(pVDev->VDeviceType) {
26811713e81bSScott Long 	case VD_SINGLE_DISK:
26821713e81bSScott Long 	case VD_ATAPI:
26831713e81bSScott Long 	case VD_REMOVABLE:
26841713e81bSScott Long 		/* Set the removable bit, if applicable. */
2685d2bd3ab9SScott Long 		if ((pVDev->u.disk.df_removable_drive) || (pIdentify->GeneralConfiguration & 0x80))
26861713e81bSScott Long 			inquiryData->RemovableMedia = 1;
26871713e81bSScott Long 
26881713e81bSScott Long 		/* Fill in vendor identification fields. */
2689d2bd3ab9SScott Long 		for (i = 0; i < 20; i += 2) {
2690d2bd3ab9SScott Long 			inquiryData->VendorId[i] 	= ((PUCHAR)pIdentify->ModelNumber)[i + 1];
2691d2bd3ab9SScott Long 			inquiryData->VendorId[i+1] 	= ((PUCHAR)pIdentify->ModelNumber)[i];
26921713e81bSScott Long 
26931713e81bSScott Long 		}
26941713e81bSScott Long 
26951713e81bSScott Long 		/* Initialize unused portion of product id. */
26961713e81bSScott Long 		for (i = 0; i < 4; i++) inquiryData->ProductId[12+i] = ' ';
26971713e81bSScott Long 
26981713e81bSScott Long 		/* firmware revision */
2699d2bd3ab9SScott Long 		for (i = 0; i < 4; i += 2)
2700d2bd3ab9SScott Long 		{
2701d2bd3ab9SScott Long 			inquiryData->ProductRevisionLevel[i] 	= ((PUCHAR)pIdentify->FirmwareRevision)[i+1];
2702d2bd3ab9SScott Long 			inquiryData->ProductRevisionLevel[i+1] 	= ((PUCHAR)pIdentify->FirmwareRevision)[i];
27031713e81bSScott Long 		}
27041713e81bSScott Long 		break;
27051713e81bSScott Long 	default:
270664470755SXin LI 		memcpy(&inquiryData->VendorId, "RR18xx  ", 8);
27071713e81bSScott Long #ifdef SUPPORT_ARRAY
27081713e81bSScott Long 		switch(pVDev->VDeviceType){
27091713e81bSScott Long 		case VD_RAID_0:
2710d2bd3ab9SScott Long 			if ((pVDev->u.array.pMember[0] && mIsArray(pVDev->u.array.pMember[0])) ||
2711d2bd3ab9SScott Long 				(pVDev->u.array.pMember[1] && mIsArray(pVDev->u.array.pMember[1])))
2712d2bd3ab9SScott Long 				memcpy(&inquiryData->ProductId, "RAID 1/0 Array  ", 16);
27131713e81bSScott Long 			else
2714d2bd3ab9SScott Long 				memcpy(&inquiryData->ProductId, "RAID 0 Array    ", 16);
27151713e81bSScott Long 			break;
27161713e81bSScott Long 		case VD_RAID_1:
2717d2bd3ab9SScott Long 			if ((pVDev->u.array.pMember[0] && mIsArray(pVDev->u.array.pMember[0])) ||
2718d2bd3ab9SScott Long 				(pVDev->u.array.pMember[1] && mIsArray(pVDev->u.array.pMember[1])))
2719d2bd3ab9SScott Long 				memcpy(&inquiryData->ProductId, "RAID 0/1 Array  ", 16);
27201713e81bSScott Long 			else
2721d2bd3ab9SScott Long 				memcpy(&inquiryData->ProductId, "RAID 1 Array    ", 16);
27221713e81bSScott Long 			break;
27231713e81bSScott Long 		case VD_RAID_5:
27241713e81bSScott Long 			memcpy(&inquiryData->ProductId, "RAID 5 Array    ", 16);
27251713e81bSScott Long 			break;
27261713e81bSScott Long 		case VD_JBOD:
27271713e81bSScott Long 			memcpy(&inquiryData->ProductId, "JBOD Array      ", 16);
27281713e81bSScott Long 			break;
27291713e81bSScott Long 		}
27301713e81bSScott Long #endif
27311713e81bSScott Long 		memcpy(&inquiryData->ProductRevisionLevel, "3.00", 4);
27321713e81bSScott Long 		break;
27331713e81bSScott Long 	}
27341713e81bSScott Long }
27351713e81bSScott Long 
27361713e81bSScott Long static void
27371713e81bSScott Long hpt_timeout(void *arg)
27381713e81bSScott Long {
2739d2bd3ab9SScott Long 	_VBUS_INST(&((PBUS_DMAMAP)((union ccb *)arg)->ccb_adapter)->pAdapter->VBus)
2740d2bd3ab9SScott Long 	intrmask_t oldspl = lock_driver();
27411713e81bSScott Long 	fResetVBus(_VBUS_P0);
27421713e81bSScott Long 	unlock_driver(oldspl);
27431713e81bSScott Long }
27441713e81bSScott Long 
2745d2bd3ab9SScott Long static void
2746d2bd3ab9SScott Long hpt_io_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
2747d2bd3ab9SScott Long {
2748d2bd3ab9SScott Long 	PCommand pCmd = (PCommand)arg;
2749d2bd3ab9SScott Long 	union ccb *ccb = pCmd->pOrgCommand;
2750d2bd3ab9SScott Long 	struct ccb_hdr *ccb_h = &ccb->ccb_h;
2751d2bd3ab9SScott Long 	PBUS_DMAMAP pmap = (PBUS_DMAMAP) ccb->ccb_adapter;
2752d2bd3ab9SScott Long 	IAL_ADAPTER_T *pAdapter = pmap->pAdapter;
2753d2bd3ab9SScott Long 	PVDevice	pVDev = pAdapter->VBus.pVDevice[ccb_h->target_id];
2754d2bd3ab9SScott Long 	FPSCAT_GATH psg = pCmd->pSgTable;
2755d2bd3ab9SScott Long 	int idx;
2756d2bd3ab9SScott Long 	_VBUS_INST(pVDev->pVBus)
2757d2bd3ab9SScott Long 
2758d2bd3ab9SScott Long 	HPT_ASSERT(pCmd->cf_physical_sg);
2759d2bd3ab9SScott Long 
2760d2bd3ab9SScott Long 	if (error || nsegs == 0)
2761d2bd3ab9SScott Long 		panic("busdma error");
2762d2bd3ab9SScott Long 
2763d2bd3ab9SScott Long 	HPT_ASSERT(nsegs<= MAX_SG_DESCRIPTORS);
2764d2bd3ab9SScott Long 
2765d2bd3ab9SScott Long 	for (idx = 0; idx < nsegs; idx++, psg++) {
2766d2bd3ab9SScott Long 		psg->dSgAddress = (ULONG_PTR)(UCHAR *)segs[idx].ds_addr;
2767d2bd3ab9SScott Long 		psg->wSgSize = segs[idx].ds_len;
2768d2bd3ab9SScott Long 		psg->wSgFlag = (idx == nsegs-1)? SG_FLAG_EOT: 0;
2769d2bd3ab9SScott Long /*		KdPrint(("psg[%d]:add=%p,size=%x,flag=%x\n", idx, psg->dSgAddress,psg->wSgSize,psg->wSgFlag)); */
2770d2bd3ab9SScott Long 	}
2771d2bd3ab9SScott Long /*	psg[-1].wSgFlag = SG_FLAG_EOT; */
2772d2bd3ab9SScott Long 
2773d2bd3ab9SScott Long 	if (pCmd->cf_data_in) {
2774d2bd3ab9SScott Long 		bus_dmamap_sync(pAdapter->io_dma_parent, pmap->dma_map, BUS_DMASYNC_PREREAD);
2775d2bd3ab9SScott Long 	}
2776d2bd3ab9SScott Long 	else if (pCmd->cf_data_out) {
2777d2bd3ab9SScott Long 		bus_dmamap_sync(pAdapter->io_dma_parent, pmap->dma_map, BUS_DMASYNC_PREWRITE);
2778d2bd3ab9SScott Long 	}
2779d2bd3ab9SScott Long 
2780d2bd3ab9SScott Long 	ccb->ccb_h.timeout_ch = timeout(hpt_timeout, (caddr_t)ccb, 20*hz);
2781d2bd3ab9SScott Long 	pVDev->pfnSendCommand(_VBUS_P pCmd);
2782d2bd3ab9SScott Long 	CheckPendingCall(_VBUS_P0);
2783d2bd3ab9SScott Long }
2784d2bd3ab9SScott Long 
2785d2bd3ab9SScott Long 
2786d2bd3ab9SScott Long 
27871713e81bSScott Long static void HPTLIBAPI
27881713e81bSScott Long OsSendCommand(_VBUS_ARG union ccb *ccb)
27891713e81bSScott Long {
2790d2bd3ab9SScott Long 	PBUS_DMAMAP pmap = (PBUS_DMAMAP)ccb->ccb_adapter;
2791d2bd3ab9SScott Long 	IAL_ADAPTER_T *pAdapter = pmap->pAdapter;
2792d2bd3ab9SScott Long 	struct ccb_hdr *ccb_h = &ccb->ccb_h;
2793d2bd3ab9SScott Long 	struct ccb_scsiio *csio = &ccb->csio;
2794d2bd3ab9SScott Long 	PVDevice	pVDev = pAdapter->VBus.pVDevice[ccb_h->target_id];
27951713e81bSScott Long 
27967d9aed9cSScott Long 	KdPrintI(("OsSendCommand: ccb %p  cdb %x-%x-%x\n",
27971713e81bSScott Long 		ccb,
27981713e81bSScott Long 		*(ULONG *)&ccb->csio.cdb_io.cdb_bytes[0],
27991713e81bSScott Long 		*(ULONG *)&ccb->csio.cdb_io.cdb_bytes[4],
28001713e81bSScott Long 		*(ULONG *)&ccb->csio.cdb_io.cdb_bytes[8]
28011713e81bSScott Long 	));
28021713e81bSScott Long 
28031713e81bSScott Long 	pAdapter->outstandingCommands++;
28041713e81bSScott Long 
28051713e81bSScott Long 	if (pVDev == NULL || pVDev->vf_online == 0) {
28061713e81bSScott Long 		ccb->ccb_h.status = CAM_REQ_INVALID;
28071713e81bSScott Long 		ccb_done(ccb);
28081713e81bSScott Long 		goto Command_Complished;
28091713e81bSScott Long 	}
28101713e81bSScott Long 
28111713e81bSScott Long 	switch(ccb->csio.cdb_io.cdb_bytes[0])
28121713e81bSScott Long 	{
28131713e81bSScott Long 		case TEST_UNIT_READY:
28141713e81bSScott Long 		case START_STOP_UNIT:
28151713e81bSScott Long 		case SYNCHRONIZE_CACHE:
28161713e81bSScott Long 			/* FALLTHROUGH */
28171713e81bSScott Long 			ccb->ccb_h.status = CAM_REQ_CMP;
28181713e81bSScott Long 			break;
28191713e81bSScott Long 
28201713e81bSScott Long 		case INQUIRY:
28211713e81bSScott Long 			ZeroMemory(ccb->csio.data_ptr, ccb->csio.dxfer_len);
28221713e81bSScott Long 			SetInquiryData((PINQUIRYDATA)ccb->csio.data_ptr, pVDev);
28231713e81bSScott Long 			ccb_h->status = CAM_REQ_CMP;
28241713e81bSScott Long 			break;
28251713e81bSScott Long 
28261713e81bSScott Long 		case READ_CAPACITY:
28271713e81bSScott Long 		{
282864470755SXin LI 			UCHAR *rbuf=csio->data_ptr;
282964470755SXin LI 			unsigned int cap;
283064470755SXin LI 
283164470755SXin LI 			if (pVDev->VDeviceCapacity > 0xfffffffful) {
283264470755SXin LI 				cap = 0xfffffffful;
283364470755SXin LI 			} else {
283464470755SXin LI 				cap = pVDev->VDeviceCapacity - 1;
283564470755SXin LI 			}
283664470755SXin LI 
283764470755SXin LI 			rbuf[0] = (UCHAR)(cap>>24);
283864470755SXin LI 			rbuf[1] = (UCHAR)(cap>>16);
283964470755SXin LI 			rbuf[2] = (UCHAR)(cap>>8);
284064470755SXin LI 			rbuf[3] = (UCHAR)cap;
28411713e81bSScott Long 			/* Claim 512 byte blocks (big-endian). */
284264470755SXin LI 			rbuf[4] = 0;
284364470755SXin LI 			rbuf[5] = 0;
284464470755SXin LI 			rbuf[6] = 2;
284564470755SXin LI 			rbuf[7] = 0;
284664470755SXin LI 
284764470755SXin LI 			ccb_h->status = CAM_REQ_CMP;
284864470755SXin LI 			break;
284964470755SXin LI 		}
285064470755SXin LI 
285164470755SXin LI 		case 0x9e: /*SERVICE_ACTION_IN*/
285264470755SXin LI 		{
285364470755SXin LI 			UCHAR *rbuf = csio->data_ptr;
285464470755SXin LI 			LBA_T cap = pVDev->VDeviceCapacity - 1;
285564470755SXin LI 
285664470755SXin LI 			rbuf[0] = (UCHAR)(cap>>56);
285764470755SXin LI 			rbuf[1] = (UCHAR)(cap>>48);
285864470755SXin LI 			rbuf[2] = (UCHAR)(cap>>40);
285964470755SXin LI 			rbuf[3] = (UCHAR)(cap>>32);
286064470755SXin LI 			rbuf[4] = (UCHAR)(cap>>24);
286164470755SXin LI 			rbuf[5] = (UCHAR)(cap>>16);
286264470755SXin LI 			rbuf[6] = (UCHAR)(cap>>8);
286364470755SXin LI 			rbuf[7] = (UCHAR)cap;
286464470755SXin LI 			rbuf[8] = 0;
286564470755SXin LI 			rbuf[9] = 0;
286664470755SXin LI 			rbuf[10] = 2;
286764470755SXin LI 			rbuf[11] = 0;
286864470755SXin LI 
28691713e81bSScott Long 			ccb_h->status = CAM_REQ_CMP;
28701713e81bSScott Long 			break;
28711713e81bSScott Long 		}
28721713e81bSScott Long 
28731713e81bSScott Long 		case READ_6:
28741713e81bSScott Long 		case WRITE_6:
28751713e81bSScott Long 		case READ_10:
28761713e81bSScott Long 		case WRITE_10:
287764470755SXin LI 		case 0x88: /* READ_16 */
287864470755SXin LI 		case 0x8a: /* WRITE_16 */
28791713e81bSScott Long 		case 0x13:
28801713e81bSScott Long 		case 0x2f:
28811713e81bSScott Long 		{
28821713e81bSScott Long 			UCHAR Cdb[16];
28831713e81bSScott Long 			UCHAR CdbLength;
28841713e81bSScott Long 			_VBUS_INST(pVDev->pVBus)
2885d2bd3ab9SScott Long 			PCommand pCmd = AllocateCommand(_VBUS_P0);
28861713e81bSScott Long 			HPT_ASSERT(pCmd);
28871713e81bSScott Long 
28881713e81bSScott Long 			CdbLength = csio->cdb_len;
2889d2bd3ab9SScott Long 			if ((ccb->ccb_h.flags & CAM_CDB_POINTER) != 0)
2890d2bd3ab9SScott Long 			{
2891d2bd3ab9SScott Long 				if ((ccb->ccb_h.flags & CAM_CDB_PHYS) == 0)
2892d2bd3ab9SScott Long 				{
28931713e81bSScott Long 					bcopy(csio->cdb_io.cdb_ptr, Cdb, CdbLength);
2894d2bd3ab9SScott Long 				}
2895d2bd3ab9SScott Long 				else
2896d2bd3ab9SScott Long 				{
28971713e81bSScott Long 					KdPrintE(("ERROR!!!\n"));
28981713e81bSScott Long 					ccb->ccb_h.status = CAM_REQ_INVALID;
28991713e81bSScott Long 					break;
29001713e81bSScott Long 				}
2901d2bd3ab9SScott Long 			}
2902d2bd3ab9SScott Long 			else
2903d2bd3ab9SScott Long 			{
29041713e81bSScott Long 				bcopy(csio->cdb_io.cdb_bytes, Cdb, CdbLength);
29051713e81bSScott Long 			}
29061713e81bSScott Long 
2907d2bd3ab9SScott Long 			pCmd->pOrgCommand = ccb;
29081713e81bSScott Long 			pCmd->pVDevice = pVDev;
29091713e81bSScott Long 			pCmd->pfnCompletion = fOsCommandDone;
29101713e81bSScott Long 			pCmd->pfnBuildSgl = fOsBuildSgl;
2911d2bd3ab9SScott Long 			pCmd->pSgTable = pmap->psg;
29121713e81bSScott Long 
2913d2bd3ab9SScott Long 			switch (Cdb[0])
2914d2bd3ab9SScott Long 			{
29151713e81bSScott Long 				case READ_6:
29161713e81bSScott Long 				case WRITE_6:
29171713e81bSScott Long 				case 0x13:
2918d2bd3ab9SScott Long 					pCmd->uCmd.Ide.Lba =  ((ULONG)Cdb[1] << 16) | ((ULONG)Cdb[2] << 8) | (ULONG)Cdb[3];
29191713e81bSScott Long 					pCmd->uCmd.Ide.nSectors = (USHORT) Cdb[4];
29201713e81bSScott Long 					break;
2921d2bd3ab9SScott Long 
292264470755SXin LI 				case 0x88: /* READ_16 */
292364470755SXin LI 				case 0x8a: /* WRITE_16 */
292464470755SXin LI 					pCmd->uCmd.Ide.Lba =
292564470755SXin LI 						(HPT_U64)Cdb[2] << 56 |
292664470755SXin LI 						(HPT_U64)Cdb[3] << 48 |
292764470755SXin LI 						(HPT_U64)Cdb[4] << 40 |
292864470755SXin LI 						(HPT_U64)Cdb[5] << 32 |
292964470755SXin LI 						(HPT_U64)Cdb[6] << 24 |
293064470755SXin LI 						(HPT_U64)Cdb[7] << 16 |
293164470755SXin LI 						(HPT_U64)Cdb[8] << 8 |
293264470755SXin LI 						(HPT_U64)Cdb[9];
293364470755SXin LI 					pCmd->uCmd.Ide.nSectors = (USHORT)Cdb[12] << 8 | (USHORT)Cdb[13];
293464470755SXin LI 					break;
293564470755SXin LI 
29361713e81bSScott Long 				default:
2937d2bd3ab9SScott Long 					pCmd->uCmd.Ide.Lba = (ULONG)Cdb[5] | ((ULONG)Cdb[4] << 8) | ((ULONG)Cdb[3] << 16) | ((ULONG)Cdb[2] << 24);
2938d2bd3ab9SScott Long 					pCmd->uCmd.Ide.nSectors = (USHORT) Cdb[8] | ((USHORT)Cdb[7]<<8);
29391713e81bSScott Long 					break;
29401713e81bSScott Long 			}
29411713e81bSScott Long 
2942d2bd3ab9SScott Long 			switch (Cdb[0])
2943d2bd3ab9SScott Long 			{
29441713e81bSScott Long 				case READ_6:
29451713e81bSScott Long 				case READ_10:
294664470755SXin LI 				case 0x88: /* READ_16 */
29471713e81bSScott Long 					pCmd->uCmd.Ide.Command = IDE_COMMAND_READ;
29481713e81bSScott Long 					pCmd->cf_data_in = 1;
29491713e81bSScott Long 					break;
29501713e81bSScott Long 
29511713e81bSScott Long 				case WRITE_6:
29521713e81bSScott Long 				case WRITE_10:
295364470755SXin LI 				case 0x8a: /* WRITE_16 */
29541713e81bSScott Long 					pCmd->uCmd.Ide.Command = IDE_COMMAND_WRITE;
29551713e81bSScott Long 					pCmd->cf_data_out = 1;
29561713e81bSScott Long 					break;
29571713e81bSScott Long 				case 0x13:
29581713e81bSScott Long 				case 0x2f:
29591713e81bSScott Long 					pCmd->uCmd.Ide.Command = IDE_COMMAND_VERIFY;
29601713e81bSScott Long 					break;
29611713e81bSScott Long 			}
2962d2bd3ab9SScott Long /*///////////////////////// */
2963d2bd3ab9SScott Long 			if (ccb->ccb_h.flags & CAM_SCATTER_VALID) {
2964d2bd3ab9SScott Long 				int idx;
2965d2bd3ab9SScott Long 				bus_dma_segment_t *sgList = (bus_dma_segment_t *)ccb->csio.data_ptr;
2966d2bd3ab9SScott Long 
2967d2bd3ab9SScott Long 				if (ccb->ccb_h.flags & CAM_SG_LIST_PHYS)
2968d2bd3ab9SScott Long 					pCmd->cf_physical_sg = 1;
2969d2bd3ab9SScott Long 
2970d2bd3ab9SScott Long 				for (idx = 0; idx < ccb->csio.sglist_cnt; idx++) {
2971d2bd3ab9SScott Long 					pCmd->pSgTable[idx].dSgAddress = (ULONG_PTR)(UCHAR *)sgList[idx].ds_addr;
2972d2bd3ab9SScott Long 					pCmd->pSgTable[idx].wSgSize = sgList[idx].ds_len;
2973d2bd3ab9SScott Long 					pCmd->pSgTable[idx].wSgFlag= (idx==ccb->csio.sglist_cnt-1)?SG_FLAG_EOT: 0;
2974d2bd3ab9SScott Long 				}
29751713e81bSScott Long 
29761713e81bSScott Long 				ccb->ccb_h.timeout_ch = timeout(hpt_timeout, (caddr_t)ccb, 20*hz);
29771713e81bSScott Long 				pVDev->pfnSendCommand(_VBUS_P pCmd);
2978d2bd3ab9SScott Long 			}
2979d2bd3ab9SScott Long 			else {
2980d2bd3ab9SScott Long 				int error;
2981d2bd3ab9SScott Long 				pCmd->cf_physical_sg = 1;
2982d2bd3ab9SScott Long 				error = bus_dmamap_load(pAdapter->io_dma_parent,
2983d2bd3ab9SScott Long 							pmap->dma_map,
2984d2bd3ab9SScott Long 							ccb->csio.data_ptr, ccb->csio.dxfer_len,
2985d2bd3ab9SScott Long 							hpt_io_dmamap_callback, pCmd,
2986d2bd3ab9SScott Long 					    		BUS_DMA_WAITOK
2987d2bd3ab9SScott Long 						);
2988d2bd3ab9SScott Long 				KdPrint(("bus_dmamap_load return %d\n", error));
2989d2bd3ab9SScott Long 				if (error && error!=EINPROGRESS) {
2990d2bd3ab9SScott Long 					hpt_printk(("bus_dmamap_load error %d\n", error));
2991d2bd3ab9SScott Long 					FreeCommand(_VBUS_P pCmd);
2992d2bd3ab9SScott Long 					ccb->ccb_h.status = CAM_REQ_CMP_ERR;
2993d2bd3ab9SScott Long 					dmamap_put(pmap);
2994d2bd3ab9SScott Long 					pAdapter->outstandingCommands--;
2995d2bd3ab9SScott Long 					xpt_done(ccb);
2996d2bd3ab9SScott Long 				}
2997d2bd3ab9SScott Long 			}
29981713e81bSScott Long 			goto Command_Complished;
29991713e81bSScott Long 		}
30001713e81bSScott Long 
30011713e81bSScott Long 		default:
30021713e81bSScott Long 			ccb->ccb_h.status = CAM_REQ_INVALID;
30031713e81bSScott Long 			break;
30041713e81bSScott Long 	}
30051713e81bSScott Long 	ccb_done(ccb);
30061713e81bSScott Long Command_Complished:
30071713e81bSScott Long 	CheckPendingCall(_VBUS_P0);
30081713e81bSScott Long 	return;
30091713e81bSScott Long }
30101713e81bSScott Long 
30111713e81bSScott Long static void HPTLIBAPI
30121713e81bSScott Long fOsCommandDone(_VBUS_ARG PCommand pCmd)
30131713e81bSScott Long {
3014d2bd3ab9SScott Long 	union ccb *ccb = pCmd->pOrgCommand;
3015d2bd3ab9SScott Long 	PBUS_DMAMAP pmap = (PBUS_DMAMAP)ccb->ccb_adapter;
3016d2bd3ab9SScott Long 	IAL_ADAPTER_T *pAdapter = pmap->pAdapter;
30171713e81bSScott Long 
3018d2bd3ab9SScott Long 	KdPrint(("fOsCommandDone(pcmd=%p, result=%d)\n", pCmd, pCmd->Result));
30191713e81bSScott Long 
30201713e81bSScott Long 	untimeout(hpt_timeout, (caddr_t)ccb, ccb->ccb_h.timeout_ch);
30211713e81bSScott Long 
30221713e81bSScott Long 	switch(pCmd->Result) {
30231713e81bSScott Long 	case RETURN_SUCCESS:
30241713e81bSScott Long 		ccb->ccb_h.status = CAM_REQ_CMP;
30251713e81bSScott Long 		break;
30261713e81bSScott Long 	case RETURN_BAD_DEVICE:
30271713e81bSScott Long 		ccb->ccb_h.status = CAM_DEV_NOT_THERE;
30281713e81bSScott Long 		break;
30291713e81bSScott Long 	case RETURN_DEVICE_BUSY:
30301713e81bSScott Long 		ccb->ccb_h.status = CAM_BUSY;
30311713e81bSScott Long 		break;
30321713e81bSScott Long 	case RETURN_INVALID_REQUEST:
30331713e81bSScott Long 		ccb->ccb_h.status = CAM_REQ_INVALID;
30341713e81bSScott Long 		break;
30351713e81bSScott Long 	case RETURN_SELECTION_TIMEOUT:
30361713e81bSScott Long 		ccb->ccb_h.status = CAM_SEL_TIMEOUT;
30371713e81bSScott Long 		break;
30381713e81bSScott Long 	case RETURN_RETRY:
30391713e81bSScott Long 		ccb->ccb_h.status = CAM_BUSY;
30401713e81bSScott Long 		break;
30411713e81bSScott Long 	default:
30421713e81bSScott Long 		ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
30431713e81bSScott Long 		break;
30441713e81bSScott Long 	}
30451713e81bSScott Long 
3046d2bd3ab9SScott Long 	if (pCmd->cf_data_in) {
3047d2bd3ab9SScott Long 		bus_dmamap_sync(pAdapter->io_dma_parent, pmap->dma_map, BUS_DMASYNC_POSTREAD);
30481713e81bSScott Long 	}
3049d2bd3ab9SScott Long 	else if (pCmd->cf_data_in) {
3050d2bd3ab9SScott Long 		bus_dmamap_sync(pAdapter->io_dma_parent, pmap->dma_map, BUS_DMASYNC_POSTWRITE);
3051d2bd3ab9SScott Long 	}
30521713e81bSScott Long 
3053d2bd3ab9SScott Long 	bus_dmamap_unload(pAdapter->io_dma_parent, pmap->dma_map);
3054d2bd3ab9SScott Long 
30551713e81bSScott Long 	FreeCommand(_VBUS_P pCmd);
30561713e81bSScott Long 	ccb_done(ccb);
30571713e81bSScott Long }
30581713e81bSScott Long 
30591713e81bSScott Long int
30601713e81bSScott Long hpt_queue_dpc(HPT_DPC dpc, IAL_ADAPTER_T * pAdapter, void *arg, UCHAR flags)
30611713e81bSScott Long {
30621713e81bSScott Long 	int p;
30631713e81bSScott Long 
30641713e81bSScott Long 	p = (DpcQueue_Last + 1) % MAX_DPC;
30651713e81bSScott Long 	if (p==DpcQueue_First) {
30661713e81bSScott Long 		KdPrint(("DPC Queue full!\n"));
30671713e81bSScott Long 		return -1;
30681713e81bSScott Long 	}
30691713e81bSScott Long 
30701713e81bSScott Long 	DpcQueue[DpcQueue_Last].dpc = dpc;
30711713e81bSScott Long 	DpcQueue[DpcQueue_Last].pAdapter = pAdapter;
30721713e81bSScott Long 	DpcQueue[DpcQueue_Last].arg = arg;
30731713e81bSScott Long 	DpcQueue[DpcQueue_Last].flags = flags;
30741713e81bSScott Long 	DpcQueue_Last = p;
30751713e81bSScott Long 
30761713e81bSScott Long 	return 0;
30771713e81bSScott Long }
30781713e81bSScott Long 
30791713e81bSScott Long #ifdef _RAID5N_
30801713e81bSScott Long /*
3081d2bd3ab9SScott Long  * Allocate memory above 16M, otherwise we may eat all low memory for ISA devices.
3082d2bd3ab9SScott Long  * How about the memory for 5081 request/response array and PRD table?
30831713e81bSScott Long  */
30841713e81bSScott Long void
30851713e81bSScott Long *os_alloc_page(_VBUS_ARG0)
30861713e81bSScott Long {
3087d2bd3ab9SScott Long 	return (void *)contigmalloc(0x1000, M_DEVBUF, M_NOWAIT, 0x1000000, 0xffffffff, PAGE_SIZE, 0ul);
30881713e81bSScott Long }
3089d2bd3ab9SScott Long 
30901713e81bSScott Long void
30911713e81bSScott Long *os_alloc_dma_page(_VBUS_ARG0)
30921713e81bSScott Long {
3093d2bd3ab9SScott Long 	return (void *)contigmalloc(0x1000, M_DEVBUF, M_NOWAIT, 0x1000000, 0xffffffff, PAGE_SIZE, 0ul);
30941713e81bSScott Long }
30951713e81bSScott Long 
30961713e81bSScott Long void
30971713e81bSScott Long os_free_page(_VBUS_ARG void *p)
30981713e81bSScott Long {
30991713e81bSScott Long 	contigfree(p, 0x1000, M_DEVBUF);
31001713e81bSScott Long }
31011713e81bSScott Long 
31021713e81bSScott Long void
31031713e81bSScott Long os_free_dma_page(_VBUS_ARG void *p)
31041713e81bSScott Long {
31051713e81bSScott Long 	contigfree(p, 0x1000, M_DEVBUF);
31061713e81bSScott Long }
31071713e81bSScott Long 
31081713e81bSScott Long void
31091713e81bSScott Long DoXor1(ULONG *p0, ULONG *p1, ULONG *p2, UINT nBytes)
31101713e81bSScott Long {
31111713e81bSScott Long 	UINT i;
3112d2bd3ab9SScott Long 	for (i = 0; i < nBytes / 4; i++) *p0++ = *p1++ ^ *p2++;
31131713e81bSScott Long }
31141713e81bSScott Long 
31151713e81bSScott Long void
31161713e81bSScott Long DoXor2(ULONG *p0, ULONG *p2, UINT nBytes)
31171713e81bSScott Long {
31181713e81bSScott Long 	UINT i;
3119d2bd3ab9SScott Long 	for (i = 0; i < nBytes / 4; i++) *p0++ ^= *p2++;
31201713e81bSScott Long }
31211713e81bSScott Long #endif
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