xref: /freebsd/sys/dev/hptmv/entry.c (revision 4195c7de2471d6212744bcbf128d659e94801d17)
1d2bd3ab9SScott Long /*
2d2bd3ab9SScott Long  * Copyright (c) 2004-2005 HighPoint Technologies, Inc.
31713e81bSScott Long  * All rights reserved.
41713e81bSScott Long  *
51713e81bSScott Long  * Redistribution and use in source and binary forms, with or without
61713e81bSScott Long  * modification, are permitted provided that the following conditions
71713e81bSScott Long  * are met:
81713e81bSScott Long  * 1. Redistributions of source code must retain the above copyright
91713e81bSScott Long  *    notice, this list of conditions and the following disclaimer.
101713e81bSScott Long  * 2. Redistributions in binary form must reproduce the above copyright
111713e81bSScott Long  *    notice, this list of conditions and the following disclaimer in the
121713e81bSScott Long  *    documentation and/or other materials provided with the distribution.
131713e81bSScott Long  *
141713e81bSScott Long  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
151713e81bSScott Long  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
161713e81bSScott Long  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
171713e81bSScott Long  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
181713e81bSScott Long  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
191713e81bSScott Long  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
201713e81bSScott Long  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
211713e81bSScott Long  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
221713e81bSScott Long  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
231713e81bSScott Long  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
241713e81bSScott Long  * SUCH DAMAGE.
251713e81bSScott Long  */
26d2bd3ab9SScott Long 
27f3b080e6SMarius Strobl #include <sys/cdefs.h>
28f3b080e6SMarius Strobl __FBSDID("$FreeBSD$");
29f3b080e6SMarius Strobl 
301713e81bSScott Long #include <sys/param.h>
311713e81bSScott Long #include <sys/systm.h>
321713e81bSScott Long #include <sys/kernel.h>
331713e81bSScott Long #include <sys/bus.h>
341713e81bSScott Long #include <sys/malloc.h>
351713e81bSScott Long #include <sys/resource.h>
361713e81bSScott Long #include <sys/time.h>
371713e81bSScott Long #include <sys/callout.h>
381713e81bSScott Long #include <sys/signalvar.h>
391713e81bSScott Long #include <sys/eventhandler.h>
401713e81bSScott Long #include <sys/proc.h>
411713e81bSScott Long #include <sys/kthread.h>
421713e81bSScott Long 
43d2bd3ab9SScott Long #include <sys/mutex.h>
44d2bd3ab9SScott Long #include <sys/module.h>
4549b3fc40SJohn Baldwin #include <sys/sx.h>
46d2bd3ab9SScott Long 
471713e81bSScott Long #include <dev/pci/pcireg.h>
481713e81bSScott Long #include <dev/pci/pcivar.h>
49d2bd3ab9SScott Long 
50d2bd3ab9SScott Long #ifndef __KERNEL__
51d2bd3ab9SScott Long #define __KERNEL__
52d2bd3ab9SScott Long #endif
531713e81bSScott Long 
541713e81bSScott Long #include <dev/hptmv/global.h>
551713e81bSScott Long #include <dev/hptmv/hptintf.h>
561713e81bSScott Long #include <dev/hptmv/osbsd.h>
57f7f3900bSScott Long #include <dev/hptmv/access601.h>
581713e81bSScott Long 
59d2bd3ab9SScott Long 
601713e81bSScott Long #ifdef DEBUG
611713e81bSScott Long #ifdef DEBUG_LEVEL
621713e81bSScott Long int hpt_dbg_level = DEBUG_LEVEL;
631713e81bSScott Long #else
641713e81bSScott Long int hpt_dbg_level = 0;
651713e81bSScott Long #endif
661713e81bSScott Long #endif
671713e81bSScott Long 
681713e81bSScott Long #define MV_ERROR printf
69d2bd3ab9SScott Long 
701713e81bSScott Long /*
711713e81bSScott Long  * CAM SIM entry points
721713e81bSScott Long  */
731713e81bSScott Long static int 	hpt_probe (device_t dev);
74d2bd3ab9SScott Long static void launch_worker_thread(void);
751713e81bSScott Long static int 	hpt_attach(device_t dev);
761713e81bSScott Long static int 	hpt_detach(device_t dev);
771713e81bSScott Long static int 	hpt_shutdown(device_t dev);
781713e81bSScott Long static void hpt_poll(struct cam_sim *sim);
791713e81bSScott Long static void hpt_intr(void *arg);
80d2bd3ab9SScott Long static void hpt_async(void *callback_arg, u_int32_t code, struct cam_path *path, void *arg);
811713e81bSScott Long static void hpt_action(struct cam_sim *sim, union ccb *ccb);
82d2bd3ab9SScott Long 
83d2bd3ab9SScott Long static device_method_t driver_methods[] = {
84d2bd3ab9SScott Long 	/* Device interface */
85d2bd3ab9SScott Long 	DEVMETHOD(device_probe,		hpt_probe),
86d2bd3ab9SScott Long 	DEVMETHOD(device_attach,	hpt_attach),
87d2bd3ab9SScott Long 	DEVMETHOD(device_detach,	hpt_detach),
88d2bd3ab9SScott Long 
89cd3ef666SXin LI 	DEVMETHOD(device_shutdown,	hpt_shutdown),
90f3b080e6SMarius Strobl 	DEVMETHOD_END
91d2bd3ab9SScott Long };
92d2bd3ab9SScott Long 
93d2bd3ab9SScott Long static driver_t hpt_pci_driver = {
94d2bd3ab9SScott Long 	__str(PROC_DIR_NAME),
95d2bd3ab9SScott Long 	driver_methods,
96d2bd3ab9SScott Long 	sizeof(IAL_ADAPTER_T)
97d2bd3ab9SScott Long };
98d2bd3ab9SScott Long 
99d2bd3ab9SScott Long static devclass_t	hpt_devclass;
100d2bd3ab9SScott Long 
101d2bd3ab9SScott Long #define __DRIVER_MODULE(p1, p2, p3, p4, p5, p6) DRIVER_MODULE(p1, p2, p3, p4, p5, p6)
102d2bd3ab9SScott Long __DRIVER_MODULE(PROC_DIR_NAME, pci, hpt_pci_driver, hpt_devclass, 0, 0);
103d45ce511SEitan Adler MODULE_DEPEND(PROC_DIR_NAME, cam, 1, 1, 1);
104d2bd3ab9SScott Long 
105d2bd3ab9SScott Long #define ccb_ccb_ptr spriv_ptr0
106d2bd3ab9SScott Long #define ccb_adapter ccb_h.spriv_ptr1
107d2bd3ab9SScott Long 
1081713e81bSScott Long static void SetInquiryData(PINQUIRYDATA inquiryData, PVDevice pVDev);
1091713e81bSScott Long static void HPTLIBAPI OsSendCommand (_VBUS_ARG union ccb * ccb);
1101713e81bSScott Long static void HPTLIBAPI fOsCommandDone(_VBUS_ARG PCommand pCmd);
1111713e81bSScott Long static void ccb_done(union ccb *ccb);
1121713e81bSScott Long static void hpt_queue_ccb(union ccb **ccb_Q, union ccb *ccb);
1131713e81bSScott Long static void hpt_free_ccb(union ccb **ccb_Q, union ccb *ccb);
11449b3fc40SJohn Baldwin static void hpt_intr_locked(IAL_ADAPTER_T *pAdapter);
1151713e81bSScott Long static void	hptmv_free_edma_queues(IAL_ADAPTER_T *pAdapter);
1161713e81bSScott Long static void	hptmv_free_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum);
1171713e81bSScott Long static void	handleEdmaError(_VBUS_ARG PCommand pCmd);
1181713e81bSScott Long static int	hptmv_init_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum);
1191713e81bSScott Long static int	fResetActiveCommands(PVBus _vbus_p);
1201713e81bSScott Long static void	fRegisterVdevice(IAL_ADAPTER_T *pAdapter);
1211713e81bSScott Long static int	hptmv_allocate_edma_queues(IAL_ADAPTER_T *pAdapter);
1221713e81bSScott Long static void	hptmv_handle_event_disconnect(void *data);
1231713e81bSScott Long static void	hptmv_handle_event_connect(void *data);
1241713e81bSScott Long static int	start_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum);
1251713e81bSScott Long static void	init_vdev_params(IAL_ADAPTER_T *pAdapter, MV_U8 channel);
1261713e81bSScott Long static int	hptmv_parse_identify_results(MV_SATA_CHANNEL *pMvSataChannel);
1271713e81bSScott Long static int HPTLIBAPI fOsBuildSgl(_VBUS_ARG PCommand pCmd, FPSCAT_GATH pSg,
1281713e81bSScott Long     int logical);
1291713e81bSScott Long static MV_BOOLEAN CommandCompletionCB(MV_SATA_ADAPTER *pMvSataAdapter,
1301713e81bSScott Long     MV_U8 channelNum, MV_COMPLETION_TYPE comp_type, MV_VOID_PTR commandId,
1311713e81bSScott Long     MV_U16 responseFlags, MV_U32 timeStamp,
1321713e81bSScott Long     MV_STORAGE_DEVICE_REGISTERS *registerStruct);
1331713e81bSScott Long static MV_BOOLEAN hptmv_event_notify(MV_SATA_ADAPTER *pMvSataAdapter,
1341713e81bSScott Long     MV_EVENT_TYPE eventType, MV_U32 param1, MV_U32 param2);
1351713e81bSScott Long 
1361713e81bSScott Long #define ccb_ccb_ptr spriv_ptr0
1371713e81bSScott Long #define ccb_adapter ccb_h.spriv_ptr1
1381713e81bSScott Long 
13949b3fc40SJohn Baldwin static struct sx hptmv_list_lock;
14049b3fc40SJohn Baldwin SX_SYSINIT(hptmv_list_lock, &hptmv_list_lock, "hptmv list");
1411713e81bSScott Long IAL_ADAPTER_T *gIal_Adapter = 0;
1421713e81bSScott Long IAL_ADAPTER_T *pCurAdapter = 0;
143d2bd3ab9SScott Long static MV_SATA_CHANNEL gMvSataChannels[MAX_VBUS][MV_SATA_CHANNELS_NUM];
1441713e81bSScott Long 
1451713e81bSScott Long typedef struct st_HPT_DPC {
1461713e81bSScott Long 	IAL_ADAPTER_T *pAdapter;
1471713e81bSScott Long 	void (*dpc)(IAL_ADAPTER_T *, void *, UCHAR);
1481713e81bSScott Long 	void *arg;
1491713e81bSScott Long 	UCHAR flags;
1501713e81bSScott Long } ST_HPT_DPC;
1511713e81bSScott Long 
1521713e81bSScott Long #define MAX_DPC 16
1531713e81bSScott Long UCHAR DPC_Request_Nums = 0;
1541713e81bSScott Long static ST_HPT_DPC DpcQueue[MAX_DPC];
1551713e81bSScott Long static int DpcQueue_First=0;
1561713e81bSScott Long static int DpcQueue_Last = 0;
15749b3fc40SJohn Baldwin static struct mtx DpcQueue_Lock;
15849b3fc40SJohn Baldwin MTX_SYSINIT(hpmtv_dpc_lock, &DpcQueue_Lock, "hptmv dpc", MTX_DEF);
1591713e81bSScott Long 
16064470755SXin LI char DRIVER_VERSION[] = "v1.16";
1611713e81bSScott Long 
1621713e81bSScott Long /*******************************************************************************
1631713e81bSScott Long  *	Name:	hptmv_free_channel
1641713e81bSScott Long  *
1651713e81bSScott Long  *	Description:	free allocated queues for the given channel
1661713e81bSScott Long  *
167453130d9SPedro F. Giffuni  *	Parameters:    	pMvSataAdapter - pointer to the RR18xx controller this
1681713e81bSScott Long  * 					channel connected to.
1691713e81bSScott Long  *			channelNum - channel number.
1701713e81bSScott Long  *
1711713e81bSScott Long  ******************************************************************************/
1721713e81bSScott Long static void
1731713e81bSScott Long hptmv_free_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum)
1741713e81bSScott Long {
1751713e81bSScott Long 	HPT_ASSERT(channelNum < MV_SATA_CHANNELS_NUM);
1761713e81bSScott Long 	pAdapter->mvSataAdapter.sataChannel[channelNum] = NULL;
177d2bd3ab9SScott Long }
1781713e81bSScott Long 
179d2bd3ab9SScott Long static void failDevice(PVDevice pVDev)
1801713e81bSScott Long {
181d2bd3ab9SScott Long 	PVBus _vbus_p = pVDev->pVBus;
182d2bd3ab9SScott Long 	IAL_ADAPTER_T *pAdapter = (IAL_ADAPTER_T *)_vbus_p->OsExt;
183d2bd3ab9SScott Long 
1841713e81bSScott Long 	pVDev->u.disk.df_on_line = 0;
1851713e81bSScott Long 	pVDev->vf_online = 0;
186d2bd3ab9SScott Long 	if (pVDev->pfnDeviceFailed)
187d2bd3ab9SScott Long 		CallWhenIdle(_VBUS_P (DPC_PROC)pVDev->pfnDeviceFailed, pVDev);
188d2bd3ab9SScott Long 
189d2bd3ab9SScott Long 	fNotifyGUI(ET_DEVICE_REMOVED, pVDev);
190d2bd3ab9SScott Long 
191d2bd3ab9SScott Long #ifndef FOR_DEMO
192d2bd3ab9SScott Long 	if (pAdapter->ver_601==2 && !pAdapter->beeping) {
193d2bd3ab9SScott Long 		pAdapter->beeping = 1;
194d2bd3ab9SScott Long 		BeepOn(pAdapter->mvSataAdapter.adapterIoBaseAddress);
195d2bd3ab9SScott Long 		set_fail_led(&pAdapter->mvSataAdapter, pVDev->u.disk.mv->channelNumber, 1);
1961713e81bSScott Long 	}
197d2bd3ab9SScott Long #endif
1981713e81bSScott Long }
1991713e81bSScott Long 
2001713e81bSScott Long int MvSataResetChannel(MV_SATA_ADAPTER *pMvSataAdapter, MV_U8 channel);
2011713e81bSScott Long 
2021713e81bSScott Long static void
2031713e81bSScott Long handleEdmaError(_VBUS_ARG PCommand pCmd)
2041713e81bSScott Long {
2051713e81bSScott Long 	PDevice pDevice = &pCmd->pVDevice->u.disk;
2061713e81bSScott Long 	MV_SATA_ADAPTER * pSataAdapter = pDevice->mv->mvSataAdapter;
2071713e81bSScott Long 
2081713e81bSScott Long 	if (!pDevice->df_on_line) {
2091713e81bSScott Long 		KdPrint(("Device is offline"));
2101713e81bSScott Long 		pCmd->Result = RETURN_BAD_DEVICE;
2111713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
2121713e81bSScott Long 		return;
2131713e81bSScott Long 	}
2141713e81bSScott Long 
2151713e81bSScott Long 	if (pCmd->RetryCount++>5) {
216d2bd3ab9SScott Long 		hpt_printk(("too many retries on channel(%d)\n", pDevice->mv->channelNumber));
217d2bd3ab9SScott Long failed:
218d2bd3ab9SScott Long 		failDevice(pCmd->pVDevice);
2191713e81bSScott Long 		pCmd->Result = RETURN_IDE_ERROR;
2201713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
2211713e81bSScott Long 		return;
2221713e81bSScott Long 	}
223d2bd3ab9SScott Long 
224d2bd3ab9SScott Long 	/* reset the channel and retry the command */
225d2bd3ab9SScott Long 	if (MvSataResetChannel(pSataAdapter, pDevice->mv->channelNumber))
226d2bd3ab9SScott Long 		goto failed;
227d2bd3ab9SScott Long 
228d2bd3ab9SScott Long 	fNotifyGUI(ET_DEVICE_ERROR, Map2pVDevice(pDevice));
229d2bd3ab9SScott Long 
230d2bd3ab9SScott Long 	hpt_printk(("Retry on channel(%d)\n", pDevice->mv->channelNumber));
2311713e81bSScott Long 	fDeviceSendCommand(_VBUS_P pCmd);
2321713e81bSScott Long }
2331713e81bSScott Long 
2341713e81bSScott Long /****************************************************************
2351713e81bSScott Long  *	Name:	hptmv_init_channel
2361713e81bSScott Long  *
237d2bd3ab9SScott Long  *	Description:	allocate request and response queues for the EDMA of the
238d2bd3ab9SScott Long  *					given channel and sets other fields.
239d2bd3ab9SScott Long  *
2401713e81bSScott Long  *	Parameters:
2411713e81bSScott Long  *		pAdapter - pointer to the emulated adapter data structure
2421713e81bSScott Long  *		channelNum - channel number.
2431713e81bSScott Long  *	Return:	0 on success, otherwise on failure
2441713e81bSScott Long  ****************************************************************/
2451713e81bSScott Long static int
2461713e81bSScott Long hptmv_init_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum)
2471713e81bSScott Long {
2481713e81bSScott Long 	MV_SATA_CHANNEL *pMvSataChannel;
2491713e81bSScott Long 	dma_addr_t    req_dma_addr;
2501713e81bSScott Long 	dma_addr_t    rsp_dma_addr;
2511713e81bSScott Long 
2521713e81bSScott Long 	if (channelNum >= MV_SATA_CHANNELS_NUM)
2531713e81bSScott Long 	{
25464470755SXin LI 		MV_ERROR("RR18xx[%d]: Bad channelNum=%d",
2551713e81bSScott Long 				 pAdapter->mvSataAdapter.adapterId, channelNum);
2561713e81bSScott Long 		return -1;
2571713e81bSScott Long 	}
2581713e81bSScott Long 
259d2bd3ab9SScott Long 	pMvSataChannel = &gMvSataChannels[pAdapter->mvSataAdapter.adapterId][channelNum];
2601713e81bSScott Long 	pAdapter->mvSataAdapter.sataChannel[channelNum] = pMvSataChannel;
2611713e81bSScott Long 	pMvSataChannel->channelNumber = channelNum;
2621713e81bSScott Long 	pMvSataChannel->lba48Address = MV_FALSE;
2631713e81bSScott Long 	pMvSataChannel->maxReadTransfer = MV_FALSE;
2641713e81bSScott Long 
265d2bd3ab9SScott Long 	pMvSataChannel->requestQueue = (struct mvDmaRequestQueueEntry *)
266d2bd3ab9SScott Long 								   (pAdapter->requestsArrayBaseAlignedAddr + (channelNum * MV_EDMA_REQUEST_QUEUE_SIZE));
267d2bd3ab9SScott Long 	req_dma_addr = pAdapter->requestsArrayBaseDmaAlignedAddr + (channelNum * MV_EDMA_REQUEST_QUEUE_SIZE);
2681713e81bSScott Long 
2691713e81bSScott Long 
270d2bd3ab9SScott Long 	KdPrint(("requestQueue addr is 0x%llX", (HPT_U64)(ULONG_PTR)req_dma_addr));
2711713e81bSScott Long 
2721713e81bSScott Long 	/* check the 1K alignment of the request queue*/
2731713e81bSScott Long 	if (req_dma_addr & 0x3ff)
2741713e81bSScott Long 	{
27564470755SXin LI 		MV_ERROR("RR18xx[%d]: request queue allocated isn't 1 K aligned,"
276d2bd3ab9SScott Long 				 " dma_addr=%llx channel=%d\n", pAdapter->mvSataAdapter.adapterId,
277d2bd3ab9SScott Long 				 (HPT_U64)(ULONG_PTR)req_dma_addr, channelNum);
2781713e81bSScott Long 		return -1;
2791713e81bSScott Long 	}
2801713e81bSScott Long 	pMvSataChannel->requestQueuePciLowAddress = req_dma_addr;
2811713e81bSScott Long 	pMvSataChannel->requestQueuePciHiAddress = 0;
28264470755SXin LI 	KdPrint(("RR18xx[%d,%d]: request queue allocated: 0x%p",
2831713e81bSScott Long 			  pAdapter->mvSataAdapter.adapterId, channelNum,
2841713e81bSScott Long 			  pMvSataChannel->requestQueue));
285d2bd3ab9SScott Long 	pMvSataChannel->responseQueue = (struct mvDmaResponseQueueEntry *)
286d2bd3ab9SScott Long 									(pAdapter->responsesArrayBaseAlignedAddr + (channelNum * MV_EDMA_RESPONSE_QUEUE_SIZE));
287d2bd3ab9SScott Long 	rsp_dma_addr = pAdapter->responsesArrayBaseDmaAlignedAddr + (channelNum * MV_EDMA_RESPONSE_QUEUE_SIZE);
2881713e81bSScott Long 
2891713e81bSScott Long 	/* check the 256 alignment of the response queue*/
2901713e81bSScott Long 	if (rsp_dma_addr & 0xff)
2911713e81bSScott Long 	{
29264470755SXin LI 		MV_ERROR("RR18xx[%d,%d]: response queue allocated isn't 256 byte "
293d2bd3ab9SScott Long 				 "aligned, dma_addr=%llx\n",
294d2bd3ab9SScott Long 				 pAdapter->mvSataAdapter.adapterId, channelNum, (HPT_U64)(ULONG_PTR)rsp_dma_addr);
2951713e81bSScott Long 		return -1;
2961713e81bSScott Long 	}
2971713e81bSScott Long 	pMvSataChannel->responseQueuePciLowAddress = rsp_dma_addr;
2981713e81bSScott Long 	pMvSataChannel->responseQueuePciHiAddress = 0;
29964470755SXin LI 	KdPrint(("RR18xx[%d,%d]: response queue allocated: 0x%p",
3001713e81bSScott Long 			  pAdapter->mvSataAdapter.adapterId, channelNum,
3011713e81bSScott Long 			  pMvSataChannel->responseQueue));
3021713e81bSScott Long 
3031713e81bSScott Long 	pAdapter->mvChannel[channelNum].online = MV_TRUE;
3041713e81bSScott Long 	return 0;
3051713e81bSScott Long }
3061713e81bSScott Long 
3071713e81bSScott Long /******************************************************************************
3081713e81bSScott Long  *	Name: hptmv_parse_identify_results
3091713e81bSScott Long  *
310d2bd3ab9SScott Long  *	Description:	this functions parses the identify command results, checks
31164470755SXin LI  *					that the connected deives can be accesed by RR18xx EDMA,
312453130d9SPedro F. Giffuni  *					and updates the channel structure accordingly.
313d2bd3ab9SScott Long  *
3141713e81bSScott Long  *	Parameters:     pMvSataChannel, pointer to the channel data structure.
3151713e81bSScott Long  *
3161713e81bSScott Long  *	Returns:       	=0 ->success, < 0 ->failure.
3171713e81bSScott Long  *
3181713e81bSScott Long  ******************************************************************************/
3191713e81bSScott Long static int
3201713e81bSScott Long hptmv_parse_identify_results(MV_SATA_CHANNEL *pMvSataChannel)
3211713e81bSScott Long {
3221713e81bSScott Long 	MV_U16  *iden = pMvSataChannel->identifyDevice;
3231713e81bSScott Long 
3241713e81bSScott Long 	/*LBA addressing*/
325d2bd3ab9SScott Long 	if (! (iden[IDEN_CAPACITY_1_OFFSET] & 0x200))
326d2bd3ab9SScott Long 	{
3271713e81bSScott Long 		KdPrint(("IAL Error in IDENTIFY info: LBA not supported\n"));
3281713e81bSScott Long 		return -1;
329d2bd3ab9SScott Long 	}
330d2bd3ab9SScott Long 	else
331d2bd3ab9SScott Long 	{
3321713e81bSScott Long 		KdPrint(("%25s - %s\n", "Capabilities", "LBA supported"));
3331713e81bSScott Long 	}
3341713e81bSScott Long 	/*DMA support*/
335d2bd3ab9SScott Long 	if (! (iden[IDEN_CAPACITY_1_OFFSET] & 0x100))
336d2bd3ab9SScott Long 	{
3371713e81bSScott Long 		KdPrint(("IAL Error in IDENTIFY info: DMA not supported\n"));
3381713e81bSScott Long 		return -1;
339d2bd3ab9SScott Long 	}
340d2bd3ab9SScott Long 	else
341d2bd3ab9SScott Long 	{
3421713e81bSScott Long 		KdPrint(("%25s - %s\n", "Capabilities", "DMA supported"));
3431713e81bSScott Long 	}
3441713e81bSScott Long 	/* PIO */
345d2bd3ab9SScott Long 	if ((iden[IDEN_VALID] & 2) == 0)
346d2bd3ab9SScott Long 	{
347d2bd3ab9SScott Long 		KdPrint(("IAL Error in IDENTIFY info: not able to find PIO mode\n"));
3481713e81bSScott Long 		return -1;
3491713e81bSScott Long 	}
3501713e81bSScott Long 	KdPrint(("%25s - 0x%02x\n", "PIO modes supported",
3511713e81bSScott Long 			  iden[IDEN_PIO_MODE_SPPORTED] & 0xff));
3521713e81bSScott Long 
3531713e81bSScott Long 	/*UDMA*/
354d2bd3ab9SScott Long 	if ((iden[IDEN_VALID] & 4) == 0)
355d2bd3ab9SScott Long 	{
356d2bd3ab9SScott Long 		KdPrint(("IAL Error in IDENTIFY info: not able to find UDMA mode\n"));
3571713e81bSScott Long 		return -1;
3581713e81bSScott Long 	}
3591713e81bSScott Long 
3601713e81bSScott Long 	/* 48 bit address */
361d2bd3ab9SScott Long 	if ((iden[IDEN_SUPPORTED_COMMANDS2] & 0x400))
362d2bd3ab9SScott Long 	{
3631713e81bSScott Long 		KdPrint(("%25s - %s\n", "LBA48 addressing", "supported"));
3641713e81bSScott Long 		pMvSataChannel->lba48Address = MV_TRUE;
365d2bd3ab9SScott Long 	}
366d2bd3ab9SScott Long 	else
367d2bd3ab9SScott Long 	{
3681713e81bSScott Long 		KdPrint(("%25s - %s\n", "LBA48 addressing", "Not supported"));
3691713e81bSScott Long 		pMvSataChannel->lba48Address = MV_FALSE;
3701713e81bSScott Long 	}
3711713e81bSScott Long 	return 0;
3721713e81bSScott Long }
3731713e81bSScott Long 
3741713e81bSScott Long static void
3751713e81bSScott Long init_vdev_params(IAL_ADAPTER_T *pAdapter, MV_U8 channel)
3761713e81bSScott Long {
377d2bd3ab9SScott Long 	PVDevice pVDev = &pAdapter->VDevices[channel];
378d2bd3ab9SScott Long 	MV_SATA_CHANNEL *pMvSataChannel = pAdapter->mvSataAdapter.sataChannel[channel];
379d2bd3ab9SScott Long 	MV_U16_PTR IdentifyData = pMvSataChannel->identifyDevice;
3801713e81bSScott Long 
3811713e81bSScott Long 	pMvSataChannel->outstandingCommands = 0;
3821713e81bSScott Long 
3831713e81bSScott Long 	pVDev->u.disk.mv         = pMvSataChannel;
3841713e81bSScott Long 	pVDev->u.disk.df_on_line = 1;
3851713e81bSScott Long 	pVDev->u.disk.pVBus      = &pAdapter->VBus;
3861713e81bSScott Long 	pVDev->pVBus             = &pAdapter->VBus;
3871713e81bSScott Long 
3881713e81bSScott Long #ifdef SUPPORT_48BIT_LBA
3891713e81bSScott Long 	if (pMvSataChannel->lba48Address == MV_TRUE)
390d2bd3ab9SScott Long 		pVDev->u.disk.dDeRealCapacity = ((IdentifyData[101]<<16) | IdentifyData[100]) - 1;
3911713e81bSScott Long 	else
3921713e81bSScott Long #endif
3931713e81bSScott Long 	if(IdentifyData[53] & 1) {
3941713e81bSScott Long 	pVDev->u.disk.dDeRealCapacity =
395d2bd3ab9SScott Long 	  (((IdentifyData[58]<<16 | IdentifyData[57]) < (IdentifyData[61]<<16 | IdentifyData[60])) ?
3961713e81bSScott Long 		  (IdentifyData[61]<<16 | IdentifyData[60]) :
3971713e81bSScott Long 				(IdentifyData[58]<<16 | IdentifyData[57])) - 1;
3981713e81bSScott Long 	} else
3991713e81bSScott Long 		pVDev->u.disk.dDeRealCapacity =
4001713e81bSScott Long 				 (IdentifyData[61]<<16 | IdentifyData[60]) - 1;
4011713e81bSScott Long 
4021713e81bSScott Long 	pVDev->u.disk.bDeUsable_Mode = pVDev->u.disk.bDeModeSetting =
403d2bd3ab9SScott Long 		pAdapter->mvChannel[channel].maxPioModeSupported - MV_ATA_TRANSFER_PIO_0;
4041713e81bSScott Long 
4051713e81bSScott Long 	if (pAdapter->mvChannel[channel].maxUltraDmaModeSupported!=0xFF) {
4061713e81bSScott Long 		pVDev->u.disk.bDeUsable_Mode = pVDev->u.disk.bDeModeSetting =
407d2bd3ab9SScott Long 			pAdapter->mvChannel[channel].maxUltraDmaModeSupported - MV_ATA_TRANSFER_UDMA_0 + 8;
4081713e81bSScott Long 	}
4091713e81bSScott Long }
4101713e81bSScott Long 
411d2bd3ab9SScott Long static void device_change(IAL_ADAPTER_T *pAdapter , MV_U8 channelIndex, int plugged)
4121713e81bSScott Long {
4131713e81bSScott Long 	PVDevice pVDev;
414d2bd3ab9SScott Long 	MV_SATA_ADAPTER  *pMvSataAdapter = &pAdapter->mvSataAdapter;
415d2bd3ab9SScott Long 	MV_SATA_CHANNEL  *pMvSataChannel = pMvSataAdapter->sataChannel[channelIndex];
4161713e81bSScott Long 
417d2bd3ab9SScott Long 	if (!pMvSataChannel) return;
4181713e81bSScott Long 
419d2bd3ab9SScott Long 	if (plugged)
420d2bd3ab9SScott Long 	{
4211713e81bSScott Long 		pVDev = &(pAdapter->VDevices[channelIndex]);
4221713e81bSScott Long 		init_vdev_params(pAdapter, channelIndex);
4231713e81bSScott Long 
4241713e81bSScott Long 		pVDev->VDeviceType = pVDev->u.disk.df_atapi? VD_ATAPI :
425d2bd3ab9SScott Long 			pVDev->u.disk.df_removable_drive? VD_REMOVABLE : VD_SINGLE_DISK;
4261713e81bSScott Long 
427d2bd3ab9SScott Long 		pVDev->VDeviceCapacity = pVDev->u.disk.dDeRealCapacity-SAVE_FOR_RAID_INFO;
4281713e81bSScott Long 		pVDev->pfnSendCommand = pfnSendCommand[pVDev->VDeviceType];
4291713e81bSScott Long 		pVDev->pfnDeviceFailed = pfnDeviceFailed[pVDev->VDeviceType];
4301713e81bSScott Long 		pVDev->vf_online = 1;
4311713e81bSScott Long 
4321713e81bSScott Long #ifdef SUPPORT_ARRAY
433d2bd3ab9SScott Long 		if(pVDev->pParent)
434d2bd3ab9SScott Long 		{
4351713e81bSScott Long 			int iMember;
436d2bd3ab9SScott Long 			for(iMember = 0; iMember < 	pVDev->pParent->u.array.bArnMember; iMember++)
4371713e81bSScott Long 				if((PVDevice)pVDev->pParent->u.array.pMember[iMember] == pVDev)
4381713e81bSScott Long 					pVDev->pParent->u.array.pMember[iMember] = NULL;
4391713e81bSScott Long 			pVDev->pParent = NULL;
4401713e81bSScott Long 		}
4411713e81bSScott Long #endif
4421713e81bSScott Long 		fNotifyGUI(ET_DEVICE_PLUGGED,pVDev);
4431713e81bSScott Long 		fCheckBootable(pVDev);
4441713e81bSScott Long 		RegisterVDevice(pVDev);
4451713e81bSScott Long 
4461713e81bSScott Long #ifndef FOR_DEMO
4471713e81bSScott Long 		if (pAdapter->beeping) {
4481713e81bSScott Long 			pAdapter->beeping = 0;
4491713e81bSScott Long 			BeepOff(pAdapter->mvSataAdapter.adapterIoBaseAddress);
4501713e81bSScott Long 		}
4511713e81bSScott Long #endif
4521713e81bSScott Long 
453d2bd3ab9SScott Long 	}
454d2bd3ab9SScott Long 	else
455d2bd3ab9SScott Long 	{
4561713e81bSScott Long 		pVDev  = &(pAdapter->VDevices[channelIndex]);
457d2bd3ab9SScott Long 		failDevice(pVDev);
4581713e81bSScott Long 	}
4591713e81bSScott Long }
4601713e81bSScott Long 
4611713e81bSScott Long static int
4621713e81bSScott Long start_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum)
4631713e81bSScott Long {
464d2bd3ab9SScott Long 	MV_SATA_ADAPTER *pMvSataAdapter = &pAdapter->mvSataAdapter;
465d2bd3ab9SScott Long 	MV_SATA_CHANNEL *pMvSataChannel = pMvSataAdapter->sataChannel[channelNum];
466d2bd3ab9SScott Long 	MV_CHANNEL		*pChannelInfo = &(pAdapter->mvChannel[channelNum]);
4671713e81bSScott Long 	MV_U32          udmaMode,pioMode;
4681713e81bSScott Long 
46964470755SXin LI 	KdPrint(("RR18xx [%d]: start channel (%d)", pMvSataAdapter->adapterId,
4701713e81bSScott Long 			 channelNum));
4711713e81bSScott Long 
4721713e81bSScott Long 
4731713e81bSScott Long 	/* Software reset channel */
474d2bd3ab9SScott Long 	if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channelNum) == MV_FALSE)
475d2bd3ab9SScott Long 	{
47664470755SXin LI 		MV_ERROR("RR18xx [%d,%d]: failed to perform Software reset\n",
4771713e81bSScott Long 				 pMvSataAdapter->adapterId, channelNum);
4781713e81bSScott Long 		return -1;
4791713e81bSScott Long 	}
4801713e81bSScott Long 
4811713e81bSScott Long 	/* Hardware reset channel */
482d2bd3ab9SScott Long 	if (mvSataChannelHardReset(pMvSataAdapter, channelNum) == MV_FALSE)
483d2bd3ab9SScott Long 	{
484d2bd3ab9SScott Long 		/* If failed, try again - this is when trying to hardreset a channel */
485d2bd3ab9SScott Long 		/* when drive is just spinning up */
4861713e81bSScott Long 		StallExec(5000000); /* wait 5 sec before trying again */
487d2bd3ab9SScott Long 		if (mvSataChannelHardReset(pMvSataAdapter, channelNum) == MV_FALSE)
488d2bd3ab9SScott Long 		{
48964470755SXin LI 			MV_ERROR("RR18xx [%d,%d]: failed to perform Hard reset\n",
4901713e81bSScott Long 					 pMvSataAdapter->adapterId, channelNum);
4911713e81bSScott Long 			return -1;
4921713e81bSScott Long 		}
4931713e81bSScott Long 	}
4941713e81bSScott Long 
495d2bd3ab9SScott Long 	/* identify device*/
496d2bd3ab9SScott Long 	if (mvStorageDevATAIdentifyDevice(pMvSataAdapter, channelNum) == MV_FALSE)
497d2bd3ab9SScott Long 	{
49864470755SXin LI 		MV_ERROR("RR18xx [%d,%d]: failed to perform ATA Identify command\n"
499d2bd3ab9SScott Long 				 , pMvSataAdapter->adapterId, channelNum);
500d2bd3ab9SScott Long 		return -1;
501d2bd3ab9SScott Long 	}
502d2bd3ab9SScott Long 	if (hptmv_parse_identify_results(pMvSataChannel))
503d2bd3ab9SScott Long 	{
50464470755SXin LI 		MV_ERROR("RR18xx [%d,%d]: Error in parsing ATA Identify message\n"
505d2bd3ab9SScott Long 				 , pMvSataAdapter->adapterId, channelNum);
506d2bd3ab9SScott Long 		return -1;
507d2bd3ab9SScott Long 	}
508d2bd3ab9SScott Long 
509d2bd3ab9SScott Long 	/* mvStorageDevATASetFeatures */
510d2bd3ab9SScott Long 	/* Disable 8 bit PIO in case CFA enabled */
511d2bd3ab9SScott Long 	if (pMvSataChannel->identifyDevice[86] & 4)
512d2bd3ab9SScott Long 	{
51364470755SXin LI 		KdPrint(("RR18xx [%d]: Disable 8 bit PIO (CFA enabled) \n",
514d2bd3ab9SScott Long 				  pMvSataAdapter->adapterId));
515d2bd3ab9SScott Long 		if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
516d2bd3ab9SScott Long 									   MV_ATA_SET_FEATURES_DISABLE_8_BIT_PIO, 0,
517d2bd3ab9SScott Long 									   0, 0, 0) == MV_FALSE)
518d2bd3ab9SScott Long 		{
51964470755SXin LI 			MV_ERROR("RR18xx [%d]: channel %d: mvStorageDevATASetFeatures"
520d2bd3ab9SScott Long 					 " failed\n", pMvSataAdapter->adapterId, channelNum);
521d2bd3ab9SScott Long 			return -1;
522d2bd3ab9SScott Long 		}
523d2bd3ab9SScott Long 	}
5241713e81bSScott Long 	/* Write cache */
525d2bd3ab9SScott Long #ifdef ENABLE_WRITE_CACHE
526d2bd3ab9SScott Long 	if (pMvSataChannel->identifyDevice[82] & 0x20)
527d2bd3ab9SScott Long 	{
528d2bd3ab9SScott Long 		if (!(pMvSataChannel->identifyDevice[85] & 0x20)) /* if not enabled by default */
529d2bd3ab9SScott Long 		{
530d2bd3ab9SScott Long 			if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
531d2bd3ab9SScott Long 										   MV_ATA_SET_FEATURES_ENABLE_WCACHE, 0,
532d2bd3ab9SScott Long 										   0, 0, 0) == MV_FALSE)
533d2bd3ab9SScott Long 			{
53464470755SXin LI 				MV_ERROR("RR18xx [%d]: channel %d: mvStorageDevATASetFeatures failed\n",
5351713e81bSScott Long 						 pMvSataAdapter->adapterId, channelNum);
5361713e81bSScott Long 				return -1;
5371713e81bSScott Long 			}
5381713e81bSScott Long 		}
53964470755SXin LI 		KdPrint(("RR18xx [%d]: channel %d, write cache enabled\n",
5401713e81bSScott Long 				  pMvSataAdapter->adapterId, channelNum));
541d2bd3ab9SScott Long 	}
542d2bd3ab9SScott Long 	else
543d2bd3ab9SScott Long 	{
54464470755SXin LI 		KdPrint(("RR18xx [%d]: channel %d, write cache not supported\n",
5451713e81bSScott Long 				  pMvSataAdapter->adapterId, channelNum));
5461713e81bSScott Long 	}
547d2bd3ab9SScott Long #else /* disable write cache */
548d2bd3ab9SScott Long 	{
549d2bd3ab9SScott Long 		if (pMvSataChannel->identifyDevice[85] & 0x20)
550d2bd3ab9SScott Long 		{
55164470755SXin LI 			KdPrint(("RR18xx [%d]: channel =%d, disable write cache\n",
5521713e81bSScott Long 					  pMvSataAdapter->adapterId, channelNum));
5531713e81bSScott Long 			if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
554d2bd3ab9SScott Long 										   MV_ATA_SET_FEATURES_DISABLE_WCACHE, 0,
555d2bd3ab9SScott Long 										   0, 0, 0) == MV_FALSE)
556d2bd3ab9SScott Long 			{
55764470755SXin LI 				MV_ERROR("RR18xx [%d]: channel %d: mvStorageDevATASetFeatures failed\n",
5581713e81bSScott Long 						 pMvSataAdapter->adapterId, channelNum);
5591713e81bSScott Long 				return -1;
5601713e81bSScott Long 			}
5611713e81bSScott Long 		}
56264470755SXin LI 		KdPrint(("RR18xx [%d]: channel=%d, write cache disabled\n",
5631713e81bSScott Long 				  pMvSataAdapter->adapterId, channelNum));
564d2bd3ab9SScott Long 	}
5651713e81bSScott Long #endif
5661713e81bSScott Long 
5671713e81bSScott Long 	/* Set transfer mode */
56864470755SXin LI 	KdPrint(("RR18xx [%d] Set transfer mode XFER_PIO_SLOW\n",
5691713e81bSScott Long 			  pMvSataAdapter->adapterId));
5701713e81bSScott Long 	if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
571d2bd3ab9SScott Long 								   MV_ATA_SET_FEATURES_TRANSFER,
572d2bd3ab9SScott Long 								   MV_ATA_TRANSFER_PIO_SLOW, 0, 0, 0) ==
573d2bd3ab9SScott Long 		MV_FALSE)
574d2bd3ab9SScott Long 	{
57564470755SXin LI 		MV_ERROR("RR18xx [%d] channel %d: Set Features failed\n",
5761713e81bSScott Long 				 pMvSataAdapter->adapterId, channelNum);
5771713e81bSScott Long 		return -1;
5781713e81bSScott Long 	}
5791713e81bSScott Long 
580d2bd3ab9SScott Long 	if (pMvSataChannel->identifyDevice[IDEN_PIO_MODE_SPPORTED] & 1)
581d2bd3ab9SScott Long 	{
5821713e81bSScott Long 		pioMode = MV_ATA_TRANSFER_PIO_4;
583d2bd3ab9SScott Long 	}
584d2bd3ab9SScott Long 	else if (pMvSataChannel->identifyDevice[IDEN_PIO_MODE_SPPORTED] & 2)
585d2bd3ab9SScott Long 	{
5861713e81bSScott Long 		pioMode = MV_ATA_TRANSFER_PIO_3;
587d2bd3ab9SScott Long 	}
588d2bd3ab9SScott Long 	else
589d2bd3ab9SScott Long 	{
590d2bd3ab9SScott Long 		MV_ERROR("IAL Error in IDENTIFY info: PIO modes 3 and 4 not supported\n");
5911713e81bSScott Long 		pioMode = MV_ATA_TRANSFER_PIO_SLOW;
5921713e81bSScott Long 	}
5931713e81bSScott Long 
59464470755SXin LI 	KdPrint(("RR18xx [%d] Set transfer mode XFER_PIO_4\n",
5951713e81bSScott Long 			  pMvSataAdapter->adapterId));
5961713e81bSScott Long 	pAdapter->mvChannel[channelNum].maxPioModeSupported = pioMode;
5971713e81bSScott Long 	if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
598d2bd3ab9SScott Long 								   MV_ATA_SET_FEATURES_TRANSFER,
599d2bd3ab9SScott Long 								   pioMode, 0, 0, 0) == MV_FALSE)
600d2bd3ab9SScott Long 	{
60164470755SXin LI 		MV_ERROR("RR18xx [%d] channel %d: Set Features failed\n",
6021713e81bSScott Long 				 pMvSataAdapter->adapterId, channelNum);
6031713e81bSScott Long 		return -1;
6041713e81bSScott Long 	}
6051713e81bSScott Long 
6061713e81bSScott Long 	udmaMode = MV_ATA_TRANSFER_UDMA_0;
607d2bd3ab9SScott Long 	if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x40)
608d2bd3ab9SScott Long 	{
6091713e81bSScott Long 		udmaMode =  MV_ATA_TRANSFER_UDMA_6;
610d2bd3ab9SScott Long 	}
611d2bd3ab9SScott Long 	else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x20)
612d2bd3ab9SScott Long 	{
6131713e81bSScott Long 		udmaMode =  MV_ATA_TRANSFER_UDMA_5;
614d2bd3ab9SScott Long 	}
615d2bd3ab9SScott Long 	else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x10)
616d2bd3ab9SScott Long 	{
6171713e81bSScott Long 		udmaMode =  MV_ATA_TRANSFER_UDMA_4;
618d2bd3ab9SScott Long 	}
619d2bd3ab9SScott Long 	else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 8)
620d2bd3ab9SScott Long 	{
6211713e81bSScott Long 		udmaMode =  MV_ATA_TRANSFER_UDMA_3;
622d2bd3ab9SScott Long 	}
623d2bd3ab9SScott Long 	else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 4)
624d2bd3ab9SScott Long 	{
6251713e81bSScott Long 		udmaMode =  MV_ATA_TRANSFER_UDMA_2;
6261713e81bSScott Long 	}
6271713e81bSScott Long 
62864470755SXin LI 	KdPrint(("RR18xx [%d] Set transfer mode XFER_UDMA_%d\n",
6291713e81bSScott Long 			  pMvSataAdapter->adapterId, udmaMode & 0xf));
6301713e81bSScott Long 	pChannelInfo->maxUltraDmaModeSupported = udmaMode;
6311713e81bSScott Long 
632d2bd3ab9SScott Long 	/*if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
633d2bd3ab9SScott Long 								   MV_ATA_SET_FEATURES_TRANSFER, udmaMode,
634d2bd3ab9SScott Long 								   0, 0, 0) == MV_FALSE)
635d2bd3ab9SScott Long 	{
63664470755SXin LI 		MV_ERROR("RR18xx [%d] channel %d: Set Features failed\n",
6371713e81bSScott Long 				 pMvSataAdapter->adapterId, channelNum);
6381713e81bSScott Long 		return -1;
639d2bd3ab9SScott Long 	}*/
6401713e81bSScott Long 	if (pChannelInfo->maxUltraDmaModeSupported == 0xFF)
6411713e81bSScott Long 		return TRUE;
642d2bd3ab9SScott Long 	else
643d2bd3ab9SScott Long 		do
644d2bd3ab9SScott Long 		{
6451713e81bSScott Long 			if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
6461713e81bSScott Long 								   MV_ATA_SET_FEATURES_TRANSFER,
647d2bd3ab9SScott Long 								   pChannelInfo->maxUltraDmaModeSupported,
648d2bd3ab9SScott Long 								   0, 0, 0) == MV_FALSE)
649d2bd3ab9SScott Long 			{
650d2bd3ab9SScott Long 				if (pChannelInfo->maxUltraDmaModeSupported > MV_ATA_TRANSFER_UDMA_0)
651d2bd3ab9SScott Long 				{
652d2bd3ab9SScott Long 					if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channelNum) == MV_FALSE)
653d2bd3ab9SScott Long 					{
654d2bd3ab9SScott Long 						MV_REG_WRITE_BYTE(pMvSataAdapter->adapterIoBaseAddress,
655d2bd3ab9SScott Long 										  pMvSataChannel->eDmaRegsOffset +
656d2bd3ab9SScott Long 										  0x11c, /* command reg */
657d2bd3ab9SScott Long 										  MV_ATA_COMMAND_IDLE_IMMEDIATE);
6581713e81bSScott Long 						mvMicroSecondsDelay(10000);
6591713e81bSScott Long 						mvSataChannelHardReset(pMvSataAdapter, channelNum);
660d2bd3ab9SScott Long 						if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channelNum) == MV_FALSE)
6611713e81bSScott Long 							return FALSE;
6621713e81bSScott Long 					}
663d2bd3ab9SScott Long 					if (mvSataChannelHardReset(pMvSataAdapter, channelNum) == MV_FALSE)
6641713e81bSScott Long 						return FALSE;
6651713e81bSScott Long 					pChannelInfo->maxUltraDmaModeSupported--;
666d2bd3ab9SScott Long 					continue;
667d2bd3ab9SScott Long 				}
668d2bd3ab9SScott Long 				else   return FALSE;
669d2bd3ab9SScott Long 			}
670d2bd3ab9SScott Long 			break;
6711713e81bSScott Long 		}while (1);
6721713e81bSScott Long 
6731713e81bSScott Long 	/* Read look ahead */
674d2bd3ab9SScott Long #ifdef ENABLE_READ_AHEAD
675d2bd3ab9SScott Long 	if (pMvSataChannel->identifyDevice[82] & 0x40)
676d2bd3ab9SScott Long 	{
677d2bd3ab9SScott Long 		if (!(pMvSataChannel->identifyDevice[85] & 0x40)) /* if not enabled by default */
678d2bd3ab9SScott Long 		{
679d2bd3ab9SScott Long 			if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
680d2bd3ab9SScott Long 										   MV_ATA_SET_FEATURES_ENABLE_RLA, 0, 0,
681d2bd3ab9SScott Long 										   0, 0) == MV_FALSE)
682d2bd3ab9SScott Long 			{
68364470755SXin LI 				MV_ERROR("RR18xx [%d] channel %d: Set Features failed\n",
684d2bd3ab9SScott Long 						 pMvSataAdapter->adapterId, channelNum);
6851713e81bSScott Long 				return -1;
6861713e81bSScott Long 			}
6871713e81bSScott Long 		}
68864470755SXin LI 		KdPrint(("RR18xx [%d]: channel=%d, read look ahead enabled\n",
6891713e81bSScott Long 				  pMvSataAdapter->adapterId, channelNum));
690d2bd3ab9SScott Long 	}
691d2bd3ab9SScott Long 	else
692d2bd3ab9SScott Long 	{
69364470755SXin LI 		KdPrint(("RR18xx [%d]: channel %d, Read Look Ahead not supported\n",
694d2bd3ab9SScott Long 				  pMvSataAdapter->adapterId, channelNum));
6951713e81bSScott Long 	}
6961713e81bSScott Long #else
697d2bd3ab9SScott Long 	{
698d2bd3ab9SScott Long 		if (pMvSataChannel->identifyDevice[86] & 0x20)
699d2bd3ab9SScott Long 		{
70064470755SXin LI 			KdPrint(("RR18xx [%d]:channel %d, disable read look ahead\n",
7011713e81bSScott Long 					  pMvSataAdapter->adapterId, channelNum));
7021713e81bSScott Long 			if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum,
703d2bd3ab9SScott Long 										   MV_ATA_SET_FEATURES_DISABLE_RLA, 0, 0,
704d2bd3ab9SScott Long 										   0, 0) == MV_FALSE)
705d2bd3ab9SScott Long 			{
70664470755SXin LI 				MV_ERROR("RR18xx [%d]:channel %d:  ATA Set Features failed\n",
707d2bd3ab9SScott Long 						 pMvSataAdapter->adapterId, channelNum);
7081713e81bSScott Long 				return -1;
7091713e81bSScott Long 			}
7101713e81bSScott Long 		}
71164470755SXin LI 		KdPrint(("RR18xx [%d]:channel %d, read look ahead disabled\n",
7121713e81bSScott Long 				  pMvSataAdapter->adapterId, channelNum));
713d2bd3ab9SScott Long 	}
7141713e81bSScott Long #endif
7151713e81bSScott Long 
716d2bd3ab9SScott Long 
717d2bd3ab9SScott Long 	{
71864470755SXin LI 		KdPrint(("RR18xx [%d]: channel %d config EDMA, Non Queued Mode\n",
719d2bd3ab9SScott Long 				  pMvSataAdapter->adapterId,
720d2bd3ab9SScott Long 				  channelNum));
721d2bd3ab9SScott Long 		if (mvSataConfigEdmaMode(pMvSataAdapter, channelNum,
722d2bd3ab9SScott Long 								 MV_EDMA_MODE_NOT_QUEUED, 0) == MV_FALSE)
723d2bd3ab9SScott Long 		{
72464470755SXin LI 			MV_ERROR("RR18xx [%d] channel %d Error: mvSataConfigEdmaMode failed\n",
7251713e81bSScott Long 					 pMvSataAdapter->adapterId, channelNum);
7261713e81bSScott Long 			return -1;
7271713e81bSScott Long 		}
7281713e81bSScott Long 	}
7291713e81bSScott Long 	/* Enable EDMA */
730d2bd3ab9SScott Long 	if (mvSataEnableChannelDma(pMvSataAdapter, channelNum) == MV_FALSE)
731d2bd3ab9SScott Long 	{
73264470755SXin LI 		MV_ERROR("RR18xx [%d] Failed to enable DMA, channel=%d\n",
7331713e81bSScott Long 				 pMvSataAdapter->adapterId, channelNum);
7341713e81bSScott Long 		return -1;
7351713e81bSScott Long 	}
73664470755SXin LI 	MV_ERROR("RR18xx [%d,%d]: channel started successfully\n",
7371713e81bSScott Long 			 pMvSataAdapter->adapterId, channelNum);
7381713e81bSScott Long 
7391713e81bSScott Long #ifndef FOR_DEMO
7401713e81bSScott Long 	set_fail_led(pMvSataAdapter, channelNum, 0);
7411713e81bSScott Long #endif
7421713e81bSScott Long 	return 0;
7431713e81bSScott Long }
7441713e81bSScott Long 
7451713e81bSScott Long static void
7461713e81bSScott Long hptmv_handle_event(void * data, int flag)
7471713e81bSScott Long {
748d2bd3ab9SScott Long 	IAL_ADAPTER_T   *pAdapter = (IAL_ADAPTER_T *)data;
749d2bd3ab9SScott Long 	MV_SATA_ADAPTER *pMvSataAdapter = &pAdapter->mvSataAdapter;
7501713e81bSScott Long 	MV_U8           channelIndex;
7511713e81bSScott Long 
75249b3fc40SJohn Baldwin 	mtx_assert(&pAdapter->lock, MA_OWNED);
753d2bd3ab9SScott Long /*	mvOsSemTake(&pMvSataAdapter->semaphore); */
754d2bd3ab9SScott Long 	for (channelIndex = 0; channelIndex < MV_SATA_CHANNELS_NUM; channelIndex++)
755d2bd3ab9SScott Long 	{
756d2bd3ab9SScott Long 		switch(pAdapter->sataEvents[channelIndex])
757d2bd3ab9SScott Long 		{
7581713e81bSScott Long 			case SATA_EVENT_CHANNEL_CONNECTED:
7591713e81bSScott Long 				/* Handle only connects */
7601713e81bSScott Long 				if (flag == 1)
7611713e81bSScott Long 					break;
76264470755SXin LI 				KdPrint(("RR18xx [%d,%d]: new device connected\n",
7631713e81bSScott Long 						 pMvSataAdapter->adapterId, channelIndex));
7641713e81bSScott Long 				hptmv_init_channel(pAdapter, channelIndex);
765d2bd3ab9SScott Long 				if (mvSataConfigureChannel( pMvSataAdapter, channelIndex) == MV_FALSE)
766d2bd3ab9SScott Long 				{
76764470755SXin LI 					MV_ERROR("RR18xx [%d,%d] Failed to configure\n",
768d2bd3ab9SScott Long 							 pMvSataAdapter->adapterId, channelIndex);
7691713e81bSScott Long 					hptmv_free_channel(pAdapter, channelIndex);
770d2bd3ab9SScott Long 				}
771d2bd3ab9SScott Long 				else
772d2bd3ab9SScott Long 				{
773d2bd3ab9SScott Long 					/*mvSataChannelHardReset(pMvSataAdapter, channel);*/
774d2bd3ab9SScott Long 					if (start_channel( pAdapter, channelIndex))
775d2bd3ab9SScott Long 					{
77664470755SXin LI 						MV_ERROR("RR18xx [%d,%d]Failed to start channel\n",
777d2bd3ab9SScott Long 								 pMvSataAdapter->adapterId, channelIndex);
778d2bd3ab9SScott Long 						hptmv_free_channel(pAdapter, channelIndex);
779d2bd3ab9SScott Long 					}
780d2bd3ab9SScott Long 					else
781d2bd3ab9SScott Long 					{
782d2bd3ab9SScott Long 						device_change(pAdapter, channelIndex, TRUE);
7831713e81bSScott Long 					}
7841713e81bSScott Long 				}
785d2bd3ab9SScott Long 				pAdapter->sataEvents[channelIndex] = SATA_EVENT_NO_CHANGE;
7861713e81bSScott Long 			   break;
7871713e81bSScott Long 
7881713e81bSScott Long 			case SATA_EVENT_CHANNEL_DISCONNECTED:
7891713e81bSScott Long 				/* Handle only disconnects */
7901713e81bSScott Long 				if (flag == 0)
7911713e81bSScott Long 					break;
79264470755SXin LI 				KdPrint(("RR18xx [%d,%d]: device disconnected\n",
7931713e81bSScott Long 						 pMvSataAdapter->adapterId, channelIndex));
7941713e81bSScott Long 					/* Flush pending commands */
795d2bd3ab9SScott Long 				if(pMvSataAdapter->sataChannel[channelIndex])
796d2bd3ab9SScott Long 				{
7971713e81bSScott Long 					_VBUS_INST(&pAdapter->VBus)
798d2bd3ab9SScott Long 					mvSataFlushDmaQueue (pMvSataAdapter, channelIndex,
799d2bd3ab9SScott Long 										 MV_FLUSH_TYPE_CALLBACK);
8001713e81bSScott Long 					CheckPendingCall(_VBUS_P0);
801d2bd3ab9SScott Long 					mvSataRemoveChannel(pMvSataAdapter,channelIndex);
8021713e81bSScott Long 					hptmv_free_channel(pAdapter, channelIndex);
803d2bd3ab9SScott Long 					pMvSataAdapter->sataChannel[channelIndex] = NULL;
80464470755SXin LI 					KdPrint(("RR18xx [%d,%d]: channel removed\n",
805d2bd3ab9SScott Long 						 pMvSataAdapter->adapterId, channelIndex));
806d2bd3ab9SScott Long 					if (pAdapter->outstandingCommands==0 && DPC_Request_Nums==0)
8071713e81bSScott Long 						Check_Idle_Call(pAdapter);
8081713e81bSScott Long 				}
809d2bd3ab9SScott Long 				else
810d2bd3ab9SScott Long 				{
81164470755SXin LI 					KdPrint(("RR18xx [%d,%d]: channel already removed!!\n",
812d2bd3ab9SScott Long 							 pMvSataAdapter->adapterId, channelIndex));
813d2bd3ab9SScott Long 				}
814d2bd3ab9SScott Long 				pAdapter->sataEvents[channelIndex] = SATA_EVENT_NO_CHANGE;
8151713e81bSScott Long 				break;
8161713e81bSScott Long 
8171713e81bSScott Long 			case SATA_EVENT_NO_CHANGE:
8181713e81bSScott Long 				break;
8191713e81bSScott Long 
8201713e81bSScott Long 			default:
8211713e81bSScott Long 				break;
8221713e81bSScott Long 		}
8231713e81bSScott Long 	}
824d2bd3ab9SScott Long /*	mvOsSemRelease(&pMvSataAdapter->semaphore); */
8251713e81bSScott Long }
8261713e81bSScott Long 
8271713e81bSScott Long #define EVENT_CONNECT					1
8281713e81bSScott Long #define EVENT_DISCONNECT				0
8291713e81bSScott Long 
8301713e81bSScott Long static void
8311713e81bSScott Long hptmv_handle_event_connect(void *data)
8321713e81bSScott Long {
8331713e81bSScott Long   hptmv_handle_event (data, 0);
8341713e81bSScott Long }
8351713e81bSScott Long 
8361713e81bSScott Long static void
8371713e81bSScott Long hptmv_handle_event_disconnect(void *data)
8381713e81bSScott Long {
8391713e81bSScott Long   hptmv_handle_event (data, 1);
8401713e81bSScott Long }
8411713e81bSScott Long 
8421713e81bSScott Long static MV_BOOLEAN
8431713e81bSScott Long hptmv_event_notify(MV_SATA_ADAPTER *pMvSataAdapter, MV_EVENT_TYPE eventType,
8441713e81bSScott Long 								   MV_U32 param1, MV_U32 param2)
8451713e81bSScott Long {
8461713e81bSScott Long 	IAL_ADAPTER_T   *pAdapter = pMvSataAdapter->IALData;
8471713e81bSScott Long 
848d2bd3ab9SScott Long 	switch (eventType)
849d2bd3ab9SScott Long 	{
8501713e81bSScott Long 		case MV_EVENT_TYPE_SATA_CABLE:
8511713e81bSScott Long 			{
8521713e81bSScott Long 				MV_U8   channel = param2;
8531713e81bSScott Long 
854d2bd3ab9SScott Long 				if (param1 == EVENT_CONNECT)
855d2bd3ab9SScott Long 				{
856d2bd3ab9SScott Long 					pAdapter->sataEvents[channel] = SATA_EVENT_CHANNEL_CONNECTED;
85764470755SXin LI 					KdPrint(("RR18xx [%d,%d]: device connected event received\n",
858d2bd3ab9SScott Long 							 pMvSataAdapter->adapterId, channel));
859d2bd3ab9SScott Long 					/* Delete previous timers (if multiple drives connected in the same time */
86049b3fc40SJohn Baldwin 					callout_reset(&pAdapter->event_timer_connect, 10 * hz, hptmv_handle_event_connect, pAdapter);
861d2bd3ab9SScott Long 				}
862d2bd3ab9SScott Long 				else if (param1 == EVENT_DISCONNECT)
863d2bd3ab9SScott Long 				{
864d2bd3ab9SScott Long 					pAdapter->sataEvents[channel] = SATA_EVENT_CHANNEL_DISCONNECTED;
86564470755SXin LI 					KdPrint(("RR18xx [%d,%d]: device disconnected event received \n",
866d2bd3ab9SScott Long 							 pMvSataAdapter->adapterId, channel));
8671713e81bSScott Long 					device_change(pAdapter, channel, FALSE);
868d2bd3ab9SScott Long 					/* Delete previous timers (if multiple drives disconnected in the same time */
86949b3fc40SJohn Baldwin 					/*callout_reset(&pAdapter->event_timer_disconnect, 10 * hz, hptmv_handle_event_disconnect, pAdapter); */
870d2bd3ab9SScott Long 					/*It is not necessary to wait, handle it directly*/
871d2bd3ab9SScott Long 					hptmv_handle_event_disconnect(pAdapter);
872d2bd3ab9SScott Long 				}
873d2bd3ab9SScott Long 				else
874d2bd3ab9SScott Long 				{
875d2bd3ab9SScott Long 
8767a2b450fSEitan Adler 					MV_ERROR("RR18xx: illegal value for param1(%d) at "
8777a2b450fSEitan Adler 							 "connect/disconnect event, host=%d\n", param1,
8781713e81bSScott Long 							 pMvSataAdapter->adapterId );
8791713e81bSScott Long 
8801713e81bSScott Long 				}
8811713e81bSScott Long 			}
882d2bd3ab9SScott Long 			break;
8831713e81bSScott Long 		case MV_EVENT_TYPE_ADAPTER_ERROR:
88464470755SXin LI 			KdPrint(("RR18xx: DEVICE error event received, pci cause "
8851713e81bSScott Long 					  "reg=%x,  don't how to handle this\n", param1));
8861713e81bSScott Long 			return MV_TRUE;
8871713e81bSScott Long 		default:
88864470755SXin LI 			MV_ERROR("RR18xx[%d]: unknown event type (%d)\n",
8891713e81bSScott Long 					 pMvSataAdapter->adapterId, eventType);
8901713e81bSScott Long 			return MV_FALSE;
8911713e81bSScott Long 	}
8921713e81bSScott Long 	return MV_TRUE;
8931713e81bSScott Long }
8941713e81bSScott Long 
8951713e81bSScott Long static int
8961713e81bSScott Long hptmv_allocate_edma_queues(IAL_ADAPTER_T *pAdapter)
8971713e81bSScott Long {
898d2bd3ab9SScott Long 	pAdapter->requestsArrayBaseAddr = (MV_U8 *)contigmalloc(REQUESTS_ARRAY_SIZE,
899d2bd3ab9SScott Long 			M_DEVBUF, M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0ul);
900d2bd3ab9SScott Long 	if (pAdapter->requestsArrayBaseAddr == NULL)
901d2bd3ab9SScott Long 	{
90264470755SXin LI 		MV_ERROR("RR18xx[%d]: Failed to allocate memory for EDMA request"
903d2bd3ab9SScott Long 				 " queues\n", pAdapter->mvSataAdapter.adapterId);
9041713e81bSScott Long 		return -1;
9051713e81bSScott Long 	}
906d2bd3ab9SScott Long 	pAdapter->requestsArrayBaseDmaAddr = fOsPhysicalAddress(pAdapter->requestsArrayBaseAddr);
907d2bd3ab9SScott Long 	pAdapter->requestsArrayBaseAlignedAddr = pAdapter->requestsArrayBaseAddr;
9081713e81bSScott Long 	pAdapter->requestsArrayBaseAlignedAddr += MV_EDMA_REQUEST_QUEUE_SIZE;
909d2bd3ab9SScott Long 	pAdapter->requestsArrayBaseAlignedAddr  = (MV_U8 *)
910d2bd3ab9SScott Long 		(((ULONG_PTR)pAdapter->requestsArrayBaseAlignedAddr) & ~(ULONG_PTR)(MV_EDMA_REQUEST_QUEUE_SIZE - 1));
911d2bd3ab9SScott Long 	pAdapter->requestsArrayBaseDmaAlignedAddr = pAdapter->requestsArrayBaseDmaAddr;
9121713e81bSScott Long 	pAdapter->requestsArrayBaseDmaAlignedAddr += MV_EDMA_REQUEST_QUEUE_SIZE;
913d2bd3ab9SScott Long 	pAdapter->requestsArrayBaseDmaAlignedAddr &= ~(ULONG_PTR)(MV_EDMA_REQUEST_QUEUE_SIZE - 1);
9141713e81bSScott Long 
915d2bd3ab9SScott Long 	if ((pAdapter->requestsArrayBaseDmaAlignedAddr - pAdapter->requestsArrayBaseDmaAddr) !=
916d2bd3ab9SScott Long 		(pAdapter->requestsArrayBaseAlignedAddr - pAdapter->requestsArrayBaseAddr))
917d2bd3ab9SScott Long 	{
91864470755SXin LI 		MV_ERROR("RR18xx[%d]: Error in Request Quueues Alignment\n",
9191713e81bSScott Long 				 pAdapter->mvSataAdapter.adapterId);
920d2bd3ab9SScott Long 		contigfree(pAdapter->requestsArrayBaseAddr, REQUESTS_ARRAY_SIZE, M_DEVBUF);
9211713e81bSScott Long 		return -1;
9221713e81bSScott Long 	}
9231713e81bSScott Long 	/* response queues */
924d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseAddr = (MV_U8 *)contigmalloc(RESPONSES_ARRAY_SIZE,
925d2bd3ab9SScott Long 			M_DEVBUF, M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0ul);
926d2bd3ab9SScott Long 	if (pAdapter->responsesArrayBaseAddr == NULL)
927d2bd3ab9SScott Long 	{
92864470755SXin LI 		MV_ERROR("RR18xx[%d]: Failed to allocate memory for EDMA response"
929d2bd3ab9SScott Long 				 " queues\n", pAdapter->mvSataAdapter.adapterId);
930d2bd3ab9SScott Long 		contigfree(pAdapter->requestsArrayBaseAddr, RESPONSES_ARRAY_SIZE, M_DEVBUF);
9311713e81bSScott Long 		return -1;
9321713e81bSScott Long 	}
933d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseDmaAddr = fOsPhysicalAddress(pAdapter->responsesArrayBaseAddr);
934d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseAlignedAddr = pAdapter->responsesArrayBaseAddr;
9351713e81bSScott Long 	pAdapter->responsesArrayBaseAlignedAddr += MV_EDMA_RESPONSE_QUEUE_SIZE;
936d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseAlignedAddr  = (MV_U8 *)
937d2bd3ab9SScott Long 		(((ULONG_PTR)pAdapter->responsesArrayBaseAlignedAddr) & ~(ULONG_PTR)(MV_EDMA_RESPONSE_QUEUE_SIZE - 1));
938d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseDmaAlignedAddr = pAdapter->responsesArrayBaseDmaAddr;
939d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseDmaAlignedAddr += MV_EDMA_RESPONSE_QUEUE_SIZE;
940d2bd3ab9SScott Long 	pAdapter->responsesArrayBaseDmaAlignedAddr &= ~(ULONG_PTR)(MV_EDMA_RESPONSE_QUEUE_SIZE - 1);
9411713e81bSScott Long 
942d2bd3ab9SScott Long 	if ((pAdapter->responsesArrayBaseDmaAlignedAddr - pAdapter->responsesArrayBaseDmaAddr) !=
943d2bd3ab9SScott Long 		(pAdapter->responsesArrayBaseAlignedAddr - pAdapter->responsesArrayBaseAddr))
944d2bd3ab9SScott Long 	{
9457a2b450fSEitan Adler 		MV_ERROR("RR18xx[%d]: Error in Response Queues Alignment\n",
9461713e81bSScott Long 				 pAdapter->mvSataAdapter.adapterId);
947d2bd3ab9SScott Long 		contigfree(pAdapter->requestsArrayBaseAddr, REQUESTS_ARRAY_SIZE, M_DEVBUF);
948d2bd3ab9SScott Long 		contigfree(pAdapter->responsesArrayBaseAddr, RESPONSES_ARRAY_SIZE, M_DEVBUF);
9491713e81bSScott Long 		return -1;
9501713e81bSScott Long 	}
9511713e81bSScott Long 	return 0;
9521713e81bSScott Long }
9531713e81bSScott Long 
9541713e81bSScott Long static void
9551713e81bSScott Long hptmv_free_edma_queues(IAL_ADAPTER_T *pAdapter)
9561713e81bSScott Long {
957d2bd3ab9SScott Long 	contigfree(pAdapter->requestsArrayBaseAddr, REQUESTS_ARRAY_SIZE, M_DEVBUF);
958d2bd3ab9SScott Long 	contigfree(pAdapter->responsesArrayBaseAddr, RESPONSES_ARRAY_SIZE, M_DEVBUF);
9591713e81bSScott Long }
9601713e81bSScott Long 
9611713e81bSScott Long static PVOID
9621713e81bSScott Long AllocatePRDTable(IAL_ADAPTER_T *pAdapter)
9631713e81bSScott Long {
9641713e81bSScott Long 	PVOID ret;
9651713e81bSScott Long 	if (pAdapter->pFreePRDLink) {
966d2bd3ab9SScott Long 		KdPrint(("pAdapter->pFreePRDLink:%p\n",pAdapter->pFreePRDLink));
9671713e81bSScott Long 		ret = pAdapter->pFreePRDLink;
9681713e81bSScott Long 		pAdapter->pFreePRDLink = *(void**)ret;
9691713e81bSScott Long 		return ret;
9701713e81bSScott Long 	}
9711713e81bSScott Long 	return NULL;
9721713e81bSScott Long }
9731713e81bSScott Long 
9741713e81bSScott Long static void
9751713e81bSScott Long FreePRDTable(IAL_ADAPTER_T *pAdapter, PVOID PRDTable)
9761713e81bSScott Long {
9771713e81bSScott Long 	*(void**)PRDTable = pAdapter->pFreePRDLink;
9781713e81bSScott Long 	pAdapter->pFreePRDLink = PRDTable;
9791713e81bSScott Long }
9801713e81bSScott Long 
9811713e81bSScott Long extern PVDevice fGetFirstChild(PVDevice pLogical);
9821713e81bSScott Long extern void fResetBootMark(PVDevice pLogical);
9831713e81bSScott Long static void
9841713e81bSScott Long fRegisterVdevice(IAL_ADAPTER_T *pAdapter)
9851713e81bSScott Long {
9861713e81bSScott Long 	PVDevice pPhysical, pLogical;
9871713e81bSScott Long 	PVBus  pVBus;
9881713e81bSScott Long 	int i,j;
9891713e81bSScott Long 
9901713e81bSScott Long 	for(i=0;i<MV_SATA_CHANNELS_NUM;i++) {
9911713e81bSScott Long 		pPhysical = &(pAdapter->VDevices[i]);
9921713e81bSScott Long 		pLogical = pPhysical;
9931713e81bSScott Long 		while (pLogical->pParent) pLogical = pLogical->pParent;
9941713e81bSScott Long 		if (pLogical->vf_online==0) {
9951713e81bSScott Long 			pPhysical->vf_bootmark = pLogical->vf_bootmark = 0;
9961713e81bSScott Long 			continue;
9971713e81bSScott Long 		}
998d2bd3ab9SScott Long 		if (pLogical->VDeviceType==VD_SPARE || pPhysical!=fGetFirstChild(pLogical))
9991713e81bSScott Long 			continue;
10001713e81bSScott Long 
10011713e81bSScott Long 		pVBus = &pAdapter->VBus;
1002d2bd3ab9SScott Long 		if(pVBus)
1003d2bd3ab9SScott Long 		{
10041713e81bSScott Long 			j=0;
1005d2bd3ab9SScott Long 			while(j<MAX_VDEVICE_PER_VBUS && pVBus->pVDevice[j]) j++;
10061713e81bSScott Long 			if(j<MAX_VDEVICE_PER_VBUS){
10071713e81bSScott Long 				pVBus->pVDevice[j] = pLogical;
10081713e81bSScott Long 				pLogical->pVBus = pVBus;
10091713e81bSScott Long 
10101713e81bSScott Long 				if (j>0 && pLogical->vf_bootmark) {
10111713e81bSScott Long 					if (pVBus->pVDevice[0]->vf_bootmark) {
10121713e81bSScott Long 						fResetBootMark(pLogical);
1013d2bd3ab9SScott Long 					}
1014d2bd3ab9SScott Long 					else {
1015d2bd3ab9SScott Long 						do { pVBus->pVDevice[j] = pVBus->pVDevice[j-1]; } while (--j);
10161713e81bSScott Long 						pVBus->pVDevice[0] = pLogical;
10171713e81bSScott Long 					}
10181713e81bSScott Long 				}
10191713e81bSScott Long 			}
10201713e81bSScott Long 		}
10211713e81bSScott Long 	}
10221713e81bSScott Long }
10231713e81bSScott Long 
10241713e81bSScott Long PVDevice
10251713e81bSScott Long GetSpareDisk(_VBUS_ARG PVDevice pArray)
10261713e81bSScott Long {
1027d2bd3ab9SScott Long 	IAL_ADAPTER_T *pAdapter = (IAL_ADAPTER_T *)pArray->pVBus->OsExt;
102864470755SXin LI 	LBA_T capacity = LongDiv(pArray->VDeviceCapacity, pArray->u.array.bArnMember-1);
102964470755SXin LI 	LBA_T thiscap, maxcap = MAX_LBA_T;
10301713e81bSScott Long 	PVDevice pVDevice, pFind = NULL;
10311713e81bSScott Long 	int i;
10321713e81bSScott Long 
1033d2bd3ab9SScott Long 	for(i=0;i<MV_SATA_CHANNELS_NUM;i++)
1034d2bd3ab9SScott Long 	{
10351713e81bSScott Long 		pVDevice = &pAdapter->VDevices[i];
10361713e81bSScott Long 		if(!pVDevice)
10371713e81bSScott Long 			continue;
1038d2bd3ab9SScott Long 		thiscap = pArray->vf_format_v2? pVDevice->u.disk.dDeRealCapacity : pVDevice->VDeviceCapacity;
10391713e81bSScott Long 		/* find the smallest usable spare disk */
10401713e81bSScott Long 		if (pVDevice->VDeviceType==VD_SPARE &&
1041d2bd3ab9SScott Long 			pVDevice->u.disk.df_on_line &&
1042d2bd3ab9SScott Long 			thiscap < maxcap &&
1043d2bd3ab9SScott Long 			thiscap >= capacity)
1044d2bd3ab9SScott Long 		{
10451713e81bSScott Long 				maxcap = pVDevice->VDeviceCapacity;
10461713e81bSScott Long 				pFind = pVDevice;
10471713e81bSScott Long 		}
10481713e81bSScott Long 	}
10491713e81bSScott Long 	return pFind;
10501713e81bSScott Long }
10511713e81bSScott Long 
10521713e81bSScott Long /******************************************************************
10531713e81bSScott Long  * IO ATA Command
10541713e81bSScott Long  *******************************************************************/
10551713e81bSScott Long int HPTLIBAPI
10561713e81bSScott Long fDeReadWrite(PDevice pDev, ULONG Lba, UCHAR Cmd, void *tmpBuffer)
10571713e81bSScott Long {
10581713e81bSScott Long 	return mvReadWrite(pDev->mv, Lba, Cmd, tmpBuffer);
10591713e81bSScott Long }
10601713e81bSScott Long 
10611713e81bSScott Long void HPTLIBAPI fDeSelectMode(PDevice pDev, UCHAR NewMode)
10621713e81bSScott Long {
1063d2bd3ab9SScott Long 	MV_SATA_CHANNEL *pSataChannel = pDev->mv;
1064d2bd3ab9SScott Long 	MV_SATA_ADAPTER *pSataAdapter = pSataChannel->mvSataAdapter;
1065d2bd3ab9SScott Long 	MV_U8 channelIndex = pSataChannel->channelNumber;
10661713e81bSScott Long 	UCHAR mvMode;
10671713e81bSScott Long 	/* 508x don't use MW-DMA? */
10681713e81bSScott Long 	if (NewMode>4 && NewMode<8) NewMode = 4;
10691713e81bSScott Long 	pDev->bDeModeSetting = NewMode;
10701713e81bSScott Long 	if (NewMode<=4)
10711713e81bSScott Long 		mvMode = MV_ATA_TRANSFER_PIO_0 + NewMode;
10721713e81bSScott Long 	else
10731713e81bSScott Long 		mvMode = MV_ATA_TRANSFER_UDMA_0 + (NewMode-8);
10741713e81bSScott Long 
10751713e81bSScott Long 	/*To fix 88i8030 bug*/
10761713e81bSScott Long 	if (mvMode > MV_ATA_TRANSFER_UDMA_0 && mvMode < MV_ATA_TRANSFER_UDMA_4)
10771713e81bSScott Long 		mvMode = MV_ATA_TRANSFER_UDMA_0;
10781713e81bSScott Long 
10791713e81bSScott Long 	mvSataDisableChannelDma(pSataAdapter, channelIndex);
10801713e81bSScott Long 	/* Flush pending commands */
10811713e81bSScott Long 	mvSataFlushDmaQueue (pSataAdapter, channelIndex, MV_FLUSH_TYPE_NONE);
10821713e81bSScott Long 
10831713e81bSScott Long 	if (mvStorageDevATASetFeatures(pSataAdapter, channelIndex,
1084d2bd3ab9SScott Long 								   MV_ATA_SET_FEATURES_TRANSFER,
1085d2bd3ab9SScott Long 								   mvMode, 0, 0, 0) == MV_FALSE)
1086d2bd3ab9SScott Long 	{
10871713e81bSScott Long 		KdPrint(("channel %d: Set Features failed\n", channelIndex));
10881713e81bSScott Long 	}
10891713e81bSScott Long 	/* Enable EDMA */
10901713e81bSScott Long 	if (mvSataEnableChannelDma(pSataAdapter, channelIndex) == MV_FALSE)
10911713e81bSScott Long 		KdPrint(("Failed to enable DMA, channel=%d", channelIndex));
10921713e81bSScott Long }
10931713e81bSScott Long 
109464470755SXin LI int HPTLIBAPI fDeSetTCQ(PDevice pDev, int enable, int depth)
109564470755SXin LI {
109664470755SXin LI 	MV_SATA_CHANNEL *pSataChannel = pDev->mv;
109764470755SXin LI 	MV_SATA_ADAPTER *pSataAdapter = pSataChannel->mvSataAdapter;
109864470755SXin LI 	MV_U8 channelIndex = pSataChannel->channelNumber;
109964470755SXin LI 	IAL_ADAPTER_T *pAdapter = pSataAdapter->IALData;
110064470755SXin LI 	MV_CHANNEL		*channelInfo = &(pAdapter->mvChannel[channelIndex]);
110164470755SXin LI 	int dmaActive = pSataChannel->queueCommandsEnabled;
110264470755SXin LI 	int ret = 0;
110364470755SXin LI 
110464470755SXin LI 	if (dmaActive) {
110564470755SXin LI 		mvSataDisableChannelDma(pSataAdapter, channelIndex);
110664470755SXin LI 		mvSataFlushDmaQueue(pSataAdapter,channelIndex,MV_FLUSH_TYPE_CALLBACK);
110764470755SXin LI 	}
110864470755SXin LI 
110964470755SXin LI 	if (enable) {
111064470755SXin LI 		if (pSataChannel->queuedDMA == MV_EDMA_MODE_NOT_QUEUED &&
111164470755SXin LI 			(pSataChannel->identifyDevice[IDEN_SUPPORTED_COMMANDS2] & (0x2))) {
111264470755SXin LI 			UCHAR depth = ((pSataChannel->identifyDevice[IDEN_QUEUE_DEPTH]) & 0x1f) + 1;
111364470755SXin LI 			channelInfo->queueDepth = (depth==32)? 31 : depth;
111464470755SXin LI 			mvSataConfigEdmaMode(pSataAdapter, channelIndex, MV_EDMA_MODE_QUEUED, depth);
111564470755SXin LI 			ret = 1;
111664470755SXin LI 		}
111764470755SXin LI 	}
111864470755SXin LI 	else
111964470755SXin LI 	{
112064470755SXin LI 		if (pSataChannel->queuedDMA != MV_EDMA_MODE_NOT_QUEUED) {
112164470755SXin LI 			channelInfo->queueDepth = 2;
112264470755SXin LI 			mvSataConfigEdmaMode(pSataAdapter, channelIndex, MV_EDMA_MODE_NOT_QUEUED, 0);
112364470755SXin LI 			ret = 1;
112464470755SXin LI 		}
112564470755SXin LI 	}
112664470755SXin LI 
112764470755SXin LI 	if (dmaActive)
112864470755SXin LI 		mvSataEnableChannelDma(pSataAdapter,channelIndex);
112964470755SXin LI 	return ret;
113064470755SXin LI }
113164470755SXin LI 
113264470755SXin LI int HPTLIBAPI fDeSetNCQ(PDevice pDev, int enable, int depth)
113364470755SXin LI {
113464470755SXin LI 	return 0;
113564470755SXin LI }
113664470755SXin LI 
113764470755SXin LI int HPTLIBAPI fDeSetWriteCache(PDevice pDev, int enable)
113864470755SXin LI {
113964470755SXin LI 	MV_SATA_CHANNEL *pSataChannel = pDev->mv;
114064470755SXin LI 	MV_SATA_ADAPTER *pSataAdapter = pSataChannel->mvSataAdapter;
114164470755SXin LI 	MV_U8 channelIndex = pSataChannel->channelNumber;
114264470755SXin LI 	IAL_ADAPTER_T *pAdapter = pSataAdapter->IALData;
114364470755SXin LI 	MV_CHANNEL		*channelInfo = &(pAdapter->mvChannel[channelIndex]);
114464470755SXin LI 	int dmaActive = pSataChannel->queueCommandsEnabled;
114564470755SXin LI 	int ret = 0;
114664470755SXin LI 
114764470755SXin LI 	if (dmaActive) {
114864470755SXin LI 		mvSataDisableChannelDma(pSataAdapter, channelIndex);
114964470755SXin LI 		mvSataFlushDmaQueue(pSataAdapter,channelIndex,MV_FLUSH_TYPE_CALLBACK);
115064470755SXin LI 	}
115164470755SXin LI 
115264470755SXin LI 	if ((pSataChannel->identifyDevice[82] & (0x20))) {
115364470755SXin LI 		if (enable) {
115464470755SXin LI 			if (mvStorageDevATASetFeatures(pSataAdapter, channelIndex,
115564470755SXin LI 				MV_ATA_SET_FEATURES_ENABLE_WCACHE, 0, 0, 0, 0))
115664470755SXin LI 			{
115764470755SXin LI 				channelInfo->writeCacheEnabled = MV_TRUE;
115864470755SXin LI 				ret = 1;
115964470755SXin LI 			}
116064470755SXin LI 		}
116164470755SXin LI 		else {
116264470755SXin LI 			if (mvStorageDevATASetFeatures(pSataAdapter, channelIndex,
116364470755SXin LI 				MV_ATA_SET_FEATURES_DISABLE_WCACHE, 0, 0, 0, 0))
116464470755SXin LI 			{
116564470755SXin LI 				channelInfo->writeCacheEnabled = MV_FALSE;
116664470755SXin LI 				ret = 1;
116764470755SXin LI 			}
116864470755SXin LI 		}
116964470755SXin LI 	}
117064470755SXin LI 
117164470755SXin LI 	if (dmaActive)
117264470755SXin LI 		mvSataEnableChannelDma(pSataAdapter,channelIndex);
117364470755SXin LI 	return ret;
117464470755SXin LI }
117564470755SXin LI 
117664470755SXin LI int HPTLIBAPI fDeSetReadAhead(PDevice pDev, int enable)
117764470755SXin LI {
117864470755SXin LI 	MV_SATA_CHANNEL *pSataChannel = pDev->mv;
117964470755SXin LI 	MV_SATA_ADAPTER *pSataAdapter = pSataChannel->mvSataAdapter;
118064470755SXin LI 	MV_U8 channelIndex = pSataChannel->channelNumber;
118164470755SXin LI 	IAL_ADAPTER_T *pAdapter = pSataAdapter->IALData;
118264470755SXin LI 	MV_CHANNEL		*channelInfo = &(pAdapter->mvChannel[channelIndex]);
118364470755SXin LI 	int dmaActive = pSataChannel->queueCommandsEnabled;
118464470755SXin LI 	int ret = 0;
118564470755SXin LI 
118664470755SXin LI 	if (dmaActive) {
118764470755SXin LI 		mvSataDisableChannelDma(pSataAdapter, channelIndex);
118864470755SXin LI 		mvSataFlushDmaQueue(pSataAdapter,channelIndex,MV_FLUSH_TYPE_CALLBACK);
118964470755SXin LI 	}
119064470755SXin LI 
119164470755SXin LI 	if ((pSataChannel->identifyDevice[82] & (0x40))) {
119264470755SXin LI 		if (enable) {
119364470755SXin LI 			if (mvStorageDevATASetFeatures(pSataAdapter, channelIndex,
119464470755SXin LI 				MV_ATA_SET_FEATURES_ENABLE_RLA, 0, 0, 0, 0))
119564470755SXin LI 			{
119664470755SXin LI 				channelInfo->readAheadEnabled = MV_TRUE;
119764470755SXin LI 				ret = 1;
119864470755SXin LI 			}
119964470755SXin LI 		}
120064470755SXin LI 		else {
120164470755SXin LI 			if (mvStorageDevATASetFeatures(pSataAdapter, channelIndex,
120264470755SXin LI 				MV_ATA_SET_FEATURES_DISABLE_RLA, 0, 0, 0, 0))
120364470755SXin LI 			{
120464470755SXin LI 				channelInfo->readAheadEnabled = MV_FALSE;
120564470755SXin LI 				ret = 1;
120664470755SXin LI 			}
120764470755SXin LI 		}
120864470755SXin LI 	}
120964470755SXin LI 
121064470755SXin LI 	if (dmaActive)
121164470755SXin LI 		mvSataEnableChannelDma(pSataAdapter,channelIndex);
121264470755SXin LI 	return ret;
121364470755SXin LI }
121464470755SXin LI 
12151713e81bSScott Long #ifdef SUPPORT_ARRAY
12161713e81bSScott Long #define IdeRegisterVDevice  fCheckArray
12171713e81bSScott Long #else
12181713e81bSScott Long void
12191713e81bSScott Long IdeRegisterVDevice(PDevice pDev)
12201713e81bSScott Long {
12211713e81bSScott Long 	PVDevice pVDev = Map2pVDevice(pDev);
12221713e81bSScott Long 
12231713e81bSScott Long 	pVDev->VDeviceType = pDev->df_atapi? VD_ATAPI :
12241713e81bSScott Long 						 pDev->df_removable_drive? VD_REMOVABLE : VD_SINGLE_DISK;
12251713e81bSScott Long 	pVDev->vf_online = 1;
12261713e81bSScott Long 	pVDev->VDeviceCapacity = pDev->dDeRealCapacity;
12271713e81bSScott Long 	pVDev->pfnSendCommand = pfnSendCommand[pVDev->VDeviceType];
12281713e81bSScott Long 	pVDev->pfnDeviceFailed = pfnDeviceFailed[pVDev->VDeviceType];
12291713e81bSScott Long }
12301713e81bSScott Long #endif
12311713e81bSScott Long 
1232d2bd3ab9SScott Long static __inline PBUS_DMAMAP
1233d2bd3ab9SScott Long dmamap_get(struct IALAdapter * pAdapter)
1234d2bd3ab9SScott Long {
1235d2bd3ab9SScott Long 	PBUS_DMAMAP	p = pAdapter->pbus_dmamap_list;
1236d2bd3ab9SScott Long 	if (p)
1237d2bd3ab9SScott Long 		pAdapter->pbus_dmamap_list = p-> next;
1238d2bd3ab9SScott Long 	return p;
1239d2bd3ab9SScott Long }
1240d2bd3ab9SScott Long 
1241d2bd3ab9SScott Long static __inline void
1242d2bd3ab9SScott Long dmamap_put(PBUS_DMAMAP p)
1243d2bd3ab9SScott Long {
1244d2bd3ab9SScott Long 	p->next = p->pAdapter->pbus_dmamap_list;
1245d2bd3ab9SScott Long 	p->pAdapter->pbus_dmamap_list = p;
1246d2bd3ab9SScott Long }
1247d2bd3ab9SScott Long 
12481713e81bSScott Long static int num_adapters = 0;
12491713e81bSScott Long static int
12501713e81bSScott Long init_adapter(IAL_ADAPTER_T *pAdapter)
12511713e81bSScott Long {
12521713e81bSScott Long 	PVBus _vbus_p = &pAdapter->VBus;
12531713e81bSScott Long 	MV_SATA_ADAPTER *pMvSataAdapter;
1254d2bd3ab9SScott Long 	int i, channel, rid;
12551713e81bSScott Long 
12561713e81bSScott Long 	PVDevice pVDev;
12571713e81bSScott Long 
125849b3fc40SJohn Baldwin 	mtx_init(&pAdapter->lock, "hptsleeplock", NULL, MTX_DEF);
125949b3fc40SJohn Baldwin 	callout_init_mtx(&pAdapter->event_timer_connect, &pAdapter->lock, 0);
126049b3fc40SJohn Baldwin 	callout_init_mtx(&pAdapter->event_timer_disconnect, &pAdapter->lock, 0);
126164470755SXin LI 
126249b3fc40SJohn Baldwin 	sx_xlock(&hptmv_list_lock);
12631713e81bSScott Long 	pAdapter->next = 0;
12641713e81bSScott Long 
12651713e81bSScott Long 	if(gIal_Adapter == 0){
12661713e81bSScott Long 		gIal_Adapter = pAdapter;
12671713e81bSScott Long 		pCurAdapter = gIal_Adapter;
1268d2bd3ab9SScott Long 	}
1269d2bd3ab9SScott Long 	else {
12701713e81bSScott Long 		pCurAdapter->next = pAdapter;
12711713e81bSScott Long 		pCurAdapter = pAdapter;
12721713e81bSScott Long 	}
127349b3fc40SJohn Baldwin 	sx_xunlock(&hptmv_list_lock);
12741713e81bSScott Long 
12751713e81bSScott Long 	pAdapter->outstandingCommands = 0;
12761713e81bSScott Long 
12771713e81bSScott Long 	pMvSataAdapter = &(pAdapter->mvSataAdapter);
12781713e81bSScott Long 	_vbus_p->OsExt = (void *)pAdapter;
12791713e81bSScott Long 	pMvSataAdapter->IALData = pAdapter;
12801713e81bSScott Long 
1281b6f97155SScott Long 	if (bus_dma_tag_create(bus_get_dma_tag(pAdapter->hpt_dev),/* parent */
1282d2bd3ab9SScott Long 			4,	/* alignment */
1283d2bd3ab9SScott Long 			BUS_SPACE_MAXADDR_32BIT+1, /* boundary */
1284d2bd3ab9SScott Long 			BUS_SPACE_MAXADDR,	/* lowaddr */
1285d2bd3ab9SScott Long 			BUS_SPACE_MAXADDR,	/* highaddr */
1286d2bd3ab9SScott Long 			NULL, NULL, 		/* filter, filterarg */
1287d2bd3ab9SScott Long 			PAGE_SIZE * (MAX_SG_DESCRIPTORS-1), /* maxsize */
1288d2bd3ab9SScott Long 			MAX_SG_DESCRIPTORS, /* nsegments */
1289d2bd3ab9SScott Long 			0x10000,	/* maxsegsize */
1290d2bd3ab9SScott Long 			BUS_DMA_WAITOK, 	/* flags */
1291d2bd3ab9SScott Long 			busdma_lock_mutex,	/* lockfunc */
129249b3fc40SJohn Baldwin 			&pAdapter->lock,	/* lockfuncarg */
1293d2bd3ab9SScott Long 			&pAdapter->io_dma_parent /* tag */))
1294d2bd3ab9SScott Long 		{
1295c2ede4b3SMartin Blapp 			return ENXIO;
12961713e81bSScott Long 	}
12971713e81bSScott Long 
12981713e81bSScott Long 
1299d2bd3ab9SScott Long 	if (hptmv_allocate_edma_queues(pAdapter))
1300d2bd3ab9SScott Long 	{
130164470755SXin LI 		MV_ERROR("RR18xx: Failed to allocate memory for EDMA queues\n");
1302d2bd3ab9SScott Long 		return ENOMEM;
13031713e81bSScott Long 	}
13041713e81bSScott Long 
13051713e81bSScott Long 	/* also map EPROM address */
13061713e81bSScott Long 	rid = 0x10;
1307eff83876SJustin Hibbits 	if (!(pAdapter->mem_res = bus_alloc_resource_any(pAdapter->hpt_dev,
1308eff83876SJustin Hibbits 			SYS_RES_MEMORY, &rid, RF_ACTIVE))
1309d2bd3ab9SScott Long 		||
1310d2bd3ab9SScott Long 		!(pMvSataAdapter->adapterIoBaseAddress = rman_get_virtual(pAdapter->mem_res)))
1311d2bd3ab9SScott Long 	{
131264470755SXin LI 		MV_ERROR("RR18xx: Failed to remap memory space\n");
1313d2bd3ab9SScott Long 		hptmv_free_edma_queues(pAdapter);
1314d2bd3ab9SScott Long 		return ENXIO;
13151713e81bSScott Long 	}
1316d2bd3ab9SScott Long 	else
1317d2bd3ab9SScott Long 	{
131864470755SXin LI 		KdPrint(("RR18xx: io base address 0x%p\n", pMvSataAdapter->adapterIoBaseAddress));
1319d2bd3ab9SScott Long 	}
13201713e81bSScott Long 
13211713e81bSScott Long 	pMvSataAdapter->adapterId = num_adapters++;
13221713e81bSScott Long 	/* get the revision ID */
1323d2bd3ab9SScott Long 	pMvSataAdapter->pciConfigRevisionId = pci_read_config(pAdapter->hpt_dev, PCIR_REVID, 1);
13241713e81bSScott Long 	pMvSataAdapter->pciConfigDeviceId = pci_get_device(pAdapter->hpt_dev);
13251713e81bSScott Long 
132664470755SXin LI 	/* init RR18xx */
13271713e81bSScott Long 	pMvSataAdapter->intCoalThre[0]= 1;
13281713e81bSScott Long 	pMvSataAdapter->intCoalThre[1]= 1;
13291713e81bSScott Long 	pMvSataAdapter->intTimeThre[0] = 1;
13301713e81bSScott Long 	pMvSataAdapter->intTimeThre[1] = 1;
13311713e81bSScott Long 	pMvSataAdapter->pciCommand = 0x0107E371;
13321713e81bSScott Long 	pMvSataAdapter->pciSerrMask = 0xd77fe6ul;
13331713e81bSScott Long 	pMvSataAdapter->pciInterruptMask = 0xd77fe6ul;
13341713e81bSScott Long 	pMvSataAdapter->mvSataEventNotify = hptmv_event_notify;
13351713e81bSScott Long 
1336d2bd3ab9SScott Long 	if (mvSataInitAdapter(pMvSataAdapter) == MV_FALSE)
1337d2bd3ab9SScott Long 	{
133864470755SXin LI 		MV_ERROR("RR18xx[%d]: core failed to initialize the adapter\n",
13391713e81bSScott Long 				 pMvSataAdapter->adapterId);
1340d2bd3ab9SScott Long unregister:
1341d2bd3ab9SScott Long 		bus_release_resource(pAdapter->hpt_dev, SYS_RES_MEMORY, rid, pAdapter->mem_res);
1342d2bd3ab9SScott Long 		hptmv_free_edma_queues(pAdapter);
1343d2bd3ab9SScott Long 		return ENXIO;
13441713e81bSScott Long 	}
13451713e81bSScott Long 	pAdapter->ver_601 = pMvSataAdapter->pcbVersion;
13461713e81bSScott Long 
13471713e81bSScott Long #ifndef FOR_DEMO
13481713e81bSScott Long 	set_fail_leds(pMvSataAdapter, 0);
13491713e81bSScott Long #endif
13501713e81bSScott Long 
13511713e81bSScott Long 	/* setup command blocks */
13521713e81bSScott Long 	KdPrint(("Allocate command blocks\n"));
13531713e81bSScott Long 	_vbus_(pFreeCommands) = 0;
1354d2bd3ab9SScott Long 	pAdapter->pCommandBlocks =
1355d2bd3ab9SScott Long 		malloc(sizeof(struct _Command) * MAX_COMMAND_BLOCKS_FOR_EACH_VBUS, M_DEVBUF, M_NOWAIT);
13567d9aed9cSScott Long 	KdPrint(("pCommandBlocks:%p\n",pAdapter->pCommandBlocks));
1357d2bd3ab9SScott Long 	if (!pAdapter->pCommandBlocks) {
1358d2bd3ab9SScott Long 		MV_ERROR("insufficient memory\n");
1359d2bd3ab9SScott Long 		goto unregister;
13601713e81bSScott Long 	}
13611713e81bSScott Long 
1362d2bd3ab9SScott Long 	for (i=0; i<MAX_COMMAND_BLOCKS_FOR_EACH_VBUS; i++) {
1363d2bd3ab9SScott Long 		FreeCommand(_VBUS_P &(pAdapter->pCommandBlocks[i]));
1364d2bd3ab9SScott Long 	}
1365d2bd3ab9SScott Long 
1366d2bd3ab9SScott Long 	/*Set up the bus_dmamap*/
1367d2bd3ab9SScott Long 	pAdapter->pbus_dmamap = (PBUS_DMAMAP)malloc (sizeof(struct _BUS_DMAMAP) * MAX_QUEUE_COMM, M_DEVBUF, M_NOWAIT);
1368d2bd3ab9SScott Long 	if(!pAdapter->pbus_dmamap) {
1369d2bd3ab9SScott Long 		MV_ERROR("insufficient memory\n");
1370d2bd3ab9SScott Long 		free(pAdapter->pCommandBlocks, M_DEVBUF);
1371d2bd3ab9SScott Long 		goto unregister;
1372d2bd3ab9SScott Long 	}
1373d2bd3ab9SScott Long 
1374d2bd3ab9SScott Long 	memset((void *)pAdapter->pbus_dmamap, 0, sizeof(struct _BUS_DMAMAP) * MAX_QUEUE_COMM);
1375d2bd3ab9SScott Long 	pAdapter->pbus_dmamap_list = 0;
1376d2bd3ab9SScott Long 	for (i=0; i < MAX_QUEUE_COMM; i++) {
1377d2bd3ab9SScott Long 		PBUS_DMAMAP  pmap = &(pAdapter->pbus_dmamap[i]);
1378d2bd3ab9SScott Long 		pmap->pAdapter = pAdapter;
1379d2bd3ab9SScott Long 		dmamap_put(pmap);
1380d2bd3ab9SScott Long 
1381d2bd3ab9SScott Long 		if(bus_dmamap_create(pAdapter->io_dma_parent, 0, &pmap->dma_map)) {
1382d2bd3ab9SScott Long 			MV_ERROR("Can not allocate dma map\n");
1383d2bd3ab9SScott Long 			free(pAdapter->pCommandBlocks, M_DEVBUF);
1384d2bd3ab9SScott Long 			free(pAdapter->pbus_dmamap, M_DEVBUF);
1385d2bd3ab9SScott Long 			goto unregister;
1386d2bd3ab9SScott Long 		}
138749b3fc40SJohn Baldwin 		callout_init_mtx(&pmap->timeout, &pAdapter->lock, 0);
1388d2bd3ab9SScott Long 	}
13891713e81bSScott Long 	/* setup PRD Tables */
13901713e81bSScott Long 	KdPrint(("Allocate PRD Tables\n"));
13911713e81bSScott Long 	pAdapter->pFreePRDLink = 0;
13921713e81bSScott Long 
1393d2bd3ab9SScott Long 	pAdapter->prdTableAddr = (PUCHAR)contigmalloc(
1394d2bd3ab9SScott Long 		(PRD_ENTRIES_SIZE*PRD_TABLES_FOR_VBUS + 32), M_DEVBUF, M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0ul);
13951713e81bSScott Long 
13967d9aed9cSScott Long 	KdPrint(("prdTableAddr:%p\n",pAdapter->prdTableAddr));
13971713e81bSScott Long 	if (!pAdapter->prdTableAddr) {
13981713e81bSScott Long 		MV_ERROR("insufficient PRD Tables\n");
13991713e81bSScott Long 		goto unregister;
14001713e81bSScott Long 	}
1401d2bd3ab9SScott Long 	pAdapter->prdTableAlignedAddr = (PUCHAR)(((ULONG_PTR)pAdapter->prdTableAddr + 0x1f) & ~(ULONG_PTR)0x1fL);
1402d2bd3ab9SScott Long 	{
1403d2bd3ab9SScott Long 		PUCHAR PRDTable = pAdapter->prdTableAlignedAddr;
1404d2bd3ab9SScott Long 		for (i=0; i<PRD_TABLES_FOR_VBUS; i++)
1405d2bd3ab9SScott Long 		{
1406d2bd3ab9SScott Long /*			KdPrint(("i=%d,pAdapter->pFreePRDLink=%p\n",i,pAdapter->pFreePRDLink)); */
14071713e81bSScott Long 			FreePRDTable(pAdapter, PRDTable);
14081713e81bSScott Long 			PRDTable += PRD_ENTRIES_SIZE;
14091713e81bSScott Long 		}
1410d2bd3ab9SScott Long 	}
14111713e81bSScott Long 
14121713e81bSScott Long 	/* enable the adapter interrupts */
14131713e81bSScott Long 
14141713e81bSScott Long 	/* configure and start the connected channels*/
1415d2bd3ab9SScott Long 	for (channel = 0; channel < MV_SATA_CHANNELS_NUM; channel++)
1416d2bd3ab9SScott Long 	{
14171713e81bSScott Long 		pAdapter->mvChannel[channel].online = MV_FALSE;
14181713e81bSScott Long 		if (mvSataIsStorageDeviceConnected(pMvSataAdapter, channel)
1419d2bd3ab9SScott Long 			== MV_TRUE)
1420d2bd3ab9SScott Long 		{
142164470755SXin LI 			KdPrint(("RR18xx[%d]: channel %d is connected\n",
14221713e81bSScott Long 					  pMvSataAdapter->adapterId, channel));
14231713e81bSScott Long 
1424d2bd3ab9SScott Long 			if (hptmv_init_channel(pAdapter, channel) == 0)
1425d2bd3ab9SScott Long 			{
1426d2bd3ab9SScott Long 				if (mvSataConfigureChannel(pMvSataAdapter, channel) == MV_FALSE)
1427d2bd3ab9SScott Long 				{
142864470755SXin LI 					MV_ERROR("RR18xx[%d]: Failed to configure channel"
1429d2bd3ab9SScott Long 							 " %d\n",pMvSataAdapter->adapterId, channel);
14301713e81bSScott Long 					hptmv_free_channel(pAdapter, channel);
14311713e81bSScott Long 				}
1432d2bd3ab9SScott Long 				else
1433d2bd3ab9SScott Long 				{
1434d2bd3ab9SScott Long 					if (start_channel(pAdapter, channel))
1435d2bd3ab9SScott Long 					{
143664470755SXin LI 						MV_ERROR("RR18xx[%d]: Failed to start channel,"
14371713e81bSScott Long 								 " channel=%d\n",pMvSataAdapter->adapterId,
14381713e81bSScott Long 								 channel);
14391713e81bSScott Long 						hptmv_free_channel(pAdapter, channel);
14401713e81bSScott Long 					}
14411713e81bSScott Long 					pAdapter->mvChannel[channel].online = MV_TRUE;
1442d2bd3ab9SScott Long 					/*  mvSataChannelSetEdmaLoopBackMode(pMvSataAdapter,
1443d2bd3ab9SScott Long 													   channel,
1444d2bd3ab9SScott Long 													   MV_TRUE);*/
1445d2bd3ab9SScott Long 				}
1446d2bd3ab9SScott Long 			}
14471713e81bSScott Long 		}
14481713e81bSScott Long 		KdPrint(("pAdapter->mvChannel[channel].online:%x, channel:%d\n",
14491713e81bSScott Long 			pAdapter->mvChannel[channel].online, channel));
14501713e81bSScott Long 	}
14511713e81bSScott Long 
14521713e81bSScott Long #ifdef SUPPORT_ARRAY
14531713e81bSScott Long 	for(i = MAX_ARRAY_DEVICE - 1; i >= 0; i--) {
14541713e81bSScott Long 		pVDev = ArrayTables(i);
14551713e81bSScott Long 		mArFreeArrayTable(pVDev);
14561713e81bSScott Long 	}
14571713e81bSScott Long #endif
14581713e81bSScott Long 
14591713e81bSScott Long 	KdPrint(("Initialize Devices\n"));
14601713e81bSScott Long 	for (channel = 0; channel < MV_SATA_CHANNELS_NUM; channel++) {
1461d2bd3ab9SScott Long 		MV_SATA_CHANNEL *pMvSataChannel = pMvSataAdapter->sataChannel[channel];
14621713e81bSScott Long 		if (pMvSataChannel) {
14631713e81bSScott Long 			init_vdev_params(pAdapter, channel);
14641713e81bSScott Long 			IdeRegisterVDevice(&pAdapter->VDevices[channel].u.disk);
14651713e81bSScott Long 		}
14661713e81bSScott Long 	}
14671713e81bSScott Long #ifdef SUPPORT_ARRAY
14681713e81bSScott Long 	CheckArrayCritical(_VBUS_P0);
14691713e81bSScott Long #endif
14701713e81bSScott Long 	_vbus_p->nInstances = 1;
14711713e81bSScott Long 	fRegisterVdevice(pAdapter);
14721713e81bSScott Long 
14731713e81bSScott Long 	for (channel=0;channel<MV_SATA_CHANNELS_NUM;channel++) {
14741713e81bSScott Long 		pVDev = _vbus_p->pVDevice[channel];
14751713e81bSScott Long 		if (pVDev && pVDev->vf_online)
14761713e81bSScott Long 			fCheckBootable(pVDev);
14771713e81bSScott Long 	}
14781713e81bSScott Long 
14791713e81bSScott Long #if defined(SUPPORT_ARRAY) && defined(_RAID5N_)
14801713e81bSScott Long 	init_raid5_memory(_VBUS_P0);
14811713e81bSScott Long 	_vbus_(r5).enable_write_back = 1;
148264470755SXin LI 	printf("RR18xx: RAID5 write-back %s\n", _vbus_(r5).enable_write_back? "enabled" : "disabled");
14831713e81bSScott Long #endif
14841713e81bSScott Long 
14851713e81bSScott Long 	mvSataUnmaskAdapterInterrupt(pMvSataAdapter);
14861713e81bSScott Long 	return 0;
14871713e81bSScott Long }
14881713e81bSScott Long 
14891713e81bSScott Long int
14901713e81bSScott Long MvSataResetChannel(MV_SATA_ADAPTER *pMvSataAdapter, MV_U8 channel)
14911713e81bSScott Long {
14921713e81bSScott Long 	IAL_ADAPTER_T   *pAdapter = (IAL_ADAPTER_T *)pMvSataAdapter->IALData;
14931713e81bSScott Long 
14941713e81bSScott Long 	mvSataDisableChannelDma(pMvSataAdapter, channel);
14951713e81bSScott Long 	/* Flush pending commands */
14961713e81bSScott Long 	mvSataFlushDmaQueue (pMvSataAdapter, channel, MV_FLUSH_TYPE_CALLBACK);
14971713e81bSScott Long 
14981713e81bSScott Long 	/* Software reset channel */
1499d2bd3ab9SScott Long 	if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channel) == MV_FALSE)
1500d2bd3ab9SScott Long 	{
150164470755SXin LI 		MV_ERROR("RR18xx [%d,%d]: failed to perform Software reset\n",
15021713e81bSScott Long 				 pMvSataAdapter->adapterId, channel);
1503d2bd3ab9SScott Long 		hptmv_free_channel(pAdapter, channel);
15041713e81bSScott Long 		return -1;
15051713e81bSScott Long 	}
15061713e81bSScott Long 
15071713e81bSScott Long 	/* Hardware reset channel */
1508d2bd3ab9SScott Long 	if (mvSataChannelHardReset(pMvSataAdapter, channel)== MV_FALSE)
1509d2bd3ab9SScott Long 	{
151064470755SXin LI 		MV_ERROR("RR18xx [%d,%d] Failed to Hard reser the SATA channel\n",
1511d2bd3ab9SScott Long 				 pMvSataAdapter->adapterId, channel);
15121713e81bSScott Long 		hptmv_free_channel(pAdapter, channel);
15131713e81bSScott Long 		return -1;
15141713e81bSScott Long 	}
15151713e81bSScott Long 
1516d2bd3ab9SScott Long 	if (mvSataIsStorageDeviceConnected(pMvSataAdapter, channel) == MV_FALSE)
1517d2bd3ab9SScott Long 	{
151864470755SXin LI 		 MV_ERROR("RR18xx [%d,%d] Failed to Connect Device\n",
15191713e81bSScott Long 				 pMvSataAdapter->adapterId, channel);
15201713e81bSScott Long 		hptmv_free_channel(pAdapter, channel);
15211713e81bSScott Long 		return -1;
1522d2bd3ab9SScott Long 	}else
1523d2bd3ab9SScott Long 	{
1524d2bd3ab9SScott Long 		MV_ERROR("channel %d: perform recalibrate command", channel);
1525d2bd3ab9SScott Long 		if (!mvStorageDevATAExecuteNonUDMACommand(pMvSataAdapter, channel,
1526d2bd3ab9SScott Long 								MV_NON_UDMA_PROTOCOL_NON_DATA,
1527d2bd3ab9SScott Long 								MV_FALSE,
1528d2bd3ab9SScott Long 								NULL,	 /* pBuffer*/
1529d2bd3ab9SScott Long 								0,		 /* count  */
1530d2bd3ab9SScott Long 								0,		/*features*/
1531d2bd3ab9SScott Long 										/* sectorCount */
1532d2bd3ab9SScott Long 								0,
1533d2bd3ab9SScott Long 								0,	/* lbaLow */
1534d2bd3ab9SScott Long 								0,	/* lbaMid */
1535d2bd3ab9SScott Long 									/* lbaHigh */
1536d2bd3ab9SScott Long 								0,
1537d2bd3ab9SScott Long 								0,		/* device */
1538d2bd3ab9SScott Long 										/* command */
1539d2bd3ab9SScott Long 								0x10))
1540d2bd3ab9SScott Long 			MV_ERROR("channel %d: recalibrate failed", channel);
1541d2bd3ab9SScott Long 
15421713e81bSScott Long 		/* Set transfer mode */
15431713e81bSScott Long 		if((mvStorageDevATASetFeatures(pMvSataAdapter, channel,
1544d2bd3ab9SScott Long 						MV_ATA_SET_FEATURES_TRANSFER,
1545d2bd3ab9SScott Long 						MV_ATA_TRANSFER_PIO_SLOW, 0, 0, 0) == MV_FALSE) ||
15461713e81bSScott Long 			(mvStorageDevATASetFeatures(pMvSataAdapter, channel,
15471713e81bSScott Long 						MV_ATA_SET_FEATURES_TRANSFER,
1548d2bd3ab9SScott Long 						pAdapter->mvChannel[channel].maxPioModeSupported, 0, 0, 0) == MV_FALSE) ||
1549d2bd3ab9SScott Long 			(mvStorageDevATASetFeatures(pMvSataAdapter, channel,
1550d2bd3ab9SScott Long 						MV_ATA_SET_FEATURES_TRANSFER,
1551d2bd3ab9SScott Long 						pAdapter->mvChannel[channel].maxUltraDmaModeSupported, 0, 0, 0) == MV_FALSE) )
1552d2bd3ab9SScott Long 		{
15531713e81bSScott Long 			MV_ERROR("channel %d: Set Features failed", channel);
15541713e81bSScott Long 			hptmv_free_channel(pAdapter, channel);
15551713e81bSScott Long 			return -1;
15561713e81bSScott Long 		}
15571713e81bSScott Long 		/* Enable EDMA */
1558d2bd3ab9SScott Long 		if (mvSataEnableChannelDma(pMvSataAdapter, channel) == MV_FALSE)
1559d2bd3ab9SScott Long 		{
15601713e81bSScott Long 			MV_ERROR("Failed to enable DMA, channel=%d", channel);
15611713e81bSScott Long 			hptmv_free_channel(pAdapter, channel);
15621713e81bSScott Long 			return -1;
15631713e81bSScott Long 		}
15641713e81bSScott Long 	}
15651713e81bSScott Long 	return 0;
15661713e81bSScott Long }
15671713e81bSScott Long 
15681713e81bSScott Long static int
15691713e81bSScott Long fResetActiveCommands(PVBus _vbus_p)
15701713e81bSScott Long {
1571d2bd3ab9SScott Long 	MV_SATA_ADAPTER *pMvSataAdapter = &((IAL_ADAPTER_T *)_vbus_p->OsExt)->mvSataAdapter;
15721713e81bSScott Long 	MV_U8 channel;
15731713e81bSScott Long 	for (channel=0;channel< MV_SATA_CHANNELS_NUM;channel++) {
1574d2bd3ab9SScott Long 		if (pMvSataAdapter->sataChannel[channel] && pMvSataAdapter->sataChannel[channel]->outstandingCommands)
1575d2bd3ab9SScott Long 			MvSataResetChannel(pMvSataAdapter,channel);
15761713e81bSScott Long 	}
15771713e81bSScott Long 	return 0;
15781713e81bSScott Long }
15791713e81bSScott Long 
1580d2bd3ab9SScott Long void fCompleteAllCommandsSynchronously(PVBus _vbus_p)
15811713e81bSScott Long {
15821713e81bSScott Long 	UINT cont;
15831713e81bSScott Long 	ULONG ticks = 0;
15841713e81bSScott Long 	MV_U8 channel;
1585d2bd3ab9SScott Long 	MV_SATA_ADAPTER *pMvSataAdapter = &((IAL_ADAPTER_T *)_vbus_p->OsExt)->mvSataAdapter;
15861713e81bSScott Long 	MV_SATA_CHANNEL *pMvSataChannel;
15871713e81bSScott Long 
15881713e81bSScott Long 	do {
15891713e81bSScott Long check_cmds:
15901713e81bSScott Long 		cont = 0;
15911713e81bSScott Long 		CheckPendingCall(_VBUS_P0);
15921713e81bSScott Long #ifdef _RAID5N_
15931713e81bSScott Long 		dataxfer_poll();
15941713e81bSScott Long 		xor_poll();
15951713e81bSScott Long #endif
15961713e81bSScott Long 		for (channel=0;channel< MV_SATA_CHANNELS_NUM;channel++) {
15971713e81bSScott Long 			pMvSataChannel = pMvSataAdapter->sataChannel[channel];
1598d2bd3ab9SScott Long 			if (pMvSataChannel && pMvSataChannel->outstandingCommands)
1599d2bd3ab9SScott Long 			{
16001713e81bSScott Long 				while (pMvSataChannel->outstandingCommands) {
1601d2bd3ab9SScott Long 					if (!mvSataInterruptServiceRoutine(pMvSataAdapter)) {
16021713e81bSScott Long 						StallExec(1000);
16031713e81bSScott Long 						if (ticks++ > 3000) {
1604d2bd3ab9SScott Long 							MvSataResetChannel(pMvSataAdapter,channel);
16051713e81bSScott Long 							goto check_cmds;
16061713e81bSScott Long 						}
1607d2bd3ab9SScott Long 					}
1608d2bd3ab9SScott Long 					else
16091713e81bSScott Long 						ticks = 0;
16101713e81bSScott Long 				}
16111713e81bSScott Long 				cont = 1;
16121713e81bSScott Long 			}
16131713e81bSScott Long 		}
16141713e81bSScott Long 	} while (cont);
16151713e81bSScott Long }
16161713e81bSScott Long 
16171713e81bSScott Long void
16181713e81bSScott Long fResetVBus(_VBUS_ARG0)
16191713e81bSScott Long {
16207d9aed9cSScott Long 	KdPrint(("fMvResetBus(%p)", _vbus_p));
16211713e81bSScott Long 
16221713e81bSScott Long 	/* some commands may already finished. */
16231713e81bSScott Long 	CheckPendingCall(_VBUS_P0);
16241713e81bSScott Long 
16251713e81bSScott Long 	fResetActiveCommands(_vbus_p);
16261713e81bSScott Long 	/*
16271713e81bSScott Long 	 * the other pending commands may still be finished successfully.
16281713e81bSScott Long 	 */
16291713e81bSScott Long 	fCompleteAllCommandsSynchronously(_vbus_p);
16301713e81bSScott Long 
16311713e81bSScott Long 	/* Now there should be no pending commands. No more action needed. */
16321713e81bSScott Long 	CheckIdleCall(_VBUS_P0);
16331713e81bSScott Long 
16341713e81bSScott Long 	KdPrint(("fMvResetBus() done"));
16351713e81bSScott Long }
16361713e81bSScott Long 
1637d2bd3ab9SScott Long /*No rescan function*/
16381713e81bSScott Long void
16391713e81bSScott Long fRescanAllDevice(_VBUS_ARG0)
16401713e81bSScott Long {
16411713e81bSScott Long }
16421713e81bSScott Long 
16431713e81bSScott Long static MV_BOOLEAN
1644d2bd3ab9SScott Long CommandCompletionCB(MV_SATA_ADAPTER *pMvSataAdapter,
1645d2bd3ab9SScott Long 					MV_U8 channelNum,
1646d2bd3ab9SScott Long 					MV_COMPLETION_TYPE comp_type,
1647d2bd3ab9SScott Long 					MV_VOID_PTR commandId,
1648d2bd3ab9SScott Long 					MV_U16 responseFlags,
1649d2bd3ab9SScott Long 					MV_U32 timeStamp,
1650d2bd3ab9SScott Long 					MV_STORAGE_DEVICE_REGISTERS *registerStruct)
16511713e81bSScott Long {
16521713e81bSScott Long 	PCommand pCmd = (PCommand) commandId;
16531713e81bSScott Long 	_VBUS_INST(pCmd->pVDevice->pVBus)
16541713e81bSScott Long 
16551713e81bSScott Long 	if (pCmd->uScratch.sata_param.prdAddr)
1656d2bd3ab9SScott Long 		FreePRDTable(pMvSataAdapter->IALData,pCmd->uScratch.sata_param.prdAddr);
16571713e81bSScott Long 
1658d2bd3ab9SScott Long 	switch (comp_type)
1659d2bd3ab9SScott Long 	{
16601713e81bSScott Long 	case MV_COMPLETION_TYPE_NORMAL:
16611713e81bSScott Long 		pCmd->Result = RETURN_SUCCESS;
16621713e81bSScott Long 		break;
16631713e81bSScott Long 	case MV_COMPLETION_TYPE_ABORT:
16641713e81bSScott Long 		pCmd->Result = RETURN_BUS_RESET;
16651713e81bSScott Long 		break;
16661713e81bSScott Long 	case MV_COMPLETION_TYPE_ERROR:
1667d2bd3ab9SScott Long 		 MV_ERROR("IAL: COMPLETION ERROR, adapter %d, channel %d, flags=%x\n",
1668d2bd3ab9SScott Long 				 pMvSataAdapter->adapterId, channelNum, responseFlags);
16691713e81bSScott Long 
16701713e81bSScott Long 		if (responseFlags & 4) {
1671d2bd3ab9SScott Long 			MV_ERROR("ATA regs: error %x, sector count %x, LBA low %x, LBA mid %x,"
1672d2bd3ab9SScott Long 				" LBA high %x, device %x, status %x\n",
1673d2bd3ab9SScott Long 				registerStruct->errorRegister,
16741713e81bSScott Long 				registerStruct->sectorCountRegister,
16751713e81bSScott Long 				registerStruct->lbaLowRegister,
16761713e81bSScott Long 				registerStruct->lbaMidRegister,
16771713e81bSScott Long 				registerStruct->lbaHighRegister,
16781713e81bSScott Long 				registerStruct->deviceRegister,
16791713e81bSScott Long 				registerStruct->statusRegister);
16801713e81bSScott Long 		}
1681d2bd3ab9SScott Long 		/*We can't do handleEdmaError directly here, because CommandCompletionCB is called by
1682d2bd3ab9SScott Long 		 * mv's ISR, if we retry the command, than the internel data structure may be destroyed*/
16831713e81bSScott Long 		pCmd->uScratch.sata_param.responseFlags = responseFlags;
1684d2bd3ab9SScott Long 		pCmd->uScratch.sata_param.bIdeStatus = registerStruct->statusRegister;
1685d2bd3ab9SScott Long 		pCmd->uScratch.sata_param.errorRegister = registerStruct->errorRegister;
16861713e81bSScott Long 		pCmd->pVDevice->u.disk.QueueLength--;
16871713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)handleEdmaError,pCmd);
16881713e81bSScott Long 		return TRUE;
16891713e81bSScott Long 
16901713e81bSScott Long 	default:
16911713e81bSScott Long 		MV_ERROR(" Unknown completion type (%d)\n", comp_type);
16921713e81bSScott Long 		return MV_FALSE;
16931713e81bSScott Long 	}
16941713e81bSScott Long 
1695d2bd3ab9SScott Long 	if (pCmd->uCmd.Ide.Command == IDE_COMMAND_VERIFY && pCmd->uScratch.sata_param.cmd_priv > 1) {
16961713e81bSScott Long 		pCmd->uScratch.sata_param.cmd_priv --;
16971713e81bSScott Long 		return TRUE;
16981713e81bSScott Long 	}
16991713e81bSScott Long 	pCmd->pVDevice->u.disk.QueueLength--;
17001713e81bSScott Long 	CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
17011713e81bSScott Long 	return TRUE;
17021713e81bSScott Long }
17031713e81bSScott Long 
17041713e81bSScott Long void
17051713e81bSScott Long fDeviceSendCommand(_VBUS_ARG PCommand pCmd)
17061713e81bSScott Long {
17071713e81bSScott Long 	MV_SATA_EDMA_PRD_ENTRY  *pPRDTable = 0;
17081713e81bSScott Long 	MV_SATA_ADAPTER *pMvSataAdapter;
17091713e81bSScott Long 	MV_SATA_CHANNEL *pMvSataChannel;
1710d2bd3ab9SScott Long 	PVDevice pVDevice = pCmd->pVDevice;
1711d2bd3ab9SScott Long 	PDevice  pDevice = &pVDevice->u.disk;
171264470755SXin LI 	LBA_T    Lba = pCmd->uCmd.Ide.Lba;
1713d2bd3ab9SScott Long 	USHORT   nSector = pCmd->uCmd.Ide.nSectors;
1714d2bd3ab9SScott Long 
17151713e81bSScott Long 	MV_QUEUE_COMMAND_RESULT result;
17161713e81bSScott Long 	MV_QUEUE_COMMAND_INFO commandInfo;
1717d2bd3ab9SScott Long 	MV_UDMA_COMMAND_PARAMS  *pUdmaParams = &commandInfo.commandParams.udmaCommand;
1718d2bd3ab9SScott Long 	MV_NONE_UDMA_COMMAND_PARAMS *pNoUdmaParams = &commandInfo.commandParams.NoneUdmaCommand;
1719d2bd3ab9SScott Long 
172064470755SXin LI 	MV_BOOLEAN is48bit;
17211713e81bSScott Long 	MV_U8      channel;
17221713e81bSScott Long 	int        i=0;
17231713e81bSScott Long 
17241713e81bSScott Long 	DECLARE_BUFFER(FPSCAT_GATH, tmpSg);
17251713e81bSScott Long 
17261713e81bSScott Long 	if (!pDevice->df_on_line) {
17271713e81bSScott Long 		MV_ERROR("Device is offline");
17281713e81bSScott Long 		pCmd->Result = RETURN_BAD_DEVICE;
17291713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
17301713e81bSScott Long 		return;
17311713e81bSScott Long 	}
17321713e81bSScott Long 
17331713e81bSScott Long 	pDevice->HeadPosition = pCmd->uCmd.Ide.Lba + pCmd->uCmd.Ide.nSectors;
17341713e81bSScott Long 	pMvSataChannel = pDevice->mv;
17351713e81bSScott Long 	pMvSataAdapter = pMvSataChannel->mvSataAdapter;
17361713e81bSScott Long 	channel = pMvSataChannel->channelNumber;
17371713e81bSScott Long 
1738d2bd3ab9SScott Long 	/* old RAID0 has hidden lba. Remember to clear dDeHiddenLba when delete array! */
17391713e81bSScott Long 	Lba += pDevice->dDeHiddenLba;
17401713e81bSScott Long 	/* check LBA */
17411713e81bSScott Long 	if (Lba+nSector-1 > pDevice->dDeRealCapacity) {
17421713e81bSScott Long 		pCmd->Result = RETURN_INVALID_REQUEST;
17431713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
17441713e81bSScott Long 		return;
17451713e81bSScott Long 	}
17461713e81bSScott Long 
174764470755SXin LI 	/*
174864470755SXin LI 	 * always use 48bit LBA if drive supports it.
174964470755SXin LI 	 * Some Seagate drives report error if you use a 28-bit command
175064470755SXin LI 	 * to access sector 0xfffffff.
175164470755SXin LI 	 */
175264470755SXin LI 	is48bit = pMvSataChannel->lba48Address;
17531713e81bSScott Long 
1754d2bd3ab9SScott Long 	switch (pCmd->uCmd.Ide.Command)
1755d2bd3ab9SScott Long 	{
17561713e81bSScott Long 	case IDE_COMMAND_READ:
17571713e81bSScott Long 	case IDE_COMMAND_WRITE:
17581713e81bSScott Long 		if (pDevice->bDeModeSetting<8) goto pio;
17591713e81bSScott Long 
17601713e81bSScott Long 		commandInfo.type = MV_QUEUED_COMMAND_TYPE_UDMA;
17611713e81bSScott Long 		pUdmaParams->isEXT = is48bit;
17621713e81bSScott Long 		pUdmaParams->numOfSectors = nSector;
17631713e81bSScott Long 		pUdmaParams->lowLBAAddress = Lba;
17641713e81bSScott Long 		pUdmaParams->highLBAAddress = 0;
17651713e81bSScott Long 		pUdmaParams->prdHighAddr = 0;
17661713e81bSScott Long 		pUdmaParams->callBack = CommandCompletionCB;
17671713e81bSScott Long 		pUdmaParams->commandId = (MV_VOID_PTR )pCmd;
17681713e81bSScott Long 		if(pCmd->uCmd.Ide.Command == IDE_COMMAND_READ)
17691713e81bSScott Long 			pUdmaParams->readWrite = MV_UDMA_TYPE_READ;
17701713e81bSScott Long 		else
17711713e81bSScott Long 			pUdmaParams->readWrite = MV_UDMA_TYPE_WRITE;
17721713e81bSScott Long 
17731713e81bSScott Long 		if (pCmd->pSgTable && pCmd->cf_physical_sg) {
17741713e81bSScott Long 			FPSCAT_GATH sg1=tmpSg, sg2=pCmd->pSgTable;
1775d2bd3ab9SScott Long 			do { *sg1++=*sg2; } while ((sg2++->wSgFlag & SG_FLAG_EOT)==0);
1776d2bd3ab9SScott Long 		}
1777d2bd3ab9SScott Long 		else {
1778d2bd3ab9SScott Long 			if (!pCmd->pfnBuildSgl || !pCmd->pfnBuildSgl(_VBUS_P pCmd, tmpSg, 0)) {
17791713e81bSScott Long pio:
17801713e81bSScott Long 				mvSataDisableChannelDma(pMvSataAdapter, channel);
1781d2bd3ab9SScott Long 				mvSataFlushDmaQueue(pMvSataAdapter, channel, MV_FLUSH_TYPE_CALLBACK);
17821713e81bSScott Long 
17831713e81bSScott Long 				if (pCmd->pSgTable && pCmd->cf_physical_sg==0) {
17841713e81bSScott Long 					FPSCAT_GATH sg1=tmpSg, sg2=pCmd->pSgTable;
1785d2bd3ab9SScott Long 					do { *sg1++=*sg2; } while ((sg2++->wSgFlag & SG_FLAG_EOT)==0);
1786d2bd3ab9SScott Long 				}
1787d2bd3ab9SScott Long 				else {
1788d2bd3ab9SScott Long 					if (!pCmd->pfnBuildSgl || !pCmd->pfnBuildSgl(_VBUS_P pCmd, tmpSg, 1)) {
17891713e81bSScott Long 						pCmd->Result = RETURN_NEED_LOGICAL_SG;
17901713e81bSScott Long 						goto finish_cmd;
17911713e81bSScott Long 					}
1792d2bd3ab9SScott Long 				}
17931713e81bSScott Long 
17941713e81bSScott Long 				do {
1795d2bd3ab9SScott Long 					ULONG size = tmpSg->wSgSize? tmpSg->wSgSize : 0x10000;
17961713e81bSScott Long 					ULONG_PTR addr = tmpSg->dSgAddress;
17971713e81bSScott Long 					if (size & 0x1ff) {
17981713e81bSScott Long 						pCmd->Result = RETURN_INVALID_REQUEST;
17991713e81bSScott Long 						goto finish_cmd;
18001713e81bSScott Long 					}
1801d2bd3ab9SScott Long 					if (mvStorageDevATAExecuteNonUDMACommand(pMvSataAdapter, channel,
1802d2bd3ab9SScott Long 						(pCmd->cf_data_out)?MV_NON_UDMA_PROTOCOL_PIO_DATA_OUT:MV_NON_UDMA_PROTOCOL_PIO_DATA_IN,
1803d2bd3ab9SScott Long 						is48bit,
1804d2bd3ab9SScott Long 						(MV_U16_PTR)addr,
18051713e81bSScott Long 						size >> 1,	/* count       */
18061713e81bSScott Long 						0,		/* features  N/A  */
18071713e81bSScott Long 						(MV_U16)(size>>9),	/*sector count*/
1808d2bd3ab9SScott Long 						(MV_U16)(  (is48bit? (MV_U16)((Lba >> 16) & 0xFF00) : 0 )  | (UCHAR)(Lba & 0xFF) ), /*lbalow*/
18091713e81bSScott Long 						(MV_U16)((Lba >> 8) & 0xFF), /* lbaMid      */
1810d2bd3ab9SScott Long 						(MV_U16)((Lba >> 16) & 0xFF),/* lbaHigh     */
1811d2bd3ab9SScott Long 						(MV_U8)(0x40 | (is48bit ? 0 : (UCHAR)(Lba >> 24) & 0xFF )),/* device      */
1812d2bd3ab9SScott Long 						(MV_U8)(is48bit ? (pCmd->cf_data_in?IDE_COMMAND_READ_EXT:IDE_COMMAND_WRITE_EXT):pCmd->uCmd.Ide.Command)
1813d2bd3ab9SScott Long 					)==MV_FALSE)
1814d2bd3ab9SScott Long 					{
18151713e81bSScott Long 						pCmd->Result = RETURN_IDE_ERROR;
18161713e81bSScott Long 						goto finish_cmd;
18171713e81bSScott Long 					}
18181713e81bSScott Long 					Lba += size>>9;
18191713e81bSScott Long 					if(Lba & 0xF0000000) is48bit = MV_TRUE;
18201713e81bSScott Long 				}
18211713e81bSScott Long 				while ((tmpSg++->wSgFlag & SG_FLAG_EOT)==0);
18221713e81bSScott Long 				pCmd->Result = RETURN_SUCCESS;
18231713e81bSScott Long finish_cmd:
18241713e81bSScott Long 				mvSataEnableChannelDma(pMvSataAdapter,channel);
1825d2bd3ab9SScott Long 				CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
18261713e81bSScott Long 				return;
18271713e81bSScott Long 			}
1828d2bd3ab9SScott Long 		}
18291713e81bSScott Long 
1830d2bd3ab9SScott Long 		pPRDTable = (MV_SATA_EDMA_PRD_ENTRY *) AllocatePRDTable(pMvSataAdapter->IALData);
18317d9aed9cSScott Long 		KdPrint(("pPRDTable:%p\n",pPRDTable));
18321713e81bSScott Long 		if (!pPRDTable) {
18331713e81bSScott Long 			pCmd->Result = RETURN_DEVICE_BUSY;
1834d2bd3ab9SScott Long 			CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
18351713e81bSScott Long 			HPT_ASSERT(0);
18361713e81bSScott Long 			return;
18371713e81bSScott Long 		}
18381713e81bSScott Long 
18391713e81bSScott Long 		do{
1840d2bd3ab9SScott Long 			pPRDTable[i].highBaseAddr = (sizeof(tmpSg->dSgAddress)>4 ? (MV_U32)(tmpSg->dSgAddress>>32) : 0);
18411713e81bSScott Long 			pPRDTable[i].flags = (MV_U16)tmpSg->wSgFlag;
18421713e81bSScott Long 			pPRDTable[i].byteCount = (MV_U16)tmpSg->wSgSize;
18431713e81bSScott Long 			pPRDTable[i].lowBaseAddr = (MV_U32)tmpSg->dSgAddress;
18441713e81bSScott Long 			pPRDTable[i].reserved = 0;
18451713e81bSScott Long 			i++;
18461713e81bSScott Long 		}while((tmpSg++->wSgFlag & SG_FLAG_EOT)==0);
18471713e81bSScott Long 
1848d2bd3ab9SScott Long 		pUdmaParams->prdLowAddr = (ULONG)fOsPhysicalAddress(pPRDTable);
1849d2bd3ab9SScott Long 		if ((pUdmaParams->numOfSectors == 256) && (pMvSataChannel->lba48Address == MV_FALSE)) {
18501713e81bSScott Long 			pUdmaParams->numOfSectors = 0;
18511713e81bSScott Long 		}
18521713e81bSScott Long 
18531713e81bSScott Long 		pCmd->uScratch.sata_param.prdAddr = (PVOID)pPRDTable;
18541713e81bSScott Long 
1855d2bd3ab9SScott Long 		result = mvSataQueueCommand(pMvSataAdapter, channel, &commandInfo);
18561713e81bSScott Long 
1857d2bd3ab9SScott Long 		if (result != MV_QUEUE_COMMAND_RESULT_OK)
1858d2bd3ab9SScott Long 		{
18591713e81bSScott Long queue_failed:
1860d2bd3ab9SScott Long 			switch (result)
1861d2bd3ab9SScott Long 			{
18621713e81bSScott Long 			case MV_QUEUE_COMMAND_RESULT_BAD_LBA_ADDRESS:
1863d2bd3ab9SScott Long 				MV_ERROR("IAL Error: Edma Queue command failed. Bad LBA "
1864d2bd3ab9SScott Long 						 "LBA[31:0](0x%08x)\n", pUdmaParams->lowLBAAddress);
18651713e81bSScott Long 				pCmd->Result = RETURN_IDE_ERROR;
18661713e81bSScott Long 				break;
18671713e81bSScott Long 			case MV_QUEUE_COMMAND_RESULT_QUEUED_MODE_DISABLED:
1868d2bd3ab9SScott Long 				MV_ERROR("IAL Error: Edma Queue command failed. EDMA"
1869d2bd3ab9SScott Long 						 " disabled adapter %d channel %d\n",
18701713e81bSScott Long 						 pMvSataAdapter->adapterId, channel);
18711713e81bSScott Long 				mvSataEnableChannelDma(pMvSataAdapter,channel);
18721713e81bSScott Long 				pCmd->Result = RETURN_IDE_ERROR;
18731713e81bSScott Long 				break;
18741713e81bSScott Long 			case MV_QUEUE_COMMAND_RESULT_FULL:
1875d2bd3ab9SScott Long 				MV_ERROR("IAL Error: Edma Queue command failed. Queue is"
1876d2bd3ab9SScott Long 						 " Full adapter %d channel %d\n",
18771713e81bSScott Long 						 pMvSataAdapter->adapterId, channel);
18781713e81bSScott Long 				pCmd->Result = RETURN_DEVICE_BUSY;
18791713e81bSScott Long 				break;
18801713e81bSScott Long 			case MV_QUEUE_COMMAND_RESULT_BAD_PARAMS:
1881d2bd3ab9SScott Long 				MV_ERROR("IAL Error: Edma Queue command failed. (Bad "
1882d2bd3ab9SScott Long 						 "Params), pMvSataAdapter: %p,  pSataChannel: %p.\n",
1883d2bd3ab9SScott Long 						 pMvSataAdapter, pMvSataAdapter->sataChannel[channel]);
18841713e81bSScott Long 				pCmd->Result = RETURN_IDE_ERROR;
18851713e81bSScott Long 				break;
18861713e81bSScott Long 			default:
1887d2bd3ab9SScott Long 				MV_ERROR("IAL Error: Bad result value (%d) from queue"
1888d2bd3ab9SScott Long 						 " command\n", result);
18891713e81bSScott Long 				pCmd->Result = RETURN_IDE_ERROR;
18901713e81bSScott Long 			}
18911713e81bSScott Long 			if(pPRDTable)
1892d2bd3ab9SScott Long 				FreePRDTable(pMvSataAdapter->IALData,pPRDTable);
1893d2bd3ab9SScott Long 			CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
18941713e81bSScott Long 		}
18951713e81bSScott Long 		pDevice->QueueLength++;
18961713e81bSScott Long 		return;
18971713e81bSScott Long 
18981713e81bSScott Long 	case IDE_COMMAND_VERIFY:
18991713e81bSScott Long 		commandInfo.type = MV_QUEUED_COMMAND_TYPE_NONE_UDMA;
19001713e81bSScott Long 		pNoUdmaParams->bufPtr = NULL;
19011713e81bSScott Long 		pNoUdmaParams->callBack = CommandCompletionCB;
19021713e81bSScott Long 		pNoUdmaParams->commandId = (MV_VOID_PTR)pCmd;
19031713e81bSScott Long 		pNoUdmaParams->count = 0;
19041713e81bSScott Long 		pNoUdmaParams->features = 0;
19051713e81bSScott Long 		pNoUdmaParams->protocolType = MV_NON_UDMA_PROTOCOL_NON_DATA;
19061713e81bSScott Long 
19071713e81bSScott Long 		pCmd->uScratch.sata_param.cmd_priv = 1;
19081713e81bSScott Long 		if (pMvSataChannel->lba48Address == MV_TRUE){
1909d2bd3ab9SScott Long 			pNoUdmaParams->command = MV_ATA_COMMAND_READ_VERIFY_SECTORS_EXT;
19101713e81bSScott Long 			pNoUdmaParams->isEXT = MV_TRUE;
1911d2bd3ab9SScott Long 			pNoUdmaParams->lbaHigh = (MV_U16)((Lba & 0xff0000) >> 16);
19121713e81bSScott Long 			pNoUdmaParams->lbaMid = (MV_U16)((Lba & 0xff00) >> 8);
19131713e81bSScott Long 			pNoUdmaParams->lbaLow =
19141713e81bSScott Long 				(MV_U16)(((Lba & 0xff000000) >> 16)| (Lba & 0xff));
19151713e81bSScott Long 			pNoUdmaParams->sectorCount = nSector;
19161713e81bSScott Long 			pNoUdmaParams->device = 0x40;
1917d2bd3ab9SScott Long 			result = mvSataQueueCommand(pMvSataAdapter, channel, &commandInfo);
19181713e81bSScott Long 			if (result != MV_QUEUE_COMMAND_RESULT_OK){
19191713e81bSScott Long 				goto queue_failed;
19201713e81bSScott Long 			}
19211713e81bSScott Long 			return;
19221713e81bSScott Long 		}
1923d2bd3ab9SScott Long 		else{
19241713e81bSScott Long 			pNoUdmaParams->command = MV_ATA_COMMAND_READ_VERIFY_SECTORS;
19251713e81bSScott Long 			pNoUdmaParams->isEXT = MV_FALSE;
19261713e81bSScott Long 			pNoUdmaParams->lbaHigh = (MV_U16)((Lba & 0xff0000) >> 16);
19271713e81bSScott Long 			pNoUdmaParams->lbaMid = (MV_U16)((Lba & 0xff00) >> 8);
19281713e81bSScott Long 			pNoUdmaParams->lbaLow = (MV_U16)(Lba & 0xff);
19291713e81bSScott Long 			pNoUdmaParams->sectorCount = 0xff & nSector;
19301713e81bSScott Long 			pNoUdmaParams->device = (MV_U8)(0x40 |
19311713e81bSScott Long 				((Lba & 0xf000000) >> 24));
19321713e81bSScott Long 			pNoUdmaParams->callBack = CommandCompletionCB;
1933d2bd3ab9SScott Long 			result = mvSataQueueCommand(pMvSataAdapter, channel, &commandInfo);
1934d2bd3ab9SScott Long 			/*FIXME: how about the commands already queued? but marvel also forgets to consider this*/
19351713e81bSScott Long 			if (result != MV_QUEUE_COMMAND_RESULT_OK){
19361713e81bSScott Long 				goto queue_failed;
19371713e81bSScott Long 			}
1938d2bd3ab9SScott Long 		}
19391713e81bSScott Long 		break;
19401713e81bSScott Long 	default:
19411713e81bSScott Long 		pCmd->Result = RETURN_INVALID_REQUEST;
19421713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd);
19431713e81bSScott Long 		break;
19441713e81bSScott Long 	}
19451713e81bSScott Long }
19461713e81bSScott Long 
19471713e81bSScott Long /**********************************************************
19481713e81bSScott Long  *
19491713e81bSScott Long  *	Probe the hostadapter.
19501713e81bSScott Long  *
19511713e81bSScott Long  **********************************************************/
19521713e81bSScott Long static int
19531713e81bSScott Long hpt_probe(device_t dev)
19541713e81bSScott Long {
19551713e81bSScott Long 	if ((pci_get_vendor(dev) == MV_SATA_VENDOR_ID) &&
19561713e81bSScott Long 		(pci_get_device(dev) == MV_SATA_DEVICE_ID_5081
19571713e81bSScott Long #ifdef FOR_DEMO
19581713e81bSScott Long 		|| pci_get_device(dev) == MV_SATA_DEVICE_ID_5080
19591713e81bSScott Long #endif
1960d2bd3ab9SScott Long 		))
1961d2bd3ab9SScott Long 	{
19621713e81bSScott Long 		KdPrintI((CONTROLLER_NAME " found\n"));
19631713e81bSScott Long 		device_set_desc(dev, CONTROLLER_NAME);
19647634a04bSXin LI 		return (BUS_PROBE_DEFAULT);
19651713e81bSScott Long 	}
19661713e81bSScott Long 	else
19671713e81bSScott Long 		return(ENXIO);
19681713e81bSScott Long }
19691713e81bSScott Long 
19701713e81bSScott Long /***********************************************************
19711713e81bSScott Long  *
19721713e81bSScott Long  *      Auto configuration:  attach and init a host adapter.
19731713e81bSScott Long  *
19741713e81bSScott Long  ***********************************************************/
19751713e81bSScott Long static int
19761713e81bSScott Long hpt_attach(device_t dev)
19771713e81bSScott Long {
1978d2bd3ab9SScott Long 	IAL_ADAPTER_T * pAdapter = device_get_softc(dev);
19791713e81bSScott Long 	int rid;
19801713e81bSScott Long 	union ccb *ccb;
19811713e81bSScott Long 	struct cam_devq *devq;
19821713e81bSScott Long 	struct cam_sim *hpt_vsim;
19831713e81bSScott Long 
198449b3fc40SJohn Baldwin 	device_printf(dev, "%s Version %s \n", DRIVER_NAME, DRIVER_VERSION);
1985d2bd3ab9SScott Long 
19861713e81bSScott Long 	pAdapter->hpt_dev = dev;
19871713e81bSScott Long 
19881713e81bSScott Long 	rid = init_adapter(pAdapter);
19891713e81bSScott Long 	if (rid)
19901713e81bSScott Long 		return rid;
19911713e81bSScott Long 
19921713e81bSScott Long 	rid = 0;
199343cd6160SJustin Hibbits 	if ((pAdapter->hpt_irq = bus_alloc_resource_any(pAdapter->hpt_dev, SYS_RES_IRQ, &rid, RF_SHAREABLE | RF_ACTIVE)) == NULL)
1994d2bd3ab9SScott Long 	{
19951713e81bSScott Long 		hpt_printk(("can't allocate interrupt\n"));
19961713e81bSScott Long 		return(ENXIO);
19971713e81bSScott Long 	}
19981713e81bSScott Long 
199949b3fc40SJohn Baldwin 	if (bus_setup_intr(pAdapter->hpt_dev, pAdapter->hpt_irq,
200049b3fc40SJohn Baldwin 				INTR_TYPE_CAM | INTR_MPSAFE,
200164470755SXin LI 				NULL, hpt_intr, pAdapter, &pAdapter->hpt_intr))
2002d2bd3ab9SScott Long 	{
20031713e81bSScott Long 		hpt_printk(("can't set up interrupt\n"));
20041713e81bSScott Long 		free(pAdapter, M_DEVBUF);
20051713e81bSScott Long 		return(ENXIO);
20061713e81bSScott Long 	}
20071713e81bSScott Long 
2008d2bd3ab9SScott Long 
2009d2bd3ab9SScott Long 	if((ccb = (union ccb *)malloc(sizeof(*ccb), M_DEVBUF, M_WAITOK)) != (union ccb*)NULL)
2010d2bd3ab9SScott Long 	{
2011d2bd3ab9SScott Long 		bzero(ccb, sizeof(*ccb));
20121713e81bSScott Long 		ccb->ccb_h.pinfo.priority = 1;
20131713e81bSScott Long 		ccb->ccb_h.pinfo.index = CAM_UNQUEUED_INDEX;
2014d2bd3ab9SScott Long 	}
2015d2bd3ab9SScott Long 	else
2016d2bd3ab9SScott Long 	{
20171713e81bSScott Long 		return ENOMEM;
20181713e81bSScott Long 	}
20191713e81bSScott Long 	/*
20201713e81bSScott Long 	 * Create the device queue for our SIM(s).
20211713e81bSScott Long 	 */
2022d2bd3ab9SScott Long 	if((devq = cam_simq_alloc(8/*MAX_QUEUE_COMM*/)) == NULL)
2023d2bd3ab9SScott Long 	{
20241713e81bSScott Long 		KdPrint(("ENXIO\n"));
20251713e81bSScott Long 		return ENOMEM;
20261713e81bSScott Long 	}
20271713e81bSScott Long 
20281713e81bSScott Long 	/*
20291713e81bSScott Long 	 * Construct our SIM entry
20301713e81bSScott Long 	 */
203164470755SXin LI 	hpt_vsim = cam_sim_alloc(hpt_action, hpt_poll, __str(PROC_DIR_NAME),
203249b3fc40SJohn Baldwin 			pAdapter, device_get_unit(pAdapter->hpt_dev),
203349b3fc40SJohn Baldwin 			&pAdapter->lock, 1, 8, devq);
203464470755SXin LI 	if (hpt_vsim == NULL) {
20351713e81bSScott Long 		cam_simq_free(devq);
20361713e81bSScott Long 		return ENOMEM;
20371713e81bSScott Long 	}
20381713e81bSScott Long 
203949b3fc40SJohn Baldwin 	mtx_lock(&pAdapter->lock);
2040b50569b7SScott Long 	if (xpt_bus_register(hpt_vsim, dev, 0) != CAM_SUCCESS)
2041d2bd3ab9SScott Long 	{
20421713e81bSScott Long 		cam_sim_free(hpt_vsim, /*free devq*/ TRUE);
204349b3fc40SJohn Baldwin 		mtx_unlock(&pAdapter->lock);
20441713e81bSScott Long 		hpt_vsim = NULL;
20451713e81bSScott Long 		return ENXIO;
20461713e81bSScott Long 	}
20471713e81bSScott Long 
20481713e81bSScott Long 	if(xpt_create_path(&pAdapter->path, /*periph */ NULL,
2049d2bd3ab9SScott Long 			cam_sim_path(hpt_vsim), CAM_TARGET_WILDCARD,
2050d2bd3ab9SScott Long 			CAM_LUN_WILDCARD) != CAM_REQ_CMP)
2051d2bd3ab9SScott Long 	{
20521713e81bSScott Long 		xpt_bus_deregister(cam_sim_path(hpt_vsim));
20531713e81bSScott Long 		cam_sim_free(hpt_vsim, /*free_devq*/TRUE);
205449b3fc40SJohn Baldwin 		mtx_unlock(&pAdapter->lock);
20551713e81bSScott Long 		hpt_vsim = NULL;
20561713e81bSScott Long 		return ENXIO;
20571713e81bSScott Long 	}
205849b3fc40SJohn Baldwin 	mtx_unlock(&pAdapter->lock);
20591713e81bSScott Long 
20601713e81bSScott Long 	xpt_setup_ccb(&(ccb->ccb_h), pAdapter->path, /*priority*/5);
20611713e81bSScott Long 	ccb->ccb_h.func_code = XPT_SASYNC_CB;
20621713e81bSScott Long 	ccb->csa.event_enable = AC_LOST_DEVICE;
20631713e81bSScott Long 	ccb->csa.callback = hpt_async;
20641713e81bSScott Long 	ccb->csa.callback_arg = hpt_vsim;
20651713e81bSScott Long 	xpt_action((union ccb *)ccb);
20661713e81bSScott Long 	free(ccb, M_DEVBUF);
20671713e81bSScott Long 
2068cd3ef666SXin LI 	if (device_get_unit(dev) == 0) {
20698eadd1b2SXin LI 		/* Start the work thread.  XXX */
20706e0e5d36SNate Lawson 		launch_worker_thread();
20716e0e5d36SNate Lawson 	}
20721713e81bSScott Long 
20731713e81bSScott Long 	return 0;
20741713e81bSScott Long }
20751713e81bSScott Long 
20761713e81bSScott Long static int
20771713e81bSScott Long hpt_detach(device_t dev)
20781713e81bSScott Long {
20791713e81bSScott Long 	return (EBUSY);
20801713e81bSScott Long }
20811713e81bSScott Long 
2082d2bd3ab9SScott Long 
20831713e81bSScott Long /***************************************************************
20841713e81bSScott Long  * The poll function is used to simulate the interrupt when
20851713e81bSScott Long  * the interrupt subsystem is not functioning.
20861713e81bSScott Long  *
20871713e81bSScott Long  ***************************************************************/
20881713e81bSScott Long static void
20891713e81bSScott Long hpt_poll(struct cam_sim *sim)
20901713e81bSScott Long {
209149b3fc40SJohn Baldwin 	IAL_ADAPTER_T *pAdapter;
209249b3fc40SJohn Baldwin 
209349b3fc40SJohn Baldwin 	pAdapter = cam_sim_softc(sim);
209449b3fc40SJohn Baldwin 
209549b3fc40SJohn Baldwin 	hpt_intr_locked((void *)cam_sim_softc(sim));
20961713e81bSScott Long }
20971713e81bSScott Long 
20981713e81bSScott Long /****************************************************************
20991713e81bSScott Long  *	Name:	hpt_intr
21001713e81bSScott Long  *	Description:	Interrupt handler.
21011713e81bSScott Long  ****************************************************************/
21021713e81bSScott Long static void
21031713e81bSScott Long hpt_intr(void *arg)
21041713e81bSScott Long {
210549b3fc40SJohn Baldwin 	IAL_ADAPTER_T *pAdapter;
21061713e81bSScott Long 
210749b3fc40SJohn Baldwin 	pAdapter = arg;
210849b3fc40SJohn Baldwin 	mtx_lock(&pAdapter->lock);
210949b3fc40SJohn Baldwin 	hpt_intr_locked(pAdapter);
211049b3fc40SJohn Baldwin 	mtx_unlock(&pAdapter->lock);
211149b3fc40SJohn Baldwin }
211249b3fc40SJohn Baldwin 
211349b3fc40SJohn Baldwin static void
211449b3fc40SJohn Baldwin hpt_intr_locked(IAL_ADAPTER_T *pAdapter)
211549b3fc40SJohn Baldwin {
211649b3fc40SJohn Baldwin 
211749b3fc40SJohn Baldwin 	mtx_assert(&pAdapter->lock, MA_OWNED);
21181713e81bSScott Long 	/* KdPrintI(("----- Entering Isr() -----\n")); */
2119d2bd3ab9SScott Long 	if (mvSataInterruptServiceRoutine(&pAdapter->mvSataAdapter) == MV_TRUE)
2120d2bd3ab9SScott Long 	{
21211713e81bSScott Long 		_VBUS_INST(&pAdapter->VBus)
21221713e81bSScott Long 		CheckPendingCall(_VBUS_P0);
21231713e81bSScott Long 	}
21241713e81bSScott Long 
21251713e81bSScott Long 	/* KdPrintI(("----- Leaving Isr() -----\n")); */
21261713e81bSScott Long }
21271713e81bSScott Long 
21281713e81bSScott Long /**********************************************************
21291713e81bSScott Long  * 			Asynchronous Events
21301713e81bSScott Long  *********************************************************/
21311713e81bSScott Long #if (!defined(UNREFERENCED_PARAMETER))
21321713e81bSScott Long #define UNREFERENCED_PARAMETER(x) (void)(x)
21331713e81bSScott Long #endif
21341713e81bSScott Long 
21351713e81bSScott Long static void
21361713e81bSScott Long hpt_async(void * callback_arg, u_int32_t code, struct cam_path * path,
21371713e81bSScott Long     void * arg)
21381713e81bSScott Long {
21391713e81bSScott Long 	/* debug XXXX */
21401713e81bSScott Long 	panic("Here");
21411713e81bSScott Long 	UNREFERENCED_PARAMETER(callback_arg);
21421713e81bSScott Long 	UNREFERENCED_PARAMETER(code);
21431713e81bSScott Long 	UNREFERENCED_PARAMETER(path);
21441713e81bSScott Long 	UNREFERENCED_PARAMETER(arg);
21451713e81bSScott Long 
21461713e81bSScott Long }
21471713e81bSScott Long 
21481713e81bSScott Long static void
21491713e81bSScott Long FlushAdapter(IAL_ADAPTER_T *pAdapter)
21501713e81bSScott Long {
21511713e81bSScott Long 	int i;
21521713e81bSScott Long 
21531713e81bSScott Long 	hpt_printk(("flush all devices\n"));
21541713e81bSScott Long 
21551713e81bSScott Long 	/* flush all devices */
21561713e81bSScott Long 	for (i=0; i<MAX_VDEVICE_PER_VBUS; i++) {
21571713e81bSScott Long 		PVDevice pVDev = pAdapter->VBus.pVDevice[i];
2158d2bd3ab9SScott Long 		if(pVDev) fFlushVDev(pVDev);
21591713e81bSScott Long 	}
21601713e81bSScott Long }
21611713e81bSScott Long 
21621713e81bSScott Long static int
21631713e81bSScott Long hpt_shutdown(device_t dev)
21641713e81bSScott Long {
21651713e81bSScott Long 		IAL_ADAPTER_T *pAdapter;
21661713e81bSScott Long 
21671713e81bSScott Long 		pAdapter = device_get_softc(dev);
21681713e81bSScott Long 
21691713e81bSScott Long 		EVENTHANDLER_DEREGISTER(shutdown_final, pAdapter->eh);
217049b3fc40SJohn Baldwin 		mtx_lock(&pAdapter->lock);
21711713e81bSScott Long 		FlushAdapter(pAdapter);
217249b3fc40SJohn Baldwin 		mtx_unlock(&pAdapter->lock);
2173d2bd3ab9SScott Long 		  /* give the flush some time to happen,
2174d2bd3ab9SScott Long 		    *otherwise "shutdown -p now" will make file system corrupted */
2175d2bd3ab9SScott Long 		DELAY(1000 * 1000 * 5);
21761713e81bSScott Long 		return 0;
21771713e81bSScott Long }
21781713e81bSScott Long 
21791713e81bSScott Long void
21801713e81bSScott Long Check_Idle_Call(IAL_ADAPTER_T *pAdapter)
21811713e81bSScott Long {
21821713e81bSScott Long 	_VBUS_INST(&pAdapter->VBus)
21831713e81bSScott Long 
21841713e81bSScott Long 	if (mWaitingForIdle(_VBUS_P0)) {
21851713e81bSScott Long 		CheckIdleCall(_VBUS_P0);
21861713e81bSScott Long #ifdef SUPPORT_ARRAY
2187d2bd3ab9SScott Long 		{
2188d2bd3ab9SScott Long 			int i;
21891713e81bSScott Long 			PVDevice pArray;
2190d2bd3ab9SScott Long 			for(i = 0; i < MAX_ARRAY_PER_VBUS; i++){
21911713e81bSScott Long 				if ((pArray=ArrayTables(i))->u.array.dArStamp==0)
21921713e81bSScott Long 					continue;
21931713e81bSScott Long 				else if (pArray->u.array.rf_auto_rebuild) {
21941713e81bSScott Long 						KdPrint(("auto rebuild.\n"));
21951713e81bSScott Long 						pArray->u.array.rf_auto_rebuild = 0;
2196d2bd3ab9SScott Long 						hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapter, pArray, DUPLICATE);
2197d2bd3ab9SScott Long 				}
21981713e81bSScott Long 			}
21991713e81bSScott Long 		}
22001713e81bSScott Long #endif
22011713e81bSScott Long 	}
22021713e81bSScott Long 	/* launch the awaiting commands blocked by mWaitingForIdle */
2203d2bd3ab9SScott Long 	while(pAdapter->pending_Q!= NULL)
2204d2bd3ab9SScott Long 	{
22051713e81bSScott Long 		_VBUS_INST(&pAdapter->VBus)
2206d2bd3ab9SScott Long 		union ccb *ccb = (union ccb *)pAdapter->pending_Q->ccb_h.ccb_ccb_ptr;
22071713e81bSScott Long 		hpt_free_ccb(&pAdapter->pending_Q, ccb);
22081713e81bSScott Long 		CallAfterReturn(_VBUS_P (DPC_PROC)OsSendCommand, ccb);
22091713e81bSScott Long 	}
22101713e81bSScott Long }
22111713e81bSScott Long 
22121713e81bSScott Long static void
22131713e81bSScott Long ccb_done(union ccb *ccb)
22141713e81bSScott Long {
2215d2bd3ab9SScott Long 	PBUS_DMAMAP pmap = (PBUS_DMAMAP)ccb->ccb_adapter;
2216d2bd3ab9SScott Long 	IAL_ADAPTER_T * pAdapter = pmap->pAdapter;
2217d2bd3ab9SScott Long 	KdPrintI(("ccb_done: ccb %p status %x\n", ccb, ccb->ccb_h.status));
22181713e81bSScott Long 
2219d2bd3ab9SScott Long 	dmamap_put(pmap);
22201713e81bSScott Long 	xpt_done(ccb);
22211713e81bSScott Long 
22221713e81bSScott Long 	pAdapter->outstandingCommands--;
22231713e81bSScott Long 
2224d2bd3ab9SScott Long 	if (pAdapter->outstandingCommands == 0)
2225d2bd3ab9SScott Long 	{
22261713e81bSScott Long 		if(DPC_Request_Nums == 0)
22271713e81bSScott Long 			Check_Idle_Call(pAdapter);
222849b3fc40SJohn Baldwin 		wakeup(pAdapter);
22291713e81bSScott Long 	}
22301713e81bSScott Long }
22311713e81bSScott Long 
22321713e81bSScott Long /****************************************************************
22331713e81bSScott Long  *	Name:	hpt_action
22341713e81bSScott Long  *	Description:	Process a queued command from the CAM layer.
22351713e81bSScott Long  *	Parameters:		sim - Pointer to SIM object
22361713e81bSScott Long  *					ccb - Pointer to SCSI command structure.
22371713e81bSScott Long  ****************************************************************/
22381713e81bSScott Long 
22391713e81bSScott Long void
22401713e81bSScott Long hpt_action(struct cam_sim *sim, union ccb *ccb)
22411713e81bSScott Long {
22421713e81bSScott Long 	IAL_ADAPTER_T * pAdapter = (IAL_ADAPTER_T *) cam_sim_softc(sim);
2243d2bd3ab9SScott Long 	PBUS_DMAMAP  pmap;
22441713e81bSScott Long 	_VBUS_INST(&pAdapter->VBus)
22451713e81bSScott Long 
224649b3fc40SJohn Baldwin 	mtx_assert(&pAdapter->lock, MA_OWNED);
2247e1ab829aSScott Long 	CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("hpt_action\n"));
2248d2bd3ab9SScott Long 	KdPrint(("hpt_action(%lx,%lx{%x})\n", (u_long)sim, (u_long)ccb, ccb->ccb_h.func_code));
22491713e81bSScott Long 
2250d2bd3ab9SScott Long 	switch (ccb->ccb_h.func_code)
2251d2bd3ab9SScott Long 	{
22521713e81bSScott Long 		case XPT_SCSI_IO:	/* Execute the requested I/O operation */
2253d2bd3ab9SScott Long 		{
22541713e81bSScott Long 			/* ccb->ccb_h.path_id is not our bus id - don't check it */
22551713e81bSScott Long 
22561713e81bSScott Long 			if (ccb->ccb_h.target_lun)	{
22571713e81bSScott Long 				ccb->ccb_h.status = CAM_LUN_INVALID;
22581713e81bSScott Long 				xpt_done(ccb);
22591713e81bSScott Long 				return;
22601713e81bSScott Long 			}
22611713e81bSScott Long 			if (ccb->ccb_h.target_id >= MAX_VDEVICE_PER_VBUS ||
22621713e81bSScott Long 				pAdapter->VBus.pVDevice[ccb->ccb_h.target_id]==0) {
22631713e81bSScott Long 				ccb->ccb_h.status = CAM_TID_INVALID;
22641713e81bSScott Long 				xpt_done(ccb);
22651713e81bSScott Long 				return;
22661713e81bSScott Long 			}
22671713e81bSScott Long 
22681713e81bSScott Long 			if (pAdapter->outstandingCommands==0 && DPC_Request_Nums==0)
22691713e81bSScott Long 				Check_Idle_Call(pAdapter);
22701713e81bSScott Long 
2271d2bd3ab9SScott Long 			pmap = dmamap_get(pAdapter);
2272d2bd3ab9SScott Long 			HPT_ASSERT(pmap);
2273d2bd3ab9SScott Long 			ccb->ccb_adapter = pmap;
2274d2bd3ab9SScott Long 			memset((void *)pmap->psg, 0,  sizeof(pmap->psg));
2275d2bd3ab9SScott Long 
22761713e81bSScott Long 			if (mWaitingForIdle(_VBUS_P0))
22771713e81bSScott Long 				hpt_queue_ccb(&pAdapter->pending_Q, ccb);
22781713e81bSScott Long 			else
22791713e81bSScott Long 				OsSendCommand(_VBUS_P ccb);
22801713e81bSScott Long 
22811713e81bSScott Long 			/* KdPrint(("leave scsiio\n")); */
22821713e81bSScott Long 			break;
2283d2bd3ab9SScott Long 		}
22841713e81bSScott Long 
22851713e81bSScott Long 		case XPT_RESET_BUS:
22861713e81bSScott Long 			KdPrint(("reset bus\n"));
22871713e81bSScott Long 			fResetVBus(_VBUS_P0);
22881713e81bSScott Long 			xpt_done(ccb);
22891713e81bSScott Long 			break;
22901713e81bSScott Long 
22911713e81bSScott Long 		case XPT_RESET_DEV:	/* Bus Device Reset the specified SCSI device */
22921713e81bSScott Long 		case XPT_EN_LUN:		/* Enable LUN as a target */
22931713e81bSScott Long 		case XPT_TARGET_IO:		/* Execute target I/O request */
22941713e81bSScott Long 		case XPT_ACCEPT_TARGET_IO:	/* Accept Host Target Mode CDB */
22951713e81bSScott Long 		case XPT_CONT_TARGET_IO:	/* Continue Host Target I/O Connection*/
22961713e81bSScott Long 		case XPT_ABORT:			/* Abort the specified CCB */
22971713e81bSScott Long 		case XPT_TERM_IO:		/* Terminate the I/O process */
22981713e81bSScott Long 			/* XXX Implement */
22991713e81bSScott Long 			ccb->ccb_h.status = CAM_REQ_INVALID;
23001713e81bSScott Long 			xpt_done(ccb);
23011713e81bSScott Long 			break;
23021713e81bSScott Long 
23031713e81bSScott Long 		case XPT_GET_TRAN_SETTINGS:
23041713e81bSScott Long 		case XPT_SET_TRAN_SETTINGS:
23051713e81bSScott Long 			/* XXX Implement */
23061713e81bSScott Long 			ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
23071713e81bSScott Long 			xpt_done(ccb);
23081713e81bSScott Long 			break;
23091713e81bSScott Long 
23101713e81bSScott Long 		case XPT_CALC_GEOMETRY:
2311f3b080e6SMarius Strobl 			cam_calc_geometry(&ccb->ccg, 1);
23121713e81bSScott Long 			xpt_done(ccb);
23131713e81bSScott Long 			break;
23141713e81bSScott Long 
23151713e81bSScott Long 		case XPT_PATH_INQ:		/* Path routing inquiry */
23161713e81bSScott Long 		{
23171713e81bSScott Long 			struct ccb_pathinq *cpi = &ccb->cpi;
23181713e81bSScott Long 
23191713e81bSScott Long 			cpi->version_num = 1; /* XXX??? */
23201713e81bSScott Long 			cpi->hba_inquiry = PI_SDTR_ABLE;
23211713e81bSScott Long 			cpi->target_sprt = 0;
23221713e81bSScott Long 			/* Not necessary to reset bus */
23231713e81bSScott Long 			cpi->hba_misc = PIM_NOBUSRESET;
23241713e81bSScott Long 			cpi->hba_eng_cnt = 0;
23251713e81bSScott Long 
23261713e81bSScott Long 			cpi->max_target = MAX_VDEVICE_PER_VBUS;
23271713e81bSScott Long 			cpi->max_lun = 0;
23281713e81bSScott Long 			cpi->initiator_id = MAX_VDEVICE_PER_VBUS;
23291713e81bSScott Long 
23301713e81bSScott Long 			cpi->bus_id = cam_sim_bus(sim);
23311713e81bSScott Long 			cpi->base_transfer_speed = 3300;
2332*4195c7deSAlan Somers 			strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
2333*4195c7deSAlan Somers 			strlcpy(cpi->hba_vid, "HPT   ", HBA_IDLEN);
2334*4195c7deSAlan Somers 			strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
23351713e81bSScott Long 			cpi->unit_number = cam_sim_unit(sim);
23369085ea50SAlexander Motin 			cpi->transport = XPORT_SPI;
23379085ea50SAlexander Motin 			cpi->transport_version = 2;
23389085ea50SAlexander Motin 			cpi->protocol = PROTO_SCSI;
23399085ea50SAlexander Motin 			cpi->protocol_version = SCSI_REV_2;
23401713e81bSScott Long 			cpi->ccb_h.status = CAM_REQ_CMP;
23411713e81bSScott Long 			xpt_done(ccb);
23421713e81bSScott Long 			break;
23431713e81bSScott Long 		}
23441713e81bSScott Long 
23451713e81bSScott Long 		default:
23461713e81bSScott Long 			KdPrint(("invalid cmd\n"));
23471713e81bSScott Long 			ccb->ccb_h.status = CAM_REQ_INVALID;
23481713e81bSScott Long 			xpt_done(ccb);
23491713e81bSScott Long 			break;
23501713e81bSScott Long 	}
23511713e81bSScott Long 	/* KdPrint(("leave hpt_action..............\n")); */
23521713e81bSScott Long }
23531713e81bSScott Long 
23541713e81bSScott Long /* shall be called at lock_driver() */
23551713e81bSScott Long static void
23561713e81bSScott Long hpt_queue_ccb(union ccb **ccb_Q, union ccb *ccb)
23571713e81bSScott Long {
23581713e81bSScott Long 	if(*ccb_Q == NULL)
23591713e81bSScott Long 		ccb->ccb_h.ccb_ccb_ptr = ccb;
23601713e81bSScott Long 	else {
23611713e81bSScott Long 		ccb->ccb_h.ccb_ccb_ptr = (*ccb_Q)->ccb_h.ccb_ccb_ptr;
23621713e81bSScott Long 		(*ccb_Q)->ccb_h.ccb_ccb_ptr = (char *)ccb;
23631713e81bSScott Long 	}
23641713e81bSScott Long 
23651713e81bSScott Long 	*ccb_Q = ccb;
23661713e81bSScott Long }
23671713e81bSScott Long 
23681713e81bSScott Long /* shall be called at lock_driver() */
23691713e81bSScott Long static void
23701713e81bSScott Long hpt_free_ccb(union ccb **ccb_Q, union ccb *ccb)
23711713e81bSScott Long {
23721713e81bSScott Long 	union ccb *TempCCB;
23731713e81bSScott Long 
23741713e81bSScott Long 	TempCCB = *ccb_Q;
23751713e81bSScott Long 
2376d2bd3ab9SScott Long 	if(ccb->ccb_h.ccb_ccb_ptr == ccb) /*it means SCpnt is the last one in CURRCMDs*/
23771713e81bSScott Long 		*ccb_Q = NULL;
23781713e81bSScott Long 	else {
23791713e81bSScott Long 		while(TempCCB->ccb_h.ccb_ccb_ptr != (char *)ccb)
23801713e81bSScott Long 			TempCCB = (union ccb *)TempCCB->ccb_h.ccb_ccb_ptr;
23811713e81bSScott Long 
23821713e81bSScott Long 		TempCCB->ccb_h.ccb_ccb_ptr = ccb->ccb_h.ccb_ccb_ptr;
23831713e81bSScott Long 
23841713e81bSScott Long 		if(*ccb_Q == ccb)
23851713e81bSScott Long 			*ccb_Q = TempCCB;
23861713e81bSScott Long 	}
23871713e81bSScott Long }
23881713e81bSScott Long 
23891713e81bSScott Long #ifdef SUPPORT_ARRAY
23901713e81bSScott Long /***************************************************************************
23911713e81bSScott Long  * Function:     hpt_worker_thread
23921713e81bSScott Long  * Description:  Do background rebuilding. Execute in kernel thread context.
23931713e81bSScott Long  * Returns:      None
23941713e81bSScott Long  ***************************************************************************/
23951713e81bSScott Long static void hpt_worker_thread(void)
23961713e81bSScott Long {
23971713e81bSScott Long 
23981713e81bSScott Long 	for(;;)	{
239949b3fc40SJohn Baldwin 		mtx_lock(&DpcQueue_Lock);
24001713e81bSScott Long 		while (DpcQueue_First!=DpcQueue_Last) {
24011713e81bSScott Long 			ST_HPT_DPC p;
24021713e81bSScott Long 			p = DpcQueue[DpcQueue_First];
24031713e81bSScott Long 			DpcQueue_First++;
24041713e81bSScott Long 			DpcQueue_First %= MAX_DPC;
24051713e81bSScott Long 			DPC_Request_Nums++;
240649b3fc40SJohn Baldwin 			mtx_unlock(&DpcQueue_Lock);
24071713e81bSScott Long 			p.dpc(p.pAdapter, p.arg, p.flags);
24081713e81bSScott Long 
240949b3fc40SJohn Baldwin 			mtx_lock(&p.pAdapter->lock);
241049b3fc40SJohn Baldwin 			mtx_lock(&DpcQueue_Lock);
24111713e81bSScott Long 			DPC_Request_Nums--;
2412d2bd3ab9SScott Long 			/* since we may have prevented Check_Idle_Call, do it here */
24131713e81bSScott Long 			if (DPC_Request_Nums==0) {
24141713e81bSScott Long 				if (p.pAdapter->outstandingCommands == 0) {
24151713e81bSScott Long 					_VBUS_INST(&p.pAdapter->VBus);
24161713e81bSScott Long 					Check_Idle_Call(p.pAdapter);
24171713e81bSScott Long 					CheckPendingCall(_VBUS_P0);
24181713e81bSScott Long 				}
24191713e81bSScott Long 			}
242049b3fc40SJohn Baldwin 			mtx_unlock(&p.pAdapter->lock);
242149b3fc40SJohn Baldwin 			mtx_unlock(&DpcQueue_Lock);
24221713e81bSScott Long 
2423d2bd3ab9SScott Long 			/*Schedule out*/
2424d2bd3ab9SScott Long 			if (SIGISMEMBER(curproc->p_siglist, SIGSTOP)) {
24251713e81bSScott Long 				/* abort rebuilding process. */
2426d2bd3ab9SScott Long 				IAL_ADAPTER_T *pAdapter;
2427d2bd3ab9SScott Long 				PVDevice      pArray;
2428d2bd3ab9SScott Long 				PVBus         _vbus_p;
2429d2bd3ab9SScott Long 				int i;
243049b3fc40SJohn Baldwin 
243149b3fc40SJohn Baldwin 				sx_slock(&hptmv_list_lock);
24321713e81bSScott Long 				pAdapter = gIal_Adapter;
2433d2bd3ab9SScott Long 
24341713e81bSScott Long 				while(pAdapter != 0){
243549b3fc40SJohn Baldwin 					mtx_lock(&pAdapter->lock);
24361713e81bSScott Long 					_vbus_p = &pAdapter->VBus;
2437d2bd3ab9SScott Long 
2438d2bd3ab9SScott Long 					for (i=0;i<MAX_ARRAY_PER_VBUS;i++)
2439d2bd3ab9SScott Long 					{
24401713e81bSScott Long 						if ((pArray=ArrayTables(i))->u.array.dArStamp==0)
24411713e81bSScott Long 							continue;
2442d2bd3ab9SScott Long 						else if (pArray->u.array.rf_rebuilding ||
24431713e81bSScott Long 								pArray->u.array.rf_verifying ||
2444d2bd3ab9SScott Long 								pArray->u.array.rf_initializing)
2445d2bd3ab9SScott Long 							{
24461713e81bSScott Long 								pArray->u.array.rf_abort_rebuild = 1;
24471713e81bSScott Long 							}
24481713e81bSScott Long 					}
244949b3fc40SJohn Baldwin 					mtx_unlock(&pAdapter->lock);
24501713e81bSScott Long 					pAdapter = pAdapter->next;
24511713e81bSScott Long 				}
245249b3fc40SJohn Baldwin 				sx_sunlock(&hptmv_list_lock);
24531713e81bSScott Long 			}
245449b3fc40SJohn Baldwin 			mtx_lock(&DpcQueue_Lock);
2455d2bd3ab9SScott Long 		}
245649b3fc40SJohn Baldwin 		mtx_unlock(&DpcQueue_Lock);
24571713e81bSScott Long 
2458d2bd3ab9SScott Long /*Remove this debug option*/
2459d2bd3ab9SScott Long /*
24601713e81bSScott Long #ifdef DEBUG
24611713e81bSScott Long 		if (SIGISMEMBER(curproc->p_siglist, SIGSTOP))
24624d70511aSJohn Baldwin 			pause("hptrdy", 2*hz);
24631713e81bSScott Long #endif
2464d2bd3ab9SScott Long */
24653745c395SJulian Elischer 		kproc_suspend_check(curproc);
246649b3fc40SJohn Baldwin 		pause("-", 2*hz);  /* wait for something to do */
24671713e81bSScott Long 	}
24681713e81bSScott Long }
24691713e81bSScott Long 
24701713e81bSScott Long static struct proc *hptdaemonproc;
24711713e81bSScott Long static struct kproc_desc hpt_kp = {
24721713e81bSScott Long 	"hpt_wt",
24731713e81bSScott Long 	hpt_worker_thread,
24741713e81bSScott Long 	&hptdaemonproc
24751713e81bSScott Long };
24761713e81bSScott Long 
2477d2bd3ab9SScott Long /*Start this thread in the hpt_attach, to prevent kernel from loading it without our controller.*/
24781713e81bSScott Long static void
24791713e81bSScott Long launch_worker_thread(void)
24801713e81bSScott Long {
24811713e81bSScott Long 	IAL_ADAPTER_T *pAdapTemp;
24821713e81bSScott Long 
24831713e81bSScott Long 	kproc_start(&hpt_kp);
24841713e81bSScott Long 
248549b3fc40SJohn Baldwin 	sx_slock(&hptmv_list_lock);
24861713e81bSScott Long 	for (pAdapTemp = gIal_Adapter; pAdapTemp; pAdapTemp = pAdapTemp->next) {
24871713e81bSScott Long 
24881713e81bSScott Long 		_VBUS_INST(&pAdapTemp->VBus)
24891713e81bSScott Long 		int i;
24901713e81bSScott Long 		PVDevice pVDev;
24911713e81bSScott Long 
24921713e81bSScott Long 		for(i = 0; i < MAX_ARRAY_PER_VBUS; i++)
24931713e81bSScott Long 			if ((pVDev=ArrayTables(i))->u.array.dArStamp==0)
24941713e81bSScott Long 				continue;
2495d2bd3ab9SScott Long 			else{
2496d2bd3ab9SScott Long 				if (pVDev->u.array.rf_need_rebuild && !pVDev->u.array.rf_rebuilding)
2497d2bd3ab9SScott Long 					hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, pAdapTemp, pVDev,
2498d2bd3ab9SScott Long 					(UCHAR)((pVDev->u.array.CriticalMembers || pVDev->VDeviceType == VD_RAID_1)? DUPLICATE : REBUILD_PARITY));
24991713e81bSScott Long 			}
25001713e81bSScott Long 	}
250149b3fc40SJohn Baldwin 	sx_sunlock(&hptmv_list_lock);
25021713e81bSScott Long 
25031713e81bSScott Long 	/*
2504d2bd3ab9SScott Long 	 * hpt_worker_thread needs to be suspended after shutdown sync, when fs sync finished.
25051713e81bSScott Long 	 */
2506c33c9789SAlexander Motin 	EVENTHANDLER_REGISTER(shutdown_post_sync, kproc_shutdown, hptdaemonproc,
2507c33c9789SAlexander Motin 	    SHUTDOWN_PRI_LAST);
25081713e81bSScott Long }
2509d2bd3ab9SScott Long /*
2510d2bd3ab9SScott Long  *SYSINIT(hptwt, SI_SUB_KTHREAD_IDLE, SI_ORDER_FIRST, launch_worker_thread, NULL);
2511d2bd3ab9SScott Long */
25121713e81bSScott Long 
2513d2bd3ab9SScott Long #endif
25141713e81bSScott Long 
25151713e81bSScott Long /********************************************************************************/
25161713e81bSScott Long 
2517d2bd3ab9SScott Long int HPTLIBAPI fOsBuildSgl(_VBUS_ARG PCommand pCmd, FPSCAT_GATH pSg, int logical)
25181713e81bSScott Long {
25197634a04bSXin LI 	union ccb *ccb = (union ccb *)pCmd->pOrgCommand;
25201713e81bSScott Long 
25217634a04bSXin LI 	if (logical) {
25227634a04bSXin LI 		pSg->dSgAddress = (ULONG_PTR)(UCHAR *)ccb->csio.data_ptr;
25237634a04bSXin LI 		pSg->wSgSize = ccb->csio.dxfer_len;
25247634a04bSXin LI 		pSg->wSgFlag = SG_FLAG_EOT;
25257634a04bSXin LI 		return TRUE;
25267634a04bSXin LI 	}
2527d2bd3ab9SScott Long 	/* since we have provided physical sg, nobody will ask us to build physical sg */
2528d2bd3ab9SScott Long 	HPT_ASSERT(0);
25291713e81bSScott Long 	return FALSE;
25301713e81bSScott Long }
25311713e81bSScott Long 
25321713e81bSScott Long /*******************************************************************************/
25331713e81bSScott Long ULONG HPTLIBAPI
25341713e81bSScott Long GetStamp(void)
25351713e81bSScott Long {
25361713e81bSScott Long 	/*
25371713e81bSScott Long 	 * the system variable, ticks, can't be used since it hasn't yet been active
25381713e81bSScott Long 	 * when our driver starts (ticks==0, it's a invalid stamp value)
25391713e81bSScott Long 	 */
2540d2bd3ab9SScott Long 	ULONG stamp;
2541d2bd3ab9SScott Long 	do { stamp = random(); } while (stamp==0);
25421713e81bSScott Long 	return stamp;
25431713e81bSScott Long }
25441713e81bSScott Long 
25451713e81bSScott Long 
25461713e81bSScott Long static void
25471713e81bSScott Long SetInquiryData(PINQUIRYDATA inquiryData, PVDevice pVDev)
25481713e81bSScott Long {
25491713e81bSScott Long 	int i;
2550d2bd3ab9SScott Long 	IDENTIFY_DATA2 *pIdentify = (IDENTIFY_DATA2*)pVDev->u.disk.mv->identifyDevice;
25511713e81bSScott Long 
25521713e81bSScott Long 	inquiryData->DeviceType = T_DIRECT; /*DIRECT_ACCESS_DEVICE*/
25531713e81bSScott Long 	inquiryData->AdditionalLength = (UCHAR)(sizeof(INQUIRYDATA) - 5);
25541713e81bSScott Long #ifndef SERIAL_CMDS
25551713e81bSScott Long 	inquiryData->CommandQueue = 1;
25561713e81bSScott Long #endif
25571713e81bSScott Long 
25581713e81bSScott Long 	switch(pVDev->VDeviceType) {
25591713e81bSScott Long 	case VD_SINGLE_DISK:
25601713e81bSScott Long 	case VD_ATAPI:
25611713e81bSScott Long 	case VD_REMOVABLE:
25621713e81bSScott Long 		/* Set the removable bit, if applicable. */
2563d2bd3ab9SScott Long 		if ((pVDev->u.disk.df_removable_drive) || (pIdentify->GeneralConfiguration & 0x80))
25641713e81bSScott Long 			inquiryData->RemovableMedia = 1;
25651713e81bSScott Long 
25661713e81bSScott Long 		/* Fill in vendor identification fields. */
2567d2bd3ab9SScott Long 		for (i = 0; i < 20; i += 2) {
2568d2bd3ab9SScott Long 			inquiryData->VendorId[i] 	= ((PUCHAR)pIdentify->ModelNumber)[i + 1];
2569d2bd3ab9SScott Long 			inquiryData->VendorId[i+1] 	= ((PUCHAR)pIdentify->ModelNumber)[i];
25701713e81bSScott Long 
25711713e81bSScott Long 		}
25721713e81bSScott Long 
25731713e81bSScott Long 		/* Initialize unused portion of product id. */
25741713e81bSScott Long 		for (i = 0; i < 4; i++) inquiryData->ProductId[12+i] = ' ';
25751713e81bSScott Long 
25761713e81bSScott Long 		/* firmware revision */
2577d2bd3ab9SScott Long 		for (i = 0; i < 4; i += 2)
2578d2bd3ab9SScott Long 		{
2579d2bd3ab9SScott Long 			inquiryData->ProductRevisionLevel[i] 	= ((PUCHAR)pIdentify->FirmwareRevision)[i+1];
2580d2bd3ab9SScott Long 			inquiryData->ProductRevisionLevel[i+1] 	= ((PUCHAR)pIdentify->FirmwareRevision)[i];
25811713e81bSScott Long 		}
25821713e81bSScott Long 		break;
25831713e81bSScott Long 	default:
258464470755SXin LI 		memcpy(&inquiryData->VendorId, "RR18xx  ", 8);
25851713e81bSScott Long #ifdef SUPPORT_ARRAY
25861713e81bSScott Long 		switch(pVDev->VDeviceType){
25871713e81bSScott Long 		case VD_RAID_0:
2588d2bd3ab9SScott Long 			if ((pVDev->u.array.pMember[0] && mIsArray(pVDev->u.array.pMember[0])) ||
2589d2bd3ab9SScott Long 				(pVDev->u.array.pMember[1] && mIsArray(pVDev->u.array.pMember[1])))
2590d2bd3ab9SScott Long 				memcpy(&inquiryData->ProductId, "RAID 1/0 Array  ", 16);
25911713e81bSScott Long 			else
2592d2bd3ab9SScott Long 				memcpy(&inquiryData->ProductId, "RAID 0 Array    ", 16);
25931713e81bSScott Long 			break;
25941713e81bSScott Long 		case VD_RAID_1:
2595d2bd3ab9SScott Long 			if ((pVDev->u.array.pMember[0] && mIsArray(pVDev->u.array.pMember[0])) ||
2596d2bd3ab9SScott Long 				(pVDev->u.array.pMember[1] && mIsArray(pVDev->u.array.pMember[1])))
2597d2bd3ab9SScott Long 				memcpy(&inquiryData->ProductId, "RAID 0/1 Array  ", 16);
25981713e81bSScott Long 			else
2599d2bd3ab9SScott Long 				memcpy(&inquiryData->ProductId, "RAID 1 Array    ", 16);
26001713e81bSScott Long 			break;
26011713e81bSScott Long 		case VD_RAID_5:
26021713e81bSScott Long 			memcpy(&inquiryData->ProductId, "RAID 5 Array    ", 16);
26031713e81bSScott Long 			break;
26041713e81bSScott Long 		case VD_JBOD:
26051713e81bSScott Long 			memcpy(&inquiryData->ProductId, "JBOD Array      ", 16);
26061713e81bSScott Long 			break;
26071713e81bSScott Long 		}
26081713e81bSScott Long #endif
26091713e81bSScott Long 		memcpy(&inquiryData->ProductRevisionLevel, "3.00", 4);
26101713e81bSScott Long 		break;
26111713e81bSScott Long 	}
26121713e81bSScott Long }
26131713e81bSScott Long 
26141713e81bSScott Long static void
26151713e81bSScott Long hpt_timeout(void *arg)
26161713e81bSScott Long {
261749b3fc40SJohn Baldwin 	PBUS_DMAMAP pmap = (PBUS_DMAMAP)((union ccb *)arg)->ccb_adapter;
261849b3fc40SJohn Baldwin 	IAL_ADAPTER_T *pAdapter = pmap->pAdapter;
261949b3fc40SJohn Baldwin 	_VBUS_INST(&pAdapter->VBus)
262049b3fc40SJohn Baldwin 
262149b3fc40SJohn Baldwin 	mtx_assert(&pAdapter->lock, MA_OWNED);
26221713e81bSScott Long 	fResetVBus(_VBUS_P0);
26231713e81bSScott Long }
26241713e81bSScott Long 
2625d2bd3ab9SScott Long static void
2626d2bd3ab9SScott Long hpt_io_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
2627d2bd3ab9SScott Long {
2628d2bd3ab9SScott Long 	PCommand pCmd = (PCommand)arg;
2629d2bd3ab9SScott Long 	union ccb *ccb = pCmd->pOrgCommand;
2630d2bd3ab9SScott Long 	struct ccb_hdr *ccb_h = &ccb->ccb_h;
2631d2bd3ab9SScott Long 	PBUS_DMAMAP pmap = (PBUS_DMAMAP) ccb->ccb_adapter;
2632d2bd3ab9SScott Long 	IAL_ADAPTER_T *pAdapter = pmap->pAdapter;
2633d2bd3ab9SScott Long 	PVDevice	pVDev = pAdapter->VBus.pVDevice[ccb_h->target_id];
2634d2bd3ab9SScott Long 	FPSCAT_GATH psg = pCmd->pSgTable;
2635d2bd3ab9SScott Long 	int idx;
2636d2bd3ab9SScott Long 	_VBUS_INST(pVDev->pVBus)
2637d2bd3ab9SScott Long 
2638d2bd3ab9SScott Long 	HPT_ASSERT(pCmd->cf_physical_sg);
2639d2bd3ab9SScott Long 
2640dd0b4fb6SKonstantin Belousov 	if (error)
2641d2bd3ab9SScott Long 		panic("busdma error");
2642d2bd3ab9SScott Long 
2643d2bd3ab9SScott Long 	HPT_ASSERT(nsegs<= MAX_SG_DESCRIPTORS);
2644d2bd3ab9SScott Long 
2645dd0b4fb6SKonstantin Belousov 	if (nsegs != 0) {
2646d2bd3ab9SScott Long 		for (idx = 0; idx < nsegs; idx++, psg++) {
2647d2bd3ab9SScott Long 			psg->dSgAddress = (ULONG_PTR)(UCHAR *)segs[idx].ds_addr;
2648d2bd3ab9SScott Long 			psg->wSgSize = segs[idx].ds_len;
2649d2bd3ab9SScott Long 			psg->wSgFlag = (idx == nsegs-1)? SG_FLAG_EOT: 0;
2650d2bd3ab9SScott Long 	/*		KdPrint(("psg[%d]:add=%p,size=%x,flag=%x\n", idx, psg->dSgAddress,psg->wSgSize,psg->wSgFlag)); */
2651d2bd3ab9SScott Long 		}
2652d2bd3ab9SScott Long 		/*	psg[-1].wSgFlag = SG_FLAG_EOT; */
2653d2bd3ab9SScott Long 
2654d2bd3ab9SScott Long 		if (pCmd->cf_data_in) {
2655dd0b4fb6SKonstantin Belousov 			bus_dmamap_sync(pAdapter->io_dma_parent, pmap->dma_map,
2656dd0b4fb6SKonstantin Belousov 			    BUS_DMASYNC_PREREAD);
2657d2bd3ab9SScott Long 		}
2658d2bd3ab9SScott Long 		else if (pCmd->cf_data_out) {
2659dd0b4fb6SKonstantin Belousov 			bus_dmamap_sync(pAdapter->io_dma_parent, pmap->dma_map,
2660dd0b4fb6SKonstantin Belousov 			    BUS_DMASYNC_PREWRITE);
2661dd0b4fb6SKonstantin Belousov 		}
2662d2bd3ab9SScott Long 	}
2663d2bd3ab9SScott Long 
266449b3fc40SJohn Baldwin 	callout_reset(&pmap->timeout, 20 * hz, hpt_timeout, ccb);
2665d2bd3ab9SScott Long 	pVDev->pfnSendCommand(_VBUS_P pCmd);
2666d2bd3ab9SScott Long 	CheckPendingCall(_VBUS_P0);
2667d2bd3ab9SScott Long }
2668d2bd3ab9SScott Long 
2669d2bd3ab9SScott Long 
2670d2bd3ab9SScott Long 
26711713e81bSScott Long static void HPTLIBAPI
26721713e81bSScott Long OsSendCommand(_VBUS_ARG union ccb *ccb)
26731713e81bSScott Long {
2674d2bd3ab9SScott Long 	PBUS_DMAMAP pmap = (PBUS_DMAMAP)ccb->ccb_adapter;
2675d2bd3ab9SScott Long 	IAL_ADAPTER_T *pAdapter = pmap->pAdapter;
2676d2bd3ab9SScott Long 	struct ccb_hdr *ccb_h = &ccb->ccb_h;
2677d2bd3ab9SScott Long 	struct ccb_scsiio *csio = &ccb->csio;
2678d2bd3ab9SScott Long 	PVDevice	pVDev = pAdapter->VBus.pVDevice[ccb_h->target_id];
26791713e81bSScott Long 
26807d9aed9cSScott Long 	KdPrintI(("OsSendCommand: ccb %p  cdb %x-%x-%x\n",
26811713e81bSScott Long 		ccb,
26821713e81bSScott Long 		*(ULONG *)&ccb->csio.cdb_io.cdb_bytes[0],
26831713e81bSScott Long 		*(ULONG *)&ccb->csio.cdb_io.cdb_bytes[4],
26841713e81bSScott Long 		*(ULONG *)&ccb->csio.cdb_io.cdb_bytes[8]
26851713e81bSScott Long 	));
26861713e81bSScott Long 
26871713e81bSScott Long 	pAdapter->outstandingCommands++;
26881713e81bSScott Long 
26891713e81bSScott Long 	if (pVDev == NULL || pVDev->vf_online == 0) {
26901713e81bSScott Long 		ccb->ccb_h.status = CAM_REQ_INVALID;
26911713e81bSScott Long 		ccb_done(ccb);
26921713e81bSScott Long 		goto Command_Complished;
26931713e81bSScott Long 	}
26941713e81bSScott Long 
26951713e81bSScott Long 	switch(ccb->csio.cdb_io.cdb_bytes[0])
26961713e81bSScott Long 	{
26971713e81bSScott Long 		case TEST_UNIT_READY:
26981713e81bSScott Long 		case START_STOP_UNIT:
26991713e81bSScott Long 		case SYNCHRONIZE_CACHE:
27001713e81bSScott Long 			/* FALLTHROUGH */
27011713e81bSScott Long 			ccb->ccb_h.status = CAM_REQ_CMP;
27021713e81bSScott Long 			break;
27031713e81bSScott Long 
27041713e81bSScott Long 		case INQUIRY:
27051713e81bSScott Long 			ZeroMemory(ccb->csio.data_ptr, ccb->csio.dxfer_len);
27061713e81bSScott Long 			SetInquiryData((PINQUIRYDATA)ccb->csio.data_ptr, pVDev);
27071713e81bSScott Long 			ccb_h->status = CAM_REQ_CMP;
27081713e81bSScott Long 			break;
27091713e81bSScott Long 
27101713e81bSScott Long 		case READ_CAPACITY:
27111713e81bSScott Long 		{
271264470755SXin LI 			UCHAR *rbuf=csio->data_ptr;
271364470755SXin LI 			unsigned int cap;
271464470755SXin LI 
271564470755SXin LI 			if (pVDev->VDeviceCapacity > 0xfffffffful) {
271664470755SXin LI 				cap = 0xfffffffful;
271764470755SXin LI 			} else {
271864470755SXin LI 				cap = pVDev->VDeviceCapacity - 1;
271964470755SXin LI 			}
272064470755SXin LI 
272164470755SXin LI 			rbuf[0] = (UCHAR)(cap>>24);
272264470755SXin LI 			rbuf[1] = (UCHAR)(cap>>16);
272364470755SXin LI 			rbuf[2] = (UCHAR)(cap>>8);
272464470755SXin LI 			rbuf[3] = (UCHAR)cap;
27251713e81bSScott Long 			/* Claim 512 byte blocks (big-endian). */
272664470755SXin LI 			rbuf[4] = 0;
272764470755SXin LI 			rbuf[5] = 0;
272864470755SXin LI 			rbuf[6] = 2;
272964470755SXin LI 			rbuf[7] = 0;
273064470755SXin LI 
273164470755SXin LI 			ccb_h->status = CAM_REQ_CMP;
273264470755SXin LI 			break;
273364470755SXin LI 		}
273464470755SXin LI 
273564470755SXin LI 		case 0x9e: /*SERVICE_ACTION_IN*/
273664470755SXin LI 		{
273764470755SXin LI 			UCHAR *rbuf = csio->data_ptr;
273864470755SXin LI 			LBA_T cap = pVDev->VDeviceCapacity - 1;
273964470755SXin LI 
274064470755SXin LI 			rbuf[0] = (UCHAR)(cap>>56);
274164470755SXin LI 			rbuf[1] = (UCHAR)(cap>>48);
274264470755SXin LI 			rbuf[2] = (UCHAR)(cap>>40);
274364470755SXin LI 			rbuf[3] = (UCHAR)(cap>>32);
274464470755SXin LI 			rbuf[4] = (UCHAR)(cap>>24);
274564470755SXin LI 			rbuf[5] = (UCHAR)(cap>>16);
274664470755SXin LI 			rbuf[6] = (UCHAR)(cap>>8);
274764470755SXin LI 			rbuf[7] = (UCHAR)cap;
274864470755SXin LI 			rbuf[8] = 0;
274964470755SXin LI 			rbuf[9] = 0;
275064470755SXin LI 			rbuf[10] = 2;
275164470755SXin LI 			rbuf[11] = 0;
275264470755SXin LI 
27531713e81bSScott Long 			ccb_h->status = CAM_REQ_CMP;
27541713e81bSScott Long 			break;
27551713e81bSScott Long 		}
27561713e81bSScott Long 
27571713e81bSScott Long 		case READ_6:
27581713e81bSScott Long 		case WRITE_6:
27591713e81bSScott Long 		case READ_10:
27601713e81bSScott Long 		case WRITE_10:
276164470755SXin LI 		case 0x88: /* READ_16 */
276264470755SXin LI 		case 0x8a: /* WRITE_16 */
27631713e81bSScott Long 		case 0x13:
27641713e81bSScott Long 		case 0x2f:
27651713e81bSScott Long 		{
27661713e81bSScott Long 			UCHAR Cdb[16];
27671713e81bSScott Long 			UCHAR CdbLength;
27681713e81bSScott Long 			_VBUS_INST(pVDev->pVBus)
2769d2bd3ab9SScott Long 			PCommand pCmd = AllocateCommand(_VBUS_P0);
2770dd0b4fb6SKonstantin Belousov 			int error;
27711713e81bSScott Long 			HPT_ASSERT(pCmd);
27721713e81bSScott Long 
27731713e81bSScott Long 			CdbLength = csio->cdb_len;
2774d2bd3ab9SScott Long 			if ((ccb->ccb_h.flags & CAM_CDB_POINTER) != 0)
2775d2bd3ab9SScott Long 			{
2776d2bd3ab9SScott Long 				if ((ccb->ccb_h.flags & CAM_CDB_PHYS) == 0)
2777d2bd3ab9SScott Long 				{
27781713e81bSScott Long 					bcopy(csio->cdb_io.cdb_ptr, Cdb, CdbLength);
2779d2bd3ab9SScott Long 				}
2780d2bd3ab9SScott Long 				else
2781d2bd3ab9SScott Long 				{
27821713e81bSScott Long 					KdPrintE(("ERROR!!!\n"));
27831713e81bSScott Long 					ccb->ccb_h.status = CAM_REQ_INVALID;
27841713e81bSScott Long 					break;
27851713e81bSScott Long 				}
2786d2bd3ab9SScott Long 			}
2787d2bd3ab9SScott Long 			else
2788d2bd3ab9SScott Long 			{
27891713e81bSScott Long 				bcopy(csio->cdb_io.cdb_bytes, Cdb, CdbLength);
27901713e81bSScott Long 			}
27911713e81bSScott Long 
2792d2bd3ab9SScott Long 			pCmd->pOrgCommand = ccb;
27931713e81bSScott Long 			pCmd->pVDevice = pVDev;
27941713e81bSScott Long 			pCmd->pfnCompletion = fOsCommandDone;
27951713e81bSScott Long 			pCmd->pfnBuildSgl = fOsBuildSgl;
2796d2bd3ab9SScott Long 			pCmd->pSgTable = pmap->psg;
27971713e81bSScott Long 
2798d2bd3ab9SScott Long 			switch (Cdb[0])
2799d2bd3ab9SScott Long 			{
28001713e81bSScott Long 				case READ_6:
28011713e81bSScott Long 				case WRITE_6:
28021713e81bSScott Long 				case 0x13:
2803d2bd3ab9SScott Long 					pCmd->uCmd.Ide.Lba =  ((ULONG)Cdb[1] << 16) | ((ULONG)Cdb[2] << 8) | (ULONG)Cdb[3];
28041713e81bSScott Long 					pCmd->uCmd.Ide.nSectors = (USHORT) Cdb[4];
28051713e81bSScott Long 					break;
2806d2bd3ab9SScott Long 
280764470755SXin LI 				case 0x88: /* READ_16 */
280864470755SXin LI 				case 0x8a: /* WRITE_16 */
280964470755SXin LI 					pCmd->uCmd.Ide.Lba =
281064470755SXin LI 						(HPT_U64)Cdb[2] << 56 |
281164470755SXin LI 						(HPT_U64)Cdb[3] << 48 |
281264470755SXin LI 						(HPT_U64)Cdb[4] << 40 |
281364470755SXin LI 						(HPT_U64)Cdb[5] << 32 |
281464470755SXin LI 						(HPT_U64)Cdb[6] << 24 |
281564470755SXin LI 						(HPT_U64)Cdb[7] << 16 |
281664470755SXin LI 						(HPT_U64)Cdb[8] << 8 |
281764470755SXin LI 						(HPT_U64)Cdb[9];
281864470755SXin LI 					pCmd->uCmd.Ide.nSectors = (USHORT)Cdb[12] << 8 | (USHORT)Cdb[13];
281964470755SXin LI 					break;
282064470755SXin LI 
28211713e81bSScott Long 				default:
2822d2bd3ab9SScott Long 					pCmd->uCmd.Ide.Lba = (ULONG)Cdb[5] | ((ULONG)Cdb[4] << 8) | ((ULONG)Cdb[3] << 16) | ((ULONG)Cdb[2] << 24);
2823d2bd3ab9SScott Long 					pCmd->uCmd.Ide.nSectors = (USHORT) Cdb[8] | ((USHORT)Cdb[7]<<8);
28241713e81bSScott Long 					break;
28251713e81bSScott Long 			}
28261713e81bSScott Long 
2827d2bd3ab9SScott Long 			switch (Cdb[0])
2828d2bd3ab9SScott Long 			{
28291713e81bSScott Long 				case READ_6:
28301713e81bSScott Long 				case READ_10:
283164470755SXin LI 				case 0x88: /* READ_16 */
28321713e81bSScott Long 					pCmd->uCmd.Ide.Command = IDE_COMMAND_READ;
28331713e81bSScott Long 					pCmd->cf_data_in = 1;
28341713e81bSScott Long 					break;
28351713e81bSScott Long 
28361713e81bSScott Long 				case WRITE_6:
28371713e81bSScott Long 				case WRITE_10:
283864470755SXin LI 				case 0x8a: /* WRITE_16 */
28391713e81bSScott Long 					pCmd->uCmd.Ide.Command = IDE_COMMAND_WRITE;
28401713e81bSScott Long 					pCmd->cf_data_out = 1;
28411713e81bSScott Long 					break;
28421713e81bSScott Long 				case 0x13:
28431713e81bSScott Long 				case 0x2f:
28441713e81bSScott Long 					pCmd->uCmd.Ide.Command = IDE_COMMAND_VERIFY;
28451713e81bSScott Long 					break;
28461713e81bSScott Long 			}
2847d2bd3ab9SScott Long /*///////////////////////// */
2848d2bd3ab9SScott Long 			pCmd->cf_physical_sg = 1;
2849dd0b4fb6SKonstantin Belousov 			error = bus_dmamap_load_ccb(pAdapter->io_dma_parent,
2850d2bd3ab9SScott Long 						    pmap->dma_map,
2851dd0b4fb6SKonstantin Belousov 						    ccb,
2852dd0b4fb6SKonstantin Belousov 						    hpt_io_dmamap_callback,
2853dd0b4fb6SKonstantin Belousov 						    pCmd, BUS_DMA_WAITOK
2854d2bd3ab9SScott Long 						    );
2855d2bd3ab9SScott Long 			KdPrint(("bus_dmamap_load return %d\n", error));
2856d2bd3ab9SScott Long 			if (error && error!=EINPROGRESS) {
2857d2bd3ab9SScott Long 				hpt_printk(("bus_dmamap_load error %d\n", error));
2858d2bd3ab9SScott Long 				FreeCommand(_VBUS_P pCmd);
2859d2bd3ab9SScott Long 				ccb->ccb_h.status = CAM_REQ_CMP_ERR;
2860d2bd3ab9SScott Long 				dmamap_put(pmap);
2861d2bd3ab9SScott Long 				pAdapter->outstandingCommands--;
286249b3fc40SJohn Baldwin 				if (pAdapter->outstandingCommands == 0)
286349b3fc40SJohn Baldwin 					wakeup(pAdapter);
2864d2bd3ab9SScott Long 				xpt_done(ccb);
2865d2bd3ab9SScott Long 			}
28661713e81bSScott Long 			goto Command_Complished;
28671713e81bSScott Long 		}
28681713e81bSScott Long 
28691713e81bSScott Long 		default:
28701713e81bSScott Long 			ccb->ccb_h.status = CAM_REQ_INVALID;
28711713e81bSScott Long 			break;
28721713e81bSScott Long 	}
28731713e81bSScott Long 	ccb_done(ccb);
28741713e81bSScott Long Command_Complished:
28751713e81bSScott Long 	CheckPendingCall(_VBUS_P0);
28761713e81bSScott Long 	return;
28771713e81bSScott Long }
28781713e81bSScott Long 
28791713e81bSScott Long static void HPTLIBAPI
28801713e81bSScott Long fOsCommandDone(_VBUS_ARG PCommand pCmd)
28811713e81bSScott Long {
2882d2bd3ab9SScott Long 	union ccb *ccb = pCmd->pOrgCommand;
2883d2bd3ab9SScott Long 	PBUS_DMAMAP pmap = (PBUS_DMAMAP)ccb->ccb_adapter;
2884d2bd3ab9SScott Long 	IAL_ADAPTER_T *pAdapter = pmap->pAdapter;
28851713e81bSScott Long 
2886d2bd3ab9SScott Long 	KdPrint(("fOsCommandDone(pcmd=%p, result=%d)\n", pCmd, pCmd->Result));
28871713e81bSScott Long 
288849b3fc40SJohn Baldwin 	callout_stop(&pmap->timeout);
28891713e81bSScott Long 
28901713e81bSScott Long 	switch(pCmd->Result) {
28911713e81bSScott Long 	case RETURN_SUCCESS:
28921713e81bSScott Long 		ccb->ccb_h.status = CAM_REQ_CMP;
28931713e81bSScott Long 		break;
28941713e81bSScott Long 	case RETURN_BAD_DEVICE:
28951713e81bSScott Long 		ccb->ccb_h.status = CAM_DEV_NOT_THERE;
28961713e81bSScott Long 		break;
28971713e81bSScott Long 	case RETURN_DEVICE_BUSY:
28981713e81bSScott Long 		ccb->ccb_h.status = CAM_BUSY;
28991713e81bSScott Long 		break;
29001713e81bSScott Long 	case RETURN_INVALID_REQUEST:
29011713e81bSScott Long 		ccb->ccb_h.status = CAM_REQ_INVALID;
29021713e81bSScott Long 		break;
29031713e81bSScott Long 	case RETURN_SELECTION_TIMEOUT:
29041713e81bSScott Long 		ccb->ccb_h.status = CAM_SEL_TIMEOUT;
29051713e81bSScott Long 		break;
29061713e81bSScott Long 	case RETURN_RETRY:
29071713e81bSScott Long 		ccb->ccb_h.status = CAM_BUSY;
29081713e81bSScott Long 		break;
29091713e81bSScott Long 	default:
29101713e81bSScott Long 		ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
29111713e81bSScott Long 		break;
29121713e81bSScott Long 	}
29131713e81bSScott Long 
2914d2bd3ab9SScott Long 	if (pCmd->cf_data_in) {
2915d2bd3ab9SScott Long 		bus_dmamap_sync(pAdapter->io_dma_parent, pmap->dma_map, BUS_DMASYNC_POSTREAD);
29161713e81bSScott Long 	}
2917a8bc7437SXin LI 	else if (pCmd->cf_data_out) {
2918d2bd3ab9SScott Long 		bus_dmamap_sync(pAdapter->io_dma_parent, pmap->dma_map, BUS_DMASYNC_POSTWRITE);
2919d2bd3ab9SScott Long 	}
29201713e81bSScott Long 
2921d2bd3ab9SScott Long 	bus_dmamap_unload(pAdapter->io_dma_parent, pmap->dma_map);
2922d2bd3ab9SScott Long 
29231713e81bSScott Long 	FreeCommand(_VBUS_P pCmd);
29241713e81bSScott Long 	ccb_done(ccb);
29251713e81bSScott Long }
29261713e81bSScott Long 
29271713e81bSScott Long int
29281713e81bSScott Long hpt_queue_dpc(HPT_DPC dpc, IAL_ADAPTER_T * pAdapter, void *arg, UCHAR flags)
29291713e81bSScott Long {
29301713e81bSScott Long 	int p;
29311713e81bSScott Long 
293249b3fc40SJohn Baldwin 	mtx_lock(&DpcQueue_Lock);
29331713e81bSScott Long 	p = (DpcQueue_Last + 1) % MAX_DPC;
29341713e81bSScott Long 	if (p==DpcQueue_First) {
29351713e81bSScott Long 		KdPrint(("DPC Queue full!\n"));
293649b3fc40SJohn Baldwin 		mtx_unlock(&DpcQueue_Lock);
29371713e81bSScott Long 		return -1;
29381713e81bSScott Long 	}
29391713e81bSScott Long 
29401713e81bSScott Long 	DpcQueue[DpcQueue_Last].dpc = dpc;
29411713e81bSScott Long 	DpcQueue[DpcQueue_Last].pAdapter = pAdapter;
29421713e81bSScott Long 	DpcQueue[DpcQueue_Last].arg = arg;
29431713e81bSScott Long 	DpcQueue[DpcQueue_Last].flags = flags;
29441713e81bSScott Long 	DpcQueue_Last = p;
294549b3fc40SJohn Baldwin 	mtx_unlock(&DpcQueue_Lock);
29461713e81bSScott Long 
29471713e81bSScott Long 	return 0;
29481713e81bSScott Long }
29491713e81bSScott Long 
29501713e81bSScott Long #ifdef _RAID5N_
29511713e81bSScott Long /*
2952d2bd3ab9SScott Long  * Allocate memory above 16M, otherwise we may eat all low memory for ISA devices.
2953d2bd3ab9SScott Long  * How about the memory for 5081 request/response array and PRD table?
29541713e81bSScott Long  */
29551713e81bSScott Long void
29561713e81bSScott Long *os_alloc_page(_VBUS_ARG0)
29571713e81bSScott Long {
2958d2bd3ab9SScott Long 	return (void *)contigmalloc(0x1000, M_DEVBUF, M_NOWAIT, 0x1000000, 0xffffffff, PAGE_SIZE, 0ul);
29591713e81bSScott Long }
2960d2bd3ab9SScott Long 
29611713e81bSScott Long void
29621713e81bSScott Long *os_alloc_dma_page(_VBUS_ARG0)
29631713e81bSScott Long {
2964d2bd3ab9SScott Long 	return (void *)contigmalloc(0x1000, M_DEVBUF, M_NOWAIT, 0x1000000, 0xffffffff, PAGE_SIZE, 0ul);
29651713e81bSScott Long }
29661713e81bSScott Long 
29671713e81bSScott Long void
29681713e81bSScott Long os_free_page(_VBUS_ARG void *p)
29691713e81bSScott Long {
29701713e81bSScott Long 	contigfree(p, 0x1000, M_DEVBUF);
29711713e81bSScott Long }
29721713e81bSScott Long 
29731713e81bSScott Long void
29741713e81bSScott Long os_free_dma_page(_VBUS_ARG void *p)
29751713e81bSScott Long {
29761713e81bSScott Long 	contigfree(p, 0x1000, M_DEVBUF);
29771713e81bSScott Long }
29781713e81bSScott Long 
29791713e81bSScott Long void
29801713e81bSScott Long DoXor1(ULONG *p0, ULONG *p1, ULONG *p2, UINT nBytes)
29811713e81bSScott Long {
29821713e81bSScott Long 	UINT i;
2983d2bd3ab9SScott Long 	for (i = 0; i < nBytes / 4; i++) *p0++ = *p1++ ^ *p2++;
29841713e81bSScott Long }
29851713e81bSScott Long 
29861713e81bSScott Long void
29871713e81bSScott Long DoXor2(ULONG *p0, ULONG *p2, UINT nBytes)
29881713e81bSScott Long {
29891713e81bSScott Long 	UINT i;
2990d2bd3ab9SScott Long 	for (i = 0; i < nBytes / 4; i++) *p0++ ^= *p2++;
29911713e81bSScott Long }
29921713e81bSScott Long #endif
2993