11713e81bSScott Long /* 21713e81bSScott Long * Copyright (c) 2003-2004 HighPoint Technologies, Inc. 31713e81bSScott Long * All rights reserved. 41713e81bSScott Long * 51713e81bSScott Long * Redistribution and use in source and binary forms, with or without 61713e81bSScott Long * modification, are permitted provided that the following conditions 71713e81bSScott Long * are met: 81713e81bSScott Long * 1. Redistributions of source code must retain the above copyright 91713e81bSScott Long * notice, this list of conditions and the following disclaimer. 101713e81bSScott Long * 2. Redistributions in binary form must reproduce the above copyright 111713e81bSScott Long * notice, this list of conditions and the following disclaimer in the 121713e81bSScott Long * documentation and/or other materials provided with the distribution. 131713e81bSScott Long * 141713e81bSScott Long * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 151713e81bSScott Long * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 161713e81bSScott Long * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 171713e81bSScott Long * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 181713e81bSScott Long * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 191713e81bSScott Long * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 201713e81bSScott Long * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 211713e81bSScott Long * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 221713e81bSScott Long * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 231713e81bSScott Long * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 241713e81bSScott Long * SUCH DAMAGE. 251713e81bSScott Long * 261713e81bSScott Long * $FreeBSD$ 271713e81bSScott Long */ 281713e81bSScott Long #include <sys/param.h> 291713e81bSScott Long #include <sys/systm.h> 301713e81bSScott Long #include <sys/kernel.h> 311713e81bSScott Long #include <sys/bus.h> 321713e81bSScott Long #include <sys/malloc.h> 331713e81bSScott Long #include <sys/resource.h> 341713e81bSScott Long #include <sys/time.h> 351713e81bSScott Long #include <sys/callout.h> 361713e81bSScott Long #include <sys/signalvar.h> 371713e81bSScott Long #include <sys/eventhandler.h> 381713e81bSScott Long #include <sys/proc.h> 391713e81bSScott Long #include <sys/kthread.h> 401713e81bSScott Long 411713e81bSScott Long #include <dev/pci/pcireg.h> 421713e81bSScott Long #include <dev/pci/pcivar.h> 431713e81bSScott Long 441713e81bSScott Long #include <dev/hptmv/global.h> 451713e81bSScott Long #include <dev/hptmv/hptintf.h> 461713e81bSScott Long #include <dev/hptmv/osbsd.h> 471713e81bSScott Long #include <contrib/dev/hptmv/access601.h> 481713e81bSScott Long 491713e81bSScott Long #ifdef DEBUG 501713e81bSScott Long #ifdef DEBUG_LEVEL 511713e81bSScott Long int hpt_dbg_level = DEBUG_LEVEL; 521713e81bSScott Long #else 531713e81bSScott Long int hpt_dbg_level = 0; 541713e81bSScott Long #endif 551713e81bSScott Long #endif 561713e81bSScott Long 571713e81bSScott Long #define MV_ERROR printf 581713e81bSScott Long /* 591713e81bSScott Long * CAM SIM entry points 601713e81bSScott Long */ 611713e81bSScott Long static int hpt_probe(device_t dev); 621713e81bSScott Long static int hpt_attach(device_t dev); 631713e81bSScott Long static int hpt_detach(device_t dev); 641713e81bSScott Long static int hpt_shutdown(device_t dev); 651713e81bSScott Long static void hpt_poll(struct cam_sim *sim); 661713e81bSScott Long static void hpt_intr(void *arg); 671713e81bSScott Long static void hpt_action(struct cam_sim *sim, union ccb *ccb); 681713e81bSScott Long static void SetInquiryData(PINQUIRYDATA inquiryData, PVDevice pVDev); 691713e81bSScott Long static void HPTLIBAPI OsSendCommand (_VBUS_ARG union ccb * ccb); 701713e81bSScott Long static void HPTLIBAPI fOsCommandDone(_VBUS_ARG PCommand pCmd); 711713e81bSScott Long static void ccb_done(union ccb *ccb); 721713e81bSScott Long static void hpt_queue_ccb(union ccb **ccb_Q, union ccb *ccb); 731713e81bSScott Long static void hpt_free_ccb(union ccb **ccb_Q, union ccb *ccb); 741713e81bSScott Long static MV_SATA_CHANNEL gMvSataChannels[MAX_VBUS][MV_SATA_CHANNELS_NUM]; 751713e81bSScott Long static void hptmv_free_edma_queues(IAL_ADAPTER_T *pAdapter); 761713e81bSScott Long static void hptmv_free_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum); 771713e81bSScott Long static void handleEdmaError(_VBUS_ARG PCommand pCmd); 781713e81bSScott Long static int hptmv_init_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum); 791713e81bSScott Long static int fResetActiveCommands(PVBus _vbus_p); 801713e81bSScott Long static void fRegisterVdevice(IAL_ADAPTER_T *pAdapter); 811713e81bSScott Long static int hptmv_allocate_edma_queues(IAL_ADAPTER_T *pAdapter); 821713e81bSScott Long static void hptmv_handle_event_disconnect(void *data); 831713e81bSScott Long static void hptmv_handle_event_connect(void *data); 841713e81bSScott Long static int start_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum); 851713e81bSScott Long static void init_vdev_params(IAL_ADAPTER_T *pAdapter, MV_U8 channel); 861713e81bSScott Long static int hptmv_parse_identify_results(MV_SATA_CHANNEL *pMvSataChannel); 871713e81bSScott Long static void hpt_async(void *callback_arg, u_int32_t code, 881713e81bSScott Long struct cam_path *path, void *arg); 891713e81bSScott Long static int HPTLIBAPI fOsBuildSgl(_VBUS_ARG PCommand pCmd, FPSCAT_GATH pSg, 901713e81bSScott Long int logical); 911713e81bSScott Long static MV_BOOLEAN CommandCompletionCB(MV_SATA_ADAPTER *pMvSataAdapter, 921713e81bSScott Long MV_U8 channelNum, MV_COMPLETION_TYPE comp_type, MV_VOID_PTR commandId, 931713e81bSScott Long MV_U16 responseFlags, MV_U32 timeStamp, 941713e81bSScott Long MV_STORAGE_DEVICE_REGISTERS *registerStruct); 951713e81bSScott Long static MV_BOOLEAN hptmv_event_notify(MV_SATA_ADAPTER *pMvSataAdapter, 961713e81bSScott Long MV_EVENT_TYPE eventType, MV_U32 param1, MV_U32 param2); 971713e81bSScott Long 981713e81bSScott Long #define ccb_ccb_ptr spriv_ptr0 991713e81bSScott Long #define ccb_adapter ccb_h.spriv_ptr1 1001713e81bSScott Long 1011713e81bSScott Long IAL_ADAPTER_T *gIal_Adapter = 0; 1021713e81bSScott Long IAL_ADAPTER_T *pCurAdapter = 0; 1031713e81bSScott Long 1041713e81bSScott Long typedef struct st_HPT_DPC { 1051713e81bSScott Long IAL_ADAPTER_T *pAdapter; 1061713e81bSScott Long void (*dpc)(IAL_ADAPTER_T *, void *, UCHAR); 1071713e81bSScott Long void *arg; 1081713e81bSScott Long UCHAR flags; 1091713e81bSScott Long } ST_HPT_DPC; 1101713e81bSScott Long 1111713e81bSScott Long #define MAX_DPC 16 1121713e81bSScott Long UCHAR DPC_Request_Nums = 0; 1131713e81bSScott Long static ST_HPT_DPC DpcQueue[MAX_DPC]; 1141713e81bSScott Long static int DpcQueue_First=0; 1151713e81bSScott Long static int DpcQueue_Last = 0; 1161713e81bSScott Long 1171713e81bSScott Long static device_method_t driver_methods[] = { 1181713e81bSScott Long /* Device interface */ 1191713e81bSScott Long DEVMETHOD(device_probe, hpt_probe), 1201713e81bSScott Long DEVMETHOD(device_attach, hpt_attach), 1211713e81bSScott Long DEVMETHOD(device_detach, hpt_detach), 1221713e81bSScott Long { 0, 0 } 1231713e81bSScott Long }; 1241713e81bSScott Long 1251713e81bSScott Long static driver_t hpt_pci_driver = { 1261713e81bSScott Long __str(PROC_DIR_NAME), 1271713e81bSScott Long driver_methods, 1281713e81bSScott Long sizeof(IAL_ADAPTER_T) 1291713e81bSScott Long }; 1301713e81bSScott Long 1311713e81bSScott Long static devclass_t hpt_devclass; 1321713e81bSScott Long 1331713e81bSScott Long DRIVER_MODULE(PROC_DIR_NAME, pci, hpt_pci_driver, hpt_devclass, 0, 0); 1341713e81bSScott Long MODULE_DEPEND(PROC_DIR_NAME, cam, 1, 1, 1); 1351713e81bSScott Long 1361713e81bSScott Long intrmask_t 1371713e81bSScott Long lock_driver() 1381713e81bSScott Long { 1391713e81bSScott Long intrmask_t spl = splcam(); 1401713e81bSScott Long return spl; 1411713e81bSScott Long } 1421713e81bSScott Long 1431713e81bSScott Long void 1441713e81bSScott Long unlock_driver(intrmask_t spl) 1451713e81bSScott Long { 1461713e81bSScott Long splx(spl); 1471713e81bSScott Long } 1481713e81bSScott Long 1491713e81bSScott Long /******************************************************************************* 1501713e81bSScott Long * Name: hptmv_free_channel 1511713e81bSScott Long * 1521713e81bSScott Long * Description: free allocated queues for the given channel 1531713e81bSScott Long * 1541713e81bSScott Long * Parameters: pMvSataAdapter - pointer to the RR182x controler this 1551713e81bSScott Long * channel connected to. 1561713e81bSScott Long * channelNum - channel number. 1571713e81bSScott Long * 1581713e81bSScott Long ******************************************************************************/ 1591713e81bSScott Long static void 1601713e81bSScott Long hptmv_free_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum) 1611713e81bSScott Long { 1621713e81bSScott Long PVDevice pVDev = &(pAdapter->VDevices[channelNum]); 1631713e81bSScott Long _VBUS_INST(&pAdapter->VBus); 1641713e81bSScott Long 1651713e81bSScott Long HPT_ASSERT(channelNum < MV_SATA_CHANNELS_NUM); 1661713e81bSScott Long 1671713e81bSScott Long pAdapter->mvSataAdapter.sataChannel[channelNum] = NULL; 1681713e81bSScott Long 1691713e81bSScott Long if(pVDev->vf_online) 1701713e81bSScott Long { 1711713e81bSScott Long pVDev->u.disk.df_on_line = 0; 1721713e81bSScott Long pVDev->vf_online = 0; 1731713e81bSScott Long if (pVDev->pfnDeviceFailed) { 1741713e81bSScott Long CallWhenIdle(_VBUS_P (DPC_PROC)pVDev->pfnDeviceFailed, 1751713e81bSScott Long pVDev); 1761713e81bSScott Long } 1771713e81bSScott Long } 1781713e81bSScott Long } 1791713e81bSScott Long 1801713e81bSScott Long int MvSataResetChannel(MV_SATA_ADAPTER *pMvSataAdapter, MV_U8 channel); 1811713e81bSScott Long 1821713e81bSScott Long static void 1831713e81bSScott Long handleEdmaError(_VBUS_ARG PCommand pCmd) 1841713e81bSScott Long { 1851713e81bSScott Long PDevice pDevice = &pCmd->pVDevice->u.disk; 1861713e81bSScott Long MV_SATA_ADAPTER * pSataAdapter = pDevice->mv->mvSataAdapter; 1871713e81bSScott Long 1881713e81bSScott Long MV_ERROR("Reset channel\n"); 1891713e81bSScott Long 1901713e81bSScott Long MvSataResetChannel(pSataAdapter, pDevice->mv->channelNumber); 1911713e81bSScott Long /*now no other cmds on this channel*/ 1921713e81bSScott Long if (!pDevice->df_on_line) { 1931713e81bSScott Long KdPrint(("Device is offline")); 1941713e81bSScott Long pCmd->Result = RETURN_BAD_DEVICE; 1951713e81bSScott Long CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd); 1961713e81bSScott Long return; 1971713e81bSScott Long } 1981713e81bSScott Long 1991713e81bSScott Long if (pCmd->RetryCount++>5) { 2001713e81bSScott Long pDevice->df_on_line = 0; 2011713e81bSScott Long pCmd->pVDevice->vf_online = 0; 2021713e81bSScott Long if (pCmd->pVDevice->pfnDeviceFailed) 2031713e81bSScott Long CallWhenIdle(_VBUS_P 2041713e81bSScott Long (DPC_PROC)pCmd->pVDevice->pfnDeviceFailed, 2051713e81bSScott Long pCmd->pVDevice); 2061713e81bSScott Long fNotifyGUI(ET_DEVICE_REMOVED, Map2pVDevice(pDevice)); 2071713e81bSScott Long pCmd->Result = RETURN_IDE_ERROR; 2081713e81bSScott Long CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd); 2091713e81bSScott Long return; 2101713e81bSScott Long } 2111713e81bSScott Long /* retry the command */ 2121713e81bSScott Long fDeviceSendCommand(_VBUS_P pCmd); 2131713e81bSScott Long } 2141713e81bSScott Long 2151713e81bSScott Long /**************************************************************** 2161713e81bSScott Long * Name: hptmv_init_channel 2171713e81bSScott Long * 2181713e81bSScott Long * Description: allocate request and response queues for the EDMA of 2191713e81bSScott Long * the given channel and sets other fields. 2201713e81bSScott Long * Parameters: 2211713e81bSScott Long * pAdapter - pointer to the emulated adapter data structure 2221713e81bSScott Long * channelNum - channel number. 2231713e81bSScott Long * Return: 0 on success, otherwise on failure 2241713e81bSScott Long ****************************************************************/ 2251713e81bSScott Long static int 2261713e81bSScott Long hptmv_init_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum) 2271713e81bSScott Long { 2281713e81bSScott Long MV_SATA_CHANNEL *pMvSataChannel; 2291713e81bSScott Long dma_addr_t req_dma_addr; 2301713e81bSScott Long dma_addr_t rsp_dma_addr; 2311713e81bSScott Long 2321713e81bSScott Long if (channelNum >= MV_SATA_CHANNELS_NUM) 2331713e81bSScott Long { 2341713e81bSScott Long MV_ERROR("RR182x[%d]: Bad channelNum=%d", 2351713e81bSScott Long pAdapter->mvSataAdapter.adapterId, channelNum); 2361713e81bSScott Long return -1; 2371713e81bSScott Long } 2381713e81bSScott Long 2391713e81bSScott Long pMvSataChannel = 2401713e81bSScott Long &gMvSataChannels[pAdapter->mvSataAdapter.adapterId][channelNum]; 2411713e81bSScott Long pAdapter->mvSataAdapter.sataChannel[channelNum] = pMvSataChannel; 2421713e81bSScott Long pMvSataChannel->channelNumber = channelNum; 2431713e81bSScott Long pMvSataChannel->lba48Address = MV_FALSE; 2441713e81bSScott Long pMvSataChannel->maxReadTransfer = MV_FALSE; 2451713e81bSScott Long 2461713e81bSScott Long pMvSataChannel->requestQueue = 2471713e81bSScott Long (struct mvDmaRequestQueueEntry *) 2481713e81bSScott Long (pAdapter->requestsArrayBaseAlignedAddr + 2491713e81bSScott Long (channelNum * MV_EDMA_REQUEST_QUEUE_SIZE)); 2501713e81bSScott Long req_dma_addr = pAdapter->requestsArrayBaseDmaAlignedAddr + 2511713e81bSScott Long (channelNum * MV_EDMA_REQUEST_QUEUE_SIZE); 2521713e81bSScott Long 2531713e81bSScott Long 2541713e81bSScott Long KdPrint(("requestQueue addr is 0x%X", req_dma_addr)); 2551713e81bSScott Long 2561713e81bSScott Long /* check the 1K alignment of the request queue*/ 2571713e81bSScott Long if (req_dma_addr & 0x3ff) 2581713e81bSScott Long { 2591713e81bSScott Long MV_ERROR("RR182x[%d]: request queue allocated not 1 K aligned," 2601713e81bSScott Long " dma_addr=%lx channel=%d\n", 2611713e81bSScott Long pAdapter->mvSataAdapter.adapterId,(u_long)req_dma_addr, 2621713e81bSScott Long channelNum); 2631713e81bSScott Long return -1; 2641713e81bSScott Long } 2651713e81bSScott Long pMvSataChannel->requestQueuePciLowAddress = req_dma_addr; 2661713e81bSScott Long pMvSataChannel->requestQueuePciHiAddress = 0; 2671713e81bSScott Long KdPrint(("RR182x[%d,%d]: request queue allocated: 0x%p", 2681713e81bSScott Long pAdapter->mvSataAdapter.adapterId, channelNum, 2691713e81bSScott Long pMvSataChannel->requestQueue)); 2701713e81bSScott Long pMvSataChannel->responseQueue = 2711713e81bSScott Long (struct mvDmaResponseQueueEntry *) 2721713e81bSScott Long (pAdapter->responsesArrayBaseAlignedAddr + 2731713e81bSScott Long (channelNum * MV_EDMA_RESPONSE_QUEUE_SIZE)); 2741713e81bSScott Long rsp_dma_addr = pAdapter->responsesArrayBaseDmaAlignedAddr + 2751713e81bSScott Long (channelNum * MV_EDMA_RESPONSE_QUEUE_SIZE); 2761713e81bSScott Long 2771713e81bSScott Long /* check the 256 alignment of the response queue*/ 2781713e81bSScott Long if (rsp_dma_addr & 0xff) 2791713e81bSScott Long { 2801713e81bSScott Long MV_ERROR("RR182x[%d,%d]: response queue allocated not 256 byte" 2811713e81bSScott Long " aligned, dma_addr=%lx\n", 2821713e81bSScott Long pAdapter->mvSataAdapter.adapterId, channelNum, 2831713e81bSScott Long (u_long)rsp_dma_addr); 2841713e81bSScott Long return -1; 2851713e81bSScott Long } 2861713e81bSScott Long pMvSataChannel->responseQueuePciLowAddress = rsp_dma_addr; 2871713e81bSScott Long pMvSataChannel->responseQueuePciHiAddress = 0; 2881713e81bSScott Long KdPrint(("RR182x[%d,%d]: response queue allocated: 0x%p", 2891713e81bSScott Long pAdapter->mvSataAdapter.adapterId, channelNum, 2901713e81bSScott Long pMvSataChannel->responseQueue)); 2911713e81bSScott Long 2921713e81bSScott Long pAdapter->mvChannel[channelNum].online = MV_TRUE; 2931713e81bSScott Long return 0; 2941713e81bSScott Long } 2951713e81bSScott Long 2961713e81bSScott Long /****************************************************************************** 2971713e81bSScott Long * Name: hptmv_parse_identify_results 2981713e81bSScott Long * 2991713e81bSScott Long * Description: this functions parses the identify command results, 3001713e81bSScott Long * checks that the connected deives can be accesed by 3011713e81bSScott Long * RR182x EDMA, and updates the channel stucture 3021713e81bSScott Long * accordingly. 3031713e81bSScott Long * Parameters: pMvSataChannel, pointer to the channel data structure. 3041713e81bSScott Long * 3051713e81bSScott Long * Returns: =0 ->success, < 0 ->failure. 3061713e81bSScott Long * 3071713e81bSScott Long ******************************************************************************/ 3081713e81bSScott Long static int 3091713e81bSScott Long hptmv_parse_identify_results(MV_SATA_CHANNEL *pMvSataChannel) 3101713e81bSScott Long { 3111713e81bSScott Long MV_U16 *iden = pMvSataChannel->identifyDevice; 3121713e81bSScott Long 3131713e81bSScott Long /*LBA addressing*/ 3141713e81bSScott Long if (! (iden[IDEN_CAPACITY_1_OFFSET] & 0x200)) { 3151713e81bSScott Long KdPrint(("IAL Error in IDENTIFY info: LBA not supported\n")); 3161713e81bSScott Long return -1; 3171713e81bSScott Long } else { 3181713e81bSScott Long KdPrint(("%25s - %s\n", "Capabilities", "LBA supported")); 3191713e81bSScott Long } 3201713e81bSScott Long /*DMA support*/ 3211713e81bSScott Long if (! (iden[IDEN_CAPACITY_1_OFFSET] & 0x100)) { 3221713e81bSScott Long KdPrint(("IAL Error in IDENTIFY info: DMA not supported\n")); 3231713e81bSScott Long return -1; 3241713e81bSScott Long } else { 3251713e81bSScott Long KdPrint(("%25s - %s\n", "Capabilities", "DMA supported")); 3261713e81bSScott Long } 3271713e81bSScott Long /* PIO */ 3281713e81bSScott Long if ((iden[IDEN_VALID] & 2) == 0) { 3291713e81bSScott Long KdPrint(("IAL Error in IDENTIFY info: not able to find PIO " 3301713e81bSScott Long "mode\n")); 3311713e81bSScott Long return -1; 3321713e81bSScott Long } 3331713e81bSScott Long KdPrint(("%25s - 0x%02x\n", "PIO modes supported", 3341713e81bSScott Long iden[IDEN_PIO_MODE_SPPORTED] & 0xff)); 3351713e81bSScott Long 3361713e81bSScott Long /*UDMA*/ 3371713e81bSScott Long if ((iden[IDEN_VALID] & 4) == 0) { 3381713e81bSScott Long KdPrint(("IAL Error in IDENTIFY info: not able to find UDMA " 3391713e81bSScott Long "mode\n")); 3401713e81bSScott Long return -1; 3411713e81bSScott Long } 3421713e81bSScott Long 3431713e81bSScott Long /* 48 bit address */ 3441713e81bSScott Long if ((iden[IDEN_SUPPORTED_COMMANDS2] & 0x400)) { 3451713e81bSScott Long KdPrint(("%25s - %s\n", "LBA48 addressing", "supported")); 3461713e81bSScott Long pMvSataChannel->lba48Address = MV_TRUE; 3471713e81bSScott Long } else { 3481713e81bSScott Long KdPrint(("%25s - %s\n", "LBA48 addressing", "Not supported")); 3491713e81bSScott Long pMvSataChannel->lba48Address = MV_FALSE; 3501713e81bSScott Long } 3511713e81bSScott Long return 0; 3521713e81bSScott Long } 3531713e81bSScott Long 3541713e81bSScott Long static void 3551713e81bSScott Long init_vdev_params(IAL_ADAPTER_T *pAdapter, MV_U8 channel) 3561713e81bSScott Long { 3571713e81bSScott Long PVDevice pVDev; 3581713e81bSScott Long MV_SATA_CHANNEL *pMvSataChannel; 3591713e81bSScott Long MV_U16_PTR IdentifyData; 3601713e81bSScott Long 3611713e81bSScott Long pVDev = &pAdapter->VDevices[channel]; 3621713e81bSScott Long pMvSataChannel = pAdapter->mvSataAdapter.sataChannel[channel]; 3631713e81bSScott Long pMvSataChannel->outstandingCommands = 0; 3641713e81bSScott Long IdentifyData = pMvSataChannel->identifyDevice; 3651713e81bSScott Long 3661713e81bSScott Long pVDev->u.disk.mv = pMvSataChannel; 3671713e81bSScott Long pVDev->u.disk.df_on_line = 1; 3681713e81bSScott Long pVDev->u.disk.pVBus = &pAdapter->VBus; 3691713e81bSScott Long pVDev->pVBus = &pAdapter->VBus; 3701713e81bSScott Long 3711713e81bSScott Long #ifdef SUPPORT_48BIT_LBA 3721713e81bSScott Long if (pMvSataChannel->lba48Address == MV_TRUE) 3731713e81bSScott Long pVDev->u.disk.dDeRealCapacity = 3741713e81bSScott Long ((IdentifyData[101]<<16) | IdentifyData[100]) - 1; 3751713e81bSScott Long else 3761713e81bSScott Long #endif 3771713e81bSScott Long if(IdentifyData[53] & 1) { 3781713e81bSScott Long pVDev->u.disk.dDeRealCapacity = 3791713e81bSScott Long (((IdentifyData[58]<<16 | IdentifyData[57]) < 3801713e81bSScott Long (IdentifyData[61]<<16 | IdentifyData[60])) ? 3811713e81bSScott Long (IdentifyData[61]<<16 | IdentifyData[60]) : 3821713e81bSScott Long (IdentifyData[58]<<16 | IdentifyData[57])) - 1; 3831713e81bSScott Long } else 3841713e81bSScott Long pVDev->u.disk.dDeRealCapacity = 3851713e81bSScott Long (IdentifyData[61]<<16 | IdentifyData[60]) - 1; 3861713e81bSScott Long 3871713e81bSScott Long pVDev->u.disk.bDeUsable_Mode = pVDev->u.disk.bDeModeSetting = 3881713e81bSScott Long pAdapter->mvChannel[channel].maxPioModeSupported - 3891713e81bSScott Long MV_ATA_TRANSFER_PIO_0; 3901713e81bSScott Long 3911713e81bSScott Long if (pAdapter->mvChannel[channel].maxUltraDmaModeSupported!=0xFF) { 3921713e81bSScott Long pVDev->u.disk.bDeUsable_Mode = pVDev->u.disk.bDeModeSetting = 3931713e81bSScott Long pAdapter->mvChannel[channel].maxUltraDmaModeSupported - 3941713e81bSScott Long MV_ATA_TRANSFER_UDMA_0 + 8; 3951713e81bSScott Long } 3961713e81bSScott Long } 3971713e81bSScott Long 3981713e81bSScott Long static void 3991713e81bSScott Long device_change(IAL_ADAPTER_T *pAdapter , MV_U8 channelIndex, int plugged) 4001713e81bSScott Long { 4011713e81bSScott Long PVDevice pVDev; 4021713e81bSScott Long MV_SATA_ADAPTER *pMvSataAdapter; 4031713e81bSScott Long MV_SATA_CHANNEL *pMvSataChannel; 4041713e81bSScott Long PVBus _vbus_p; 4051713e81bSScott Long 4061713e81bSScott Long pMvSataAdapter = &pAdapter->mvSataAdapter; 4071713e81bSScott Long pMvSataChannel = pMvSataAdapter->sataChannel[channelIndex]; 4081713e81bSScott Long _vbus_p = &pAdapter->VBus; 4091713e81bSScott Long 4101713e81bSScott Long if (!pMvSataChannel) 4111713e81bSScott Long return; 4121713e81bSScott Long 4131713e81bSScott Long if (plugged) { 4141713e81bSScott Long pVDev = &(pAdapter->VDevices[channelIndex]); 4151713e81bSScott Long init_vdev_params(pAdapter, channelIndex); 4161713e81bSScott Long 4171713e81bSScott Long pVDev->VDeviceType = pVDev->u.disk.df_atapi ? VD_ATAPI : 4181713e81bSScott Long pVDev->u.disk.df_removable_drive ? VD_REMOVABLE : 4191713e81bSScott Long VD_SINGLE_DISK; 4201713e81bSScott Long 4211713e81bSScott Long pVDev->VDeviceCapacity = pVDev->u.disk.dDeRealCapacity; 4221713e81bSScott Long pVDev->pfnSendCommand = pfnSendCommand[pVDev->VDeviceType]; 4231713e81bSScott Long pVDev->pfnDeviceFailed = pfnDeviceFailed[pVDev->VDeviceType]; 4241713e81bSScott Long pVDev->vf_online = 1; 4251713e81bSScott Long 4261713e81bSScott Long #ifdef SUPPORT_ARRAY 4271713e81bSScott Long if(pVDev->pParent) { 4281713e81bSScott Long int iMember; 4291713e81bSScott Long 4301713e81bSScott Long for (iMember = 0; 4311713e81bSScott Long iMember < pVDev->pParent->u.array.bArnMember; 4321713e81bSScott Long iMember++) 4331713e81bSScott Long if ((PVDevice)pVDev->pParent->u.array.pMember[iMember] == pVDev) 4341713e81bSScott Long pVDev->pParent->u.array.pMember[iMember] = NULL; 4351713e81bSScott Long pVDev->pParent = NULL; 4361713e81bSScott Long } 4371713e81bSScott Long #endif 4381713e81bSScott Long fNotifyGUI(ET_DEVICE_PLUGGED,pVDev); 4391713e81bSScott Long fCheckBootable(pVDev); 4401713e81bSScott Long RegisterVDevice(pVDev); 4411713e81bSScott Long 4421713e81bSScott Long #ifndef FOR_DEMO 4431713e81bSScott Long if (pAdapter->beeping) { 4441713e81bSScott Long pAdapter->beeping = 0; 4451713e81bSScott Long BeepOff(pAdapter->mvSataAdapter.adapterIoBaseAddress); 4461713e81bSScott Long } 4471713e81bSScott Long #endif 4481713e81bSScott Long 4491713e81bSScott Long } else { 4501713e81bSScott Long pVDev = &(pAdapter->VDevices[channelIndex]); 4511713e81bSScott Long pVDev->u.disk.df_on_line = 0; 4521713e81bSScott Long pVDev->vf_online = 0; 4531713e81bSScott Long if (pVDev->pfnDeviceFailed) { 4541713e81bSScott Long _VBUS_INST(&pAdapter->VBus) 4551713e81bSScott Long CallWhenIdle(_VBUS_P (DPC_PROC)pVDev->pfnDeviceFailed, 4561713e81bSScott Long pVDev); 4571713e81bSScott Long } 4581713e81bSScott Long fNotifyGUI(ET_DEVICE_REMOVED,pVDev); 4591713e81bSScott Long 4601713e81bSScott Long #ifndef FOR_DEMO 4611713e81bSScott Long if (pAdapter->ver_601==2 && !pAdapter->beeping) { 4621713e81bSScott Long pAdapter->beeping = 1; 4631713e81bSScott Long BeepOn(pAdapter->mvSataAdapter.adapterIoBaseAddress); 4641713e81bSScott Long set_fail_led(&pAdapter->mvSataAdapter, channelIndex, 1); 4651713e81bSScott Long } 4661713e81bSScott Long #endif 4671713e81bSScott Long 4681713e81bSScott Long } 4691713e81bSScott Long } 4701713e81bSScott Long 4711713e81bSScott Long static int 4721713e81bSScott Long start_channel(IAL_ADAPTER_T *pAdapter, MV_U8 channelNum) 4731713e81bSScott Long { 4741713e81bSScott Long MV_SATA_ADAPTER *pMvSataAdapter; 4751713e81bSScott Long MV_SATA_CHANNEL *pMvSataChannel; 4761713e81bSScott Long MV_CHANNEL *pChannelInfo; 4771713e81bSScott Long MV_U32 udmaMode,pioMode; 4781713e81bSScott Long 4791713e81bSScott Long pMvSataAdapter = &pAdapter->mvSataAdapter; 4801713e81bSScott Long pMvSataChannel = pMvSataAdapter->sataChannel[channelNum]; 4811713e81bSScott Long pChannelInfo = &(pAdapter->mvChannel[channelNum]); 4821713e81bSScott Long 4831713e81bSScott Long KdPrint(("RR182x [%d]: start channel (%d)", pMvSataAdapter->adapterId, 4841713e81bSScott Long channelNum)); 4851713e81bSScott Long 4861713e81bSScott Long 4871713e81bSScott Long /* Software reset channel */ 4881713e81bSScott Long if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channelNum) == 4891713e81bSScott Long MV_FALSE) { 4901713e81bSScott Long MV_ERROR("RR182x [%d,%d]: failed to perform Software reset\n", 4911713e81bSScott Long pMvSataAdapter->adapterId, channelNum); 4921713e81bSScott Long return -1; 4931713e81bSScott Long } 4941713e81bSScott Long 4951713e81bSScott Long /* Hardware reset channel */ 4961713e81bSScott Long if (mvSataChannelHardReset(pMvSataAdapter, channelNum) == MV_FALSE) { 4971713e81bSScott Long /* 4981713e81bSScott Long * If failed, try again - this is when trying to hardreset a 4991713e81bSScott Long * channel when drive is just spinning up 5001713e81bSScott Long */ 5011713e81bSScott Long StallExec(5000000); /* wait 5 sec before trying again */ 5021713e81bSScott Long if (mvSataChannelHardReset(pMvSataAdapter, channelNum) == 5031713e81bSScott Long MV_FALSE) { 5041713e81bSScott Long MV_ERROR("RR182x [%d,%d]: failed to perform Hard " 5051713e81bSScott Long "reset\n", pMvSataAdapter->adapterId, 5061713e81bSScott Long channelNum); 5071713e81bSScott Long return -1; 5081713e81bSScott Long } 5091713e81bSScott Long } 5101713e81bSScott Long 5111713e81bSScott Long /* identify device*/ 5121713e81bSScott Long if (mvStorageDevATAIdentifyDevice(pMvSataAdapter, channelNum) == 5131713e81bSScott Long MV_FALSE) { 5141713e81bSScott Long MV_ERROR("RR182x [%d,%d]: failed to perform ATA Identify " 5151713e81bSScott Long "command\n", pMvSataAdapter->adapterId, channelNum); 5161713e81bSScott Long return -1; 5171713e81bSScott Long } 5181713e81bSScott Long if (hptmv_parse_identify_results(pMvSataChannel)) { 5191713e81bSScott Long MV_ERROR("RR182x [%d,%d]: Error in parsing ATA Identify " 5201713e81bSScott Long "message\n", pMvSataAdapter->adapterId, channelNum); 5211713e81bSScott Long return -1; 5221713e81bSScott Long } 5231713e81bSScott Long 5241713e81bSScott Long /* mvStorageDevATASetFeatures */ 5251713e81bSScott Long /* Disable 8 bit PIO in case CFA enabled */ 5261713e81bSScott Long if (pMvSataChannel->identifyDevice[86] & 4) { 5271713e81bSScott Long KdPrint(("RR182x [%d]: Disable 8 bit PIO (CFA enabled) \n", 5281713e81bSScott Long pMvSataAdapter->adapterId)); 5291713e81bSScott Long if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum, 5301713e81bSScott Long MV_ATA_SET_FEATURES_DISABLE_8_BIT_PIO, 0, 0, 0, 0) == 5311713e81bSScott Long MV_FALSE) { 5321713e81bSScott Long MV_ERROR("RR182x [%d]: channel %d: " 5331713e81bSScott Long "mvStorageDevATASetFeatures failed\n", 5341713e81bSScott Long pMvSataAdapter->adapterId, channelNum); 5351713e81bSScott Long return -1; 5361713e81bSScott Long } 5371713e81bSScott Long } 5381713e81bSScott Long 5391713e81bSScott Long #ifdef ENABLE_WRITE_CACHE 5401713e81bSScott Long /* Write cache */ 5411713e81bSScott Long if (pMvSataChannel->identifyDevice[82] & 0x20) { 5421713e81bSScott Long if (!(pMvSataChannel->identifyDevice[85] & 0x20)) { 5431713e81bSScott Long /* if not enabled by default */ 5441713e81bSScott Long if (mvStorageDevATASetFeatures(pMvSataAdapter, 5451713e81bSScott Long channelNum, MV_ATA_SET_FEATURES_ENABLE_WCACHE, 0, 5461713e81bSScott Long 0, 0, 0) == MV_FALSE) { 5471713e81bSScott Long MV_ERROR("RR182x [%d]: channel %d: " 5481713e81bSScott Long "mvStorageDevATASetFeatures failed\n", 5491713e81bSScott Long pMvSataAdapter->adapterId, channelNum); 5501713e81bSScott Long return -1; 5511713e81bSScott Long } 5521713e81bSScott Long } 5531713e81bSScott Long KdPrint(("RR182x [%d]: channel %d, write cache enabled\n", 5541713e81bSScott Long pMvSataAdapter->adapterId, channelNum)); 5551713e81bSScott Long } else { 5561713e81bSScott Long KdPrint(("RR182x [%d]: channel %d, write cache not supported\n", 5571713e81bSScott Long pMvSataAdapter->adapterId, channelNum)); 5581713e81bSScott Long } 5591713e81bSScott Long #else 5601713e81bSScott Long /* disable write cache */ 5611713e81bSScott Long if (pMvSataChannel->identifyDevice[85] & 0x20) { 5621713e81bSScott Long KdPrint(("RR182x [%d]: channel =%d, disable write cache\n", 5631713e81bSScott Long pMvSataAdapter->adapterId, channelNum)); 5641713e81bSScott Long if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum, 5651713e81bSScott Long MV_ATA_SET_FEATURES_DISABLE_WCACHE, 0, 0, 0, 0) == 5661713e81bSScott Long MV_FALSE) { 5671713e81bSScott Long MV_ERROR("RR182x [%d]: channel %d: " 5681713e81bSScott Long "mvStorageDevATASetFeatures failed\n", 5691713e81bSScott Long pMvSataAdapter->adapterId, channelNum); 5701713e81bSScott Long return -1; 5711713e81bSScott Long } 5721713e81bSScott Long } 5731713e81bSScott Long KdPrint(("RR182x [%d]: channel=%d, write cache disabled\n", 5741713e81bSScott Long pMvSataAdapter->adapterId, channelNum)); 5751713e81bSScott Long #endif 5761713e81bSScott Long 5771713e81bSScott Long /* Set transfer mode */ 5781713e81bSScott Long KdPrint(("RR182x [%d] Set transfer mode XFER_PIO_SLOW\n", 5791713e81bSScott Long pMvSataAdapter->adapterId)); 5801713e81bSScott Long if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum, 5811713e81bSScott Long MV_ATA_SET_FEATURES_TRANSFER, MV_ATA_TRANSFER_PIO_SLOW, 0, 0, 0) == 5821713e81bSScott Long MV_FALSE) { 5831713e81bSScott Long MV_ERROR("RR182x [%d] channel %d: Set Features failed\n", 5841713e81bSScott Long pMvSataAdapter->adapterId, channelNum); 5851713e81bSScott Long return -1; 5861713e81bSScott Long } 5871713e81bSScott Long 5881713e81bSScott Long if (pMvSataChannel->identifyDevice[IDEN_PIO_MODE_SPPORTED] & 1) { 5891713e81bSScott Long pioMode = MV_ATA_TRANSFER_PIO_4; 5901713e81bSScott Long } else if (pMvSataChannel->identifyDevice[IDEN_PIO_MODE_SPPORTED] & 2) { 5911713e81bSScott Long pioMode = MV_ATA_TRANSFER_PIO_3; 5921713e81bSScott Long } else { 5931713e81bSScott Long MV_ERROR("IAL Error in IDENTIFY info: PIO modes 3 and 4 not " 5941713e81bSScott Long "supported\n"); 5951713e81bSScott Long pioMode = MV_ATA_TRANSFER_PIO_SLOW; 5961713e81bSScott Long } 5971713e81bSScott Long 5981713e81bSScott Long KdPrint(("RR182x [%d] Set transfer mode XFER_PIO_4\n", 5991713e81bSScott Long pMvSataAdapter->adapterId)); 6001713e81bSScott Long pAdapter->mvChannel[channelNum].maxPioModeSupported = pioMode; 6011713e81bSScott Long if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum, 6021713e81bSScott Long MV_ATA_SET_FEATURES_TRANSFER, pioMode, 0, 0, 0) == MV_FALSE) { 6031713e81bSScott Long MV_ERROR("RR182x [%d] channel %d: Set Features failed\n", 6041713e81bSScott Long pMvSataAdapter->adapterId, channelNum); 6051713e81bSScott Long return -1; 6061713e81bSScott Long } 6071713e81bSScott Long 6081713e81bSScott Long udmaMode = MV_ATA_TRANSFER_UDMA_0; 6091713e81bSScott Long if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x40) { 6101713e81bSScott Long udmaMode = MV_ATA_TRANSFER_UDMA_6; 6111713e81bSScott Long } else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x20) { 6121713e81bSScott Long udmaMode = MV_ATA_TRANSFER_UDMA_5; 6131713e81bSScott Long } else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 0x10) { 6141713e81bSScott Long udmaMode = MV_ATA_TRANSFER_UDMA_4; 6151713e81bSScott Long } else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 8) { 6161713e81bSScott Long udmaMode = MV_ATA_TRANSFER_UDMA_3; 6171713e81bSScott Long } else if (pMvSataChannel->identifyDevice[IDEN_UDMA_MODE] & 4) { 6181713e81bSScott Long udmaMode = MV_ATA_TRANSFER_UDMA_2; 6191713e81bSScott Long } 6201713e81bSScott Long 6211713e81bSScott Long KdPrint(("RR182x [%d] Set transfer mode XFER_UDMA_%d\n", 6221713e81bSScott Long pMvSataAdapter->adapterId, udmaMode & 0xf)); 6231713e81bSScott Long pChannelInfo->maxUltraDmaModeSupported = udmaMode; 6241713e81bSScott Long 6251713e81bSScott Long #if 0 6261713e81bSScott Long if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum, 6271713e81bSScott Long MV_ATA_SET_FEATURES_TRANSFER, udmaMode, 0, 0, 0) == MV_FALSE) { 6281713e81bSScott Long MV_ERROR("RR182x [%d] channel %d: Set Features failed\n", 6291713e81bSScott Long pMvSataAdapter->adapterId, channelNum); 6301713e81bSScott Long return -1; 6311713e81bSScott Long } 6321713e81bSScott Long #endif 6331713e81bSScott Long if (pChannelInfo->maxUltraDmaModeSupported == 0xFF) 6341713e81bSScott Long return TRUE; 6351713e81bSScott Long 6361713e81bSScott Long do { 6371713e81bSScott Long if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum, 6381713e81bSScott Long MV_ATA_SET_FEATURES_TRANSFER, 6391713e81bSScott Long pChannelInfo->maxUltraDmaModeSupported, 0, 0, 0) != 6401713e81bSScott Long MV_FALSE) { 6411713e81bSScott Long break; 6421713e81bSScott Long } 6431713e81bSScott Long 6441713e81bSScott Long if (pChannelInfo->maxUltraDmaModeSupported <= 6451713e81bSScott Long MV_ATA_TRANSFER_UDMA_0) { 6461713e81bSScott Long return FALSE; 6471713e81bSScott Long } 6481713e81bSScott Long if (mvStorageDevATASoftResetDevice(pMvSataAdapter, 6491713e81bSScott Long channelNum) == MV_FALSE) { 6501713e81bSScott Long mv_reg_write_byte(pMvSataAdapter->adapterIoBaseAddress, 6511713e81bSScott Long pMvSataChannel->eDmaRegsOffset + 0x11c, 6521713e81bSScott Long /* command reg */ MV_ATA_COMMAND_IDLE_IMMEDIATE); 6531713e81bSScott Long mvMicroSecondsDelay(10000); 6541713e81bSScott Long mvSataChannelHardReset(pMvSataAdapter, channelNum); 6551713e81bSScott Long if (mvStorageDevATASoftResetDevice(pMvSataAdapter, 6561713e81bSScott Long channelNum) == MV_FALSE) 6571713e81bSScott Long return FALSE; 6581713e81bSScott Long } 6591713e81bSScott Long if (mvSataChannelHardReset(pMvSataAdapter, channelNum) == 6601713e81bSScott Long MV_FALSE) 6611713e81bSScott Long return FALSE; 6621713e81bSScott Long pChannelInfo->maxUltraDmaModeSupported--; 6631713e81bSScott Long } while (1); 6641713e81bSScott Long 6651713e81bSScott Long #ifdef ENABLE_READ_AHEAD 6661713e81bSScott Long /* Read look ahead */ 6671713e81bSScott Long if (pMvSataChannel->identifyDevice[82] & 0x40) { 6681713e81bSScott Long if (!(pMvSataChannel->identifyDevice[85] & 0x40)) { 6691713e81bSScott Long /* if not enabled by default */ 6701713e81bSScott Long if (mvStorageDevATASetFeatures(pMvSataAdapter, 6711713e81bSScott Long channelNum, MV_ATA_SET_FEATURES_ENABLE_RLA, 0, 0, 6721713e81bSScott Long 0, 0) == MV_FALSE) { 6731713e81bSScott Long MV_ERROR("RR182x [%d] channel %d: Set Features " 6741713e81bSScott Long "failed\n", pMvSataAdapter->adapterId, 6751713e81bSScott Long channelNum); 6761713e81bSScott Long return -1; 6771713e81bSScott Long } 6781713e81bSScott Long } 6791713e81bSScott Long KdPrint(("RR182x [%d]: channel=%d, read look ahead enabled\n", 6801713e81bSScott Long pMvSataAdapter->adapterId, channelNum)); 6811713e81bSScott Long } else { 6821713e81bSScott Long KdPrint(("RR182x [%d]: channel %d, Read Look Ahead not " 6831713e81bSScott Long "supported\n", pMvSataAdapter->adapterId, channelNum)); 6841713e81bSScott Long } 6851713e81bSScott Long #else 6861713e81bSScott Long if (pMvSataChannel->identifyDevice[86] & 0x20) { 6871713e81bSScott Long KdPrint(("RR182x [%d]:channel %d, disable read look ahead\n", 6881713e81bSScott Long pMvSataAdapter->adapterId, channelNum)); 6891713e81bSScott Long if (mvStorageDevATASetFeatures(pMvSataAdapter, channelNum, 6901713e81bSScott Long MV_ATA_SET_FEATURES_DISABLE_RLA, 0, 0, 0, 0) == MV_FALSE) { 6911713e81bSScott Long MV_ERROR("RR182x [%d]:channel %d: ATA Set Features " 6921713e81bSScott Long "failed\n", pMvSataAdapter->adapterId, 6931713e81bSScott Long channelNum); 6941713e81bSScott Long return -1; 6951713e81bSScott Long } 6961713e81bSScott Long } 6971713e81bSScott Long KdPrint(("RR182x [%d]:channel %d, read look ahead disabled\n", 6981713e81bSScott Long pMvSataAdapter->adapterId, channelNum)); 6991713e81bSScott Long #endif 7001713e81bSScott Long 7011713e81bSScott Long #if 0 7021713e81bSScott Long KdPrint(("RR182x [%d]:channel %d, Set standby timer to 200 seconds\n", 7031713e81bSScott Long pMvSataAdapter->adapterId, channelNum)); 7041713e81bSScott Long if (mvStorageDevATAExecuteNonUDMACommand(pMvSataAdapter, channelNum, 7051713e81bSScott Long MV_NON_UDMA_PROTOCOL_NON_DATA, 7061713e81bSScott Long MV_FALSE, /* isEXT*/ 7071713e81bSScott Long NULL, 0, 0, /* features*/ 7081713e81bSScott Long 40, /*sectorCount*/ 7091713e81bSScott Long 0, /*lbaLow*/ 7101713e81bSScott Long 0, /*lbaMid*/ 7111713e81bSScott Long 0, /*lbaHigh*/ 7121713e81bSScott Long 0, /*device*/ 7131713e81bSScott Long MV_ATA_COMMAND_IDLE) == 7141713e81bSScott Long MV_FALSE) { 7151713e81bSScott Long MV_ERROR("RR182x [%d]:channel %d: ATA Idle command failed\n", 7161713e81bSScott Long pMvSataAdapter->adapterId, channelNum); 7171713e81bSScott Long return -1; 7181713e81bSScott Long } 7191713e81bSScott Long #endif 7201713e81bSScott Long 7211713e81bSScott Long #if 0 7221713e81bSScott Long /* 2003-9-16 disable TCQ until we have better solution */ 7231713e81bSScott Long if ((pMvSataChannel->identifyDevice[IDEN_SUPPORTED_COMMANDS2] & 2)) { 7241713e81bSScott Long MV_U8 depth; 7251713e81bSScott Long MV_BOOLEAN result; 7261713e81bSScott Long 7271713e81bSScott Long depth = (pMvSataChannel->identifyDevice[IDEN_QUEUE_DEPTH] & 7281713e81bSScott Long 0x1f) + 1; 7291713e81bSScott Long KdPrint(("RR182x [%d]: channel %d config EDMA, Queued Mode, " 7301713e81bSScott Long "queue depth %d\n", pMvSataAdapter->adapterId, 7311713e81bSScott Long channelNum, depth)); 7321713e81bSScott Long result = mvSataConfigEdmaMode(pMvSataAdapter, channelNum, 7331713e81bSScott Long MV_EDMA_MODE_QUEUED, depth); 7341713e81bSScott Long if (result == MV_FALSE) { 7351713e81bSScott Long MV_ERROR("RR182x [%d] Error: mvSataConfigEdmaMode " 7361713e81bSScott Long "failed\n", pMvSataAdapter->adapterId); 7371713e81bSScott Long return -1; 7381713e81bSScott Long } 7391713e81bSScott Long } else { 7401713e81bSScott Long #endif 7411713e81bSScott Long KdPrint(("RR182x [%d]: channel %d config EDMA, Non Queued Mode\n", 7421713e81bSScott Long pMvSataAdapter->adapterId, channelNum)); 7431713e81bSScott Long if (mvSataConfigEdmaMode(pMvSataAdapter, channelNum, 7441713e81bSScott Long MV_EDMA_MODE_NOT_QUEUED, 0) == MV_FALSE) { 7451713e81bSScott Long MV_ERROR("RR182x [%d] channel %d Error: mvSataConfigEdmaMode " 7461713e81bSScott Long "failed\n", pMvSataAdapter->adapterId, channelNum); 7471713e81bSScott Long return -1; 7481713e81bSScott Long } 7491713e81bSScott Long 7501713e81bSScott Long /* Enable EDMA */ 7511713e81bSScott Long if (mvSataEnableChannelDma(pMvSataAdapter, channelNum) == MV_FALSE) { 7521713e81bSScott Long MV_ERROR("RR182x [%d] Failed to enable DMA, channel=%d\n", 7531713e81bSScott Long pMvSataAdapter->adapterId, channelNum); 7541713e81bSScott Long return -1; 7551713e81bSScott Long } 7561713e81bSScott Long MV_ERROR("RR182x [%d,%d]: channel started successfully\n", 7571713e81bSScott Long pMvSataAdapter->adapterId, channelNum); 7581713e81bSScott Long 7591713e81bSScott Long #ifndef FOR_DEMO 7601713e81bSScott Long set_fail_led(pMvSataAdapter, channelNum, 0); 7611713e81bSScott Long #endif 7621713e81bSScott Long return 0; 7631713e81bSScott Long } 7641713e81bSScott Long 7651713e81bSScott Long static void 7661713e81bSScott Long hptmv_handle_event(void * data, int flag) 7671713e81bSScott Long { 7681713e81bSScott Long IAL_ADAPTER_T *pAdapter; 7691713e81bSScott Long MV_SATA_ADAPTER *pMvSataAdapter; 7701713e81bSScott Long MV_U8 channelIndex; 7711713e81bSScott Long 7721713e81bSScott Long pAdapter = (IAL_ADAPTER_T *)data; 7731713e81bSScott Long pMvSataAdapter = &pAdapter->mvSataAdapter; 7741713e81bSScott Long 7751713e81bSScott Long mvOsSemTake(&pMvSataAdapter->semaphore); 7761713e81bSScott Long for (channelIndex = 0; channelIndex < MV_SATA_CHANNELS_NUM; 7771713e81bSScott Long channelIndex++) { 7781713e81bSScott Long switch(pAdapter->sataEvents[channelIndex]) { 7791713e81bSScott Long case SATA_EVENT_CHANNEL_CONNECTED: 7801713e81bSScott Long /* Handle only connects */ 7811713e81bSScott Long if (flag == 1) 7821713e81bSScott Long break; 7831713e81bSScott Long KdPrint(("RR182x [%d,%d]: new device connected\n", 7841713e81bSScott Long pMvSataAdapter->adapterId, channelIndex)); 7851713e81bSScott Long hptmv_init_channel(pAdapter, channelIndex); 7861713e81bSScott Long if (mvSataConfigureChannel( pMvSataAdapter, 7871713e81bSScott Long channelIndex) == MV_FALSE) { 7881713e81bSScott Long MV_ERROR("RR182x [%d,%d] Failed to configure\n", 7891713e81bSScott Long pMvSataAdapter->adapterId, 7901713e81bSScott Long channelIndex); 7911713e81bSScott Long hptmv_free_channel(pAdapter, channelIndex); 7921713e81bSScott Long } else { 7931713e81bSScott Long #if 0 7941713e81bSScott Long mvSataChannelHardReset(pMvSataAdapter, channel); 7951713e81bSScott Long #endif 7961713e81bSScott Long if (start_channel( pAdapter, channelIndex)) { 7971713e81bSScott Long MV_ERROR("RR182x [%d,%d]Failed to start" 7981713e81bSScott Long " channel\n", 7991713e81bSScott Long pMvSataAdapter->adapterId, 8001713e81bSScott Long channelIndex); 8011713e81bSScott Long hptmv_free_channel(pAdapter, 8021713e81bSScott Long channelIndex); 8031713e81bSScott Long } else { 8041713e81bSScott Long device_change(pAdapter, channelIndex, 8051713e81bSScott Long TRUE); 8061713e81bSScott Long } 8071713e81bSScott Long } 8081713e81bSScott Long pAdapter->sataEvents[channelIndex] = 8091713e81bSScott Long SATA_EVENT_NO_CHANGE; 8101713e81bSScott Long break; 8111713e81bSScott Long 8121713e81bSScott Long case SATA_EVENT_CHANNEL_DISCONNECTED: 8131713e81bSScott Long /* Handle only disconnects */ 8141713e81bSScott Long if (flag == 0) 8151713e81bSScott Long break; 8161713e81bSScott Long KdPrint(("RR182x [%d,%d]: device disconnected\n", 8171713e81bSScott Long pMvSataAdapter->adapterId, channelIndex)); 8181713e81bSScott Long /* Flush pending commands */ 8191713e81bSScott Long if(pMvSataAdapter->sataChannel[channelIndex]) { 8201713e81bSScott Long _VBUS_INST(&pAdapter->VBus) 8211713e81bSScott Long mvSataFlushDmaQueue (pMvSataAdapter, 8221713e81bSScott Long channelIndex, MV_FLUSH_TYPE_CALLBACK); 8231713e81bSScott Long CheckPendingCall(_VBUS_P0); 8241713e81bSScott Long mvSataRemoveChannel(pMvSataAdapter, 8251713e81bSScott Long channelIndex); 8261713e81bSScott Long hptmv_free_channel(pAdapter, channelIndex); 8271713e81bSScott Long pMvSataAdapter->sataChannel[channelIndex] = 8281713e81bSScott Long NULL; 8291713e81bSScott Long KdPrint(("RR182x [%d,%d]: channel removed\n", 8301713e81bSScott Long pMvSataAdapter->adapterId, 8311713e81bSScott Long channelIndex)); 8321713e81bSScott Long if (pAdapter->outstandingCommands==0 && 8331713e81bSScott Long DPC_Request_Nums==0) 8341713e81bSScott Long Check_Idle_Call(pAdapter); 8351713e81bSScott Long } else { 8361713e81bSScott Long KdPrint(("RR182x [%d,%d]: channel already " 8371713e81bSScott Long "removed!!\n", 8381713e81bSScott Long pMvSataAdapter->adapterId, 8391713e81bSScott Long channelIndex)); 8401713e81bSScott Long } 8411713e81bSScott Long pAdapter->sataEvents[channelIndex] = 8421713e81bSScott Long SATA_EVENT_NO_CHANGE; 8431713e81bSScott Long break; 8441713e81bSScott Long 8451713e81bSScott Long case SATA_EVENT_NO_CHANGE: 8461713e81bSScott Long break; 8471713e81bSScott Long 8481713e81bSScott Long default: 8491713e81bSScott Long break; 8501713e81bSScott Long } 8511713e81bSScott Long } 8521713e81bSScott Long mvOsSemRelease(&pMvSataAdapter->semaphore); 8531713e81bSScott Long } 8541713e81bSScott Long 8551713e81bSScott Long #define EVENT_CONNECT 1 8561713e81bSScott Long #define EVENT_DISCONNECT 0 8571713e81bSScott Long 8581713e81bSScott Long static void 8591713e81bSScott Long hptmv_handle_event_connect(void *data) 8601713e81bSScott Long { 8611713e81bSScott Long hptmv_handle_event (data, 0); 8621713e81bSScott Long } 8631713e81bSScott Long 8641713e81bSScott Long static void 8651713e81bSScott Long hptmv_handle_event_disconnect(void *data) 8661713e81bSScott Long { 8671713e81bSScott Long hptmv_handle_event (data, 1); 8681713e81bSScott Long } 8691713e81bSScott Long 8701713e81bSScott Long static MV_BOOLEAN 8711713e81bSScott Long hptmv_event_notify(MV_SATA_ADAPTER *pMvSataAdapter, MV_EVENT_TYPE eventType, 8721713e81bSScott Long MV_U32 param1, MV_U32 param2) 8731713e81bSScott Long { 8741713e81bSScott Long IAL_ADAPTER_T *pAdapter = pMvSataAdapter->IALData; 8751713e81bSScott Long 8761713e81bSScott Long switch (eventType) { 8771713e81bSScott Long case MV_EVENT_TYPE_SATA_CABLE: 8781713e81bSScott Long { 8791713e81bSScott Long MV_U8 channel = param2; 8801713e81bSScott Long 8811713e81bSScott Long if (param1 == EVENT_CONNECT) { 8821713e81bSScott Long pAdapter->sataEvents[channel] = 8831713e81bSScott Long SATA_EVENT_CHANNEL_CONNECTED; 8841713e81bSScott Long KdPrint(("RR182x [%d,%d]: device connected event " 8851713e81bSScott Long "received\n", pMvSataAdapter->adapterId, 8861713e81bSScott Long channel)); 8871713e81bSScott Long /* 8881713e81bSScott Long * Delete previous timers (if multiple drives connected 8891713e81bSScott Long * in the same time 8901713e81bSScott Long */ 8911713e81bSScott Long pAdapter->event_timer_connect = 8921713e81bSScott Long timeout(hptmv_handle_event_connect, pAdapter,10*hz); 8931713e81bSScott Long } else if (param1 == EVENT_DISCONNECT) { 8941713e81bSScott Long pAdapter->sataEvents[channel] = 8951713e81bSScott Long SATA_EVENT_CHANNEL_DISCONNECTED; 8961713e81bSScott Long KdPrint(("RR182x [%d,%d]: device disconnected event " 8971713e81bSScott Long "received \n", pMvSataAdapter->adapterId, 8981713e81bSScott Long channel)); 8991713e81bSScott Long device_change(pAdapter, channel, FALSE); 9001713e81bSScott Long /* 9011713e81bSScott Long * Delete previous timers (if multiple drives 9021713e81bSScott Long * disconnected in the same time 9031713e81bSScott Long */ 9041713e81bSScott Long pAdapter->event_timer_disconnect = 9051713e81bSScott Long timeout(hptmv_handle_event_disconnect, pAdapter, 9061713e81bSScott Long 10*hz); 9071713e81bSScott Long } else { 9081713e81bSScott Long MV_ERROR("RR182x: illigal value for param1(%d) at " 9091713e81bSScott Long "connect/disconect event, host=%d\n", param1, 9101713e81bSScott Long pMvSataAdapter->adapterId ); 9111713e81bSScott Long 9121713e81bSScott Long } 9131713e81bSScott Long break; 9141713e81bSScott Long } 9151713e81bSScott Long case MV_EVENT_TYPE_ADAPTER_ERROR: 9161713e81bSScott Long KdPrint(("RR182x: DEVICE error event received, pci cause " 9171713e81bSScott Long "reg=%x, don't how to handle this\n", param1)); 9181713e81bSScott Long return MV_TRUE; 9191713e81bSScott Long default: 9201713e81bSScott Long MV_ERROR("RR182x[%d]: unknown event type (%d)\n", 9211713e81bSScott Long pMvSataAdapter->adapterId, eventType); 9221713e81bSScott Long return MV_FALSE; 9231713e81bSScott Long } 9241713e81bSScott Long return MV_TRUE; 9251713e81bSScott Long } 9261713e81bSScott Long 9271713e81bSScott Long static void 9281713e81bSScott Long hptmv_map_req(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 9291713e81bSScott Long { 9301713e81bSScott Long dma_addr_t *addr; 9311713e81bSScott Long 9321713e81bSScott Long addr = (dma_addr_t *)arg; 9331713e81bSScott Long 9341713e81bSScott Long if (error || nsegs != 1) 9351713e81bSScott Long return; 9361713e81bSScott Long 9371713e81bSScott Long *addr = segs[0].ds_addr; 9381713e81bSScott Long 9391713e81bSScott Long return; 9401713e81bSScott Long } 9411713e81bSScott Long 9421713e81bSScott Long static int 9431713e81bSScott Long hptmv_allocate_edma_queues(IAL_ADAPTER_T *pAdapter) 9441713e81bSScott Long { 9451713e81bSScott Long if (bus_dmamem_alloc(pAdapter->req_dmat, 9461713e81bSScott Long (void **)&pAdapter->requestsArrayBaseAddr, BUS_DMA_WAITOK, 9471713e81bSScott Long &pAdapter->req_map) != 0) { 9481713e81bSScott Long MV_ERROR("RR182x[%d]: Failed to allocate memory for EDMA " 9491713e81bSScott Long "request queues\n", pAdapter->mvSataAdapter.adapterId); 9501713e81bSScott Long return -1; 9511713e81bSScott Long } 9521713e81bSScott Long 9531713e81bSScott Long (void)bus_dmamap_load(pAdapter->req_dmat, pAdapter->req_map, 9541713e81bSScott Long pAdapter->requestsArrayBaseAddr, REQUESTS_ARRAY_SIZE, hptmv_map_req, 9551713e81bSScott Long &pAdapter->requestsArrayBaseDmaAddr, 0); 9561713e81bSScott Long 9571713e81bSScott Long pAdapter->requestsArrayBaseAlignedAddr = 9581713e81bSScott Long pAdapter->requestsArrayBaseAddr; 9591713e81bSScott Long pAdapter->requestsArrayBaseAlignedAddr += MV_EDMA_REQUEST_QUEUE_SIZE; 9601713e81bSScott Long pAdapter->requestsArrayBaseAlignedAddr = 9611713e81bSScott Long (MV_U8 *)(((ULONG_PTR)pAdapter->requestsArrayBaseAlignedAddr) & 9621713e81bSScott Long ~(ULONG_PTR)(MV_EDMA_REQUEST_QUEUE_SIZE - 1)); 9631713e81bSScott Long pAdapter->requestsArrayBaseDmaAlignedAddr = 9641713e81bSScott Long pAdapter->requestsArrayBaseDmaAddr; 9651713e81bSScott Long pAdapter->requestsArrayBaseDmaAlignedAddr += MV_EDMA_REQUEST_QUEUE_SIZE; 9661713e81bSScott Long pAdapter->requestsArrayBaseDmaAlignedAddr &= 9671713e81bSScott Long ~(ULONG_PTR)(MV_EDMA_REQUEST_QUEUE_SIZE - 1); 9681713e81bSScott Long 9691713e81bSScott Long if ((pAdapter->requestsArrayBaseDmaAlignedAddr - 9701713e81bSScott Long pAdapter->requestsArrayBaseDmaAddr) != 9711713e81bSScott Long (pAdapter->requestsArrayBaseAlignedAddr - 9721713e81bSScott Long pAdapter->requestsArrayBaseAddr)) { 9731713e81bSScott Long MV_ERROR("RR182x[%d]: Error in Request Quueues Alignment\n", 9741713e81bSScott Long pAdapter->mvSataAdapter.adapterId); 9751713e81bSScott Long bus_dmamap_unload(pAdapter->req_dmat, pAdapter->req_map); 9761713e81bSScott Long bus_dmamem_free(pAdapter->req_dmat, 9771713e81bSScott Long pAdapter->requestsArrayBaseAddr, pAdapter->req_map); 9781713e81bSScott Long return -1; 9791713e81bSScott Long } 9801713e81bSScott Long /* response queues */ 9811713e81bSScott Long if (bus_dmamem_alloc(pAdapter->resp_dmat, 9821713e81bSScott Long (void **)&pAdapter->responsesArrayBaseAddr, BUS_DMA_WAITOK, 9831713e81bSScott Long &pAdapter->resp_map) != 0) { 9841713e81bSScott Long MV_ERROR("RR182x[%d]: Failed to allocate memory for EDMA " 9851713e81bSScott Long "response queues\n", pAdapter->mvSataAdapter.adapterId); 9861713e81bSScott Long bus_dmamap_unload(pAdapter->req_dmat, pAdapter->req_map); 9871713e81bSScott Long bus_dmamem_free(pAdapter->req_dmat, 9881713e81bSScott Long pAdapter->requestsArrayBaseAddr, pAdapter->req_map); 9891713e81bSScott Long return -1; 9901713e81bSScott Long } 9911713e81bSScott Long 9921713e81bSScott Long (void)bus_dmamap_load(pAdapter->resp_dmat, pAdapter->resp_map, 9931713e81bSScott Long pAdapter->responsesArrayBaseAddr, RESPONSES_ARRAY_SIZE, 9941713e81bSScott Long hptmv_map_req, &pAdapter->responsesArrayBaseDmaAddr, 0); 9951713e81bSScott Long 9961713e81bSScott Long pAdapter->responsesArrayBaseAlignedAddr = 9971713e81bSScott Long pAdapter->responsesArrayBaseAddr; 9981713e81bSScott Long pAdapter->responsesArrayBaseAlignedAddr += MV_EDMA_RESPONSE_QUEUE_SIZE; 9991713e81bSScott Long pAdapter->responsesArrayBaseAlignedAddr = 10001713e81bSScott Long (MV_U8 *)(((ULONG_PTR)pAdapter->responsesArrayBaseAlignedAddr) & 10011713e81bSScott Long ~(ULONG_PTR)(MV_EDMA_RESPONSE_QUEUE_SIZE - 1)); 10021713e81bSScott Long pAdapter->responsesArrayBaseDmaAlignedAddr = 10031713e81bSScott Long pAdapter->responsesArrayBaseDmaAddr; 10041713e81bSScott Long pAdapter->responsesArrayBaseDmaAlignedAddr += 10051713e81bSScott Long MV_EDMA_RESPONSE_QUEUE_SIZE; 10061713e81bSScott Long pAdapter->responsesArrayBaseDmaAlignedAddr &= 10071713e81bSScott Long ~(ULONG_PTR)(MV_EDMA_RESPONSE_QUEUE_SIZE - 1); 10081713e81bSScott Long 10091713e81bSScott Long if ((pAdapter->responsesArrayBaseDmaAlignedAddr - 10101713e81bSScott Long pAdapter->responsesArrayBaseDmaAddr) != 10111713e81bSScott Long (pAdapter->responsesArrayBaseAlignedAddr - 10121713e81bSScott Long pAdapter->responsesArrayBaseAddr)) { 10131713e81bSScott Long MV_ERROR("RR182x[%d]: Error in Response Quueues Alignment\n", 10141713e81bSScott Long pAdapter->mvSataAdapter.adapterId); 10151713e81bSScott Long hptmv_free_edma_queues(pAdapter); 10161713e81bSScott Long return -1; 10171713e81bSScott Long } 10181713e81bSScott Long return 0; 10191713e81bSScott Long } 10201713e81bSScott Long 10211713e81bSScott Long static void 10221713e81bSScott Long hptmv_free_edma_queues(IAL_ADAPTER_T *pAdapter) 10231713e81bSScott Long { 10241713e81bSScott Long bus_dmamap_unload(pAdapter->req_dmat, pAdapter->req_map); 10251713e81bSScott Long bus_dmamem_free(pAdapter->req_dmat, pAdapter->requestsArrayBaseAddr, 10261713e81bSScott Long pAdapter->req_map); 10271713e81bSScott Long bus_dmamap_unload(pAdapter->resp_dmat, pAdapter->resp_map); 10281713e81bSScott Long bus_dmamem_free(pAdapter->resp_dmat, pAdapter->responsesArrayBaseAddr, 10291713e81bSScott Long pAdapter->resp_map); 10301713e81bSScott Long } 10311713e81bSScott Long 10321713e81bSScott Long static PVOID 10331713e81bSScott Long AllocatePRDTable(IAL_ADAPTER_T *pAdapter) 10341713e81bSScott Long { 10351713e81bSScott Long PVOID ret; 10361713e81bSScott Long if (pAdapter->pFreePRDLink) { 10371713e81bSScott Long KdPrint(("pAdapter->pFreePRDLink:%lx\n", 10381713e81bSScott Long pAdapter->pFreePRDLink)); 10391713e81bSScott Long ret = pAdapter->pFreePRDLink; 10401713e81bSScott Long pAdapter->pFreePRDLink = *(void**)ret; 10411713e81bSScott Long return ret; 10421713e81bSScott Long } 10431713e81bSScott Long return NULL; 10441713e81bSScott Long } 10451713e81bSScott Long 10461713e81bSScott Long static void 10471713e81bSScott Long FreePRDTable(IAL_ADAPTER_T *pAdapter, PVOID PRDTable) 10481713e81bSScott Long { 10491713e81bSScott Long *(void**)PRDTable = pAdapter->pFreePRDLink; 10501713e81bSScott Long pAdapter->pFreePRDLink = PRDTable; 10511713e81bSScott Long } 10521713e81bSScott Long 10531713e81bSScott Long extern PVDevice fGetFirstChild(PVDevice pLogical); 10541713e81bSScott Long extern void fResetBootMark(PVDevice pLogical); 10551713e81bSScott Long static void 10561713e81bSScott Long fRegisterVdevice(IAL_ADAPTER_T *pAdapter) 10571713e81bSScott Long { 10581713e81bSScott Long PVDevice pPhysical, pLogical; 10591713e81bSScott Long PVBus pVBus; 10601713e81bSScott Long int i,j; 10611713e81bSScott Long 10621713e81bSScott Long for(i = 0; i < MV_SATA_CHANNELS_NUM; i++) { 10631713e81bSScott Long pPhysical = &(pAdapter->VDevices[i]); 10641713e81bSScott Long pLogical = pPhysical; 10651713e81bSScott Long while (pLogical->pParent) pLogical = pLogical->pParent; 10661713e81bSScott Long if (pLogical->vf_online==0) { 10671713e81bSScott Long pPhysical->vf_bootmark = pLogical->vf_bootmark = 0; 10681713e81bSScott Long continue; 10691713e81bSScott Long } 10701713e81bSScott Long if (pLogical->VDeviceType == VD_SPARE || 10711713e81bSScott Long pPhysical != fGetFirstChild(pLogical)) 10721713e81bSScott Long continue; 10731713e81bSScott Long 10741713e81bSScott Long pVBus = &pAdapter->VBus; 10751713e81bSScott Long if(pVBus) { 10761713e81bSScott Long j=0; 10771713e81bSScott Long while(j < MAX_VDEVICE_PER_VBUS && pVBus->pVDevice[j]) 10781713e81bSScott Long j++; 10791713e81bSScott Long if (j < MAX_VDEVICE_PER_VBUS) { 10801713e81bSScott Long pVBus->pVDevice[j] = pLogical; 10811713e81bSScott Long pLogical->pVBus = pVBus; 10821713e81bSScott Long 10831713e81bSScott Long if (j>0 && pLogical->vf_bootmark) { 10841713e81bSScott Long if (pVBus->pVDevice[0]->vf_bootmark) { 10851713e81bSScott Long fResetBootMark(pLogical); 10861713e81bSScott Long } else { 10871713e81bSScott Long do { 10881713e81bSScott Long pVBus->pVDevice[j] = 10891713e81bSScott Long pVBus->pVDevice[j-1]; 10901713e81bSScott Long } while (--j); 10911713e81bSScott Long pVBus->pVDevice[0] = pLogical; 10921713e81bSScott Long } 10931713e81bSScott Long } 10941713e81bSScott Long } 10951713e81bSScott Long } 10961713e81bSScott Long } 10971713e81bSScott Long } 10981713e81bSScott Long 10991713e81bSScott Long PVDevice 11001713e81bSScott Long GetSpareDisk(_VBUS_ARG PVDevice pArray) 11011713e81bSScott Long { 11021713e81bSScott Long IAL_ADAPTER_T *pAdapter; 11031713e81bSScott Long ULONG capacity; 11041713e81bSScott Long ULONG thiscap, maxcap = MAX_LBA_T; 11051713e81bSScott Long PVDevice pVDevice, pFind = NULL; 11061713e81bSScott Long int i; 11071713e81bSScott Long 11081713e81bSScott Long pAdapter = (IAL_ADAPTER_T *)pArray->pVBus->OsExt; 11091713e81bSScott Long capacity = 11101713e81bSScott Long LongDiv(pArray->VDeviceCapacity, pArray->u.array.bArnMember-1); 11111713e81bSScott Long for (i = 0;i < MV_SATA_CHANNELS_NUM; i++) { 11121713e81bSScott Long pVDevice = &pAdapter->VDevices[i]; 11131713e81bSScott Long if(!pVDevice) 11141713e81bSScott Long continue; 11151713e81bSScott Long thiscap = pArray->vf_format_v2 ? 11161713e81bSScott Long pVDevice->u.disk.dDeRealCapacity : pVDevice->VDeviceCapacity; 11171713e81bSScott Long /* find the smallest usable spare disk */ 11181713e81bSScott Long if (pVDevice->VDeviceType==VD_SPARE && 11191713e81bSScott Long pVDevice->u.disk.df_on_line && thiscap < maxcap && 11201713e81bSScott Long thiscap >= capacity) { 11211713e81bSScott Long maxcap = pVDevice->VDeviceCapacity; 11221713e81bSScott Long pFind = pVDevice; 11231713e81bSScott Long } 11241713e81bSScott Long } 11251713e81bSScott Long return pFind; 11261713e81bSScott Long } 11271713e81bSScott Long 11281713e81bSScott Long /****************************************************************** 11291713e81bSScott Long * IO ATA Command 11301713e81bSScott Long *******************************************************************/ 11311713e81bSScott Long int HPTLIBAPI 11321713e81bSScott Long fDeReadWrite(PDevice pDev, ULONG Lba, UCHAR Cmd, void *tmpBuffer) 11331713e81bSScott Long { 11341713e81bSScott Long return mvReadWrite(pDev->mv, Lba, Cmd, tmpBuffer); 11351713e81bSScott Long } 11361713e81bSScott Long 11371713e81bSScott Long void HPTLIBAPI fDeSelectMode(PDevice pDev, UCHAR NewMode) 11381713e81bSScott Long { 11391713e81bSScott Long #ifndef SIMULATE 11401713e81bSScott Long MV_SATA_CHANNEL *pSataChannel; 11411713e81bSScott Long MV_SATA_ADAPTER *pSataAdapter; 11421713e81bSScott Long MV_U8 channelIndex; 11431713e81bSScott Long UCHAR mvMode; 11441713e81bSScott Long 11451713e81bSScott Long pSataChannel = pDev->mv; 11461713e81bSScott Long pSataAdapter = pSataChannel->mvSataAdapter; 11471713e81bSScott Long channelIndex = pSataChannel->channelNumber; 11481713e81bSScott Long 11491713e81bSScott Long /* 508x don't use MW-DMA? */ 11501713e81bSScott Long if (NewMode>4 && NewMode<8) NewMode = 4; 11511713e81bSScott Long pDev->bDeModeSetting = NewMode; 11521713e81bSScott Long if (NewMode<=4) 11531713e81bSScott Long mvMode = MV_ATA_TRANSFER_PIO_0 + NewMode; 11541713e81bSScott Long else 11551713e81bSScott Long mvMode = MV_ATA_TRANSFER_UDMA_0 + (NewMode-8); 11561713e81bSScott Long 11571713e81bSScott Long /*To fix 88i8030 bug*/ 11581713e81bSScott Long if (mvMode > MV_ATA_TRANSFER_UDMA_0 && mvMode < MV_ATA_TRANSFER_UDMA_4) 11591713e81bSScott Long mvMode = MV_ATA_TRANSFER_UDMA_0; 11601713e81bSScott Long 11611713e81bSScott Long mvSataDisableChannelDma(pSataAdapter, channelIndex); 11621713e81bSScott Long /* Flush pending commands */ 11631713e81bSScott Long mvSataFlushDmaQueue (pSataAdapter, channelIndex, MV_FLUSH_TYPE_NONE); 11641713e81bSScott Long 11651713e81bSScott Long if (mvStorageDevATASetFeatures(pSataAdapter, channelIndex, 11661713e81bSScott Long MV_ATA_SET_FEATURES_TRANSFER, mvMode, 0, 0, 0) == MV_FALSE) { 11671713e81bSScott Long KdPrint(("channel %d: Set Features failed\n", channelIndex)); 11681713e81bSScott Long } 11691713e81bSScott Long /* Enable EDMA */ 11701713e81bSScott Long if (mvSataEnableChannelDma(pSataAdapter, channelIndex) == MV_FALSE) 11711713e81bSScott Long KdPrint(("Failed to enable DMA, channel=%d", channelIndex)); 11721713e81bSScott Long #endif 11731713e81bSScott Long } 11741713e81bSScott Long 11751713e81bSScott Long #ifdef SUPPORT_ARRAY 11761713e81bSScott Long #define IdeRegisterVDevice fCheckArray 11771713e81bSScott Long #else 11781713e81bSScott Long void 11791713e81bSScott Long IdeRegisterVDevice(PDevice pDev) 11801713e81bSScott Long { 11811713e81bSScott Long PVDevice pVDev = Map2pVDevice(pDev); 11821713e81bSScott Long 11831713e81bSScott Long pVDev->VDeviceType = pDev->df_atapi? VD_ATAPI : 11841713e81bSScott Long pDev->df_removable_drive ? VD_REMOVABLE : VD_SINGLE_DISK; 11851713e81bSScott Long pVDev->vf_online = 1; 11861713e81bSScott Long pVDev->VDeviceCapacity = pDev->dDeRealCapacity; 11871713e81bSScott Long pVDev->pfnSendCommand = pfnSendCommand[pVDev->VDeviceType]; 11881713e81bSScott Long pVDev->pfnDeviceFailed = pfnDeviceFailed[pVDev->VDeviceType]; 11891713e81bSScott Long } 11901713e81bSScott Long #endif 11911713e81bSScott Long 11921713e81bSScott Long static int num_adapters = 0; 11931713e81bSScott Long static int 11941713e81bSScott Long init_adapter(IAL_ADAPTER_T *pAdapter) 11951713e81bSScott Long { 11961713e81bSScott Long PCommand pCmd; 11971713e81bSScott Long pPrivCommand prvCmd; 11981713e81bSScott Long PVBus _vbus_p = &pAdapter->VBus; 11991713e81bSScott Long MV_SATA_ADAPTER *pMvSataAdapter; 12001713e81bSScott Long PUCHAR PRDTable; 12011713e81bSScott Long int i, channel, rid, error; 12021713e81bSScott Long 12031713e81bSScott Long PVDevice pVDev; 12041713e81bSScott Long 12051713e81bSScott Long intrmask_t oldspl = lock_driver(); 12061713e81bSScott Long 12071713e81bSScott Long pAdapter->next = 0; 12081713e81bSScott Long 12091713e81bSScott Long if(gIal_Adapter == 0) { 12101713e81bSScott Long gIal_Adapter = pAdapter; 12111713e81bSScott Long pCurAdapter = gIal_Adapter; 12121713e81bSScott Long } else { 12131713e81bSScott Long pCurAdapter->next = pAdapter; 12141713e81bSScott Long pCurAdapter = pAdapter; 12151713e81bSScott Long } 12161713e81bSScott Long 12171713e81bSScott Long pAdapter->outstandingCommands = 0; 12181713e81bSScott Long 12191713e81bSScott Long pMvSataAdapter = &(pAdapter->mvSataAdapter); 12201713e81bSScott Long _vbus_p->OsExt = (void *)pAdapter; 12211713e81bSScott Long pMvSataAdapter->IALData = pAdapter; 12221713e81bSScott Long 12231713e81bSScott Long if (bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT, 12241713e81bSScott Long BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE_32BIT, 12251713e81bSScott Long MV_MAX_SEGMENTS, BUS_SPACE_MAXSIZE_32BIT, 0, NULL, NULL, 12261713e81bSScott Long &pAdapter->parent_dmat) != 0) { 12271713e81bSScott Long MV_ERROR("RR182x: Failed to create busdma resources\n"); 12281713e81bSScott Long unlock_driver(oldspl); 12291713e81bSScott Long return (ENOMEM); 12301713e81bSScott Long } 12311713e81bSScott Long 12321713e81bSScott Long if (bus_dma_tag_create(pAdapter->parent_dmat, PAGE_SIZE, 0, 12331713e81bSScott Long BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 12341713e81bSScott Long REQUESTS_ARRAY_SIZE, 1, REQUESTS_ARRAY_SIZE, 0, NULL, NULL, 12351713e81bSScott Long &pAdapter->req_dmat) != 0) { 12361713e81bSScott Long MV_ERROR("RR182x: Failed to create busdma resources\n"); 12371713e81bSScott Long error = ENOMEM; 12381713e81bSScott Long goto unregister; 12391713e81bSScott Long } 12401713e81bSScott Long 12411713e81bSScott Long if (bus_dma_tag_create(pAdapter->parent_dmat, PAGE_SIZE, 0, 12421713e81bSScott Long BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 12431713e81bSScott Long RESPONSES_ARRAY_SIZE, 1, RESPONSES_ARRAY_SIZE, 0, NULL, NULL, 12441713e81bSScott Long &pAdapter->resp_dmat) != 0) { 12451713e81bSScott Long MV_ERROR("RR182x: Failed to create busdma resources\n"); 12461713e81bSScott Long error = ENOMEM; 12471713e81bSScott Long goto unregister; 12481713e81bSScott Long } 12491713e81bSScott Long 12501713e81bSScott Long if (bus_dma_tag_create(pAdapter->parent_dmat, 1, 0, 12511713e81bSScott Long BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 12521713e81bSScott Long MAXBSIZE, MV_MAX_SEGMENTS, MAXBSIZE, 0, busdma_lock_mutex, &Giant, 12531713e81bSScott Long &pAdapter->buf_dmat) != 0) { 12541713e81bSScott Long MV_ERROR("RR182x: Failed to create busdma resources\n"); 12551713e81bSScott Long error = ENOMEM; 12561713e81bSScott Long goto unregister; 12571713e81bSScott Long } 12581713e81bSScott Long 12591713e81bSScott Long if (hptmv_allocate_edma_queues(pAdapter)) { 12601713e81bSScott Long MV_ERROR("RR182x: Failed to allocate memory for EDMA queues\n"); 12611713e81bSScott Long error = ENOMEM; 12621713e81bSScott Long goto unregister; 12631713e81bSScott Long } 12641713e81bSScott Long 12651713e81bSScott Long /* also map EPROM address */ 12661713e81bSScott Long rid = 0x10; 12671713e81bSScott Long if ((pAdapter->mem_res = bus_alloc_resource(pAdapter->hpt_dev, 12681713e81bSScott Long SYS_RES_MEMORY, &rid, 0, ~0, MV_SATA_PCI_BAR0_SPACE_SIZE+0x40000, 12691713e81bSScott Long RF_ACTIVE)) == 0) { 12701713e81bSScott Long MV_ERROR("RR182x: Failed to remap memory space\n"); 12711713e81bSScott Long error = ENXIO; 12721713e81bSScott Long goto unregister; 12731713e81bSScott Long } 12741713e81bSScott Long 12751713e81bSScott Long /* 12761713e81bSScott Long * This field is opaque. Abuse it so that the bus_space functions 12771713e81bSScott Long * can get the info that they need when called. 12781713e81bSScott Long */ 12791713e81bSScott Long pMvSataAdapter->adapterIoBaseAddress = pAdapter; 12801713e81bSScott Long pAdapter->mem_bsh = rman_get_bushandle(pAdapter->mem_res); 12811713e81bSScott Long pAdapter->mem_btag = rman_get_bustag(pAdapter->mem_res); 12821713e81bSScott Long 12831713e81bSScott Long pMvSataAdapter->adapterId = num_adapters++; 12841713e81bSScott Long /* get the revision ID */ 12851713e81bSScott Long pMvSataAdapter->pciConfigRevisionId = 12861713e81bSScott Long pci_read_config(pAdapter->hpt_dev, PCIR_REVID, 1); 12871713e81bSScott Long pMvSataAdapter->pciConfigDeviceId = pci_get_device(pAdapter->hpt_dev); 12881713e81bSScott Long 12891713e81bSScott Long /* init RR182x */ 12901713e81bSScott Long pMvSataAdapter->intCoalThre[0]= 1; 12911713e81bSScott Long pMvSataAdapter->intCoalThre[1]= 1; 12921713e81bSScott Long pMvSataAdapter->intTimeThre[0] = 1; 12931713e81bSScott Long pMvSataAdapter->intTimeThre[1] = 1; 12941713e81bSScott Long pMvSataAdapter->pciCommand = 0x0107E371; 12951713e81bSScott Long pMvSataAdapter->pciSerrMask = 0xd77fe6ul; 12961713e81bSScott Long pMvSataAdapter->pciInterruptMask = 0xd77fe6ul; 12971713e81bSScott Long pMvSataAdapter->mvSataEventNotify = hptmv_event_notify; 12981713e81bSScott Long 12991713e81bSScott Long if (mvSataInitAdapter(pMvSataAdapter) == MV_FALSE) { 13001713e81bSScott Long MV_ERROR("RR182x[%d]: core failed to initialize the adapter\n", 13011713e81bSScott Long pMvSataAdapter->adapterId); 13021713e81bSScott Long error = ENXIO; 13031713e81bSScott Long goto unregister; 13041713e81bSScott Long } 13051713e81bSScott Long pAdapter->ver_601 = pMvSataAdapter->pcbVersion; 13061713e81bSScott Long 13071713e81bSScott Long #ifndef FOR_DEMO 13081713e81bSScott Long set_fail_leds(pMvSataAdapter, 0); 13091713e81bSScott Long #endif 13101713e81bSScott Long 13111713e81bSScott Long /* setup command blocks */ 13121713e81bSScott Long KdPrint(("Allocate command blocks\n")); 13131713e81bSScott Long _vbus_(pFreeCommands) = 0; 13141713e81bSScott Long pAdapter->pCommandBlocks = malloc(sizeof(struct _Command) * 13151713e81bSScott Long MAX_COMMAND_BLOCKS_FOR_EACH_VBUS, M_DEVBUF, M_ZERO | M_WAITOK); 13161713e81bSScott Long KdPrint(("pCommandBlocks:%x\n", pAdapter->pCommandBlocks)); 13171713e81bSScott Long 13181713e81bSScott Long /* 13191713e81bSScott Long * Gotta cheat here. The _Command struct only gives us a single 13201713e81bSScott Long * pointer for private data, but we need to store more than that. 13211713e81bSScott Long * Of course the pCommand retains no type stability, and FreeCommand 13221713e81bSScott Long * is hidden in the binary object, so gotta track these on our own 13231713e81bSScott Long * list. 13241713e81bSScott Long */ 13251713e81bSScott Long pAdapter->pPrivateBlocks = malloc(sizeof(struct _privCommand) * 13261713e81bSScott Long MAX_COMMAND_BLOCKS_FOR_EACH_VBUS, M_DEVBUF, M_ZERO | M_WAITOK); 13271713e81bSScott Long TAILQ_INIT(&pAdapter->PrivCmdTQH); 13281713e81bSScott Long 13291713e81bSScott Long for (i = 0; i < MAX_COMMAND_BLOCKS_FOR_EACH_VBUS; i++) { 13301713e81bSScott Long pCmd = &pAdapter->pCommandBlocks[i]; 13311713e81bSScott Long prvCmd = &pAdapter->pPrivateBlocks[i]; 13321713e81bSScott Long prvCmd->pAdapter = pAdapter; 13331713e81bSScott Long if ((error = bus_dmamap_create(pAdapter->buf_dmat, 0, 13341713e81bSScott Long &prvCmd->buf_map)) == 0) { 13351713e81bSScott Long FreeCommand(_VBUS_P (pCmd)); 13361713e81bSScott Long FreePrivCommand(pAdapter, prvCmd); 13371713e81bSScott Long } else 13381713e81bSScott Long break; 13391713e81bSScott Long } 13401713e81bSScott Long 13411713e81bSScott Long /* setup PRD Tables */ 13421713e81bSScott Long KdPrint(("Allocate PRD Tables\n")); 13431713e81bSScott Long pAdapter->pFreePRDLink = 0; 13441713e81bSScott Long 13451713e81bSScott Long if (bus_dma_tag_create(pAdapter->parent_dmat, PAGE_SIZE, 0, 13461713e81bSScott Long BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, 13471713e81bSScott Long PRD_ENTRIES_SIZE * PRD_TABLES_FOR_VBUS, 1, 13481713e81bSScott Long PRD_ENTRIES_SIZE * PRD_TABLES_FOR_VBUS, 0, NULL, NULL, 13491713e81bSScott Long &pAdapter->prd_dmat) != 0) { 13501713e81bSScott Long MV_ERROR("RR182x: Failed to create busdma resources\n"); 13511713e81bSScott Long error = ENOMEM; 13521713e81bSScott Long goto unregister; 13531713e81bSScott Long } 13541713e81bSScott Long 13551713e81bSScott Long if (bus_dmamem_alloc(pAdapter->prd_dmat, 13561713e81bSScott Long (void **)&pAdapter->prdTableAddr, BUS_DMA_WAITOK, 13571713e81bSScott Long &pAdapter->prd_map) != 0) 13581713e81bSScott Long goto unregister; 13591713e81bSScott Long 13601713e81bSScott Long (void)bus_dmamap_load(pAdapter->prd_dmat, pAdapter->prd_map, 13611713e81bSScott Long pAdapter->prdTableAddr, PRD_ENTRIES_SIZE * PRD_TABLES_FOR_VBUS, 13621713e81bSScott Long hptmv_map_req, &pAdapter->prdTableDmaAddr, 0); 13631713e81bSScott Long 13641713e81bSScott Long KdPrint(("prdTableAddr:%x\n",pAdapter->prdTableAddr)); 13651713e81bSScott Long if (!pAdapter->prdTableAddr) { 13661713e81bSScott Long MV_ERROR("insufficient PRD Tables\n"); 13671713e81bSScott Long error = ENOMEM; 13681713e81bSScott Long goto unregister; 13691713e81bSScott Long } 13701713e81bSScott Long 13711713e81bSScott Long PRDTable = pAdapter->prdTableAddr; 13721713e81bSScott Long for (i = 0; i < PRD_TABLES_FOR_VBUS; i++) { 13731713e81bSScott Long KdPrint(("i= %d, pAdapter->pFreePRDLink= %p\n", i, 13741713e81bSScott Long pAdapter->pFreePRDLink)); 13751713e81bSScott Long FreePRDTable(pAdapter, PRDTable); 13761713e81bSScott Long PRDTable += PRD_ENTRIES_SIZE; 13771713e81bSScott Long } 13781713e81bSScott Long 13791713e81bSScott Long /* enable the adapter interrupts */ 13801713e81bSScott Long 13811713e81bSScott Long /* configure and start the connected channels*/ 13821713e81bSScott Long for (channel = 0; channel < MV_SATA_CHANNELS_NUM; channel++) { 13831713e81bSScott Long pAdapter->mvChannel[channel].online = MV_FALSE; 13841713e81bSScott Long if (mvSataIsStorageDeviceConnected(pMvSataAdapter, channel) 13851713e81bSScott Long != MV_TRUE) 13861713e81bSScott Long continue; 13871713e81bSScott Long 13881713e81bSScott Long KdPrint(("RR182x[%d]: channel %d is connected\n", 13891713e81bSScott Long pMvSataAdapter->adapterId, channel)); 13901713e81bSScott Long 13911713e81bSScott Long if (hptmv_init_channel(pAdapter, channel) == 0) { 13921713e81bSScott Long if (mvSataConfigureChannel(pMvSataAdapter, channel) 13931713e81bSScott Long == MV_FALSE) { 13941713e81bSScott Long MV_ERROR("RR182x[%d]: Failed to configure " 13951713e81bSScott Long "channel %d\n", pMvSataAdapter->adapterId, 13961713e81bSScott Long channel); 13971713e81bSScott Long hptmv_free_channel(pAdapter, channel); 13981713e81bSScott Long continue; 13991713e81bSScott Long } 14001713e81bSScott Long if (start_channel(pAdapter, channel)) { 14011713e81bSScott Long MV_ERROR("RR182x[%d]: Failed to start channel, " 14021713e81bSScott Long "channel=%d\n", pMvSataAdapter->adapterId, 14031713e81bSScott Long channel); 14041713e81bSScott Long hptmv_free_channel(pAdapter, channel); 14051713e81bSScott Long } 14061713e81bSScott Long pAdapter->mvChannel[channel].online = MV_TRUE; 14071713e81bSScott Long #if 0 14081713e81bSScott Long mvSataChannelSetEdmaLoopBackMode( 14091713e81bSScott Long pMvSataAdapter, channel, MV_TRUE); 14101713e81bSScott Long #endif 14111713e81bSScott Long } 14121713e81bSScott Long KdPrint(("pAdapter->mvChannel[channel].online:%x, channel:%d\n", 14131713e81bSScott Long pAdapter->mvChannel[channel].online, channel)); 14141713e81bSScott Long } 14151713e81bSScott Long 14161713e81bSScott Long #ifdef SUPPORT_ARRAY 14171713e81bSScott Long for(i = MAX_ARRAY_DEVICE - 1; i >= 0; i--) { 14181713e81bSScott Long pVDev = ArrayTables(i); 14191713e81bSScott Long mArFreeArrayTable(pVDev); 14201713e81bSScott Long } 14211713e81bSScott Long #endif 14221713e81bSScott Long 14231713e81bSScott Long KdPrint(("Initialize Devices\n")); 14241713e81bSScott Long for (channel = 0; channel < MV_SATA_CHANNELS_NUM; channel++) { 14251713e81bSScott Long MV_SATA_CHANNEL *pMvSataChannel; 14261713e81bSScott Long 14271713e81bSScott Long pMvSataChannel = pMvSataAdapter->sataChannel[channel]; 14281713e81bSScott Long if (pMvSataChannel) { 14291713e81bSScott Long init_vdev_params(pAdapter, channel); 14301713e81bSScott Long IdeRegisterVDevice(&pAdapter->VDevices[channel].u.disk); 14311713e81bSScott Long } 14321713e81bSScott Long } 14331713e81bSScott Long #ifdef SUPPORT_ARRAY 14341713e81bSScott Long CheckArrayCritical(_VBUS_P0); 14351713e81bSScott Long #endif 14361713e81bSScott Long _vbus_p->nInstances = 1; 14371713e81bSScott Long fRegisterVdevice(pAdapter); 14381713e81bSScott Long 14391713e81bSScott Long for (channel=0;channel<MV_SATA_CHANNELS_NUM;channel++) { 14401713e81bSScott Long pVDev = _vbus_p->pVDevice[channel]; 14411713e81bSScott Long if (pVDev && pVDev->vf_online) 14421713e81bSScott Long fCheckBootable(pVDev); 14431713e81bSScott Long } 14441713e81bSScott Long 14451713e81bSScott Long #if defined(SUPPORT_ARRAY) && defined(_RAID5N_) 14461713e81bSScott Long init_raid5_memory(_VBUS_P0); 14471713e81bSScott Long _vbus_(r5).enable_write_back = 1; 14481713e81bSScott Long printf("RR182x: RAID5 write-back %s\n", 14491713e81bSScott Long _vbus_(r5).enable_write_back? "enabled" : "disabled"); 14501713e81bSScott Long #endif 14511713e81bSScott Long 14521713e81bSScott Long mvSataUnmaskAdapterInterrupt(pMvSataAdapter); 14531713e81bSScott Long unlock_driver(oldspl); 14541713e81bSScott Long return 0; 14551713e81bSScott Long 14561713e81bSScott Long unregister: 14571713e81bSScott Long if (pAdapter->mem_res != 0) 14581713e81bSScott Long bus_release_resource(pAdapter->hpt_dev, SYS_RES_MEMORY, rid, 14591713e81bSScott Long pAdapter->mem_res); 14601713e81bSScott Long 14611713e81bSScott Long hptmv_free_edma_queues(pAdapter); 14621713e81bSScott Long 14631713e81bSScott Long if (pAdapter->resp_dmat != NULL) 14641713e81bSScott Long bus_dma_tag_destroy(pAdapter->resp_dmat); 14651713e81bSScott Long if (pAdapter->req_dmat != NULL) 14661713e81bSScott Long bus_dma_tag_destroy(pAdapter->req_dmat); 14671713e81bSScott Long if (pAdapter->buf_dmat != NULL) 14681713e81bSScott Long bus_dma_tag_destroy(pAdapter->buf_dmat); 14691713e81bSScott Long if (pAdapter->parent_dmat != NULL) 14701713e81bSScott Long bus_dma_tag_destroy(pAdapter->parent_dmat); 14711713e81bSScott Long 14721713e81bSScott Long unlock_driver(oldspl); 14731713e81bSScott Long return error; 14741713e81bSScott Long } 14751713e81bSScott Long 14761713e81bSScott Long int 14771713e81bSScott Long MvSataResetChannel(MV_SATA_ADAPTER *pMvSataAdapter, MV_U8 channel) 14781713e81bSScott Long { 14791713e81bSScott Long IAL_ADAPTER_T *pAdapter = (IAL_ADAPTER_T *)pMvSataAdapter->IALData; 14801713e81bSScott Long 14811713e81bSScott Long mvSataDisableChannelDma(pMvSataAdapter, channel); 14821713e81bSScott Long 14831713e81bSScott Long /* Flush pending commands */ 14841713e81bSScott Long mvSataFlushDmaQueue (pMvSataAdapter, channel, MV_FLUSH_TYPE_CALLBACK); 14851713e81bSScott Long 14861713e81bSScott Long /* Software reset channel */ 14871713e81bSScott Long if (mvStorageDevATASoftResetDevice(pMvSataAdapter, channel) == 14881713e81bSScott Long MV_FALSE) { 14891713e81bSScott Long MV_ERROR("RR182x [%d,%d]: failed to perform Software reset\n", 14901713e81bSScott Long pMvSataAdapter->adapterId, channel); 14911713e81bSScott Long return -1; 14921713e81bSScott Long } 14931713e81bSScott Long 14941713e81bSScott Long /* Hardware reset channel */ 14951713e81bSScott Long if (mvSataChannelHardReset(pMvSataAdapter, channel)== MV_FALSE) { 14961713e81bSScott Long MV_ERROR("RR182x [%d,%d] Failed to Hard reser the SATA " 14971713e81bSScott Long "channel\n", pMvSataAdapter->adapterId, channel); 14981713e81bSScott Long hptmv_free_channel(pAdapter, channel); 14991713e81bSScott Long return -1; 15001713e81bSScott Long } 15011713e81bSScott Long 15021713e81bSScott Long if (mvSataIsStorageDeviceConnected(pMvSataAdapter, channel) == 15031713e81bSScott Long MV_FALSE) { 15041713e81bSScott Long MV_ERROR("RR182x [%d,%d] Failed to Connect Device\n", 15051713e81bSScott Long pMvSataAdapter->adapterId, channel); 15061713e81bSScott Long hptmv_free_channel(pAdapter, channel); 15071713e81bSScott Long return -1; 15081713e81bSScott Long } else { 15091713e81bSScott Long /* Set transfer mode */ 15101713e81bSScott Long if((mvStorageDevATASetFeatures(pMvSataAdapter, channel, 15111713e81bSScott Long MV_ATA_SET_FEATURES_TRANSFER, MV_ATA_TRANSFER_PIO_SLOW, 0, 15121713e81bSScott Long 0, 0) == MV_FALSE) || 15131713e81bSScott Long (mvStorageDevATASetFeatures(pMvSataAdapter, channel, 15141713e81bSScott Long MV_ATA_SET_FEATURES_TRANSFER, 15151713e81bSScott Long pAdapter->mvChannel[channel].maxPioModeSupported, 0, 0, 0) 15161713e81bSScott Long == MV_FALSE) || (mvStorageDevATASetFeatures(pMvSataAdapter, 15171713e81bSScott Long channel, MV_ATA_SET_FEATURES_TRANSFER, 15181713e81bSScott Long pAdapter->mvChannel[channel].maxUltraDmaModeSupported, 0, 15191713e81bSScott Long 0, 0) == MV_FALSE)) { 15201713e81bSScott Long MV_ERROR("channel %d: Set Features failed", channel); 15211713e81bSScott Long hptmv_free_channel(pAdapter, channel); 15221713e81bSScott Long return -1; 15231713e81bSScott Long } 15241713e81bSScott Long /* Enable EDMA */ 15251713e81bSScott Long if (mvSataEnableChannelDma(pMvSataAdapter, channel)==MV_FALSE) { 15261713e81bSScott Long MV_ERROR("Failed to enable DMA, channel=%d", channel); 15271713e81bSScott Long hptmv_free_channel(pAdapter, channel); 15281713e81bSScott Long return -1; 15291713e81bSScott Long } 15301713e81bSScott Long } 15311713e81bSScott Long return 0; 15321713e81bSScott Long } 15331713e81bSScott Long 15341713e81bSScott Long static int 15351713e81bSScott Long fResetActiveCommands(PVBus _vbus_p) 15361713e81bSScott Long { 15371713e81bSScott Long MV_SATA_ADAPTER *pMvSataAdapter; 15381713e81bSScott Long MV_U8 channel; 15391713e81bSScott Long int rtn = 0; 15401713e81bSScott Long 15411713e81bSScott Long pMvSataAdapter = &((IAL_ADAPTER_T *)_vbus_p->OsExt)->mvSataAdapter; 15421713e81bSScott Long for (channel=0;channel< MV_SATA_CHANNELS_NUM;channel++) { 15431713e81bSScott Long if (pMvSataAdapter->sataChannel[channel] && 15441713e81bSScott Long pMvSataAdapter->sataChannel[channel]->outstandingCommands) 15451713e81bSScott Long if (MvSataResetChannel(pMvSataAdapter,channel) == -1) 15461713e81bSScott Long rtn = -1; 15471713e81bSScott Long } 15481713e81bSScott Long HPT_ASSERT(rtn==0); 15491713e81bSScott Long return 0; 15501713e81bSScott Long } 15511713e81bSScott Long 15521713e81bSScott Long void 15531713e81bSScott Long fCompleteAllCommandsSynchronously(PVBus _vbus_p) 15541713e81bSScott Long { 15551713e81bSScott Long UINT cont; 15561713e81bSScott Long ULONG ticks = 0; 15571713e81bSScott Long MV_U8 channel; 15581713e81bSScott Long MV_SATA_ADAPTER *pMvSataAdapter; 15591713e81bSScott Long MV_SATA_CHANNEL *pMvSataChannel; 15601713e81bSScott Long 15611713e81bSScott Long pMvSataAdapter = &((IAL_ADAPTER_T *)_vbus_p->OsExt)->mvSataAdapter; 15621713e81bSScott Long do { 15631713e81bSScott Long check_cmds: 15641713e81bSScott Long cont = 0; 15651713e81bSScott Long CheckPendingCall(_VBUS_P0); 15661713e81bSScott Long #ifdef _RAID5N_ 15671713e81bSScott Long dataxfer_poll(); 15681713e81bSScott Long xor_poll(); 15691713e81bSScott Long #endif 15701713e81bSScott Long for (channel = 0; channel < MV_SATA_CHANNELS_NUM; channel++) { 15711713e81bSScott Long pMvSataChannel = pMvSataAdapter->sataChannel[channel]; 15721713e81bSScott Long if (pMvSataChannel && 15731713e81bSScott Long pMvSataChannel->outstandingCommands) { 15741713e81bSScott Long while (pMvSataChannel->outstandingCommands) { 15751713e81bSScott Long if (!mvSataInterruptServiceRoutine( 15761713e81bSScott Long pMvSataAdapter)) { 15771713e81bSScott Long StallExec(1000); 15781713e81bSScott Long if (ticks++ > 3000) { 15791713e81bSScott Long MvSataResetChannel( 15801713e81bSScott Long pMvSataAdapter, 15811713e81bSScott Long channel); 15821713e81bSScott Long goto check_cmds; 15831713e81bSScott Long } 15841713e81bSScott Long } else 15851713e81bSScott Long ticks = 0; 15861713e81bSScott Long } 15871713e81bSScott Long cont = 1; 15881713e81bSScott Long } 15891713e81bSScott Long } 15901713e81bSScott Long } while (cont); 15911713e81bSScott Long } 15921713e81bSScott Long 15931713e81bSScott Long void 15941713e81bSScott Long fResetVBus(_VBUS_ARG0) 15951713e81bSScott Long { 15961713e81bSScott Long KdPrint(("fMvResetBus(%x)", _vbus_p)); 15971713e81bSScott Long 15981713e81bSScott Long /* some commands may already finished. */ 15991713e81bSScott Long CheckPendingCall(_VBUS_P0); 16001713e81bSScott Long 16011713e81bSScott Long fResetActiveCommands(_vbus_p); 16021713e81bSScott Long /* 16031713e81bSScott Long * the other pending commands may still be finished successfully. 16041713e81bSScott Long */ 16051713e81bSScott Long fCompleteAllCommandsSynchronously(_vbus_p); 16061713e81bSScott Long 16071713e81bSScott Long /* Now there should be no pending commands. No more action needed. */ 16081713e81bSScott Long CheckIdleCall(_VBUS_P0); 16091713e81bSScott Long 16101713e81bSScott Long KdPrint(("fMvResetBus() done")); 16111713e81bSScott Long } 16121713e81bSScott Long 16131713e81bSScott Long void 16141713e81bSScott Long fRescanAllDevice(_VBUS_ARG0) 16151713e81bSScott Long { 16161713e81bSScott Long } 16171713e81bSScott Long 16181713e81bSScott Long static MV_BOOLEAN 16191713e81bSScott Long CommandCompletionCB(MV_SATA_ADAPTER *pMvSataAdapter, MV_U8 channelNum, 16201713e81bSScott Long MV_COMPLETION_TYPE comp_type, MV_VOID_PTR commandId, MV_U16 responseFlags, 16211713e81bSScott Long MV_U32 timeStamp, MV_STORAGE_DEVICE_REGISTERS *registerStruct) 16221713e81bSScott Long { 16231713e81bSScott Long PCommand pCmd = (PCommand) commandId; 16241713e81bSScott Long _VBUS_INST(pCmd->pVDevice->pVBus) 16251713e81bSScott Long 16261713e81bSScott Long if (pCmd->uScratch.sata_param.prdAddr) 16271713e81bSScott Long FreePRDTable(pMvSataAdapter->IALData, 16281713e81bSScott Long pCmd->uScratch.sata_param.prdAddr); 16291713e81bSScott Long 16301713e81bSScott Long switch (comp_type) { 16311713e81bSScott Long case MV_COMPLETION_TYPE_NORMAL: 16321713e81bSScott Long pCmd->Result = RETURN_SUCCESS; 16331713e81bSScott Long break; 16341713e81bSScott Long case MV_COMPLETION_TYPE_ABORT: 16351713e81bSScott Long pCmd->Result = RETURN_BUS_RESET; 16361713e81bSScott Long break; 16371713e81bSScott Long case MV_COMPLETION_TYPE_ERROR: 16381713e81bSScott Long MV_ERROR("IAL: COMPLETION ERROR, adapter %d, channel %d, " 16391713e81bSScott Long "flags=%x\n", pMvSataAdapter->adapterId, channelNum, 16401713e81bSScott Long responseFlags); 16411713e81bSScott Long 16421713e81bSScott Long if (responseFlags & 4) { 16431713e81bSScott Long MV_ERROR("ATA regs: error %x, sector count %x, LBA low " 16441713e81bSScott Long "%x, LBA mid %x, LBA high %x, device %x, " 16451713e81bSScott Long "status %x\n", registerStruct->errorRegister, 16461713e81bSScott Long registerStruct->sectorCountRegister, 16471713e81bSScott Long registerStruct->lbaLowRegister, 16481713e81bSScott Long registerStruct->lbaMidRegister, 16491713e81bSScott Long registerStruct->lbaHighRegister, 16501713e81bSScott Long registerStruct->deviceRegister, 16511713e81bSScott Long registerStruct->statusRegister); 16521713e81bSScott Long } 16531713e81bSScott Long /* 16541713e81bSScott Long * We can't do handleEdmaError directly here, because 16551713e81bSScott Long * CommandCompletionCB is called by mv's ISR, if we retry the 16561713e81bSScott Long * command, than the internel data structure may be destroyed 16571713e81bSScott Long */ 16581713e81bSScott Long pCmd->uScratch.sata_param.responseFlags = responseFlags; 16591713e81bSScott Long pCmd->uScratch.sata_param.bIdeStatus = 16601713e81bSScott Long registerStruct->statusRegister; 16611713e81bSScott Long pCmd->uScratch.sata_param.errorRegister = 16621713e81bSScott Long registerStruct->errorRegister; 16631713e81bSScott Long pCmd->pVDevice->u.disk.QueueLength--; 16641713e81bSScott Long CallAfterReturn(_VBUS_P (DPC_PROC)handleEdmaError,pCmd); 16651713e81bSScott Long return TRUE; 16661713e81bSScott Long 16671713e81bSScott Long default: 16681713e81bSScott Long MV_ERROR(" Unknown completion type (%d)\n", comp_type); 16691713e81bSScott Long return MV_FALSE; 16701713e81bSScott Long } 16711713e81bSScott Long 16721713e81bSScott Long if (pCmd->uCmd.Ide.Command == IDE_COMMAND_VERIFY && 16731713e81bSScott Long pCmd->uScratch.sata_param.cmd_priv > 1) { 16741713e81bSScott Long pCmd->uScratch.sata_param.cmd_priv --; 16751713e81bSScott Long return TRUE; 16761713e81bSScott Long } 16771713e81bSScott Long pCmd->pVDevice->u.disk.QueueLength--; 16781713e81bSScott Long CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd); 16791713e81bSScott Long return TRUE; 16801713e81bSScott Long } 16811713e81bSScott Long 16821713e81bSScott Long void 16831713e81bSScott Long fDeviceSendCommand(_VBUS_ARG PCommand pCmd) 16841713e81bSScott Long { 16851713e81bSScott Long MV_SATA_EDMA_PRD_ENTRY *pPRDTable = 0; 16861713e81bSScott Long MV_SATA_ADAPTER *pMvSataAdapter; 16871713e81bSScott Long MV_SATA_CHANNEL *pMvSataChannel; 16881713e81bSScott Long IAL_ADAPTER_T *pAdapter; 16891713e81bSScott Long MV_QUEUE_COMMAND_RESULT result; 16901713e81bSScott Long MV_QUEUE_COMMAND_INFO commandInfo; 16911713e81bSScott Long MV_UDMA_COMMAND_PARAMS *pUdmaParams; 16921713e81bSScott Long MV_NONE_UDMA_COMMAND_PARAMS *pNoUdmaParams; 16931713e81bSScott Long MV_BOOLEAN is48bit = MV_FALSE; 16941713e81bSScott Long PVDevice pVDevice; 16951713e81bSScott Long PDevice pDevice; 16961713e81bSScott Long ULONG Lba; 16971713e81bSScott Long USHORT nSector; 16981713e81bSScott Long MV_U8 channel; 16991713e81bSScott Long int i=0; 17001713e81bSScott Long 17011713e81bSScott Long pVDevice = pCmd->pVDevice; 17021713e81bSScott Long pDevice = &pVDevice->u.disk; 17031713e81bSScott Long Lba = pCmd->uCmd.Ide.Lba; 17041713e81bSScott Long nSector = pCmd->uCmd.Ide.nSectors; 17051713e81bSScott Long pUdmaParams = &commandInfo.commandParams.udmaCommand; 17061713e81bSScott Long pNoUdmaParams = &commandInfo.commandParams.NoneUdmaCommand; 17071713e81bSScott Long 17081713e81bSScott Long DECLARE_BUFFER(FPSCAT_GATH, tmpSg); 17091713e81bSScott Long 17101713e81bSScott Long if (!pDevice->df_on_line) { 17111713e81bSScott Long MV_ERROR("Device is offline"); 17121713e81bSScott Long pCmd->Result = RETURN_BAD_DEVICE; 17131713e81bSScott Long CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd); 17141713e81bSScott Long return; 17151713e81bSScott Long } 17161713e81bSScott Long 17171713e81bSScott Long pDevice->HeadPosition = pCmd->uCmd.Ide.Lba + pCmd->uCmd.Ide.nSectors; 17181713e81bSScott Long pMvSataChannel = pDevice->mv; 17191713e81bSScott Long pMvSataAdapter = pMvSataChannel->mvSataAdapter; 17201713e81bSScott Long channel = pMvSataChannel->channelNumber; 17211713e81bSScott Long pAdapter = pMvSataAdapter->IALData; 17221713e81bSScott Long 17231713e81bSScott Long /* 17241713e81bSScott Long * Old RAID0 has hidden lba. Remember to clear dDeHiddenLba when 17251713e81bSScott Long * deleting array! 17261713e81bSScott Long */ 17271713e81bSScott Long Lba += pDevice->dDeHiddenLba; 17281713e81bSScott Long /* check LBA */ 17291713e81bSScott Long if (Lba+nSector-1 > pDevice->dDeRealCapacity) { 17301713e81bSScott Long pCmd->Result = RETURN_INVALID_REQUEST; 17311713e81bSScott Long CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd); 17321713e81bSScott Long return; 17331713e81bSScott Long } 17341713e81bSScott Long 17351713e81bSScott Long if(Lba & 0xF0000000){ 17361713e81bSScott Long is48bit = MV_TRUE; 17371713e81bSScott Long } 17381713e81bSScott Long 17391713e81bSScott Long switch (pCmd->uCmd.Ide.Command) { 17401713e81bSScott Long case IDE_COMMAND_READ: 17411713e81bSScott Long case IDE_COMMAND_WRITE: 17421713e81bSScott Long if (pDevice->bDeModeSetting<8) goto pio; 17431713e81bSScott Long 17441713e81bSScott Long commandInfo.type = MV_QUEUED_COMMAND_TYPE_UDMA; 17451713e81bSScott Long pUdmaParams->isEXT = is48bit; 17461713e81bSScott Long pUdmaParams->numOfSectors = nSector; 17471713e81bSScott Long pUdmaParams->lowLBAAddress = Lba; 17481713e81bSScott Long pUdmaParams->highLBAAddress = 0; 17491713e81bSScott Long pUdmaParams->prdHighAddr = 0; 17501713e81bSScott Long pUdmaParams->callBack = CommandCompletionCB; 17511713e81bSScott Long pUdmaParams->commandId = (MV_VOID_PTR )pCmd; 17521713e81bSScott Long if(pCmd->uCmd.Ide.Command == IDE_COMMAND_READ) 17531713e81bSScott Long pUdmaParams->readWrite = MV_UDMA_TYPE_READ; 17541713e81bSScott Long else 17551713e81bSScott Long pUdmaParams->readWrite = MV_UDMA_TYPE_WRITE; 17561713e81bSScott Long 17571713e81bSScott Long if (pCmd->pSgTable && pCmd->cf_physical_sg) { 17581713e81bSScott Long FPSCAT_GATH sg1=tmpSg, sg2=pCmd->pSgTable; 17591713e81bSScott Long do { 17601713e81bSScott Long *sg1++=*sg2; 17611713e81bSScott Long } while ((sg2++->wSgFlag & SG_FLAG_EOT)==0); 17621713e81bSScott Long } else if (!pCmd->pfnBuildSgl || 17631713e81bSScott Long !pCmd->pfnBuildSgl(_VBUS_P pCmd, tmpSg, 0)) { 17641713e81bSScott Long pio: 17651713e81bSScott Long mvSataDisableChannelDma(pMvSataAdapter, channel); 17661713e81bSScott Long mvSataFlushDmaQueue(pMvSataAdapter, channel, 17671713e81bSScott Long MV_FLUSH_TYPE_CALLBACK); 17681713e81bSScott Long 17691713e81bSScott Long if (pCmd->pSgTable && pCmd->cf_physical_sg==0) { 17701713e81bSScott Long FPSCAT_GATH sg1=tmpSg, sg2=pCmd->pSgTable; 17711713e81bSScott Long do { 17721713e81bSScott Long *sg1++=*sg2; 17731713e81bSScott Long } while ((sg2++->wSgFlag & SG_FLAG_EOT)==0); 17741713e81bSScott Long } else if (!pCmd->pfnBuildSgl || 17751713e81bSScott Long !pCmd->pfnBuildSgl(_VBUS_P pCmd, tmpSg, 1)){ 17761713e81bSScott Long pCmd->Result = RETURN_NEED_LOGICAL_SG; 17771713e81bSScott Long goto finish_cmd; 17781713e81bSScott Long } 17791713e81bSScott Long 17801713e81bSScott Long do { 17811713e81bSScott Long ULONG size; 17821713e81bSScott Long ULONG_PTR addr = tmpSg->dSgAddress; 17831713e81bSScott Long 17841713e81bSScott Long size = tmpSg->wSgSize? tmpSg->wSgSize : 0x10000; 17851713e81bSScott Long if (size & 0x1ff) { 17861713e81bSScott Long pCmd->Result = RETURN_INVALID_REQUEST; 17871713e81bSScott Long goto finish_cmd; 17881713e81bSScott Long } 17891713e81bSScott Long if (mvStorageDevATAExecuteNonUDMACommand( 17901713e81bSScott Long pMvSataAdapter, channel, 17911713e81bSScott Long (pCmd->cf_data_out) ? 17921713e81bSScott Long MV_NON_UDMA_PROTOCOL_PIO_DATA_OUT : 17931713e81bSScott Long MV_NON_UDMA_PROTOCOL_PIO_DATA_IN, 17941713e81bSScott Long is48bit, (MV_U16_PTR)addr, 17951713e81bSScott Long size >> 1, /* count */ 17961713e81bSScott Long 0, /* features N/A */ 17971713e81bSScott Long (MV_U16)(size>>9), /*sector count*/ 17981713e81bSScott Long (MV_U16)((is48bit ? 17991713e81bSScott Long (MV_U16)((Lba >> 16) & 0xFF00) : 0 ) | 18001713e81bSScott Long (UCHAR)(Lba & 0xFF) ), /*lbalow*/ 18011713e81bSScott Long (MV_U16)((Lba >> 8) & 0xFF), /* lbaMid */ 18021713e81bSScott Long (MV_U16)((Lba >> 16) & 0xFF),/* lbaHig */ 18031713e81bSScott Long (MV_U8)(0x40 | (is48bit ? 0 : 18041713e81bSScott Long (UCHAR)(Lba >> 24) & 0xFF )),/* device */ 18051713e81bSScott Long (MV_U8)(is48bit ? (pCmd->cf_data_in ? 18061713e81bSScott Long IDE_COMMAND_READ_EXT : 18071713e81bSScott Long IDE_COMMAND_WRITE_EXT) : 18081713e81bSScott Long pCmd->uCmd.Ide.Command))==MV_FALSE) { 18091713e81bSScott Long pCmd->Result = RETURN_IDE_ERROR; 18101713e81bSScott Long goto finish_cmd; 18111713e81bSScott Long } 18121713e81bSScott Long Lba += size>>9; 18131713e81bSScott Long if(Lba & 0xF0000000) is48bit = MV_TRUE; 18141713e81bSScott Long } 18151713e81bSScott Long while ((tmpSg++->wSgFlag & SG_FLAG_EOT)==0); 18161713e81bSScott Long pCmd->Result = RETURN_SUCCESS; 18171713e81bSScott Long finish_cmd: 18181713e81bSScott Long mvSataEnableChannelDma(pMvSataAdapter,channel); 18191713e81bSScott Long CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, 18201713e81bSScott Long pCmd); 18211713e81bSScott Long return; 18221713e81bSScott Long } 18231713e81bSScott Long 18241713e81bSScott Long pPRDTable = AllocatePRDTable(pAdapter); 18251713e81bSScott Long KdPrint(("pPRDTable:%lx\n",pPRDTable)); 18261713e81bSScott Long if (!pPRDTable) { 18271713e81bSScott Long pCmd->Result = RETURN_DEVICE_BUSY; 18281713e81bSScott Long CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, 18291713e81bSScott Long pCmd); 18301713e81bSScott Long HPT_ASSERT(0); 18311713e81bSScott Long return; 18321713e81bSScott Long } 18331713e81bSScott Long 18341713e81bSScott Long do { 18351713e81bSScott Long pPRDTable[i].highBaseAddr = 0; 18361713e81bSScott Long pPRDTable[i].flags = (MV_U16)tmpSg->wSgFlag; 18371713e81bSScott Long pPRDTable[i].byteCount = (MV_U16)tmpSg->wSgSize; 18381713e81bSScott Long pPRDTable[i].lowBaseAddr = (MV_U32)tmpSg->dSgAddress; 18391713e81bSScott Long pPRDTable[i].reserved = 0; 18401713e81bSScott Long i++; 18411713e81bSScott Long } while((tmpSg++->wSgFlag & SG_FLAG_EOT)==0); 18421713e81bSScott Long 18431713e81bSScott Long pUdmaParams->prdLowAddr = pAdapter->prdTableDmaAddr + 18441713e81bSScott Long ((ULONG)pPRDTable - (ULONG)pAdapter->prdTableAddr); 18451713e81bSScott Long 18461713e81bSScott Long if ((pUdmaParams->numOfSectors == 256) && 18471713e81bSScott Long (pMvSataChannel->lba48Address == MV_FALSE)) { 18481713e81bSScott Long pUdmaParams->numOfSectors = 0; 18491713e81bSScott Long } 18501713e81bSScott Long 18511713e81bSScott Long pCmd->uScratch.sata_param.prdAddr = (PVOID)pPRDTable; 18521713e81bSScott Long 18531713e81bSScott Long result = mvSataQueueCommand(pMvSataAdapter, channel, 18541713e81bSScott Long &commandInfo); 18551713e81bSScott Long 18561713e81bSScott Long if (result != MV_QUEUE_COMMAND_RESULT_OK) { 18571713e81bSScott Long queue_failed: 18581713e81bSScott Long switch (result) { 18591713e81bSScott Long case MV_QUEUE_COMMAND_RESULT_BAD_LBA_ADDRESS: 18601713e81bSScott Long MV_ERROR("IAL Error: Edma Queue command " 18611713e81bSScott Long "failed. Bad LBA LBA[31:0](0x%08x)\n", 18621713e81bSScott Long pUdmaParams->lowLBAAddress); 18631713e81bSScott Long pCmd->Result = RETURN_IDE_ERROR; 18641713e81bSScott Long break; 18651713e81bSScott Long case MV_QUEUE_COMMAND_RESULT_QUEUED_MODE_DISABLED: 18661713e81bSScott Long MV_ERROR("IAL Error: Edma Queue command " 18671713e81bSScott Long "failed. EDMA disabled adapter %d " 18681713e81bSScott Long "channel %d\n", 18691713e81bSScott Long pMvSataAdapter->adapterId, channel); 18701713e81bSScott Long mvSataEnableChannelDma(pMvSataAdapter,channel); 18711713e81bSScott Long pCmd->Result = RETURN_IDE_ERROR; 18721713e81bSScott Long break; 18731713e81bSScott Long case MV_QUEUE_COMMAND_RESULT_FULL: 18741713e81bSScott Long MV_ERROR("IAL Error: Edma Queue command " 18751713e81bSScott Long "failed. Queue is Full adapter %d " 18761713e81bSScott Long "channel %d\n", 18771713e81bSScott Long pMvSataAdapter->adapterId, channel); 18781713e81bSScott Long pCmd->Result = RETURN_DEVICE_BUSY; 18791713e81bSScott Long break; 18801713e81bSScott Long case MV_QUEUE_COMMAND_RESULT_BAD_PARAMS: 18811713e81bSScott Long MV_ERROR("IAL Error: Edma Queue command " 18821713e81bSScott Long "failed. (Bad Params), pMvSataAdapter:" 18831713e81bSScott Long " %p, pSataChannel: %p.\n", 18841713e81bSScott Long pMvSataAdapter, 18851713e81bSScott Long pMvSataAdapter->sataChannel[channel]); 18861713e81bSScott Long pCmd->Result = RETURN_IDE_ERROR; 18871713e81bSScott Long break; 18881713e81bSScott Long default: 18891713e81bSScott Long MV_ERROR("IAL Error: Bad result value (%d) " 18901713e81bSScott Long "from queue command\n", result); 18911713e81bSScott Long pCmd->Result = RETURN_IDE_ERROR; 18921713e81bSScott Long } 18931713e81bSScott Long if(pPRDTable) 18941713e81bSScott Long FreePRDTable(pAdapter, pPRDTable); 18951713e81bSScott Long CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, 18961713e81bSScott Long pCmd); 18971713e81bSScott Long } 18981713e81bSScott Long pDevice->QueueLength++; 18991713e81bSScott Long return; 19001713e81bSScott Long 19011713e81bSScott Long case IDE_COMMAND_VERIFY: 19021713e81bSScott Long commandInfo.type = MV_QUEUED_COMMAND_TYPE_NONE_UDMA; 19031713e81bSScott Long pNoUdmaParams->bufPtr = NULL; 19041713e81bSScott Long pNoUdmaParams->callBack = CommandCompletionCB; 19051713e81bSScott Long pNoUdmaParams->commandId = (MV_VOID_PTR)pCmd; 19061713e81bSScott Long pNoUdmaParams->count = 0; 19071713e81bSScott Long pNoUdmaParams->features = 0; 19081713e81bSScott Long pNoUdmaParams->protocolType = MV_NON_UDMA_PROTOCOL_NON_DATA; 19091713e81bSScott Long 19101713e81bSScott Long pCmd->uScratch.sata_param.cmd_priv = 1; 19111713e81bSScott Long if (pMvSataChannel->lba48Address == MV_TRUE){ 19121713e81bSScott Long pNoUdmaParams->command = 19131713e81bSScott Long MV_ATA_COMMAND_READ_VERIFY_SECTORS_EXT; 19141713e81bSScott Long pNoUdmaParams->isEXT = MV_TRUE; 19151713e81bSScott Long pNoUdmaParams->lbaHigh = 19161713e81bSScott Long (MV_U16)((Lba & 0xff0000) >> 16); 19171713e81bSScott Long pNoUdmaParams->lbaMid = (MV_U16)((Lba & 0xff00) >> 8); 19181713e81bSScott Long pNoUdmaParams->lbaLow = 19191713e81bSScott Long (MV_U16)(((Lba & 0xff000000) >> 16)| (Lba & 0xff)); 19201713e81bSScott Long pNoUdmaParams->sectorCount = nSector; 19211713e81bSScott Long pNoUdmaParams->device = 0x40; 19221713e81bSScott Long result = mvSataQueueCommand(pMvSataAdapter, channel, 19231713e81bSScott Long &commandInfo); 19241713e81bSScott Long if (result != MV_QUEUE_COMMAND_RESULT_OK) { 19251713e81bSScott Long goto queue_failed; 19261713e81bSScott Long } 19271713e81bSScott Long return; 19281713e81bSScott Long } 19291713e81bSScott Long pNoUdmaParams->command = MV_ATA_COMMAND_READ_VERIFY_SECTORS; 19301713e81bSScott Long pNoUdmaParams->isEXT = MV_FALSE; 19311713e81bSScott Long pNoUdmaParams->lbaHigh = (MV_U16)((Lba & 0xff0000) >> 16); 19321713e81bSScott Long pNoUdmaParams->lbaMid = (MV_U16)((Lba & 0xff00) >> 8); 19331713e81bSScott Long pNoUdmaParams->lbaLow = (MV_U16)(Lba & 0xff); 19341713e81bSScott Long pNoUdmaParams->sectorCount = 0xff & nSector; 19351713e81bSScott Long pNoUdmaParams->device = (MV_U8)(0x40 | 19361713e81bSScott Long ((Lba & 0xf000000) >> 24)); 19371713e81bSScott Long pNoUdmaParams->callBack = CommandCompletionCB; 19381713e81bSScott Long result = mvSataQueueCommand(pMvSataAdapter, channel, 19391713e81bSScott Long &commandInfo); 19401713e81bSScott Long /* 19411713e81bSScott Long * FIXME: how about the commands already queued? but marvel 19421713e81bSScott Long * also forgets to consider this 19431713e81bSScott Long */ 19441713e81bSScott Long if (result != MV_QUEUE_COMMAND_RESULT_OK){ 19451713e81bSScott Long goto queue_failed; 19461713e81bSScott Long } 19471713e81bSScott Long break; 19481713e81bSScott Long default: 19491713e81bSScott Long pCmd->Result = RETURN_INVALID_REQUEST; 19501713e81bSScott Long CallAfterReturn(_VBUS_P (DPC_PROC)pCmd->pfnCompletion, pCmd); 19511713e81bSScott Long break; 19521713e81bSScott Long } 19531713e81bSScott Long } 19541713e81bSScott Long 19551713e81bSScott Long /********************************************************** 19561713e81bSScott Long * 19571713e81bSScott Long * Probe the hostadapter. 19581713e81bSScott Long * 19591713e81bSScott Long **********************************************************/ 19601713e81bSScott Long static int 19611713e81bSScott Long hpt_probe(device_t dev) 19621713e81bSScott Long { 19631713e81bSScott Long if ((pci_get_vendor(dev) == MV_SATA_VENDOR_ID) && 19641713e81bSScott Long (pci_get_device(dev) == MV_SATA_DEVICE_ID_5081 19651713e81bSScott Long #ifdef FOR_DEMO 19661713e81bSScott Long || pci_get_device(dev) == MV_SATA_DEVICE_ID_5080 19671713e81bSScott Long #endif 19681713e81bSScott Long )) { 19691713e81bSScott Long KdPrintI((CONTROLLER_NAME " found\n")); 19701713e81bSScott Long device_set_desc(dev, CONTROLLER_NAME); 19711713e81bSScott Long return 0; 19721713e81bSScott Long } 19731713e81bSScott Long else 19741713e81bSScott Long return(ENXIO); 19751713e81bSScott Long } 19761713e81bSScott Long 19771713e81bSScott Long /*********************************************************** 19781713e81bSScott Long * 19791713e81bSScott Long * Auto configuration: attach and init a host adapter. 19801713e81bSScott Long * 19811713e81bSScott Long ***********************************************************/ 19821713e81bSScott Long static int 19831713e81bSScott Long hpt_attach(device_t dev) 19841713e81bSScott Long { 19851713e81bSScott Long IAL_ADAPTER_T * pAdapter; 19861713e81bSScott Long int rid; 19871713e81bSScott Long union ccb *ccb; 19881713e81bSScott Long struct cam_devq *devq; 19891713e81bSScott Long struct cam_sim *hpt_vsim; 19901713e81bSScott Long 19911713e81bSScott Long printf("%s Version %s\n", DRIVER_NAME, DRIVER_VERSION); 19921713e81bSScott Long 19931713e81bSScott Long pAdapter = device_get_softc(dev); 19941713e81bSScott Long pAdapter->hpt_dev = dev; 19951713e81bSScott Long 19961713e81bSScott Long rid = init_adapter(pAdapter); 19971713e81bSScott Long if (rid) 19981713e81bSScott Long return rid; 19991713e81bSScott Long 20001713e81bSScott Long rid = 0; 20011713e81bSScott Long if ((pAdapter->hpt_irq = bus_alloc_resource(pAdapter->hpt_dev, 20021713e81bSScott Long SYS_RES_IRQ, &rid, 0, ~0ul, 1, RF_SHAREABLE | RF_ACTIVE)) == NULL){ 20031713e81bSScott Long hpt_printk(("can't allocate interrupt\n")); 20041713e81bSScott Long return(ENXIO); 20051713e81bSScott Long } 20061713e81bSScott Long 20071713e81bSScott Long if(bus_setup_intr(pAdapter->hpt_dev, pAdapter->hpt_irq, INTR_TYPE_CAM, 20081713e81bSScott Long hpt_intr, pAdapter, &pAdapter->hpt_intr)) { 20091713e81bSScott Long hpt_printk(("can't set up interrupt\n")); 20101713e81bSScott Long free(pAdapter, M_DEVBUF); 20111713e81bSScott Long return(ENXIO); 20121713e81bSScott Long } 20131713e81bSScott Long 20141713e81bSScott Long #if 1 20151713e81bSScott Long if ((ccb = malloc(sizeof(*ccb), M_DEVBUF, M_WAITOK | M_ZERO)) != NULL) { 20161713e81bSScott Long ccb->ccb_h.pinfo.priority = 1; 20171713e81bSScott Long ccb->ccb_h.pinfo.index = CAM_UNQUEUED_INDEX; 20181713e81bSScott Long } else { 20191713e81bSScott Long return ENOMEM; 20201713e81bSScott Long } 20211713e81bSScott Long #endif 20221713e81bSScott Long /* 20231713e81bSScott Long * Create the device queue for our SIM(s). 20241713e81bSScott Long */ 20251713e81bSScott Long if((devq = cam_simq_alloc(8/*MAX_QUEUE_COMM*/)) == NULL) { 20261713e81bSScott Long KdPrint(("ENXIO\n")); 20271713e81bSScott Long return ENOMEM; 20281713e81bSScott Long } 20291713e81bSScott Long 20301713e81bSScott Long /* 20311713e81bSScott Long * Construct our SIM entry 20321713e81bSScott Long */ 20331713e81bSScott Long if ((hpt_vsim = cam_sim_alloc(hpt_action, hpt_poll,__str(PROC_DIR_NAME), 20341713e81bSScott Long pAdapter, device_get_unit(pAdapter->hpt_dev), /*untagged*/1, 20351713e81bSScott Long /*tagged*/8, devq)) == NULL) { 20361713e81bSScott Long cam_simq_free(devq); 20371713e81bSScott Long return ENOMEM; 20381713e81bSScott Long } 20391713e81bSScott Long 20401713e81bSScott Long if(xpt_bus_register(hpt_vsim, 0) != CAM_SUCCESS) { 20411713e81bSScott Long cam_sim_free(hpt_vsim, /*free devq*/ TRUE); 20421713e81bSScott Long hpt_vsim = NULL; 20431713e81bSScott Long return ENXIO; 20441713e81bSScott Long } 20451713e81bSScott Long 20461713e81bSScott Long if(xpt_create_path(&pAdapter->path, /*periph */ NULL, 20471713e81bSScott Long cam_sim_path(hpt_vsim), CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) 20481713e81bSScott Long != CAM_REQ_CMP) { 20491713e81bSScott Long xpt_bus_deregister(cam_sim_path(hpt_vsim)); 20501713e81bSScott Long cam_sim_free(hpt_vsim, /*free_devq*/TRUE); 20511713e81bSScott Long hpt_vsim = NULL; 20521713e81bSScott Long return ENXIO; 20531713e81bSScott Long } 20541713e81bSScott Long 20551713e81bSScott Long xpt_setup_ccb(&(ccb->ccb_h), pAdapter->path, /*priority*/5); 20561713e81bSScott Long ccb->ccb_h.func_code = XPT_SASYNC_CB; 20571713e81bSScott Long ccb->csa.event_enable = AC_LOST_DEVICE; 20581713e81bSScott Long ccb->csa.callback = hpt_async; 20591713e81bSScott Long ccb->csa.callback_arg = hpt_vsim; 20601713e81bSScott Long xpt_action((union ccb *)ccb); 20611713e81bSScott Long free(ccb, M_DEVBUF); 20621713e81bSScott Long 20631713e81bSScott Long if ((pAdapter->eh = EVENTHANDLER_REGISTER(shutdown_final, hpt_shutdown, 20641713e81bSScott Long dev, SHUTDOWN_PRI_DEFAULT)) == NULL) 20651713e81bSScott Long device_printf(dev, "Shutdown event registrration failed\n"); 20661713e81bSScott Long 20671713e81bSScott Long return 0; 20681713e81bSScott Long } 20691713e81bSScott Long 20701713e81bSScott Long static int 20711713e81bSScott Long hpt_detach(device_t dev) 20721713e81bSScott Long { 20731713e81bSScott Long return (EBUSY); 20741713e81bSScott Long } 20751713e81bSScott Long 20761713e81bSScott Long /*************************************************************** 20771713e81bSScott Long * The poll function is used to simulate the interrupt when 20781713e81bSScott Long * the interrupt subsystem is not functioning. 20791713e81bSScott Long * 20801713e81bSScott Long ***************************************************************/ 20811713e81bSScott Long static void 20821713e81bSScott Long hpt_poll(struct cam_sim *sim) 20831713e81bSScott Long { 20841713e81bSScott Long hpt_intr((void *)cam_sim_softc(sim)); 20851713e81bSScott Long } 20861713e81bSScott Long 20871713e81bSScott Long /**************************************************************** 20881713e81bSScott Long * Name: hpt_intr 20891713e81bSScott Long * Description: Interrupt handler. 20901713e81bSScott Long ****************************************************************/ 20911713e81bSScott Long static void 20921713e81bSScott Long hpt_intr(void *arg) 20931713e81bSScott Long { 20941713e81bSScott Long IAL_ADAPTER_T *pAdapter = (IAL_ADAPTER_T *)arg; 20951713e81bSScott Long intrmask_t oldspl; 20961713e81bSScott Long 20971713e81bSScott Long oldspl = lock_driver(); 20981713e81bSScott Long /* KdPrintI(("----- Entering Isr() -----\n")); */ 20991713e81bSScott Long if (mvSataInterruptServiceRoutine(&pAdapter->mvSataAdapter) == MV_TRUE){ 21001713e81bSScott Long _VBUS_INST(&pAdapter->VBus) 21011713e81bSScott Long CheckPendingCall(_VBUS_P0); 21021713e81bSScott Long } 21031713e81bSScott Long 21041713e81bSScott Long /* KdPrintI(("----- Leaving Isr() -----\n")); */ 21051713e81bSScott Long unlock_driver(oldspl); 21061713e81bSScott Long } 21071713e81bSScott Long 21081713e81bSScott Long /********************************************************** 21091713e81bSScott Long * Asynchronous Events 21101713e81bSScott Long *********************************************************/ 21111713e81bSScott Long #if (!defined(UNREFERENCED_PARAMETER)) 21121713e81bSScott Long #define UNREFERENCED_PARAMETER(x) (void)(x) 21131713e81bSScott Long #endif 21141713e81bSScott Long 21151713e81bSScott Long static void 21161713e81bSScott Long hpt_async(void * callback_arg, u_int32_t code, struct cam_path * path, 21171713e81bSScott Long void * arg) 21181713e81bSScott Long { 21191713e81bSScott Long /* debug XXXX */ 21201713e81bSScott Long panic("Here"); 21211713e81bSScott Long UNREFERENCED_PARAMETER(callback_arg); 21221713e81bSScott Long UNREFERENCED_PARAMETER(code); 21231713e81bSScott Long UNREFERENCED_PARAMETER(path); 21241713e81bSScott Long UNREFERENCED_PARAMETER(arg); 21251713e81bSScott Long 21261713e81bSScott Long } 21271713e81bSScott Long 21281713e81bSScott Long static void 21291713e81bSScott Long FlushAdapter(IAL_ADAPTER_T *pAdapter) 21301713e81bSScott Long { 21311713e81bSScott Long int i; 21321713e81bSScott Long 21331713e81bSScott Long hpt_printk(("flush all devices\n")); 21341713e81bSScott Long 21351713e81bSScott Long /* flush all devices */ 21361713e81bSScott Long for (i=0; i<MAX_VDEVICE_PER_VBUS; i++) { 21371713e81bSScott Long PVDevice pVDev = pAdapter->VBus.pVDevice[i]; 21381713e81bSScott Long if (pVDev) 21391713e81bSScott Long fFlushVDev(pVDev); 21401713e81bSScott Long } 21411713e81bSScott Long } 21421713e81bSScott Long 21431713e81bSScott Long static int 21441713e81bSScott Long hpt_shutdown(device_t dev) 21451713e81bSScott Long { 21461713e81bSScott Long IAL_ADAPTER_T *pAdapter; 21471713e81bSScott Long 21481713e81bSScott Long pAdapter = device_get_softc(dev); 21491713e81bSScott Long if (pAdapter == NULL) 21501713e81bSScott Long return (EINVAL); 21511713e81bSScott Long 21521713e81bSScott Long EVENTHANDLER_DEREGISTER(shutdown_final, pAdapter->eh); 21531713e81bSScott Long FlushAdapter(pAdapter); 21541713e81bSScott Long 21551713e81bSScott Long return 0; 21561713e81bSScott Long } 21571713e81bSScott Long 21581713e81bSScott Long void 21591713e81bSScott Long Check_Idle_Call(IAL_ADAPTER_T *pAdapter) 21601713e81bSScott Long { 21611713e81bSScott Long int i = 0; 21621713e81bSScott Long 21631713e81bSScott Long _VBUS_INST(&pAdapter->VBus) 21641713e81bSScott Long 21651713e81bSScott Long if (mWaitingForIdle(_VBUS_P0)) { 21661713e81bSScott Long CheckIdleCall(_VBUS_P0); 21671713e81bSScott Long #ifdef SUPPORT_ARRAY 21681713e81bSScott Long for(i = 0; i < MAX_ARRAY_PER_VBUS; i++){ 21691713e81bSScott Long PVDevice pArray; 21701713e81bSScott Long 21711713e81bSScott Long if ((pArray = ArrayTables(i))->u.array.dArStamp == 0) 21721713e81bSScott Long continue; 21731713e81bSScott Long else if (pArray->u.array.rf_auto_rebuild) { 21741713e81bSScott Long KdPrint(("auto rebuild.\n")); 21751713e81bSScott Long pArray->u.array.rf_auto_rebuild = 0; 21761713e81bSScott Long hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, 21771713e81bSScott Long pAdapter, pArray, DUPLICATE); 21781713e81bSScott Long } 21791713e81bSScott Long } 21801713e81bSScott Long #endif 21811713e81bSScott Long } 21821713e81bSScott Long /* launch the awaiting commands blocked by mWaitingForIdle */ 21831713e81bSScott Long while(pAdapter->pending_Q!= NULL) { 21841713e81bSScott Long _VBUS_INST(&pAdapter->VBus) 21851713e81bSScott Long union ccb *ccb = 21861713e81bSScott Long (union ccb *)pAdapter->pending_Q->ccb_h.ccb_ccb_ptr; 21871713e81bSScott Long 21881713e81bSScott Long hpt_free_ccb(&pAdapter->pending_Q, ccb); 21891713e81bSScott Long CallAfterReturn(_VBUS_P (DPC_PROC)OsSendCommand, ccb); 21901713e81bSScott Long } 21911713e81bSScott Long } 21921713e81bSScott Long 21931713e81bSScott Long static void 21941713e81bSScott Long ccb_done(union ccb *ccb) 21951713e81bSScott Long { 21961713e81bSScott Long IAL_ADAPTER_T * pAdapter = (IAL_ADAPTER_T *)ccb->ccb_adapter; 21971713e81bSScott Long KdPrintI(("ccb_done: ccb %x status %x", ccb, ccb->ccb_h.status)); 21981713e81bSScott Long 21991713e81bSScott Long xpt_done(ccb); 22001713e81bSScott Long 22011713e81bSScott Long pAdapter->outstandingCommands--; 22021713e81bSScott Long 22031713e81bSScott Long if (pAdapter->outstandingCommands == 0) { 22041713e81bSScott Long if(DPC_Request_Nums == 0) 22051713e81bSScott Long Check_Idle_Call(pAdapter); 22061713e81bSScott Long } 22071713e81bSScott Long } 22081713e81bSScott Long 22091713e81bSScott Long /**************************************************************** 22101713e81bSScott Long * Name: hpt_action 22111713e81bSScott Long * Description: Process a queued command from the CAM layer. 22121713e81bSScott Long * Parameters: sim - Pointer to SIM object 22131713e81bSScott Long * ccb - Pointer to SCSI command structure. 22141713e81bSScott Long ****************************************************************/ 22151713e81bSScott Long 22161713e81bSScott Long void 22171713e81bSScott Long hpt_action(struct cam_sim *sim, union ccb *ccb) 22181713e81bSScott Long { 22191713e81bSScott Long intrmask_t oldspl; 22201713e81bSScott Long IAL_ADAPTER_T * pAdapter = (IAL_ADAPTER_T *) cam_sim_softc(sim); 22211713e81bSScott Long _VBUS_INST(&pAdapter->VBus) 22221713e81bSScott Long 22231713e81bSScott Long ccb->ccb_adapter = pAdapter; 22241713e81bSScott Long 22251713e81bSScott Long CAM_DEBUG(ccb->ccb_h->path, CAM_DEBUG_TRACE, ("hpt_action\n")); 22261713e81bSScott Long KdPrint(("hpt_action(%lx,%lx{%x})\n", (u_long)sim, (u_long)ccb, 22271713e81bSScott Long ccb->ccb_h.func_code)); 22281713e81bSScott Long 22291713e81bSScott Long switch (ccb->ccb_h.func_code) { 22301713e81bSScott Long case XPT_SCSI_IO: /* Execute the requested I/O operation */ 22311713e81bSScott Long /* ccb->ccb_h.path_id is not our bus id - don't check it */ 22321713e81bSScott Long 22331713e81bSScott Long if (ccb->ccb_h.target_lun) { 22341713e81bSScott Long ccb->ccb_h.status = CAM_LUN_INVALID; 22351713e81bSScott Long xpt_done(ccb); 22361713e81bSScott Long return; 22371713e81bSScott Long } 22381713e81bSScott Long if (ccb->ccb_h.target_id >= MAX_VDEVICE_PER_VBUS || 22391713e81bSScott Long pAdapter->VBus.pVDevice[ccb->ccb_h.target_id]==0) { 22401713e81bSScott Long ccb->ccb_h.status = CAM_TID_INVALID; 22411713e81bSScott Long xpt_done(ccb); 22421713e81bSScott Long return; 22431713e81bSScott Long } 22441713e81bSScott Long 22451713e81bSScott Long oldspl = lock_driver(); 22461713e81bSScott Long if (pAdapter->outstandingCommands==0 && DPC_Request_Nums==0) 22471713e81bSScott Long Check_Idle_Call(pAdapter); 22481713e81bSScott Long 22491713e81bSScott Long if (mWaitingForIdle(_VBUS_P0)) 22501713e81bSScott Long hpt_queue_ccb(&pAdapter->pending_Q, ccb); 22511713e81bSScott Long else 22521713e81bSScott Long OsSendCommand(_VBUS_P ccb); 22531713e81bSScott Long unlock_driver(oldspl); 22541713e81bSScott Long 22551713e81bSScott Long /* KdPrint(("leave scsiio\n")); */ 22561713e81bSScott Long break; 22571713e81bSScott Long 22581713e81bSScott Long case XPT_RESET_BUS: 22591713e81bSScott Long KdPrint(("reset bus\n")); 22601713e81bSScott Long oldspl = lock_driver(); 22611713e81bSScott Long fResetVBus(_VBUS_P0); 22621713e81bSScott Long unlock_driver(oldspl); 22631713e81bSScott Long xpt_done(ccb); 22641713e81bSScott Long break; 22651713e81bSScott Long 22661713e81bSScott Long case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 22671713e81bSScott Long case XPT_EN_LUN: /* Enable LUN as a target */ 22681713e81bSScott Long case XPT_TARGET_IO: /* Execute target I/O request */ 22691713e81bSScott Long case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 22701713e81bSScott Long case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 22711713e81bSScott Long case XPT_ABORT: /* Abort the specified CCB */ 22721713e81bSScott Long case XPT_TERM_IO: /* Terminate the I/O process */ 22731713e81bSScott Long /* XXX Implement */ 22741713e81bSScott Long ccb->ccb_h.status = CAM_REQ_INVALID; 22751713e81bSScott Long xpt_done(ccb); 22761713e81bSScott Long break; 22771713e81bSScott Long 22781713e81bSScott Long case XPT_GET_TRAN_SETTINGS: 22791713e81bSScott Long case XPT_SET_TRAN_SETTINGS: 22801713e81bSScott Long /* XXX Implement */ 22811713e81bSScott Long ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 22821713e81bSScott Long xpt_done(ccb); 22831713e81bSScott Long break; 22841713e81bSScott Long 22851713e81bSScott Long case XPT_CALC_GEOMETRY: 22861713e81bSScott Long { 22871713e81bSScott Long struct ccb_calc_geometry *ccg; 22881713e81bSScott Long u_int32_t size_mb; 22891713e81bSScott Long u_int32_t secs_per_cylinder; 22901713e81bSScott Long 22911713e81bSScott Long ccg = &ccb->ccg; 22921713e81bSScott Long size_mb = ccg->volume_size / ((1024L*1024L) / ccg->block_size); 22931713e81bSScott Long 22941713e81bSScott Long if (size_mb > 1024 ) { 22951713e81bSScott Long ccg->heads = 255; 22961713e81bSScott Long ccg->secs_per_track = 63; 22971713e81bSScott Long } else { 22981713e81bSScott Long ccg->heads = 64; 22991713e81bSScott Long ccg->secs_per_track = 32; 23001713e81bSScott Long } 23011713e81bSScott Long secs_per_cylinder = ccg->heads * ccg->secs_per_track; 23021713e81bSScott Long ccg->cylinders = ccg->volume_size / secs_per_cylinder; 23031713e81bSScott Long ccb->ccb_h.status = CAM_REQ_CMP; 23041713e81bSScott Long xpt_done(ccb); 23051713e81bSScott Long break; 23061713e81bSScott Long } 23071713e81bSScott Long 23081713e81bSScott Long case XPT_PATH_INQ: /* Path routing inquiry */ 23091713e81bSScott Long { 23101713e81bSScott Long struct ccb_pathinq *cpi = &ccb->cpi; 23111713e81bSScott Long 23121713e81bSScott Long cpi->version_num = 1; /* XXX??? */ 23131713e81bSScott Long cpi->hba_inquiry = PI_SDTR_ABLE; 23141713e81bSScott Long cpi->target_sprt = 0; 23151713e81bSScott Long /* Not necessary to reset bus */ 23161713e81bSScott Long cpi->hba_misc = PIM_NOBUSRESET; 23171713e81bSScott Long cpi->hba_eng_cnt = 0; 23181713e81bSScott Long 23191713e81bSScott Long cpi->max_target = MAX_VDEVICE_PER_VBUS; 23201713e81bSScott Long cpi->max_lun = 0; 23211713e81bSScott Long cpi->initiator_id = MAX_VDEVICE_PER_VBUS; 23221713e81bSScott Long 23231713e81bSScott Long cpi->bus_id = cam_sim_bus(sim); 23241713e81bSScott Long cpi->base_transfer_speed = 3300; 23251713e81bSScott Long strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 23261713e81bSScott Long strncpy(cpi->hba_vid, "HPT ", HBA_IDLEN); 23271713e81bSScott Long strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 23281713e81bSScott Long cpi->unit_number = cam_sim_unit(sim); 23291713e81bSScott Long cpi->ccb_h.status = CAM_REQ_CMP; 23301713e81bSScott Long xpt_done(ccb); 23311713e81bSScott Long break; 23321713e81bSScott Long } 23331713e81bSScott Long 23341713e81bSScott Long default: 23351713e81bSScott Long KdPrint(("invalid cmd\n")); 23361713e81bSScott Long ccb->ccb_h.status = CAM_REQ_INVALID; 23371713e81bSScott Long xpt_done(ccb); 23381713e81bSScott Long break; 23391713e81bSScott Long } 23401713e81bSScott Long /* KdPrint(("leave hpt_action..............\n")); */ 23411713e81bSScott Long } 23421713e81bSScott Long 23431713e81bSScott Long /* shall be called at lock_driver() */ 23441713e81bSScott Long static void 23451713e81bSScott Long hpt_queue_ccb(union ccb **ccb_Q, union ccb *ccb) 23461713e81bSScott Long { 23471713e81bSScott Long if(*ccb_Q == NULL) 23481713e81bSScott Long ccb->ccb_h.ccb_ccb_ptr = ccb; 23491713e81bSScott Long else { 23501713e81bSScott Long ccb->ccb_h.ccb_ccb_ptr = (*ccb_Q)->ccb_h.ccb_ccb_ptr; 23511713e81bSScott Long (*ccb_Q)->ccb_h.ccb_ccb_ptr = (char *)ccb; 23521713e81bSScott Long } 23531713e81bSScott Long 23541713e81bSScott Long *ccb_Q = ccb; 23551713e81bSScott Long } 23561713e81bSScott Long 23571713e81bSScott Long /* shall be called at lock_driver() */ 23581713e81bSScott Long static void 23591713e81bSScott Long hpt_free_ccb(union ccb **ccb_Q, union ccb *ccb) 23601713e81bSScott Long { 23611713e81bSScott Long union ccb *TempCCB; 23621713e81bSScott Long 23631713e81bSScott Long TempCCB = *ccb_Q; 23641713e81bSScott Long 23651713e81bSScott Long if(ccb->ccb_h.ccb_ccb_ptr == ccb) 23661713e81bSScott Long /*it means SCpnt is the last one in CURRCMDs*/ 23671713e81bSScott Long *ccb_Q = NULL; 23681713e81bSScott Long else { 23691713e81bSScott Long while(TempCCB->ccb_h.ccb_ccb_ptr != (char *)ccb) 23701713e81bSScott Long TempCCB = (union ccb *)TempCCB->ccb_h.ccb_ccb_ptr; 23711713e81bSScott Long 23721713e81bSScott Long TempCCB->ccb_h.ccb_ccb_ptr = ccb->ccb_h.ccb_ccb_ptr; 23731713e81bSScott Long 23741713e81bSScott Long if(*ccb_Q == ccb) 23751713e81bSScott Long *ccb_Q = TempCCB; 23761713e81bSScott Long } 23771713e81bSScott Long } 23781713e81bSScott Long 23791713e81bSScott Long #ifdef SUPPORT_ARRAY 23801713e81bSScott Long /*************************************************************************** 23811713e81bSScott Long * Function: hpt_worker_thread 23821713e81bSScott Long * Description: Do background rebuilding. Execute in kernel thread context. 23831713e81bSScott Long * Returns: None 23841713e81bSScott Long ***************************************************************************/ 23851713e81bSScott Long static void hpt_worker_thread(void) 23861713e81bSScott Long { 23871713e81bSScott Long intrmask_t oldspl; 23881713e81bSScott Long 23891713e81bSScott Long for(;;) { 23901713e81bSScott Long while (DpcQueue_First!=DpcQueue_Last) { 23911713e81bSScott Long ST_HPT_DPC p; 23921713e81bSScott Long IAL_ADAPTER_T *pAdapter; 23931713e81bSScott Long PVDevice pArray; 23941713e81bSScott Long PVBus _vbus_p; 23951713e81bSScott Long int i; 23961713e81bSScott Long 23971713e81bSScott Long oldspl = lock_driver(); 23981713e81bSScott Long p = DpcQueue[DpcQueue_First]; 23991713e81bSScott Long DpcQueue_First++; 24001713e81bSScott Long DpcQueue_First %= MAX_DPC; 24011713e81bSScott Long DPC_Request_Nums++; 24021713e81bSScott Long unlock_driver(oldspl); 24031713e81bSScott Long p.dpc(p.pAdapter, p.arg, p.flags); 24041713e81bSScott Long 24051713e81bSScott Long oldspl = lock_driver(); 24061713e81bSScott Long DPC_Request_Nums--; 24071713e81bSScott Long /* 24081713e81bSScott Long * since we may have prevented Check_Idle_Call, do it 24091713e81bSScott Long * here 24101713e81bSScott Long */ 24111713e81bSScott Long if (DPC_Request_Nums==0) { 24121713e81bSScott Long if (p.pAdapter->outstandingCommands == 0) { 24131713e81bSScott Long _VBUS_INST(&p.pAdapter->VBus); 24141713e81bSScott Long Check_Idle_Call(p.pAdapter); 24151713e81bSScott Long CheckPendingCall(_VBUS_P0); 24161713e81bSScott Long } 24171713e81bSScott Long } 24181713e81bSScott Long unlock_driver(oldspl); 24191713e81bSScott Long if (SIGISMEMBER(curproc->p_siglist, SIGSTOP) == 0) 24201713e81bSScott Long continue; 24211713e81bSScott Long 24221713e81bSScott Long /* abort rebuilding process. */ 24231713e81bSScott Long pAdapter = gIal_Adapter; 24241713e81bSScott Long while (pAdapter != 0) { 24251713e81bSScott Long _vbus_p = &pAdapter->VBus; 24261713e81bSScott Long for (i = 0; i < MAX_ARRAY_PER_VBUS;i++){ 24271713e81bSScott Long if ((pArray=ArrayTables(i))->u.array.dArStamp==0) 24281713e81bSScott Long continue; 24291713e81bSScott Long if (pArray->u.array.rf_rebuilding || 24301713e81bSScott Long pArray->u.array.rf_verifying || 24311713e81bSScott Long pArray->u.array.rf_initializing) { 24321713e81bSScott Long pArray->u.array.rf_abort_rebuild = 1; 24331713e81bSScott Long } 24341713e81bSScott Long } 24351713e81bSScott Long pAdapter = pAdapter->next; 24361713e81bSScott Long } 24371713e81bSScott Long } 24381713e81bSScott Long 24391713e81bSScott Long #ifdef DEBUG 24401713e81bSScott Long if (SIGISMEMBER(curproc->p_siglist, SIGSTOP)) 24411713e81bSScott Long tsleep(hpt_worker_thread, PPAUSE, "hptrdy", 2 * hz); 24421713e81bSScott Long #endif 24431713e81bSScott Long #if (__FreeBSD_version >= 500043) 24441713e81bSScott Long kthread_suspend_check(curproc); 24451713e81bSScott Long #else 24461713e81bSScott Long kproc_suspend_loop(curproc); 24471713e81bSScott Long #endif 24481713e81bSScott Long /* wait for something to do */ 24491713e81bSScott Long tsleep(hpt_worker_thread, PPAUSE, "hptrdy", 2 * hz); 24501713e81bSScott Long } 24511713e81bSScott Long } 24521713e81bSScott Long 24531713e81bSScott Long static struct proc *hptdaemonproc; 24541713e81bSScott Long static struct kproc_desc hpt_kp = { 24551713e81bSScott Long "hpt_wt", 24561713e81bSScott Long hpt_worker_thread, 24571713e81bSScott Long &hptdaemonproc 24581713e81bSScott Long }; 24591713e81bSScott Long 24601713e81bSScott Long static void 24611713e81bSScott Long launch_worker_thread(void) 24621713e81bSScott Long { 24631713e81bSScott Long IAL_ADAPTER_T *pAdapTemp; 24641713e81bSScott Long 24651713e81bSScott Long kproc_start(&hpt_kp); 24661713e81bSScott Long 24671713e81bSScott Long for (pAdapTemp = gIal_Adapter; pAdapTemp; pAdapTemp = pAdapTemp->next) { 24681713e81bSScott Long 24691713e81bSScott Long _VBUS_INST(&pAdapTemp->VBus) 24701713e81bSScott Long int i; 24711713e81bSScott Long PVDevice pVDev; 24721713e81bSScott Long 24731713e81bSScott Long for(i = 0; i < MAX_ARRAY_PER_VBUS; i++) 24741713e81bSScott Long if ((pVDev=ArrayTables(i))->u.array.dArStamp==0) 24751713e81bSScott Long continue; 24761713e81bSScott Long if (pVDev->u.array.rf_need_rebuild && 24771713e81bSScott Long !pVDev->u.array.rf_rebuilding) { 24781713e81bSScott Long hpt_queue_dpc((HPT_DPC)hpt_rebuild_data_block, 24791713e81bSScott Long pAdapTemp, pVDev, 24801713e81bSScott Long (UCHAR)((pVDev->u.array.CriticalMembers || 24811713e81bSScott Long pVDev->VDeviceType == VD_RAID_1) ? 24821713e81bSScott Long DUPLICATE : REBUILD_PARITY)); 24831713e81bSScott Long } 24841713e81bSScott Long } 24851713e81bSScott Long 24861713e81bSScott Long /* 24871713e81bSScott Long * hpt_worker_thread needs to be suspended after shutdown sync, when fs 24881713e81bSScott Long * sync finished. 24891713e81bSScott Long */ 24901713e81bSScott Long #if (__FreeBSD_version < 500043) 24911713e81bSScott Long EVENTHANDLER_REGISTER(shutdown_post_sync, shutdown_kproc, 24921713e81bSScott Long hptdaemonproc, SHUTDOWN_PRI_FIRST); 24931713e81bSScott Long #else 24941713e81bSScott Long EVENTHANDLER_REGISTER(shutdown_post_sync, kproc_shutdown, 24951713e81bSScott Long hptdaemonproc, SHUTDOWN_PRI_FIRST); 24961713e81bSScott Long #endif 24971713e81bSScott Long } 24981713e81bSScott Long SYSINIT(hptwt, SI_SUB_KTHREAD_IDLE, SI_ORDER_FIRST, launch_worker_thread, NULL); 24991713e81bSScott Long 25001713e81bSScott Long #endif /* SUPPORT_ARRAY */ 25011713e81bSScott Long 25021713e81bSScott Long /* build sgl with merge function */ 25031713e81bSScott Long #define ON64KBOUNDARY(x) (((ULONG_PTR)(x) & 0xFFFF) == 0) 25041713e81bSScott Long 25051713e81bSScott Long /* XXX */ 25061713e81bSScott Long /* #define NOTNEIGHBORPAGE(x, y) (max(x, y) - min(x, y) > PAGE_SIZE) */ 25071713e81bSScott Long #define NOTNEIGHBORPAGE(highvaddr, lowvaddr) \ 25081713e81bSScott Long ((ULONG_PTR)(highvaddr) - (ULONG_PTR)(lowvaddr) != PAGE_SIZE) 25091713e81bSScott Long 25101713e81bSScott Long 25111713e81bSScott Long /********************************************************************************/ 25121713e81bSScott Long 25131713e81bSScott Long static void 25141713e81bSScott Long hptmv_buffer_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 25151713e81bSScott Long { 25161713e81bSScott Long FPSCAT_GATH pSg; 25171713e81bSScott Long int idx; 25181713e81bSScott Long 25191713e81bSScott Long if (error || nsegs == 0) { 25201713e81bSScott Long panic("busdma bewm"); 25211713e81bSScott Long return; 25221713e81bSScott Long } 25231713e81bSScott Long 25241713e81bSScott Long pSg = *(FPSCAT_GATH *)arg; 25251713e81bSScott Long 25261713e81bSScott Long for (idx = 0; idx < nsegs; idx++) { 25271713e81bSScott Long pSg[idx].dSgAddress = (ULONG_PTR)segs[idx].ds_addr; 25281713e81bSScott Long pSg[idx].wSgSize = segs[idx].ds_len; 25291713e81bSScott Long pSg[idx].wSgFlag = 0; 25301713e81bSScott Long } 25311713e81bSScott Long pSg[idx - 1].wSgFlag = SG_FLAG_EOT; 25321713e81bSScott Long 25331713e81bSScott Long return; 25341713e81bSScott Long } 25351713e81bSScott Long 25361713e81bSScott Long static int HPTLIBAPI 25371713e81bSScott Long fOsBuildSgl(_VBUS_ARG PCommand pCmd, FPSCAT_GATH pSg, int logical) 25381713e81bSScott Long { 25391713e81bSScott Long IAL_ADAPTER_T *pAdapter; 25401713e81bSScott Long pPrivCommand prvCmd; 25411713e81bSScott Long union ccb *ccb; 25421713e81bSScott Long struct ccb_hdr *ccb_h; 25431713e81bSScott Long struct ccb_scsiio *csio; 25441713e81bSScott Long bus_dma_segment_t *sgList; 25451713e81bSScott Long int error; 25461713e81bSScott Long 25471713e81bSScott Long prvCmd = pCmd->pOrgCommand; 25481713e81bSScott Long pAdapter = prvCmd->pAdapter; 25491713e81bSScott Long ccb = prvCmd->ccb; 25501713e81bSScott Long ccb_h = &ccb->ccb_h; 25511713e81bSScott Long csio = &ccb->csio; 25521713e81bSScott Long sgList = (bus_dma_segment_t *)(csio->data_ptr); 25531713e81bSScott Long 25541713e81bSScott Long if ((ccb_h->flags & CAM_DIR_MASK) == CAM_DIR_NONE) 25551713e81bSScott Long return TRUE; 25561713e81bSScott Long 25571713e81bSScott Long if ((ccb_h->flags & CAM_SCATTER_VALID) != 0) { 25581713e81bSScott Long if((ccb_h->flags & CAM_DATA_PHYS) != 0) 25591713e81bSScott Long panic(KMSG_LEADING "physical address unsupported!"); 25601713e81bSScott Long 25611713e81bSScott Long hptmv_buffer_callback(&pSg, sgList, csio->sglist_cnt, 0); 25621713e81bSScott Long return TRUE; 25631713e81bSScott Long } 25641713e81bSScott Long 25651713e81bSScott Long if (logical) { 25661713e81bSScott Long if ((ccb_h->flags & CAM_DATA_PHYS) != 0) 25671713e81bSScott Long panic(KMSG_LEADING "physical address unsupported\n"); 25681713e81bSScott Long 25691713e81bSScott Long pSg->dSgAddress = (ULONG_PTR)csio->data_ptr; 25701713e81bSScott Long pSg->wSgSize = (USHORT)csio->dxfer_len; 25711713e81bSScott Long pSg->wSgFlag = SG_FLAG_EOT; 25721713e81bSScott Long return TRUE; 25731713e81bSScott Long } 25741713e81bSScott Long 25751713e81bSScott Long KdPrint(("use sgl (physical) ...........\n")); 25761713e81bSScott Long 25771713e81bSScott Long /* 25781713e81bSScott Long * XXX Hack to make this work with PAE. It will fail under 25791713e81bSScott Long * heavy load. 25801713e81bSScott Long */ 25811713e81bSScott Long error = bus_dmamap_load(pAdapter->buf_dmat, prvCmd->buf_map, 25821713e81bSScott Long csio->data_ptr, csio->dxfer_len, hptmv_buffer_callback, &pSg, 25831713e81bSScott Long BUS_DMA_NOWAIT); 25841713e81bSScott Long 25851713e81bSScott Long if (error) { 25861713e81bSScott Long printf("bus_dmamap_load failed error= %d\n", error); 25871713e81bSScott Long return FALSE; 25881713e81bSScott Long } 25891713e81bSScott Long 25901713e81bSScott Long /*#ifdef DEBUG 25911713e81bSScott Long do { 25921713e81bSScott Long int size, i = 0; 25931713e81bSScott Long KdPrintI(("sg[%d]:0x%lx %d\n", i++, pSg[i].dSgAddress, 25941713e81bSScott Long pSg[i].wSgSize)); 25951713e81bSScott Long size = pSg->wSgSize; 25961713e81bSScott Long if (pSg[i].wSgFlag & SG_FLAG_EOT) 25971713e81bSScott Long break; 25981713e81bSScott Long } while (i<17); 25991713e81bSScott Long #endif*/ 26001713e81bSScott Long 26011713e81bSScott Long if ((ccb_h->flags & CAM_DIR_MASK) == CAM_DIR_IN) { 26021713e81bSScott Long bus_dmamap_sync(pAdapter->buf_dmat, prvCmd->buf_map, 26031713e81bSScott Long BUS_DMASYNC_PREREAD); 26041713e81bSScott Long } else { 26051713e81bSScott Long bus_dmamap_sync(pAdapter->buf_dmat, prvCmd->buf_map, 26061713e81bSScott Long BUS_DMASYNC_PREWRITE); 26071713e81bSScott Long } 26081713e81bSScott Long 26091713e81bSScott Long return TRUE; 26101713e81bSScott Long } 26111713e81bSScott Long 26121713e81bSScott Long /*******************************************************************************/ 26131713e81bSScott Long ULONG HPTLIBAPI 26141713e81bSScott Long GetStamp(void) 26151713e81bSScott Long { 26161713e81bSScott Long ULONG stamp; 26171713e81bSScott Long 26181713e81bSScott Long /* 26191713e81bSScott Long * the system variable, ticks, can't be used since it hasn't yet been active 26201713e81bSScott Long * when our driver starts (ticks==0, it's a invalid stamp value) 26211713e81bSScott Long */ 26221713e81bSScott Long do { 26231713e81bSScott Long stamp = random(); 26241713e81bSScott Long } while (stamp==0); 26251713e81bSScott Long 26261713e81bSScott Long return stamp; 26271713e81bSScott Long } 26281713e81bSScott Long 26291713e81bSScott Long 26301713e81bSScott Long static void 26311713e81bSScott Long SetInquiryData(PINQUIRYDATA inquiryData, PVDevice pVDev) 26321713e81bSScott Long { 26331713e81bSScott Long int i; 26341713e81bSScott Long IDENTIFY_DATA2 *pIdentify; 26351713e81bSScott Long 26361713e81bSScott Long pIdentify = (IDENTIFY_DATA2*)pVDev->u.disk.mv->identifyDevice; 26371713e81bSScott Long inquiryData->DeviceType = T_DIRECT; /*DIRECT_ACCESS_DEVICE*/ 26381713e81bSScott Long inquiryData->AdditionalLength = (UCHAR)(sizeof(INQUIRYDATA) - 5); 26391713e81bSScott Long #ifndef SERIAL_CMDS 26401713e81bSScott Long inquiryData->CommandQueue = 1; 26411713e81bSScott Long #endif 26421713e81bSScott Long 26431713e81bSScott Long switch(pVDev->VDeviceType) { 26441713e81bSScott Long case VD_SINGLE_DISK: 26451713e81bSScott Long case VD_ATAPI: 26461713e81bSScott Long case VD_REMOVABLE: 26471713e81bSScott Long /* Set the removable bit, if applicable. */ 26481713e81bSScott Long if ((pVDev->u.disk.df_removable_drive) || 26491713e81bSScott Long (pIdentify->GeneralConfiguration & 0x80)) 26501713e81bSScott Long inquiryData->RemovableMedia = 1; 26511713e81bSScott Long 26521713e81bSScott Long /* Fill in vendor identification fields. */ 26531713e81bSScott Long for (i = 0; i < 20; i += 2) { 26541713e81bSScott Long inquiryData->VendorId[i] = 26551713e81bSScott Long ((PUCHAR)pIdentify->ModelNumber)[i + 1]; 26561713e81bSScott Long inquiryData->VendorId[i+1] = 26571713e81bSScott Long ((PUCHAR)pIdentify->ModelNumber)[i]; 26581713e81bSScott Long 26591713e81bSScott Long } 26601713e81bSScott Long 26611713e81bSScott Long /* Initialize unused portion of product id. */ 26621713e81bSScott Long for (i = 0; i < 4; i++) inquiryData->ProductId[12+i] = ' '; 26631713e81bSScott Long 26641713e81bSScott Long /* firmware revision */ 26651713e81bSScott Long for (i = 0; i < 4; i += 2) { 26661713e81bSScott Long inquiryData->ProductRevisionLevel[i] = 26671713e81bSScott Long ((PUCHAR)pIdentify->FirmwareRevision)[i+1]; 26681713e81bSScott Long inquiryData->ProductRevisionLevel[i+1] = 26691713e81bSScott Long ((PUCHAR)pIdentify->FirmwareRevision)[i]; 26701713e81bSScott Long } 26711713e81bSScott Long break; 26721713e81bSScott Long default: 26731713e81bSScott Long memcpy(&inquiryData->VendorId, "RR182x ", 8); 26741713e81bSScott Long #ifdef SUPPORT_ARRAY 26751713e81bSScott Long switch(pVDev->VDeviceType) { 26761713e81bSScott Long case VD_RAID_0: 26771713e81bSScott Long if ((pVDev->u.array.pMember[0] && 26781713e81bSScott Long mIsArray(pVDev->u.array.pMember[0])) || 26791713e81bSScott Long (pVDev->u.array.pMember[1] && 26801713e81bSScott Long mIsArray(pVDev->u.array.pMember[1]))) 26811713e81bSScott Long memcpy(&inquiryData->ProductId, 26821713e81bSScott Long "RAID 1/0 Array ", 16); 26831713e81bSScott Long else 26841713e81bSScott Long memcpy(&inquiryData->ProductId, 26851713e81bSScott Long "RAID 0 Array ", 16); 26861713e81bSScott Long break; 26871713e81bSScott Long case VD_RAID_1: 26881713e81bSScott Long if ((pVDev->u.array.pMember[0] && 26891713e81bSScott Long mIsArray(pVDev->u.array.pMember[0])) || 26901713e81bSScott Long (pVDev->u.array.pMember[1] && 26911713e81bSScott Long mIsArray(pVDev->u.array.pMember[1]))) 26921713e81bSScott Long memcpy(&inquiryData->ProductId, 26931713e81bSScott Long "RAID 0/1 Array ", 16); 26941713e81bSScott Long else 26951713e81bSScott Long memcpy(&inquiryData->ProductId, 26961713e81bSScott Long "RAID 1 Array ", 16); 26971713e81bSScott Long break; 26981713e81bSScott Long case VD_RAID_5: 26991713e81bSScott Long memcpy(&inquiryData->ProductId, "RAID 5 Array ", 16); 27001713e81bSScott Long break; 27011713e81bSScott Long case VD_JBOD: 27021713e81bSScott Long memcpy(&inquiryData->ProductId, "JBOD Array ", 16); 27031713e81bSScott Long break; 27041713e81bSScott Long } 27051713e81bSScott Long #endif 27061713e81bSScott Long memcpy(&inquiryData->ProductRevisionLevel, "3.00", 4); 27071713e81bSScott Long break; 27081713e81bSScott Long } 27091713e81bSScott Long } 27101713e81bSScott Long 27111713e81bSScott Long static void 27121713e81bSScott Long hpt_timeout(void *arg) 27131713e81bSScott Long { 27141713e81bSScott Long _VBUS_INST(&((IAL_ADAPTER_T*)((union ccb *)arg)->ccb_adapter)->VBus) 27151713e81bSScott Long intrmask_t oldspl; 27161713e81bSScott Long 27171713e81bSScott Long oldspl = lock_driver(); 27181713e81bSScott Long fResetVBus(_VBUS_P0); 27191713e81bSScott Long unlock_driver(oldspl); 27201713e81bSScott Long } 27211713e81bSScott Long 27221713e81bSScott Long static void HPTLIBAPI 27231713e81bSScott Long OsSendCommand(_VBUS_ARG union ccb *ccb) 27241713e81bSScott Long { 27251713e81bSScott Long IAL_ADAPTER_T *pAdapter; 27261713e81bSScott Long struct ccb_hdr *ccb_h; 27271713e81bSScott Long struct ccb_scsiio *csio; 27281713e81bSScott Long PVDevice pVDev; 27291713e81bSScott Long 27301713e81bSScott Long pAdapter = (IAL_ADAPTER_T *)ccb->ccb_adapter; 27311713e81bSScott Long ccb_h = &ccb->ccb_h; 27321713e81bSScott Long csio = &ccb->csio; 27331713e81bSScott Long pVDev = pAdapter->VBus.pVDevice[ccb_h->target_id]; 27341713e81bSScott Long 27351713e81bSScott Long KdPrintI(("OsSendCommand: ccb %x cdb %x-%x-%x\n", 27361713e81bSScott Long ccb, 27371713e81bSScott Long *(ULONG *)&ccb->csio.cdb_io.cdb_bytes[0], 27381713e81bSScott Long *(ULONG *)&ccb->csio.cdb_io.cdb_bytes[4], 27391713e81bSScott Long *(ULONG *)&ccb->csio.cdb_io.cdb_bytes[8] 27401713e81bSScott Long )); 27411713e81bSScott Long 27421713e81bSScott Long pAdapter->outstandingCommands++; 27431713e81bSScott Long 27441713e81bSScott Long if (pVDev == NULL || pVDev->vf_online == 0) { 27451713e81bSScott Long ccb->ccb_h.status = CAM_REQ_INVALID; 27461713e81bSScott Long ccb_done(ccb); 27471713e81bSScott Long goto Command_Complished; 27481713e81bSScott Long } 27491713e81bSScott Long 27501713e81bSScott Long switch(ccb->csio.cdb_io.cdb_bytes[0]) 27511713e81bSScott Long { 27521713e81bSScott Long case TEST_UNIT_READY: 27531713e81bSScott Long case START_STOP_UNIT: 27541713e81bSScott Long case SYNCHRONIZE_CACHE: 27551713e81bSScott Long /* FALLTHROUGH */ 27561713e81bSScott Long ccb->ccb_h.status = CAM_REQ_CMP; 27571713e81bSScott Long break; 27581713e81bSScott Long 27591713e81bSScott Long case INQUIRY: 27601713e81bSScott Long ZeroMemory(ccb->csio.data_ptr, ccb->csio.dxfer_len); 27611713e81bSScott Long SetInquiryData((PINQUIRYDATA)ccb->csio.data_ptr, pVDev); 27621713e81bSScott Long ccb_h->status = CAM_REQ_CMP; 27631713e81bSScott Long break; 27641713e81bSScott Long 27651713e81bSScott Long case READ_CAPACITY: 27661713e81bSScott Long { 27671713e81bSScott Long UCHAR swip[4]; 27681713e81bSScott Long /* Claim 512 byte blocks (big-endian). */ 27691713e81bSScott Long ((PREAD_CAPACITY_DATA)csio->data_ptr)->BytesPerBlock = 0x20000; 27701713e81bSScott Long *(ULONG*)swip = pVDev->VDeviceCapacity - 1; 27711713e81bSScott Long ((PREAD_CAPACITY_DATA)csio->data_ptr)->LogicalBlockAddress = 27721713e81bSScott Long (swip[0] << 24) | (swip[1] << 16) | (swip[2] << 8) | swip[3]; 27731713e81bSScott Long ccb_h->status = CAM_REQ_CMP; 27741713e81bSScott Long break; 27751713e81bSScott Long } 27761713e81bSScott Long 27771713e81bSScott Long case READ_6: 27781713e81bSScott Long case WRITE_6: 27791713e81bSScott Long case READ_10: 27801713e81bSScott Long case WRITE_10: 27811713e81bSScott Long case 0x13: 27821713e81bSScott Long case 0x2f: 27831713e81bSScott Long { 27841713e81bSScott Long UCHAR Cdb[16]; 27851713e81bSScott Long UCHAR CdbLength; 27861713e81bSScott Long _VBUS_INST(pVDev->pVBus) 27871713e81bSScott Long PCommand pCmd; 27881713e81bSScott Long 27891713e81bSScott Long pCmd = AllocateCommand(_VBUS_P0); 27901713e81bSScott Long HPT_ASSERT(pCmd); 27911713e81bSScott Long 27921713e81bSScott Long CdbLength = csio->cdb_len; 27931713e81bSScott Long if ((ccb->ccb_h.flags & CAM_CDB_POINTER) != 0) { 27941713e81bSScott Long if ((ccb->ccb_h.flags & CAM_CDB_PHYS) == 0) { 27951713e81bSScott Long bcopy(csio->cdb_io.cdb_ptr, Cdb, CdbLength); 27961713e81bSScott Long } else { 27971713e81bSScott Long KdPrintE(("ERROR!!!\n")); 27981713e81bSScott Long ccb->ccb_h.status = CAM_REQ_INVALID; 27991713e81bSScott Long break; 28001713e81bSScott Long } 28011713e81bSScott Long } else { 28021713e81bSScott Long bcopy(csio->cdb_io.cdb_bytes, Cdb, CdbLength); 28031713e81bSScott Long } 28041713e81bSScott Long 28051713e81bSScott Long pCmd->pOrgCommand = AllocPrivCommand(pAdapter); 28061713e81bSScott Long if (pCmd->pOrgCommand == NULL) 28071713e81bSScott Long panic("command leak!"); 28081713e81bSScott Long ((pPrivCommand)(pCmd->pOrgCommand))->ccb = ccb; 28091713e81bSScott Long pCmd->pVDevice = pVDev; 28101713e81bSScott Long pCmd->pfnCompletion = fOsCommandDone; 28111713e81bSScott Long pCmd->pfnBuildSgl = fOsBuildSgl; 28121713e81bSScott Long 28131713e81bSScott Long switch (Cdb[0]) { 28141713e81bSScott Long case READ_6: 28151713e81bSScott Long case WRITE_6: 28161713e81bSScott Long case 0x13: 28171713e81bSScott Long pCmd->uCmd.Ide.Lba = ((ULONG)Cdb[1] << 16) | 28181713e81bSScott Long ((ULONG)Cdb[2] << 8) | (ULONG)Cdb[3]; 28191713e81bSScott Long pCmd->uCmd.Ide.nSectors = (USHORT) Cdb[4]; 28201713e81bSScott Long break; 28211713e81bSScott Long default: 28221713e81bSScott Long pCmd->uCmd.Ide.Lba = (ULONG)Cdb[5] | 28231713e81bSScott Long ((ULONG)Cdb[4] << 8) | ((ULONG)Cdb[3] << 16) | 28241713e81bSScott Long ((ULONG)Cdb[2] << 24); 28251713e81bSScott Long pCmd->uCmd.Ide.nSectors = (USHORT) Cdb[8] | 28261713e81bSScott Long ((USHORT)Cdb[7]<<8); 28271713e81bSScott Long break; 28281713e81bSScott Long } 28291713e81bSScott Long 28301713e81bSScott Long switch (Cdb[0]) { 28311713e81bSScott Long case READ_6: 28321713e81bSScott Long case READ_10: 28331713e81bSScott Long pCmd->uCmd.Ide.Command = IDE_COMMAND_READ; 28341713e81bSScott Long pCmd->cf_data_in = 1; 28351713e81bSScott Long break; 28361713e81bSScott Long 28371713e81bSScott Long case WRITE_6: 28381713e81bSScott Long case WRITE_10: 28391713e81bSScott Long pCmd->uCmd.Ide.Command = IDE_COMMAND_WRITE; 28401713e81bSScott Long pCmd->cf_data_out = 1; 28411713e81bSScott Long break; 28421713e81bSScott Long case 0x13: 28431713e81bSScott Long case 0x2f: 28441713e81bSScott Long pCmd->uCmd.Ide.Command = IDE_COMMAND_VERIFY; 28451713e81bSScott Long break; 28461713e81bSScott Long } 28471713e81bSScott Long 28481713e81bSScott Long ccb->ccb_h.timeout_ch = timeout(hpt_timeout, (caddr_t)ccb, 20*hz); 28491713e81bSScott Long 28501713e81bSScott Long pVDev->pfnSendCommand(_VBUS_P pCmd); 28511713e81bSScott Long goto Command_Complished; 28521713e81bSScott Long } 28531713e81bSScott Long 28541713e81bSScott Long default: 28551713e81bSScott Long ccb->ccb_h.status = CAM_REQ_INVALID; 28561713e81bSScott Long break; 28571713e81bSScott Long } 28581713e81bSScott Long ccb_done(ccb); 28591713e81bSScott Long Command_Complished: 28601713e81bSScott Long CheckPendingCall(_VBUS_P0); 28611713e81bSScott Long return; 28621713e81bSScott Long } 28631713e81bSScott Long 28641713e81bSScott Long static void HPTLIBAPI 28651713e81bSScott Long fOsCommandDone(_VBUS_ARG PCommand pCmd) 28661713e81bSScott Long { 28671713e81bSScott Long IAL_ADAPTER_T *pAdapter; 28681713e81bSScott Long pPrivCommand prvCmd; 28691713e81bSScott Long union ccb *ccb; 28701713e81bSScott Long 28711713e81bSScott Long prvCmd = pCmd->pOrgCommand; 28721713e81bSScott Long pAdapter = prvCmd->pAdapter; 28731713e81bSScott Long ccb = prvCmd->ccb; 28741713e81bSScott Long 28751713e81bSScott Long KdPrint(("fOsCommandDone(%p, %d)", pCmd, pCmd->Result)); 28761713e81bSScott Long 28771713e81bSScott Long untimeout(hpt_timeout, (caddr_t)ccb, ccb->ccb_h.timeout_ch); 28781713e81bSScott Long 28791713e81bSScott Long switch(pCmd->Result) { 28801713e81bSScott Long case RETURN_SUCCESS: 28811713e81bSScott Long ccb->ccb_h.status = CAM_REQ_CMP; 28821713e81bSScott Long break; 28831713e81bSScott Long case RETURN_BAD_DEVICE: 28841713e81bSScott Long ccb->ccb_h.status = CAM_DEV_NOT_THERE; 28851713e81bSScott Long break; 28861713e81bSScott Long case RETURN_DEVICE_BUSY: 28871713e81bSScott Long ccb->ccb_h.status = CAM_BUSY; 28881713e81bSScott Long break; 28891713e81bSScott Long case RETURN_INVALID_REQUEST: 28901713e81bSScott Long ccb->ccb_h.status = CAM_REQ_INVALID; 28911713e81bSScott Long break; 28921713e81bSScott Long case RETURN_SELECTION_TIMEOUT: 28931713e81bSScott Long ccb->ccb_h.status = CAM_SEL_TIMEOUT; 28941713e81bSScott Long break; 28951713e81bSScott Long case RETURN_RETRY: 28961713e81bSScott Long ccb->ccb_h.status = CAM_BUSY; 28971713e81bSScott Long break; 28981713e81bSScott Long default: 28991713e81bSScott Long ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; 29001713e81bSScott Long break; 29011713e81bSScott Long } 29021713e81bSScott Long 29031713e81bSScott Long if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 29041713e81bSScott Long bus_dmamap_sync(pAdapter->buf_dmat, prvCmd->buf_map, 29051713e81bSScott Long BUS_DMASYNC_POSTREAD); 29061713e81bSScott Long } else { 29071713e81bSScott Long bus_dmamap_sync(pAdapter->buf_dmat, prvCmd->buf_map, 29081713e81bSScott Long BUS_DMASYNC_POSTWRITE); 29091713e81bSScott Long } 29101713e81bSScott Long bus_dmamap_unload(pAdapter->buf_dmat, prvCmd->buf_map); 29111713e81bSScott Long 29121713e81bSScott Long FreePrivCommand(pAdapter, prvCmd); 29131713e81bSScott Long FreeCommand(_VBUS_P pCmd); 29141713e81bSScott Long ccb_done(ccb); 29151713e81bSScott Long } 29161713e81bSScott Long 29171713e81bSScott Long int 29181713e81bSScott Long hpt_queue_dpc(HPT_DPC dpc, IAL_ADAPTER_T * pAdapter, void *arg, UCHAR flags) 29191713e81bSScott Long { 29201713e81bSScott Long int p; 29211713e81bSScott Long 29221713e81bSScott Long p = (DpcQueue_Last + 1) % MAX_DPC; 29231713e81bSScott Long if (p==DpcQueue_First) { 29241713e81bSScott Long KdPrint(("DPC Queue full!\n")); 29251713e81bSScott Long return -1; 29261713e81bSScott Long } 29271713e81bSScott Long 29281713e81bSScott Long DpcQueue[DpcQueue_Last].dpc = dpc; 29291713e81bSScott Long DpcQueue[DpcQueue_Last].pAdapter = pAdapter; 29301713e81bSScott Long DpcQueue[DpcQueue_Last].arg = arg; 29311713e81bSScott Long DpcQueue[DpcQueue_Last].flags = flags; 29321713e81bSScott Long DpcQueue_Last = p; 29331713e81bSScott Long 29341713e81bSScott Long return 0; 29351713e81bSScott Long } 29361713e81bSScott Long 29371713e81bSScott Long #ifdef _RAID5N_ 29381713e81bSScott Long /* 29391713e81bSScott Long * Allocate memory above 16M, otherwise we may eat all low memory for ISA 29401713e81bSScott Long * devices. 29411713e81bSScott Long * 29421713e81bSScott Long * Busdma should be used here, not contigmalloc/free. However, this API 29431713e81bSScott Long * will need to be changed to use it effective. 29441713e81bSScott Long */ 29451713e81bSScott Long void 29461713e81bSScott Long *os_alloc_page(_VBUS_ARG0) 29471713e81bSScott Long { 29481713e81bSScott Long return (void *)contigmalloc(0x1000, M_DEVBUF, M_NOWAIT, 0x1000000, 29491713e81bSScott Long 0xffffffff, PAGE_SIZE, 0); 29501713e81bSScott Long } 29511713e81bSScott Long void 29521713e81bSScott Long *os_alloc_dma_page(_VBUS_ARG0) 29531713e81bSScott Long { 29541713e81bSScott Long return (void *)contigmalloc(0x1000, M_DEVBUF, M_NOWAIT, 0x1000000, 29551713e81bSScott Long 0xffffffff, PAGE_SIZE, 0); 29561713e81bSScott Long } 29571713e81bSScott Long 29581713e81bSScott Long /* 29591713e81bSScott Long * The next two are not used right now. 29601713e81bSScott Long */ 29611713e81bSScott Long void 29621713e81bSScott Long os_free_page(_VBUS_ARG void *p) 29631713e81bSScott Long { 29641713e81bSScott Long contigfree(p, 0x1000, M_DEVBUF); 29651713e81bSScott Long } 29661713e81bSScott Long 29671713e81bSScott Long void 29681713e81bSScott Long os_free_dma_page(_VBUS_ARG void *p) 29691713e81bSScott Long { 29701713e81bSScott Long contigfree(p, 0x1000, M_DEVBUF); 29711713e81bSScott Long } 29721713e81bSScott Long 29731713e81bSScott Long void 29741713e81bSScott Long DoXor1(ULONG *p0, ULONG *p1, ULONG *p2, UINT nBytes) 29751713e81bSScott Long { 29761713e81bSScott Long UINT i; 29771713e81bSScott Long for (i = 0; i < nBytes / 4; i++) 29781713e81bSScott Long *p0++ = *p1++ ^ *p2++; 29791713e81bSScott Long } 29801713e81bSScott Long 29811713e81bSScott Long void 29821713e81bSScott Long DoXor2(ULONG *p0, ULONG *p2, UINT nBytes) 29831713e81bSScott Long { 29841713e81bSScott Long UINT i; 29851713e81bSScott Long for (i = 0; i < nBytes / 4; i++) 29861713e81bSScott Long *p0++ ^= *p2++; 29871713e81bSScott Long } 29881713e81bSScott Long #endif 2989