xref: /freebsd/sys/dev/hpt27xx/hptintf.h (revision ba3c1f5972d7b90feb6e6da47905ff2757e0fe57)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2011 HighPoint Technologies, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * $FreeBSD$
29  */
30 
31 #include <dev/hpt27xx/hpt27xx_config.h>
32 
33 
34 #ifndef HPT_INTF_H
35 #define HPT_INTF_H
36 
37 #if defined(__BIG_ENDIAN__)&&!defined(__BIG_ENDIAN_BITFIELD)
38 #define __BIG_ENDIAN_BITFIELD
39 #endif
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
45 #ifndef __GNUC__
46 #define __attribute__(x)
47 #endif
48 
49 #pragma pack(1)
50 
51 /*
52  * Version of this interface.
53  * The user mode application must first issue a hpt_get_version() call to
54  * check HPT_INTERFACE_VERSION. When an utility using newer version interface
55  * is used with old version drivers, it must call only the functions that
56  * driver supported.
57  * A new version interface should only add ioctl functions; it should implement
58  * all old version functions without change their definition.
59  */
60 #define __this_HPT_INTERFACE_VERSION 0x02010000
61 
62 #ifndef HPT_INTERFACE_VERSION
63 #error "You must define HPT_INTERFACE_VERSION you implemented"
64 #endif
65 
66 #if HPT_INTERFACE_VERSION > __this_HPT_INTERFACE_VERSION
67 #error "HPT_INTERFACE_VERSION is invalid"
68 #endif
69 
70 /*
71  * DEFINITION
72  *   Logical device  --- a device that can be accessed by OS.
73  *   Physical device --- device attached to the controller.
74  *  A logical device can be simply a physical device.
75  *
76  * Each logical and physical device has a 32bit ID. GUI will use this ID
77  * to identify devices.
78  *   1. The ID must be unique.
79  *   2. The ID must be immutable. Once an ID is assigned to a device, it
80  * must not change when system is running and the device exists.
81  *   3. The ID of logical device must be NOT reusable. If a device is
82  * removed, other newly created logical device must not use the same ID.
83  *   4. The ID must not be zero or 0xFFFFFFFF.
84  */
85 typedef HPT_U32 DEVICEID;
86 
87 /*
88  * logical device type.
89  * Identify array (logical device) and physical device.
90  */
91 #define LDT_ARRAY   1
92 #define LDT_DEVICE  2
93 
94 /*
95  * Array types
96  * GUI will treat all array as 1-level RAID. No RAID0/1 or RAID1/0.
97  * A RAID0/1 device is type AT_RAID1. A RAID1/0 device is type AT_RAID0.
98  * Their members may be another array of type RAID0 or RAID1.
99  */
100 #define AT_UNKNOWN  0
101 #define AT_RAID0    1
102 #define AT_RAID1    2
103 #define AT_RAID5    3
104 #define AT_RAID6    4
105 #define AT_RAID3    5
106 #define AT_RAID4    6
107 #define AT_JBOD     7
108 #define AT_RAID1E   8
109 
110 /*
111  * physical device type
112  */
113 #define PDT_UNKNOWN     0
114 #define PDT_HARDDISK    1
115 #define PDT_CDROM       2
116 #define PDT_TAPE        3
117 #define PDT_CHANGER     4
118 
119 /*
120  * Some constants.
121  */
122 #define MAX_NAME_LENGTH     36
123 #define MAX_ARRAYNAME_LEN   16
124 
125 #define MAX_ARRAY_MEMBERS_V1 8
126 
127 #ifndef MAX_ARRAY_MEMBERS_V2
128 #define MAX_ARRAY_MEMBERS_V2 16
129 #endif
130 
131 #ifndef MAX_ARRAY_MEMBERS_V3
132 #define MAX_ARRAY_MEMBERS_V3 64
133 #endif
134 
135 /* keep definition for source code compatibility */
136 #define MAX_ARRAY_MEMBERS MAX_ARRAY_MEMBERS_V1
137 
138 /*
139  * io commands
140  * GUI use these commands to do IO on logical/physical devices.
141  */
142 #define IO_COMMAND_READ     1
143 #define IO_COMMAND_WRITE    2
144 
145 
146 
147 /*
148  * array flags
149  */
150 #define ARRAY_FLAG_DISABLED         0x00000001 /* The array is disabled */
151 #define ARRAY_FLAG_NEEDBUILDING     0x00000002 /* array data need to be rebuilt */
152 #define ARRAY_FLAG_REBUILDING       0x00000004 /* array is in rebuilding process */
153 #define ARRAY_FLAG_BROKEN           0x00000008 /* broken but may still working */
154 #define ARRAY_FLAG_BOOTDISK         0x00000010 /* array has a active partition */
155 
156 #define ARRAY_FLAG_BOOTMARK         0x00000040 /* array has boot mark set */
157 #define ARRAY_FLAG_NEED_AUTOREBUILD 0x00000080 /* auto-rebuild should start */
158 #define ARRAY_FLAG_VERIFYING        0x00000100 /* is being verified */
159 #define ARRAY_FLAG_INITIALIZING     0x00000200 /* is being initialized */
160 #define ARRAY_FLAG_TRANSFORMING     0x00000400 /* tranform in progress */
161 #define ARRAY_FLAG_NEEDTRANSFORM    0x00000800 /* array need tranform */
162 #define ARRAY_FLAG_NEEDINITIALIZING 0x00001000 /* the array's initialization hasn't finished*/
163 #define ARRAY_FLAG_BROKEN_REDUNDANT 0x00002000 /* broken but redundant (raid6) */
164 #define ARRAY_FLAG_RAID15PLUS       0x80000000 /* display this RAID 1 as RAID 1.5 */
165 
166 #define ARRAY_FLAG_ZERO_STARTING    0x40000000 /* start lba of all members of this array is 0 */
167 
168 /*
169  * device flags
170  */
171 #define DEVICE_FLAG_DISABLED        0x00000001 /* device is disabled */
172 #define DEVICE_FLAG_BOOTDISK        0x00000002 /* disk has a active partition */
173 #define DEVICE_FLAG_BOOTMARK        0x00000004 /* disk has boot mark set */
174 #define DEVICE_FLAG_WITH_601        0x00000008 /* has HPT601 connected */
175 #define DEVICE_FLAG_SATA            0x00000010 /* SATA or SAS device */
176 #define DEVICE_FLAG_ON_PM_PORT      0x00000020 /* PM port */
177 #define DEVICE_FLAG_SAS             0x00000040 /* SAS device */
178 #define DEVICE_FLAG_IN_ENCLOSURE    0x00000080 /* PathId is enclosure# */
179 #define DEVICE_FLAG_TAPE            0x00000200 /* SAS Tape device */
180 #define DEVICE_FLAG_CHANGER         0x00000400 /* SAS Changer device */
181 #define DEVICE_FLAG_UNINITIALIZED   0x00010000 /* device is not initialized, can't be used to create array */
182 #define DEVICE_FLAG_LEGACY          0x00020000 /* single disk & mbr contains at least one partition */
183 #define DEVICE_FLAG_BAD_SECTOR_FOUND	0x00040000 /* found bad sector on target disk, set and clear by GUI */
184 
185 #define DEVICE_FLAG_IS_SPARE        0x80000000 /* is a spare disk */
186 
187 
188 #define DEVICE_FLAG_SSD             0x00000100 /* SSD device */
189 #define DEVICE_FLAG_3G              0x10000000
190 #define DEVICE_FLAG_6G              0x20000000
191 
192 
193 /*
194  * array states used by hpt_set_array_state()
195  */
196 /* old defines */
197 #define MIRROR_REBUILD_START    1
198 #define MIRROR_REBUILD_ABORT    2
199 #define MIRROR_REBUILD_COMPLETE 3
200 /* new defines */
201 #define AS_REBUILD_START 1
202 #define AS_REBUILD_ABORT 2
203 #define AS_REBUILD_PAUSE AS_REBUILD_ABORT
204 #define AS_REBUILD_COMPLETE 3
205 #define AS_VERIFY_START 4
206 #define AS_VERIFY_ABORT 5
207 #define AS_VERIFY_COMPLETE 6
208 #define AS_INITIALIZE_START 7
209 #define AS_INITIALIZE_ABORT 8
210 #define AS_INITIALIZE_COMPLETE 9
211 #define AS_VERIFY_FAILED 10
212 #define AS_REBUILD_STOP 11
213 #define AS_SAVE_STATE   12
214 #define AS_TRANSFORM_START 13
215 #define AS_TRANSFORM_ABORT 14
216 
217 /************************************************************************
218  * ioctl code
219  * It would be better if ioctl code are the same on different platforms,
220  * but we must not conflict with system defined ioctl code.
221  ************************************************************************/
222 #if defined(LINUX) || defined(__FreeBSD_version) || defined(linux)
223 #define HPT_CTL_CODE(x) (x+0xFF00)
224 #define HPT_CTL_CODE_LINUX_TO_IOP(x) ((x)-0xff00)
225 #elif defined(_MS_WIN32_) || defined(WIN32)
226 
227 #ifndef CTL_CODE
228 #define CTL_CODE( DeviceType, Function, Method, Access ) \
229 			(((DeviceType) << 16) | ((Access) << 14) | ((Function) << 2) | (Method))
230 #endif
231 #define HPT_CTL_CODE(x) CTL_CODE(0x370, 0x900+(x), 0, 0)
232 #define HPT_CTL_CODE_WIN32_TO_IOP(x) ((((x) & 0xffff)>>2)-0x900)
233 
234 #else
235 #define HPT_CTL_CODE(x) (x)
236 #endif
237 
238 #define HPT_IOCTL_GET_VERSION               HPT_CTL_CODE(0)
239 #define HPT_IOCTL_GET_CONTROLLER_COUNT      HPT_CTL_CODE(1)
240 #define HPT_IOCTL_GET_CONTROLLER_INFO       HPT_CTL_CODE(2)
241 #define HPT_IOCTL_GET_CHANNEL_INFO          HPT_CTL_CODE(3)
242 #define HPT_IOCTL_GET_LOGICAL_DEVICES       HPT_CTL_CODE(4)
243 #define HPT_IOCTL_GET_DEVICE_INFO           HPT_CTL_CODE(5)
244 #define HPT_IOCTL_CREATE_ARRAY              HPT_CTL_CODE(6)
245 #define HPT_IOCTL_DELETE_ARRAY              HPT_CTL_CODE(7)
246 #define HPT_IOCTL_ARRAY_IO                  HPT_CTL_CODE(8)
247 #define HPT_IOCTL_DEVICE_IO                 HPT_CTL_CODE(9)
248 #define HPT_IOCTL_GET_EVENT                 HPT_CTL_CODE(10)
249 #define HPT_IOCTL_REBUILD_MIRROR            HPT_CTL_CODE(11)
250 /* use HPT_IOCTL_REBUILD_DATA_BLOCK from now on */
251 #define HPT_IOCTL_REBUILD_DATA_BLOCK HPT_IOCTL_REBUILD_MIRROR
252 #define HPT_IOCTL_ADD_SPARE_DISK            HPT_CTL_CODE(12)
253 #define HPT_IOCTL_REMOVE_SPARE_DISK         HPT_CTL_CODE(13)
254 #define HPT_IOCTL_ADD_DISK_TO_ARRAY         HPT_CTL_CODE(14)
255 #define HPT_IOCTL_SET_ARRAY_STATE           HPT_CTL_CODE(15)
256 #define HPT_IOCTL_SET_ARRAY_INFO            HPT_CTL_CODE(16)
257 #define HPT_IOCTL_SET_DEVICE_INFO           HPT_CTL_CODE(17)
258 #define HPT_IOCTL_RESCAN_DEVICES            HPT_CTL_CODE(18)
259 #define HPT_IOCTL_GET_DRIVER_CAPABILITIES   HPT_CTL_CODE(19)
260 #define HPT_IOCTL_GET_601_INFO              HPT_CTL_CODE(20)
261 #define HPT_IOCTL_SET_601_INFO              HPT_CTL_CODE(21)
262 #define HPT_IOCTL_LOCK_DEVICE               HPT_CTL_CODE(22)
263 #define HPT_IOCTL_UNLOCK_DEVICE             HPT_CTL_CODE(23)
264 #define HPT_IOCTL_IDE_PASS_THROUGH          HPT_CTL_CODE(24)
265 #define HPT_IOCTL_VERIFY_DATA_BLOCK         HPT_CTL_CODE(25)
266 #define HPT_IOCTL_INITIALIZE_DATA_BLOCK     HPT_CTL_CODE(26)
267 #define HPT_IOCTL_ADD_DEDICATED_SPARE       HPT_CTL_CODE(27)
268 #define HPT_IOCTL_DEVICE_IO_EX              HPT_CTL_CODE(28)
269 #define HPT_IOCTL_SET_BOOT_MARK             HPT_CTL_CODE(29)
270 #define HPT_IOCTL_QUERY_REMOVE              HPT_CTL_CODE(30)
271 #define HPT_IOCTL_REMOVE_DEVICES            HPT_CTL_CODE(31)
272 #define HPT_IOCTL_CREATE_ARRAY_V2           HPT_CTL_CODE(32)
273 #define HPT_IOCTL_GET_DEVICE_INFO_V2        HPT_CTL_CODE(33)
274 #define HPT_IOCTL_SET_DEVICE_INFO_V2        HPT_CTL_CODE(34)
275 #define HPT_IOCTL_REBUILD_DATA_BLOCK_V2     HPT_CTL_CODE(35)
276 #define HPT_IOCTL_VERIFY_DATA_BLOCK_V2      HPT_CTL_CODE(36)
277 #define HPT_IOCTL_INITIALIZE_DATA_BLOCK_V2  HPT_CTL_CODE(37)
278 #define HPT_IOCTL_LOCK_DEVICE_V2            HPT_CTL_CODE(38)
279 #define HPT_IOCTL_DEVICE_IO_V2              HPT_CTL_CODE(39)
280 #define HPT_IOCTL_DEVICE_IO_EX_V2           HPT_CTL_CODE(40)
281 #define HPT_IOCTL_CREATE_TRANSFORM          HPT_CTL_CODE(41)
282 #define HPT_IOCTL_STEP_TRANSFORM            HPT_CTL_CODE(42)
283 #define HPT_IOCTL_SET_VDEV_INFO             HPT_CTL_CODE(43)
284 #define HPT_IOCTL_CALC_MAX_CAPACITY         HPT_CTL_CODE(44)
285 #define HPT_IOCTL_INIT_DISKS                HPT_CTL_CODE(45)
286 #define HPT_IOCTL_GET_DEVICE_INFO_V3        HPT_CTL_CODE(46)
287 #define HPT_IOCTL_GET_CONTROLLER_INFO_V2    HPT_CTL_CODE(47)
288 #define HPT_IOCTL_I2C_TRANSACTION           HPT_CTL_CODE(48)
289 #define HPT_IOCTL_GET_PARAMETER_LIST        HPT_CTL_CODE(49)
290 #define HPT_IOCTL_GET_PARAMETER             HPT_CTL_CODE(50)
291 #define HPT_IOCTL_SET_PARAMETER             HPT_CTL_CODE(51)
292 #define HPT_IOCTL_GET_DRIVER_CAPABILITIES_V2 HPT_CTL_CODE(52)
293 #define HPT_IOCTL_GET_CHANNEL_INFO_V2       HPT_CTL_CODE(53)
294 #define HPT_IOCTL_GET_CONTROLLER_INFO_V3    HPT_CTL_CODE(54)
295 #define HPT_IOCTL_GET_DEVICE_INFO_V4        HPT_CTL_CODE(55)
296 #define HPT_IOCTL_CREATE_ARRAY_V3           HPT_CTL_CODE(56)
297 #define HPT_IOCTL_CREATE_TRANSFORM_V2       HPT_CTL_CODE(57)
298 #define HPT_IOCTL_CALC_MAX_CAPACITY_V2      HPT_CTL_CODE(58)
299 #define HPT_IOCTL_SCSI_PASSTHROUGH          HPT_CTL_CODE(59)
300 #define HPT_IOCTL_GET_PHYSICAL_DEVICES      HPT_CTL_CODE(60)
301 #define HPT_IOCTL_GET_ENCLOSURE_COUNT       HPT_CTL_CODE(61)
302 #define HPT_IOCTL_GET_ENCLOSURE_INFO        HPT_CTL_CODE(62)
303 #define HPT_IOCTL_GET_PERFMON_STATUS        HPT_CTL_CODE(63)
304 #define HPT_IOCTL_SET_PERFMON_STATUS        HPT_CTL_CODE(64)
305 #define HPT_IOCTL_GET_PERFMON_DATA          HPT_CTL_CODE(65)
306 #define HPT_IOCTL_IDE_PASS_THROUGH_V2       HPT_CTL_CODE(66)
307 #define HPT_IOCTL_GET_ENCLOSURE_INFO_V2     HPT_CTL_CODE(67)
308 #define HPT_IOCTL_GET_ENCLOSURE_INFO_V3     HPT_CTL_CODE(68)
309 #define HPT_IOCTL_ACCESS_CONFIG_REG         HPT_CTL_CODE(69)
310 
311 #define HPT_IOCTL_GET_ENCLOSURE_INFO_V4    HPT_CTL_CODE(70)
312 #define HPT_IOCTL_GET_ENCLOSURE_ELEMENT_INFO    HPT_CTL_CODE(71)
313 #define HPT_IOCTL_DUMP_METADATA             HPT_CTL_CODE(72)
314 #define HPT_IOCTL_GET_CONTROLLER_INFO_V2_EXT    HPT_CTL_CODE(73)
315 
316 
317 #define HPT_IOCTL_GET_CONTROLLER_IDS        HPT_CTL_CODE(100)
318 #define HPT_IOCTL_GET_DCB                   HPT_CTL_CODE(101)
319 
320 #define HPT_IOCTL_EPROM_IO                  HPT_CTL_CODE(102)
321 #define HPT_IOCTL_GET_CONTROLLER_VENID      HPT_CTL_CODE(103)
322 
323 
324 #define HPT_IOCTL_GET_DRIVER_CAPABILITIES_CC   HPT_CTL_CODE(200)
325 #define HPT_IOCTL_GET_CCS_INFO                 HPT_CTL_CODE(201)
326 #define HPT_IOCTL_CREATE_CC                    HPT_CTL_CODE(202)
327 #define HPT_IOCTL_DELETE_CC                    HPT_CTL_CODE(203)
328 #define HPT_IOCTL_REENABLE_ARRAY               HPT_CTL_CODE(204)
329 
330 /************************************************************************
331  * shared data structures
332  ************************************************************************/
333 
334 /*
335  * Chip Type
336  */
337 #define CHIP_TYPE_HPT366      1
338 #define CHIP_TYPE_HPT368      2
339 #define CHIP_TYPE_HPT370      3
340 #define CHIP_TYPE_HPT370A     4
341 #define CHIP_TYPE_HPT370B     5
342 #define CHIP_TYPE_HPT374      6
343 #define CHIP_TYPE_HPT372      7
344 #define CHIP_TYPE_HPT372A     8
345 #define CHIP_TYPE_HPT302      9
346 #define CHIP_TYPE_HPT371      10
347 #define CHIP_TYPE_HPT372N     11
348 #define CHIP_TYPE_HPT302N     12
349 #define CHIP_TYPE_HPT371N     13
350 #define CHIP_TYPE_SI3112A     14
351 #define CHIP_TYPE_ICH5        15
352 #define CHIP_TYPE_ICH5R       16
353 #define CHIP_TYPE_MV50XX      20
354 #define CHIP_TYPE_MV60X1      21
355 #define CHIP_TYPE_MV60X2      22
356 #define CHIP_TYPE_MV70X2      23
357 #define CHIP_TYPE_MV5182      24
358 #define CHIP_TYPE_IOP331      31
359 #define CHIP_TYPE_IOP333      32
360 #define CHIP_TYPE_IOP341      33
361 #define CHIP_TYPE_IOP348      34
362 
363 /*
364  * Chip Flags
365  */
366 #define CHIP_SUPPORT_ULTRA_66   0x20
367 #define CHIP_SUPPORT_ULTRA_100  0x40
368 #define CHIP_HPT3XX_DPLL_MODE   0x80
369 #define CHIP_SUPPORT_ULTRA_133  0x01
370 #define CHIP_SUPPORT_ULTRA_150  0x02
371 #define CHIP_MASTER             0x04
372 #define CHIP_SUPPORT_SATA_300   0x08
373 
374 #define HPT_SPIN_UP_MODE_NOSUPPORT 0
375 #define HPT_SPIN_UP_MODE_FULL      1
376 #define HPT_SPIN_UP_MODE_STANDBY   2
377 
378 #define HPT_CAP_DUMP_METADATA   0x1
379 #define HPT_CAP_DISK_CHECKING   0x2
380 #define HPT_CAP_REPORT_SECTOR_SIZE  0x10
381 
382 typedef struct _DRIVER_CAPABILITIES {
383 	HPT_U32 dwSize;
384 
385 	HPT_U8 MaximumControllers;           /* maximum controllers the driver can support */
386 	HPT_U8 SupportCrossControllerRAID;   /* 1-support, 0-not support */
387 	HPT_U8 MinimumBlockSizeShift;        /* minimum block size shift */
388 	HPT_U8 MaximumBlockSizeShift;        /* maximum block size shift */
389 
390 	HPT_U8 SupportDiskModeSetting;
391 	HPT_U8 SupportSparePool;
392 	HPT_U8 MaximumArrayNameLength;
393 	/* only one HPT_U8 left here! */
394 #ifdef __BIG_ENDIAN_BITFIELD
395 	HPT_U8 reserved: 2;
396 	HPT_U8 SupportPerformanceMonitor: 1;
397 	HPT_U8 SupportVariableSectorSize: 1;
398 	HPT_U8 SupportHotSwap: 1;
399 	HPT_U8 HighPerformanceRAID1: 1;
400 	HPT_U8 RebuildProcessInDriver: 1;
401 	HPT_U8 SupportDedicatedSpare: 1;
402 #else
403 	HPT_U8 SupportDedicatedSpare: 1;     /* call hpt_add_dedicated_spare() for dedicated spare. */
404 	HPT_U8 RebuildProcessInDriver: 1;    /* Windows only. used by mid layer for rebuild control. */
405 	HPT_U8 HighPerformanceRAID1: 1;
406 	HPT_U8 SupportHotSwap: 1;
407 	HPT_U8 SupportVariableSectorSize: 1;
408 	HPT_U8 SupportPerformanceMonitor: 1;
409 	HPT_U8 reserved: 2;
410 #endif
411 
412 
413 	HPT_U8 SupportedRAIDTypes[16];
414 	/* maximum members in an array corresponding to SupportedRAIDTypes */
415 	HPT_U8 MaximumArrayMembers[16];
416 }
417 DRIVER_CAPABILITIES, *PDRIVER_CAPABILITIES;
418 
419 typedef struct _DRIVER_CAPABILITIES_V2 {
420 	DRIVER_CAPABILITIES v1;
421 	HPT_U8 SupportedCachePolicies[16];
422 	HPT_U32 ConfigRegSize; /* max sectors */
423 	HPT_U32 SupportDiskCachePolicy; /* disable/enable disk cache policy */
424 	HPT_U32 Flags;
425 	HPT_U32 reserved[14];
426 }
427 DRIVER_CAPABILITIES_V2, *PDRIVER_CAPABILITIES_V2;
428 
429 /*
430  * Controller information.
431  */
432 typedef struct _CONTROLLER_INFO {
433 	HPT_U8 ChipType;                    /* chip type */
434 	HPT_U8 InterruptLevel;              /* IRQ level */
435 	HPT_U8 NumBuses;                    /* bus count */
436 	HPT_U8 ChipFlags;
437 
438 	HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */
439 	HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */
440 
441 } CONTROLLER_INFO, *PCONTROLLER_INFO;
442 
443 #if HPT_INTERFACE_VERSION>=0x01020000
444 typedef struct _CONTROLLER_INFO_V2 {
445 	HPT_U8 ChipType;                    /* chip type */
446 	HPT_U8 InterruptLevel;              /* IRQ level */
447 	HPT_U8 NumBuses;                    /* bus count */
448 	HPT_U8 ChipFlags;
449 
450 	HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */
451 	HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */
452 
453 	HPT_U32 GroupId;                    /* low 32bit of vbus pointer the controller belongs
454 										 * the master controller has CHIP_MASTER flag set*/
455 	HPT_U8  pci_tree;
456 	HPT_U8  pci_bus;
457 	HPT_U8  pci_device;
458 	HPT_U8  pci_function;
459 
460 	HPT_U32 ExFlags;
461 } CONTROLLER_INFO_V2, *PCONTROLLER_INFO_V2;
462 
463 typedef struct _CONTROLLER_INFO_V2_EXT {
464 	HPT_U8 MaxWidth;
465 	HPT_U8 CurrentWidth;
466 	HPT_U8 MaxSpeed;
467 	HPT_U8 CurrentSpeed;
468 	HPT_U8 reserve[64];
469 } CONTROLLER_INFO_V2_EXT, *PCONTROLLER_INFO_V2_EXT;
470 
471 
472 #define CEXF_IOPModel            1
473 #define CEXF_SDRAMSize           2
474 #define CEXF_BatteryInstalled    4
475 #define CEXF_BatteryStatus       8
476 #define CEXF_BatteryVoltage      0x10
477 #define CEXF_BatteryBackupTime   0x20
478 #define CEXF_FirmwareVersion     0x40
479 #define CEXF_SerialNumber        0x80
480 #define CEXF_BatteryTemperature  0x100
481 #define CEXF_Power12v            0x200
482 #define CEXF_Power5v             0x400
483 #define CEXF_Power3p3v           0x800
484 #define CEXF_Power2p5v           0x1000
485 #define CEXF_Power1p8v           0x2000
486 #define CEXF_Core1p8v            0x4000
487 #define CEXF_Core1p2v            0x8000
488 #define CEXF_DDR1p8v             0x10000
489 #define CEXF_DDR1p8vRef          0x20000
490 #define CEXF_CPUTemperature      0x40000
491 #define CEXF_BoardTemperature    0x80000
492 #define CEXF_FanSpeed            0x100000
493 #define CEXF_Core1p0v            0x200000
494 #define CEXF_Fan2Speed           0x400000
495 #define CEXF_Power1p0v           0x800000
496 #define CEXF_Power1p5v           0x1000000
497 #define CEXF_SASAddress           0x2000000
498 
499 typedef struct _CONTROLLER_INFO_V3 {
500 	HPT_U8 ChipType;
501 	HPT_U8 InterruptLevel;
502 	HPT_U8 NumBuses;
503 	HPT_U8 ChipFlags;
504 	HPT_U8 szProductID[MAX_NAME_LENGTH];
505 	HPT_U8 szVendorID[MAX_NAME_LENGTH];
506 	HPT_U32 GroupId;
507 	HPT_U8  pci_tree;
508 	HPT_U8  pci_bus;
509 	HPT_U8  pci_device;
510 	HPT_U8  pci_function;
511 	HPT_U32 ExFlags;
512 	HPT_U8  IOPModel[32];
513 	HPT_U32 SDRAMSize;
514 	HPT_U8  BatteryInstalled;
515 	HPT_U8  BatteryStatus;
516 	HPT_U16 BatteryVoltage;
517 	HPT_U32 BatteryBackupTime;
518 	HPT_U32 FirmwareVersion;
519 	HPT_U8  SerialNumber[32];
520 	HPT_U8  BatteryMBInstalled;
521 	HPT_U8  BatteryTemperature;
522 	signed char CPUTemperature;
523 	signed char BoardTemperature;
524 	HPT_U16 FanSpeed;
525 	HPT_U16 Power12v;
526 	HPT_U16 Power5v;
527 	HPT_U16 Power3p3v;
528 	HPT_U16 Power2p5v;
529 	HPT_U16 Power1p8v;
530 	HPT_U16 Core1p8v;
531 	HPT_U16 Core1p2v;
532 	HPT_U16 DDR1p8v;
533 	HPT_U16 DDR1p8vRef;
534 	HPT_U16 Core1p0v;
535 	HPT_U16 Fan2Speed;
536 	HPT_U16 Power1p0v;
537 	HPT_U16 Power1p5v;
538 	HPT_U8  SASAddress[8];
539 	HPT_U8  reserve[48];
540 }
541 CONTROLLER_INFO_V3, *PCONTROLLER_INFO_V3;
542 typedef char check_CONTROLLER_INFO_V3[sizeof(CONTROLLER_INFO_V3)==256? 1:-1];
543 #endif
544 /*
545  * Channel information.
546  */
547 typedef struct _CHANNEL_INFO {
548 	HPT_U32         IoPort;         /* IDE Base Port Address */
549 	HPT_U32         ControlPort;    /* IDE Control Port Address */
550 
551 	DEVICEID    Devices[2];         /* device connected to this channel */
552 
553 } CHANNEL_INFO, *PCHANNEL_INFO;
554 
555 typedef struct _CHANNEL_INFO_V2 {
556 	HPT_U32         IoPort;         /* IDE Base Port Address */
557 	HPT_U32         ControlPort;    /* IDE Control Port Address */
558 
559 	DEVICEID        Devices[2+13];    /* device connected to this channel, PMPort max=15 */
560 } CHANNEL_INFO_V2, *PCHANNEL_INFO_V2;
561 
562 typedef struct _ENCLOSURE_INFO {
563 	HPT_U8  EnclosureType;
564 	HPT_U8  NumberOfPhys;
565 	HPT_U8  AttachedTo;
566 	HPT_U8  Status;
567 	HPT_U8  VendorId[8];
568 	HPT_U8  ProductId[16];
569 	HPT_U8  ProductRevisionLevel[4];
570 	HPT_U32 PortPhyMap;
571 	HPT_U32 reserve[55];
572 } ENCLOSURE_INFO, *PENCLOSURE_INFO;
573 
574 
575 typedef struct _SES_ELEMENT_STATUS {
576 	HPT_U8   ElementType;
577 	HPT_U8   ElementOverallIndex;
578 	HPT_U8   ElementStatus;
579 	HPT_U8   Reserved;
580 	HPT_U32 ElementValue;
581 	HPT_U8   ElementDescriptor[32];
582 }SES_ELEMENT_STATUS,*PSES_ELEMENT_STATUS;
583 
584 #define MAX_ELEMENT_COUNT  80
585 /* Element Type */
586 #define SES_TYPE_UNSPECIFIED         0x00
587 #define SES_TYPE_DEVICE              0x01
588 #define SES_TYPE_POWER_SUPPLY        0x02
589 #define SES_TYPE_FAN                 0x03
590 #define SES_TYPE_TEMPERATURE_SENSOR  0x04
591 #define SES_TYPE_DOOR_LOCK           0x05
592 #define SES_TYPE_SPEAKER             0x06
593 #define SES_TYPE_ES_CONTROLLER       0x07
594 #define SES_TYPE_SCC_CONTROLLER      0x08
595 #define SES_TYPE_NONVOLATILE_CACHE   0x09
596 #define SES_TYPE_UPS                 0x0B
597 #define SES_TYPE_DISPLAY             0x0C
598 #define SES_TYPE_KEYPAD              0x0D
599 #define SES_TYPE_ENCLOSURE           0x0E
600 #define SES_TYPE_SCSI_TRANSCEIVER    0x0F
601 #define SES_TYPE_LANGUAGE            0x10
602 #define SES_TYPE_COMM_PORT           0x11
603 #define SES_TYPE_VOLTAGE_SENSOR      0x12
604 #define SES_TYPE_CURRENT_SENSOR      0x13
605 #define SES_TYPE_SCSI_TARGET_PORT    0x14
606 #define SES_TYPE_SCSI_INITIATOR_PORT 0x15
607 #define SES_TYPE_SIMPLE_SUBENCLOSURE 0x16
608 #define SES_TYPE_ARRAY_DEVICE        0x17
609 #define SES_TYPE_VENDOR_SPECIFIC     0x80
610 
611 /* Element Status */
612 
613 #define	SES_STATUS_UNSUPPORTED   		0x00
614 #define	SES_STATUS_OK					0x01
615 #define	SES_STATUS_CRITICAL			0x02
616 #define	SES_STATUS_NONCRITICAL 		0x03
617 #define	SES_STATUS_UNRECOVERABLE	0x04
618 #define	SES_STATUS_NOTINSTALLED		0x05
619 #define	SES_STATUS_UNKNOWN			0x06
620 #define	SES_STATUS_NOTAVAILABLE		0x07
621 #define	SES_STATUS_RESERVED			0x08
622 
623 
624 typedef struct _ENCLOSURE_INFO_V2 {
625 	HPT_U8  EnclosureType;
626 	HPT_U8  NumberOfPhys;
627 	HPT_U8  AttachedTo;
628 	HPT_U8  Status;
629 	HPT_U8  VendorId[8];
630 	HPT_U8  ProductId[16];
631 	HPT_U8  ProductRevisionLevel[4];
632 	HPT_U32 PortPhyMap;
633 	SES_ELEMENT_STATUS ElementStatus[MAX_ELEMENT_COUNT];
634 } ENCLOSURE_INFO_V2, *PENCLOSURE_INFO_V2;
635 
636 typedef struct _ENCLOSURE_INFO_V3 {
637 	HPT_U8  EnclosureType;
638 	HPT_U8  NumberOfPhys;
639 	HPT_U8  AttachedTo;
640 	HPT_U8  Status;
641 	HPT_U8  VendorId[8];
642 	HPT_U8  ProductId[16];
643 	HPT_U8  ProductRevisionLevel[4];
644 	HPT_U32 PortPhyMap;
645 	HPT_U32	UnitId;	/*272x card has two Cores, unitId is used to distinguish them */
646 	HPT_U32 reserved[32];
647 	SES_ELEMENT_STATUS ElementStatus[MAX_ELEMENT_COUNT];
648 } ENCLOSURE_INFO_V3, *PENCLOSURE_INFO_V3;
649 
650 typedef struct _ENCLOSURE_INFO_V4 {
651 	HPT_U8  EnclosureType;
652 	HPT_U8  NumberOfPhys;
653 	HPT_U8  AttachedTo;
654 	HPT_U8  Status;
655 	HPT_U8  VendorId[8];
656 	HPT_U8  ProductId[16];
657 	HPT_U8  ProductRevisionLevel[4];
658 	HPT_U32 PortPhyMap;
659 	HPT_U32	UnitId;	/*272x card has two Cores, unitId is used to distinguish them */
660 	HPT_U32 ElementCount;
661 	HPT_U32 reserved[32];
662 } ENCLOSURE_INFO_V4, *PENCLOSURE_INFO_V4;
663 
664 #define ENCLOSURE_STATUS_OFFLINE 1
665 
666 #define ENCLOSURE_TYPE_INTERNAL 0
667 #define ENCLOSURE_TYPE_SMP      1
668 #define ENCLOSURE_TYPE_PM       2
669 
670 #ifndef __KERNEL__
671 /*
672  * time represented in HPT_U32 format
673  */
674 typedef struct _TIME_RECORD {
675    HPT_U32        seconds:6;      /* 0 - 59 */
676    HPT_U32        minutes:6;      /* 0 - 59 */
677    HPT_U32        month:4;        /* 1 - 12 */
678    HPT_U32        hours:6;        /* 0 - 59 */
679    HPT_U32        day:5;          /* 1 - 31 */
680    HPT_U32        year:5;         /* 0=2000, 31=2031 */
681 } TIME_RECORD;
682 #endif
683 
684 /*
685  * Array information.
686  */
687 typedef struct _HPT_ARRAY_INFO {
688 	HPT_U8      Name[MAX_ARRAYNAME_LEN];/* array name */
689 	HPT_U8      Description[64];        /* array description */
690 	HPT_U8      CreateManager[16];      /* who created it */
691 	TIME_RECORD CreateTime;             /* when created it */
692 
693 	HPT_U8      ArrayType;              /* array type */
694 	HPT_U8      BlockSizeShift;         /* stripe size */
695 	HPT_U8      nDisk;                  /* member count: Number of ID in Members[] */
696 	HPT_U8      SubArrayType;
697 
698 	HPT_U32     Flags;                  /* working flags, see ARRAY_FLAG_XXX */
699 	HPT_U32     Members[MAX_ARRAY_MEMBERS_V1];  /* member array/disks */
700 
701 	/*
702 	 * rebuilding progress, xx.xx% = sprintf(s, "%.2f%%", RebuildingProgress/100.0);
703 	 * only valid if rebuilding is done by driver code.
704 	 * Member Flags will have ARRAY_FLAG_REBUILDING set at this case.
705 	 * Verify operation use same fields below, the only difference is
706 	 * ARRAY_FLAG_VERIFYING is set.
707 	 */
708 	HPT_U32     RebuildingProgress;
709 	HPT_U32     RebuiltSectors; /* rebuilding point (LBA) for single member */
710 
711 } HPT_ARRAY_INFO, *PHPT_ARRAY_INFO;
712 
713 #if HPT_INTERFACE_VERSION>=0x01010000
714 typedef struct _HPT_ARRAY_INFO_V2 {
715 	HPT_U8      Name[MAX_ARRAYNAME_LEN];/* array name */
716 	HPT_U8      Description[64];        /* array description */
717 	HPT_U8      CreateManager[16];      /* who created it */
718 	TIME_RECORD CreateTime;             /* when created it */
719 
720 	HPT_U8      ArrayType;              /* array type */
721 	HPT_U8      BlockSizeShift;         /* stripe size */
722 	HPT_U8      nDisk;                  /* member count: Number of ID in Members[] */
723 	HPT_U8      SubArrayType;
724 
725 	HPT_U32     Flags;                  /* working flags, see ARRAY_FLAG_XXX */
726 	HPT_U32     Members[MAX_ARRAY_MEMBERS_V2];  /* member array/disks */
727 
728 	HPT_U32     RebuildingProgress;
729 	HPT_U64     RebuiltSectors; /* rebuilding point (LBA) for single member */
730 
731 	HPT_U32     reserve4[4];
732 } HPT_ARRAY_INFO_V2, *PHPT_ARRAY_INFO_V2;
733 #endif
734 
735 #if HPT_INTERFACE_VERSION>=0x01020000
736 typedef struct _HPT_ARRAY_INFO_V3 {
737 	HPT_U8      Name[MAX_ARRAYNAME_LEN];/* array name */
738 	HPT_U8      Description[64];        /* array description */
739 	HPT_U8      CreateManager[16];      /* who created it */
740 	TIME_RECORD CreateTime;             /* when created it */
741 
742 	HPT_U8      ArrayType;              /* array type */
743 	HPT_U8      BlockSizeShift;         /* stripe size */
744 	HPT_U8      nDisk;                  /* member count: Number of ID in Members[] */
745 	HPT_U8      SubArrayType;
746 
747 	HPT_U32     Flags;                  /* working flags, see ARRAY_FLAG_XXX */
748 	HPT_U32     Members[MAX_ARRAY_MEMBERS_V2];  /* member array/disks */
749 
750 	HPT_U32     RebuildingProgress;
751 	HPT_U64     RebuiltSectors;         /* rebuilding point (LBA) for single member */
752 
753 	DEVICEID    TransformSource;
754 	DEVICEID    TransformTarget;        /* destination device ID */
755 	HPT_U32     TransformingProgress;
756 	HPT_U32     Signature;              /* persistent identification*/
757 #if MAX_ARRAY_MEMBERS_V2==16
758 	HPT_U16     Critical_Members;       /* bit mask of critical members */
759 	HPT_U16     reserve2;
760 	HPT_U32     reserve;
761 #else
762 	HPT_U32     Critical_Members;
763 	HPT_U32     reserve;
764 #endif
765 } HPT_ARRAY_INFO_V3, *PHPT_ARRAY_INFO_V3;
766 #endif
767 
768 #if HPT_INTERFACE_VERSION>=0x02000001
769 typedef struct _HPT_ARRAY_INFO_V4 {
770 	HPT_U8      Name[MAX_ARRAYNAME_LEN];/* array name */
771 	HPT_U8      Description[64];        /* array description */
772 	HPT_U8      CreateManager[16];      /* who created it */
773 	TIME_RECORD CreateTime;             /* when created it */
774 
775 	HPT_U8      ArrayType;              /* array type */
776 	HPT_U8      BlockSizeShift;         /* stripe size */
777 	HPT_U8      nDisk;                  /* member count: Number of ID in Members[] */
778 	HPT_U8      SubArrayType;
779 
780 	HPT_U32     Flags;                  /* working flags, see ARRAY_FLAG_XXX */
781 
782 	HPT_U32     RebuildingProgress;
783 	HPT_U64     RebuiltSectors; /* rebuilding point (LBA) for single member */
784 
785 	DEVICEID    TransformSource;
786 	DEVICEID    TransformTarget;   /* destination device ID */
787 	HPT_U32     TransformingProgress;
788 	HPT_U32     Signature;          /* persistent identification*/
789 	HPT_U8       SectorSizeShift; /*sector size = 512B<<SectorSizeShift*/
790 	HPT_U8       reserved2[7];
791 	HPT_U64     Critical_Members;
792 	HPT_U32     Members[MAX_ARRAY_MEMBERS_V3];  /* member array/disks */
793 } HPT_ARRAY_INFO_V4, *PHPT_ARRAY_INFO_V4;
794 #endif
795 
796 
797 /*
798  * ATA/ATAPI Device identify data without the Reserved4.
799  */
800 typedef struct _IDENTIFY_DATA2 {
801 	HPT_U16 GeneralConfiguration;
802 	HPT_U16 NumberOfCylinders;
803 	HPT_U16 Reserved1;
804 	HPT_U16 NumberOfHeads;
805 	HPT_U16 UnformattedBytesPerTrack;
806 	HPT_U16 UnformattedBytesPerSector;
807 	HPT_U8  SasAddress[8];
808 	HPT_U16 SerialNumber[10];
809 	HPT_U16 BufferType;
810 	HPT_U16 BufferSectorSize;
811 	HPT_U16 NumberOfEccBytes;
812 	HPT_U16 FirmwareRevision[4];
813 	HPT_U16 ModelNumber[20];
814 	HPT_U8  MaximumBlockTransfer;
815 	HPT_U8  VendorUnique2;
816 	HPT_U16 DoubleWordIo;
817 	HPT_U16 Capabilities;
818 	HPT_U16 Reserved2;
819 	HPT_U8  VendorUnique3;
820 	HPT_U8  PioCycleTimingMode;
821 	HPT_U8  VendorUnique4;
822 	HPT_U8  DmaCycleTimingMode;
823 	HPT_U16 TranslationFieldsValid;
824 	HPT_U16 NumberOfCurrentCylinders;
825 	HPT_U16 NumberOfCurrentHeads;
826 	HPT_U16 CurrentSectorsPerTrack;
827 	HPT_U32 CurrentSectorCapacity; /*word58,59  the value indecate the logical sector size. */
828 	HPT_U16 CurrentMultiSectorSetting;
829 	HPT_U32 UserAddressableSectors;
830 	HPT_U8  SingleWordDMASupport;
831 	HPT_U8  SingleWordDMAActive;
832 	HPT_U8  MultiWordDMASupport;
833 	HPT_U8  MultiWordDMAActive;
834 	HPT_U8  AdvancedPIOModes;
835 	HPT_U8  Reserved4;
836 	HPT_U16 MinimumMWXferCycleTime;
837 	HPT_U16 RecommendedMWXferCycleTime;
838 	HPT_U16 MinimumPIOCycleTime;
839 	HPT_U16 MinimumPIOCycleTimeIORDY;
840 	HPT_U16 Reserved5[2];
841 	HPT_U16 ReleaseTimeOverlapped;
842 	HPT_U16 ReleaseTimeServiceCommand;
843 	HPT_U16 MajorRevision;
844 	HPT_U16 MinorRevision;
845 } __attribute__((packed)) IDENTIFY_DATA2, *PIDENTIFY_DATA2;
846 
847 /*
848  * physical device information.
849  * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data.
850  */
851 typedef struct _DEVICE_INFO {
852 	HPT_U8   ControllerId;          /* controller id */
853 	HPT_U8   PathId;                /* bus */
854 	HPT_U8   TargetId;              /* id */
855 	HPT_U8   DeviceModeSetting;     /* Current Data Transfer mode: 0-4 PIO 0-4 */
856 									/* 5-7 MW DMA0-2, 8-13 UDMA0-5             */
857 	HPT_U8   DeviceType;            /* device type */
858 	HPT_U8   UsableMode;            /* highest usable mode */
859 
860 #ifdef __BIG_ENDIAN_BITFIELD
861 	HPT_U8   NCQEnabled: 1;
862 	HPT_U8   NCQSupported: 1;
863 	HPT_U8   TCQEnabled: 1;
864 	HPT_U8   TCQSupported: 1;
865 	HPT_U8   WriteCacheEnabled: 1;
866 	HPT_U8   WriteCacheSupported: 1;
867 	HPT_U8   ReadAheadEnabled: 1;
868 	HPT_U8   ReadAheadSupported: 1;
869 	HPT_U8   reserved6: 6;
870 	HPT_U8   SpinUpMode: 2;
871 #else
872 	HPT_U8   ReadAheadSupported: 1;
873 	HPT_U8   ReadAheadEnabled: 1;
874 	HPT_U8   WriteCacheSupported: 1;
875 	HPT_U8   WriteCacheEnabled: 1;
876 	HPT_U8   TCQSupported: 1;
877 	HPT_U8   TCQEnabled: 1;
878 	HPT_U8   NCQSupported: 1;
879 	HPT_U8   NCQEnabled: 1;
880 	HPT_U8   SpinUpMode: 2;
881 	HPT_U8   reserved6: 6;
882 #endif
883 
884 	HPT_U32     Flags;              /* working flags, see DEVICE_FLAG_XXX */
885 
886 	IDENTIFY_DATA2 IdentifyData;    /* Identify Data of this device */
887 
888 }
889 __attribute__((packed)) DEVICE_INFO, *PDEVICE_INFO;
890 
891 #if HPT_INTERFACE_VERSION>=0x01020000
892 #define MAX_PARENTS_PER_DISK    8
893 /*
894  * physical device information.
895  * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data.
896  */
897 typedef struct _DEVICE_INFO_V2 {
898 	HPT_U8   ControllerId;          /* controller id */
899 	HPT_U8   PathId;                /* bus */
900 	HPT_U8   TargetId;              /* id */
901 	HPT_U8   DeviceModeSetting;     /* Current Data Transfer mode: 0-4 PIO 0-4 */
902 									/* 5-7 MW DMA0-2, 8-13 UDMA0-5             */
903 	HPT_U8   DeviceType;            /* device type */
904 	HPT_U8   UsableMode;            /* highest usable mode */
905 
906 #ifdef __BIG_ENDIAN_BITFIELD
907 	HPT_U8   NCQEnabled: 1;
908 	HPT_U8   NCQSupported: 1;
909 	HPT_U8   TCQEnabled: 1;
910 	HPT_U8   TCQSupported: 1;
911 	HPT_U8   WriteCacheEnabled: 1;
912 	HPT_U8   WriteCacheSupported: 1;
913 	HPT_U8   ReadAheadEnabled: 1;
914 	HPT_U8   ReadAheadSupported: 1;
915 	HPT_U8   reserved6: 6;
916 	HPT_U8   SpinUpMode: 2;
917 #else
918 	HPT_U8   ReadAheadSupported: 1;
919 	HPT_U8   ReadAheadEnabled: 1;
920 	HPT_U8   WriteCacheSupported: 1;
921 	HPT_U8   WriteCacheEnabled: 1;
922 	HPT_U8   TCQSupported: 1;
923 	HPT_U8   TCQEnabled: 1;
924 	HPT_U8   NCQSupported: 1;
925 	HPT_U8   NCQEnabled: 1;
926 	HPT_U8   SpinUpMode: 2;
927 	HPT_U8   reserved6: 6;
928 #endif
929 
930 	HPT_U32     Flags;              /* working flags, see DEVICE_FLAG_XXX */
931 
932 	IDENTIFY_DATA2 IdentifyData;    /* Identify Data of this device */
933 
934 	HPT_U64 TotalFree;
935 	HPT_U64 MaxFree;
936 	HPT_U64 BadSectors;
937 	DEVICEID ParentArrays[MAX_PARENTS_PER_DISK];
938 
939 }
940 __attribute__((packed)) DEVICE_INFO_V2, *PDEVICE_INFO_V2, DEVICE_INFO_V3, *PDEVICE_INFO_V3;
941 
942 /*
943  * HPT601 information
944  */
945 #endif
946 /*
947  * HPT601 information
948  */
949 #define HPT601_INFO_DEVICEID      1
950 #define HPT601_INFO_TEMPERATURE   2
951 #define HPT601_INFO_FANSTATUS     4
952 #define HPT601_INFO_BEEPERCONTROL 8
953 #define HPT601_INFO_LED1CONTROL   0x10
954 #define HPT601_INFO_LED2CONTROL   0x20
955 #define HPT601_INFO_POWERSTATUS   0x40
956 
957 typedef struct _HPT601_INFO_ {
958 	HPT_U16 ValidFields;        /* mark valid fields below */
959 	HPT_U16 DeviceId;           /* 0x5A3E */
960 	HPT_U16 Temperature;        /* Read: temperature sensor value. Write: temperature limit */
961 	HPT_U16 FanStatus;          /* Fan status */
962 	HPT_U16 BeeperControl;      /* bit4: beeper control bit. bit0-3: frequency bits */
963 	HPT_U16 LED1Control;        /* bit4: twinkling control bit. bit0-3: frequency bits */
964 	HPT_U16 LED2Control;        /* bit4: twinkling control bit. bit0-3: frequency bits */
965 	HPT_U16 PowerStatus;        /* 1: has power 2: no power */
966 } HPT601_INFO, *PHPT601_INFO;
967 
968 #if HPT_INTERFACE_VERSION>=0x01010000
969 #ifndef __KERNEL__
970 /* cache policy for each vdev, copied from ldm.h */
971 #define CACHE_POLICY_NONE 0
972 #define CACHE_POLICY_WRITE_THROUGH 1
973 #define CACHE_POLICY_WRITE_BACK 2
974 
975 #endif
976 #endif
977 /*
978  * Logical device information.
979  * Union of ArrayInfo and DeviceInfo.
980  * Common properties will be put in logical device information.
981  */
982 typedef struct _LOGICAL_DEVICE_INFO {
983 	HPT_U8      Type;                   /* LDT_ARRAY or LDT_DEVICE */
984 	HPT_U8      reserved[3];
985 
986 	HPT_U32     Capacity;               /* array capacity */
987 	DEVICEID    ParentArray;
988 
989 	union {
990 		HPT_ARRAY_INFO array;
991 		DEVICE_INFO device;
992 	} __attribute__((packed)) u;
993 
994 } __attribute__((packed)) LOGICAL_DEVICE_INFO, *PLOGICAL_DEVICE_INFO;
995 
996 #if HPT_INTERFACE_VERSION>=0x01010000
997 typedef struct _LOGICAL_DEVICE_INFO_V2 {
998 	HPT_U8      Type;                   /* LDT_ARRAY or LDT_DEVICE */
999 	HPT_U8      reserved[3];
1000 
1001 	HPT_U64     Capacity;               /* array capacity */
1002 	DEVICEID    ParentArray;            /* for physical device, Please don't use this field.
1003 										 * use ParentArrays field in DEVICE_INFO_V2
1004 										 */
1005 
1006 	union {
1007 		HPT_ARRAY_INFO_V2 array;
1008 		DEVICE_INFO device;
1009 	} __attribute__((packed)) u;
1010 
1011 } __attribute__((packed)) LOGICAL_DEVICE_INFO_V2, *PLOGICAL_DEVICE_INFO_V2;
1012 #endif
1013 
1014 #if HPT_INTERFACE_VERSION>=0x01020000
1015 #define INVALID_TARGET_ID   0xFF
1016 #define INVALID_BUS_ID      0xFF
1017 typedef struct _LOGICAL_DEVICE_INFO_V3 {
1018 	HPT_U8      Type;                   /* LDT_ARRAY or LDT_DEVICE */
1019 	HPT_U8      CachePolicy;            /* refer to CACHE_POLICY_xxx */
1020 	HPT_U8      VBusId;                 /* vbus sequence in vbus_list */
1021 	HPT_U8      TargetId;               /* OS target id. Value 0xFF is invalid */
1022 										/* OS disk name: HPT DISK $VBusId_$TargetId */
1023 	HPT_U64     Capacity;               /* array capacity */
1024 	DEVICEID    ParentArray;            /* for physical device, don't use this field.
1025 										 * use ParentArrays field in DEVICE_INFO_V2 instead.
1026 										 */
1027 	HPT_U32     TotalIOs;
1028 	HPT_U32     TobalMBs;
1029 	HPT_U32     IOPerSec;
1030 	HPT_U32     MBPerSec;
1031 
1032 	union {
1033 		HPT_ARRAY_INFO_V3 array;
1034 		DEVICE_INFO_V2 device;
1035 	} __attribute__((packed)) u;
1036 
1037 }
1038 __attribute__((packed)) LOGICAL_DEVICE_INFO_V3, *PLOGICAL_DEVICE_INFO_V3;
1039 #endif
1040 
1041 #if HPT_INTERFACE_VERSION>=0x02000001
1042 typedef struct _LOGICAL_DEVICE_INFO_V4 {
1043 	HPT_U32    dwSize;
1044 	HPT_U8      revision;
1045 	HPT_U8      reserved[7];
1046 
1047 	HPT_U8      Type;                   /* LDT_ARRAY or LDT_DEVICE */
1048 	HPT_U8      CachePolicy;            /* refer to CACHE_POLICY_xxx */
1049 	HPT_U8      VBusId;                 /* vbus sequence in vbus_list */
1050 	HPT_U8      TargetId;               /* OS target id. Value 0xFF is invalid */
1051 										/* OS disk name: HPT DISK $VBusId_$TargetId */
1052 	HPT_U64     Capacity;               /* array capacity */
1053 	DEVICEID    ParentArray;            /* for physical device, don't use this field.
1054 										 * use ParentArrays field in DEVICE_INFO_V2 instead.
1055 										 */
1056 	HPT_U32     TotalIOs;
1057 	HPT_U32     TobalMBs;
1058 	HPT_U32     IOPerSec;
1059 	HPT_U32     MBPerSec;
1060 
1061 	union {
1062 		HPT_ARRAY_INFO_V4 array;
1063 		DEVICE_INFO_V3 device;
1064 	} __attribute__((packed)) u;
1065 }
1066 __attribute__((packed)) LOGICAL_DEVICE_INFO_V4, *PLOGICAL_DEVICE_INFO_V4;
1067 
1068 /*LOGICAL_DEVICE_INFO_V4 max revision number*/
1069 #define LOGICAL_DEVICE_INFO_V4_REVISION 0
1070 /*If new revision was defined please check evey revision size*/
1071 #define LOGICAL_DEVICE_INFO_V4_R0_SIZE (sizeof(LOGICAL_DEVICE_INFO_V4))
1072 #endif
1073 
1074 /*
1075  * ALTERABLE_ARRAY_INFO and ALTERABLE_DEVICE_INFO, used in set_array_info()
1076  * and set_device_info().
1077  * When set_xxx_info() is called, the ValidFields member indicates which
1078  * fields in the structure are valid.
1079  */
1080 /* field masks */
1081 #define AAIF_NAME           1
1082 #define AAIF_DESCRIPTION    2
1083 
1084 #define ADIF_MODE           1
1085 #define ADIF_TCQ            2
1086 #define ADIF_NCQ            4
1087 #define ADIF_WRITE_CACHE    8
1088 #define ADIF_READ_AHEAD     0x10
1089 #define ADIF_SPIN_UP_MODE   0x20
1090 #define ADIF_SET_BAD        0x40
1091 
1092 typedef struct _ALTERABLE_ARRAY_INFO {
1093 	HPT_U32   ValidFields;              /* mark valid fields below */
1094 	HPT_U8  Name[MAX_ARRAYNAME_LEN];    /* array name */
1095 	HPT_U8  Description[64];            /* array description */
1096 }__attribute__((packed))ALTERABLE_ARRAY_INFO, *PALTERABLE_ARRAY_INFO;
1097 
1098 typedef struct _ALTERABLE_DEVICE_INFO {
1099 	HPT_U32   ValidFields;              /* mark valid fields below */
1100 	HPT_U8   DeviceModeSetting;         /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */
1101 }__attribute__((packed))ALTERABLE_DEVICE_INFO, *PALTERABLE_DEVICE_INFO;
1102 
1103 typedef struct _ALTERABLE_DEVICE_INFO_V2 {
1104 	HPT_U32   ValidFields;              /* mark valid fields below */
1105 	HPT_U8   DeviceModeSetting;         /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */
1106 	HPT_U8   TCQEnabled;
1107 	HPT_U8   NCQEnabled;
1108 	HPT_U8   WriteCacheEnabled;
1109 	HPT_U8   ReadAheadEnabled;
1110 	HPT_U8   SpinUpMode;
1111 	HPT_U8   SetBadSector;
1112 	HPT_U8   reserve[1];
1113 	HPT_U32  reserve2[13]; /* pad to 64 bytes */
1114 }__attribute__((packed))ALTERABLE_DEVICE_INFO_V2, *PALTERABLE_DEVICE_INFO_V2;
1115 
1116 #if HPT_INTERFACE_VERSION>=0x01020000
1117 
1118 #define TARGET_TYPE_DEVICE  0
1119 #define TARGET_TYPE_ARRAY   1
1120 
1121 
1122 #define AIT_NAME            0
1123 #define AIT_DESCRIPTION     1
1124 #define AIT_CACHE_POLICY    2
1125 
1126 
1127 #define DIT_MODE        0
1128 #define DIT_READ_AHEAD  1
1129 #define DIT_WRITE_CACHE 2
1130 #define DIT_TCQ         3
1131 #define DIT_NCQ         4
1132 #define DIT_IDENTIFY    5
1133 
1134 #define DISK_CACHE_POLICY_UNCHANGE 0
1135 #define DISK_CACHE_POLICY_ENABLE 1
1136 #define DISK_CACHE_POLICY_DISABLE 2
1137 
1138 /* param type is determined by target_type and info_type*/
1139 typedef struct _SET_DEV_INFO
1140 {
1141 	HPT_U8 target_type;
1142 	HPT_U8 infor_type;
1143 	HPT_U16 param_length;
1144 	#define SET_VDEV_INFO_param(p) ((HPT_U8 *)(p)+sizeof(SET_VDEV_INFO))
1145 	/* HPT_U8 param[0]; */
1146 } SET_VDEV_INFO, * PSET_VDEV_INFO;
1147 
1148 typedef HPT_U8 PARAM_ARRAY_NAME[MAX_ARRAYNAME_LEN] ;
1149 typedef HPT_U8 PARAM_ARRAY_DES[64];
1150 typedef HPT_U8 PARAM_DEVICE_MODE, PARAM_TCQ, PARAM_NCQ, PARAM_READ_AHEAD, PARAM_WRITE_CACHE, PARAM_CACHE_POLICY;
1151 
1152 #endif
1153 
1154 /*
1155  * CREATE_ARRAY_PARAMS
1156  *  Param structure used to create an array.
1157  */
1158 typedef struct _CREATE_ARRAY_PARAMS {
1159 	HPT_U8 ArrayType;                   /* 1-level array type */
1160 	HPT_U8 nDisk;                       /* number of elements in Members[] array */
1161 	HPT_U8 BlockSizeShift;              /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
1162 	HPT_U8 CreateFlags;                 /* See CAF_xxx */
1163 
1164 	HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */
1165 	HPT_U8      Description[64];        /* array description */
1166 	HPT_U8      CreateManager[16];      /* who created it */
1167 	TIME_RECORD CreateTime;             /* when created it */
1168 
1169 	HPT_U32 Members[MAX_ARRAY_MEMBERS_V1];/* ID of array members, a member can be an array */
1170 
1171 } CREATE_ARRAY_PARAMS, *PCREATE_ARRAY_PARAMS;
1172 
1173 #if HPT_INTERFACE_VERSION>=0x01010000
1174 typedef struct _CREATE_ARRAY_PARAMS_V2 {
1175 	HPT_U8 ArrayType;                   /* 1-level array type */
1176 	HPT_U8 nDisk;                       /* number of elements in Members[] array */
1177 	HPT_U8 BlockSizeShift;              /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
1178 	HPT_U8 CreateFlags;                 /* See CAF_xxx */
1179 
1180 	HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */
1181 	HPT_U8 Description[64];             /* array description */
1182 	HPT_U8 CreateManager[16];           /* who created it */
1183 	TIME_RECORD CreateTime;             /* when created it */
1184 	HPT_U64 Capacity;
1185 
1186 	HPT_U32 Members[MAX_ARRAY_MEMBERS_V2];/* ID of array members, a member can be an array */
1187 
1188 } CREATE_ARRAY_PARAMS_V2, *PCREATE_ARRAY_PARAMS_V2;
1189 #endif
1190 
1191 #if HPT_INTERFACE_VERSION>=0x02000001
1192 typedef struct _CREATE_ARRAY_PARAMS_V3 {
1193 	HPT_U32  dwSize;
1194 	HPT_U8 revision;			/*CREATE_ARRAY_PARAMS_V3_REVISION*/
1195 	HPT_U8 diskCachePolicy;  /*unchange:0 enable:1 disable:2*/
1196 	HPT_U8 reserved[4];
1197 	HPT_U8 subDisks;            /* RAIDn0 sub array */
1198 	HPT_U8 SectorSizeShift;     /*sector size = 512B<<SectorSizeShift*/
1199 	HPT_U8 ArrayType;                   /* 1-level array type */
1200 	HPT_U8 nDisk;                       /* number of elements in Members[] array */
1201 	HPT_U8 BlockSizeShift;              /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
1202 	HPT_U8 CreateFlags;                 /* See CAF_xxx */
1203 
1204 	HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */
1205 	HPT_U8 Description[64];     /* array description */
1206 	HPT_U8 CreateManager[16];       /* who created it */
1207 	TIME_RECORD CreateTime;             /* when created it */
1208 	HPT_U64 Capacity;
1209 
1210 	HPT_U32 Members[MAX_ARRAY_MEMBERS_V3];/* ID of array members, a member can be an array */
1211 } CREATE_ARRAY_PARAMS_V3, *PCREATE_ARRAY_PARAMS_V3;
1212 
1213 /*CREATE_ARRAY_PARAMS_V3 current max revision*/
1214 #define CREATE_ARRAY_PARAMS_V3_REVISION 0
1215 /*If new revision defined please check evey revision size*/
1216 #define CREATE_ARRAY_PARAMS_V3_R0_SIZE (sizeof(CREATE_ARRAY_PARAMS_V3))
1217 #endif
1218 
1219 #if HPT_INTERFACE_VERSION < 0x01020000
1220 /*
1221  * Flags used for creating an RAID 1 array
1222  *
1223  * CAF_CREATE_AND_DUPLICATE
1224  *    Copy source disk contents to target for RAID 1. If user choose "create and duplicate"
1225  *    to create an array, GUI will call CreateArray() with this flag set. Then GUI should
1226  *    call hpt_get_device_info() with the returned array ID and check returned flags to
1227  *    see if ARRAY_FLAG_REBUILDING is set. If not set, driver does not support rebuilding
1228  *    and GUI must do duplication itself.
1229  * CAF_DUPLICATE_MUST_DONE
1230  *    If the duplication is aborted or fails, do not create the array.
1231  */
1232 #define CAF_CREATE_AND_DUPLICATE 1
1233 #define CAF_DUPLICATE_MUST_DONE  2
1234 #define CAF_CREATE_AS_RAID15     4
1235 /*
1236  * Flags used for creating an RAID 5 array
1237  */
1238 #define CAF_CREATE_R5_NO_BUILD     1
1239 #define CAF_CREATE_R5_ZERO_INIT    2
1240 #define CAF_CREATE_R5_BUILD_PARITY 4
1241 
1242 #else
1243 /*
1244  * Flags used for creating
1245  */
1246 #define CAF_FOREGROUND_INITIALIZE   1
1247 #define CAF_BACKGROUND_INITIALIZE   2
1248 #define CAF_CREATE_R5_WRITE_BACK    (CACHE_POLICY_WRITE_BACK<<CAF_CACHE_POLICY_SHIFT)
1249 
1250 
1251 #define CAF_CACHE_POLICY_MASK       0x1C
1252 #define CAF_CACHE_POLICY_SHIFT      2
1253 
1254 #endif
1255 
1256 #define CAF_KEEP_DATA_ALWAYS     0x80
1257 
1258 /* Flags used for deleting an array
1259  *
1260  * DAF_KEEP_DATA_IF_POSSIBLE
1261  *    If this flag is set, deleting a RAID 1 array will not destroy the data on both disks.
1262  *    Deleting a JBOD should keep partitions on first disk ( not implement now ).
1263  *    Deleting a RAID 0/1 should result as two RAID 0 array ( not implement now ).
1264  */
1265 #define DAF_KEEP_DATA_IF_POSSIBLE 1
1266 #define DAF_KEEP_DATA_ALWAYS      2
1267 
1268 /*
1269  * event types
1270  */
1271 #define ET_DEVICE_REMOVED   1   /* device removed */
1272 #define ET_DEVICE_PLUGGED   2   /* device plugged */
1273 #define ET_DEVICE_ERROR     3   /* device I/O error */
1274 #define ET_REBUILD_STARTED  4
1275 #define ET_REBUILD_ABORTED  5
1276 #define ET_REBUILD_FINISHED 6
1277 #define ET_SPARE_TOOK_OVER  7
1278 #define ET_REBUILD_FAILED   8
1279 #define ET_VERIFY_STARTED   9
1280 #define ET_VERIFY_ABORTED   10
1281 #define ET_VERIFY_FAILED    11
1282 #define ET_VERIFY_FINISHED  12
1283 #define ET_INITIALIZE_STARTED   13
1284 #define ET_INITIALIZE_ABORTED   14
1285 #define ET_INITIALIZE_FAILED    15
1286 #define ET_INITIALIZE_FINISHED  16
1287 #define ET_VERIFY_DATA_ERROR    17
1288 #define ET_TRANSFORM_STARTED    18
1289 #define ET_TRANSFORM_ABORTED    19
1290 #define ET_TRANSFORM_FAILED     20
1291 #define ET_TRANSFORM_FINISHED   21
1292 #define ET_SMART_FAILED         22
1293 #define ET_SMART_PASSED         23
1294 #define ET_SECTOR_REPAIR_FAIL     24
1295 #define ET_SECTOR_REPAIR_SUCCESS  25
1296 #define ET_ERASE_FAIL		26
1297 #define ET_ERASE_SUCCESS	27
1298 #define ET_CONTINUE_REBUILD_ON_ERROR 28
1299 
1300 
1301 /*
1302  * event structure
1303  */
1304 typedef struct _HPT_EVENT {
1305 	TIME_RECORD Time;
1306 	DEVICEID    DeviceID;
1307 	HPT_U8       EventType;
1308 	HPT_U8      reserved[3];
1309 
1310 	HPT_U8      Data[32]; /* various data depend on EventType */
1311 } HPT_EVENT, *PHPT_EVENT;
1312 
1313 /*
1314  * IDE pass-through command. Use it at your own risk!
1315  */
1316 typedef struct _IDE_PASS_THROUGH_HEADER {
1317 	DEVICEID idDisk;             /* disk ID */
1318 	HPT_U8     bFeaturesReg;     /* feature register */
1319 	HPT_U8     bSectorCountReg;  /* IDE sector count register. */
1320 	HPT_U8     bLbaLowReg;       /* IDE LBA low value. */
1321 	HPT_U8     bLbaMidReg;       /* IDE LBA mid register. */
1322 	HPT_U8     bLbaHighReg;      /* IDE LBA high value. */
1323 	HPT_U8     bDriveHeadReg;    /* IDE drive/head register. */
1324 	HPT_U8     bCommandReg;      /* Actual IDE command. Checked for validity by driver. */
1325 	HPT_U8     nSectors;         /* data size in sectors, if the command has data transfer */
1326 	HPT_U8     protocol;         /* IO_COMMAND_(READ,WRITE) or zero for non-DATA */
1327 	HPT_U8     reserve[3];
1328 	#define IDE_PASS_THROUGH_buffer(p) ((HPT_U8 *)(p) + sizeof(IDE_PASS_THROUGH_HEADER))
1329 	/* HPT_U8     DataBuffer[0]; */
1330 }
1331 IDE_PASS_THROUGH_HEADER, *PIDE_PASS_THROUGH_HEADER;
1332 
1333 typedef struct _IDE_PASS_THROUGH_HEADER_V2 {
1334 	DEVICEID idDisk;             /* disk ID */
1335 	HPT_U16    bFeaturesReg;     /* feature register */
1336 	HPT_U16    bSectorCountReg;  /* IDE sector count register. */
1337 	HPT_U16    bLbaLowReg;       /* IDE LBA low value. */
1338 	HPT_U16    bLbaMidReg;       /* IDE LBA mid register. */
1339 	HPT_U16    bLbaHighReg;      /* IDE LBA high value. */
1340 	HPT_U8     bDriveHeadReg;    /* IDE drive/head register. */
1341 	HPT_U8     bCommandReg;      /* Actual IDE command. Checked for validity by driver. */
1342 	HPT_U16    nSectors;         /* data size in sectors, if the command has data transfer */
1343 	HPT_U8     protocol;         /* IO_COMMAND_(READ,WRITE) or zero for non-DATA */
1344 	HPT_U8     reserve;
1345 	#define IDE_PASS_THROUGH_V2_buffer(p) ((HPT_U8 *)(p) + sizeof(IDE_PASS_THROUGH_HEADER_V2))
1346 	/* HPT_U8     DataBuffer[0]; */
1347 }
1348 IDE_PASS_THROUGH_HEADER_V2, *PIDE_PASS_THROUGH_HEADER_V2;
1349 
1350 typedef struct _HPT_SCSI_PASSTHROUGH_IN {
1351 	DEVICEID idDisk;
1352 	HPT_U8   protocol;
1353 	HPT_U8   reserve1;
1354 	HPT_U8   reserve2;
1355 	HPT_U8   cdbLength;
1356 	HPT_U8   cdb[16];
1357 	HPT_U32  dataLength;
1358 	/* data follows, if any */
1359 }
1360 HPT_SCSI_PASSTHROUGH_IN, *PHPT_SCSI_PASSTHROUGH_IN;
1361 
1362 typedef struct _HPT_SCSI_PASSTHROUGH_OUT {
1363 	HPT_U8   scsiStatus;
1364 	HPT_U8   reserve1;
1365 	HPT_U8   reserve2;
1366 	HPT_U8   reserve3;
1367 	HPT_U32  dataLength;
1368 	/* data/sense follows if any */
1369 }
1370 HPT_SCSI_PASSTHROUGH_OUT, *PHPT_SCSI_PASSTHROUGH_OUT;
1371 
1372 /*
1373  * device io packet format
1374  */
1375 typedef struct _DEVICE_IO_EX_PARAMS {
1376 	DEVICEID idDisk;
1377 	HPT_U32    Lba;
1378 	HPT_U16   nSectors;
1379 	HPT_U8    Command;    /* IO_COMMAD_xxx */
1380 	HPT_U8    BufferType; /* BUFFER_TYPE_xxx, see below */
1381 	HPT_U32    BufferPtr;
1382 }
1383 DEVICE_IO_EX_PARAMS, *PDEVICE_IO_EX_PARAMS;
1384 
1385 #define BUFFER_TYPE_LOGICAL              1 /* logical pointer to buffer */
1386 #define BUFFER_TYPE_PHYSICAL             2 /* physical address of buffer */
1387 #define BUFFER_TYPE_LOGICAL_LOGICAL_SG   3 /* logical pointer to logical S/G table */
1388 #define BUFFER_TYPE_LOGICAL_PHYSICAL_SG  4 /* logical pointer to physical S/G table */
1389 #define BUFFER_TYPE_PHYSICAL_LOGICAL_SG  5 /* physical address to logical S/G table */
1390 #define BUFFER_TYPE_PHYSICAL_PHYSICAL_SG 6 /* physical address of physical S/G table */
1391 #define BUFFER_TYPE_PHYSICAL_PHYSICAL_SG_PIO 7 /* non DMA capable physical address of physical S/G table */
1392 
1393 typedef struct _HPT_DRIVER_PARAMETER {
1394 	char    name[32];
1395 	HPT_U8  value[32];
1396 	HPT_U8  type;        /* HPT_DRIVER_PARAMETER_TYPE_* */
1397 	HPT_U8  persistent;
1398 	HPT_U8  reserve2[2];
1399 	HPT_U8  location;    /* 0 - system */
1400 	HPT_U8  controller;
1401 	HPT_U8  bus;
1402 	HPT_U8  reserve1;
1403 	char    desc[128];
1404 }
1405 HPT_DRIVER_PARAMETER, *PHPT_DRIVER_PARAMETER;
1406 
1407 #define HPT_DRIVER_PARAMETER_TYPE_INT 1
1408 #define HPT_DRIVER_PARAMETER_TYPE_BOOL 2
1409 
1410 typedef struct _HPT_PM_CMDSTAT {
1411 	HPT_U64 timeStamp;
1412 	HPT_U64 lba;
1413 	HPT_U16 sectors;
1414 	HPT_U16 reserved;
1415 	HPT_U32 rspTime;
1416 }
1417 HPT_PM_CMDSTAT, *PHPT_PM_CMDSTAT;
1418 
1419 #define HIGHEST_RSPTIME_CMD_SAVE 10
1420 #define RSPTIME_HISTOGRAM_SEGMENT_COUNT 38
1421 
1422 typedef struct _HPT_PM_IOSTAT {
1423 	HPT_PM_CMDSTAT highestRspCmdStatData[HIGHEST_RSPTIME_CMD_SAVE];
1424 	HPT_U32 rspTimeHistogram[RSPTIME_HISTOGRAM_SEGMENT_COUNT];
1425 	HPT_U16 pendingIo;
1426 	HPT_U16 activeIo;
1427 	HPT_U32 instantKBPs;
1428 	HPT_U32 averageKBPs;
1429 	HPT_U32 instantIOPs;
1430 	HPT_U32 averageIOPs;
1431 }
1432 HPT_PM_IOSTAT, *PHPT_PM_IOSTAT;
1433 
1434 /*
1435  * disk config region
1436  */
1437 typedef struct _ACCESS_CONFIG_REG {
1438 	DEVICEID  id;
1439 	HPT_U16   start;
1440 	HPT_U8    sectors;
1441 	HPT_U8    read;
1442 	HPT_U32   Reserved;
1443 	#define ACCESS_CONFIG_REG_buffer(p) ((HPT_U8 *)(p) + sizeof(ACCESS_CONFIG_REG_PARAMS))
1444 } __attribute__((packed))ACCESS_CONFIG_REG_PARAMS, *PACCESS_CONFIG_REG_PARAMS;
1445 
1446 /*
1447  * dump meta data
1448  */
1449 typedef struct _DUMP_METADATA {
1450 	DEVICEID  id;
1451 	HPT_U8    sectors;
1452 	HPT_U8    backsectors;
1453 	HPT_U8    offset;
1454 	HPT_U8    backoffset;
1455 } __attribute__((packed))DUMP_METADATA_PARAMS, *PDUMP_METADATA_PARAMS;
1456 
1457 
1458 
1459 /*
1460  * ioctl structure
1461  */
1462 #define HPT_IOCTL_MAGIC32 0x1A2B3C4D
1463 #define HPT_IOCTL_MAGIC   0xA1B2C3D4
1464 
1465 typedef struct _HPT_IOCTL_PARAM {
1466 	HPT_U32   Magic;                 /* used to check if it's a valid ioctl packet */
1467 	HPT_U32   dwIoControlCode;       /* operation control code */
1468 	HPT_PTR   lpInBuffer;            /* input data buffer */
1469 	HPT_U32   nInBufferSize;         /* size of input data buffer */
1470 	HPT_PTR   lpOutBuffer;           /* output data buffer */
1471 	HPT_U32   nOutBufferSize;        /* size of output data buffer */
1472 	HPT_PTR   lpBytesReturned;       /* count of HPT_U8s returned */
1473 }
1474 HPT_IOCTL_PARAM, *PHPT_IOCTL_PARAM;
1475 
1476 /* for 32-bit app running on 64-bit system */
1477 typedef struct _HPT_IOCTL_PARAM32 {
1478 	HPT_U32   Magic;
1479 	HPT_U32   dwIoControlCode;
1480 	HPT_U32   lpInBuffer;
1481 	HPT_U32   nInBufferSize;
1482 	HPT_U32   lpOutBuffer;
1483 	HPT_U32   nOutBufferSize;
1484 	HPT_U32   lpBytesReturned;
1485 }
1486 HPT_IOCTL_PARAM32, *PHPT_IOCTL_PARAM32;
1487 
1488 #if !defined(__KERNEL__) || defined(SIMULATE)
1489 /*
1490  * User-mode ioctl parameter passing conventions:
1491  *   The ioctl function implementation is platform specific, so we don't
1492  * have forced rules for it. However, it's suggested to use a parameter
1493  * passing method as below
1494  *   1) Put all input data continuously in an input buffer.
1495  *   2) Prepare an output buffer with enough size if needed.
1496  *   3) Fill a HPT_IOCTL_PARAM structure.
1497  *   4) Pass the structure to driver through a platform-specific method.
1498  * This is implemented in the mid-layer user-mode library. The UI
1499  * programmer needn't care about it.
1500  */
1501 
1502 /************************************************************************
1503  * User mode functions
1504  ************************************************************************/
1505 /*
1506  * hpt_get_version
1507  * Version compatibility: all versions
1508  * Parameters:
1509  *  None
1510  * Returns:
1511  *  interface version. 0 when fail.
1512  */
1513 HPT_U32 hpt_get_version(void);
1514 
1515 /*
1516  * hpt_get_driver_capabilities
1517  * Version compatibility: v1.0.0.2 or later
1518  * Parameters:
1519  *  Pointer to receive a DRIVE_CAPABILITIES structure. The caller must set
1520  *  dwSize member to sizeof(DRIVER_CAPABILITIES). The callee must check this
1521  *  member to see if it's correct.
1522  * Returns:
1523  *  0 - Success
1524  */
1525 int hpt_get_driver_capabilities(PDRIVER_CAPABILITIES cap);
1526 int hpt_get_driver_capabilities_v2(PDRIVER_CAPABILITIES_V2 cap);
1527 
1528 /*
1529  * hpt_get_controller_count
1530  * Version compatibility: v1.0.0.1 or later
1531  * Parameters:
1532  *  None
1533  * Returns:
1534  *  number of controllers
1535  */
1536 int hpt_get_controller_count(void);
1537 
1538 /* hpt_get_controller_info
1539  * Version compatibility: v1.0.0.1 or later
1540  * Parameters:
1541  *  id      Controller id
1542  *  pInfo   pointer to CONTROLLER_INFO buffer
1543  * Returns:
1544  *  0       Success, controller info is put into (*pInfo ).
1545  */
1546 int hpt_get_controller_info(int id, PCONTROLLER_INFO pInfo);
1547 
1548 #if HPT_INTERFACE_VERSION>=0x01020000
1549 /* hpt_get_controller_info_v2
1550  * Version compatibility: v2.0.0.0 or later
1551  * Parameters:
1552  *  id      Controller id
1553  *  pInfo   pointer to CONTROLLER_INFO_V2 buffer
1554  * Returns:
1555  *  0       Success, controller info is put into (*pInfo ).
1556  */
1557 int hpt_get_controller_info_v2(int id, PCONTROLLER_INFO_V2 pInfo);
1558 
1559 /* hpt_get_controller_info_v2_ext
1560  * Version compatibility: v2.0.0.0 or later
1561  * Parameters:
1562  *  id      Controller id
1563  *  pInfo   pointer to CONTROLLER_INFO_V2_EXT buffer
1564  * Returns:
1565  *  0       Success, controller info is put into (*pInfo ).
1566  */
1567 int hpt_get_controller_info_v2_ext(int id, PCONTROLLER_INFO_V2_EXT pInfo);
1568 
1569 /* hpt_get_controller_info_v3
1570  * Version compatibility: v2.0.0.0 or later
1571  * Parameters:
1572  *  id      Controller id
1573  *  pInfo   pointer to CONTROLLER_INFO_V3 buffer
1574  * Returns:
1575  *  0       Success, controller info is put into (*pInfo ).
1576  */
1577 int hpt_get_controller_info_v3(int id, PCONTROLLER_INFO_V3 pInfo);
1578 #endif
1579 
1580 /* hpt_get_channel_info
1581  * Version compatibility: v1.0.0.1 or later
1582  * Parameters:
1583  *  id      Controller id
1584  *  bus     bus number
1585  *  pInfo   pointer to CHANNEL_INFO buffer
1586  * Returns:
1587  *  0       Success, channel info is put into (*pInfo ).
1588  */
1589 int hpt_get_channel_info(int id, int bus, PCHANNEL_INFO pInfo);
1590 
1591 /* hpt_get_channel_info_v2
1592  * Version compatibility: v1.0.0.1 or later
1593  * Parameters:
1594  *  id      Controller id
1595  *  bus     bus number
1596  *  pInfo   pointer to CHANNEL_INFO buffer
1597  * Returns:
1598  *  0       Success, channel info is put into (*pInfo ).
1599  */
1600 int hpt_get_channel_info_v2(int id, int bus, PCHANNEL_INFO_V2 pInfo);
1601 
1602 /* hpt_get_logical_devices
1603  * Version compatibility: v1.0.0.1 or later
1604  * Parameters:
1605  *  pIds        pointer to a DEVICEID array
1606  *  nMaxCount   array size
1607  * Returns:
1608  *  Number of ID returned. All logical device IDs are put into pIds array.
1609  *  Note: A spare disk is not a logical device.
1610  */
1611 int hpt_get_logical_devices(DEVICEID * pIds, int nMaxCount);
1612 
1613 /* hpt_get_physical_devices
1614  * Version compatibility: v2.1.0.0 or later
1615  * Parameters:
1616  *  pIds        pointer to a DEVICEID array
1617  *  nMaxCount   array size
1618  * Returns:
1619  *  Number of ID returned. All physical device IDs are put into pIds array.
1620  */
1621 int hpt_get_physical_devices(DEVICEID * pIds, int nMaxCount);
1622 
1623 /* hpt_get_device_info
1624  * Version compatibility: v1.0.0.1 or later
1625  * Parameters:
1626  *  id      logical device id
1627  *  pInfo   pointer to LOGICAL_DEVICE_INFO structure
1628  * Returns:
1629  *  0 - Success
1630  */
1631 int hpt_get_device_info(DEVICEID id, PLOGICAL_DEVICE_INFO pInfo);
1632 
1633 /* hpt_create_array
1634  * Version compatibility: v1.0.0.1 or later
1635  * Parameters:
1636  *  pParam      pointer to CREATE_ARRAY_PARAMS structure
1637  * Returns:
1638  *  0   failed
1639  *  else return array id
1640  */
1641 DEVICEID hpt_create_array(PCREATE_ARRAY_PARAMS pParam);
1642 
1643 /* hpt_delete_array
1644  * Version compatibility: v1.0.0.1 or later
1645  * Parameters:
1646  *  id      array id
1647  * Returns:
1648  *  0   Success
1649  */
1650 int hpt_delete_array(DEVICEID id, HPT_U32 options);
1651 
1652 /* hpt_device_io
1653  *  Read/write data on array and physcal device.
1654  * Version compatibility: v1.0.0.1 or later
1655  * Parameters:
1656  *  id      device id. If it's an array ID, IO will be performed on the array.
1657  *          If it's a physical device ID, IO will be performed on the device.
1658  *  cmd     IO_COMMAND_READ or IO_COMMAND_WRITE
1659  *  buffer  data buffer
1660  *  length  data size
1661  * Returns:
1662  *  0   Success
1663  */
1664 int hpt_device_io(DEVICEID id, int cmd, HPT_U32 lba, HPT_U32 nSector, void * buffer);
1665 
1666 /* hpt_add_disk_to_array
1667  *   Used to dynamicly add a disk to an RAID1, RAID0/1, RAID1/0 or RAID5 array.
1668  *   Auto-rebuild will start.
1669  * Version compatibility: v1.0.0.1 or later
1670  * Parameters:
1671  *  idArray     array id
1672  *  idDisk      disk id
1673  * Returns:
1674  *  0   Success
1675  */
1676 int hpt_add_disk_to_array(DEVICEID idArray, DEVICEID idDisk);
1677 
1678 /* hpt_add_spare_disk
1679  * Version compatibility: v1.0.0.1 or later
1680  *   Add a disk to spare pool.
1681  * Parameters:
1682  *  idDisk      disk id
1683  * Returns:
1684  *  0   Success
1685  */
1686 int hpt_add_spare_disk(DEVICEID idDisk);
1687 
1688 /* hpt_add_dedicated_spare
1689  * Version compatibility: v1.0.0.3 or later
1690  *   Add a spare disk to an array
1691  * Parameters:
1692  *  idDisk      disk id
1693  *  idArray     array id
1694  * Returns:
1695  *  0   Success
1696  */
1697 int hpt_add_dedicated_spare(DEVICEID idDisk, DEVICEID idArray);
1698 
1699 /* hpt_remove_spare_disk
1700  *   remove a disk from spare pool.
1701  * Version compatibility: v1.0.0.1 or later
1702  * Parameters:
1703  *  idDisk      disk id
1704  * Returns:
1705  *  0   Success
1706  */
1707 int hpt_remove_spare_disk(DEVICEID idDisk);
1708 
1709 /* hpt_get_event
1710  *   Used to poll events from driver.
1711  * Version compatibility: v1.0.0.1 or later
1712  * Parameters:
1713  *   pEvent    pointer to HPT_EVENT structure
1714  * Returns:
1715  *  0   Success, event info is filled in *pEvent
1716  */
1717 int hpt_get_event(PHPT_EVENT pEvent);
1718 
1719 /* hpt_rebuild_data_block
1720  *   Used to copy data from source disk and mirror disk.
1721  * Version compatibility: v1.0.0.1 or later
1722  * Parameters:
1723  *   idArray        Array ID (RAID1, 0/1 or RAID5)
1724  *   Lba            Start LBA for each array member
1725  *   nSector        Number of sectors for each array member (RAID 5 will ignore this parameter)
1726  *
1727  * Returns:
1728  *  0   Success, event info is filled in *pEvent
1729  */
1730 int hpt_rebuild_data_block(DEVICEID idMirror, HPT_U32 Lba, HPT_U8 nSector);
1731 #define hpt_rebuild_mirror(p1, p2, p3) hpt_rebuild_data_block(p1, p2, p3)
1732 
1733 /* hpt_set_array_state
1734  *   set array state.
1735  * Version compatibility: v1.0.0.1 or later
1736  * Parameters:
1737  *   idArray        Array ID
1738  *   state          See above 'array states' constants, possible values are:
1739  *     MIRROR_REBUILD_START
1740  *        Indicate that GUI wants to rebuild a mirror array
1741  *     MIRROR_REBUILD_ABORT
1742  *        GUI wants to abort rebuilding an array
1743  *     MIRROR_REBUILD_COMPLETE
1744  *        GUI finished to rebuild an array. If rebuild is done by driver this
1745  *        state has no use
1746  *
1747  * Returns:
1748  *  0   Success
1749  */
1750 int hpt_set_array_state(DEVICEID idArray, HPT_U32 state);
1751 
1752 /* hpt_set_array_info
1753  *   set array info.
1754  * Version compatibility: v1.0.0.1 or later
1755  * Parameters:
1756  *   idArray        Array ID
1757  *   pInfo          pointer to new info
1758  *
1759  * Returns:
1760  *  0   Success
1761  */
1762 int hpt_set_array_info(DEVICEID idArray, PALTERABLE_ARRAY_INFO pInfo);
1763 
1764 /* hpt_set_device_info
1765  *   set device info.
1766  * Version compatibility: v1.0.0.1 or later
1767  * Parameters:
1768  *   idDisk         device ID
1769  *   pInfo          pointer to new info
1770  *
1771  * Returns:
1772  *  0   Success
1773  * Additional notes:
1774  *  If idDisk==0, call to this function will stop buzzer on the adapter
1775  *  (if supported by driver).
1776  */
1777 int hpt_set_device_info(DEVICEID idDisk, PALTERABLE_DEVICE_INFO pInfo);
1778 
1779 #if HPT_INTERFACE_VERSION >= 0x01000004
1780 int hpt_set_device_info_v2(DEVICEID idDisk, PALTERABLE_DEVICE_INFO_V2 pInfo);
1781 #endif
1782 
1783 /* hpt_rescan_devices
1784  *   rescan devices
1785  * Version compatibility: v1.0.0.1 or later
1786  * Parameters:
1787  *   None
1788  * Returns:
1789  *   0  Success
1790  */
1791 int hpt_rescan_devices(void);
1792 
1793 /* hpt_get_601_info
1794  *   Get HPT601 status
1795  * Version compatibiilty: v1.0.0.3 or later
1796  * Parameters:
1797  *   idDisk - Disk handle
1798  *   PHPT601_INFO - pointer to HPT601 info buffer
1799  * Returns:
1800  *   0  Success
1801  */
1802 int hpt_get_601_info(DEVICEID idDisk, PHPT601_INFO pInfo);
1803 
1804 /* hpt_set_601_info
1805  *   HPT601 function control
1806  * Version compatibiilty: v1.0.0.3 or later
1807  * Parameters:
1808  *   idDisk - Disk handle
1809  *   PHPT601_INFO - pointer to HPT601 info buffer
1810  * Returns:
1811  *   0  Success
1812  */
1813 int hpt_set_601_info(DEVICEID idDisk, PHPT601_INFO pInfo);
1814 
1815 /* hpt_lock_device
1816  *   Lock a block on a device (prevent OS accessing it)
1817  * Version compatibiilty: v1.0.0.3 or later
1818  * Parameters:
1819  *   idDisk - Disk handle
1820  *   Lba - Start LBA
1821  *   nSectors - number of sectors
1822  * Returns:
1823  *   0  Success
1824  */
1825 int hpt_lock_device(DEVICEID idDisk, HPT_U32 Lba, HPT_U8 nSectors);
1826 
1827 /* hpt_lock_device
1828  *   Unlock a device
1829  * Version compatibiilty: v1.0.0.3 or later
1830  * Parameters:
1831  *   idDisk - Disk handle
1832  * Returns:
1833  *   0  Success
1834  */
1835 int hpt_unlock_device(DEVICEID idDisk);
1836 
1837 /* hpt_ide_pass_through
1838  *  send a ATA passthrough command to a device.
1839  * Version compatibility: v1.0.0.3 or later
1840  * Parameters:
1841  *   p - IDE_PASS_THROUGH header pointer
1842  * Returns:
1843  *   0  Success
1844  */
1845 int hpt_ide_pass_through(PIDE_PASS_THROUGH_HEADER p);
1846 int hpt_ide_pass_through_v2(PIDE_PASS_THROUGH_HEADER_V2 p);
1847 
1848 /* hpt_scsi_passthrough
1849  *  send a SCSI passthrough command to a device.
1850  * Version compatibility: v2.0.0.0 or later
1851  * Parameters:
1852  *   in  - HPT_SCSI_PASSTHROUGH_IN header pointer
1853  *   out - PHPT_SCSI_PASSTHROUGH_OUT header pointer
1854  *   insize, outsize - in/out buffer size
1855  * Returns:
1856  *   0  Success
1857  */
1858 int hpt_scsi_passthrough(PHPT_SCSI_PASSTHROUGH_IN in, HPT_U32 insize,
1859 				PHPT_SCSI_PASSTHROUGH_OUT out, HPT_U32 outsize);
1860 
1861 /* hpt_verify_data_block
1862  *   verify data block on RAID1 or RAID5.
1863  * Version compatibility: v1.0.0.3 or later
1864  * Parameters:
1865  *   idArray - Array ID
1866  *   Lba - block number (on each array member, not logical block!)
1867  *   nSectors - Sectors for each member (RAID 5 will ignore this parameter)
1868  * Returns:
1869  *   0  Success
1870  *   1  Data compare error
1871  *   2  I/O error
1872  */
1873 int hpt_verify_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors);
1874 
1875 /* hpt_initialize_data_block
1876  *   initialize data block (fill with zero) on RAID5
1877  * Version compatibility: v1.0.0.3 or later
1878  * Parameters:
1879  *   idArray - Array ID
1880  *   Lba - block number (on each array member, not logical block!)
1881  *   nSectors - Sectors for each member (RAID 5 will ignore this parameter)
1882  * Returns:
1883  *   0  Success
1884  */
1885 int hpt_initialize_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors);
1886 
1887 /* hpt_device_io_ex
1888  *   extended device I/O function
1889  * Version compatibility: v1.0.0.3 or later
1890  * Parameters:
1891  *   idArray - Array ID
1892  *   Lba - block number (on each array member, not logical block!)
1893  *   nSectors - Sectors for each member
1894  *   buffer - I/O buffer or s/g address
1895  * Returns:
1896  *   0  Success
1897  */
1898 int hpt_device_io_ex(PDEVICE_IO_EX_PARAMS param);
1899 
1900 /* hpt_set_boot_mark
1901  *   select boot device
1902  * Version compatibility: v1.0.0.3 or later
1903  * Parameters:
1904  *   id - logical device ID. If id is 0 the boot mark will be removed.
1905  * Returns:
1906  *   0  Success
1907  */
1908 int hpt_set_boot_mark(DEVICEID id);
1909 
1910 /* hpt_query_remove
1911  *  check if device can be removed safely
1912  * Version compatibility: v1.0.0.4 or later
1913  * Parameters:
1914  *  ndev - number of devices
1915  *  pIds - device ID list
1916  * Returns:
1917  *  0  - Success
1918  *  -1 - unknown error
1919  *  n  - the n-th device that can't be removed
1920  */
1921 int hpt_query_remove(HPT_U32 ndev, DEVICEID *pIds);
1922 
1923 /* hpt_remove_devices
1924  *  remove a list of devices
1925  * Version compatibility: v1.0.0.4 or later
1926  * Parameters:
1927  *  ndev - number of devices
1928  *  pIds - device ID list
1929  * Returns:
1930  *  0  - Success
1931  *  -1 - unknown error
1932  *  n  - the n-th device that can't be removed
1933  */
1934 int hpt_remove_devices(HPT_U32 ndev, DEVICEID *pIds);
1935 
1936 /* hpt_create_array_v2
1937  * Version compatibility: v1.1.0.0 or later
1938  * Parameters:
1939  *  pParam      pointer to CREATE_ARRAY_PARAMS_V2 structure
1940  * Returns:
1941  *  0   failed
1942  *  else return array id
1943  */
1944 #if HPT_INTERFACE_VERSION>=0x01010000
1945 DEVICEID hpt_create_array_v2(PCREATE_ARRAY_PARAMS_V2 pParam);
1946 #endif
1947 
1948 /* hpt_create_array_v3
1949  * Version compatibility: v2.0.0.1 or later
1950  * Parameters:
1951  *  pParam      pointer to CREATE_ARRAY_PARAMS_V3 structure
1952  * Returns:
1953  *  0   failed
1954  *  else return array id
1955  */
1956 #if HPT_INTERFACE_VERSION>=0x02000001
1957 DEVICEID hpt_create_array_v3(PCREATE_ARRAY_PARAMS_V3 pParam);
1958 #endif
1959 
1960 /* hpt_get_device_info_v2
1961  * Version compatibility: v1.1.0.0 or later
1962  * Parameters:
1963  *  id      logical device id
1964  *  pInfo   pointer to LOGICAL_DEVICE_INFO_V2 structure
1965  * Returns:
1966  *  0 - Success
1967  */
1968 #if HPT_INTERFACE_VERSION>=0x01010000
1969 int hpt_get_device_info_v2(DEVICEID id, PLOGICAL_DEVICE_INFO_V2 pInfo);
1970 #endif
1971 
1972 /* hpt_get_device_info_v3
1973  * Version compatibility: v1.2.0.0 or later
1974  * Parameters:
1975  *  id      logical device id
1976  *  pInfo   pointer to LOGICAL_DEVICE_INFO_V3 structure
1977  * Returns:
1978  *  0 - Success
1979  */
1980 #if HPT_INTERFACE_VERSION>=0x01020000
1981 int hpt_get_device_info_v3(DEVICEID id, PLOGICAL_DEVICE_INFO_V3 pInfo);
1982 #endif
1983 
1984 /* hpt_get_device_info_v4
1985  * Version compatibility: v2.0.0.1 or later
1986  * Parameters:
1987  *  id      logical device id
1988  *  pInfo   pointer to LOGICAL_DEVICE_INFO_V4 structure
1989  * Returns:
1990  *  0 - Success
1991  */
1992 #if HPT_INTERFACE_VERSION>=0x02000001
1993 int hpt_get_device_info_v4(DEVICEID id, PLOGICAL_DEVICE_INFO_V4 pInfo);
1994 #endif
1995 
1996 /* hpt_create_transform
1997  *  create a transform instance.
1998  * Version compatibility: v2.0.0.0 or later
1999  * Parameters:
2000  *  idArray - source array
2001  *  destInfo - destination array info
2002  * Returns:
2003  *  destination array id
2004  */
2005 #if HPT_INTERFACE_VERSION>=0x02000000
2006 DEVICEID hpt_create_transform(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V2 destInfo);
2007 #endif
2008 
2009 /* hpt_create_transform_v2
2010  *  create a transform instance.
2011  * Version compatibility: v2.0.0.1 or later
2012  * Parameters:
2013  *  idArray - source array
2014  *  destInfo - destination array info
2015  * Returns:
2016  *  destination array id
2017  */
2018 #if HPT_INTERFACE_VERSION>=0x02000001
2019 DEVICEID hpt_create_transform_v2(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V3 destInfo);
2020 #endif
2021 
2022 /* hpt_step_transform
2023  *  move a block in a tranform progress.
2024  *  This function is called by mid-layer, not GUI (which uses set_array_state instead).
2025  * Version compatibility: v2.0.0.0 or later
2026  * Parameters:
2027  *  idArray - destination array ID
2028  *            the source ID will be invalid when transform complete.
2029  * Returns:
2030  *  0 - Success
2031  */
2032 #if HPT_INTERFACE_VERSION>=0x02000000
2033 int hpt_step_transform(DEVICEID idArray);
2034 #endif
2035 
2036 /* hpt_set_vdev_info
2037  *  set information for disk or array
2038  * Version compatibility: v1.2.0.0 or later
2039  * Parameters:
2040  *  dev - destination device
2041  *
2042  * Returns:
2043  *  0 - Success
2044  */
2045 #if HPT_INTERFACE_VERSION>=0x01020000
2046 int hpt_set_vdev_info(DEVICEID dev, PSET_VDEV_INFO pInfo);
2047 #endif
2048 
2049 /* hpt_init_disks
2050  *  initialize disks for use
2051  * Version compatibility: v2.0.0.0 or later
2052  * Parameters:
2053  *  ndev - number of disks to initialize
2054  *  pIds - array of DEVICEID
2055  *
2056  * Returns:
2057  *  0 - Success
2058  */
2059 #if HPT_INTERFACE_VERSION>=0x02000000
2060 int hpt_init_disks(HPT_U32 ndev, DEVICEID * pIds);
2061 #endif
2062 
2063 /* hpt_calc_max_array_capacity
2064  *  cap max capacity of the array user want to create or transform
2065  * Version compatibility: v1.2.0.0 or later
2066  * Parameters:
2067  *  source - if transform, this is the source array, otherwise, it should be zero
2068  *  destInfo - target array params
2069  * Returns:
2070  *  0 - Success
2071  *  cap - max capacity of the target array
2072  */
2073 #if HPT_INTERFACE_VERSION>=0x01020000
2074 int hpt_calc_max_array_capacity(DEVICEID source, PCREATE_ARRAY_PARAMS_V2 destInfo, HPT_U64 * cap);
2075 #endif
2076 
2077 /* hpt_calc_max_array_capacity_v2
2078  *  cap max capacity of the array user want to create or transform
2079  * Version compatibility: v2.0.0.1 or later
2080  * Parameters:
2081  *  source - if transform, this is the source array, otherwise, it should be zero
2082  *  destInfo - target array params
2083  * Returns:
2084  *  0 - Success
2085  *  cap - max capacity of the target array
2086  */
2087 #if HPT_INTERFACE_VERSION>=0x02000001
2088 int hpt_calc_max_array_capacity_v2(DEVICEID source, PCREATE_ARRAY_PARAMS_V3 destInfo, HPT_U64 * cap);
2089 #endif
2090 
2091 /* hpt_rebuild_data_block2
2092  *   Used to copy data from source disk and mirror disk.
2093  * Version compatibility: v1.1.0.0 or later
2094  * Parameters:
2095  *   idArray        Array ID (RAID1, 0/1 or RAID5)
2096  *   Lba            Start LBA for each array member
2097  *   nSector        Number of sectors for each array member (RAID 5 will ignore this parameter)
2098  *
2099  * Returns:
2100  *  0   Success, event info is filled in *pEvent
2101  */
2102 #if HPT_INTERFACE_VERSION>=0x01010000
2103 int hpt_rebuild_data_block_v2(DEVICEID idMirror, HPT_U64 Lba, HPT_U16 nSector);
2104 #endif
2105 
2106 /* hpt_verify_data_block2
2107  *   verify data block on RAID1 or RAID5.
2108  * Version compatibility: v1.1.0.0 or later
2109  * Parameters:
2110  *   idArray - Array ID
2111  *   Lba - block number (on each array member, not logical block!)
2112  *   nSectors - Sectors for each member (RAID 5 will ignore this parameter)
2113  * Returns:
2114  *   0  Success
2115  *   1  Data compare error
2116  *   2  I/O error
2117  */
2118 #if HPT_INTERFACE_VERSION>=0x01010000
2119 int hpt_verify_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors);
2120 #endif
2121 
2122 /* hpt_initialize_data_block2
2123  *   initialize data block (fill with zero) on RAID5
2124  * Version compatibility: v1.1.0.0 or later
2125  * Parameters:
2126  *   idArray - Array ID
2127  *   Lba - block number (on each array member, not logical block!)
2128  *   nSectors - Sectors for each member (RAID 5 will ignore this parameter)
2129  * Returns:
2130  *   0  Success
2131  */
2132 #if HPT_INTERFACE_VERSION>=0x01010000
2133 int hpt_initialize_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors);
2134 #endif
2135 
2136 /* hpt_i2c_transaction
2137  *   perform an transaction on i2c bus
2138  * Version compatibility: v2.0.0.0 or later
2139  * Parameters:
2140  *   indata[0] - controller ID
2141  * Returns:
2142  *   0  Success
2143  */
2144 #if HPT_INTERFACE_VERSION>=0x01020000
2145 int hpt_i2c_transaction(HPT_U8 *indata, HPT_U32 inlen, HPT_U8 *outdata, HPT_U32 outlen, HPT_U32 *poutlen);
2146 #endif
2147 
2148 /* hpt_get_parameter_list
2149  *   get a list of driver parameters.
2150  * Version compatibility: v1.0.0.0 or later
2151  * Parameters:
2152  *   location - parameter location
2153  *   outBuffer - a buffer to hold the output
2154  *   outBufferSize - size of outBuffer
2155  * Returns:
2156  *   0  Success
2157  *      put in outBuffer a list of zero terminated parameter names. the whole list
2158  *      is terminated with an additional zero byte.
2159  */
2160 int hpt_get_parameter_list(HPT_U32 location, char *outBuffer, HPT_U32 outBufferSize);
2161 
2162 /* hpt_{get,set}_parameter
2163  *   get/set a parameter value.
2164  * Version compatibility: v1.0.0.0 or later
2165  * Parameters:
2166  *   pParam - a pointer to HPT_DRIVER_PARAMETER.
2167  * Returns:
2168  *   0  Success
2169  */
2170 int hpt_get_parameter(PHPT_DRIVER_PARAMETER pParam);
2171 int hpt_set_parameter(PHPT_DRIVER_PARAMETER pParam);
2172 int hpt_reenumerate_device(DEVICEID id);
2173 
2174 /*
2175  * hpt_get_enclosure_count
2176  * Version compatibility: v2.1.0.0 or later
2177  * Parameters:
2178  *  controller_id
2179  * Returns:
2180  *  number of enclosurers
2181  */
2182 int hpt_get_enclosure_count(int ctlr_id);
2183 
2184 /* hpt_get_enclosure_info
2185  * Version compatibility: v2.1.0.0 or later
2186  * Parameters:
2187  *  id      enclosure id
2188  *  pInfo   pointer to ENCLOSURE_INFO buffer
2189  * Returns:
2190  *  0       Success, enclosure info is put into (*pInfo ).
2191  */
2192 int hpt_get_enclosure_info(int ctlr_id, int enc_id, PENCLOSURE_INFO pInfo);
2193 
2194 int hpt_get_enclosure_info_v2(int ctlr_id, int enc_id, PENCLOSURE_INFO_V2 pInfo);
2195 
2196 int hpt_get_enclosure_info_v3(int ctlr_id, int enc_id, PENCLOSURE_INFO_V3 pInfo);
2197 
2198 int hpt_get_enclosure_info_v4(int ctlr_id, int enc_id, PENCLOSURE_INFO_V4 pInfo);
2199 int hpt_get_enclosure_element_info(int ctlr_id, int enc_id, int ele_id, PSES_ELEMENT_STATUS pInfo);
2200 
2201 /* performance monitor interface
2202  * Version compatibility: v2.1.0.0 or later
2203  */
2204 int hpt_get_perfmon_status(int ctlr_id, int *p_status);
2205 int hpt_set_perfmon_status(int ctlr_id, int enable);
2206 int hpt_get_perfmon_data(DEVICEID id, PHPT_PM_IOSTAT iostat);
2207 
2208 /* hpt_get_controller_venid
2209  * Version compatibility: v1.0.0.0 or later
2210  */
2211 int hpt_get_controller_venid(int ctlr_id, HPT_U32 *venid);
2212 
2213 /* hpt_access_config_reg
2214  *  access the reserved config space on disk
2215  * Parameters:
2216  *   p - ACCESS_CONFIG_REG_PARAMS header pointer
2217  * Returns:
2218  *   0  Success
2219  */
2220 int hpt_access_config_reg(PACCESS_CONFIG_REG_PARAMS p);
2221 
2222 /* hpt_dump_metadata
2223  *  dump internal metadata
2224  * Parameters:
2225  *   p - PDUMP_METADATA_PARAMS header pointer
2226  * Returns:
2227  *   0  Success
2228  */
2229 int hpt_dump_metadata(PDUMP_METADATA_PARAMS p);
2230 
2231 #endif
2232 
2233 #pragma pack()
2234 
2235 #ifdef __cplusplus
2236 }
2237 #endif
2238 #endif
2239