1 /*- 2 * HighPoint RAID Driver for FreeBSD 3 * 4 * SPDX-License-Identifier: BSD-2-Clause 5 * 6 * Copyright (C) 2005-2011 HighPoint Technologies, Inc. All Rights Reserved. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 #include <dev/hpt27xx/hpt27xx_config.h> 32 33 #include <dev/hpt27xx/os_bsd.h> 34 35 BUS_ADDRESS get_dmapool_phy_addr(void *osext, void * dmapool_virt_addr); 36 37 /* hardware access */ 38 HPT_U8 os_inb (void *port) { return inb((unsigned)(HPT_UPTR)port); } 39 HPT_U16 os_inw (void *port) { return inw((unsigned)(HPT_UPTR)port); } 40 HPT_U32 os_inl (void *port) { return inl((unsigned)(HPT_UPTR)port); } 41 42 void os_outb (void *port, HPT_U8 value) { outb((unsigned)(HPT_UPTR)port, (value)); } 43 void os_outw (void *port, HPT_U16 value) { outw((unsigned)(HPT_UPTR)port, (value)); } 44 void os_outl (void *port, HPT_U32 value) { outl((unsigned)(HPT_UPTR)port, (value)); } 45 46 void os_insw (void *port, HPT_U16 *buffer, HPT_U32 count) 47 { insw((unsigned)(HPT_UPTR)port, (void *)buffer, count); } 48 49 void os_outsw(void *port, HPT_U16 *buffer, HPT_U32 count) 50 { outsw((unsigned)(HPT_UPTR)port, (void *)buffer, count); } 51 52 HPT_U32 __dummy_reg = 0; 53 54 /* PCI configuration space */ 55 HPT_U8 os_pci_readb (void *osext, HPT_U8 offset) 56 { 57 return pci_read_config(((PHBA)osext)->pcidev, offset, 1); 58 } 59 60 HPT_U16 os_pci_readw (void *osext, HPT_U8 offset) 61 { 62 return pci_read_config(((PHBA)osext)->pcidev, offset, 2); 63 } 64 65 HPT_U32 os_pci_readl (void *osext, HPT_U8 offset) 66 { 67 return pci_read_config(((PHBA)osext)->pcidev, offset, 4); 68 } 69 70 void os_pci_writeb (void *osext, HPT_U8 offset, HPT_U8 value) 71 { 72 pci_write_config(((PHBA)osext)->pcidev, offset, value, 1); 73 } 74 75 void os_pci_writew (void *osext, HPT_U8 offset, HPT_U16 value) 76 { 77 pci_write_config(((PHBA)osext)->pcidev, offset, value, 2); 78 } 79 80 void os_pci_writel (void *osext, HPT_U8 offset, HPT_U32 value) 81 { 82 pci_write_config(((PHBA)osext)->pcidev, offset, value, 4); 83 } 84 85 BUS_ADDRESS get_dmapool_phy_addr(void *osext, void * dmapool_virt_addr) 86 { 87 return (BUS_ADDRESS)vtophys(dmapool_virt_addr); 88 } 89 90 /* PCI space access */ 91 HPT_U8 pcicfg_read_byte (HPT_U8 bus, HPT_U8 dev, HPT_U8 func, HPT_U8 reg) 92 { 93 return (HPT_U8)pci_cfgregread(bus, dev, func, reg, 1); 94 } 95 HPT_U32 pcicfg_read_dword(HPT_U8 bus, HPT_U8 dev, HPT_U8 func, HPT_U8 reg) 96 { 97 return (HPT_U32)pci_cfgregread(bus, dev, func, reg, 4); 98 } 99 void pcicfg_write_byte (HPT_U8 bus, HPT_U8 dev, HPT_U8 func, HPT_U8 reg, HPT_U8 v) 100 { 101 pci_cfgregwrite(bus, dev, func, reg, v, 1); 102 } 103 void pcicfg_write_dword(HPT_U8 bus, HPT_U8 dev, HPT_U8 func, HPT_U8 reg, HPT_U32 v) 104 { 105 pci_cfgregwrite(bus, dev, func, reg, v, 4); 106 }/* PCI space access */ 107 108 void *os_map_pci_bar( 109 void *osext, 110 int index, 111 HPT_U32 offset, 112 HPT_U32 length 113 ) 114 { 115 PHBA hba = (PHBA)osext; 116 HPT_U32 base; 117 118 hba->pcibar[index].rid = 0x10 + index * 4; 119 base = pci_read_config(hba->pcidev, hba->pcibar[index].rid, 4); 120 121 if (base & 1) { 122 hba->pcibar[index].type = SYS_RES_IOPORT; 123 hba->pcibar[index].res = bus_alloc_resource_any(hba->pcidev, 124 hba->pcibar[index].type, &hba->pcibar[index].rid, RF_ACTIVE); 125 hba->pcibar[index].base = (void *)(unsigned long)(base & ~0x1); 126 } else { 127 hba->pcibar[index].type = SYS_RES_MEMORY; 128 hba->pcibar[index].res = bus_alloc_resource_any(hba->pcidev, 129 hba->pcibar[index].type, &hba->pcibar[index].rid, RF_ACTIVE); 130 hba->pcibar[index].base = (char *)rman_get_virtual(hba->pcibar[index].res) + offset; 131 } 132 133 return hba->pcibar[index].base; 134 } 135 136 void os_unmap_pci_bar(void *osext, void *base) 137 { 138 PHBA hba = (PHBA)osext; 139 int index; 140 141 for (index=0; index<6; index++) { 142 if (hba->pcibar[index].base==base) { 143 bus_release_resource(hba->pcidev, hba->pcibar[index].type, 144 hba->pcibar[index].rid, hba->pcibar[index].res); 145 hba->pcibar[index].base = 0; 146 return; 147 } 148 } 149 } 150 151 void freelist_reserve(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT count) 152 { 153 PVBUS_EXT vbus_ext = osext; 154 155 if (vbus_ext->ext_type!=EXT_TYPE_VBUS) 156 vbus_ext = ((PHBA)osext)->vbus_ext; 157 158 list->next = vbus_ext->freelist_head; 159 vbus_ext->freelist_head = list; 160 list->dma = 0; 161 list->size = size; 162 list->head = 0; 163 #if DBG 164 list->reserved_count = 165 #endif 166 list->count = count; 167 } 168 169 void *freelist_get(struct freelist *list) 170 { 171 void * result; 172 if (list->count) { 173 HPT_ASSERT(list->head); 174 result = list->head; 175 list->head = *(void **)result; 176 list->count--; 177 return result; 178 } 179 return 0; 180 } 181 182 void freelist_put(struct freelist * list, void *p) 183 { 184 HPT_ASSERT(list->dma==0); 185 list->count++; 186 *(void **)p = list->head; 187 list->head = p; 188 } 189 190 void freelist_reserve_dma(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT alignment, HPT_UINT count) 191 { 192 PVBUS_EXT vbus_ext = osext; 193 194 if (vbus_ext->ext_type!=EXT_TYPE_VBUS) 195 vbus_ext = ((PHBA)osext)->vbus_ext; 196 197 list->next = vbus_ext->freelist_dma_head; 198 vbus_ext->freelist_dma_head = list; 199 list->dma = 1; 200 list->alignment = alignment; 201 list->size = size; 202 list->head = 0; 203 #if DBG 204 list->reserved_count = 205 #endif 206 list->count = count; 207 } 208 209 void *freelist_get_dma(struct freelist *list, BUS_ADDRESS *busaddr) 210 { 211 void *result; 212 HPT_ASSERT(list->dma); 213 result = freelist_get(list); 214 if (result) 215 *busaddr = *(BUS_ADDRESS *)((void **)result+1); 216 return result; 217 } 218 219 void freelist_put_dma(struct freelist *list, void *p, BUS_ADDRESS busaddr) 220 { 221 HPT_ASSERT(list->dma); 222 list->count++; 223 *(void **)p = list->head; 224 *(BUS_ADDRESS *)((void **)p+1) = busaddr; 225 list->head = p; 226 } 227 228 HPT_U32 os_get_stamp(void) 229 { 230 HPT_U32 stamp; 231 do { stamp = random(); } while (stamp==0); 232 return stamp; 233 } 234 235 void os_stallexec(HPT_U32 microseconds) 236 { 237 DELAY(microseconds); 238 } 239 240 static void os_timer_for_ldm(void *arg) 241 { 242 PVBUS_EXT vbus_ext = (PVBUS_EXT)arg; 243 ldm_on_timer((PVBUS)vbus_ext->vbus); 244 } 245 246 void os_request_timer(void * osext, HPT_U32 interval) 247 { 248 PVBUS_EXT vbus_ext = osext; 249 250 HPT_ASSERT(vbus_ext->ext_type==EXT_TYPE_VBUS); 251 callout_reset_sbt(&vbus_ext->timer, SBT_1US * interval, 0, 252 os_timer_for_ldm, vbus_ext, 0); 253 } 254 255 HPT_TIME os_query_time(void) 256 { 257 return ticks * (1000000 / hz); 258 } 259 260 void os_schedule_task(void *osext, OSM_TASK *task) 261 { 262 PVBUS_EXT vbus_ext = osext; 263 264 HPT_ASSERT(task->next==0); 265 266 if (vbus_ext->tasks==0) 267 vbus_ext->tasks = task; 268 else { 269 OSM_TASK *t = vbus_ext->tasks; 270 while (t->next) t = t->next; 271 t->next = task; 272 } 273 274 if (vbus_ext->worker.ta_context) 275 TASK_ENQUEUE(&vbus_ext->worker); 276 } 277 278 int os_revalidate_device(void *osext, int id) 279 { 280 281 return 0; 282 } 283 284 int os_query_remove_device(void *osext, int id) 285 { 286 return 0; 287 } 288 289 HPT_U8 os_get_vbus_seq(void *osext) 290 { 291 return ((PVBUS_EXT)osext)->sim->path_id; 292 } 293 294 int os_printk(char *fmt, ...) 295 { 296 va_list args; 297 static char buf[512]; 298 299 va_start(args, fmt); 300 vsnprintf(buf, sizeof(buf), fmt, args); 301 va_end(args); 302 return printf("%s: %s\n", driver_name, buf); 303 } 304 305 #if DBG 306 void os_check_stack(const char *location, int size){} 307 308 void __os_dbgbreak(const char *file, int line) 309 { 310 printf("*** break at %s:%d ***", file, line); 311 while (1); 312 } 313 314 int hpt_dbg_level = 1; 315 #endif 316