1 /* $FreeBSD$ */ 2 /* $OpenBSD: hifn7751var.h,v 1.42 2002/04/08 17:49:42 jason Exp $ */ 3 4 /*- 5 * Invertex AEON / Hifn 7751 driver 6 * Copyright (c) 1999 Invertex Inc. All rights reserved. 7 * Copyright (c) 1999 Theo de Raadt 8 * Copyright (c) 2000-2001 Network Security Technologies, Inc. 9 * http://www.netsec.net 10 * 11 * Please send any comments, feedback, bug-fixes, or feature requests to 12 * software@invertex.com. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 3. The name of the author may not be used to endorse or promote products 24 * derived from this software without specific prior written permission. 25 * 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 28 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 29 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 30 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 31 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 32 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 33 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 34 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 35 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 36 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 37 * 38 * Effort sponsored in part by the Defense Advanced Research Projects 39 * Agency (DARPA) and Air Force Research Laboratory, Air Force 40 * Materiel Command, USAF, under agreement number F30602-01-2-0537. 41 * 42 */ 43 44 #ifndef __HIFN7751VAR_H__ 45 #define __HIFN7751VAR_H__ 46 47 #ifdef _KERNEL 48 49 /* 50 * Some configurable values for the driver. By default command+result 51 * descriptor rings are the same size. The src+dst descriptor rings 52 * are sized at 3.5x the number of potential commands. Slower parts 53 * (e.g. 7951) tend to run out of src descriptors; faster parts (7811) 54 * src+cmd/result descriptors. It's not clear that increasing the size 55 * of the descriptor rings helps performance significantly as other 56 * factors tend to come into play (e.g. copying misaligned packets). 57 */ 58 #define HIFN_D_CMD_RSIZE 24 /* command descriptors */ 59 #define HIFN_D_SRC_RSIZE ((HIFN_D_CMD_RSIZE * 7) / 2) /* source descriptors */ 60 #define HIFN_D_RES_RSIZE HIFN_D_CMD_RSIZE /* result descriptors */ 61 #define HIFN_D_DST_RSIZE HIFN_D_SRC_RSIZE /* destination descriptors */ 62 63 /* 64 * Length values for cryptography 65 */ 66 #define HIFN_DES_KEY_LENGTH 8 67 #define HIFN_3DES_KEY_LENGTH 24 68 #define HIFN_MAX_CRYPT_KEY_LENGTH HIFN_3DES_KEY_LENGTH 69 #define HIFN_IV_LENGTH 8 70 #define HIFN_AES_IV_LENGTH 16 71 #define HIFN_MAX_IV_LENGTH HIFN_AES_IV_LENGTH 72 73 /* 74 * Length values for authentication 75 */ 76 #define HIFN_MAC_KEY_LENGTH 64 77 #define HIFN_MD5_LENGTH 16 78 #define HIFN_SHA1_LENGTH 20 79 #define HIFN_MAC_TRUNC_LENGTH 12 80 81 #define MAX_SCATTER 64 82 83 /* 84 * Data structure to hold all 4 rings and any other ring related data. 85 */ 86 struct hifn_dma { 87 /* 88 * Descriptor rings. We add +1 to the size to accomidate the 89 * jump descriptor. 90 */ 91 struct hifn_desc cmdr[HIFN_D_CMD_RSIZE+1]; 92 struct hifn_desc srcr[HIFN_D_SRC_RSIZE+1]; 93 struct hifn_desc dstr[HIFN_D_DST_RSIZE+1]; 94 struct hifn_desc resr[HIFN_D_RES_RSIZE+1]; 95 96 struct hifn_command *hifn_commands[HIFN_D_RES_RSIZE]; 97 98 u_char command_bufs[HIFN_D_CMD_RSIZE][HIFN_MAX_COMMAND]; 99 u_char result_bufs[HIFN_D_CMD_RSIZE][HIFN_MAX_RESULT]; 100 u_int32_t slop[HIFN_D_CMD_RSIZE]; 101 102 u_int64_t test_src, test_dst; 103 104 /* 105 * Our current positions for insertion and removal from the desriptor 106 * rings. 107 */ 108 int cmdi, srci, dsti, resi; 109 volatile int cmdu, srcu, dstu, resu; 110 int cmdk, srck, dstk, resk; 111 }; 112 113 struct hifn_session { 114 int hs_used; 115 u_int8_t hs_iv[HIFN_MAX_IV_LENGTH]; 116 }; 117 118 #define HIFN_RING_SYNC(sc, r, i, f) \ 119 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, (f)) 120 121 #define HIFN_CMDR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), cmdr, (i), (f)) 122 #define HIFN_RESR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), resr, (i), (f)) 123 #define HIFN_SRCR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), srcr, (i), (f)) 124 #define HIFN_DSTR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), dstr, (i), (f)) 125 126 #define HIFN_CMD_SYNC(sc, i, f) \ 127 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, (f)) 128 129 #define HIFN_RES_SYNC(sc, i, f) \ 130 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, (f)) 131 132 /* 133 * Holds data specific to a single HIFN board. 134 */ 135 struct hifn_softc { 136 device_t sc_dev; /* device backpointer */ 137 struct mtx sc_mtx; /* per-instance lock */ 138 bus_dma_tag_t sc_dmat; /* parent DMA tag decriptor */ 139 struct resource *sc_bar0res; 140 bus_space_handle_t sc_sh0; /* bar0 bus space handle */ 141 bus_space_tag_t sc_st0; /* bar0 bus space tag */ 142 bus_size_t sc_bar0_lastreg;/* bar0 last reg written */ 143 struct resource *sc_bar1res; 144 bus_space_handle_t sc_sh1; /* bar1 bus space handle */ 145 bus_space_tag_t sc_st1; /* bar1 bus space tag */ 146 bus_size_t sc_bar1_lastreg;/* bar1 last reg written */ 147 struct resource *sc_irq; 148 void *sc_intrhand; /* interrupt handle */ 149 150 u_int32_t sc_dmaier; 151 u_int32_t sc_drammodel; /* 1=dram, 0=sram */ 152 u_int32_t sc_pllconfig; /* 7954/7955/7956 PLL config */ 153 154 struct hifn_dma *sc_dma; 155 bus_dmamap_t sc_dmamap; 156 bus_dma_segment_t sc_dmasegs[1]; 157 bus_addr_t sc_dma_physaddr;/* physical address of sc_dma */ 158 int sc_dmansegs; 159 int32_t sc_cid; 160 int sc_maxses; 161 int sc_nsessions; 162 struct hifn_session *sc_sessions; 163 int sc_ramsize; 164 int sc_flags; 165 #define HIFN_HAS_RNG 0x1 /* includes random number generator */ 166 #define HIFN_HAS_PUBLIC 0x2 /* includes public key support */ 167 #define HIFN_HAS_AES 0x4 /* includes AES support */ 168 #define HIFN_IS_7811 0x8 /* Hifn 7811 part */ 169 #define HIFN_IS_7956 0x10 /* Hifn 7956/7955 don't have SDRAM */ 170 struct callout sc_rngto; /* for polling RNG */ 171 struct callout sc_tickto; /* for managing DMA */ 172 int sc_rngfirst; 173 int sc_rnghz; /* RNG polling frequency */ 174 struct rndtest_state *sc_rndtest; /* RNG test state */ 175 void (*sc_harvest)(struct rndtest_state *, 176 void *, u_int); 177 int sc_c_busy; /* command ring busy */ 178 int sc_s_busy; /* source data ring busy */ 179 int sc_d_busy; /* destination data ring busy */ 180 int sc_r_busy; /* result ring busy */ 181 int sc_active; /* for initial countdown */ 182 int sc_needwakeup; /* ops q'd wating on resources */ 183 int sc_curbatch; /* # ops submitted w/o int */ 184 int sc_suspended; 185 }; 186 187 #define HIFN_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 188 #define HIFN_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 189 190 /* 191 * hifn_command_t 192 * 193 * This is the control structure used to pass commands to hifn_encrypt(). 194 * 195 * flags 196 * ----- 197 * Flags is the bitwise "or" values for command configuration. A single 198 * encrypt direction needs to be set: 199 * 200 * HIFN_ENCODE or HIFN_DECODE 201 * 202 * To use cryptography, a single crypto algorithm must be included: 203 * 204 * HIFN_CRYPT_3DES or HIFN_CRYPT_DES 205 * 206 * To use authentication is used, a single MAC algorithm must be included: 207 * 208 * HIFN_MAC_MD5 or HIFN_MAC_SHA1 209 * 210 * By default MD5 uses a 16 byte hash and SHA-1 uses a 20 byte hash. 211 * If the value below is set, hash values are truncated or assumed 212 * truncated to 12 bytes: 213 * 214 * HIFN_MAC_TRUNC 215 * 216 * Keys for encryption and authentication can be sent as part of a command, 217 * or the last key value used with a particular session can be retrieved 218 * and used again if either of these flags are not specified. 219 * 220 * HIFN_CRYPT_NEW_KEY, HIFN_MAC_NEW_KEY 221 * 222 * session_num 223 * ----------- 224 * A number between 0 and 2048 (for DRAM models) or a number between 225 * 0 and 768 (for SRAM models). Those who don't want to use session 226 * numbers should leave value at zero and send a new crypt key and/or 227 * new MAC key on every command. If you use session numbers and 228 * don't send a key with a command, the last key sent for that same 229 * session number will be used. 230 * 231 * Warning: Using session numbers and multiboard at the same time 232 * is currently broken. 233 * 234 * mbuf 235 * ---- 236 * Either fill in the mbuf pointer and npa=0 or 237 * fill packp[] and packl[] and set npa to > 0 238 * 239 * mac_header_skip 240 * --------------- 241 * The number of bytes of the source_buf that are skipped over before 242 * authentication begins. This must be a number between 0 and 2^16-1 243 * and can be used by IPsec implementers to skip over IP headers. 244 * *** Value ignored if authentication not used *** 245 * 246 * crypt_header_skip 247 * ----------------- 248 * The number of bytes of the source_buf that are skipped over before 249 * the cryptographic operation begins. This must be a number between 0 250 * and 2^16-1. For IPsec, this number will always be 8 bytes larger 251 * than the auth_header_skip (to skip over the ESP header). 252 * *** Value ignored if cryptography not used *** 253 * 254 */ 255 struct hifn_operand { 256 union { 257 struct mbuf *m; 258 struct uio *io; 259 } u; 260 bus_dmamap_t map; 261 bus_size_t mapsize; 262 int nsegs; 263 bus_dma_segment_t segs[MAX_SCATTER]; 264 }; 265 struct hifn_command { 266 u_int16_t session_num; 267 u_int16_t base_masks, cry_masks, mac_masks; 268 u_int8_t iv[HIFN_MAX_IV_LENGTH], *ck, mac[HIFN_MAC_KEY_LENGTH]; 269 int cklen; 270 int sloplen, slopidx; 271 272 struct hifn_operand src; 273 struct hifn_operand dst; 274 275 struct hifn_softc *softc; 276 struct cryptop *crp; 277 struct cryptodesc *enccrd, *maccrd; 278 }; 279 280 #define src_m src.u.m 281 #define src_io src.u.io 282 #define src_map src.map 283 #define src_mapsize src.mapsize 284 #define src_segs src.segs 285 #define src_nsegs src.nsegs 286 287 #define dst_m dst.u.m 288 #define dst_io dst.u.io 289 #define dst_map dst.map 290 #define dst_mapsize dst.mapsize 291 #define dst_segs dst.segs 292 #define dst_nsegs dst.nsegs 293 294 /* 295 * Return values for hifn_crypto() 296 */ 297 #define HIFN_CRYPTO_SUCCESS 0 298 #define HIFN_CRYPTO_BAD_INPUT (-1) 299 #define HIFN_CRYPTO_RINGS_FULL (-2) 300 301 /************************************************************************** 302 * 303 * Function: hifn_crypto 304 * 305 * Purpose: Called by external drivers to begin an encryption on the 306 * HIFN board. 307 * 308 * Blocking/Non-blocking Issues 309 * ============================ 310 * The driver cannot block in hifn_crypto (no calls to tsleep) currently. 311 * hifn_crypto() returns HIFN_CRYPTO_RINGS_FULL if there is not enough 312 * room in any of the rings for the request to proceed. 313 * 314 * Return Values 315 * ============= 316 * 0 for success, negative values on error 317 * 318 * Defines for negative error codes are: 319 * 320 * HIFN_CRYPTO_BAD_INPUT : The passed in command had invalid settings. 321 * HIFN_CRYPTO_RINGS_FULL : All DMA rings were full and non-blocking 322 * behaviour was requested. 323 * 324 *************************************************************************/ 325 326 /* 327 * Convert back and forth from 'sid' to 'card' and 'session' 328 */ 329 #define HIFN_CARD(sid) (((sid) & 0xf0000000) >> 28) 330 #define HIFN_SESSION(sid) ((sid) & 0x000007ff) 331 #define HIFN_SID(crd,ses) (((crd) << 28) | ((ses) & 0x7ff)) 332 333 #endif /* _KERNEL */ 334 335 struct hifn_stats { 336 u_int64_t hst_ibytes; 337 u_int64_t hst_obytes; 338 u_int32_t hst_ipackets; 339 u_int32_t hst_opackets; 340 u_int32_t hst_invalid; 341 u_int32_t hst_nomem; /* malloc or one of hst_nomem_* */ 342 u_int32_t hst_abort; 343 u_int32_t hst_noirq; /* IRQ for no reason */ 344 u_int32_t hst_totbatch; /* ops submitted w/o interrupt */ 345 u_int32_t hst_maxbatch; /* max ops submitted together */ 346 u_int32_t hst_unaligned; /* unaligned src caused copy */ 347 /* 348 * The following divides hst_nomem into more specific buckets. 349 */ 350 u_int32_t hst_nomem_map; /* bus_dmamap_create failed */ 351 u_int32_t hst_nomem_load; /* bus_dmamap_load_* failed */ 352 u_int32_t hst_nomem_mbuf; /* MGET* failed */ 353 u_int32_t hst_nomem_mcl; /* MCLGET* failed */ 354 u_int32_t hst_nomem_cr; /* out of command/result descriptor */ 355 u_int32_t hst_nomem_sd; /* out of src/dst descriptors */ 356 }; 357 358 #endif /* __HIFN7751VAR_H__ */ 359