1 /* $FreeBSD$ */ 2 /* $OpenBSD: hifn7751var.h,v 1.42 2002/04/08 17:49:42 jason Exp $ */ 3 4 /*- 5 * SPDX-License-Identifier: BSD-3-Clause 6 * 7 * Invertex AEON / Hifn 7751 driver 8 * Copyright (c) 1999 Invertex Inc. All rights reserved. 9 * Copyright (c) 1999 Theo de Raadt 10 * Copyright (c) 2000-2001 Network Security Technologies, Inc. 11 * http://www.netsec.net 12 * 13 * Please send any comments, feedback, bug-fixes, or feature requests to 14 * software@invertex.com. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 20 * 1. Redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer. 22 * 2. Redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution. 25 * 3. The name of the author may not be used to endorse or promote products 26 * derived from this software without specific prior written permission. 27 * 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 30 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 31 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 32 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 33 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 34 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 38 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Effort sponsored in part by the Defense Advanced Research Projects 41 * Agency (DARPA) and Air Force Research Laboratory, Air Force 42 * Materiel Command, USAF, under agreement number F30602-01-2-0537. 43 * 44 */ 45 46 #ifndef __HIFN7751VAR_H__ 47 #define __HIFN7751VAR_H__ 48 49 #ifdef _KERNEL 50 51 /* 52 * Some configurable values for the driver. By default command+result 53 * descriptor rings are the same size. The src+dst descriptor rings 54 * are sized at 3.5x the number of potential commands. Slower parts 55 * (e.g. 7951) tend to run out of src descriptors; faster parts (7811) 56 * src+cmd/result descriptors. It's not clear that increasing the size 57 * of the descriptor rings helps performance significantly as other 58 * factors tend to come into play (e.g. copying misaligned packets). 59 */ 60 #define HIFN_D_CMD_RSIZE 24 /* command descriptors */ 61 #define HIFN_D_SRC_RSIZE ((HIFN_D_CMD_RSIZE * 7) / 2) /* source descriptors */ 62 #define HIFN_D_RES_RSIZE HIFN_D_CMD_RSIZE /* result descriptors */ 63 #define HIFN_D_DST_RSIZE HIFN_D_SRC_RSIZE /* destination descriptors */ 64 65 /* 66 * Length values for cryptography 67 */ 68 #define HIFN_DES_KEY_LENGTH 8 69 #define HIFN_3DES_KEY_LENGTH 24 70 #define HIFN_MAX_CRYPT_KEY_LENGTH HIFN_3DES_KEY_LENGTH 71 #define HIFN_IV_LENGTH 8 72 #define HIFN_AES_IV_LENGTH 16 73 #define HIFN_MAX_IV_LENGTH HIFN_AES_IV_LENGTH 74 75 /* 76 * Length values for authentication 77 */ 78 #define HIFN_MAC_KEY_LENGTH 64 79 #define HIFN_MD5_LENGTH 16 80 #define HIFN_SHA1_LENGTH 20 81 #define HIFN_MAC_TRUNC_LENGTH 12 82 83 #define MAX_SCATTER 64 84 85 /* 86 * Data structure to hold all 4 rings and any other ring related data 87 * that should reside in DMA. 88 */ 89 struct hifn_dma { 90 /* 91 * Descriptor rings. We add +1 to the size to accomidate the 92 * jump descriptor. 93 */ 94 struct hifn_desc cmdr[HIFN_D_CMD_RSIZE+1]; 95 struct hifn_desc srcr[HIFN_D_SRC_RSIZE+1]; 96 struct hifn_desc dstr[HIFN_D_DST_RSIZE+1]; 97 struct hifn_desc resr[HIFN_D_RES_RSIZE+1]; 98 99 100 u_char command_bufs[HIFN_D_CMD_RSIZE][HIFN_MAX_COMMAND]; 101 u_char result_bufs[HIFN_D_CMD_RSIZE][HIFN_MAX_RESULT]; 102 u_int32_t slop[HIFN_D_CMD_RSIZE]; 103 u_int64_t test_src, test_dst; 104 } ; 105 106 107 struct hifn_session { 108 int hs_mlen; 109 }; 110 111 #define HIFN_RING_SYNC(sc, r, i, f) \ 112 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, (f)) 113 114 #define HIFN_CMDR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), cmdr, (i), (f)) 115 #define HIFN_RESR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), resr, (i), (f)) 116 #define HIFN_SRCR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), srcr, (i), (f)) 117 #define HIFN_DSTR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), dstr, (i), (f)) 118 119 #define HIFN_CMD_SYNC(sc, i, f) \ 120 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, (f)) 121 122 #define HIFN_RES_SYNC(sc, i, f) \ 123 bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, (f)) 124 125 /* 126 * Holds data specific to a single HIFN board. 127 */ 128 struct hifn_softc { 129 device_t sc_dev; /* device backpointer */ 130 struct mtx sc_mtx; /* per-instance lock */ 131 bus_dma_tag_t sc_dmat; /* parent DMA tag descriptor */ 132 struct resource *sc_bar0res; 133 bus_space_handle_t sc_sh0; /* bar0 bus space handle */ 134 bus_space_tag_t sc_st0; /* bar0 bus space tag */ 135 bus_size_t sc_bar0_lastreg;/* bar0 last reg written */ 136 struct resource *sc_bar1res; 137 bus_space_handle_t sc_sh1; /* bar1 bus space handle */ 138 bus_space_tag_t sc_st1; /* bar1 bus space tag */ 139 bus_size_t sc_bar1_lastreg;/* bar1 last reg written */ 140 struct resource *sc_irq; 141 void *sc_intrhand; /* interrupt handle */ 142 143 u_int32_t sc_dmaier; 144 u_int32_t sc_drammodel; /* 1=dram, 0=sram */ 145 u_int32_t sc_pllconfig; /* 7954/7955/7956 PLL config */ 146 147 struct hifn_dma *sc_dma; 148 bus_dmamap_t sc_dmamap; 149 bus_dma_segment_t sc_dmasegs[1]; 150 bus_addr_t sc_dma_physaddr;/* physical address of sc_dma */ 151 int sc_dmansegs; 152 struct hifn_command *sc_hifn_commands[HIFN_D_RES_RSIZE]; 153 /* 154 * Our current positions for insertion and removal from the desriptor 155 * rings. 156 */ 157 int sc_cmdi, sc_srci, sc_dsti, sc_resi; 158 volatile int sc_cmdu, sc_srcu, sc_dstu, sc_resu; 159 int sc_cmdk, sc_srck, sc_dstk, sc_resk; 160 161 int32_t sc_cid; 162 uint16_t sc_ena; 163 int sc_maxses; 164 int sc_ramsize; 165 int sc_flags; 166 #define HIFN_HAS_RNG 0x1 /* includes random number generator */ 167 #define HIFN_HAS_PUBLIC 0x2 /* includes public key support */ 168 #define HIFN_HAS_AES 0x4 /* includes AES support */ 169 #define HIFN_IS_7811 0x8 /* Hifn 7811 part */ 170 #define HIFN_IS_7956 0x10 /* Hifn 7956/7955 don't have SDRAM */ 171 struct callout sc_rngto; /* for polling RNG */ 172 struct callout sc_tickto; /* for managing DMA */ 173 int sc_rngfirst; 174 int sc_rnghz; /* RNG polling frequency */ 175 struct rndtest_state *sc_rndtest; /* RNG test state */ 176 void (*sc_harvest)(struct rndtest_state *, 177 void *, u_int); 178 int sc_c_busy; /* command ring busy */ 179 int sc_s_busy; /* source data ring busy */ 180 int sc_d_busy; /* destination data ring busy */ 181 int sc_r_busy; /* result ring busy */ 182 int sc_active; /* for initial countdown */ 183 int sc_needwakeup; /* ops q'd wating on resources */ 184 int sc_curbatch; /* # ops submitted w/o int */ 185 int sc_suspended; 186 #ifdef HIFN_VULCANDEV 187 struct cdev *sc_pkdev; 188 #endif 189 }; 190 191 #define HIFN_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 192 #define HIFN_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 193 194 /* 195 * hifn_command_t 196 * 197 * This is the control structure used to pass commands to hifn_encrypt(). 198 * 199 * flags 200 * ----- 201 * Flags is the bitwise "or" values for command configuration. A single 202 * encrypt direction needs to be set: 203 * 204 * HIFN_ENCODE or HIFN_DECODE 205 * 206 * To use cryptography, a single crypto algorithm must be included: 207 * 208 * HIFN_CRYPT_3DES or HIFN_CRYPT_DES 209 * 210 * To use authentication is used, a single MAC algorithm must be included: 211 * 212 * HIFN_MAC_MD5 or HIFN_MAC_SHA1 213 * 214 * By default MD5 uses a 16 byte hash and SHA-1 uses a 20 byte hash. 215 * If the value below is set, hash values are truncated or assumed 216 * truncated to 12 bytes: 217 * 218 * HIFN_MAC_TRUNC 219 * 220 * Keys for encryption and authentication can be sent as part of a command, 221 * or the last key value used with a particular session can be retrieved 222 * and used again if either of these flags are not specified. 223 * 224 * HIFN_CRYPT_NEW_KEY, HIFN_MAC_NEW_KEY 225 * 226 * session_num 227 * ----------- 228 * A number between 0 and 2048 (for DRAM models) or a number between 229 * 0 and 768 (for SRAM models). Those who don't want to use session 230 * numbers should leave value at zero and send a new crypt key and/or 231 * new MAC key on every command. If you use session numbers and 232 * don't send a key with a command, the last key sent for that same 233 * session number will be used. 234 * 235 * Warning: Using session numbers and multiboard at the same time 236 * is currently broken. 237 * 238 * mbuf 239 * ---- 240 * Either fill in the mbuf pointer and npa=0 or 241 * fill packp[] and packl[] and set npa to > 0 242 * 243 * mac_header_skip 244 * --------------- 245 * The number of bytes of the source_buf that are skipped over before 246 * authentication begins. This must be a number between 0 and 2^16-1 247 * and can be used by IPsec implementers to skip over IP headers. 248 * *** Value ignored if authentication not used *** 249 * 250 * crypt_header_skip 251 * ----------------- 252 * The number of bytes of the source_buf that are skipped over before 253 * the cryptographic operation begins. This must be a number between 0 254 * and 2^16-1. For IPsec, this number will always be 8 bytes larger 255 * than the auth_header_skip (to skip over the ESP header). 256 * *** Value ignored if cryptography not used *** 257 * 258 */ 259 struct hifn_operand { 260 bus_dmamap_t map; 261 bus_size_t mapsize; 262 int nsegs; 263 bus_dma_segment_t segs[MAX_SCATTER]; 264 }; 265 struct hifn_command { 266 struct hifn_session *session; 267 u_int16_t base_masks, cry_masks, mac_masks; 268 u_int8_t iv[HIFN_MAX_IV_LENGTH], mac[HIFN_MAC_KEY_LENGTH]; 269 const uint8_t *ck; 270 int cklen; 271 int sloplen, slopidx; 272 273 struct hifn_operand src; 274 struct hifn_operand dst; 275 struct mbuf *dst_m; 276 277 struct hifn_softc *softc; 278 struct cryptop *crp; 279 }; 280 281 #define src_map src.map 282 #define src_mapsize src.mapsize 283 #define src_segs src.segs 284 #define src_nsegs src.nsegs 285 286 #define dst_map dst.map 287 #define dst_mapsize dst.mapsize 288 #define dst_segs dst.segs 289 #define dst_nsegs dst.nsegs 290 291 /* 292 * Return values for hifn_crypto() 293 */ 294 #define HIFN_CRYPTO_SUCCESS 0 295 #define HIFN_CRYPTO_BAD_INPUT (-1) 296 #define HIFN_CRYPTO_RINGS_FULL (-2) 297 298 /************************************************************************** 299 * 300 * Function: hifn_crypto 301 * 302 * Purpose: Called by external drivers to begin an encryption on the 303 * HIFN board. 304 * 305 * Blocking/Non-blocking Issues 306 * ============================ 307 * The driver cannot block in hifn_crypto (no calls to tsleep) currently. 308 * hifn_crypto() returns HIFN_CRYPTO_RINGS_FULL if there is not enough 309 * room in any of the rings for the request to proceed. 310 * 311 * Return Values 312 * ============= 313 * 0 for success, negative values on error 314 * 315 * Defines for negative error codes are: 316 * 317 * HIFN_CRYPTO_BAD_INPUT : The passed in command had invalid settings. 318 * HIFN_CRYPTO_RINGS_FULL : All DMA rings were full and non-blocking 319 * behaviour was requested. 320 * 321 *************************************************************************/ 322 #endif /* _KERNEL */ 323 324 struct hifn_stats { 325 u_int64_t hst_ibytes; 326 u_int64_t hst_obytes; 327 u_int32_t hst_ipackets; 328 u_int32_t hst_opackets; 329 u_int32_t hst_invalid; 330 u_int32_t hst_nomem; /* malloc or one of hst_nomem_* */ 331 u_int32_t hst_abort; 332 u_int32_t hst_noirq; /* IRQ for no reason */ 333 u_int32_t hst_totbatch; /* ops submitted w/o interrupt */ 334 u_int32_t hst_maxbatch; /* max ops submitted together */ 335 u_int32_t hst_unaligned; /* unaligned src caused copy */ 336 /* 337 * The following divides hst_nomem into more specific buckets. 338 */ 339 u_int32_t hst_nomem_map; /* bus_dmamap_create failed */ 340 u_int32_t hst_nomem_load; /* bus_dmamap_load_* failed */ 341 u_int32_t hst_nomem_mbuf; /* MGET* failed */ 342 u_int32_t hst_nomem_mcl; /* MCLGET* failed */ 343 u_int32_t hst_nomem_cr; /* out of command/result descriptor */ 344 u_int32_t hst_nomem_sd; /* out of src/dst descriptors */ 345 }; 346 347 #endif /* __HIFN7751VAR_H__ */ 348