16d161891SSam Leffler /* $OpenBSD: hifn7751var.h,v 1.42 2002/04/08 17:49:42 jason Exp $ */ 26d161891SSam Leffler 3098ca2bdSWarner Losh /*- 4718cf2ccSPedro F. Giffuni * SPDX-License-Identifier: BSD-3-Clause 5718cf2ccSPedro F. Giffuni * 66d161891SSam Leffler * Invertex AEON / Hifn 7751 driver 76d161891SSam Leffler * Copyright (c) 1999 Invertex Inc. All rights reserved. 86d161891SSam Leffler * Copyright (c) 1999 Theo de Raadt 96d161891SSam Leffler * Copyright (c) 2000-2001 Network Security Technologies, Inc. 106d161891SSam Leffler * http://www.netsec.net 116d161891SSam Leffler * 126d161891SSam Leffler * Please send any comments, feedback, bug-fixes, or feature requests to 136d161891SSam Leffler * software@invertex.com. 146d161891SSam Leffler * 156d161891SSam Leffler * Redistribution and use in source and binary forms, with or without 166d161891SSam Leffler * modification, are permitted provided that the following conditions 176d161891SSam Leffler * are met: 186d161891SSam Leffler * 196d161891SSam Leffler * 1. Redistributions of source code must retain the above copyright 206d161891SSam Leffler * notice, this list of conditions and the following disclaimer. 216d161891SSam Leffler * 2. Redistributions in binary form must reproduce the above copyright 226d161891SSam Leffler * notice, this list of conditions and the following disclaimer in the 236d161891SSam Leffler * documentation and/or other materials provided with the distribution. 246d161891SSam Leffler * 3. The name of the author may not be used to endorse or promote products 256d161891SSam Leffler * derived from this software without specific prior written permission. 266d161891SSam Leffler * 276d161891SSam Leffler * 286d161891SSam Leffler * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 296d161891SSam Leffler * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 306d161891SSam Leffler * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 316d161891SSam Leffler * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 326d161891SSam Leffler * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 336d161891SSam Leffler * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 346d161891SSam Leffler * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 356d161891SSam Leffler * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 366d161891SSam Leffler * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 376d161891SSam Leffler * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 386d161891SSam Leffler * 396d161891SSam Leffler * Effort sponsored in part by the Defense Advanced Research Projects 406d161891SSam Leffler * Agency (DARPA) and Air Force Research Laboratory, Air Force 416d161891SSam Leffler * Materiel Command, USAF, under agreement number F30602-01-2-0537. 426d161891SSam Leffler * 436d161891SSam Leffler */ 446d161891SSam Leffler 456d161891SSam Leffler #ifndef __HIFN7751VAR_H__ 466d161891SSam Leffler #define __HIFN7751VAR_H__ 476d161891SSam Leffler 486d161891SSam Leffler #ifdef _KERNEL 496d161891SSam Leffler 506d161891SSam Leffler /* 516d161891SSam Leffler * Some configurable values for the driver. By default command+result 526d161891SSam Leffler * descriptor rings are the same size. The src+dst descriptor rings 536d161891SSam Leffler * are sized at 3.5x the number of potential commands. Slower parts 546d161891SSam Leffler * (e.g. 7951) tend to run out of src descriptors; faster parts (7811) 556d161891SSam Leffler * src+cmd/result descriptors. It's not clear that increasing the size 566d161891SSam Leffler * of the descriptor rings helps performance significantly as other 576d161891SSam Leffler * factors tend to come into play (e.g. copying misaligned packets). 586d161891SSam Leffler */ 596d161891SSam Leffler #define HIFN_D_CMD_RSIZE 24 /* command descriptors */ 606d161891SSam Leffler #define HIFN_D_SRC_RSIZE ((HIFN_D_CMD_RSIZE * 7) / 2) /* source descriptors */ 616d161891SSam Leffler #define HIFN_D_RES_RSIZE HIFN_D_CMD_RSIZE /* result descriptors */ 626d161891SSam Leffler #define HIFN_D_DST_RSIZE HIFN_D_SRC_RSIZE /* destination descriptors */ 636d161891SSam Leffler 646d161891SSam Leffler /* 656d161891SSam Leffler * Length values for cryptography 666d161891SSam Leffler */ 676d161891SSam Leffler #define HIFN_DES_KEY_LENGTH 8 686d161891SSam Leffler #define HIFN_3DES_KEY_LENGTH 24 696d161891SSam Leffler #define HIFN_MAX_CRYPT_KEY_LENGTH HIFN_3DES_KEY_LENGTH 706d161891SSam Leffler #define HIFN_IV_LENGTH 8 7117b66701SSam Leffler #define HIFN_AES_IV_LENGTH 16 7217b66701SSam Leffler #define HIFN_MAX_IV_LENGTH HIFN_AES_IV_LENGTH 736d161891SSam Leffler 746d161891SSam Leffler /* 756d161891SSam Leffler * Length values for authentication 766d161891SSam Leffler */ 776d161891SSam Leffler #define HIFN_MAC_KEY_LENGTH 64 786d161891SSam Leffler #define HIFN_MD5_LENGTH 16 796d161891SSam Leffler #define HIFN_SHA1_LENGTH 20 806d161891SSam Leffler #define HIFN_MAC_TRUNC_LENGTH 12 816d161891SSam Leffler 826d161891SSam Leffler #define MAX_SCATTER 64 836d161891SSam Leffler 846d161891SSam Leffler /* 85ea14ae7aSOleksandr Tymoshenko * Data structure to hold all 4 rings and any other ring related data 86ea14ae7aSOleksandr Tymoshenko * that should reside in DMA. 876d161891SSam Leffler */ 886d161891SSam Leffler struct hifn_dma { 896d161891SSam Leffler /* 906d161891SSam Leffler * Descriptor rings. We add +1 to the size to accomidate the 916d161891SSam Leffler * jump descriptor. 926d161891SSam Leffler */ 936d161891SSam Leffler struct hifn_desc cmdr[HIFN_D_CMD_RSIZE+1]; 946d161891SSam Leffler struct hifn_desc srcr[HIFN_D_SRC_RSIZE+1]; 956d161891SSam Leffler struct hifn_desc dstr[HIFN_D_DST_RSIZE+1]; 966d161891SSam Leffler struct hifn_desc resr[HIFN_D_RES_RSIZE+1]; 976d161891SSam Leffler 986d161891SSam Leffler 996d161891SSam Leffler u_char command_bufs[HIFN_D_CMD_RSIZE][HIFN_MAX_COMMAND]; 1006d161891SSam Leffler u_char result_bufs[HIFN_D_CMD_RSIZE][HIFN_MAX_RESULT]; 1016d161891SSam Leffler u_int32_t slop[HIFN_D_CMD_RSIZE]; 1026d161891SSam Leffler u_int64_t test_src, test_dst; 1036d161891SSam Leffler } ; 1046d161891SSam Leffler 105ea14ae7aSOleksandr Tymoshenko 1066d161891SSam Leffler struct hifn_session { 1071b0909d5SConrad Meyer int hs_mlen; 1086d161891SSam Leffler }; 1096d161891SSam Leffler 1106d161891SSam Leffler #define HIFN_RING_SYNC(sc, r, i, f) \ 1116d161891SSam Leffler bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, (f)) 1126d161891SSam Leffler 1136d161891SSam Leffler #define HIFN_CMDR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), cmdr, (i), (f)) 1146d161891SSam Leffler #define HIFN_RESR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), resr, (i), (f)) 1156d161891SSam Leffler #define HIFN_SRCR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), srcr, (i), (f)) 1166d161891SSam Leffler #define HIFN_DSTR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), dstr, (i), (f)) 1176d161891SSam Leffler 1186d161891SSam Leffler #define HIFN_CMD_SYNC(sc, i, f) \ 1196d161891SSam Leffler bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, (f)) 1206d161891SSam Leffler 1216d161891SSam Leffler #define HIFN_RES_SYNC(sc, i, f) \ 1226d161891SSam Leffler bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, (f)) 1236d161891SSam Leffler 1246d161891SSam Leffler /* 1256d161891SSam Leffler * Holds data specific to a single HIFN board. 1266d161891SSam Leffler */ 1276d161891SSam Leffler struct hifn_softc { 1286d161891SSam Leffler device_t sc_dev; /* device backpointer */ 1296d161891SSam Leffler struct mtx sc_mtx; /* per-instance lock */ 130453130d9SPedro F. Giffuni bus_dma_tag_t sc_dmat; /* parent DMA tag descriptor */ 1316d161891SSam Leffler struct resource *sc_bar0res; 1326d161891SSam Leffler bus_space_handle_t sc_sh0; /* bar0 bus space handle */ 1336d161891SSam Leffler bus_space_tag_t sc_st0; /* bar0 bus space tag */ 1346d161891SSam Leffler bus_size_t sc_bar0_lastreg;/* bar0 last reg written */ 1356d161891SSam Leffler struct resource *sc_bar1res; 1366d161891SSam Leffler bus_space_handle_t sc_sh1; /* bar1 bus space handle */ 1376d161891SSam Leffler bus_space_tag_t sc_st1; /* bar1 bus space tag */ 1386d161891SSam Leffler bus_size_t sc_bar1_lastreg;/* bar1 last reg written */ 1396d161891SSam Leffler struct resource *sc_irq; 1406d161891SSam Leffler void *sc_intrhand; /* interrupt handle */ 1416d161891SSam Leffler 1426d161891SSam Leffler u_int32_t sc_dmaier; 1436d161891SSam Leffler u_int32_t sc_drammodel; /* 1=dram, 0=sram */ 144aa959e0dSSam Leffler u_int32_t sc_pllconfig; /* 7954/7955/7956 PLL config */ 1456d161891SSam Leffler 1466d161891SSam Leffler struct hifn_dma *sc_dma; 1476d161891SSam Leffler bus_dmamap_t sc_dmamap; 1486d161891SSam Leffler bus_dma_segment_t sc_dmasegs[1]; 1496d161891SSam Leffler bus_addr_t sc_dma_physaddr;/* physical address of sc_dma */ 1506d161891SSam Leffler int sc_dmansegs; 151ea14ae7aSOleksandr Tymoshenko struct hifn_command *sc_hifn_commands[HIFN_D_RES_RSIZE]; 152ea14ae7aSOleksandr Tymoshenko /* 153ea14ae7aSOleksandr Tymoshenko * Our current positions for insertion and removal from the desriptor 154ea14ae7aSOleksandr Tymoshenko * rings. 155ea14ae7aSOleksandr Tymoshenko */ 156ea14ae7aSOleksandr Tymoshenko int sc_cmdi, sc_srci, sc_dsti, sc_resi; 157ea14ae7aSOleksandr Tymoshenko volatile int sc_cmdu, sc_srcu, sc_dstu, sc_resu; 158ea14ae7aSOleksandr Tymoshenko int sc_cmdk, sc_srck, sc_dstk, sc_resk; 159ea14ae7aSOleksandr Tymoshenko 1606d161891SSam Leffler int32_t sc_cid; 161*c0341432SJohn Baldwin uint16_t sc_ena; 1626d161891SSam Leffler int sc_maxses; 1636d161891SSam Leffler int sc_ramsize; 1646d161891SSam Leffler int sc_flags; 1656d161891SSam Leffler #define HIFN_HAS_RNG 0x1 /* includes random number generator */ 1666d161891SSam Leffler #define HIFN_HAS_PUBLIC 0x2 /* includes public key support */ 16717b66701SSam Leffler #define HIFN_HAS_AES 0x4 /* includes AES support */ 16817b66701SSam Leffler #define HIFN_IS_7811 0x8 /* Hifn 7811 part */ 16917b66701SSam Leffler #define HIFN_IS_7956 0x10 /* Hifn 7956/7955 don't have SDRAM */ 1706d161891SSam Leffler struct callout sc_rngto; /* for polling RNG */ 1716d161891SSam Leffler struct callout sc_tickto; /* for managing DMA */ 1726d161891SSam Leffler int sc_rngfirst; 1736d161891SSam Leffler int sc_rnghz; /* RNG polling frequency */ 174b7c4858fSSam Leffler struct rndtest_state *sc_rndtest; /* RNG test state */ 175b7c4858fSSam Leffler void (*sc_harvest)(struct rndtest_state *, 176b7c4858fSSam Leffler void *, u_int); 1776d161891SSam Leffler int sc_c_busy; /* command ring busy */ 1786d161891SSam Leffler int sc_s_busy; /* source data ring busy */ 1796d161891SSam Leffler int sc_d_busy; /* destination data ring busy */ 1806d161891SSam Leffler int sc_r_busy; /* result ring busy */ 1816d161891SSam Leffler int sc_active; /* for initial countdown */ 1826d161891SSam Leffler int sc_needwakeup; /* ops q'd wating on resources */ 1836d161891SSam Leffler int sc_curbatch; /* # ops submitted w/o int */ 1846d161891SSam Leffler int sc_suspended; 1856810ad6fSSam Leffler #ifdef HIFN_VULCANDEV 1866810ad6fSSam Leffler struct cdev *sc_pkdev; 1876810ad6fSSam Leffler #endif 1886d161891SSam Leffler }; 1896d161891SSam Leffler 1906d161891SSam Leffler #define HIFN_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 1916d161891SSam Leffler #define HIFN_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 1926d161891SSam Leffler 1936d161891SSam Leffler /* 1946d161891SSam Leffler * hifn_command_t 1956d161891SSam Leffler * 1966d161891SSam Leffler * This is the control structure used to pass commands to hifn_encrypt(). 1976d161891SSam Leffler * 1986d161891SSam Leffler * flags 1996d161891SSam Leffler * ----- 2006d161891SSam Leffler * Flags is the bitwise "or" values for command configuration. A single 2016d161891SSam Leffler * encrypt direction needs to be set: 2026d161891SSam Leffler * 2036d161891SSam Leffler * HIFN_ENCODE or HIFN_DECODE 2046d161891SSam Leffler * 2056d161891SSam Leffler * To use cryptography, a single crypto algorithm must be included: 2066d161891SSam Leffler * 2076d161891SSam Leffler * HIFN_CRYPT_3DES or HIFN_CRYPT_DES 2086d161891SSam Leffler * 2096d161891SSam Leffler * To use authentication is used, a single MAC algorithm must be included: 2106d161891SSam Leffler * 2116d161891SSam Leffler * HIFN_MAC_MD5 or HIFN_MAC_SHA1 2126d161891SSam Leffler * 2136d161891SSam Leffler * By default MD5 uses a 16 byte hash and SHA-1 uses a 20 byte hash. 2146d161891SSam Leffler * If the value below is set, hash values are truncated or assumed 2156d161891SSam Leffler * truncated to 12 bytes: 2166d161891SSam Leffler * 2176d161891SSam Leffler * HIFN_MAC_TRUNC 2186d161891SSam Leffler * 2196d161891SSam Leffler * Keys for encryption and authentication can be sent as part of a command, 2206d161891SSam Leffler * or the last key value used with a particular session can be retrieved 2216d161891SSam Leffler * and used again if either of these flags are not specified. 2226d161891SSam Leffler * 2236d161891SSam Leffler * HIFN_CRYPT_NEW_KEY, HIFN_MAC_NEW_KEY 2246d161891SSam Leffler * 2256d161891SSam Leffler * session_num 2266d161891SSam Leffler * ----------- 2276d161891SSam Leffler * A number between 0 and 2048 (for DRAM models) or a number between 2286d161891SSam Leffler * 0 and 768 (for SRAM models). Those who don't want to use session 2296d161891SSam Leffler * numbers should leave value at zero and send a new crypt key and/or 2306d161891SSam Leffler * new MAC key on every command. If you use session numbers and 2316d161891SSam Leffler * don't send a key with a command, the last key sent for that same 2326d161891SSam Leffler * session number will be used. 2336d161891SSam Leffler * 2346d161891SSam Leffler * Warning: Using session numbers and multiboard at the same time 2356d161891SSam Leffler * is currently broken. 2366d161891SSam Leffler * 2376d161891SSam Leffler * mbuf 2386d161891SSam Leffler * ---- 2396d161891SSam Leffler * Either fill in the mbuf pointer and npa=0 or 2406d161891SSam Leffler * fill packp[] and packl[] and set npa to > 0 2416d161891SSam Leffler * 2426d161891SSam Leffler * mac_header_skip 2436d161891SSam Leffler * --------------- 2446d161891SSam Leffler * The number of bytes of the source_buf that are skipped over before 2456d161891SSam Leffler * authentication begins. This must be a number between 0 and 2^16-1 2466d161891SSam Leffler * and can be used by IPsec implementers to skip over IP headers. 2476d161891SSam Leffler * *** Value ignored if authentication not used *** 2486d161891SSam Leffler * 2496d161891SSam Leffler * crypt_header_skip 2506d161891SSam Leffler * ----------------- 2516d161891SSam Leffler * The number of bytes of the source_buf that are skipped over before 2526d161891SSam Leffler * the cryptographic operation begins. This must be a number between 0 2536d161891SSam Leffler * and 2^16-1. For IPsec, this number will always be 8 bytes larger 2546d161891SSam Leffler * than the auth_header_skip (to skip over the ESP header). 2556d161891SSam Leffler * *** Value ignored if cryptography not used *** 2566d161891SSam Leffler * 2576d161891SSam Leffler */ 2586d161891SSam Leffler struct hifn_operand { 2596d161891SSam Leffler bus_dmamap_t map; 2606d161891SSam Leffler bus_size_t mapsize; 2616d161891SSam Leffler int nsegs; 2626d161891SSam Leffler bus_dma_segment_t segs[MAX_SCATTER]; 2636d161891SSam Leffler }; 2646d161891SSam Leffler struct hifn_command { 2651b0909d5SConrad Meyer struct hifn_session *session; 2666d161891SSam Leffler u_int16_t base_masks, cry_masks, mac_masks; 267*c0341432SJohn Baldwin u_int8_t iv[HIFN_MAX_IV_LENGTH], mac[HIFN_MAC_KEY_LENGTH]; 268*c0341432SJohn Baldwin const uint8_t *ck; 2696d161891SSam Leffler int cklen; 2706d161891SSam Leffler int sloplen, slopidx; 2716d161891SSam Leffler 2726d161891SSam Leffler struct hifn_operand src; 2736d161891SSam Leffler struct hifn_operand dst; 274*c0341432SJohn Baldwin struct mbuf *dst_m; 2756d161891SSam Leffler 2766d161891SSam Leffler struct hifn_softc *softc; 2776d161891SSam Leffler struct cryptop *crp; 2786d161891SSam Leffler }; 2796d161891SSam Leffler 2806d161891SSam Leffler #define src_map src.map 2816d161891SSam Leffler #define src_mapsize src.mapsize 2826d161891SSam Leffler #define src_segs src.segs 2836d161891SSam Leffler #define src_nsegs src.nsegs 2846d161891SSam Leffler 2856d161891SSam Leffler #define dst_map dst.map 2866d161891SSam Leffler #define dst_mapsize dst.mapsize 2876d161891SSam Leffler #define dst_segs dst.segs 2886d161891SSam Leffler #define dst_nsegs dst.nsegs 2896d161891SSam Leffler 2906d161891SSam Leffler /* 2916d161891SSam Leffler * Return values for hifn_crypto() 2926d161891SSam Leffler */ 2936d161891SSam Leffler #define HIFN_CRYPTO_SUCCESS 0 2946d161891SSam Leffler #define HIFN_CRYPTO_BAD_INPUT (-1) 2956d161891SSam Leffler #define HIFN_CRYPTO_RINGS_FULL (-2) 2966d161891SSam Leffler 2976d161891SSam Leffler /************************************************************************** 2986d161891SSam Leffler * 2996d161891SSam Leffler * Function: hifn_crypto 3006d161891SSam Leffler * 3016d161891SSam Leffler * Purpose: Called by external drivers to begin an encryption on the 3026d161891SSam Leffler * HIFN board. 3036d161891SSam Leffler * 3046d161891SSam Leffler * Blocking/Non-blocking Issues 3056d161891SSam Leffler * ============================ 3066d161891SSam Leffler * The driver cannot block in hifn_crypto (no calls to tsleep) currently. 3076d161891SSam Leffler * hifn_crypto() returns HIFN_CRYPTO_RINGS_FULL if there is not enough 3086d161891SSam Leffler * room in any of the rings for the request to proceed. 3096d161891SSam Leffler * 3106d161891SSam Leffler * Return Values 3116d161891SSam Leffler * ============= 3126d161891SSam Leffler * 0 for success, negative values on error 3136d161891SSam Leffler * 3146d161891SSam Leffler * Defines for negative error codes are: 3156d161891SSam Leffler * 3166d161891SSam Leffler * HIFN_CRYPTO_BAD_INPUT : The passed in command had invalid settings. 3176d161891SSam Leffler * HIFN_CRYPTO_RINGS_FULL : All DMA rings were full and non-blocking 3186d161891SSam Leffler * behaviour was requested. 3196d161891SSam Leffler * 3206d161891SSam Leffler *************************************************************************/ 3216d161891SSam Leffler #endif /* _KERNEL */ 3226d161891SSam Leffler 3236d161891SSam Leffler struct hifn_stats { 3246d161891SSam Leffler u_int64_t hst_ibytes; 3256d161891SSam Leffler u_int64_t hst_obytes; 3266d161891SSam Leffler u_int32_t hst_ipackets; 3276d161891SSam Leffler u_int32_t hst_opackets; 3286d161891SSam Leffler u_int32_t hst_invalid; 3296d161891SSam Leffler u_int32_t hst_nomem; /* malloc or one of hst_nomem_* */ 3306d161891SSam Leffler u_int32_t hst_abort; 3316d161891SSam Leffler u_int32_t hst_noirq; /* IRQ for no reason */ 3326d161891SSam Leffler u_int32_t hst_totbatch; /* ops submitted w/o interrupt */ 3336d161891SSam Leffler u_int32_t hst_maxbatch; /* max ops submitted together */ 3346d161891SSam Leffler u_int32_t hst_unaligned; /* unaligned src caused copy */ 3356d161891SSam Leffler /* 3366d161891SSam Leffler * The following divides hst_nomem into more specific buckets. 3376d161891SSam Leffler */ 3386d161891SSam Leffler u_int32_t hst_nomem_map; /* bus_dmamap_create failed */ 3396d161891SSam Leffler u_int32_t hst_nomem_load; /* bus_dmamap_load_* failed */ 3406d161891SSam Leffler u_int32_t hst_nomem_mbuf; /* MGET* failed */ 3416d161891SSam Leffler u_int32_t hst_nomem_mcl; /* MCLGET* failed */ 3426d161891SSam Leffler u_int32_t hst_nomem_cr; /* out of command/result descriptor */ 3436d161891SSam Leffler u_int32_t hst_nomem_sd; /* out of src/dst descriptors */ 3446d161891SSam Leffler }; 3456d161891SSam Leffler 3466d161891SSam Leffler #endif /* __HIFN7751VAR_H__ */ 347