xref: /freebsd/sys/dev/gpio/qoriq_gpio.c (revision 027a58aab2cee5589a3a639afb77ecbb607f8fee)
1 /*-
2  * Copyright (c) 2020 Alstom Group.
3  * Copyright (c) 2020 Semihalf.
4  * Copyright (c) 2015 Justin Hibbits
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * $FreeBSD$
29  */
30 
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/conf.h>
37 #include <sys/bus.h>
38 #include <sys/kernel.h>
39 #include <sys/module.h>
40 #include <sys/mutex.h>
41 #include <sys/proc.h>
42 #include <sys/rman.h>
43 #include <sys/gpio.h>
44 
45 #include <machine/bus.h>
46 #include <machine/resource.h>
47 #include <machine/stdarg.h>
48 
49 #include <dev/gpio/gpiobusvar.h>
50 #include <dev/ofw/ofw_bus.h>
51 #include <dev/ofw/ofw_bus_subr.h>
52 
53 #include <dt-bindings/interrupt-controller/irq.h>
54 
55 #include "gpio_if.h"
56 #include "pic_if.h"
57 
58 #define	BIT(x)		(1 << (x))
59 #define MAXPIN		(31)
60 
61 #define VALID_PIN(u)	((u) >= 0 && (u) <= MAXPIN)
62 #define DEFAULT_CAPS	(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | \
63 			 GPIO_PIN_OPENDRAIN | GPIO_PIN_PUSHPULL | \
64 			 GPIO_INTR_EDGE_FALLING | GPIO_INTR_EDGE_BOTH | \
65 			 GPIO_PIN_PULLUP)
66 
67 #define	GPIO_LOCK(sc)	mtx_lock_spin(&(sc)->sc_mtx)
68 #define	GPIO_UNLOCK(sc)	mtx_unlock_spin(&(sc)->sc_mtx)
69 #define GPIO_LOCK_INIT(sc) \
70 	mtx_init(&(sc)->sc_mtx, device_get_nameunit((sc)->dev),	\
71 	    "gpio", MTX_SPIN)
72 #define GPIO_LOCK_DESTROY(_sc)	mtx_destroy(&_sc->sc_mtx);
73 
74 #define	GPIO_GPDIR	0x0
75 #define	GPIO_GPODR	0x4
76 #define	GPIO_GPDAT	0x8
77 #define	GPIO_GPIER	0xc
78 #define	GPIO_GPIMR	0x10
79 #define	GPIO_GPICR	0x14
80 #define	GPIO_GPIBE	0x18
81 
82 struct qoriq_gpio_irqsrc {
83 	struct intr_irqsrc	isrc;
84 	int			pin;
85 };
86 
87 struct qoriq_gpio_softc {
88 	device_t	dev;
89 	device_t	busdev;
90 	struct mtx	sc_mtx;
91 	struct resource *sc_mem;	/* Memory resource */
92 	struct resource	*sc_intr;
93 	void		*intr_cookie;
94 	struct gpio_pin	 sc_pins[MAXPIN + 1];
95 	struct qoriq_gpio_irqsrc sc_isrcs[MAXPIN + 1];
96 	struct intr_map_data_gpio gdata;
97 };
98 
99 static device_t
100 qoriq_gpio_get_bus(device_t dev)
101 {
102 	struct qoriq_gpio_softc *sc;
103 
104 	sc = device_get_softc(dev);
105 
106 	return (sc->busdev);
107 }
108 
109 static int
110 qoriq_gpio_pin_max(device_t dev, int *maxpin)
111 {
112 
113 	*maxpin = MAXPIN;
114 	return (0);
115 }
116 
117 /* Get a specific pin's capabilities. */
118 static int
119 qoriq_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
120 {
121 	struct qoriq_gpio_softc *sc;
122 
123 	sc = device_get_softc(dev);
124 
125 	if (!VALID_PIN(pin))
126 		return (EINVAL);
127 
128 	GPIO_LOCK(sc);
129 	*caps = sc->sc_pins[pin].gp_caps;
130 	GPIO_UNLOCK(sc);
131 
132 	return (0);
133 }
134 
135 /* Get a specific pin's name. */
136 static int
137 qoriq_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
138 {
139 
140 	if (!VALID_PIN(pin))
141 		return (EINVAL);
142 
143 	snprintf(name, GPIOMAXNAME, "qoriq_gpio%d.%d",
144 	    device_get_unit(dev), pin);
145 	name[GPIOMAXNAME-1] = '\0';
146 
147 	return (0);
148 }
149 
150 static int
151 qoriq_gpio_pin_configure(device_t dev, uint32_t pin, uint32_t flags)
152 {
153 	struct qoriq_gpio_softc *sc;
154 	uint32_t reg;
155 
156 	sc = device_get_softc(dev);
157 
158 	if ((flags & sc->sc_pins[pin].gp_caps) != flags) {
159 		return (EINVAL);
160 	}
161 
162 	if (flags & GPIO_PIN_INPUT) {
163 		reg = bus_read_4(sc->sc_mem, GPIO_GPDIR);
164 		reg &= ~(1 << (31 - pin));
165 		bus_write_4(sc->sc_mem, GPIO_GPDIR, reg);
166 	}
167 	else if (flags & GPIO_PIN_OUTPUT) {
168 		reg = bus_read_4(sc->sc_mem, GPIO_GPDIR);
169 		reg |= (1 << (31 - pin));
170 		bus_write_4(sc->sc_mem, GPIO_GPDIR, reg);
171 		reg = bus_read_4(sc->sc_mem, GPIO_GPODR);
172 		if (flags & GPIO_PIN_OPENDRAIN)
173 			reg |= (1 << (31 - pin));
174 		else
175 			reg &= ~(1 << (31 - pin));
176 		bus_write_4(sc->sc_mem, GPIO_GPODR, reg);
177 	}
178 	sc->sc_pins[pin].gp_flags = flags;
179 
180 	return (0);
181 }
182 
183 /* Set flags for the pin. */
184 static int
185 qoriq_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
186 {
187 	struct qoriq_gpio_softc *sc = device_get_softc(dev);
188 	uint32_t ret;
189 
190 	if (!VALID_PIN(pin))
191 		return (EINVAL);
192 
193 	if ((flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)) ==
194 	    (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT))
195 		return (EINVAL);
196 
197 	GPIO_LOCK(sc);
198 	ret = qoriq_gpio_pin_configure(dev, pin, flags);
199 	GPIO_UNLOCK(sc);
200 	return (0);
201 }
202 
203 static int
204 qoriq_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *pflags)
205 {
206 	struct qoriq_gpio_softc *sc;
207 
208 	if (!VALID_PIN(pin))
209 		return (EINVAL);
210 
211 	sc = device_get_softc(dev);
212 
213 	GPIO_LOCK(sc);
214 	*pflags = sc->sc_pins[pin].gp_flags;
215 	GPIO_UNLOCK(sc);
216 
217 	return (0);
218 }
219 
220 /* Set a specific output pin's value. */
221 static int
222 qoriq_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
223 {
224 	struct qoriq_gpio_softc *sc = device_get_softc(dev);
225 	uint32_t outvals;
226 	uint8_t pinbit;
227 
228 	if (!VALID_PIN(pin) || value > 1)
229 		return (EINVAL);
230 
231 	GPIO_LOCK(sc);
232 	pinbit = 31 - pin;
233 
234 	outvals = bus_read_4(sc->sc_mem, GPIO_GPDAT);
235 	outvals &= ~(1 << pinbit);
236 	outvals |= (value << pinbit);
237 	bus_write_4(sc->sc_mem, GPIO_GPDAT, outvals);
238 
239 	GPIO_UNLOCK(sc);
240 
241 	return (0);
242 }
243 
244 /* Get a specific pin's input value. */
245 static int
246 qoriq_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *value)
247 {
248 	struct qoriq_gpio_softc *sc = device_get_softc(dev);
249 
250 	if (!VALID_PIN(pin))
251 		return (EINVAL);
252 
253 	*value = (bus_read_4(sc->sc_mem, GPIO_GPDAT) >> (31 - pin)) & 1;
254 
255 	return (0);
256 }
257 
258 /* Toggle a pin's output value. */
259 static int
260 qoriq_gpio_pin_toggle(device_t dev, uint32_t pin)
261 {
262 	struct qoriq_gpio_softc *sc = device_get_softc(dev);
263 	uint32_t val;
264 
265 	if (!VALID_PIN(pin))
266 		return (EINVAL);
267 
268 	GPIO_LOCK(sc);
269 
270 	val = bus_read_4(sc->sc_mem, GPIO_GPDAT);
271 	val ^= (1 << (31 - pin));
272 	bus_write_4(sc->sc_mem, GPIO_GPDAT, val);
273 
274 	GPIO_UNLOCK(sc);
275 
276 	return (0);
277 }
278 
279 static void
280 qoriq_gpio_set_intr(struct qoriq_gpio_softc *sc, int pin, bool enable)
281 {
282 	uint32_t reg;
283 
284 	reg = bus_read_4(sc->sc_mem, GPIO_GPIMR);
285 	if (enable)
286 		reg |= BIT(31 - pin);
287 	else
288 		reg &= ~BIT(31 - pin);
289 	bus_write_4(sc->sc_mem, GPIO_GPIMR, reg);
290 }
291 
292 static void
293 qoriq_gpio_ack_intr(struct qoriq_gpio_softc *sc, int pin)
294 {
295 	uint32_t reg;
296 
297 	reg = BIT(31 - pin);
298 	bus_write_4(sc->sc_mem, GPIO_GPIER, reg);
299 }
300 
301 static int
302 qoriq_gpio_intr(void *arg)
303 {
304 	struct qoriq_gpio_softc *sc;
305 	struct trapframe *tf;
306 	uint32_t status;
307 	int pin;
308 
309 	sc = (struct qoriq_gpio_softc *)arg;
310 	tf = curthread->td_intr_frame;
311 
312 	status = bus_read_4(sc->sc_mem, GPIO_GPIER);
313 	status &= bus_read_4(sc->sc_mem, GPIO_GPIMR);
314 	while (status != 0) {
315 		pin = ffs(status) - 1;
316 		status &= ~BIT(pin);
317 		pin = 31 - pin;
318 
319 		if (intr_isrc_dispatch(&sc->sc_isrcs[pin].isrc, tf) != 0) {
320 			GPIO_LOCK(sc);
321 			qoriq_gpio_set_intr(sc, pin, false);
322 			qoriq_gpio_ack_intr(sc, pin);
323 			GPIO_UNLOCK(sc);
324 			device_printf(sc->dev,
325 			    "Masking spurious pin interrupt %d\n",
326 			    pin);
327 		}
328 	}
329 
330 	return (FILTER_HANDLED);
331 }
332 
333 static void
334 qoriq_gpio_disable_intr(device_t dev, struct intr_irqsrc *isrc)
335 {
336 	struct qoriq_gpio_softc *sc;
337 	struct qoriq_gpio_irqsrc *qisrc;
338 
339 	sc = device_get_softc(dev);
340 	qisrc = (struct qoriq_gpio_irqsrc *)isrc;
341 
342 	GPIO_LOCK(sc);
343 	qoriq_gpio_set_intr(sc, qisrc->pin, false);
344 	GPIO_UNLOCK(sc);
345 }
346 
347 static void
348 qoriq_gpio_enable_intr(device_t dev, struct intr_irqsrc *isrc)
349 {
350 	struct qoriq_gpio_softc *sc;
351 	struct qoriq_gpio_irqsrc *qisrc;
352 
353 	sc = device_get_softc(dev);
354 	qisrc = (struct qoriq_gpio_irqsrc *)isrc;
355 
356 	GPIO_LOCK(sc);
357 	qoriq_gpio_set_intr(sc, qisrc->pin, true);
358 	GPIO_UNLOCK(sc);
359 }
360 
361 static struct intr_map_data_gpio*
362 qoriq_gpio_convert_map_data(struct qoriq_gpio_softc *sc, struct intr_map_data *data)
363 {
364 	struct intr_map_data_gpio *gdata;
365 	struct intr_map_data_fdt *daf;
366 
367 	switch (data->type) {
368 	case INTR_MAP_DATA_GPIO:
369 		gdata = (struct intr_map_data_gpio *)data;
370 		break;
371 	case INTR_MAP_DATA_FDT:
372 		daf = (struct intr_map_data_fdt *)data;
373 		if (daf->ncells != 2)
374 			return (NULL);
375 
376 		gdata = &sc->gdata;
377 		gdata->gpio_pin_num = daf->cells[0];
378 		switch (daf->cells[1]) {
379 		case IRQ_TYPE_LEVEL_LOW:
380 			gdata->gpio_intr_mode = GPIO_INTR_LEVEL_LOW;
381 			break;
382 		case IRQ_TYPE_LEVEL_HIGH:
383 			gdata->gpio_intr_mode = GPIO_INTR_LEVEL_HIGH;
384 			break;
385 		case IRQ_TYPE_EDGE_RISING:
386 			gdata->gpio_intr_mode = GPIO_INTR_EDGE_RISING;
387 			break;
388 		case IRQ_TYPE_EDGE_FALLING:
389 			gdata->gpio_intr_mode = GPIO_INTR_EDGE_FALLING;
390 			break;
391 		case IRQ_TYPE_EDGE_BOTH:
392 			gdata->gpio_intr_mode = GPIO_INTR_EDGE_BOTH;
393 			break;
394 		default:
395 			return (NULL);
396 		}
397 		break;
398 	default:
399 		return (NULL);
400 	}
401 
402 	return (gdata);
403 }
404 
405 
406 static int
407 qoriq_gpio_map_intr(device_t dev, struct intr_map_data *data,
408     struct intr_irqsrc **isrcp)
409 {
410 	struct qoriq_gpio_softc *sc;
411 	struct intr_map_data_gpio *gdata;
412 	int pin;
413 
414 	sc = device_get_softc(dev);
415 
416 	gdata = qoriq_gpio_convert_map_data(sc, data);
417 	if (gdata == NULL)
418 		return (EINVAL);
419 
420 	pin = gdata->gpio_pin_num;
421 	if (pin > MAXPIN)
422 		return (EINVAL);
423 
424 	*isrcp = &sc->sc_isrcs[pin].isrc;
425 	return (0);
426 }
427 
428 static int
429 qoriq_gpio_setup_intr(device_t dev, struct intr_irqsrc *isrc,
430     struct resource *res, struct intr_map_data *data)
431 {
432 	struct qoriq_gpio_softc *sc;
433 	struct intr_map_data_gpio *gdata;
434 	struct qoriq_gpio_irqsrc *qisrc;
435 	bool falling;
436 	uint32_t reg;
437 
438 	sc = device_get_softc(dev);
439 	qisrc = (struct qoriq_gpio_irqsrc *)isrc;
440 
441 	gdata = qoriq_gpio_convert_map_data(sc, data);
442 	if (gdata == NULL)
443 		return (EINVAL);
444 
445 	if (gdata->gpio_intr_mode & GPIO_INTR_EDGE_BOTH)
446 		falling = false;
447 	else if (gdata->gpio_intr_mode & GPIO_INTR_EDGE_FALLING)
448 		falling = true;
449 	else
450 		return (EOPNOTSUPP);
451 
452 	GPIO_LOCK(sc);
453 	reg = bus_read_4(sc->sc_mem, GPIO_GPICR);
454 	if (falling)
455 		reg |= BIT(31 - qisrc->pin);
456 	else
457 		reg &= ~BIT(31 - qisrc->pin);
458 	bus_write_4(sc->sc_mem, GPIO_GPICR, reg);
459 	GPIO_UNLOCK(sc);
460 
461 	return (0);
462 }
463 
464 static int
465 qoriq_gpio_teardown_intr(device_t dev, struct intr_irqsrc *isrc,
466     struct resource *res, struct intr_map_data *data)
467 {
468 	struct qoriq_gpio_softc *sc;
469 	struct qoriq_gpio_irqsrc *qisrc;
470 
471 	sc = device_get_softc(dev);
472 	qisrc = (struct qoriq_gpio_irqsrc *)isrc;
473 
474 	if (isrc->isrc_handlers > 0)
475 		return (0);
476 
477 	GPIO_LOCK(sc);
478 	qoriq_gpio_set_intr(sc, qisrc->pin, false);
479 	GPIO_UNLOCK(sc);
480 	return (0);
481 }
482 
483 static void
484 qoriq_gpio_post_filter(device_t dev, struct intr_irqsrc *isrc)
485 {
486 	struct qoriq_gpio_softc *sc;
487 	struct qoriq_gpio_irqsrc *qisrc;
488 
489 	sc = device_get_softc(dev);
490 	qisrc = (struct qoriq_gpio_irqsrc *)isrc;
491 
492 	GPIO_LOCK(sc);
493 	qoriq_gpio_ack_intr(sc, qisrc->pin);
494 	GPIO_UNLOCK(sc);
495 }
496 
497 
498 static void
499 qoriq_gpio_post_ithread(device_t dev, struct intr_irqsrc *isrc)
500 {
501 	struct qoriq_gpio_softc *sc;
502 	struct qoriq_gpio_irqsrc *qisrc;
503 
504 	sc = device_get_softc(dev);
505 	qisrc = (struct qoriq_gpio_irqsrc *)isrc;
506 
507 	GPIO_LOCK(sc);
508 	qoriq_gpio_ack_intr(sc, qisrc->pin);
509 	qoriq_gpio_set_intr(sc, qisrc->pin, true);
510 	GPIO_UNLOCK(sc);
511 }
512 
513 static void
514 qoriq_gpio_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
515 {
516 	struct qoriq_gpio_softc *sc;
517 	struct qoriq_gpio_irqsrc *qisrc;
518 
519 	sc = device_get_softc(dev);
520 	qisrc = (struct qoriq_gpio_irqsrc *)isrc;
521 
522 	GPIO_LOCK(sc);
523 	qoriq_gpio_set_intr(sc, qisrc->pin, false);
524 	GPIO_UNLOCK(sc);
525 }
526 
527 static struct ofw_compat_data gpio_matches[] = {
528     {"fsl,qoriq-gpio", 1},
529     {"fsl,pq3-gpio", 1},
530     {"fsl,mpc8572-gpio", 1},
531     {0, 0}
532 };
533 
534 static int
535 qoriq_gpio_probe(device_t dev)
536 {
537 
538 	if (ofw_bus_search_compatible(dev, gpio_matches)->ocd_data == 0)
539 		return (ENXIO);
540 
541 	device_set_desc(dev, "Freescale QorIQ GPIO driver");
542 
543 	return (0);
544 }
545 
546 static int
547 qoriq_gpio_pin_access_32(device_t dev, uint32_t first_pin, uint32_t clear_pins,
548     uint32_t change_pins, uint32_t *orig_pins)
549 {
550 	struct qoriq_gpio_softc *sc;
551 	uint32_t hwstate;
552 
553 	sc = device_get_softc(dev);
554 
555 	if (first_pin != 0)
556 		return (EINVAL);
557 
558 	GPIO_LOCK(sc);
559 	hwstate = bus_read_4(sc->sc_mem, GPIO_GPDAT);
560 	bus_write_4(sc->sc_mem, GPIO_GPDAT,
561 	    (hwstate & ~clear_pins) ^ change_pins);
562 	GPIO_UNLOCK(sc);
563 
564 	if (orig_pins != NULL)
565 		*orig_pins = hwstate;
566 
567 	return (0);
568 }
569 
570 static int
571 qoriq_gpio_pin_config_32(device_t dev, uint32_t first_pin, uint32_t num_pins,
572     uint32_t *pin_flags)
573 {
574 	uint32_t dir, odr, mask, reg;
575 	struct qoriq_gpio_softc *sc;
576 	uint32_t newflags[32];
577 	int i;
578 
579 	if (first_pin != 0 || !VALID_PIN(num_pins))
580 		return (EINVAL);
581 
582 	sc = device_get_softc(dev);
583 
584 	dir = odr = mask = 0;
585 
586 	for (i = 0; i < num_pins; i++) {
587 		newflags[i] = 0;
588 		mask |= (1 << i);
589 
590 		if (pin_flags[i] & GPIO_PIN_INPUT) {
591 			newflags[i] = GPIO_PIN_INPUT;
592 			dir &= ~(1 << i);
593 		} else {
594 			newflags[i] = GPIO_PIN_OUTPUT;
595 			dir |= (1 << i);
596 
597 			if (pin_flags[i] & GPIO_PIN_OPENDRAIN) {
598 				newflags[i] |= GPIO_PIN_OPENDRAIN;
599 				odr |= (1 << i);
600 			} else {
601 				newflags[i] |= GPIO_PIN_PUSHPULL;
602 				odr &= ~(1 << i);
603 			}
604 		}
605 	}
606 
607 	GPIO_LOCK(sc);
608 
609 	reg = (bus_read_4(sc->sc_mem, GPIO_GPDIR) & ~mask) | dir;
610 	bus_write_4(sc->sc_mem, GPIO_GPDIR, reg);
611 
612 	reg = (bus_read_4(sc->sc_mem, GPIO_GPODR) & ~mask) | odr;
613 	bus_write_4(sc->sc_mem, GPIO_GPODR, reg);
614 
615 	for (i = 0; i < num_pins; i++)
616 		sc->sc_pins[i].gp_flags = newflags[i];
617 
618 	GPIO_UNLOCK(sc);
619 
620 	return (0);
621 }
622 
623 static int
624 qoriq_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent, int gcells,
625     pcell_t *gpios, uint32_t *pin, uint32_t *flags)
626 {
627 	struct qoriq_gpio_softc *sc;
628 	int err;
629 
630 	if (!VALID_PIN(gpios[0]))
631 		return (EINVAL);
632 
633 	sc = device_get_softc(bus);
634 	GPIO_LOCK(sc);
635 	err = qoriq_gpio_pin_configure(bus, gpios[0], gpios[1]);
636 	GPIO_UNLOCK(sc);
637 
638 	if (err == 0) {
639 		*pin = gpios[0];
640 		*flags = gpios[1];
641 	}
642 
643 	return (err);
644 }
645 
646 static int qoriq_gpio_detach(device_t dev);
647 
648 static int
649 qoriq_gpio_attach(device_t dev)
650 {
651 	struct qoriq_gpio_softc *sc = device_get_softc(dev);
652 	int i, rid, error;
653 	const char *name;
654 	intptr_t xref;
655 
656 	sc->dev = dev;
657 
658 	GPIO_LOCK_INIT(sc);
659 
660 	/* Allocate memory. */
661 	rid = 0;
662 	sc->sc_mem = bus_alloc_resource_any(dev,
663 		     SYS_RES_MEMORY, &rid, RF_ACTIVE);
664 	if (sc->sc_mem == NULL) {
665 		device_printf(dev, "Can't allocate memory for device output port");
666 		error = ENOMEM;
667 		goto fail;
668 	}
669 
670 	rid = 0;
671 	sc->sc_intr = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
672 	    RF_ACTIVE | RF_SHAREABLE);
673 	if (sc->sc_intr == NULL) {
674 		device_printf(dev, "Can't allocate interrupt resource.\n");
675 		error = ENOMEM;
676 		goto fail;
677 	}
678 
679 	error = bus_setup_intr(dev, sc->sc_intr, INTR_TYPE_MISC | INTR_MPSAFE,
680 	    qoriq_gpio_intr, NULL, sc, &sc->intr_cookie);
681 	if (error != 0) {
682 		device_printf(dev, "Failed to setup interrupt.\n");
683 		goto fail;
684 	}
685 
686 	name = device_get_nameunit(dev);
687 	for (i = 0; i <= MAXPIN; i++) {
688 		sc->sc_pins[i].gp_caps = DEFAULT_CAPS;
689 		sc->sc_isrcs[i].pin = i;
690 		error = intr_isrc_register(&sc->sc_isrcs[i].isrc,
691 		    dev, 0, "%s,%u", name, i);
692 		if (error != 0)
693 			goto fail;
694 	}
695 
696 	xref = OF_xref_from_node(ofw_bus_get_node(dev));
697 	if (intr_pic_register(dev, xref) == NULL) {
698 		error = ENXIO;
699 		goto fail;
700 	}
701 
702 	sc->busdev = gpiobus_attach_bus(dev);
703 	if (sc->busdev == NULL) {
704 		error = ENXIO;
705 		goto fail;
706 	}
707 	/*
708 	 * Enable the GPIO Input Buffer for all GPIOs.
709 	 * This is safe on devices without a GPIBE register, because those
710 	 * devices ignore writes and read 0's in undefined portions of the map.
711 	 */
712 	if (ofw_bus_is_compatible(dev, "fsl,qoriq-gpio"))
713 		bus_write_4(sc->sc_mem, GPIO_GPIBE, 0xffffffff);
714 
715 	OF_device_register_xref(OF_xref_from_node(ofw_bus_get_node(dev)), dev);
716 
717 	bus_write_4(sc->sc_mem, GPIO_GPIER, 0xffffffff);
718 	bus_write_4(sc->sc_mem, GPIO_GPIMR, 0);
719 
720 	return (0);
721 fail:
722 	qoriq_gpio_detach(dev);
723 	return (error);
724 }
725 
726 static int
727 qoriq_gpio_detach(device_t dev)
728 {
729 	struct qoriq_gpio_softc *sc = device_get_softc(dev);
730 
731 	gpiobus_detach_bus(dev);
732 
733 	if (sc->sc_mem != NULL) {
734 		/* Release output port resource. */
735 		bus_release_resource(dev, SYS_RES_MEMORY,
736 				     rman_get_rid(sc->sc_mem), sc->sc_mem);
737 	}
738 
739 	if (sc->intr_cookie != NULL)
740 		bus_teardown_intr(dev, sc->sc_intr, sc->intr_cookie);
741 
742 	if (sc->sc_intr != NULL)
743 		bus_release_resource(dev, SYS_RES_IRQ,
744 		    rman_get_rid(sc->sc_intr), sc->sc_intr);
745 
746 	GPIO_LOCK_DESTROY(sc);
747 
748 	return (0);
749 }
750 
751 static device_method_t qoriq_gpio_methods[] = {
752 	/* device_if */
753 	DEVMETHOD(device_probe, 	qoriq_gpio_probe),
754 	DEVMETHOD(device_attach, 	qoriq_gpio_attach),
755 	DEVMETHOD(device_detach, 	qoriq_gpio_detach),
756 
757 	/* Bus interface */
758 	DEVMETHOD(bus_setup_intr,		bus_generic_setup_intr),
759 	DEVMETHOD(bus_activate_resource,	bus_generic_activate_resource),
760 	DEVMETHOD(bus_deactivate_resource,	bus_generic_deactivate_resource),
761 
762 	/* GPIO protocol */
763 	DEVMETHOD(gpio_get_bus, 	qoriq_gpio_get_bus),
764 	DEVMETHOD(gpio_pin_max, 	qoriq_gpio_pin_max),
765 	DEVMETHOD(gpio_pin_getname, 	qoriq_gpio_pin_getname),
766 	DEVMETHOD(gpio_pin_getcaps, 	qoriq_gpio_pin_getcaps),
767 	DEVMETHOD(gpio_pin_get, 	qoriq_gpio_pin_get),
768 	DEVMETHOD(gpio_pin_set, 	qoriq_gpio_pin_set),
769 	DEVMETHOD(gpio_pin_getflags, 	qoriq_gpio_pin_getflags),
770 	DEVMETHOD(gpio_pin_setflags, 	qoriq_gpio_pin_setflags),
771 	DEVMETHOD(gpio_pin_toggle, 	qoriq_gpio_pin_toggle),
772 
773 	DEVMETHOD(gpio_map_gpios,	qoriq_gpio_map_gpios),
774 	DEVMETHOD(gpio_pin_access_32,	qoriq_gpio_pin_access_32),
775 	DEVMETHOD(gpio_pin_config_32,	qoriq_gpio_pin_config_32),
776 
777 	/* Interrupt controller */
778 	DEVMETHOD(pic_disable_intr,	qoriq_gpio_disable_intr),
779 	DEVMETHOD(pic_enable_intr,	qoriq_gpio_enable_intr),
780 	DEVMETHOD(pic_map_intr,		qoriq_gpio_map_intr),
781 	DEVMETHOD(pic_setup_intr,	qoriq_gpio_setup_intr),
782 	DEVMETHOD(pic_teardown_intr,	qoriq_gpio_teardown_intr),
783 	DEVMETHOD(pic_post_filter,	qoriq_gpio_post_filter),
784 	DEVMETHOD(pic_post_ithread,	qoriq_gpio_post_ithread),
785 	DEVMETHOD(pic_pre_ithread,	qoriq_gpio_pre_ithread),
786 
787 	DEVMETHOD_END
788 };
789 
790 static driver_t qoriq_gpio_driver = {
791 	"gpio",
792 	qoriq_gpio_methods,
793 	sizeof(struct qoriq_gpio_softc),
794 };
795 static devclass_t qoriq_gpio_devclass;
796 
797 /*
798  * This needs to be loaded after interrupts are available and
799  * before consumers need it.
800  */
801 EARLY_DRIVER_MODULE(qoriq_gpio, simplebus, qoriq_gpio_driver, qoriq_gpio_devclass,
802     NULL, NULL, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
803