1 /* 2 * Copyright (C) 2001 Eduardo Horvath. 3 * All rights reserved. 4 * 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * from: NetBSD: if_gem_pci.c,v 1.7 2001/10/18 15:09:15 thorpej Exp 28 * 29 * $FreeBSD$ 30 */ 31 32 /* 33 * PCI bindings for Sun GEM ethernet controllers. 34 */ 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/bus.h> 39 #include <sys/malloc.h> 40 #include <sys/kernel.h> 41 #include <sys/resource.h> 42 #include <sys/socket.h> 43 44 #include <machine/endian.h> 45 46 #include <net/ethernet.h> 47 #include <net/if.h> 48 #include <net/if_arp.h> 49 #include <net/if_dl.h> 50 #include <net/if_media.h> 51 52 #include <machine/bus.h> 53 #include <machine/resource.h> 54 #include <machine/ofw_machdep.h> 55 56 #include <sys/rman.h> 57 58 #include <dev/mii/mii.h> 59 #include <dev/mii/miivar.h> 60 61 #include <dev/gem/if_gemreg.h> 62 #include <dev/gem/if_gemvar.h> 63 64 #include <dev/pci/pcivar.h> 65 #include <dev/pci/pcireg.h> 66 67 #include "miibus_if.h" 68 69 struct gem_pci_softc { 70 struct gem_softc gsc_gem; /* GEM device */ 71 struct resource *gsc_sres; 72 int gsc_srid; 73 struct resource *gsc_ires; 74 int gsc_irid; 75 void *gsc_ih; 76 }; 77 78 static int gem_pci_probe(device_t); 79 static int gem_pci_attach(device_t); 80 81 82 static device_method_t gem_pci_methods[] = { 83 /* Device interface */ 84 DEVMETHOD(device_probe, gem_pci_probe), 85 DEVMETHOD(device_attach, gem_pci_attach), 86 87 /* bus interface */ 88 DEVMETHOD(bus_print_child, bus_generic_print_child), 89 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 90 91 /* MII interface */ 92 DEVMETHOD(miibus_readreg, gem_mii_readreg), 93 DEVMETHOD(miibus_writereg, gem_mii_writereg), 94 DEVMETHOD(miibus_statchg, gem_mii_statchg), 95 96 { 0, 0 } 97 }; 98 99 static driver_t gem_pci_driver = { 100 "gem", 101 gem_pci_methods, 102 sizeof(struct gem_pci_softc) 103 }; 104 105 106 DRIVER_MODULE(if_gem, pci, gem_pci_driver, gem_devclass, 0, 0); 107 108 struct gem_pci_dev { 109 u_int32_t gpd_devid; 110 char *gpd_desc; 111 } gem_pci_devlist[] = { 112 { 0x1101108e, "Sun ERI 10/100 Ethernet Adaptor" }, 113 { 0x2bad108e, "Sun GEM Gigabit Ethernet Adaptor" }, 114 { 0x0021106b, "Apple GMAC Ethernet Adaptor" }, 115 { 0x0024106b, "Apple GMAC2 Ethernet Adaptor" }, 116 { 0, NULL } 117 }; 118 119 /* 120 * Attach routines need to be split out to different bus-specific files. 121 */ 122 static int 123 gem_pci_probe(dev) 124 device_t dev; 125 { 126 int i; 127 u_int32_t devid; 128 129 devid = pci_get_devid(dev); 130 for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) { 131 if (devid == gem_pci_devlist[i].gpd_devid) { 132 device_set_desc(dev, gem_pci_devlist[i].gpd_desc); 133 return (0); 134 } 135 } 136 137 return (ENXIO); 138 } 139 140 static int 141 gem_pci_attach(dev) 142 device_t dev; 143 { 144 struct gem_pci_softc *gsc = device_get_softc(dev); 145 struct gem_softc *sc = &gsc->gsc_gem; 146 147 /* 148 * Enable bus master and memory access. The firmware does in some 149 * cases not do this for us on sparc64 machines. 150 */ 151 pci_enable_busmaster(dev); 152 pci_enable_io(dev, SYS_RES_MEMORY); 153 154 sc->sc_dev = dev; 155 sc->sc_pci = 1; /* XXX */ 156 157 gsc->gsc_srid = PCI_GEM_BASEADDR; 158 gsc->gsc_sres = bus_alloc_resource(dev, SYS_RES_MEMORY, &gsc->gsc_srid, 159 0, ~0, 1, RF_ACTIVE); 160 if (gsc->gsc_sres == NULL) { 161 device_printf(dev, "failed to allocate bus space resource\n"); 162 return (ENXIO); 163 } 164 165 gsc->gsc_irid = 0; 166 gsc->gsc_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &gsc->gsc_irid, 0, 167 ~0, 1, RF_SHAREABLE | RF_ACTIVE); 168 if (gsc->gsc_ires == NULL) { 169 device_printf(dev, "failed to allocate interrupt resource\n"); 170 goto fail_sres; 171 } 172 173 sc->sc_bustag = rman_get_bustag(gsc->gsc_sres); 174 sc->sc_h = rman_get_bushandle(gsc->gsc_sres); 175 176 /* All platform that this driver is used on must provide this. */ 177 OF_getetheraddr(dev, sc->sc_arpcom.ac_enaddr); 178 179 /* 180 * call the main configure 181 */ 182 if (gem_attach(sc) != 0) { 183 device_printf(dev, "could not be configured\n"); 184 goto fail_ires; 185 } 186 187 if (bus_setup_intr(dev, gsc->gsc_ires, INTR_TYPE_NET, gem_intr, sc, 188 &gsc->gsc_ih) != 0) { 189 device_printf(dev, "failed to set up interrupt\n"); 190 goto fail_ires; 191 } 192 return (0); 193 194 fail_ires: 195 bus_release_resource(dev, SYS_RES_IRQ, gsc->gsc_irid, gsc->gsc_ires); 196 fail_sres: 197 bus_release_resource(dev, SYS_RES_MEMORY, gsc->gsc_srid, gsc->gsc_sres); 198 return (ENXIO); 199 } 200