1 /* 2 * Copyright (C) 2001 Eduardo Horvath. 3 * All rights reserved. 4 * 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * from: NetBSD: if_gem_pci.c,v 1.7 2001/10/18 15:09:15 thorpej Exp 28 * 29 * $FreeBSD$ 30 */ 31 32 /* 33 * PCI bindings for Sun GEM ethernet controllers. 34 */ 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/bus.h> 39 #include <sys/malloc.h> 40 #include <sys/kernel.h> 41 #include <sys/resource.h> 42 #include <sys/socket.h> 43 44 #include <machine/endian.h> 45 46 #include <net/ethernet.h> 47 #include <net/if.h> 48 #include <net/if_arp.h> 49 #include <net/if_dl.h> 50 #include <net/if_media.h> 51 52 #include <machine/bus.h> 53 #include <machine/resource.h> 54 #include <machine/ofw_machdep.h> 55 56 #include <sys/rman.h> 57 58 #include <dev/mii/mii.h> 59 #include <dev/mii/miivar.h> 60 61 #include <dev/gem/if_gemreg.h> 62 #include <dev/gem/if_gemvar.h> 63 64 #include <dev/pci/pcivar.h> 65 #include <dev/pci/pcireg.h> 66 67 #include "miibus_if.h" 68 69 struct gem_pci_softc { 70 struct gem_softc gsc_gem; /* GEM device */ 71 struct resource *gsc_sres; 72 int gsc_srid; 73 struct resource *gsc_ires; 74 int gsc_irid; 75 void *gsc_ih; 76 }; 77 78 static int gem_pci_probe(device_t); 79 static int gem_pci_attach(device_t); 80 static int gem_pci_detach(device_t); 81 static int gem_pci_suspend(device_t); 82 static int gem_pci_resume(device_t); 83 84 static device_method_t gem_pci_methods[] = { 85 /* Device interface */ 86 DEVMETHOD(device_probe, gem_pci_probe), 87 DEVMETHOD(device_attach, gem_pci_attach), 88 DEVMETHOD(device_detach, gem_pci_detach), 89 DEVMETHOD(device_suspend, gem_pci_suspend), 90 DEVMETHOD(device_resume, gem_pci_resume), 91 /* Use the suspend handler here, it is all that is required. */ 92 DEVMETHOD(device_shutdown, gem_pci_suspend), 93 94 /* bus interface */ 95 DEVMETHOD(bus_print_child, bus_generic_print_child), 96 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 97 98 /* MII interface */ 99 DEVMETHOD(miibus_readreg, gem_mii_readreg), 100 DEVMETHOD(miibus_writereg, gem_mii_writereg), 101 DEVMETHOD(miibus_statchg, gem_mii_statchg), 102 103 { 0, 0 } 104 }; 105 106 static driver_t gem_pci_driver = { 107 "gem", 108 gem_pci_methods, 109 sizeof(struct gem_pci_softc) 110 }; 111 112 113 DRIVER_MODULE(gem, pci, gem_pci_driver, gem_devclass, 0, 0); 114 MODULE_DEPEND(gem, pci, 1, 1, 1); 115 MODULE_DEPEND(gem, ether, 1, 1, 1); 116 117 struct gem_pci_dev { 118 u_int32_t gpd_devid; 119 int gpd_variant; 120 char *gpd_desc; 121 } gem_pci_devlist[] = { 122 { 0x1101108e, GEM_SUN_GEM, "Sun ERI 10/100 Ethernet Adaptor" }, 123 { 0x2bad108e, GEM_SUN_GEM, "Sun GEM Gigabit Ethernet Adaptor" }, 124 { 0x0021106b, GEM_APPLE_GMAC, "Apple GMAC Ethernet Adaptor" }, 125 { 0x0024106b, GEM_APPLE_GMAC, "Apple GMAC2 Ethernet Adaptor" }, 126 { 0, NULL } 127 }; 128 129 /* 130 * Attach routines need to be split out to different bus-specific files. 131 */ 132 static int 133 gem_pci_probe(dev) 134 device_t dev; 135 { 136 int i; 137 u_int32_t devid; 138 struct gem_pci_softc *gsc; 139 140 devid = pci_get_devid(dev); 141 for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) { 142 if (devid == gem_pci_devlist[i].gpd_devid) { 143 device_set_desc(dev, gem_pci_devlist[i].gpd_desc); 144 gsc = device_get_softc(dev); 145 gsc->gsc_gem.sc_variant = 146 gem_pci_devlist[i].gpd_variant; 147 return (0); 148 } 149 } 150 151 return (ENXIO); 152 } 153 154 static int 155 gem_pci_attach(dev) 156 device_t dev; 157 { 158 struct gem_pci_softc *gsc = device_get_softc(dev); 159 struct gem_softc *sc = &gsc->gsc_gem; 160 161 pci_enable_busmaster(dev); 162 163 /* 164 * Some Sun GEMs/ERIs do have their intpin register bogusly set to 0, 165 * although it should be 1. correct that. 166 */ 167 if (pci_get_intpin(dev) == 0) 168 pci_set_intpin(dev, 1); 169 170 sc->sc_dev = dev; 171 sc->sc_pci = 1; /* XXX */ 172 173 gsc->gsc_srid = PCI_GEM_BASEADDR; 174 gsc->gsc_sres = bus_alloc_resource(dev, SYS_RES_MEMORY, &gsc->gsc_srid, 175 0, ~0, 1, RF_ACTIVE); 176 if (gsc->gsc_sres == NULL) { 177 device_printf(dev, "failed to allocate bus space resource\n"); 178 return (ENXIO); 179 } 180 181 gsc->gsc_irid = 0; 182 gsc->gsc_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &gsc->gsc_irid, 0, 183 ~0, 1, RF_SHAREABLE | RF_ACTIVE); 184 if (gsc->gsc_ires == NULL) { 185 device_printf(dev, "failed to allocate interrupt resource\n"); 186 goto fail_sres; 187 } 188 189 sc->sc_bustag = rman_get_bustag(gsc->gsc_sres); 190 sc->sc_h = rman_get_bushandle(gsc->gsc_sres); 191 192 /* All platform that this driver is used on must provide this. */ 193 OF_getetheraddr(dev, sc->sc_arpcom.ac_enaddr); 194 195 /* 196 * call the main configure 197 */ 198 if (gem_attach(sc) != 0) { 199 device_printf(dev, "could not be configured\n"); 200 goto fail_ires; 201 } 202 203 if (bus_setup_intr(dev, gsc->gsc_ires, INTR_TYPE_NET, gem_intr, sc, 204 &gsc->gsc_ih) != 0) { 205 device_printf(dev, "failed to set up interrupt\n"); 206 gem_detach(sc); 207 goto fail_ires; 208 } 209 return (0); 210 211 fail_ires: 212 bus_release_resource(dev, SYS_RES_IRQ, gsc->gsc_irid, gsc->gsc_ires); 213 fail_sres: 214 bus_release_resource(dev, SYS_RES_MEMORY, gsc->gsc_srid, gsc->gsc_sres); 215 return (ENXIO); 216 } 217 218 static int 219 gem_pci_detach(dev) 220 device_t dev; 221 { 222 struct gem_pci_softc *gsc = device_get_softc(dev); 223 struct gem_softc *sc = &gsc->gsc_gem; 224 225 gem_detach(sc); 226 227 bus_teardown_intr(dev, gsc->gsc_ires, gsc->gsc_ih); 228 bus_release_resource(dev, SYS_RES_IRQ, gsc->gsc_irid, gsc->gsc_ires); 229 bus_release_resource(dev, SYS_RES_MEMORY, gsc->gsc_srid, gsc->gsc_sres); 230 return (0); 231 } 232 233 static int 234 gem_pci_suspend(dev) 235 device_t dev; 236 { 237 struct gem_pci_softc *gsc = device_get_softc(dev); 238 struct gem_softc *sc = &gsc->gsc_gem; 239 240 gem_suspend(sc); 241 return (0); 242 } 243 244 static int 245 gem_pci_resume(dev) 246 device_t dev; 247 { 248 struct gem_pci_softc *gsc = device_get_softc(dev); 249 struct gem_softc *sc = &gsc->gsc_gem; 250 251 gem_resume(sc); 252 return (0); 253 } 254