xref: /freebsd/sys/dev/gem/if_gem_pci.c (revision b52b9d56d4e96089873a75f9e29062eec19fabba)
1 /*
2  * Copyright (C) 2001 Eduardo Horvath.
3  * All rights reserved.
4  *
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR  ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR  BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  *	from: NetBSD: if_gem_pci.c,v 1.7 2001/10/18 15:09:15 thorpej Exp
28  *
29  * $FreeBSD$
30  */
31 
32 /*
33  * PCI bindings for Sun GEM ethernet controllers.
34  */
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/bus.h>
39 #include <sys/malloc.h>
40 #include <sys/kernel.h>
41 #include <sys/resource.h>
42 #include <sys/socket.h>
43 
44 #include <machine/endian.h>
45 
46 #include <net/ethernet.h>
47 #include <net/if.h>
48 #include <net/if_arp.h>
49 #include <net/if_dl.h>
50 #include <net/if_media.h>
51 
52 #include <machine/bus.h>
53 #include <machine/resource.h>
54 #include <machine/ofw_machdep.h>
55 
56 #include <sys/rman.h>
57 
58 #include <dev/mii/mii.h>
59 #include <dev/mii/miivar.h>
60 
61 #include <dev/gem/if_gemreg.h>
62 #include <dev/gem/if_gemvar.h>
63 
64 #include <dev/pci/pcivar.h>
65 #include <dev/pci/pcireg.h>
66 
67 #include "miibus_if.h"
68 
69 struct gem_pci_softc {
70 	struct	gem_softc	gsc_gem;	/* GEM device */
71 	struct	resource	*gsc_sres;
72 	int			gsc_srid;
73 	struct	resource	*gsc_ires;
74 	int			gsc_irid;
75 	void			*gsc_ih;
76 };
77 
78 static int	gem_pci_probe(device_t);
79 static int	gem_pci_attach(device_t);
80 
81 
82 static device_method_t gem_pci_methods[] = {
83 	/* Device interface */
84 	DEVMETHOD(device_probe,		gem_pci_probe),
85 	DEVMETHOD(device_attach,	gem_pci_attach),
86 
87 	/* bus interface */
88 	DEVMETHOD(bus_print_child,	bus_generic_print_child),
89 	DEVMETHOD(bus_driver_added,	bus_generic_driver_added),
90 
91 	/* MII interface */
92 	DEVMETHOD(miibus_readreg,	gem_mii_readreg),
93 	DEVMETHOD(miibus_writereg,	gem_mii_writereg),
94 	DEVMETHOD(miibus_statchg,	gem_mii_statchg),
95 
96 	{ 0, 0 }
97 };
98 
99 static driver_t gem_pci_driver = {
100 	"gem",
101 	gem_pci_methods,
102 	sizeof(struct gem_pci_softc)
103 };
104 
105 
106 DRIVER_MODULE(if_gem, pci, gem_pci_driver, gem_devclass, 0, 0);
107 
108 struct gem_pci_dev {
109 	u_int32_t	gpd_devid;
110 	int	gpd_variant;
111 	char	*gpd_desc;
112 } gem_pci_devlist[] = {
113 	{ 0x1101108e, GEM_SUN_GEM,	"Sun ERI 10/100 Ethernet Adaptor" },
114 	{ 0x2bad108e, GEM_SUN_GEM,	"Sun GEM Gigabit Ethernet Adaptor" },
115 	{ 0x0021106b, GEM_APPLE_GMAC,	"Apple GMAC Ethernet Adaptor" },
116 	{ 0x0024106b, GEM_APPLE_GMAC,	"Apple GMAC2 Ethernet Adaptor" },
117 	{ 0, NULL }
118 };
119 
120 /*
121  * Attach routines need to be split out to different bus-specific files.
122  */
123 static int
124 gem_pci_probe(dev)
125 	device_t dev;
126 {
127 	int i;
128 	u_int32_t devid;
129 	struct gem_pci_softc *gsc;
130 
131 	devid = pci_get_devid(dev);
132 	for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) {
133 		if (devid == gem_pci_devlist[i].gpd_devid) {
134 			device_set_desc(dev, gem_pci_devlist[i].gpd_desc);
135 			gsc = device_get_softc(dev);
136 			gsc->gsc_gem.sc_variant =
137 			    gem_pci_devlist[i].gpd_variant;
138 			return (0);
139 		}
140 	}
141 
142 	return (ENXIO);
143 }
144 
145 static int
146 gem_pci_attach(dev)
147 	device_t dev;
148 {
149 	struct gem_pci_softc *gsc = device_get_softc(dev);
150 	struct gem_softc *sc = &gsc->gsc_gem;
151 
152 	/*
153 	 * Enable bus master and memory access. The firmware does in some
154 	 * cases not do this for us on sparc64 machines.
155 	 */
156 	pci_enable_busmaster(dev);
157 	pci_enable_io(dev, SYS_RES_MEMORY);
158 
159 	sc->sc_dev = dev;
160 	sc->sc_pci = 1;		/* XXX */
161 
162 	gsc->gsc_srid = PCI_GEM_BASEADDR;
163 	gsc->gsc_sres = bus_alloc_resource(dev, SYS_RES_MEMORY, &gsc->gsc_srid,
164 	    0, ~0, 1, RF_ACTIVE);
165 	if (gsc->gsc_sres == NULL) {
166 		device_printf(dev, "failed to allocate bus space resource\n");
167 		return (ENXIO);
168 	}
169 
170 	gsc->gsc_irid = 0;
171 	gsc->gsc_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &gsc->gsc_irid, 0,
172 	    ~0, 1, RF_SHAREABLE | RF_ACTIVE);
173 	if (gsc->gsc_ires == NULL) {
174 		device_printf(dev, "failed to allocate interrupt resource\n");
175 		goto fail_sres;
176 	}
177 
178 	sc->sc_bustag = rman_get_bustag(gsc->gsc_sres);
179 	sc->sc_h = rman_get_bushandle(gsc->gsc_sres);
180 
181 	/* All platform that this driver is used on must provide this. */
182 	OF_getetheraddr(dev, sc->sc_arpcom.ac_enaddr);
183 
184 	/*
185 	 * call the main configure
186 	 */
187 	if (gem_attach(sc) != 0) {
188 		device_printf(dev, "could not be configured\n");
189 		goto fail_ires;
190 	}
191 
192 	if (bus_setup_intr(dev, gsc->gsc_ires, INTR_TYPE_NET, gem_intr, sc,
193 	    &gsc->gsc_ih) != 0) {
194 		device_printf(dev, "failed to set up interrupt\n");
195 		goto fail_ires;
196 	}
197 	return (0);
198 
199 fail_ires:
200 	bus_release_resource(dev, SYS_RES_IRQ, gsc->gsc_irid, gsc->gsc_ires);
201 fail_sres:
202 	bus_release_resource(dev, SYS_RES_MEMORY, gsc->gsc_srid, gsc->gsc_sres);
203 	return (ENXIO);
204 }
205