1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (C) 2001 Eduardo Horvath. 5 * Copyright (c) 2007 Marius Strobl <marius@FreeBSD.org> 6 * All rights reserved. 7 * 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * from: NetBSD: if_gem_pci.c,v 1.7 2001/10/18 15:09:15 thorpej Exp 31 */ 32 33 #include <sys/cdefs.h> 34 /* 35 * PCI bindings for Apple GMAC and Sun GEM Ethernet controllers 36 */ 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/bus.h> 41 #include <sys/kernel.h> 42 #include <sys/lock.h> 43 #include <sys/module.h> 44 #include <sys/mutex.h> 45 #include <sys/resource.h> 46 #include <sys/rman.h> 47 #include <sys/socket.h> 48 49 #include <net/ethernet.h> 50 #include <net/if.h> 51 52 #include <machine/bus.h> 53 #if defined(__powerpc__) 54 #include <dev/ofw/ofw_bus.h> 55 #include <dev/ofw/openfirm.h> 56 #include <machine/ofw_machdep.h> 57 #endif 58 #include <machine/resource.h> 59 60 #include <dev/gem/if_gemreg.h> 61 #include <dev/gem/if_gemvar.h> 62 63 #include <dev/pci/pcireg.h> 64 #include <dev/pci/pcivar.h> 65 66 #include "miibus_if.h" 67 68 static int gem_pci_attach(device_t dev); 69 static int gem_pci_detach(device_t dev); 70 static int gem_pci_probe(device_t dev); 71 static int gem_pci_resume(device_t dev); 72 static int gem_pci_suspend(device_t dev); 73 74 static const struct gem_pci_dev { 75 uint32_t gpd_devid; 76 int gpd_variant; 77 const char *gpd_desc; 78 } gem_pci_devlist[] = { 79 { 0x2bad108e, GEM_SUN_GEM, "Sun GEM Gigabit Ethernet" }, 80 { 0x0021106b, GEM_APPLE_GMAC, "Apple UniNorth GMAC Ethernet" }, 81 { 0x0024106b, GEM_APPLE_GMAC, "Apple Pangea GMAC Ethernet" }, 82 { 0x0032106b, GEM_APPLE_GMAC, "Apple UniNorth2 GMAC Ethernet" }, 83 { 0x004c106b, GEM_APPLE_K2_GMAC,"Apple K2 GMAC Ethernet" }, 84 { 0x0051106b, GEM_APPLE_GMAC, "Apple Shasta GMAC Ethernet" }, 85 { 0x006b106b, GEM_APPLE_GMAC, "Apple Intrepid 2 GMAC Ethernet" }, 86 { 0, 0, NULL } 87 }; 88 89 static device_method_t gem_pci_methods[] = { 90 /* Device interface */ 91 DEVMETHOD(device_probe, gem_pci_probe), 92 DEVMETHOD(device_attach, gem_pci_attach), 93 DEVMETHOD(device_detach, gem_pci_detach), 94 DEVMETHOD(device_suspend, gem_pci_suspend), 95 DEVMETHOD(device_resume, gem_pci_resume), 96 /* Use the suspend handler here, it is all that is required. */ 97 DEVMETHOD(device_shutdown, gem_pci_suspend), 98 99 /* MII interface */ 100 DEVMETHOD(miibus_readreg, gem_mii_readreg), 101 DEVMETHOD(miibus_writereg, gem_mii_writereg), 102 DEVMETHOD(miibus_statchg, gem_mii_statchg), 103 104 DEVMETHOD_END 105 }; 106 107 static driver_t gem_pci_driver = { 108 "gem", 109 gem_pci_methods, 110 sizeof(struct gem_softc) 111 }; 112 113 DRIVER_MODULE(gem, pci, gem_pci_driver, 0, 0); 114 MODULE_PNP_INFO("W32:vendor/device", pci, gem, gem_pci_devlist, 115 nitems(gem_pci_devlist) - 1); 116 MODULE_DEPEND(gem, pci, 1, 1, 1); 117 MODULE_DEPEND(gem, ether, 1, 1, 1); 118 119 static int 120 gem_pci_probe(device_t dev) 121 { 122 int i; 123 124 for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) { 125 if (pci_get_devid(dev) == gem_pci_devlist[i].gpd_devid) { 126 device_set_desc(dev, gem_pci_devlist[i].gpd_desc); 127 return (BUS_PROBE_DEFAULT); 128 } 129 } 130 131 return (ENXIO); 132 } 133 134 static struct resource_spec gem_pci_res_spec[] = { 135 { SYS_RES_IRQ, 0, RF_SHAREABLE | RF_ACTIVE }, /* GEM_RES_INTR */ 136 { SYS_RES_MEMORY, PCIR_BAR(0), RF_ACTIVE }, /* GEM_RES_MEM */ 137 { -1, 0 } 138 }; 139 140 #define GEM_SHARED_PINS "shared-pins" 141 #define GEM_SHARED_PINS_SERDES "serdes" 142 143 static int 144 gem_pci_attach(device_t dev) 145 { 146 struct gem_softc *sc; 147 int i; 148 #if defined(__powerpc__) 149 char buf[sizeof(GEM_SHARED_PINS)]; 150 #else 151 int j; 152 #endif 153 154 sc = device_get_softc(dev); 155 sc->sc_variant = GEM_UNKNOWN; 156 for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) { 157 if (pci_get_devid(dev) == gem_pci_devlist[i].gpd_devid) { 158 sc->sc_variant = gem_pci_devlist[i].gpd_variant; 159 break; 160 } 161 } 162 if (sc->sc_variant == GEM_UNKNOWN) { 163 device_printf(dev, "unknown adaptor\n"); 164 return (ENXIO); 165 } 166 167 pci_enable_busmaster(dev); 168 169 sc->sc_dev = dev; 170 171 if (bus_alloc_resources(dev, gem_pci_res_spec, sc->sc_res)) { 172 device_printf(dev, "failed to allocate resources\n"); 173 bus_release_resources(dev, gem_pci_res_spec, sc->sc_res); 174 return (ENXIO); 175 } 176 177 GEM_LOCK_INIT(sc, device_get_nameunit(dev)); 178 179 /* Determine whether we're running at 66MHz. */ 180 if ((GEM_READ_4(sc, GEM_PCI_BIF_CONFIG) & GEM_PCI_BIF_CNF_M66EN) != 0) 181 sc->sc_flags |= GEM_PCI66; 182 183 #if defined(__powerpc__) 184 OF_getetheraddr(dev, sc->sc_enaddr); 185 if (OF_getprop(ofw_bus_get_node(dev), GEM_SHARED_PINS, buf, 186 sizeof(buf)) > 0) { 187 buf[sizeof(buf) - 1] = '\0'; 188 if (strcmp(buf, GEM_SHARED_PINS_SERDES) == 0) 189 sc->sc_flags |= GEM_SERDES; 190 } 191 #else 192 /* 193 * Dig out VPD (vital product data) and read NA (network address). 194 * The VPD resides in the PCI Expansion ROM (PCI FCode) and can't 195 * be accessed via the PCI capability pointer. 196 * ``Writing FCode 3.x Programs'' (newer ones, dated 1997 and later) 197 * chapter 2 describes the data structure. 198 */ 199 200 #define PCI_ROMHDR_SIZE 0x1c 201 #define PCI_ROMHDR_SIG 0x00 202 #define PCI_ROMHDR_SIG_MAGIC 0xaa55 /* little endian */ 203 #define PCI_ROMHDR_PTR_DATA 0x18 204 #define PCI_ROM_SIZE 0x18 205 #define PCI_ROM_SIG 0x00 206 #define PCI_ROM_SIG_MAGIC 0x52494350 /* "PCIR", endian */ 207 /* reversed */ 208 #define PCI_ROM_VENDOR 0x04 209 #define PCI_ROM_DEVICE 0x06 210 #define PCI_ROM_PTR_VPD 0x08 211 #define PCI_VPDRES_BYTE0 0x00 212 #define PCI_VPDRES_ISLARGE(x) ((x) & 0x80) 213 #define PCI_VPDRES_LARGE_NAME(x) ((x) & 0x7f) 214 #define PCI_VPDRES_LARGE_LEN_LSB 0x01 215 #define PCI_VPDRES_LARGE_LEN_MSB 0x02 216 #define PCI_VPDRES_LARGE_SIZE 0x03 217 #define PCI_VPDRES_TYPE_VPD 0x10 /* large */ 218 #define PCI_VPD_KEY0 0x00 219 #define PCI_VPD_KEY1 0x01 220 #define PCI_VPD_LEN 0x02 221 #define PCI_VPD_SIZE 0x03 222 223 #define GEM_ROM_READ_1(sc, offs) \ 224 GEM_READ_1((sc), GEM_PCI_ROM_OFFSET + (offs)) 225 #define GEM_ROM_READ_2(sc, offs) \ 226 GEM_READ_2((sc), GEM_PCI_ROM_OFFSET + (offs)) 227 #define GEM_ROM_READ_4(sc, offs) \ 228 GEM_READ_4((sc), GEM_PCI_ROM_OFFSET + (offs)) 229 230 /* Read PCI Expansion ROM header. */ 231 if (GEM_ROM_READ_2(sc, PCI_ROMHDR_SIG) != PCI_ROMHDR_SIG_MAGIC || 232 (i = GEM_ROM_READ_2(sc, PCI_ROMHDR_PTR_DATA)) < 233 PCI_ROMHDR_SIZE) { 234 device_printf(dev, "unexpected PCI Expansion ROM header\n"); 235 goto fail; 236 } 237 238 /* Read PCI Expansion ROM data. */ 239 if (GEM_ROM_READ_4(sc, i + PCI_ROM_SIG) != PCI_ROM_SIG_MAGIC || 240 GEM_ROM_READ_2(sc, i + PCI_ROM_VENDOR) != pci_get_vendor(dev) || 241 GEM_ROM_READ_2(sc, i + PCI_ROM_DEVICE) != pci_get_device(dev) || 242 (j = GEM_ROM_READ_2(sc, i + PCI_ROM_PTR_VPD)) < 243 i + PCI_ROM_SIZE) { 244 device_printf(dev, "unexpected PCI Expansion ROM data\n"); 245 goto fail; 246 } 247 248 /* 249 * Read PCI VPD. 250 * SUNW,pci-gem cards have a single large resource VPD-R tag 251 * containing one NA. The VPD used is not in PCI 2.2 standard 252 * format however. The length in the resource header is in big 253 * endian and the end tag is non-standard (0x79) and followed 254 * by an all-zero "checksum" byte. Sun calls this a "Fresh 255 * Choice Ethernet" VPD... 256 */ 257 if (PCI_VPDRES_ISLARGE(GEM_ROM_READ_1(sc, 258 j + PCI_VPDRES_BYTE0)) == 0 || 259 PCI_VPDRES_LARGE_NAME(GEM_ROM_READ_1(sc, 260 j + PCI_VPDRES_BYTE0)) != PCI_VPDRES_TYPE_VPD || 261 ((GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_LEN_LSB) << 8) | 262 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_LEN_MSB)) != 263 PCI_VPD_SIZE + ETHER_ADDR_LEN || 264 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_KEY0) != 265 0x4e /* N */ || 266 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_KEY1) != 267 0x41 /* A */ || 268 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_LEN) != 269 ETHER_ADDR_LEN || 270 GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_SIZE + 271 ETHER_ADDR_LEN) != 0x79) { 272 device_printf(dev, "unexpected PCI VPD\n"); 273 goto fail; 274 } 275 bus_read_region_1(sc->sc_res[GEM_RES_MEM], 276 GEM_PCI_ROM_OFFSET + j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_SIZE, 277 sc->sc_enaddr, ETHER_ADDR_LEN); 278 #endif 279 /* 280 * The Xserve G5 has a fake GMAC with an all-zero MAC address. 281 * Check for this, and don't attach in this case. 282 */ 283 284 for (i = 0; i < ETHER_ADDR_LEN && sc->sc_enaddr[i] == 0; i++) {} 285 if (i == ETHER_ADDR_LEN) { 286 device_printf(dev, "invalid MAC address\n"); 287 goto fail; 288 } 289 290 if (gem_attach(sc) != 0) { 291 device_printf(dev, "could not be attached\n"); 292 goto fail; 293 } 294 295 if (bus_setup_intr(dev, sc->sc_res[GEM_RES_INTR], INTR_TYPE_NET | 296 INTR_MPSAFE, NULL, gem_intr, sc, &sc->sc_ih) != 0) { 297 device_printf(dev, "failed to set up interrupt\n"); 298 gem_detach(sc); 299 goto fail; 300 } 301 return (0); 302 303 fail: 304 GEM_LOCK_DESTROY(sc); 305 bus_release_resources(dev, gem_pci_res_spec, sc->sc_res); 306 return (ENXIO); 307 } 308 309 static int 310 gem_pci_detach(device_t dev) 311 { 312 struct gem_softc *sc; 313 314 sc = device_get_softc(dev); 315 bus_teardown_intr(dev, sc->sc_res[GEM_RES_INTR], sc->sc_ih); 316 gem_detach(sc); 317 GEM_LOCK_DESTROY(sc); 318 bus_release_resources(dev, gem_pci_res_spec, sc->sc_res); 319 return (0); 320 } 321 322 static int 323 gem_pci_suspend(device_t dev) 324 { 325 326 gem_suspend(device_get_softc(dev)); 327 return (0); 328 } 329 330 static int 331 gem_pci_resume(device_t dev) 332 { 333 334 gem_resume(device_get_softc(dev)); 335 return (0); 336 } 337