xref: /freebsd/sys/dev/fxp/rcvbundl.h (revision f5147e312f43a9050468de539aeafa072caa1a60)
1 /*-
2 SPDX-License-Identifier: BSD-3-Clause
3 
4 Copyright (c) 1999-2001, Intel Corporation
5 
6 All rights reserved.
7 
8 Redistribution and use in source and binary forms, with or without
9 modification, are permitted provided that the following conditions are met:
10 
11  1. Redistributions of source code must retain the above copyright notice,
12     this list of conditions and the following disclaimer.
13 
14  2. Redistributions in binary form must reproduce the above copyright notice,
15     this list of conditions and the following disclaimer in the documentation
16     and/or other materials provided with the distribution.
17 
18  3. Neither the name of Intel Corporation nor the names of its contributors
19     may be used to endorse or promote products derived from this software
20     without specific prior written permission.
21 
22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 DISCLAIMED. IN NO EVENT SHALL CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
28 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
29 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
30 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
31 EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33 /*
34  * $FreeBSD$
35  */
36 /*
37 rcvbundl.h
38 
39 Author:  Patrick J Luhmann (PJL)
40 Date:    05/30/2000
41 Version: 3.28
42 
43 This file contains the loadable micro code arrays to implement receive bundling on the
44 D101 A-step, D101 B-step, D101M (B-step only), D101S, D102 B-step,
45 D102 B-step with TCO work around, D102 C-step and D102 E-step.
46 
47 Each controller has its own specific micro code array.  The array for one controller
48 is totally incompatible with any other controller, and if used will most likely
49 cause the controller to lock up and stop responding to the driver.  Each micro
50 code array has its own parameter offsets (described below), and they each have
51 their own version number (which should not be confused with the version of the
52 rcvbundl.h file given above).
53 
54 */
55 
56 
57 
58 /*************************************************************************
59 *  CPUSaver parameters
60 *
61 *  All CPUSaver parameters are 16-bit literals that are part of a
62 *  "move immediate value" instruction.  By changing the value of
63 *  the literal in the instruction before the code is loaded, the
64 *  driver can change algorithm.
65 *
66 *  CPUSAVER_DWORD - This is the location of the instruction that loads
67 *    the dead-man timer with its initial value.  By writing a 16-bit
68 *    value to the low word of this instruction, the driver can change
69 *    the timer value.  The current default is either x600 or x800;
70 *    experiments show that the value probably should stay within the
71 *    range of x200 - x1000.
72 *
73 *  CPUSAVER_BUNDLE_MAX_DWORD - This is the location of the instruction
74 *    that sets the maximum number of frames that will be bundled.  In
75 *    some situations, such as the TCP windowing algorithm, it may be
76 *    better to limit the growth of the bundle size than let it go as
77 *    high as it can, because that could cause too much added latency.
78 *    The default is six, because this is the number of packets in the
79 *    default TCP window size.  A value of 1 would make CPUSaver indicate
80 *    an interrupt for every frame received.  If you do not want to put
81 *    a limit on the bundle size, set this value to xFFFF.
82 *
83 *  CPUSAVER_MIN_SIZE_DWORD - This is the location of the instruction
84 *    that contains a bit-mask describing the minimum size frame that
85 *    will be bundled.  The default masks the lower 7 bits, which means
86 *    that any frame less than 128 bytes in length will not be bundled,
87 *    but will instead immediately generate an interrupt.  This does
88 *    not affect the current bundle in any way.  Any frame that is 128
89 *    bytes or large will be bundled normally.  This feature is meant
90 *    to provide immediate indication of ACK frames in a TCP environment.
91 *    Customers were seeing poor performance when a machine with CPUSaver
92 *    enabled was sending but not receiving.  The delay introduced when
93 *    the ACKs were received was enough to reduce total throughput, because
94 *    the sender would sit idle until the ACK was finally seen.
95 *
96 *    The current default is 0xFF80, which masks out the lower 7 bits.
97 *    This means that any frame which is x7F (127) bytes or smaller
98 *    will cause an immediate interrupt.  Because this value must be a
99 *    bit mask, there are only a few valid values that can be used.  To
100 *    turn this feature off, the driver can write the value xFFFF to the
101 *    lower word of this instruction (in the same way that the other
102 *    parameters are used).  Likewise, a value of 0xF800 (2047) would
103 *    cause an interrupt to be generated for every frame, because all
104 *    standard Ethernet frames are <= 2047 bytes in length.
105 *************************************************************************/
106 
107 
108 
109 /********************************************************/
110 /*  CPUSaver micro code for the D101A                   */
111 /********************************************************/
112 
113 /*  Version 2.0  */
114 
115 /*  This value is the same for both A and B step of 558.  */
116 #define D101_CPUSAVER_DWORD         72
117 
118 
119 #define     D101_A_RCVBUNDLE_UCODE \
120 {\
121 0x03B301BB, \
122 0x0046FFFF, \
123 0xFFFFFFFF, \
124 0x051DFFFF, \
125 0xFFFFFFFF, \
126 0xFFFFFFFF, \
127 0x000C0001, \
128 0x00101212, \
129 0x000C0008, \
130 0x003801BC, \
131 0x00000000, \
132 0x00124818, \
133 0x000C1000, \
134 0x00220809, \
135 0x00010200, \
136 0x00124818, \
137 0x000CFFFC, \
138 0x003803B5, \
139 0x00000000, \
140 0x00000000, \
141 0x00000000, \
142 0x00000000, \
143 0x0010009C, \
144 0x0024B81D, \
145 0x00130836, \
146 0x000C0001, \
147 0x0026081C, \
148 0x0020C81B, \
149 0x00130824, \
150 0x00222819, \
151 0x00101213, \
152 0x00041000, \
153 0x003A03B3, \
154 0x00010200, \
155 0x00101B13, \
156 0x00238081, \
157 0x00213049, \
158 0x0038003B, \
159 0x00000000, \
160 0x00000000, \
161 0x00000000, \
162 0x00000000, \
163 0x00000000, \
164 0x00000000, \
165 0x00000000, \
166 0x00000000, \
167 0x00000000, \
168 0x00000000, \
169 0x00000000, \
170 0x00000000, \
171 0x00000000, \
172 0x00000000, \
173 0x00000000, \
174 0x00000000, \
175 0x0010009C, \
176 0x0024B83E, \
177 0x00130826, \
178 0x000C0001, \
179 0x0026083B, \
180 0x00010200, \
181 0x00134824, \
182 0x000C0001, \
183 0x00101213, \
184 0x00041000, \
185 0x0038051E, \
186 0x00101313, \
187 0x00010400, \
188 0x00380521, \
189 0x00050600, \
190 0x00100824, \
191 0x00101310, \
192 0x00041000, \
193 0x00080600, \
194 0x00101B10, \
195 0x0038051E, \
196 0x00000000, \
197 0x00000000, \
198 0x00000000, \
199 0x00000000, \
200 0x00000000, \
201 0x00000000, \
202 0x00000000, \
203 0x00000000, \
204 0x00000000, \
205 0x00000000, \
206 0x00000000, \
207 0x00000000, \
208 0x00000000, \
209 0x00000000, \
210 0x00000000, \
211 0x00000000, \
212 0x00000000, \
213 0x00000000, \
214 0x00000000, \
215 0x00000000, \
216 0x00000000, \
217 0x00000000, \
218 0x00000000, \
219 0x00000000, \
220 0x00000000, \
221 0x00000000, \
222 0x00000000, \
223 }
224 
225 
226 /********************************************************/
227 /*  CPUSaver micro code for the D101B                   */
228 /********************************************************/
229 
230 /*  Version 2.0  */
231 
232 #define     D101_B0_RCVBUNDLE_UCODE \
233 {\
234 0x03B401BC, \
235 0x0047FFFF, \
236 0xFFFFFFFF, \
237 0x051EFFFF, \
238 0xFFFFFFFF, \
239 0xFFFFFFFF, \
240 0x000C0001, \
241 0x00101B92, \
242 0x000C0008, \
243 0x003801BD, \
244 0x00000000, \
245 0x00124818, \
246 0x000C1000, \
247 0x00220809, \
248 0x00010200, \
249 0x00124818, \
250 0x000CFFFC, \
251 0x003803B6, \
252 0x00000000, \
253 0x00000000, \
254 0x00000000, \
255 0x00000000, \
256 0x0010009C, \
257 0x0024B81D, \
258 0x0013082F, \
259 0x000C0001, \
260 0x0026081C, \
261 0x0020C81B, \
262 0x00130837, \
263 0x00222819, \
264 0x00101B93, \
265 0x00041000, \
266 0x003A03B4, \
267 0x00010200, \
268 0x00101793, \
269 0x00238082, \
270 0x0021304A, \
271 0x0038003C, \
272 0x00000000, \
273 0x00000000, \
274 0x00000000, \
275 0x00000000, \
276 0x00000000, \
277 0x00000000, \
278 0x00000000, \
279 0x00000000, \
280 0x00000000, \
281 0x00000000, \
282 0x00000000, \
283 0x00000000, \
284 0x00000000, \
285 0x00000000, \
286 0x00000000, \
287 0x00000000, \
288 0x0010009C, \
289 0x0024B83E, \
290 0x00130826, \
291 0x000C0001, \
292 0x0026083B, \
293 0x00010200, \
294 0x00134837, \
295 0x000C0001, \
296 0x00101B93, \
297 0x00041000, \
298 0x0038051F, \
299 0x00101313, \
300 0x00010400, \
301 0x00380522, \
302 0x00050600, \
303 0x00100837, \
304 0x00101310, \
305 0x00041000, \
306 0x00080600, \
307 0x00101790, \
308 0x0038051F, \
309 0x00000000, \
310 0x00000000, \
311 0x00000000, \
312 0x00000000, \
313 0x00000000, \
314 0x00000000, \
315 0x00000000, \
316 0x00000000, \
317 0x00000000, \
318 0x00000000, \
319 0x00000000, \
320 0x00000000, \
321 0x00000000, \
322 0x00000000, \
323 0x00000000, \
324 0x00000000, \
325 0x00000000, \
326 0x00000000, \
327 0x00000000, \
328 0x00000000, \
329 0x00000000, \
330 0x00000000, \
331 0x00000000, \
332 0x00000000, \
333 0x00000000, \
334 0x00000000, \
335 0x00000000, \
336 }
337 
338 
339 /********************************************************/
340 /*  CPUSaver micro code for the D101M (B-step only)     */
341 /********************************************************/
342 
343 /*  Version 2.10  */
344 
345 /*  Parameter values for the D101M B-step  */
346 #define D101M_CPUSAVER_DWORD                78
347 #define D101M_CPUSAVER_BUNDLE_MAX_DWORD     65
348 #define D101M_CPUSAVER_MIN_SIZE_DWORD       126
349 
350 
351 #define D101M_B_RCVBUNDLE_UCODE \
352 {\
353 0x00550215, \
354 0xFFFF0437, \
355 0xFFFFFFFF, \
356 0x06A70789, \
357 0xFFFFFFFF, \
358 0x0558FFFF, \
359 0x000C0001, \
360 0x00101312, \
361 0x000C0008, \
362 0x00380216, \
363 0x0010009C, \
364 0x00204056, \
365 0x002380CC, \
366 0x00380056, \
367 0x0010009C, \
368 0x00244C0B, \
369 0x00000800, \
370 0x00124818, \
371 0x00380438, \
372 0x00000000, \
373 0x00140000, \
374 0x00380555, \
375 0x00308000, \
376 0x00100662, \
377 0x00100561, \
378 0x000E0408, \
379 0x00134861, \
380 0x000C0002, \
381 0x00103093, \
382 0x00308000, \
383 0x00100624, \
384 0x00100561, \
385 0x000E0408, \
386 0x00100861, \
387 0x000C007E, \
388 0x00222C21, \
389 0x000C0002, \
390 0x00103093, \
391 0x00380C7A, \
392 0x00080000, \
393 0x00103090, \
394 0x00380C7A, \
395 0x00000000, \
396 0x00000000, \
397 0x00000000, \
398 0x00000000, \
399 0x0010009C, \
400 0x00244C2D, \
401 0x00010004, \
402 0x00041000, \
403 0x003A0437, \
404 0x00044010, \
405 0x0038078A, \
406 0x00000000, \
407 0x00100099, \
408 0x00206C7A, \
409 0x0010009C, \
410 0x00244C48, \
411 0x00130824, \
412 0x000C0001, \
413 0x00101213, \
414 0x00260C75, \
415 0x00041000, \
416 0x00010004, \
417 0x00130826, \
418 0x000C0006, \
419 0x002206A8, \
420 0x0013C926, \
421 0x00101313, \
422 0x003806A8, \
423 0x00000000, \
424 0x00000000, \
425 0x00000000, \
426 0x00000000, \
427 0x00000000, \
428 0x00000000, \
429 0x00000000, \
430 0x00000000, \
431 0x00080600, \
432 0x00101B10, \
433 0x00050004, \
434 0x00100826, \
435 0x00101210, \
436 0x00380C34, \
437 0x00000000, \
438 0x00000000, \
439 0x0021155B, \
440 0x00100099, \
441 0x00206559, \
442 0x0010009C, \
443 0x00244559, \
444 0x00130836, \
445 0x000C0000, \
446 0x00220C62, \
447 0x000C0001, \
448 0x00101B13, \
449 0x00229C0E, \
450 0x00210C0E, \
451 0x00226C0E, \
452 0x00216C0E, \
453 0x0022FC0E, \
454 0x00215C0E, \
455 0x00214C0E, \
456 0x00380555, \
457 0x00010004, \
458 0x00041000, \
459 0x00278C67, \
460 0x00040800, \
461 0x00018100, \
462 0x003A0437, \
463 0x00130826, \
464 0x000C0001, \
465 0x00220559, \
466 0x00101313, \
467 0x00380559, \
468 0x00000000, \
469 0x00000000, \
470 0x00000000, \
471 0x00000000, \
472 0x00000000, \
473 0x00000000, \
474 0x00000000, \
475 0x00000000, \
476 0x00130831, \
477 0x0010090B, \
478 0x00124813, \
479 0x000CFF80, \
480 0x002606AB, \
481 0x00041000, \
482 0x003806A8, \
483 0x00000000, \
484 0x00000000, \
485 0x00000000, \
486 0x00000000, \
487 }
488 
489 
490 /********************************************************/
491 /*  CPUSaver micro code for the D101S                   */
492 /********************************************************/
493 
494 /*  Version 1.20  */
495 
496 /*  Parameter values for the D101S  */
497 #define D101S_CPUSAVER_DWORD                78
498 #define D101S_CPUSAVER_BUNDLE_MAX_DWORD     67
499 #define D101S_CPUSAVER_MIN_SIZE_DWORD       129
500 
501 
502 #define D101S_RCVBUNDLE_UCODE \
503 {\
504 0x00550242, \
505 0xFFFF047E, \
506 0xFFFFFFFF, \
507 0x06FF0818, \
508 0xFFFFFFFF, \
509 0x05A6FFFF, \
510 0x000C0001, \
511 0x00101312, \
512 0x000C0008, \
513 0x00380243, \
514 0x0010009C, \
515 0x00204056, \
516 0x002380D0, \
517 0x00380056, \
518 0x0010009C, \
519 0x00244F8B, \
520 0x00000800, \
521 0x00124818, \
522 0x0038047F, \
523 0x00000000, \
524 0x00140000, \
525 0x003805A3, \
526 0x00308000, \
527 0x00100610, \
528 0x00100561, \
529 0x000E0408, \
530 0x00134861, \
531 0x000C0002, \
532 0x00103093, \
533 0x00308000, \
534 0x00100624, \
535 0x00100561, \
536 0x000E0408, \
537 0x00100861, \
538 0x000C007E, \
539 0x00222FA1, \
540 0x000C0002, \
541 0x00103093, \
542 0x00380F90, \
543 0x00080000, \
544 0x00103090, \
545 0x00380F90, \
546 0x00000000, \
547 0x00000000, \
548 0x00000000, \
549 0x00000000, \
550 0x0010009C, \
551 0x00244FAD, \
552 0x00010004, \
553 0x00041000, \
554 0x003A047E, \
555 0x00044010, \
556 0x00380819, \
557 0x00000000, \
558 0x00100099, \
559 0x00206FFD, \
560 0x0010009A, \
561 0x0020AFFD, \
562 0x0010009C, \
563 0x00244FC8, \
564 0x00130824, \
565 0x000C0001, \
566 0x00101213, \
567 0x00260FF8, \
568 0x00041000, \
569 0x00010004, \
570 0x00130826, \
571 0x000C0006, \
572 0x00220700, \
573 0x0013C926, \
574 0x00101313, \
575 0x00380700, \
576 0x00000000, \
577 0x00000000, \
578 0x00000000, \
579 0x00000000, \
580 0x00000000, \
581 0x00000000, \
582 0x00080600, \
583 0x00101B10, \
584 0x00050004, \
585 0x00100826, \
586 0x00101210, \
587 0x00380FB6, \
588 0x00000000, \
589 0x00000000, \
590 0x002115A9, \
591 0x00100099, \
592 0x002065A7, \
593 0x0010009A, \
594 0x0020A5A7, \
595 0x0010009C, \
596 0x002445A7, \
597 0x00130836, \
598 0x000C0000, \
599 0x00220FE4, \
600 0x000C0001, \
601 0x00101B13, \
602 0x00229F8E, \
603 0x00210F8E, \
604 0x00226F8E, \
605 0x00216F8E, \
606 0x0022FF8E, \
607 0x00215F8E, \
608 0x00214F8E, \
609 0x003805A3, \
610 0x00010004, \
611 0x00041000, \
612 0x00278FE9, \
613 0x00040800, \
614 0x00018100, \
615 0x003A047E, \
616 0x00130826, \
617 0x000C0001, \
618 0x002205A7, \
619 0x00101313, \
620 0x003805A7, \
621 0x00000000, \
622 0x00000000, \
623 0x00000000, \
624 0x00000000, \
625 0x00000000, \
626 0x00000000, \
627 0x00000000, \
628 0x00000000, \
629 0x00000000, \
630 0x00130831, \
631 0x0010090B, \
632 0x00124813, \
633 0x000CFF80, \
634 0x00260703, \
635 0x00041000, \
636 0x00380700, \
637 0x00000000, \
638 }
639 
640 
641 /********************************************************/
642 /*  CPUSaver micro code for the D102 B-step             */
643 /********************************************************/
644 
645 /*  Version 2.0  */
646 
647 /*
648     This version of CPUSaver is different from all others in
649     a different way.  It combines the CPUSaver algorithm with
650     fixes for bugs in the B-step hardware (specifically, bugs
651     with Inline Receive).
652     Thus, when CPUSaver is disabled, this micro code image will
653     still need to be loaded.  Before this happens, the hit addresses
654     for the CPUSaver algorithm must be set to 0x1FFFF.  The hit
655     addresses for CPUSaver are (starting with 0, and remember that
656 
657 */
658 
659 /*  Parameter values for the D102 B-step  */
660 #define D102_B_CPUSAVER_DWORD                91
661 #define D102_B_CPUSAVER_BUNDLE_MAX_DWORD     115
662 #define D102_B_CPUSAVER_MIN_SIZE_DWORD       70
663 
664 
665 #define     D102_B_RCVBUNDLE_UCODE \
666 {\
667 0x006F0276, \
668 0x02BF0E93, \
669 0x1FFF0ED9, \
670 0x0D2508FA, \
671 0x04D21FFF, \
672 0x0EA10892, \
673 0x00300001, \
674 0x0140D871, \
675 0x00300008, \
676 0x00E00277, \
677 0x01406C57, \
678 0x00816073, \
679 0x008700FA, \
680 0x00E00070, \
681 0x00E00E94, \
682 0x00200004, \
683 0x01410000, \
684 0x014B6F6F, \
685 0x0030FFFF, \
686 0x01486F72, \
687 0x00E81F9B, \
688 0x00E00EA3, \
689 0x003C0040, \
690 0x00380920, \
691 0x00C02000, \
692 0x0150ED38, \
693 0x0150EE39, \
694 0x0150EF3A, \
695 0x003C0040, \
696 0x01506F0D, \
697 0x01600E72, \
698 0x00380AE0, \
699 0x00E002C0, \
700 0x00300001, \
701 0x014C0000, \
702 0x008404DC, \
703 0x014C6F72, \
704 0x00E01F9D, \
705 0x01406C51, \
706 0x0080DFC2, \
707 0x01406C52, \
708 0x00815FC2, \
709 0x01406C57, \
710 0x00917FD5, \
711 0x00E01FE6, \
712 0x00000000, \
713 0x01406C57, \
714 0x00919FAD, \
715 0x00038800, \
716 0x00300000, \
717 0x00E81FF2, \
718 0x014D6FC4, \
719 0x00E008FB, \
720 0x00000000, \
721 0x00822D30, \
722 0x01406C51, \
723 0x0080CD26, \
724 0x01406C52, \
725 0x00814D26, \
726 0x01406C57, \
727 0x00916D26, \
728 0x014C6FD7, \
729 0x00300000, \
730 0x00841FDB, \
731 0x00300001, \
732 0x0140D772, \
733 0x00E012B3, \
734 0x014C6F91, \
735 0x0150710B, \
736 0x01496F72, \
737 0x0030FF80, \
738 0x00940EDD, \
739 0x00102000, \
740 0x00E00EDA, \
741 0x01406C57, \
742 0x00917FFD, \
743 0x00001000, \
744 0x00E01FFD, \
745 0x00138800, \
746 0x00300001, \
747 0x00E81FF2, \
748 0x00202500, \
749 0x00E81F9B, \
750 0x01600EC5, \
751 0x00E00893, \
752 0x00000000, \
753 0x01406CD5, \
754 0x0091EEA3, \
755 0x00904EA3, \
756 0x00901F89, \
757 0x00E00EA3, \
758 0x00200600, \
759 0x0140D76F, \
760 0x00138400, \
761 0x01406FD8, \
762 0x0140D96F, \
763 0x00E01FE6, \
764 0x00038400, \
765 0x00102000, \
766 0x00971FE0, \
767 0x00101000, \
768 0x00050200, \
769 0x00E804D2, \
770 0x014C6FD8, \
771 0x00300001, \
772 0x00840D26, \
773 0x0140D872, \
774 0x00E00D26, \
775 0x014C6FD9, \
776 0x00300001, \
777 0x0140D972, \
778 0x00941FBD, \
779 0x00102000, \
780 0x00038400, \
781 0x014C6FD8, \
782 0x00300006, \
783 0x00840EDA, \
784 0x014F71D8, \
785 0x0140D872, \
786 0x00E00EDA, \
787 0x00340020, \
788 0x014C6FED, \
789 0x01603472, \
790 0x016035EE, \
791 0x016036EF, \
792 0x00300004, \
793 0x01611C71, \
794 0x00300014, \
795 0x00200A00, \
796 0x00E810B9, \
797 0x00600000, \
798 0x01496F50, \
799 0x00E004D3, \
800 0x00000000, \
801 }
802 
803 
804 
805 
806 /********************************************************/
807 /*  TCO micro code for the D102 B-step             */
808 /********************************************************/
809 
810 /*  Version 2.0  */
811 
812 /*
813     This version is a fix to TCO bug. This version can be loaded instead
814     the CPUSaver version by modifing the registry key "LoadTcoUCodeInsteadOfCpuSaver"
815 
816 */
817 
818 
819 #define     D102_B_TCO_UCODE \
820 {\
821 0x1FFF0ED3, \
822 0x02BF0E93, \
823 0x1FFF1FFF, \
824 0x1FFF08FA, \
825 0x1FFF1FFF, \
826 0x0EA10892, \
827 0x00906ED8, \
828 0x01406C55, \
829 0x00E00ED4, \
830 0x00000000, \
831 0x00000000, \
832 0x00000000, \
833 0x00000000, \
834 0x00000000, \
835 0x00E00E94, \
836 0x00200004, \
837 0x01410000, \
838 0x014B6F6F, \
839 0x0030FFFF, \
840 0x01486F72, \
841 0x00E81F9B, \
842 0x00E00EA3, \
843 0x003C0040, \
844 0x00380920, \
845 0x00C02000, \
846 0x0150ED38, \
847 0x0150EE39, \
848 0x0150EF3A, \
849 0x003C0040, \
850 0x01506F0D, \
851 0x01600E72, \
852 0x00380AE0, \
853 0x00E002C0, \
854 0x00300001, \
855 0x014C0000, \
856 0x008404DC, \
857 0x014C6F72, \
858 0x00E01F9D, \
859 0x00000000, \
860 0x00000000, \
861 0x00000000, \
862 0x00000000, \
863 0x00000000, \
864 0x00000000, \
865 0x00000000, \
866 0x00000000, \
867 0x01406C57, \
868 0x00919FAD, \
869 0x00038800, \
870 0x00300000, \
871 0x00E81FD5, \
872 0x014D6FC4, \
873 0x00E008FB, \
874 0x00000000, \
875 0x00000000, \
876 0x00000000, \
877 0x00000000, \
878 0x00000000, \
879 0x00000000, \
880 0x00000000, \
881 0x00000000, \
882 0x00000000, \
883 0x00000000, \
884 0x00000000, \
885 0x00000000, \
886 0x00000000, \
887 0x00000000, \
888 0x00000000, \
889 0x00000000, \
890 0x00000000, \
891 0x00000000, \
892 0x00000000, \
893 0x00000000, \
894 0x00000000, \
895 0x00000000, \
896 0x00000000, \
897 0x00000000, \
898 0x00000000, \
899 0x00138800, \
900 0x00300001, \
901 0x00E81FD5, \
902 0x00202500, \
903 0x00E81F9B, \
904 0x01600EC5, \
905 0x00E00893, \
906 0x00000000, \
907 0x01406CD5, \
908 0x0091EEA3, \
909 0x00904EA3, \
910 0x00901F89, \
911 0x00E00EA3, \
912 0x00340020, \
913 0x014C6FED, \
914 0x01603472, \
915 0x016035EE, \
916 0x016036EF, \
917 0x00300004, \
918 0x01611C71, \
919 0x00300014, \
920 0x00200A00, \
921 0x00E810B9, \
922 0x00600000, \
923 0x00000000, \
924 0x00000000, \
925 0x00000000, \
926 0x00000000, \
927 0x00000000, \
928 0x00000000, \
929 0x00000000, \
930 0x00000000, \
931 0x00000000, \
932 0x00000000, \
933 0x00000000, \
934 0x00000000, \
935 0x00000000, \
936 0x00000000, \
937 0x00000000, \
938 0x00000000, \
939 0x00000000, \
940 0x00000000, \
941 0x00000000, \
942 0x00000000, \
943 0x00000000, \
944 0x00000000, \
945 0x00000000, \
946 0x00000000, \
947 0x00000000, \
948 0x00000000, \
949 0x00000000, \
950 0x00000000, \
951 0x00000000, \
952 0x00000000, \
953 0x00000000, \
954 0x00000000, \
955 }
956 
957 
958 
959 /********************************************************/
960 /*  Micro code for the D102 C-step                      */
961 /********************************************************/
962 
963 /*  Parameter values for the D102 C-step  */
964 #define D102_C_CPUSAVER_DWORD                46
965 #define D102_C_CPUSAVER_BUNDLE_MAX_DWORD     54
966 #define D102_C_CPUSAVER_MIN_SIZE_DWORD      133 /* not implemented */
967 
968 
969 
970 
971 
972 #if 0
973 // this uCode include the CPU Saver and the TCO work around
974 //for IP fregments.
975 #endif
976 #define     D102_C_RCVBUNDLE_UCODE \
977 { \
978 0x00700279, \
979 0x0E6104E2, \
980 0x02BF0CAE, \
981 0x1519150C, \
982 0x1FFF0E5B, \
983 0x1FFF1FFF, \
984 0x00E014D8, \
985 0x00000000, \
986 0x00000000, \
987 0x00000000, \
988 0x00E014DC, \
989 0x00000000, \
990 0x00000000, \
991 0x00000000, \
992 0x00E014F4, \
993 0x00000000, \
994 0x00000000, \
995 0x00000000, \
996 0x00000000, \
997 0x00000000, \
998 0x00000000, \
999 0x00000000, \
1000 0x00E014E0, \
1001 0x00000000, \
1002 0x00000000, \
1003 0x00000000, \
1004 0x00000000, \
1005 0x00000000, \
1006 0x00000000, \
1007 0x00000000, \
1008 0x00000000, \
1009 0x00000000, \
1010 0x00000000, \
1011 0x00000000, \
1012 0x00000000, \
1013 0x00000000, \
1014 0x00000000, \
1015 0x00000000, \
1016 0x00E014E7, \
1017 0x00000000, \
1018 0x00000000, \
1019 0x00000000, \
1020 0x00141000, \
1021 0x015D6F0D, \
1022 0x00E002C0, \
1023 0x00000000, \
1024 0x00200600, \
1025 0x00E0150D, \
1026 0x00000000, \
1027 0x00000000, \
1028 0x00000000, \
1029 0x00000000, \
1030 0x00000000, \
1031 0x00000000, \
1032 0x00300006, \
1033 0x00E0151A, \
1034 0x00000000, \
1035 0x00000000, \
1036 0x00000000, \
1037 0x00000000, \
1038 0x00000000, \
1039 0x00000000, \
1040 0x00000000, \
1041 0x00000000, \
1042 0x00000000, \
1043 0x00000000, \
1044 0x00000000, \
1045 0x00000000, \
1046 0x00000000, \
1047 0x00000000, \
1048 0x00906E65, \
1049 0x00800E60, \
1050 0x00E00E5D, \
1051 0x00000000, \
1052 0x00000000, \
1053 0x00000000, \
1054 0x00000000, \
1055 0x00000000, \
1056 0x00000000, \
1057 0x00000000, \
1058 0x00000000, \
1059 0x00000000, \
1060 0x00000000, \
1061 0x00000000, \
1062 0x00000000, \
1063 0x00000000, \
1064 0x00000000, \
1065 0x00000000, \
1066 0x00000000, \
1067 0x00000000, \
1068 0x00000000, \
1069 0x00000000, \
1070 0x00000000, \
1071 0x00000000, \
1072 0x00000000, \
1073 0x00000000, \
1074 0x00000000, \
1075 0x00000000, \
1076 0x00000000, \
1077 0x00000000, \
1078 0x00000000, \
1079 0x00000000, \
1080 0x00000000, \
1081 0x00000000, \
1082 0x00000000, \
1083 0x00000000, \
1084 0x00000000, \
1085 0x00000000, \
1086 0x00000000, \
1087 0x00000000, \
1088 0x00000000, \
1089 0x00000000, \
1090 0x00000000, \
1091 0x00000000, \
1092 0x00000000, \
1093 0x00000000, \
1094 0x00000000, \
1095 0x00000000, \
1096 0x00000000, \
1097 0x00000000, \
1098 0x00000000, \
1099 0x00000000, \
1100 0x00000000, \
1101 0x00000000, \
1102 0x00000000, \
1103 0x00000000, \
1104 0x00000000, \
1105 0x00000000, \
1106 0x00000000, \
1107 0x00000000, \
1108 0x00000000, \
1109 0x00000000, \
1110 0x00000000, \
1111 0x00000000, \
1112 }
1113 
1114 /********************************************************/
1115 /*  Micro code for the D102 E-step                      */
1116 /********************************************************/
1117 
1118 /*  Parameter values for the D102 E-step  */
1119 #define D102_E_CPUSAVER_DWORD			42
1120 #define D102_E_CPUSAVER_BUNDLE_MAX_DWORD	54
1121 #define D102_E_CPUSAVER_MIN_SIZE_DWORD		46
1122 
1123 #define     D102_E_RCVBUNDLE_UCODE \
1124 {\
1125 0x007D028F, \
1126 0x0E4204F9, \
1127 0x14ED0C85, \
1128 0x14FA14E9, \
1129 0x0EF70E36, \
1130 0x1FFF1FFF, \
1131 0x00E014B9, \
1132 0x00000000, \
1133 0x00000000, \
1134 0x00000000, \
1135 0x00E014BD, \
1136 0x00000000, \
1137 0x00000000, \
1138 0x00000000, \
1139 0x00E014D5, \
1140 0x00000000, \
1141 0x00000000, \
1142 0x00000000, \
1143 0x00000000, \
1144 0x00000000, \
1145 0x00000000, \
1146 0x00000000, \
1147 0x00E014C1, \
1148 0x00000000, \
1149 0x00000000, \
1150 0x00000000, \
1151 0x00000000, \
1152 0x00000000, \
1153 0x00000000, \
1154 0x00000000, \
1155 0x00000000, \
1156 0x00000000, \
1157 0x00000000, \
1158 0x00000000, \
1159 0x00000000, \
1160 0x00000000, \
1161 0x00000000, \
1162 0x00000000, \
1163 0x00E014C8, \
1164 0x00000000, \
1165 0x00000000, \
1166 0x00000000, \
1167 0x00200600, \
1168 0x00E014EE, \
1169 0x00000000, \
1170 0x00000000, \
1171 0x0030FF80, \
1172 0x00940E46, \
1173 0x00038200, \
1174 0x00102000, \
1175 0x00E00E43, \
1176 0x00000000, \
1177 0x00000000, \
1178 0x00000000, \
1179 0x00300006, \
1180 0x00E014FB, \
1181 0x00000000, \
1182 0x00000000, \
1183 0x00000000, \
1184 0x00000000, \
1185 0x00000000, \
1186 0x00000000, \
1187 0x00000000, \
1188 0x00000000, \
1189 0x00000000, \
1190 0x00000000, \
1191 0x00000000, \
1192 0x00000000, \
1193 0x00000000, \
1194 0x00000000, \
1195 0x00906E41, \
1196 0x00800E3C, \
1197 0x00E00E39, \
1198 0x00000000, \
1199 0x00906EFD, \
1200 0x00900EFD, \
1201 0x00E00EF8, \
1202 0x00000000, \
1203 0x00000000, \
1204 0x00000000, \
1205 0x00000000, \
1206 0x00000000, \
1207 0x00000000, \
1208 0x00000000, \
1209 0x00000000, \
1210 0x00000000, \
1211 0x00000000, \
1212 0x00000000, \
1213 0x00000000, \
1214 0x00000000, \
1215 0x00000000, \
1216 0x00000000, \
1217 0x00000000, \
1218 0x00000000, \
1219 0x00000000, \
1220 0x00000000, \
1221 0x00000000, \
1222 0x00000000, \
1223 0x00000000, \
1224 0x00000000, \
1225 0x00000000, \
1226 0x00000000, \
1227 0x00000000, \
1228 0x00000000, \
1229 0x00000000, \
1230 0x00000000, \
1231 0x00000000, \
1232 0x00000000, \
1233 0x00000000, \
1234 0x00000000, \
1235 0x00000000, \
1236 0x00000000, \
1237 0x00000000, \
1238 0x00000000, \
1239 0x00000000, \
1240 0x00000000, \
1241 0x00000000, \
1242 0x00000000, \
1243 0x00000000, \
1244 0x00000000, \
1245 0x00000000, \
1246 0x00000000, \
1247 0x00000000, \
1248 0x00000000, \
1249 0x00000000, \
1250 0x00000000, \
1251 0x00000000, \
1252 0x00000000, \
1253 0x00000000, \
1254 0x00000000, \
1255 0x00000000, \
1256 0x00000000, \
1257 0x00000000, \
1258 0x00000000, \
1259 }
1260