1 /* 2 * Copyright (c) 1995, David Greenman 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 /* 31 * Misc. defintions for the Intel EtherExpress Pro/100B PCI Fast 32 * Ethernet driver 33 */ 34 /* 35 * NOTE: Elements are ordered for optimal cacheline behavior, and NOT 36 * for functional grouping. 37 */ 38 struct fxp_softc { 39 struct arpcom arpcom; /* per-interface network data */ 40 struct resource *mem; /* resource descriptor for registers */ 41 struct resource *irq; /* resource descriptor for interrupt */ 42 void *ih; /* interrupt handler cookie */ 43 struct mtx sc_mtx; 44 bus_space_tag_t sc_st; /* bus space tag */ 45 bus_space_handle_t sc_sh; /* bus space handle */ 46 struct mbuf *rfa_headm; /* first mbuf in receive frame area */ 47 struct mbuf *rfa_tailm; /* last mbuf in receive frame area */ 48 struct fxp_cb_tx *cbl_first; /* first active TxCB in list */ 49 int tx_queued; /* # of active TxCB's */ 50 int need_mcsetup; /* multicast filter needs programming */ 51 struct fxp_cb_tx *cbl_last; /* last active TxCB in list */ 52 struct fxp_stats *fxp_stats; /* Pointer to interface stats */ 53 int rx_idle_secs; /* # of seconds RX has been idle */ 54 struct callout_handle stat_ch; /* Handle for canceling our stat timeout */ 55 struct fxp_cb_tx *cbl_base; /* base of TxCB list */ 56 struct fxp_cb_mcs *mcsp; /* Pointer to mcast setup descriptor */ 57 int all_mcasts; /* receive all multicasts */ 58 struct ifmedia sc_media; /* media information */ 59 int phy_primary_addr; /* address of primary PHY */ 60 int phy_primary_device; /* device type of primary PHY */ 61 int phy_10Mbps_only; /* PHY is 10Mbps-only device */ 62 int eeprom_size; /* size of serial EEPROM */ 63 int suspended; /* 0 = normal 1 = suspended (APM) */ 64 u_int32_t saved_maps[5]; /* pci data */ 65 u_int32_t saved_biosaddr; 66 u_int8_t saved_intline; 67 u_int8_t saved_cachelnsz; 68 u_int8_t saved_lattimer; 69 }; 70 71 /* Macros to ease CSR access. */ 72 #define CSR_READ_1(sc, reg) \ 73 bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg)) 74 #define CSR_READ_2(sc, reg) \ 75 bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg)) 76 #define CSR_READ_4(sc, reg) \ 77 bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg)) 78 #define CSR_WRITE_1(sc, reg, val) \ 79 bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 80 #define CSR_WRITE_2(sc, reg, val) \ 81 bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 82 #define CSR_WRITE_4(sc, reg, val) \ 83 bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 84 85 #define sc_if arpcom.ac_if 86 #define FXP_UNIT(_sc) (_sc)->arpcom.ac_if.if_unit 87 #define FXP_LOCK(_sc) mtx_enter(&(_sc)->sc_mtx, MTX_DEF) 88 #define FXP_UNLOCK(_sc) mtx_exit(&(_sc)->sc_mtx, MTX_DEF) 89