1 /* 2 * Copyright (c) 1995, David Greenman 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 /* 31 * Misc. defintions for the Intel EtherExpress Pro/100B PCI Fast 32 * Ethernet driver 33 */ 34 35 /* 36 * Number of transmit control blocks. This determines the number 37 * of transmit buffers that can be chained in the CB list. 38 * This must be a power of two. 39 */ 40 #define FXP_NTXCB 128 41 42 /* 43 * Number of completed TX commands at which point an interrupt 44 * will be generated to garbage collect the attached buffers. 45 * Must be at least one less than FXP_NTXCB, and should be 46 * enough less so that the transmitter doesn't becomes idle 47 * during the buffer rundown (which would reduce performance). 48 */ 49 #define FXP_CXINT_THRESH 120 50 51 /* 52 * TxCB list index mask. This is used to do list wrap-around. 53 */ 54 #define FXP_TXCB_MASK (FXP_NTXCB - 1) 55 56 /* 57 * Number of receive frame area buffers. These are large so chose 58 * wisely. 59 */ 60 #define FXP_NRFABUFS 64 61 62 /* 63 * Maximum number of seconds that the receiver can be idle before we 64 * assume it's dead and attempt to reset it by reprogramming the 65 * multicast filter. This is part of a work-around for a bug in the 66 * NIC. See fxp_stats_update(). 67 */ 68 #define FXP_MAX_RX_IDLE 15 69 70 /* 71 * Default maximum time, in microseconds, that an interrupt may be delayed 72 * in an attempt to coalesce interrupts. This is only effective if the Intel 73 * microcode is loaded, and may be changed via either loader tunables or 74 * sysctl. See also the CPUSAVER_DWORD entry in rcvbundl.h. 75 */ 76 #define TUNABLE_INT_DELAY 1000 77 78 /* 79 * Default number of packets that will be bundled, before an interrupt is 80 * generated. This is only effective if the Intel microcode is loaded, and 81 * may be changed via either loader tunables or sysctl. This may not be 82 * present in all microcode revisions, see also the CPUSAVER_BUNDLE_MAX_DWORD 83 * entry in rcvbundl.h. 84 */ 85 #define TUNABLE_BUNDLE_MAX 6 86 87 #if __FreeBSD_version < 500000 88 #define FXP_LOCK(_sc) 89 #define FXP_UNLOCK(_sc) 90 #define mtx_init(a, b, c) 91 #define mtx_destroy(a) 92 struct mtx { int dummy; }; 93 #else 94 #define FXP_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 95 #define FXP_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 96 #endif 97 98 #ifdef __alpha__ 99 #undef vtophys 100 #define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va)) 101 #endif /* __alpha__ */ 102 103 /* 104 * NOTE: Elements are ordered for optimal cacheline behavior, and NOT 105 * for functional grouping. 106 */ 107 struct fxp_softc { 108 struct arpcom arpcom; /* per-interface network data */ 109 struct resource *mem; /* resource descriptor for registers */ 110 int rtp; /* register resource type */ 111 int rgd; /* register descriptor in use */ 112 struct resource *irq; /* resource descriptor for interrupt */ 113 void *ih; /* interrupt handler cookie */ 114 struct mtx sc_mtx; 115 bus_space_tag_t sc_st; /* bus space tag */ 116 bus_space_handle_t sc_sh; /* bus space handle */ 117 struct mbuf *rfa_headm; /* first mbuf in receive frame area */ 118 struct mbuf *rfa_tailm; /* last mbuf in receive frame area */ 119 struct fxp_cb_tx *cbl_first; /* first active TxCB in list */ 120 int tx_queued; /* # of active TxCB's */ 121 int need_mcsetup; /* multicast filter needs programming */ 122 struct fxp_cb_tx *cbl_last; /* last active TxCB in list */ 123 struct fxp_stats *fxp_stats; /* Pointer to interface stats */ 124 int rx_idle_secs; /* # of seconds RX has been idle */ 125 struct callout_handle stat_ch; /* Handle for canceling our stat timeout */ 126 struct fxp_cb_tx *cbl_base; /* base of TxCB list */ 127 struct fxp_cb_mcs *mcsp; /* Pointer to mcast setup descriptor */ 128 struct ifmedia sc_media; /* media information */ 129 device_t miibus; 130 device_t dev; 131 struct sysctl_ctx_list sysctl_ctx; 132 struct sysctl_oid *sysctl_tree; 133 int tunable_int_delay; /* interrupt delay value for ucode */ 134 int tunable_bundle_max; /* max # frames per interrupt (ucode) */ 135 int eeprom_size; /* size of serial EEPROM */ 136 int suspended; /* 0 = normal 1 = suspended (APM) */ 137 int cu_resume_bug; 138 int revision; 139 int flags; 140 u_int32_t saved_maps[5]; /* pci data */ 141 u_int32_t saved_biosaddr; 142 u_int8_t saved_intline; 143 u_int8_t saved_cachelnsz; 144 u_int8_t saved_lattimer; 145 }; 146 147 #define FXP_FLAG_MWI_ENABLE 0x0001 /* MWI enable */ 148 #define FXP_FLAG_READ_ALIGN 0x0002 /* align read access with cacheline */ 149 #define FXP_FLAG_WRITE_ALIGN 0x0004 /* end write on cacheline */ 150 #define FXP_FLAG_EXT_TXCB 0x0008 /* enable use of extended TXCB */ 151 #define FXP_FLAG_SERIAL_MEDIA 0x0010 /* 10Mbps serial interface */ 152 #define FXP_FLAG_LONG_PKT_EN 0x0020 /* enable long packet reception */ 153 #define FXP_FLAG_ALL_MCAST 0x0040 /* accept all multicast frames */ 154 #define FXP_FLAG_CU_RESUME_BUG 0x0080 /* requires workaround for CU_RESUME */ 155 #define FXP_FLAG_UCODE 0x0100 /* ucode is loaded */ 156 157 /* Macros to ease CSR access. */ 158 #define CSR_READ_1(sc, reg) \ 159 bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg)) 160 #define CSR_READ_2(sc, reg) \ 161 bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg)) 162 #define CSR_READ_4(sc, reg) \ 163 bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg)) 164 #define CSR_WRITE_1(sc, reg, val) \ 165 bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 166 #define CSR_WRITE_2(sc, reg, val) \ 167 bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 168 #define CSR_WRITE_4(sc, reg, val) \ 169 bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val)) 170 171 #define sc_if arpcom.ac_if 172 173 #define FXP_UNIT(_sc) (_sc)->arpcom.ac_if.if_unit 174