1 /* 2 * Copyright (c) 1995, David Greenman 3 * All rights reserved. 4 * 5 * Modifications to support NetBSD and media selection: 6 * Copyright (c) 1997 Jason R. Thorpe. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice unmodified, this list of conditions, and the following 13 * disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $Id: if_fxp.c,v 1.54 1998/08/02 00:33:38 dg Exp $ 31 */ 32 33 /* 34 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver 35 */ 36 37 #include "bpfilter.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/malloc.h> 43 #include <sys/kernel.h> 44 #include <sys/socket.h> 45 46 #include <net/if.h> 47 #include <net/if_dl.h> 48 #include <net/if_media.h> 49 50 #ifdef NS 51 #include <netns/ns.h> 52 #include <netns/ns_if.h> 53 #endif 54 55 #if NBPFILTER > 0 56 #include <net/bpf.h> 57 #endif 58 59 #if defined(__NetBSD__) 60 61 #include <sys/ioctl.h> 62 #include <sys/errno.h> 63 #include <sys/device.h> 64 65 #include <net/if_dl.h> 66 #include <net/if_ether.h> 67 68 #include <netinet/if_inarp.h> 69 70 #include <vm/vm.h> 71 72 #include <machine/cpu.h> 73 #include <machine/bus.h> 74 #include <machine/intr.h> 75 76 #include <dev/pci/if_fxpreg.h> 77 #include <dev/pci/if_fxpvar.h> 78 79 #include <dev/pci/pcivar.h> 80 #include <dev/pci/pcireg.h> 81 #include <dev/pci/pcidevs.h> 82 83 #ifdef __alpha__ /* XXX */ 84 /* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */ 85 #undef vtophys 86 #define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va)) 87 #endif /* __alpha__ */ 88 89 #else /* __FreeBSD__ */ 90 91 #include <sys/sockio.h> 92 93 #include <net/ethernet.h> 94 #include <net/if_arp.h> 95 96 #include <vm/vm.h> /* for vtophys */ 97 #include <vm/pmap.h> /* for vtophys */ 98 #include <machine/clock.h> /* for DELAY */ 99 100 #include <pci/pcivar.h> 101 #include <pci/if_fxpreg.h> 102 #include <pci/if_fxpvar.h> 103 104 #endif /* __NetBSD__ */ 105 106 /* 107 * NOTE! On the Alpha, we have an alignment constraint. The 108 * card DMAs the packet immediately following the RFA. However, 109 * the first thing in the packet is a 14-byte Ethernet header. 110 * This means that the packet is misaligned. To compensate, 111 * we actually offset the RFA 2 bytes into the cluster. This 112 * alignes the packet after the Ethernet header at a 32-bit 113 * boundary. HOWEVER! This means that the RFA is misaligned! 114 */ 115 #define RFA_ALIGNMENT_FUDGE 2 116 117 /* 118 * Inline function to copy a 16-bit aligned 32-bit quantity. 119 */ 120 static __inline void fxp_lwcopy __P((volatile u_int32_t *, 121 volatile u_int32_t *)); 122 static __inline void 123 fxp_lwcopy(src, dst) 124 volatile u_int32_t *src, *dst; 125 { 126 volatile u_int16_t *a = (u_int16_t *)src; 127 volatile u_int16_t *b = (u_int16_t *)dst; 128 129 b[0] = a[0]; 130 b[1] = a[1]; 131 } 132 133 /* 134 * Template for default configuration parameters. 135 * See struct fxp_cb_config for the bit definitions. 136 */ 137 static u_char fxp_cb_config_template[] = { 138 0x0, 0x0, /* cb_status */ 139 0x80, 0x2, /* cb_command */ 140 0xff, 0xff, 0xff, 0xff, /* link_addr */ 141 0x16, /* 0 */ 142 0x8, /* 1 */ 143 0x0, /* 2 */ 144 0x0, /* 3 */ 145 0x0, /* 4 */ 146 0x80, /* 5 */ 147 0xb2, /* 6 */ 148 0x3, /* 7 */ 149 0x1, /* 8 */ 150 0x0, /* 9 */ 151 0x26, /* 10 */ 152 0x0, /* 11 */ 153 0x60, /* 12 */ 154 0x0, /* 13 */ 155 0xf2, /* 14 */ 156 0x48, /* 15 */ 157 0x0, /* 16 */ 158 0x40, /* 17 */ 159 0xf3, /* 18 */ 160 0x0, /* 19 */ 161 0x3f, /* 20 */ 162 0x5 /* 21 */ 163 }; 164 165 /* Supported media types. */ 166 struct fxp_supported_media { 167 const int fsm_phy; /* PHY type */ 168 const int *fsm_media; /* the media array */ 169 const int fsm_nmedia; /* the number of supported media */ 170 const int fsm_defmedia; /* default media for this PHY */ 171 }; 172 173 static const int fxp_media_standard[] = { 174 IFM_ETHER|IFM_10_T, 175 IFM_ETHER|IFM_10_T|IFM_FDX, 176 IFM_ETHER|IFM_100_TX, 177 IFM_ETHER|IFM_100_TX|IFM_FDX, 178 IFM_ETHER|IFM_AUTO, 179 }; 180 #define FXP_MEDIA_STANDARD_DEFMEDIA (IFM_ETHER|IFM_AUTO) 181 182 static const int fxp_media_default[] = { 183 IFM_ETHER|IFM_MANUAL, /* XXX IFM_AUTO ? */ 184 }; 185 #define FXP_MEDIA_DEFAULT_DEFMEDIA (IFM_ETHER|IFM_MANUAL) 186 187 static const struct fxp_supported_media fxp_media[] = { 188 { FXP_PHY_DP83840, fxp_media_standard, 189 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 190 FXP_MEDIA_STANDARD_DEFMEDIA }, 191 { FXP_PHY_DP83840A, fxp_media_standard, 192 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 193 FXP_MEDIA_STANDARD_DEFMEDIA }, 194 { FXP_PHY_82553A, fxp_media_standard, 195 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 196 FXP_MEDIA_STANDARD_DEFMEDIA }, 197 { FXP_PHY_82553C, fxp_media_standard, 198 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 199 FXP_MEDIA_STANDARD_DEFMEDIA }, 200 { FXP_PHY_82555, fxp_media_standard, 201 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 202 FXP_MEDIA_STANDARD_DEFMEDIA }, 203 { FXP_PHY_82555B, fxp_media_standard, 204 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 205 FXP_MEDIA_STANDARD_DEFMEDIA }, 206 { FXP_PHY_80C24, fxp_media_default, 207 sizeof(fxp_media_default) / sizeof(fxp_media_default[0]), 208 FXP_MEDIA_DEFAULT_DEFMEDIA }, 209 }; 210 #define NFXPMEDIA (sizeof(fxp_media) / sizeof(fxp_media[0])) 211 212 static int fxp_mediachange __P((struct ifnet *)); 213 static void fxp_mediastatus __P((struct ifnet *, struct ifmediareq *)); 214 static void fxp_set_media __P((struct fxp_softc *, int)); 215 static __inline void fxp_scb_wait __P((struct fxp_softc *)); 216 static FXP_INTR_TYPE fxp_intr __P((void *)); 217 static void fxp_start __P((struct ifnet *)); 218 static int fxp_ioctl __P((struct ifnet *, 219 FXP_IOCTLCMD_TYPE, caddr_t)); 220 static void fxp_init __P((void *)); 221 static void fxp_stop __P((struct fxp_softc *)); 222 static void fxp_watchdog __P((struct ifnet *)); 223 static int fxp_add_rfabuf __P((struct fxp_softc *, struct mbuf *)); 224 static int fxp_mdi_read __P((struct fxp_softc *, int, int)); 225 static void fxp_mdi_write __P((struct fxp_softc *, int, int, int)); 226 static void fxp_read_eeprom __P((struct fxp_softc *, u_int16_t *, 227 int, int)); 228 static int fxp_attach_common __P((struct fxp_softc *, u_int8_t *)); 229 static void fxp_stats_update __P((void *)); 230 static void fxp_mc_setup __P((struct fxp_softc *)); 231 232 /* 233 * Set initial transmit threshold at 64 (512 bytes). This is 234 * increased by 64 (512 bytes) at a time, to maximum of 192 235 * (1536 bytes), if an underrun occurs. 236 */ 237 static int tx_threshold = 64; 238 239 /* 240 * Number of transmit control blocks. This determines the number 241 * of transmit buffers that can be chained in the CB list. 242 * This must be a power of two. 243 */ 244 #define FXP_NTXCB 128 245 246 /* 247 * Number of completed TX commands at which point an interrupt 248 * will be generated to garbage collect the attached buffers. 249 * Must be at least one less than FXP_NTXCB, and should be 250 * enough less so that the transmitter doesn't becomes idle 251 * during the buffer rundown (which would reduce performance). 252 */ 253 #define FXP_CXINT_THRESH 120 254 255 /* 256 * TxCB list index mask. This is used to do list wrap-around. 257 */ 258 #define FXP_TXCB_MASK (FXP_NTXCB - 1) 259 260 /* 261 * Number of receive frame area buffers. These are large so chose 262 * wisely. 263 */ 264 #define FXP_NRFABUFS 64 265 266 /* 267 * Maximum number of seconds that the receiver can be idle before we 268 * assume it's dead and attempt to reset it by reprogramming the 269 * multicast filter. This is part of a work-around for a bug in the 270 * NIC. See fxp_stats_update(). 271 */ 272 #define FXP_MAX_RX_IDLE 15 273 274 /* 275 * Wait for the previous command to be accepted (but not necessarily 276 * completed). 277 */ 278 static __inline void 279 fxp_scb_wait(sc) 280 struct fxp_softc *sc; 281 { 282 int i = 10000; 283 284 while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i); 285 } 286 287 /************************************************************* 288 * Operating system-specific autoconfiguration glue 289 *************************************************************/ 290 291 #if defined(__NetBSD__) 292 293 #ifdef __BROKEN_INDIRECT_CONFIG 294 static int fxp_match __P((struct device *, void *, void *)); 295 #else 296 static int fxp_match __P((struct device *, struct cfdata *, void *)); 297 #endif 298 static void fxp_attach __P((struct device *, struct device *, void *)); 299 300 static void fxp_shutdown __P((void *)); 301 302 /* Compensate for lack of a generic ether_ioctl() */ 303 static int fxp_ether_ioctl __P((struct ifnet *, 304 FXP_IOCTLCMD_TYPE, caddr_t)); 305 #define ether_ioctl fxp_ether_ioctl 306 307 struct cfattach fxp_ca = { 308 sizeof(struct fxp_softc), fxp_match, fxp_attach 309 }; 310 311 struct cfdriver fxp_cd = { 312 NULL, "fxp", DV_IFNET 313 }; 314 315 /* 316 * Check if a device is an 82557. 317 */ 318 static int 319 fxp_match(parent, match, aux) 320 struct device *parent; 321 #ifdef __BROKEN_INDIRECT_CONFIG 322 void *match; 323 #else 324 struct cfdata *match; 325 #endif 326 void *aux; 327 { 328 struct pci_attach_args *pa = aux; 329 330 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL) 331 return (0); 332 333 switch (PCI_PRODUCT(pa->pa_id)) { 334 case PCI_PRODUCT_INTEL_82557: 335 return (1); 336 } 337 338 return (0); 339 } 340 341 static void 342 fxp_attach(parent, self, aux) 343 struct device *parent, *self; 344 void *aux; 345 { 346 struct fxp_softc *sc = (struct fxp_softc *)self; 347 struct pci_attach_args *pa = aux; 348 pci_chipset_tag_t pc = pa->pa_pc; 349 pci_intr_handle_t ih; 350 const char *intrstr = NULL; 351 u_int8_t enaddr[6]; 352 struct ifnet *ifp; 353 354 /* 355 * Map control/status registers. 356 */ 357 if (pci_mapreg_map(pa, FXP_PCI_MMBA, PCI_MAPREG_TYPE_MEM, 0, 358 &sc->sc_st, &sc->sc_sh, NULL, NULL)) { 359 printf(": can't map registers\n"); 360 return; 361 } 362 printf(": Intel EtherExpress Pro 10/100B Ethernet\n"); 363 364 /* 365 * Allocate our interrupt. 366 */ 367 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 368 pa->pa_intrline, &ih)) { 369 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 370 return; 371 } 372 intrstr = pci_intr_string(pc, ih); 373 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc); 374 if (sc->sc_ih == NULL) { 375 printf("%s: couldn't establish interrupt", 376 sc->sc_dev.dv_xname); 377 if (intrstr != NULL) 378 printf(" at %s", intrstr); 379 printf("\n"); 380 return; 381 } 382 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 383 384 /* Do generic parts of attach. */ 385 if (fxp_attach_common(sc, enaddr)) { 386 /* Failed! */ 387 return; 388 } 389 390 printf("%s: Ethernet address %s%s\n", sc->sc_dev.dv_xname, 391 ether_sprintf(enaddr), sc->phy_10Mbps_only ? ", 10Mbps" : ""); 392 393 ifp = &sc->sc_ethercom.ec_if; 394 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 395 ifp->if_softc = sc; 396 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 397 ifp->if_ioctl = fxp_ioctl; 398 ifp->if_start = fxp_start; 399 ifp->if_watchdog = fxp_watchdog; 400 401 /* 402 * Attach the interface. 403 */ 404 if_attach(ifp); 405 /* 406 * Let the system queue as many packets as we have available 407 * TX descriptors. 408 */ 409 ifp->if_snd.ifq_maxlen = FXP_NTXCB - 1; 410 ether_ifattach(ifp, enaddr); 411 #if NBPFILTER > 0 412 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 413 sizeof(struct ether_header)); 414 #endif 415 416 /* 417 * Add shutdown hook so that DMA is disabled prior to reboot. Not 418 * doing do could allow DMA to corrupt kernel memory during the 419 * reboot before the driver initializes. 420 */ 421 shutdownhook_establish(fxp_shutdown, sc); 422 } 423 424 /* 425 * Device shutdown routine. Called at system shutdown after sync. The 426 * main purpose of this routine is to shut off receiver DMA so that 427 * kernel memory doesn't get clobbered during warmboot. 428 */ 429 static void 430 fxp_shutdown(sc) 431 void *sc; 432 { 433 fxp_stop((struct fxp_softc *) sc); 434 } 435 436 static int 437 fxp_ether_ioctl(ifp, cmd, data) 438 struct ifnet *ifp; 439 FXP_IOCTLCMD_TYPE cmd; 440 caddr_t data; 441 { 442 struct ifaddr *ifa = (struct ifaddr *) data; 443 struct fxp_softc *sc = ifp->if_softc; 444 445 switch (cmd) { 446 case SIOCSIFADDR: 447 ifp->if_flags |= IFF_UP; 448 449 switch (ifa->ifa_addr->sa_family) { 450 #ifdef INET 451 case AF_INET: 452 fxp_init(sc); 453 arp_ifinit(ifp, ifa); 454 break; 455 #endif 456 #ifdef NS 457 case AF_NS: 458 { 459 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 460 461 if (ns_nullhost(*ina)) 462 ina->x_host = *(union ns_host *) 463 LLADDR(ifp->if_sadl); 464 else 465 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 466 ifp->if_addrlen); 467 /* Set new address. */ 468 fxp_init(sc); 469 break; 470 } 471 #endif 472 default: 473 fxp_init(sc); 474 break; 475 } 476 break; 477 478 default: 479 return (EINVAL); 480 } 481 482 return (0); 483 } 484 485 #else /* __FreeBSD__ */ 486 487 static u_long fxp_count; 488 static char *fxp_probe __P((pcici_t, pcidi_t)); 489 static void fxp_attach __P((pcici_t, int)); 490 491 static void fxp_shutdown __P((int, void *)); 492 493 static struct pci_device fxp_device = { 494 "fxp", 495 fxp_probe, 496 fxp_attach, 497 &fxp_count, 498 NULL 499 }; 500 DATA_SET(pcidevice_set, fxp_device); 501 502 /* 503 * Return identification string if this is device is ours. 504 */ 505 static char * 506 fxp_probe(config_id, device_id) 507 pcici_t config_id; 508 pcidi_t device_id; 509 { 510 if (((device_id & 0xffff) == FXP_VENDORID_INTEL) && 511 ((device_id >> 16) & 0xffff) == FXP_DEVICEID_i82557) 512 return ("Intel EtherExpress Pro 10/100B Ethernet"); 513 514 return NULL; 515 } 516 517 static void 518 fxp_attach(config_id, unit) 519 pcici_t config_id; 520 int unit; 521 { 522 struct fxp_softc *sc; 523 vm_offset_t pbase; 524 struct ifnet *ifp; 525 int s; 526 527 sc = malloc(sizeof(struct fxp_softc), M_DEVBUF, M_NOWAIT); 528 if (sc == NULL) 529 return; 530 bzero(sc, sizeof(struct fxp_softc)); 531 callout_handle_init(&sc->stat_ch); 532 533 s = splimp(); 534 535 /* 536 * Map control/status registers. 537 */ 538 if (!pci_map_mem(config_id, FXP_PCI_MMBA, 539 (vm_offset_t *)&sc->csr, &pbase)) { 540 printf("fxp%d: couldn't map memory\n", unit); 541 goto fail; 542 } 543 544 /* 545 * Allocate our interrupt. 546 */ 547 if (!pci_map_int(config_id, fxp_intr, sc, &net_imask)) { 548 printf("fxp%d: couldn't map interrupt\n", unit); 549 goto fail; 550 } 551 552 /* Do generic parts of attach. */ 553 if (fxp_attach_common(sc, sc->arpcom.ac_enaddr)) { 554 /* Failed! */ 555 (void) pci_unmap_int(config_id); 556 goto fail; 557 } 558 559 printf("fxp%d: Ethernet address %6D%s\n", unit, 560 sc->arpcom.ac_enaddr, ":", sc->phy_10Mbps_only ? ", 10Mbps" : ""); 561 562 ifp = &sc->arpcom.ac_if; 563 ifp->if_unit = unit; 564 ifp->if_name = "fxp"; 565 ifp->if_output = ether_output; 566 ifp->if_baudrate = 100000000; 567 ifp->if_init = fxp_init; 568 ifp->if_softc = sc; 569 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 570 ifp->if_ioctl = fxp_ioctl; 571 ifp->if_start = fxp_start; 572 ifp->if_watchdog = fxp_watchdog; 573 574 /* 575 * Attach the interface. 576 */ 577 if_attach(ifp); 578 /* 579 * Let the system queue as many packets as we have available 580 * TX descriptors. 581 */ 582 ifp->if_snd.ifq_maxlen = FXP_NTXCB - 1; 583 ether_ifattach(ifp); 584 #if NBPFILTER > 0 585 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header)); 586 #endif 587 588 /* 589 * Add shutdown hook so that DMA is disabled prior to reboot. Not 590 * doing do could allow DMA to corrupt kernel memory during the 591 * reboot before the driver initializes. 592 */ 593 at_shutdown(fxp_shutdown, sc, SHUTDOWN_POST_SYNC); 594 595 splx(s); 596 return; 597 598 fail: 599 free(sc, M_DEVBUF); 600 splx(s); 601 } 602 603 /* 604 * Device shutdown routine. Called at system shutdown after sync. The 605 * main purpose of this routine is to shut off receiver DMA so that 606 * kernel memory doesn't get clobbered during warmboot. 607 */ 608 static void 609 fxp_shutdown(howto, sc) 610 int howto; 611 void *sc; 612 { 613 fxp_stop((struct fxp_softc *) sc); 614 } 615 616 #endif /* __NetBSD__ */ 617 618 /************************************************************* 619 * End of operating system-specific autoconfiguration glue 620 *************************************************************/ 621 622 /* 623 * Do generic parts of attach. 624 */ 625 static int 626 fxp_attach_common(sc, enaddr) 627 struct fxp_softc *sc; 628 u_int8_t *enaddr; 629 { 630 u_int16_t data; 631 int i, nmedia, defmedia; 632 const int *media; 633 634 /* 635 * Reset to a stable state. 636 */ 637 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 638 DELAY(10); 639 640 sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB, 641 M_DEVBUF, M_NOWAIT); 642 if (sc->cbl_base == NULL) 643 goto fail; 644 645 sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF, M_NOWAIT); 646 if (sc->fxp_stats == NULL) 647 goto fail; 648 bzero(sc->fxp_stats, sizeof(struct fxp_stats)); 649 650 sc->mcsp = malloc(sizeof(struct fxp_cb_mcs), M_DEVBUF, M_NOWAIT); 651 if (sc->mcsp == NULL) 652 goto fail; 653 654 /* 655 * Pre-allocate our receive buffers. 656 */ 657 for (i = 0; i < FXP_NRFABUFS; i++) { 658 if (fxp_add_rfabuf(sc, NULL) != 0) { 659 goto fail; 660 } 661 } 662 663 /* 664 * Get info about the primary PHY 665 */ 666 fxp_read_eeprom(sc, (u_int16_t *)&data, 6, 1); 667 sc->phy_primary_addr = data & 0xff; 668 sc->phy_primary_device = (data >> 8) & 0x3f; 669 sc->phy_10Mbps_only = data >> 15; 670 671 /* 672 * Read MAC address. 673 */ 674 fxp_read_eeprom(sc, (u_int16_t *)enaddr, 0, 3); 675 676 /* 677 * Initialize the media structures. 678 */ 679 680 media = fxp_media_default; 681 nmedia = sizeof(fxp_media_default) / sizeof(fxp_media_default[0]); 682 defmedia = FXP_MEDIA_DEFAULT_DEFMEDIA; 683 684 for (i = 0; i < NFXPMEDIA; i++) { 685 if (sc->phy_primary_device == fxp_media[i].fsm_phy) { 686 media = fxp_media[i].fsm_media; 687 nmedia = fxp_media[i].fsm_nmedia; 688 defmedia = fxp_media[i].fsm_defmedia; 689 } 690 } 691 692 ifmedia_init(&sc->sc_media, 0, fxp_mediachange, fxp_mediastatus); 693 for (i = 0; i < nmedia; i++) { 694 if (IFM_SUBTYPE(media[i]) == IFM_100_TX && sc->phy_10Mbps_only) 695 continue; 696 ifmedia_add(&sc->sc_media, media[i], 0, NULL); 697 } 698 ifmedia_set(&sc->sc_media, defmedia); 699 700 return (0); 701 702 fail: 703 printf(FXP_FORMAT ": Failed to malloc memory\n", FXP_ARGS(sc)); 704 if (sc->cbl_base) 705 free(sc->cbl_base, M_DEVBUF); 706 if (sc->fxp_stats) 707 free(sc->fxp_stats, M_DEVBUF); 708 if (sc->mcsp) 709 free(sc->mcsp, M_DEVBUF); 710 /* frees entire chain */ 711 if (sc->rfa_headm) 712 m_freem(sc->rfa_headm); 713 714 return (ENOMEM); 715 } 716 717 /* 718 * Read from the serial EEPROM. Basically, you manually shift in 719 * the read opcode (one bit at a time) and then shift in the address, 720 * and then you shift out the data (all of this one bit at a time). 721 * The word size is 16 bits, so you have to provide the address for 722 * every 16 bits of data. 723 */ 724 static void 725 fxp_read_eeprom(sc, data, offset, words) 726 struct fxp_softc *sc; 727 u_short *data; 728 int offset; 729 int words; 730 { 731 u_int16_t reg; 732 int i, x; 733 734 for (i = 0; i < words; i++) { 735 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 736 /* 737 * Shift in read opcode. 738 */ 739 for (x = 3; x > 0; x--) { 740 if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) { 741 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 742 } else { 743 reg = FXP_EEPROM_EECS; 744 } 745 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 746 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 747 reg | FXP_EEPROM_EESK); 748 DELAY(1); 749 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 750 DELAY(1); 751 } 752 /* 753 * Shift in address. 754 */ 755 for (x = 6; x > 0; x--) { 756 if ((i + offset) & (1 << (x - 1))) { 757 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 758 } else { 759 reg = FXP_EEPROM_EECS; 760 } 761 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 762 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 763 reg | FXP_EEPROM_EESK); 764 DELAY(1); 765 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 766 DELAY(1); 767 } 768 reg = FXP_EEPROM_EECS; 769 data[i] = 0; 770 /* 771 * Shift out data. 772 */ 773 for (x = 16; x > 0; x--) { 774 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 775 reg | FXP_EEPROM_EESK); 776 DELAY(1); 777 if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & 778 FXP_EEPROM_EEDO) 779 data[i] |= (1 << (x - 1)); 780 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 781 DELAY(1); 782 } 783 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 784 DELAY(1); 785 } 786 } 787 788 /* 789 * Start packet transmission on the interface. 790 */ 791 static void 792 fxp_start(ifp) 793 struct ifnet *ifp; 794 { 795 struct fxp_softc *sc = ifp->if_softc; 796 struct fxp_cb_tx *txp; 797 798 /* 799 * See if we need to suspend xmit until the multicast filter 800 * has been reprogrammed (which can only be done at the head 801 * of the command chain). 802 */ 803 if (sc->need_mcsetup) 804 return; 805 806 txp = NULL; 807 808 /* 809 * We're finished if there is nothing more to add to the list or if 810 * we're all filled up with buffers to transmit. 811 * NOTE: One TxCB is reserved to guarantee that fxp_mc_setup() can add 812 * a NOP command when needed. 813 */ 814 while (ifp->if_snd.ifq_head != NULL && sc->tx_queued < FXP_NTXCB - 1) { 815 struct mbuf *m, *mb_head; 816 int segment; 817 818 /* 819 * Grab a packet to transmit. 820 */ 821 IF_DEQUEUE(&ifp->if_snd, mb_head); 822 823 /* 824 * Get pointer to next available tx desc. 825 */ 826 txp = sc->cbl_last->next; 827 828 /* 829 * Go through each of the mbufs in the chain and initialize 830 * the transmit buffer descriptors with the physical address 831 * and size of the mbuf. 832 */ 833 tbdinit: 834 for (m = mb_head, segment = 0; m != NULL; m = m->m_next) { 835 if (m->m_len != 0) { 836 if (segment == FXP_NTXSEG) 837 break; 838 txp->tbd[segment].tb_addr = 839 vtophys(mtod(m, vm_offset_t)); 840 txp->tbd[segment].tb_size = m->m_len; 841 segment++; 842 } 843 } 844 if (m != NULL) { 845 struct mbuf *mn; 846 847 /* 848 * We ran out of segments. We have to recopy this mbuf 849 * chain first. Bail out if we can't get the new buffers. 850 */ 851 MGETHDR(mn, M_DONTWAIT, MT_DATA); 852 if (mn == NULL) { 853 m_freem(mb_head); 854 break; 855 } 856 if (mb_head->m_pkthdr.len > MHLEN) { 857 MCLGET(mn, M_DONTWAIT); 858 if ((mn->m_flags & M_EXT) == 0) { 859 m_freem(mn); 860 m_freem(mb_head); 861 break; 862 } 863 } 864 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 865 mtod(mn, caddr_t)); 866 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 867 m_freem(mb_head); 868 mb_head = mn; 869 goto tbdinit; 870 } 871 872 txp->tbd_number = segment; 873 txp->mb_head = mb_head; 874 txp->cb_status = 0; 875 if (sc->tx_queued != FXP_CXINT_THRESH - 1) { 876 txp->cb_command = 877 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S; 878 } else { 879 txp->cb_command = 880 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S | FXP_CB_COMMAND_I; 881 /* 882 * Set a 5 second timer just in case we don't hear from the 883 * card again. 884 */ 885 ifp->if_timer = 5; 886 } 887 txp->tx_threshold = tx_threshold; 888 889 /* 890 * Advance the end of list forward. 891 */ 892 sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S; 893 sc->cbl_last = txp; 894 895 /* 896 * Advance the beginning of the list forward if there are 897 * no other packets queued (when nothing is queued, cbl_first 898 * sits on the last TxCB that was sent out). 899 */ 900 if (sc->tx_queued == 0) 901 sc->cbl_first = txp; 902 903 sc->tx_queued++; 904 905 #if NBPFILTER > 0 906 /* 907 * Pass packet to bpf if there is a listener. 908 */ 909 if (ifp->if_bpf) 910 bpf_mtap(FXP_BPFTAP_ARG(ifp), mb_head); 911 #endif 912 } 913 914 /* 915 * We're finished. If we added to the list, issue a RESUME to get DMA 916 * going again if suspended. 917 */ 918 if (txp != NULL) { 919 fxp_scb_wait(sc); 920 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_RESUME); 921 } 922 } 923 924 /* 925 * Process interface interrupts. 926 */ 927 static FXP_INTR_TYPE 928 fxp_intr(arg) 929 void *arg; 930 { 931 struct fxp_softc *sc = arg; 932 struct ifnet *ifp = &sc->sc_if; 933 u_int8_t statack; 934 #if defined(__NetBSD__) 935 int claimed = 0; 936 #endif 937 938 while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) { 939 #if defined(__NetBSD__) 940 claimed = 1; 941 #endif 942 /* 943 * First ACK all the interrupts in this pass. 944 */ 945 CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack); 946 947 /* 948 * Free any finished transmit mbuf chains. 949 */ 950 if (statack & FXP_SCB_STATACK_CXTNO) { 951 struct fxp_cb_tx *txp; 952 953 for (txp = sc->cbl_first; sc->tx_queued && 954 (txp->cb_status & FXP_CB_STATUS_C) != 0; 955 txp = txp->next) { 956 if (txp->mb_head != NULL) { 957 m_freem(txp->mb_head); 958 txp->mb_head = NULL; 959 } 960 sc->tx_queued--; 961 } 962 sc->cbl_first = txp; 963 ifp->if_timer = 0; 964 if (sc->tx_queued == 0) { 965 if (sc->need_mcsetup) 966 fxp_mc_setup(sc); 967 } 968 /* 969 * Try to start more packets transmitting. 970 */ 971 if (ifp->if_snd.ifq_head != NULL) 972 fxp_start(ifp); 973 } 974 /* 975 * Process receiver interrupts. If a no-resource (RNR) 976 * condition exists, get whatever packets we can and 977 * re-start the receiver. 978 */ 979 if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) { 980 struct mbuf *m; 981 struct fxp_rfa *rfa; 982 rcvloop: 983 m = sc->rfa_headm; 984 rfa = (struct fxp_rfa *)(m->m_ext.ext_buf + 985 RFA_ALIGNMENT_FUDGE); 986 987 if (rfa->rfa_status & FXP_RFA_STATUS_C) { 988 /* 989 * Remove first packet from the chain. 990 */ 991 sc->rfa_headm = m->m_next; 992 m->m_next = NULL; 993 994 /* 995 * Add a new buffer to the receive chain. 996 * If this fails, the old buffer is recycled 997 * instead. 998 */ 999 if (fxp_add_rfabuf(sc, m) == 0) { 1000 struct ether_header *eh; 1001 u_int16_t total_len; 1002 1003 total_len = rfa->actual_size & 1004 (MCLBYTES - 1); 1005 if (total_len < 1006 sizeof(struct ether_header)) { 1007 m_freem(m); 1008 goto rcvloop; 1009 } 1010 m->m_pkthdr.rcvif = ifp; 1011 m->m_pkthdr.len = m->m_len = 1012 total_len - 1013 sizeof(struct ether_header); 1014 eh = mtod(m, struct ether_header *); 1015 #if NBPFILTER > 0 1016 if (ifp->if_bpf) { 1017 bpf_tap(FXP_BPFTAP_ARG(ifp), 1018 mtod(m, caddr_t), 1019 total_len); 1020 /* 1021 * Only pass this packet up 1022 * if it is for us. 1023 */ 1024 if ((ifp->if_flags & 1025 IFF_PROMISC) && 1026 (rfa->rfa_status & 1027 FXP_RFA_STATUS_IAMATCH) && 1028 (eh->ether_dhost[0] & 1) 1029 == 0) { 1030 m_freem(m); 1031 goto rcvloop; 1032 } 1033 } 1034 #endif /* NBPFILTER > 0 */ 1035 m->m_data += 1036 sizeof(struct ether_header); 1037 ether_input(ifp, eh, m); 1038 } 1039 goto rcvloop; 1040 } 1041 if (statack & FXP_SCB_STATACK_RNR) { 1042 fxp_scb_wait(sc); 1043 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 1044 vtophys(sc->rfa_headm->m_ext.ext_buf) + 1045 RFA_ALIGNMENT_FUDGE); 1046 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, 1047 FXP_SCB_COMMAND_RU_START); 1048 } 1049 } 1050 } 1051 #if defined(__NetBSD__) 1052 return (claimed); 1053 #endif 1054 } 1055 1056 /* 1057 * Update packet in/out/collision statistics. The i82557 doesn't 1058 * allow you to access these counters without doing a fairly 1059 * expensive DMA to get _all_ of the statistics it maintains, so 1060 * we do this operation here only once per second. The statistics 1061 * counters in the kernel are updated from the previous dump-stats 1062 * DMA and then a new dump-stats DMA is started. The on-chip 1063 * counters are zeroed when the DMA completes. If we can't start 1064 * the DMA immediately, we don't wait - we just prepare to read 1065 * them again next time. 1066 */ 1067 static void 1068 fxp_stats_update(arg) 1069 void *arg; 1070 { 1071 struct fxp_softc *sc = arg; 1072 struct ifnet *ifp = &sc->sc_if; 1073 struct fxp_stats *sp = sc->fxp_stats; 1074 int s; 1075 1076 ifp->if_opackets += sp->tx_good; 1077 ifp->if_collisions += sp->tx_total_collisions; 1078 if (sp->rx_good) { 1079 ifp->if_ipackets += sp->rx_good; 1080 sc->rx_idle_secs = 0; 1081 } else { 1082 sc->rx_idle_secs++; 1083 } 1084 ifp->if_ierrors += 1085 sp->rx_crc_errors + 1086 sp->rx_alignment_errors + 1087 sp->rx_rnr_errors + 1088 sp->rx_overrun_errors; 1089 /* 1090 * If any transmit underruns occured, bump up the transmit 1091 * threshold by another 512 bytes (64 * 8). 1092 */ 1093 if (sp->tx_underruns) { 1094 ifp->if_oerrors += sp->tx_underruns; 1095 if (tx_threshold < 192) 1096 tx_threshold += 64; 1097 } 1098 s = splimp(); 1099 /* 1100 * If we haven't received any packets in FXP_MAC_RX_IDLE seconds, 1101 * then assume the receiver has locked up and attempt to clear 1102 * the condition by reprogramming the multicast filter. This is 1103 * a work-around for a bug in the 82557 where the receiver locks 1104 * up if it gets certain types of garbage in the syncronization 1105 * bits prior to the packet header. This bug is supposed to only 1106 * occur in 10Mbps mode, but has been seen to occur in 100Mbps 1107 * mode as well (perhaps due to a 10/100 speed transition). 1108 */ 1109 if (sc->rx_idle_secs > FXP_MAX_RX_IDLE) { 1110 sc->rx_idle_secs = 0; 1111 fxp_mc_setup(sc); 1112 } 1113 /* 1114 * If there is no pending command, start another stats 1115 * dump. Otherwise punt for now. 1116 */ 1117 if (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) == 0) { 1118 /* 1119 * Start another stats dump. 1120 */ 1121 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, 1122 FXP_SCB_COMMAND_CU_DUMPRESET); 1123 } else { 1124 /* 1125 * A previous command is still waiting to be accepted. 1126 * Just zero our copy of the stats and wait for the 1127 * next timer event to update them. 1128 */ 1129 sp->tx_good = 0; 1130 sp->tx_underruns = 0; 1131 sp->tx_total_collisions = 0; 1132 1133 sp->rx_good = 0; 1134 sp->rx_crc_errors = 0; 1135 sp->rx_alignment_errors = 0; 1136 sp->rx_rnr_errors = 0; 1137 sp->rx_overrun_errors = 0; 1138 } 1139 splx(s); 1140 /* 1141 * Schedule another timeout one second from now. 1142 */ 1143 sc->stat_ch = timeout(fxp_stats_update, sc, hz); 1144 } 1145 1146 /* 1147 * Stop the interface. Cancels the statistics updater and resets 1148 * the interface. 1149 */ 1150 static void 1151 fxp_stop(sc) 1152 struct fxp_softc *sc; 1153 { 1154 struct ifnet *ifp = &sc->sc_if; 1155 struct fxp_cb_tx *txp; 1156 int i; 1157 1158 /* 1159 * Cancel stats updater. 1160 */ 1161 untimeout(fxp_stats_update, sc, sc->stat_ch); 1162 1163 /* 1164 * Issue software reset 1165 */ 1166 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 1167 DELAY(10); 1168 1169 /* 1170 * Release any xmit buffers. 1171 */ 1172 for (txp = sc->cbl_first; txp != NULL && txp->mb_head != NULL; 1173 txp = txp->next) { 1174 m_freem(txp->mb_head); 1175 txp->mb_head = NULL; 1176 } 1177 sc->tx_queued = 0; 1178 1179 /* 1180 * Free all the receive buffers then reallocate/reinitialize 1181 */ 1182 if (sc->rfa_headm != NULL) 1183 m_freem(sc->rfa_headm); 1184 sc->rfa_headm = NULL; 1185 sc->rfa_tailm = NULL; 1186 for (i = 0; i < FXP_NRFABUFS; i++) { 1187 if (fxp_add_rfabuf(sc, NULL) != 0) { 1188 /* 1189 * This "can't happen" - we're at splimp() 1190 * and we just freed all the buffers we need 1191 * above. 1192 */ 1193 panic("fxp_stop: no buffers!"); 1194 } 1195 } 1196 1197 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1198 ifp->if_timer = 0; 1199 } 1200 1201 /* 1202 * Watchdog/transmission transmit timeout handler. Called when a 1203 * transmission is started on the interface, but no interrupt is 1204 * received before the timeout. This usually indicates that the 1205 * card has wedged for some reason. 1206 */ 1207 static void 1208 fxp_watchdog(ifp) 1209 struct ifnet *ifp; 1210 { 1211 struct fxp_softc *sc = ifp->if_softc; 1212 1213 printf(FXP_FORMAT ": device timeout\n", FXP_ARGS(sc)); 1214 ifp->if_oerrors++; 1215 1216 fxp_init(sc); 1217 } 1218 1219 static void 1220 fxp_init(xsc) 1221 void *xsc; 1222 { 1223 struct fxp_softc *sc = xsc; 1224 struct ifnet *ifp = &sc->sc_if; 1225 struct fxp_cb_config *cbp; 1226 struct fxp_cb_ias *cb_ias; 1227 struct fxp_cb_tx *txp; 1228 int i, s, prm; 1229 1230 s = splimp(); 1231 /* 1232 * Cancel any pending I/O 1233 */ 1234 fxp_stop(sc); 1235 1236 prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0; 1237 1238 /* 1239 * Initialize base of CBL and RFA memory. Loading with zero 1240 * sets it up for regular linear addressing. 1241 */ 1242 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0); 1243 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_BASE); 1244 1245 fxp_scb_wait(sc); 1246 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_BASE); 1247 1248 /* 1249 * Initialize base of dump-stats buffer. 1250 */ 1251 fxp_scb_wait(sc); 1252 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(sc->fxp_stats)); 1253 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_DUMP_ADR); 1254 1255 /* 1256 * We temporarily use memory that contains the TxCB list to 1257 * construct the config CB. The TxCB list memory is rebuilt 1258 * later. 1259 */ 1260 cbp = (struct fxp_cb_config *) sc->cbl_base; 1261 1262 /* 1263 * This bcopy is kind of disgusting, but there are a bunch of must be 1264 * zero and must be one bits in this structure and this is the easiest 1265 * way to initialize them all to proper values. 1266 */ 1267 bcopy(fxp_cb_config_template, (void *)&cbp->cb_status, 1268 sizeof(fxp_cb_config_template)); 1269 1270 cbp->cb_status = 0; 1271 cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL; 1272 cbp->link_addr = -1; /* (no) next command */ 1273 cbp->byte_count = 22; /* (22) bytes to config */ 1274 cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */ 1275 cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */ 1276 cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */ 1277 cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */ 1278 cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */ 1279 cbp->dma_bce = 0; /* (disable) dma max counters */ 1280 cbp->late_scb = 0; /* (don't) defer SCB update */ 1281 cbp->tno_int = 0; /* (disable) tx not okay interrupt */ 1282 cbp->ci_int = 1; /* interrupt on CU idle */ 1283 cbp->save_bf = prm; /* save bad frames */ 1284 cbp->disc_short_rx = !prm; /* discard short packets */ 1285 cbp->underrun_retry = 1; /* retry mode (1) on DMA underrun */ 1286 cbp->mediatype = !sc->phy_10Mbps_only; /* interface mode */ 1287 cbp->nsai = 1; /* (don't) disable source addr insert */ 1288 cbp->preamble_length = 2; /* (7 byte) preamble */ 1289 cbp->loopback = 0; /* (don't) loopback */ 1290 cbp->linear_priority = 0; /* (normal CSMA/CD operation) */ 1291 cbp->linear_pri_mode = 0; /* (wait after xmit only) */ 1292 cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */ 1293 cbp->promiscuous = prm; /* promiscuous mode */ 1294 cbp->bcast_disable = 0; /* (don't) disable broadcasts */ 1295 cbp->crscdt = 0; /* (CRS only) */ 1296 cbp->stripping = !prm; /* truncate rx packet to byte count */ 1297 cbp->padding = 1; /* (do) pad short tx packets */ 1298 cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */ 1299 cbp->force_fdx = 0; /* (don't) force full duplex */ 1300 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */ 1301 cbp->multi_ia = 0; /* (don't) accept multiple IAs */ 1302 cbp->mc_all = sc->all_mcasts;/* accept all multicasts */ 1303 1304 /* 1305 * Start the config command/DMA. 1306 */ 1307 fxp_scb_wait(sc); 1308 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&cbp->cb_status)); 1309 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1310 /* ...and wait for it to complete. */ 1311 while (!(cbp->cb_status & FXP_CB_STATUS_C)); 1312 1313 /* 1314 * Now initialize the station address. Temporarily use the TxCB 1315 * memory area like we did above for the config CB. 1316 */ 1317 cb_ias = (struct fxp_cb_ias *) sc->cbl_base; 1318 cb_ias->cb_status = 0; 1319 cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL; 1320 cb_ias->link_addr = -1; 1321 #if defined(__NetBSD__) 1322 bcopy(LLADDR(ifp->if_sadl), (void *)cb_ias->macaddr, 6); 1323 #else 1324 bcopy(sc->arpcom.ac_enaddr, (void *)cb_ias->macaddr, 1325 sizeof(sc->arpcom.ac_enaddr)); 1326 #endif /* __NetBSD__ */ 1327 1328 /* 1329 * Start the IAS (Individual Address Setup) command/DMA. 1330 */ 1331 fxp_scb_wait(sc); 1332 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1333 /* ...and wait for it to complete. */ 1334 while (!(cb_ias->cb_status & FXP_CB_STATUS_C)); 1335 1336 /* 1337 * Initialize transmit control block (TxCB) list. 1338 */ 1339 1340 txp = sc->cbl_base; 1341 bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB); 1342 for (i = 0; i < FXP_NTXCB; i++) { 1343 txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK; 1344 txp[i].cb_command = FXP_CB_COMMAND_NOP; 1345 txp[i].link_addr = vtophys(&txp[(i + 1) & FXP_TXCB_MASK].cb_status); 1346 txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]); 1347 txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK]; 1348 } 1349 /* 1350 * Set the suspend flag on the first TxCB and start the control 1351 * unit. It will execute the NOP and then suspend. 1352 */ 1353 txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S; 1354 sc->cbl_first = sc->cbl_last = txp; 1355 sc->tx_queued = 1; 1356 1357 fxp_scb_wait(sc); 1358 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1359 1360 /* 1361 * Initialize receiver buffer area - RFA. 1362 */ 1363 fxp_scb_wait(sc); 1364 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 1365 vtophys(sc->rfa_headm->m_ext.ext_buf) + RFA_ALIGNMENT_FUDGE); 1366 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_START); 1367 1368 /* 1369 * Set current media. 1370 */ 1371 fxp_set_media(sc, sc->sc_media.ifm_cur->ifm_media); 1372 1373 ifp->if_flags |= IFF_RUNNING; 1374 ifp->if_flags &= ~IFF_OACTIVE; 1375 splx(s); 1376 1377 /* 1378 * Start stats updater. 1379 */ 1380 sc->stat_ch = timeout(fxp_stats_update, sc, hz); 1381 } 1382 1383 static void 1384 fxp_set_media(sc, media) 1385 struct fxp_softc *sc; 1386 int media; 1387 { 1388 1389 switch (sc->phy_primary_device) { 1390 case FXP_PHY_DP83840: 1391 case FXP_PHY_DP83840A: 1392 fxp_mdi_write(sc, sc->phy_primary_addr, FXP_DP83840_PCR, 1393 fxp_mdi_read(sc, sc->phy_primary_addr, FXP_DP83840_PCR) | 1394 FXP_DP83840_PCR_LED4_MODE | /* LED4 always indicates duplex */ 1395 FXP_DP83840_PCR_F_CONNECT | /* force link disconnect bypass */ 1396 FXP_DP83840_PCR_BIT10); /* XXX I have no idea */ 1397 /* fall through */ 1398 case FXP_PHY_82553A: 1399 case FXP_PHY_82553C: /* untested */ 1400 case FXP_PHY_82555: 1401 case FXP_PHY_82555B: 1402 if (IFM_SUBTYPE(media) != IFM_AUTO) { 1403 int flags; 1404 1405 flags = (IFM_SUBTYPE(media) == IFM_100_TX) ? 1406 FXP_PHY_BMCR_SPEED_100M : 0; 1407 flags |= (media & IFM_FDX) ? 1408 FXP_PHY_BMCR_FULLDUPLEX : 0; 1409 fxp_mdi_write(sc, sc->phy_primary_addr, 1410 FXP_PHY_BMCR, 1411 (fxp_mdi_read(sc, sc->phy_primary_addr, 1412 FXP_PHY_BMCR) & 1413 ~(FXP_PHY_BMCR_AUTOEN | FXP_PHY_BMCR_SPEED_100M | 1414 FXP_PHY_BMCR_FULLDUPLEX)) | flags); 1415 } else { 1416 fxp_mdi_write(sc, sc->phy_primary_addr, 1417 FXP_PHY_BMCR, 1418 (fxp_mdi_read(sc, sc->phy_primary_addr, 1419 FXP_PHY_BMCR) | FXP_PHY_BMCR_AUTOEN)); 1420 } 1421 break; 1422 /* 1423 * The Seeq 80c24 doesn't have a PHY programming interface, so do 1424 * nothing. 1425 */ 1426 case FXP_PHY_80C24: 1427 break; 1428 default: 1429 printf(FXP_FORMAT 1430 ": warning: unsupported PHY, type = %d, addr = %d\n", 1431 FXP_ARGS(sc), sc->phy_primary_device, 1432 sc->phy_primary_addr); 1433 } 1434 } 1435 1436 /* 1437 * Change media according to request. 1438 */ 1439 int 1440 fxp_mediachange(ifp) 1441 struct ifnet *ifp; 1442 { 1443 struct fxp_softc *sc = ifp->if_softc; 1444 struct ifmedia *ifm = &sc->sc_media; 1445 1446 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1447 return (EINVAL); 1448 1449 fxp_set_media(sc, ifm->ifm_media); 1450 return (0); 1451 } 1452 1453 /* 1454 * Notify the world which media we're using. 1455 */ 1456 void 1457 fxp_mediastatus(ifp, ifmr) 1458 struct ifnet *ifp; 1459 struct ifmediareq *ifmr; 1460 { 1461 struct fxp_softc *sc = ifp->if_softc; 1462 int flags; 1463 1464 switch (sc->phy_primary_device) { 1465 case FXP_PHY_DP83840: 1466 case FXP_PHY_DP83840A: 1467 case FXP_PHY_82555: 1468 case FXP_PHY_82555B: 1469 flags = fxp_mdi_read(sc, sc->phy_primary_addr, FXP_PHY_BMCR); 1470 ifmr->ifm_active = IFM_ETHER; 1471 if (flags & FXP_PHY_BMCR_AUTOEN) 1472 ifmr->ifm_active |= IFM_AUTO; 1473 else { 1474 if (flags & FXP_PHY_BMCR_SPEED_100M) 1475 ifmr->ifm_active |= IFM_100_TX; 1476 else 1477 ifmr->ifm_active |= IFM_10_T; 1478 1479 if (flags & FXP_PHY_BMCR_FULLDUPLEX) 1480 ifmr->ifm_active |= IFM_FDX; 1481 } 1482 break; 1483 1484 case FXP_PHY_80C24: 1485 default: 1486 ifmr->ifm_active = IFM_ETHER|IFM_MANUAL; /* XXX IFM_AUTO ? */ 1487 } 1488 } 1489 1490 /* 1491 * Add a buffer to the end of the RFA buffer list. 1492 * Return 0 if successful, 1 for failure. A failure results in 1493 * adding the 'oldm' (if non-NULL) on to the end of the list - 1494 * tossing out its old contents and recycling it. 1495 * The RFA struct is stuck at the beginning of mbuf cluster and the 1496 * data pointer is fixed up to point just past it. 1497 */ 1498 static int 1499 fxp_add_rfabuf(sc, oldm) 1500 struct fxp_softc *sc; 1501 struct mbuf *oldm; 1502 { 1503 u_int32_t v; 1504 struct mbuf *m; 1505 struct fxp_rfa *rfa, *p_rfa; 1506 1507 MGETHDR(m, M_DONTWAIT, MT_DATA); 1508 if (m != NULL) { 1509 MCLGET(m, M_DONTWAIT); 1510 if ((m->m_flags & M_EXT) == 0) { 1511 m_freem(m); 1512 if (oldm == NULL) 1513 return 1; 1514 m = oldm; 1515 m->m_data = m->m_ext.ext_buf; 1516 } 1517 } else { 1518 if (oldm == NULL) 1519 return 1; 1520 m = oldm; 1521 m->m_data = m->m_ext.ext_buf; 1522 } 1523 1524 /* 1525 * Move the data pointer up so that the incoming data packet 1526 * will be 32-bit aligned. 1527 */ 1528 m->m_data += RFA_ALIGNMENT_FUDGE; 1529 1530 /* 1531 * Get a pointer to the base of the mbuf cluster and move 1532 * data start past it. 1533 */ 1534 rfa = mtod(m, struct fxp_rfa *); 1535 m->m_data += sizeof(struct fxp_rfa); 1536 rfa->size = MCLBYTES - sizeof(struct fxp_rfa) - RFA_ALIGNMENT_FUDGE; 1537 1538 /* 1539 * Initialize the rest of the RFA. Note that since the RFA 1540 * is misaligned, we cannot store values directly. Instead, 1541 * we use an optimized, inline copy. 1542 */ 1543 rfa->rfa_status = 0; 1544 rfa->rfa_control = FXP_RFA_CONTROL_EL; 1545 rfa->actual_size = 0; 1546 1547 v = -1; 1548 fxp_lwcopy(&v, &rfa->link_addr); 1549 fxp_lwcopy(&v, &rfa->rbd_addr); 1550 1551 /* 1552 * If there are other buffers already on the list, attach this 1553 * one to the end by fixing up the tail to point to this one. 1554 */ 1555 if (sc->rfa_headm != NULL) { 1556 p_rfa = (struct fxp_rfa *) (sc->rfa_tailm->m_ext.ext_buf + 1557 RFA_ALIGNMENT_FUDGE); 1558 sc->rfa_tailm->m_next = m; 1559 v = vtophys(rfa); 1560 fxp_lwcopy(&v, &p_rfa->link_addr); 1561 p_rfa->rfa_control &= ~FXP_RFA_CONTROL_EL; 1562 } else { 1563 sc->rfa_headm = m; 1564 } 1565 sc->rfa_tailm = m; 1566 1567 return (m == oldm); 1568 } 1569 1570 static volatile int 1571 fxp_mdi_read(sc, phy, reg) 1572 struct fxp_softc *sc; 1573 int phy; 1574 int reg; 1575 { 1576 int count = 10000; 1577 int value; 1578 1579 CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 1580 (FXP_MDI_READ << 26) | (reg << 16) | (phy << 21)); 1581 1582 while (((value = CSR_READ_4(sc, FXP_CSR_MDICONTROL)) & 0x10000000) == 0 1583 && count--) 1584 DELAY(10); 1585 1586 if (count <= 0) 1587 printf(FXP_FORMAT ": fxp_mdi_read: timed out\n", 1588 FXP_ARGS(sc)); 1589 1590 return (value & 0xffff); 1591 } 1592 1593 static void 1594 fxp_mdi_write(sc, phy, reg, value) 1595 struct fxp_softc *sc; 1596 int phy; 1597 int reg; 1598 int value; 1599 { 1600 int count = 10000; 1601 1602 CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 1603 (FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21) | 1604 (value & 0xffff)); 1605 1606 while((CSR_READ_4(sc, FXP_CSR_MDICONTROL) & 0x10000000) == 0 && 1607 count--) 1608 DELAY(10); 1609 1610 if (count <= 0) 1611 printf(FXP_FORMAT ": fxp_mdi_write: timed out\n", 1612 FXP_ARGS(sc)); 1613 } 1614 1615 static int 1616 fxp_ioctl(ifp, command, data) 1617 struct ifnet *ifp; 1618 FXP_IOCTLCMD_TYPE command; 1619 caddr_t data; 1620 { 1621 struct fxp_softc *sc = ifp->if_softc; 1622 struct ifreq *ifr = (struct ifreq *)data; 1623 int s, error = 0; 1624 1625 s = splimp(); 1626 1627 switch (command) { 1628 1629 case SIOCSIFADDR: 1630 #if !defined(__NetBSD__) 1631 case SIOCGIFADDR: 1632 case SIOCSIFMTU: 1633 #endif 1634 error = ether_ioctl(ifp, command, data); 1635 break; 1636 1637 case SIOCSIFFLAGS: 1638 sc->all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; 1639 1640 /* 1641 * If interface is marked up and not running, then start it. 1642 * If it is marked down and running, stop it. 1643 * XXX If it's up then re-initialize it. This is so flags 1644 * such as IFF_PROMISC are handled. 1645 */ 1646 if (ifp->if_flags & IFF_UP) { 1647 fxp_init(sc); 1648 } else { 1649 if (ifp->if_flags & IFF_RUNNING) 1650 fxp_stop(sc); 1651 } 1652 break; 1653 1654 case SIOCADDMULTI: 1655 case SIOCDELMULTI: 1656 sc->all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; 1657 #if defined(__NetBSD__) 1658 error = (command == SIOCADDMULTI) ? 1659 ether_addmulti(ifr, &sc->sc_ethercom) : 1660 ether_delmulti(ifr, &sc->sc_ethercom); 1661 1662 if (error == ENETRESET) { 1663 /* 1664 * Multicast list has changed; set the hardware 1665 * filter accordingly. 1666 */ 1667 if (!sc->all_mcasts) 1668 fxp_mc_setup(sc); 1669 /* 1670 * fxp_mc_setup() can turn on all_mcasts if we run 1671 * out of space, so check it again rather than else {}. 1672 */ 1673 if (sc->all_mcasts) 1674 fxp_init(sc); 1675 error = 0; 1676 } 1677 #else /* __FreeBSD__ */ 1678 /* 1679 * Multicast list has changed; set the hardware filter 1680 * accordingly. 1681 */ 1682 if (!sc->all_mcasts) 1683 fxp_mc_setup(sc); 1684 /* 1685 * fxp_mc_setup() can turn on sc->all_mcasts, so check it 1686 * again rather than else {}. 1687 */ 1688 if (sc->all_mcasts) 1689 fxp_init(sc); 1690 error = 0; 1691 #endif /* __NetBSD__ */ 1692 break; 1693 1694 case SIOCSIFMEDIA: 1695 case SIOCGIFMEDIA: 1696 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, command); 1697 break; 1698 1699 default: 1700 error = EINVAL; 1701 } 1702 (void) splx(s); 1703 return (error); 1704 } 1705 1706 /* 1707 * Program the multicast filter. 1708 * 1709 * We have an artificial restriction that the multicast setup command 1710 * must be the first command in the chain, so we take steps to ensure 1711 * this. By requiring this, it allows us to keep up the performance of 1712 * the pre-initialized command ring (esp. link pointers) by not actually 1713 * inserting the mcsetup command in the ring - i.e. its link pointer 1714 * points to the TxCB ring, but the mcsetup descriptor itself is not part 1715 * of it. We then can do 'CU_START' on the mcsetup descriptor and have it 1716 * lead into the regular TxCB ring when it completes. 1717 * 1718 * This function must be called at splimp. 1719 */ 1720 static void 1721 fxp_mc_setup(sc) 1722 struct fxp_softc *sc; 1723 { 1724 struct fxp_cb_mcs *mcsp = sc->mcsp; 1725 struct ifnet *ifp = &sc->sc_if; 1726 struct ifmultiaddr *ifma; 1727 int nmcasts; 1728 1729 /* 1730 * If there are queued commands, we must wait until they are all 1731 * completed. If we are already waiting, then add a NOP command 1732 * with interrupt option so that we're notified when all commands 1733 * have been completed - fxp_start() ensures that no additional 1734 * TX commands will be added when need_mcsetup is true. 1735 */ 1736 if (sc->tx_queued) { 1737 struct fxp_cb_tx *txp; 1738 1739 /* 1740 * need_mcsetup will be true if we are already waiting for the 1741 * NOP command to be completed (see below). In this case, bail. 1742 */ 1743 if (sc->need_mcsetup) 1744 return; 1745 sc->need_mcsetup = 1; 1746 1747 /* 1748 * Add a NOP command with interrupt so that we are notified when all 1749 * TX commands have been processed. 1750 */ 1751 txp = sc->cbl_last->next; 1752 txp->mb_head = NULL; 1753 txp->cb_status = 0; 1754 txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S | FXP_CB_COMMAND_I; 1755 /* 1756 * Advance the end of list forward. 1757 */ 1758 sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S; 1759 sc->cbl_last = txp; 1760 sc->tx_queued++; 1761 /* 1762 * Issue a resume in case the CU has just suspended. 1763 */ 1764 fxp_scb_wait(sc); 1765 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_RESUME); 1766 /* 1767 * Set a 5 second timer just in case we don't hear from the 1768 * card again. 1769 */ 1770 ifp->if_timer = 5; 1771 1772 return; 1773 } 1774 sc->need_mcsetup = 0; 1775 1776 /* 1777 * Initialize multicast setup descriptor. 1778 */ 1779 mcsp->next = sc->cbl_base; 1780 mcsp->mb_head = NULL; 1781 mcsp->cb_status = 0; 1782 mcsp->cb_command = FXP_CB_COMMAND_MCAS | FXP_CB_COMMAND_S | FXP_CB_COMMAND_I; 1783 mcsp->link_addr = vtophys(&sc->cbl_base->cb_status); 1784 1785 nmcasts = 0; 1786 if (!sc->all_mcasts) { 1787 for (ifma = ifp->if_multiaddrs.lh_first; ifma != NULL; 1788 ifma = ifma->ifma_link.le_next) { 1789 if (ifma->ifma_addr->sa_family != AF_LINK) 1790 continue; 1791 if (nmcasts >= MAXMCADDR) { 1792 sc->all_mcasts = 1; 1793 nmcasts = 0; 1794 break; 1795 } 1796 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 1797 (void *) &sc->mcsp->mc_addr[nmcasts][0], 6); 1798 nmcasts++; 1799 } 1800 } 1801 mcsp->mc_cnt = nmcasts * 6; 1802 sc->cbl_first = sc->cbl_last = (struct fxp_cb_tx *) mcsp; 1803 sc->tx_queued = 1; 1804 1805 /* 1806 * Wait until command unit is not active. This should never 1807 * be the case when nothing is queued, but make sure anyway. 1808 */ 1809 while ((CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS) >> 6) == 1810 FXP_SCB_CUS_ACTIVE) ; 1811 1812 /* 1813 * Start the multicast setup command. 1814 */ 1815 fxp_scb_wait(sc); 1816 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&mcsp->cb_status)); 1817 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1818 1819 ifp->if_timer = 2; 1820 return; 1821 } 1822