1 /* 2 * Copyright (c) 1995, David Greenman 3 * All rights reserved. 4 * 5 * Modifications to support NetBSD and media selection: 6 * Copyright (c) 1997 Jason R. Thorpe. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice unmodified, this list of conditions, and the following 13 * disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $Id: if_fxp.c,v 1.42 1997/09/30 10:50:45 davidg Exp $ 31 */ 32 33 /* 34 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver 35 */ 36 37 #include "bpfilter.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/malloc.h> 43 #include <sys/kernel.h> 44 #include <sys/socket.h> 45 #include <sys/syslog.h> 46 47 #include <net/if.h> 48 #include <net/if_dl.h> 49 #include <net/if_media.h> 50 51 #ifdef INET 52 #include <netinet/in.h> 53 #endif 54 55 #ifdef NS 56 #include <netns/ns.h> 57 #include <netns/ns_if.h> 58 #endif 59 60 #if NBPFILTER > 0 61 #include <net/bpf.h> 62 #endif 63 64 #if defined(__NetBSD__) 65 66 #include <sys/ioctl.h> 67 #include <sys/errno.h> 68 #include <sys/device.h> 69 70 #include <net/if_dl.h> 71 #include <net/if_ether.h> 72 73 #include <netinet/if_inarp.h> 74 75 #include <vm/vm.h> 76 77 #include <machine/cpu.h> 78 #include <machine/bus.h> 79 #include <machine/intr.h> 80 81 #include <dev/pci/if_fxpreg.h> 82 #include <dev/pci/if_fxpvar.h> 83 84 #include <dev/pci/pcivar.h> 85 #include <dev/pci/pcireg.h> 86 #include <dev/pci/pcidevs.h> 87 88 #ifdef __alpha__ /* XXX */ 89 /* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */ 90 #undef vtophys 91 #define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va)) 92 #endif /* __alpha__ */ 93 94 #else /* __FreeBSD__ */ 95 96 #include <sys/sockio.h> 97 98 #include <netinet/if_ether.h> 99 100 #include <vm/vm.h> /* for vtophys */ 101 #include <vm/pmap.h> /* for vtophys */ 102 #include <machine/clock.h> /* for DELAY */ 103 104 #include <pci/pcivar.h> 105 #include <pci/if_fxpreg.h> 106 #include <pci/if_fxpvar.h> 107 108 #endif /* __NetBSD__ */ 109 110 /* 111 * NOTE! On the Alpha, we have an alignment constraint. The 112 * card DMAs the packet immediately following the RFA. However, 113 * the first thing in the packet is a 14-byte Ethernet header. 114 * This means that the packet is misaligned. To compensate, 115 * we actually offset the RFA 2 bytes into the cluster. This 116 * alignes the packet after the Ethernet header at a 32-bit 117 * boundary. HOWEVER! This means that the RFA is misaligned! 118 */ 119 #define RFA_ALIGNMENT_FUDGE 2 120 121 /* 122 * Inline function to copy a 16-bit aligned 32-bit quantity. 123 */ 124 static __inline void fxp_lwcopy __P((volatile u_int32_t *, 125 volatile u_int32_t *)); 126 static __inline void 127 fxp_lwcopy(src, dst) 128 volatile u_int32_t *src, *dst; 129 { 130 volatile u_int16_t *a = (u_int16_t *)src; 131 volatile u_int16_t *b = (u_int16_t *)dst; 132 133 b[0] = a[0]; 134 b[1] = a[1]; 135 } 136 137 /* 138 * Template for default configuration parameters. 139 * See struct fxp_cb_config for the bit definitions. 140 */ 141 static u_char fxp_cb_config_template[] = { 142 0x0, 0x0, /* cb_status */ 143 0x80, 0x2, /* cb_command */ 144 0xff, 0xff, 0xff, 0xff, /* link_addr */ 145 0x16, /* 0 */ 146 0x8, /* 1 */ 147 0x0, /* 2 */ 148 0x0, /* 3 */ 149 0x0, /* 4 */ 150 0x80, /* 5 */ 151 0xb2, /* 6 */ 152 0x3, /* 7 */ 153 0x1, /* 8 */ 154 0x0, /* 9 */ 155 0x26, /* 10 */ 156 0x0, /* 11 */ 157 0x60, /* 12 */ 158 0x0, /* 13 */ 159 0xf2, /* 14 */ 160 0x48, /* 15 */ 161 0x0, /* 16 */ 162 0x40, /* 17 */ 163 0xf3, /* 18 */ 164 0x0, /* 19 */ 165 0x3f, /* 20 */ 166 0x5 /* 21 */ 167 }; 168 169 /* Supported media types. */ 170 struct fxp_supported_media { 171 const int fsm_phy; /* PHY type */ 172 const int *fsm_media; /* the media array */ 173 const int fsm_nmedia; /* the number of supported media */ 174 const int fsm_defmedia; /* default media for this PHY */ 175 }; 176 177 const int fxp_media_standard[] = { 178 IFM_ETHER|IFM_10_T, 179 IFM_ETHER|IFM_10_T|IFM_FDX, 180 IFM_ETHER|IFM_100_TX, 181 IFM_ETHER|IFM_100_TX|IFM_FDX, 182 IFM_ETHER|IFM_AUTO, 183 }; 184 #define FXP_MEDIA_STANDARD_DEFMEDIA (IFM_ETHER|IFM_AUTO) 185 186 const int fxp_media_default[] = { 187 IFM_ETHER|IFM_MANUAL, /* XXX IFM_AUTO ? */ 188 }; 189 #define FXP_MEDIA_DEFAULT_DEFMEDIA (IFM_ETHER|IFM_MANUAL) 190 191 const struct fxp_supported_media fxp_media[] = { 192 { FXP_PHY_DP83840, fxp_media_standard, 193 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 194 FXP_MEDIA_STANDARD_DEFMEDIA }, 195 { FXP_PHY_DP83840A, fxp_media_standard, 196 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 197 FXP_MEDIA_STANDARD_DEFMEDIA }, 198 { FXP_PHY_82555, fxp_media_standard, 199 sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]), 200 FXP_MEDIA_STANDARD_DEFMEDIA }, 201 { FXP_PHY_80C24, fxp_media_default, 202 sizeof(fxp_media_default) / sizeof(fxp_media_default[0]), 203 FXP_MEDIA_DEFAULT_DEFMEDIA }, 204 }; 205 #define NFXPMEDIA (sizeof(fxp_media) / sizeof(fxp_media[0])) 206 207 static int fxp_mediachange __P((struct ifnet *)); 208 static void fxp_mediastatus __P((struct ifnet *, struct ifmediareq *)); 209 void fxp_set_media __P((struct fxp_softc *, int)); 210 static inline void fxp_scb_wait __P((struct fxp_softc *)); 211 static FXP_INTR_TYPE fxp_intr __P((void *)); 212 static void fxp_start __P((struct ifnet *)); 213 static int fxp_ioctl __P((struct ifnet *, 214 FXP_IOCTLCMD_TYPE, caddr_t)); 215 static void fxp_init __P((void *)); 216 static void fxp_stop __P((struct fxp_softc *)); 217 static void fxp_watchdog __P((struct ifnet *)); 218 static int fxp_add_rfabuf __P((struct fxp_softc *, struct mbuf *)); 219 static int fxp_mdi_read __P((struct fxp_softc *, int, int)); 220 static void fxp_mdi_write __P((struct fxp_softc *, int, int, int)); 221 static void fxp_read_eeprom __P((struct fxp_softc *, u_int16_t *, 222 int, int)); 223 static int fxp_attach_common __P((struct fxp_softc *, u_int8_t *)); 224 void fxp_stats_update __P((void *)); 225 static void fxp_mc_setup __P((struct fxp_softc *)); 226 227 /* 228 * Set initial transmit threshold at 64 (512 bytes). This is 229 * increased by 64 (512 bytes) at a time, to maximum of 192 230 * (1536 bytes), if an underrun occurs. 231 */ 232 static int tx_threshold = 64; 233 234 /* 235 * Number of transmit control blocks. This determines the number 236 * of transmit buffers that can be chained in the CB list. 237 * This must be a power of two. 238 */ 239 #define FXP_NTXCB 128 240 241 /* 242 * TxCB list index mask. This is used to do list wrap-around. 243 */ 244 #define FXP_TXCB_MASK (FXP_NTXCB - 1) 245 246 /* 247 * Number of receive frame area buffers. These are large so chose 248 * wisely. 249 */ 250 #define FXP_NRFABUFS 64 251 252 /* 253 * Maximum number of seconds that the receiver can be idle before we 254 * assume it's dead and attempt to reset it by reprogramming the 255 * multicast filter. This is part of a work-around for a bug in the 256 * NIC. See fxp_stats_update(). 257 */ 258 #define FXP_MAX_RX_IDLE 15 259 260 /* 261 * Wait for the previous command to be accepted (but not necessarily 262 * completed). 263 */ 264 static inline void 265 fxp_scb_wait(sc) 266 struct fxp_softc *sc; 267 { 268 int i = 10000; 269 270 while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i); 271 } 272 273 /************************************************************* 274 * Operating system-specific autoconfiguration glue 275 *************************************************************/ 276 277 #if defined(__NetBSD__) 278 279 #ifdef __BROKEN_INDIRECT_CONFIG 280 static int fxp_match __P((struct device *, void *, void *)); 281 #else 282 static int fxp_match __P((struct device *, struct cfdata *, void *)); 283 #endif 284 static void fxp_attach __P((struct device *, struct device *, void *)); 285 286 static void fxp_shutdown __P((void *)); 287 288 /* Compensate for lack of a generic ether_ioctl() */ 289 static int fxp_ether_ioctl __P((struct ifnet *, 290 FXP_IOCTLCMD_TYPE, caddr_t)); 291 #define ether_ioctl fxp_ether_ioctl 292 293 struct cfattach fxp_ca = { 294 sizeof(struct fxp_softc), fxp_match, fxp_attach 295 }; 296 297 struct cfdriver fxp_cd = { 298 NULL, "fxp", DV_IFNET 299 }; 300 301 /* 302 * Check if a device is an 82557. 303 */ 304 static int 305 fxp_match(parent, match, aux) 306 struct device *parent; 307 #ifdef __BROKEN_INDIRECT_CONFIG 308 void *match; 309 #else 310 struct cfdata *match; 311 #endif 312 void *aux; 313 { 314 struct pci_attach_args *pa = aux; 315 316 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL) 317 return (0); 318 319 switch (PCI_PRODUCT(pa->pa_id)) { 320 case PCI_PRODUCT_INTEL_82557: 321 return (1); 322 } 323 324 return (0); 325 } 326 327 static void 328 fxp_attach(parent, self, aux) 329 struct device *parent, *self; 330 void *aux; 331 { 332 struct fxp_softc *sc = (struct fxp_softc *)self; 333 struct pci_attach_args *pa = aux; 334 pci_chipset_tag_t pc = pa->pa_pc; 335 pci_intr_handle_t ih; 336 const char *intrstr = NULL; 337 u_int8_t enaddr[6]; 338 struct ifnet *ifp; 339 340 /* 341 * Map control/status registers. 342 */ 343 if (pci_mapreg_map(pa, FXP_PCI_MMBA, PCI_MAPREG_TYPE_MEM, 0, 344 &sc->sc_st, &sc->sc_sh, NULL, NULL)) { 345 printf(": can't map registers\n"); 346 return; 347 } 348 printf(": Intel EtherExpress Pro 10/100B Ethernet\n"); 349 350 /* 351 * Allocate our interrupt. 352 */ 353 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 354 pa->pa_intrline, &ih)) { 355 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 356 return; 357 } 358 intrstr = pci_intr_string(pc, ih); 359 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc); 360 if (sc->sc_ih == NULL) { 361 printf("%s: couldn't establish interrupt", 362 sc->sc_dev.dv_xname); 363 if (intrstr != NULL) 364 printf(" at %s", intrstr); 365 printf("\n"); 366 return; 367 } 368 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 369 370 /* Do generic parts of attach. */ 371 if (fxp_attach_common(sc, enaddr)) { 372 /* Failed! */ 373 return; 374 } 375 376 printf("%s: Ethernet address %s%s\n", sc->sc_dev.dv_xname, 377 ether_sprintf(enaddr), sc->phy_10Mbps_only ? ", 10Mbps" : ""); 378 379 ifp = &sc->sc_ethercom.ec_if; 380 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 381 ifp->if_softc = sc; 382 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 383 ifp->if_ioctl = fxp_ioctl; 384 ifp->if_start = fxp_start; 385 ifp->if_watchdog = fxp_watchdog; 386 387 /* 388 * Attach the interface. 389 */ 390 if_attach(ifp); 391 ether_ifattach(ifp, enaddr); 392 #if NBPFILTER > 0 393 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 394 sizeof(struct ether_header)); 395 #endif 396 397 /* 398 * Add shutdown hook so that DMA is disabled prior to reboot. Not 399 * doing do could allow DMA to corrupt kernel memory during the 400 * reboot before the driver initializes. 401 */ 402 shutdownhook_establish(fxp_shutdown, sc); 403 } 404 405 /* 406 * Device shutdown routine. Called at system shutdown after sync. The 407 * main purpose of this routine is to shut off receiver DMA so that 408 * kernel memory doesn't get clobbered during warmboot. 409 */ 410 static void 411 fxp_shutdown(sc) 412 void *sc; 413 { 414 fxp_stop((struct fxp_softc *) sc); 415 } 416 417 static int 418 fxp_ether_ioctl(ifp, cmd, data) 419 struct ifnet *ifp; 420 FXP_IOCTLCMD_TYPE cmd; 421 caddr_t data; 422 { 423 struct ifaddr *ifa = (struct ifaddr *) data; 424 struct fxp_softc *sc = ifp->if_softc; 425 426 switch (cmd) { 427 case SIOCSIFADDR: 428 ifp->if_flags |= IFF_UP; 429 430 switch (ifa->ifa_addr->sa_family) { 431 #ifdef INET 432 case AF_INET: 433 fxp_init(sc); 434 arp_ifinit(ifp, ifa); 435 break; 436 #endif 437 #ifdef NS 438 case AF_NS: 439 { 440 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 441 442 if (ns_nullhost(*ina)) 443 ina->x_host = *(union ns_host *) 444 LLADDR(ifp->if_sadl); 445 else 446 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 447 ifp->if_addrlen); 448 /* Set new address. */ 449 fxp_init(sc); 450 break; 451 } 452 #endif 453 default: 454 fxp_init(sc); 455 break; 456 } 457 break; 458 459 default: 460 return (EINVAL); 461 } 462 463 return (0); 464 } 465 466 #else /* __FreeBSD__ */ 467 468 static u_long fxp_count; 469 static char *fxp_probe __P((pcici_t, pcidi_t)); 470 static void fxp_attach __P((pcici_t, int)); 471 472 static void fxp_shutdown __P((int, void *)); 473 474 static struct pci_device fxp_device = { 475 "fxp", 476 fxp_probe, 477 fxp_attach, 478 &fxp_count, 479 NULL 480 }; 481 DATA_SET(pcidevice_set, fxp_device); 482 483 /* 484 * Return identification string if this is device is ours. 485 */ 486 static char * 487 fxp_probe(config_id, device_id) 488 pcici_t config_id; 489 pcidi_t device_id; 490 { 491 if (((device_id & 0xffff) == FXP_VENDORID_INTEL) && 492 ((device_id >> 16) & 0xffff) == FXP_DEVICEID_i82557) 493 return ("Intel EtherExpress Pro 10/100B Ethernet"); 494 495 return NULL; 496 } 497 498 static void 499 fxp_attach(config_id, unit) 500 pcici_t config_id; 501 int unit; 502 { 503 struct fxp_softc *sc; 504 vm_offset_t pbase; 505 struct ifnet *ifp; 506 int s; 507 508 sc = malloc(sizeof(struct fxp_softc), M_DEVBUF, M_NOWAIT); 509 if (sc == NULL) 510 return; 511 bzero(sc, sizeof(struct fxp_softc)); 512 callout_handle_init(&sc->stat_ch); 513 514 s = splimp(); 515 516 /* 517 * Map control/status registers. 518 */ 519 if (!pci_map_mem(config_id, FXP_PCI_MMBA, 520 (vm_offset_t *)&sc->csr, &pbase)) { 521 printf("fxp%d: couldn't map memory\n", unit); 522 goto fail; 523 } 524 525 /* 526 * Allocate our interrupt. 527 */ 528 if (!pci_map_int(config_id, fxp_intr, sc, &net_imask)) { 529 printf("fxp%d: couldn't map interrupt\n", unit); 530 goto fail; 531 } 532 533 /* Do generic parts of attach. */ 534 if (fxp_attach_common(sc, sc->arpcom.ac_enaddr)) { 535 /* Failed! */ 536 (void) pci_unmap_int(config_id); 537 goto fail; 538 } 539 540 printf("fxp%d: Ethernet address %6D%s\n", unit, 541 sc->arpcom.ac_enaddr, ":", sc->phy_10Mbps_only ? ", 10Mbps" : ""); 542 543 ifp = &sc->arpcom.ac_if; 544 ifp->if_unit = unit; 545 ifp->if_name = "fxp"; 546 ifp->if_output = ether_output; 547 ifp->if_baudrate = 100000000; 548 ifp->if_init = fxp_init; 549 ifp->if_softc = sc; 550 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 551 ifp->if_ioctl = fxp_ioctl; 552 ifp->if_start = fxp_start; 553 ifp->if_watchdog = fxp_watchdog; 554 555 /* 556 * Attach the interface. 557 */ 558 if_attach(ifp); 559 ether_ifattach(ifp); 560 #if NBPFILTER > 0 561 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header)); 562 #endif 563 564 /* 565 * Add shutdown hook so that DMA is disabled prior to reboot. Not 566 * doing do could allow DMA to corrupt kernel memory during the 567 * reboot before the driver initializes. 568 */ 569 at_shutdown(fxp_shutdown, sc, SHUTDOWN_POST_SYNC); 570 571 splx(s); 572 return; 573 574 fail: 575 free(sc, M_DEVBUF); 576 splx(s); 577 } 578 579 /* 580 * Device shutdown routine. Called at system shutdown after sync. The 581 * main purpose of this routine is to shut off receiver DMA so that 582 * kernel memory doesn't get clobbered during warmboot. 583 */ 584 static void 585 fxp_shutdown(howto, sc) 586 int howto; 587 void *sc; 588 { 589 fxp_stop((struct fxp_softc *) sc); 590 } 591 592 #endif /* __NetBSD__ */ 593 594 /************************************************************* 595 * End of operating system-specific autoconfiguration glue 596 *************************************************************/ 597 598 /* 599 * Do generic parts of attach. 600 */ 601 static int 602 fxp_attach_common(sc, enaddr) 603 struct fxp_softc *sc; 604 u_int8_t *enaddr; 605 { 606 u_int16_t data; 607 int i, nmedia, defmedia; 608 const int *media; 609 610 /* 611 * Reset to a stable state. 612 */ 613 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 614 DELAY(10); 615 616 sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB, 617 M_DEVBUF, M_NOWAIT); 618 if (sc->cbl_base == NULL) 619 goto fail; 620 621 sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF, M_NOWAIT); 622 if (sc->fxp_stats == NULL) 623 goto fail; 624 bzero(sc->fxp_stats, sizeof(struct fxp_stats)); 625 626 sc->mcsp = malloc(sizeof(struct fxp_cb_mcs), M_DEVBUF, M_NOWAIT); 627 if (sc->mcsp == NULL) 628 goto fail; 629 630 /* 631 * Pre-allocate our receive buffers. 632 */ 633 for (i = 0; i < FXP_NRFABUFS; i++) { 634 if (fxp_add_rfabuf(sc, NULL) != 0) { 635 goto fail; 636 } 637 } 638 639 /* 640 * Get info about the primary PHY 641 */ 642 fxp_read_eeprom(sc, (u_int16_t *)&data, 6, 1); 643 sc->phy_primary_addr = data & 0xff; 644 sc->phy_primary_device = (data >> 8) & 0x3f; 645 sc->phy_10Mbps_only = data >> 15; 646 647 /* 648 * Read MAC address. 649 */ 650 fxp_read_eeprom(sc, (u_int16_t *)enaddr, 0, 3); 651 652 /* 653 * Initialize the media structures. 654 */ 655 656 media = fxp_media_default; 657 nmedia = sizeof(fxp_media_default) / sizeof(fxp_media_default[0]); 658 defmedia = FXP_MEDIA_DEFAULT_DEFMEDIA; 659 660 for (i = 0; i < NFXPMEDIA; i++) { 661 if (sc->phy_primary_device == fxp_media[i].fsm_phy) { 662 media = fxp_media[i].fsm_media; 663 nmedia = fxp_media[i].fsm_nmedia; 664 defmedia = fxp_media[i].fsm_defmedia; 665 } 666 } 667 668 ifmedia_init(&sc->sc_media, 0, fxp_mediachange, fxp_mediastatus); 669 for (i = 0; i < nmedia; i++) { 670 if (IFM_SUBTYPE(media[i]) == IFM_100_TX && sc->phy_10Mbps_only) 671 continue; 672 ifmedia_add(&sc->sc_media, media[i], 0, NULL); 673 } 674 ifmedia_set(&sc->sc_media, defmedia); 675 676 return (0); 677 678 fail: 679 printf(FXP_FORMAT ": Failed to malloc memory\n", FXP_ARGS(sc)); 680 if (sc->cbl_base) 681 free(sc->cbl_base, M_DEVBUF); 682 if (sc->fxp_stats) 683 free(sc->fxp_stats, M_DEVBUF); 684 if (sc->mcsp) 685 free(sc->mcsp, M_DEVBUF); 686 /* frees entire chain */ 687 if (sc->rfa_headm) 688 m_freem(sc->rfa_headm); 689 690 return (ENOMEM); 691 } 692 693 /* 694 * Read from the serial EEPROM. Basically, you manually shift in 695 * the read opcode (one bit at a time) and then shift in the address, 696 * and then you shift out the data (all of this one bit at a time). 697 * The word size is 16 bits, so you have to provide the address for 698 * every 16 bits of data. 699 */ 700 static void 701 fxp_read_eeprom(sc, data, offset, words) 702 struct fxp_softc *sc; 703 u_short *data; 704 int offset; 705 int words; 706 { 707 u_int16_t reg; 708 int i, x; 709 710 for (i = 0; i < words; i++) { 711 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 712 /* 713 * Shift in read opcode. 714 */ 715 for (x = 3; x > 0; x--) { 716 if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) { 717 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 718 } else { 719 reg = FXP_EEPROM_EECS; 720 } 721 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 722 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 723 reg | FXP_EEPROM_EESK); 724 DELAY(1); 725 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 726 DELAY(1); 727 } 728 /* 729 * Shift in address. 730 */ 731 for (x = 6; x > 0; x--) { 732 if ((i + offset) & (1 << (x - 1))) { 733 reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 734 } else { 735 reg = FXP_EEPROM_EECS; 736 } 737 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 738 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 739 reg | FXP_EEPROM_EESK); 740 DELAY(1); 741 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 742 DELAY(1); 743 } 744 reg = FXP_EEPROM_EECS; 745 data[i] = 0; 746 /* 747 * Shift out data. 748 */ 749 for (x = 16; x > 0; x--) { 750 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 751 reg | FXP_EEPROM_EESK); 752 DELAY(1); 753 if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & 754 FXP_EEPROM_EEDO) 755 data[i] |= (1 << (x - 1)); 756 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 757 DELAY(1); 758 } 759 CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 760 DELAY(1); 761 } 762 } 763 764 /* 765 * Start packet transmission on the interface. 766 */ 767 static void 768 fxp_start(ifp) 769 struct ifnet *ifp; 770 { 771 struct fxp_softc *sc = ifp->if_softc; 772 struct fxp_cb_tx *txp; 773 struct mbuf *m, *mb_head; 774 int segment, first = 1; 775 776 txloop: 777 /* 778 * See if we're all filled up with buffers to transmit, or 779 * if we need to suspend xmit until the multicast filter 780 * has been reprogrammed (which can only be done at the 781 * head of the command chain). 782 */ 783 if (sc->tx_queued >= FXP_NTXCB || sc->need_mcsetup) 784 return; 785 786 /* 787 * Grab a packet to transmit. 788 */ 789 IF_DEQUEUE(&ifp->if_snd, mb_head); 790 if (mb_head == NULL) { 791 /* 792 * No more packets to send. 793 */ 794 return; 795 } 796 797 /* 798 * Get pointer to next available (unused) descriptor. 799 */ 800 txp = sc->cbl_last->next; 801 802 /* 803 * Go through each of the mbufs in the chain and initialize 804 * the transmit buffers descriptors with the physical address 805 * and size of the mbuf. 806 */ 807 tbdinit: 808 for (m = mb_head, segment = 0; m != NULL; m = m->m_next) { 809 if (m->m_len != 0) { 810 if (segment == FXP_NTXSEG) 811 break; 812 txp->tbd[segment].tb_addr = 813 vtophys(mtod(m, vm_offset_t)); 814 txp->tbd[segment].tb_size = m->m_len; 815 segment++; 816 } 817 } 818 if (m != NULL) { 819 struct mbuf *mn; 820 821 /* 822 * We ran out of segments. We have to recopy this mbuf 823 * chain first. 824 */ 825 MGETHDR(mn, M_DONTWAIT, MT_DATA); 826 if (mn == NULL) { 827 m_freem(mb_head); 828 return; 829 } 830 if (mb_head->m_pkthdr.len > MHLEN) { 831 MCLGET(mn, M_DONTWAIT); 832 if ((mn->m_flags & M_EXT) == 0) { 833 m_freem(mn); 834 m_freem(mb_head); 835 return; 836 } 837 } 838 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 839 mtod(mn, caddr_t)); 840 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 841 m_freem(mb_head); 842 mb_head = mn; 843 goto tbdinit; 844 } 845 846 txp->tbd_number = segment; 847 txp->mb_head = mb_head; 848 849 /* 850 * Finish the initialization of this TxCB. 851 */ 852 txp->cb_status = 0; 853 txp->cb_command = 854 FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S; 855 txp->tx_threshold = tx_threshold; 856 857 /* 858 * Advance the end-of-list forward. 859 */ 860 sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S; 861 sc->cbl_last = txp; 862 863 /* 864 * Advance the beginning of the list forward if there are 865 * no other packets queued (when nothing is queued, cbl_first 866 * sits on the last TxCB that was sent out).. 867 */ 868 if (sc->tx_queued == 0) 869 sc->cbl_first = txp; 870 871 sc->tx_queued++; 872 873 /* 874 * Only need to wait prior to the first resume command. 875 */ 876 if (first) { 877 first--; 878 fxp_scb_wait(sc); 879 } 880 881 /* 882 * Resume transmission if suspended. 883 */ 884 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_RESUME); 885 886 #if NBPFILTER > 0 887 /* 888 * Pass packet to bpf if there is a listener. 889 */ 890 if (ifp->if_bpf) 891 bpf_mtap(FXP_BPFTAP_ARG(ifp), mb_head); 892 #endif 893 /* 894 * Set a 5 second timer just in case we don't hear from the 895 * card again. 896 */ 897 ifp->if_timer = 5; 898 899 goto txloop; 900 } 901 902 /* 903 * Process interface interrupts. 904 */ 905 static FXP_INTR_TYPE 906 fxp_intr(arg) 907 void *arg; 908 { 909 struct fxp_softc *sc = arg; 910 struct ifnet *ifp = &sc->sc_if; 911 u_int8_t statack; 912 #if defined(__NetBSD__) 913 int claimed = 0; 914 #endif 915 916 while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) { 917 #if defined(__NetBSD__) 918 claimed = 1; 919 #endif 920 /* 921 * First ACK all the interrupts in this pass. 922 */ 923 CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack); 924 925 /* 926 * Process receiver interrupts. If a no-resource (RNR) 927 * condition exists, get whatever packets we can and 928 * re-start the receiver. 929 */ 930 if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) { 931 struct mbuf *m; 932 struct fxp_rfa *rfa; 933 rcvloop: 934 m = sc->rfa_headm; 935 rfa = (struct fxp_rfa *)(m->m_ext.ext_buf + 936 RFA_ALIGNMENT_FUDGE); 937 938 if (rfa->rfa_status & FXP_RFA_STATUS_C) { 939 /* 940 * Remove first packet from the chain. 941 */ 942 sc->rfa_headm = m->m_next; 943 m->m_next = NULL; 944 945 /* 946 * Add a new buffer to the receive chain. 947 * If this fails, the old buffer is recycled 948 * instead. 949 */ 950 if (fxp_add_rfabuf(sc, m) == 0) { 951 struct ether_header *eh; 952 u_int16_t total_len; 953 954 total_len = rfa->actual_size & 955 (MCLBYTES - 1); 956 if (total_len < 957 sizeof(struct ether_header)) { 958 m_freem(m); 959 goto rcvloop; 960 } 961 m->m_pkthdr.rcvif = ifp; 962 m->m_pkthdr.len = m->m_len = 963 total_len - 964 sizeof(struct ether_header); 965 eh = mtod(m, struct ether_header *); 966 #if NBPFILTER > 0 967 if (ifp->if_bpf) { 968 bpf_tap(FXP_BPFTAP_ARG(ifp), 969 mtod(m, caddr_t), 970 total_len); 971 /* 972 * Only pass this packet up 973 * if it is for us. 974 */ 975 if ((ifp->if_flags & 976 IFF_PROMISC) && 977 (rfa->rfa_status & 978 FXP_RFA_STATUS_IAMATCH) && 979 (eh->ether_dhost[0] & 1) 980 == 0) { 981 m_freem(m); 982 goto rcvloop; 983 } 984 } 985 #endif /* NBPFILTER > 0 */ 986 m->m_data += 987 sizeof(struct ether_header); 988 ether_input(ifp, eh, m); 989 } 990 goto rcvloop; 991 } 992 if (statack & FXP_SCB_STATACK_RNR) { 993 fxp_scb_wait(sc); 994 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 995 vtophys(sc->rfa_headm->m_ext.ext_buf) + 996 RFA_ALIGNMENT_FUDGE); 997 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, 998 FXP_SCB_COMMAND_RU_START); 999 } 1000 } 1001 /* 1002 * Free any finished transmit mbuf chains. 1003 */ 1004 if (statack & FXP_SCB_STATACK_CNA) { 1005 struct fxp_cb_tx *txp; 1006 1007 for (txp = sc->cbl_first; sc->tx_queued && 1008 (txp->cb_status & FXP_CB_STATUS_C) != 0; 1009 txp = txp->next) { 1010 if (txp->mb_head != NULL) { 1011 m_freem(txp->mb_head); 1012 txp->mb_head = NULL; 1013 } 1014 sc->tx_queued--; 1015 } 1016 sc->cbl_first = txp; 1017 if (sc->tx_queued == 0) { 1018 ifp->if_timer = 0; 1019 if (sc->need_mcsetup) 1020 fxp_mc_setup(sc); 1021 } 1022 /* 1023 * Try to start more packets transmitting. 1024 */ 1025 if (ifp->if_snd.ifq_head != NULL) 1026 fxp_start(ifp); 1027 } 1028 } 1029 #if defined(__NetBSD__) 1030 return (claimed); 1031 #endif 1032 } 1033 1034 /* 1035 * Update packet in/out/collision statistics. The i82557 doesn't 1036 * allow you to access these counters without doing a fairly 1037 * expensive DMA to get _all_ of the statistics it maintains, so 1038 * we do this operation here only once per second. The statistics 1039 * counters in the kernel are updated from the previous dump-stats 1040 * DMA and then a new dump-stats DMA is started. The on-chip 1041 * counters are zeroed when the DMA completes. If we can't start 1042 * the DMA immediately, we don't wait - we just prepare to read 1043 * them again next time. 1044 */ 1045 void 1046 fxp_stats_update(arg) 1047 void *arg; 1048 { 1049 struct fxp_softc *sc = arg; 1050 struct ifnet *ifp = &sc->sc_if; 1051 struct fxp_stats *sp = sc->fxp_stats; 1052 int s; 1053 1054 ifp->if_opackets += sp->tx_good; 1055 ifp->if_collisions += sp->tx_total_collisions; 1056 ifp->if_ipackets += sp->rx_good; 1057 if (sp->rx_good) { 1058 ifp->if_ipackets += sp->rx_good; 1059 sc->rx_idle_secs = 0; 1060 } else { 1061 sc->rx_idle_secs++; 1062 } 1063 ifp->if_ierrors += 1064 sp->rx_crc_errors + 1065 sp->rx_alignment_errors + 1066 sp->rx_rnr_errors + 1067 sp->rx_overrun_errors; 1068 /* 1069 * If any transmit underruns occured, bump up the transmit 1070 * threshold by another 512 bytes (64 * 8). 1071 */ 1072 if (sp->tx_underruns) { 1073 ifp->if_oerrors += sp->tx_underruns; 1074 if (tx_threshold < 192) 1075 tx_threshold += 64; 1076 } 1077 s = splimp(); 1078 /* 1079 * If we haven't received any packets in FXP_MAC_RX_IDLE seconds, 1080 * then assume the receiver has locked up and attempt to clear 1081 * the condition by reprogramming the multicast filter. This is 1082 * a work-around for a bug in the 82557 where the receiver locks 1083 * up if it gets certain types of garbage in the syncronization 1084 * bits prior to the packet header. This bug is supposed to only 1085 * occur in 10Mbps mode, but has been seen to occur in 100Mbps 1086 * mode as well (perhaps due to a 10/100 speed transition). 1087 */ 1088 if (sc->rx_idle_secs > FXP_MAX_RX_IDLE) { 1089 sc->rx_idle_secs = 0; 1090 fxp_mc_setup(sc); 1091 } 1092 /* 1093 * If there is no pending command, start another stats 1094 * dump. Otherwise punt for now. 1095 */ 1096 if (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) == 0) { 1097 /* 1098 * Start another stats dump. 1099 */ 1100 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, 1101 FXP_SCB_COMMAND_CU_DUMPRESET); 1102 } else { 1103 /* 1104 * A previous command is still waiting to be accepted. 1105 * Just zero our copy of the stats and wait for the 1106 * next timer event to update them. 1107 */ 1108 sp->tx_good = 0; 1109 sp->tx_underruns = 0; 1110 sp->tx_total_collisions = 0; 1111 1112 sp->rx_good = 0; 1113 sp->rx_crc_errors = 0; 1114 sp->rx_alignment_errors = 0; 1115 sp->rx_rnr_errors = 0; 1116 sp->rx_overrun_errors = 0; 1117 } 1118 splx(s); 1119 /* 1120 * Schedule another timeout one second from now. 1121 */ 1122 sc->stat_ch = timeout(fxp_stats_update, sc, hz); 1123 } 1124 1125 /* 1126 * Stop the interface. Cancels the statistics updater and resets 1127 * the interface. 1128 */ 1129 static void 1130 fxp_stop(sc) 1131 struct fxp_softc *sc; 1132 { 1133 struct ifnet *ifp = &sc->sc_if; 1134 struct fxp_cb_tx *txp; 1135 int i; 1136 1137 /* 1138 * Cancel stats updater. 1139 */ 1140 untimeout(fxp_stats_update, sc, sc->stat_ch); 1141 1142 /* 1143 * Issue software reset 1144 */ 1145 CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 1146 DELAY(10); 1147 1148 /* 1149 * Release any xmit buffers. 1150 */ 1151 for (txp = sc->cbl_first; txp != NULL && txp->mb_head != NULL; 1152 txp = txp->next) { 1153 m_freem(txp->mb_head); 1154 txp->mb_head = NULL; 1155 } 1156 sc->tx_queued = 0; 1157 1158 /* 1159 * Free all the receive buffers then reallocate/reinitialize 1160 */ 1161 if (sc->rfa_headm != NULL) 1162 m_freem(sc->rfa_headm); 1163 sc->rfa_headm = NULL; 1164 sc->rfa_tailm = NULL; 1165 for (i = 0; i < FXP_NRFABUFS; i++) { 1166 if (fxp_add_rfabuf(sc, NULL) != 0) { 1167 /* 1168 * This "can't happen" - we're at splimp() 1169 * and we just freed all the buffers we need 1170 * above. 1171 */ 1172 panic("fxp_stop: no buffers!"); 1173 } 1174 } 1175 1176 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1177 ifp->if_timer = 0; 1178 } 1179 1180 /* 1181 * Watchdog/transmission transmit timeout handler. Called when a 1182 * transmission is started on the interface, but no interrupt is 1183 * received before the timeout. This usually indicates that the 1184 * card has wedged for some reason. 1185 */ 1186 static void 1187 fxp_watchdog(ifp) 1188 struct ifnet *ifp; 1189 { 1190 struct fxp_softc *sc = ifp->if_softc; 1191 1192 printf(FXP_FORMAT ": device timeout\n", FXP_ARGS(sc)); 1193 ifp->if_oerrors++; 1194 1195 fxp_init(sc); 1196 } 1197 1198 static void 1199 fxp_init(xsc) 1200 void *xsc; 1201 { 1202 struct fxp_softc *sc = xsc; 1203 struct ifnet *ifp = &sc->sc_if; 1204 struct fxp_cb_config *cbp; 1205 struct fxp_cb_ias *cb_ias; 1206 struct fxp_cb_tx *txp; 1207 int i, s, prm; 1208 1209 s = splimp(); 1210 /* 1211 * Cancel any pending I/O 1212 */ 1213 fxp_stop(sc); 1214 1215 prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0; 1216 sc->promisc_mode = prm; 1217 1218 /* 1219 * Initialize base of CBL and RFA memory. Loading with zero 1220 * sets it up for regular linear addressing. 1221 */ 1222 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0); 1223 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_BASE); 1224 1225 fxp_scb_wait(sc); 1226 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_BASE); 1227 1228 /* 1229 * Initialize base of dump-stats buffer. 1230 */ 1231 fxp_scb_wait(sc); 1232 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(sc->fxp_stats)); 1233 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_DUMP_ADR); 1234 1235 /* 1236 * We temporarily use memory that contains the TxCB list to 1237 * construct the config CB. The TxCB list memory is rebuilt 1238 * later. 1239 */ 1240 cbp = (struct fxp_cb_config *) sc->cbl_base; 1241 1242 /* 1243 * This bcopy is kind of disgusting, but there are a bunch of must be 1244 * zero and must be one bits in this structure and this is the easiest 1245 * way to initialize them all to proper values. 1246 */ 1247 bcopy(fxp_cb_config_template, (void *)&cbp->cb_status, 1248 sizeof(fxp_cb_config_template)); 1249 1250 cbp->cb_status = 0; 1251 cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL; 1252 cbp->link_addr = -1; /* (no) next command */ 1253 cbp->byte_count = 22; /* (22) bytes to config */ 1254 cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */ 1255 cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */ 1256 cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */ 1257 cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */ 1258 cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */ 1259 cbp->dma_bce = 0; /* (disable) dma max counters */ 1260 cbp->late_scb = 0; /* (don't) defer SCB update */ 1261 cbp->tno_int = 0; /* (disable) tx not okay interrupt */ 1262 cbp->ci_int = 0; /* interrupt on CU not active */ 1263 cbp->save_bf = prm; /* save bad frames */ 1264 cbp->disc_short_rx = !prm; /* discard short packets */ 1265 cbp->underrun_retry = 1; /* retry mode (1) on DMA underrun */ 1266 cbp->mediatype = !sc->phy_10Mbps_only; /* interface mode */ 1267 cbp->nsai = 1; /* (don't) disable source addr insert */ 1268 cbp->preamble_length = 2; /* (7 byte) preamble */ 1269 cbp->loopback = 0; /* (don't) loopback */ 1270 cbp->linear_priority = 0; /* (normal CSMA/CD operation) */ 1271 cbp->linear_pri_mode = 0; /* (wait after xmit only) */ 1272 cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */ 1273 cbp->promiscuous = prm; /* promiscuous mode */ 1274 cbp->bcast_disable = 0; /* (don't) disable broadcasts */ 1275 cbp->crscdt = 0; /* (CRS only) */ 1276 cbp->stripping = !prm; /* truncate rx packet to byte count */ 1277 cbp->padding = 1; /* (do) pad short tx packets */ 1278 cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */ 1279 cbp->force_fdx = 0; /* (don't) force full duplex */ 1280 cbp->fdx_pin_en = 1; /* (enable) FDX# pin */ 1281 cbp->multi_ia = 0; /* (don't) accept multiple IAs */ 1282 cbp->mc_all = sc->all_mcasts;/* accept all multicasts */ 1283 1284 /* 1285 * Start the config command/DMA. 1286 */ 1287 fxp_scb_wait(sc); 1288 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&cbp->cb_status)); 1289 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1290 /* ...and wait for it to complete. */ 1291 while (!(cbp->cb_status & FXP_CB_STATUS_C)); 1292 1293 /* 1294 * Now initialize the station address. Temporarily use the TxCB 1295 * memory area like we did above for the config CB. 1296 */ 1297 cb_ias = (struct fxp_cb_ias *) sc->cbl_base; 1298 cb_ias->cb_status = 0; 1299 cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL; 1300 cb_ias->link_addr = -1; 1301 #if defined(__NetBSD__) 1302 bcopy(LLADDR(ifp->if_sadl), (void *)cb_ias->macaddr, 6); 1303 #else 1304 bcopy(sc->arpcom.ac_enaddr, (void *)cb_ias->macaddr, 1305 sizeof(sc->arpcom.ac_enaddr)); 1306 #endif /* __NetBSD__ */ 1307 1308 /* 1309 * Start the IAS (Individual Address Setup) command/DMA. 1310 */ 1311 fxp_scb_wait(sc); 1312 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1313 /* ...and wait for it to complete. */ 1314 while (!(cb_ias->cb_status & FXP_CB_STATUS_C)); 1315 1316 /* 1317 * Initialize transmit control block (TxCB) list. 1318 */ 1319 1320 txp = sc->cbl_base; 1321 bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB); 1322 for (i = 0; i < FXP_NTXCB; i++) { 1323 txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK; 1324 txp[i].cb_command = FXP_CB_COMMAND_NOP; 1325 txp[i].link_addr = vtophys(&txp[(i + 1) & FXP_TXCB_MASK].cb_status); 1326 txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]); 1327 txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK]; 1328 } 1329 /* 1330 * Set the suspend flag on the first TxCB and start the control 1331 * unit. It will execute the NOP and then suspend. 1332 */ 1333 txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S; 1334 sc->cbl_first = sc->cbl_last = txp; 1335 sc->tx_queued = 1; 1336 1337 fxp_scb_wait(sc); 1338 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1339 1340 /* 1341 * Initialize receiver buffer area - RFA. 1342 */ 1343 fxp_scb_wait(sc); 1344 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 1345 vtophys(sc->rfa_headm->m_ext.ext_buf) + RFA_ALIGNMENT_FUDGE); 1346 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_START); 1347 1348 /* 1349 * Set current media. 1350 */ 1351 fxp_set_media(sc, sc->sc_media.ifm_cur->ifm_media); 1352 1353 ifp->if_flags |= IFF_RUNNING; 1354 ifp->if_flags &= ~IFF_OACTIVE; 1355 splx(s); 1356 1357 /* 1358 * Start stats updater. 1359 */ 1360 sc->stat_ch = timeout(fxp_stats_update, sc, hz); 1361 } 1362 1363 void 1364 fxp_set_media(sc, media) 1365 struct fxp_softc *sc; 1366 int media; 1367 { 1368 1369 switch (sc->phy_primary_device) { 1370 case FXP_PHY_DP83840: 1371 case FXP_PHY_DP83840A: 1372 fxp_mdi_write(sc, sc->phy_primary_addr, FXP_DP83840_PCR, 1373 fxp_mdi_read(sc, sc->phy_primary_addr, FXP_DP83840_PCR) | 1374 FXP_DP83840_PCR_LED4_MODE | /* LED4 always indicates duplex */ 1375 FXP_DP83840_PCR_F_CONNECT | /* force link disconnect bypass */ 1376 FXP_DP83840_PCR_BIT10); /* XXX I have no idea */ 1377 /* fall through */ 1378 case FXP_PHY_82555: 1379 if (IFM_SUBTYPE(media) != IFM_AUTO) { 1380 int flags; 1381 1382 flags = (IFM_SUBTYPE(media) == IFM_100_TX) ? 1383 FXP_PHY_BMCR_SPEED_100M : 0; 1384 flags |= (media & IFM_FDX) ? 1385 FXP_PHY_BMCR_FULLDUPLEX : 0; 1386 fxp_mdi_write(sc, sc->phy_primary_addr, 1387 FXP_PHY_BMCR, 1388 (fxp_mdi_read(sc, sc->phy_primary_addr, 1389 FXP_PHY_BMCR) & 1390 ~(FXP_PHY_BMCR_AUTOEN | FXP_PHY_BMCR_SPEED_100M | 1391 FXP_PHY_BMCR_FULLDUPLEX)) | flags); 1392 } else { 1393 fxp_mdi_write(sc, sc->phy_primary_addr, 1394 FXP_PHY_BMCR, 1395 (fxp_mdi_read(sc, sc->phy_primary_addr, 1396 FXP_PHY_BMCR) | FXP_PHY_BMCR_AUTOEN)); 1397 } 1398 break; 1399 /* 1400 * The Seeq 80c24 doesn't have a PHY programming interface, so do 1401 * nothing. 1402 */ 1403 case FXP_PHY_80C24: 1404 break; 1405 default: 1406 printf(FXP_FORMAT 1407 ": warning: unsupported PHY, type = %d, addr = %d\n", 1408 FXP_ARGS(sc), sc->phy_primary_device, 1409 sc->phy_primary_addr); 1410 } 1411 } 1412 1413 /* 1414 * Change media according to request. 1415 */ 1416 int 1417 fxp_mediachange(ifp) 1418 struct ifnet *ifp; 1419 { 1420 struct fxp_softc *sc = ifp->if_softc; 1421 struct ifmedia *ifm = &sc->sc_media; 1422 1423 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 1424 return (EINVAL); 1425 1426 fxp_set_media(sc, ifm->ifm_media); 1427 return (0); 1428 } 1429 1430 /* 1431 * Notify the world which media we're using. 1432 */ 1433 void 1434 fxp_mediastatus(ifp, ifmr) 1435 struct ifnet *ifp; 1436 struct ifmediareq *ifmr; 1437 { 1438 struct fxp_softc *sc = ifp->if_softc; 1439 int flags; 1440 1441 switch (sc->phy_primary_device) { 1442 case FXP_PHY_DP83840: 1443 case FXP_PHY_DP83840A: 1444 case FXP_PHY_82555: 1445 flags = fxp_mdi_read(sc, sc->phy_primary_addr, FXP_PHY_BMCR); 1446 ifmr->ifm_active = IFM_ETHER; 1447 if (flags & FXP_PHY_BMCR_AUTOEN) 1448 ifmr->ifm_active |= IFM_AUTO; 1449 else { 1450 if (flags & FXP_PHY_BMCR_SPEED_100M) 1451 ifmr->ifm_active |= IFM_100_TX; 1452 else 1453 ifmr->ifm_active |= IFM_10_T; 1454 1455 if (flags & FXP_PHY_BMCR_FULLDUPLEX) 1456 ifmr->ifm_active |= IFM_FDX; 1457 } 1458 break; 1459 1460 case FXP_PHY_80C24: 1461 default: 1462 ifmr->ifm_active = IFM_ETHER|IFM_MANUAL; /* XXX IFM_AUTO ? */ 1463 } 1464 } 1465 1466 /* 1467 * Add a buffer to the end of the RFA buffer list. 1468 * Return 0 if successful, 1 for failure. A failure results in 1469 * adding the 'oldm' (if non-NULL) on to the end of the list - 1470 * tossing out it's old contents and recycling it. 1471 * The RFA struct is stuck at the beginning of mbuf cluster and the 1472 * data pointer is fixed up to point just past it. 1473 */ 1474 static int 1475 fxp_add_rfabuf(sc, oldm) 1476 struct fxp_softc *sc; 1477 struct mbuf *oldm; 1478 { 1479 u_int32_t v; 1480 struct mbuf *m; 1481 struct fxp_rfa *rfa, *p_rfa; 1482 1483 MGETHDR(m, M_DONTWAIT, MT_DATA); 1484 if (m != NULL) { 1485 MCLGET(m, M_DONTWAIT); 1486 if ((m->m_flags & M_EXT) == 0) { 1487 m_freem(m); 1488 if (oldm == NULL) 1489 return 1; 1490 m = oldm; 1491 m->m_data = m->m_ext.ext_buf; 1492 } 1493 } else { 1494 if (oldm == NULL) 1495 return 1; 1496 m = oldm; 1497 m->m_data = m->m_ext.ext_buf; 1498 } 1499 1500 /* 1501 * Move the data pointer up so that the incoming data packet 1502 * will be 32-bit aligned. 1503 */ 1504 m->m_data += RFA_ALIGNMENT_FUDGE; 1505 1506 /* 1507 * Get a pointer to the base of the mbuf cluster and move 1508 * data start past it. 1509 */ 1510 rfa = mtod(m, struct fxp_rfa *); 1511 m->m_data += sizeof(struct fxp_rfa); 1512 rfa->size = MCLBYTES - sizeof(struct fxp_rfa) - RFA_ALIGNMENT_FUDGE; 1513 1514 /* 1515 * Initialize the rest of the RFA. Note that since the RFA 1516 * is misaligned, we cannot store values directly. Instead, 1517 * we use an optimized, inline copy. 1518 */ 1519 rfa->rfa_status = 0; 1520 rfa->rfa_control = FXP_RFA_CONTROL_EL; 1521 rfa->actual_size = 0; 1522 1523 v = -1; 1524 fxp_lwcopy(&v, &rfa->link_addr); 1525 fxp_lwcopy(&v, &rfa->rbd_addr); 1526 1527 /* 1528 * If there are other buffers already on the list, attach this 1529 * one to the end by fixing up the tail to point to this one. 1530 */ 1531 if (sc->rfa_headm != NULL) { 1532 p_rfa = (struct fxp_rfa *) (sc->rfa_tailm->m_ext.ext_buf + 1533 RFA_ALIGNMENT_FUDGE); 1534 sc->rfa_tailm->m_next = m; 1535 v = vtophys(rfa); 1536 fxp_lwcopy(&v, &p_rfa->link_addr); 1537 p_rfa->rfa_control &= ~FXP_RFA_CONTROL_EL; 1538 } else { 1539 sc->rfa_headm = m; 1540 } 1541 sc->rfa_tailm = m; 1542 1543 return (m == oldm); 1544 } 1545 1546 static volatile int 1547 fxp_mdi_read(sc, phy, reg) 1548 struct fxp_softc *sc; 1549 int phy; 1550 int reg; 1551 { 1552 int count = 10000; 1553 int value; 1554 1555 CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 1556 (FXP_MDI_READ << 26) | (reg << 16) | (phy << 21)); 1557 1558 while (((value = CSR_READ_4(sc, FXP_CSR_MDICONTROL)) & 0x10000000) == 0 1559 && count--) 1560 DELAY(10); 1561 1562 if (count <= 0) 1563 printf(FXP_FORMAT ": fxp_mdi_read: timed out\n", 1564 FXP_ARGS(sc)); 1565 1566 return (value & 0xffff); 1567 } 1568 1569 static void 1570 fxp_mdi_write(sc, phy, reg, value) 1571 struct fxp_softc *sc; 1572 int phy; 1573 int reg; 1574 int value; 1575 { 1576 int count = 10000; 1577 1578 CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 1579 (FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21) | 1580 (value & 0xffff)); 1581 1582 while((CSR_READ_4(sc, FXP_CSR_MDICONTROL) & 0x10000000) == 0 && 1583 count--) 1584 DELAY(10); 1585 1586 if (count <= 0) 1587 printf(FXP_FORMAT ": fxp_mdi_write: timed out\n", 1588 FXP_ARGS(sc)); 1589 } 1590 1591 static int 1592 fxp_ioctl(ifp, command, data) 1593 struct ifnet *ifp; 1594 FXP_IOCTLCMD_TYPE command; 1595 caddr_t data; 1596 { 1597 struct fxp_softc *sc = ifp->if_softc; 1598 struct ifreq *ifr = (struct ifreq *)data; 1599 int s, error = 0; 1600 1601 s = splimp(); 1602 1603 switch (command) { 1604 1605 case SIOCSIFADDR: 1606 #if !defined(__NetBSD__) 1607 case SIOCGIFADDR: 1608 case SIOCSIFMTU: 1609 #endif 1610 error = ether_ioctl(ifp, command, data); 1611 break; 1612 1613 case SIOCSIFFLAGS: 1614 sc->all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; 1615 1616 /* 1617 * If interface is marked up and not running, then start it. 1618 * If it is marked down and running, stop it. 1619 * XXX If it's up then re-initialize it. This is so flags 1620 * such as IFF_PROMISC are handled. 1621 */ 1622 if (ifp->if_flags & IFF_UP) { 1623 fxp_init(sc); 1624 } else { 1625 if (ifp->if_flags & IFF_RUNNING) 1626 fxp_stop(sc); 1627 } 1628 break; 1629 1630 case SIOCADDMULTI: 1631 case SIOCDELMULTI: 1632 sc->all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0; 1633 #if defined(__NetBSD__) 1634 error = (command == SIOCADDMULTI) ? 1635 ether_addmulti(ifr, &sc->sc_ethercom) : 1636 ether_delmulti(ifr, &sc->sc_ethercom); 1637 1638 if (error == ENETRESET) { 1639 /* 1640 * Multicast list has changed; set the hardware 1641 * filter accordingly. 1642 */ 1643 if (!sc->all_mcasts) 1644 fxp_mc_setup(sc); 1645 /* 1646 * fxp_mc_setup() can turn on all_mcasts if we run 1647 * out of space, so check it again rather than else {}. 1648 */ 1649 if (sc->all_mcasts) 1650 fxp_init(sc); 1651 error = 0; 1652 } 1653 #else /* __FreeBSD__ */ 1654 /* 1655 * Multicast list has changed; set the hardware filter 1656 * accordingly. 1657 */ 1658 if (!sc->all_mcasts) 1659 fxp_mc_setup(sc); 1660 /* 1661 * fxp_mc_setup() can turn on sc->all_mcasts, so check it 1662 * again rather than else {}. 1663 */ 1664 if (sc->all_mcasts) 1665 fxp_init(sc); 1666 error = 0; 1667 #endif /* __NetBSD__ */ 1668 break; 1669 1670 case SIOCSIFMEDIA: 1671 case SIOCGIFMEDIA: 1672 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, command); 1673 break; 1674 1675 default: 1676 error = EINVAL; 1677 } 1678 (void) splx(s); 1679 return (error); 1680 } 1681 1682 /* 1683 * Program the multicast filter. 1684 * 1685 * We have an artificial restriction that the multicast setup command 1686 * must be the first command in the chain, so we take steps to ensure 1687 * that. By requiring this, it allows us to keep the performance of 1688 * the pre-initialized command ring (esp. link pointers) by not actually 1689 * inserting the mcsetup command in the ring - i.e. it's link pointer 1690 * points to the TxCB ring, but the mcsetup descriptor itself is not part 1691 * of it. We then can do 'CU_START' on the mcsetup descriptor and have it 1692 * lead into the regular TxCB ring when it completes. 1693 * 1694 * This function must be called at splimp. 1695 */ 1696 static void 1697 fxp_mc_setup(sc) 1698 struct fxp_softc *sc; 1699 { 1700 struct fxp_cb_mcs *mcsp = sc->mcsp; 1701 struct ifnet *ifp = &sc->sc_if; 1702 struct ifmultiaddr *ifma; 1703 int nmcasts; 1704 1705 if (sc->tx_queued) { 1706 sc->need_mcsetup = 1; 1707 return; 1708 } 1709 sc->need_mcsetup = 0; 1710 1711 /* 1712 * Initialize multicast setup descriptor. 1713 */ 1714 mcsp->next = sc->cbl_base; 1715 mcsp->mb_head = NULL; 1716 mcsp->cb_status = 0; 1717 mcsp->cb_command = FXP_CB_COMMAND_MCAS | FXP_CB_COMMAND_S; 1718 mcsp->link_addr = vtophys(&sc->cbl_base->cb_status); 1719 1720 nmcasts = 0; 1721 if (!sc->all_mcasts) { 1722 for (ifma = ifp->if_multiaddrs.lh_first; ifma != NULL; 1723 ifma = ifma->ifma_link.le_next) { 1724 if (ifma->ifma_addr->sa_family != AF_LINK) 1725 continue; 1726 if (nmcasts >= MAXMCADDR) { 1727 sc->all_mcasts = 1; 1728 nmcasts = 0; 1729 break; 1730 } 1731 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 1732 (void *) &sc->mcsp->mc_addr[nmcasts][0], 6); 1733 nmcasts++; 1734 } 1735 } 1736 mcsp->mc_cnt = nmcasts * 6; 1737 sc->cbl_first = sc->cbl_last = (struct fxp_cb_tx *) mcsp; 1738 sc->tx_queued = 1; 1739 1740 /* 1741 * Wait until command unit is not active. This should never 1742 * be the case when nothing is queued, but make sure anyway. 1743 */ 1744 while ((CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS) >> 6) == 1745 FXP_SCB_CUS_ACTIVE) ; 1746 1747 /* 1748 * Start the multicast setup command. 1749 */ 1750 fxp_scb_wait(sc); 1751 CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&mcsp->cb_status)); 1752 CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START); 1753 1754 ifp->if_timer = 5; 1755 return; 1756 } 1757