1f7788e8eSJonathan Lemon /*- 2a17c678eSDavid Greenman * Copyright (c) 1995, David Greenman 33bd07cfdSJonathan Lemon * Copyright (c) 2001 Jonathan Lemon <jlemon@freebsd.org> 4a17c678eSDavid Greenman * All rights reserved. 5a17c678eSDavid Greenman * 6a17c678eSDavid Greenman * Redistribution and use in source and binary forms, with or without 7a17c678eSDavid Greenman * modification, are permitted provided that the following conditions 8a17c678eSDavid Greenman * are met: 9a17c678eSDavid Greenman * 1. Redistributions of source code must retain the above copyright 10a17c678eSDavid Greenman * notice unmodified, this list of conditions, and the following 11a17c678eSDavid Greenman * disclaimer. 12a17c678eSDavid Greenman * 2. Redistributions in binary form must reproduce the above copyright 13a17c678eSDavid Greenman * notice, this list of conditions and the following disclaimer in the 14a17c678eSDavid Greenman * documentation and/or other materials provided with the distribution. 15a17c678eSDavid Greenman * 16a17c678eSDavid Greenman * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17a17c678eSDavid Greenman * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18a17c678eSDavid Greenman * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19a17c678eSDavid Greenman * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20a17c678eSDavid Greenman * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21a17c678eSDavid Greenman * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22a17c678eSDavid Greenman * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23a17c678eSDavid Greenman * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24a17c678eSDavid Greenman * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25a17c678eSDavid Greenman * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26a17c678eSDavid Greenman * SUCH DAMAGE. 27a17c678eSDavid Greenman * 28a17c678eSDavid Greenman */ 29a17c678eSDavid Greenman 30aad970f1SDavid E. O'Brien #include <sys/cdefs.h> 31aad970f1SDavid E. O'Brien __FBSDID("$FreeBSD$"); 32aad970f1SDavid E. O'Brien 33a17c678eSDavid Greenman /* 34ae12cddaSDavid Greenman * Intel EtherExpress Pro/100B PCI Fast Ethernet driver 35a17c678eSDavid Greenman */ 36a17c678eSDavid Greenman 37a17c678eSDavid Greenman #include <sys/param.h> 38a17c678eSDavid Greenman #include <sys/systm.h> 3983e6547dSMaxime Henrion #include <sys/endian.h> 40a17c678eSDavid Greenman #include <sys/mbuf.h> 41f7788e8eSJonathan Lemon /* #include <sys/mutex.h> */ 42a17c678eSDavid Greenman #include <sys/kernel.h> 434458ac71SBruce Evans #include <sys/socket.h> 4472a32a26SJonathan Lemon #include <sys/sysctl.h> 45a17c678eSDavid Greenman 46a17c678eSDavid Greenman #include <net/if.h> 47397f9dfeSDavid Greenman #include <net/if_dl.h> 48ba8c6fd5SDavid Greenman #include <net/if_media.h> 49a17c678eSDavid Greenman 50a17c678eSDavid Greenman #include <net/bpf.h> 51ba8c6fd5SDavid Greenman #include <sys/sockio.h> 526182fdbdSPeter Wemm #include <sys/bus.h> 536182fdbdSPeter Wemm #include <machine/bus.h> 546182fdbdSPeter Wemm #include <sys/rman.h> 556182fdbdSPeter Wemm #include <machine/resource.h> 56ba8c6fd5SDavid Greenman 571d5e9e22SEivind Eklund #include <net/ethernet.h> 581d5e9e22SEivind Eklund #include <net/if_arp.h> 59ba8c6fd5SDavid Greenman 60f7788e8eSJonathan Lemon #include <machine/clock.h> /* for DELAY */ 61a17c678eSDavid Greenman 62e8c8b728SJonathan Lemon #include <net/if_types.h> 63e8c8b728SJonathan Lemon #include <net/if_vlan_var.h> 64e8c8b728SJonathan Lemon 65c8bca6dcSBill Paul #ifdef FXP_IP_CSUM_WAR 66c8bca6dcSBill Paul #include <netinet/in.h> 67c8bca6dcSBill Paul #include <netinet/in_systm.h> 68c8bca6dcSBill Paul #include <netinet/ip.h> 69c8bca6dcSBill Paul #include <machine/in_cksum.h> 70c8bca6dcSBill Paul #endif 71c8bca6dcSBill Paul 724fbd232cSWarner Losh #include <dev/pci/pcivar.h> 734fbd232cSWarner Losh #include <dev/pci/pcireg.h> /* for PCIM_CMD_xxx */ 74a17c678eSDavid Greenman 75f7788e8eSJonathan Lemon #include <dev/mii/mii.h> 76f7788e8eSJonathan Lemon #include <dev/mii/miivar.h> 77f7788e8eSJonathan Lemon 78f7788e8eSJonathan Lemon #include <dev/fxp/if_fxpreg.h> 79f7788e8eSJonathan Lemon #include <dev/fxp/if_fxpvar.h> 8072a32a26SJonathan Lemon #include <dev/fxp/rcvbundl.h> 81f7788e8eSJonathan Lemon 82f246e4a1SMatthew N. Dodd MODULE_DEPEND(fxp, pci, 1, 1, 1); 83f246e4a1SMatthew N. Dodd MODULE_DEPEND(fxp, ether, 1, 1, 1); 84f7788e8eSJonathan Lemon MODULE_DEPEND(fxp, miibus, 1, 1, 1); 85f7788e8eSJonathan Lemon #include "miibus_if.h" 864fc1dda9SAndrew Gallatin 87ba8c6fd5SDavid Greenman /* 88ba8c6fd5SDavid Greenman * NOTE! On the Alpha, we have an alignment constraint. The 89ba8c6fd5SDavid Greenman * card DMAs the packet immediately following the RFA. However, 90ba8c6fd5SDavid Greenman * the first thing in the packet is a 14-byte Ethernet header. 91ba8c6fd5SDavid Greenman * This means that the packet is misaligned. To compensate, 92ba8c6fd5SDavid Greenman * we actually offset the RFA 2 bytes into the cluster. This 93ba8c6fd5SDavid Greenman * alignes the packet after the Ethernet header at a 32-bit 94ba8c6fd5SDavid Greenman * boundary. HOWEVER! This means that the RFA is misaligned! 95ba8c6fd5SDavid Greenman */ 96ba8c6fd5SDavid Greenman #define RFA_ALIGNMENT_FUDGE 2 97ba8c6fd5SDavid Greenman 98ba8c6fd5SDavid Greenman /* 99f7788e8eSJonathan Lemon * Set initial transmit threshold at 64 (512 bytes). This is 100f7788e8eSJonathan Lemon * increased by 64 (512 bytes) at a time, to maximum of 192 101f7788e8eSJonathan Lemon * (1536 bytes), if an underrun occurs. 102f7788e8eSJonathan Lemon */ 103f7788e8eSJonathan Lemon static int tx_threshold = 64; 104f7788e8eSJonathan Lemon 105f7788e8eSJonathan Lemon /* 106f7788e8eSJonathan Lemon * The configuration byte map has several undefined fields which 107f7788e8eSJonathan Lemon * must be one or must be zero. Set up a template for these bits 108f7788e8eSJonathan Lemon * only, (assuming a 82557 chip) leaving the actual configuration 109f7788e8eSJonathan Lemon * to fxp_init. 110f7788e8eSJonathan Lemon * 111f7788e8eSJonathan Lemon * See struct fxp_cb_config for the bit definitions. 112f7788e8eSJonathan Lemon */ 113f7788e8eSJonathan Lemon static u_char fxp_cb_config_template[] = { 114f7788e8eSJonathan Lemon 0x0, 0x0, /* cb_status */ 115f7788e8eSJonathan Lemon 0x0, 0x0, /* cb_command */ 116f7788e8eSJonathan Lemon 0x0, 0x0, 0x0, 0x0, /* link_addr */ 117f7788e8eSJonathan Lemon 0x0, /* 0 */ 118f7788e8eSJonathan Lemon 0x0, /* 1 */ 119f7788e8eSJonathan Lemon 0x0, /* 2 */ 120f7788e8eSJonathan Lemon 0x0, /* 3 */ 121f7788e8eSJonathan Lemon 0x0, /* 4 */ 122f7788e8eSJonathan Lemon 0x0, /* 5 */ 123f7788e8eSJonathan Lemon 0x32, /* 6 */ 124f7788e8eSJonathan Lemon 0x0, /* 7 */ 125f7788e8eSJonathan Lemon 0x0, /* 8 */ 126f7788e8eSJonathan Lemon 0x0, /* 9 */ 127f7788e8eSJonathan Lemon 0x6, /* 10 */ 128f7788e8eSJonathan Lemon 0x0, /* 11 */ 129f7788e8eSJonathan Lemon 0x0, /* 12 */ 130f7788e8eSJonathan Lemon 0x0, /* 13 */ 131f7788e8eSJonathan Lemon 0xf2, /* 14 */ 132f7788e8eSJonathan Lemon 0x48, /* 15 */ 133f7788e8eSJonathan Lemon 0x0, /* 16 */ 134f7788e8eSJonathan Lemon 0x40, /* 17 */ 135f7788e8eSJonathan Lemon 0xf0, /* 18 */ 136f7788e8eSJonathan Lemon 0x0, /* 19 */ 137f7788e8eSJonathan Lemon 0x3f, /* 20 */ 138f7788e8eSJonathan Lemon 0x5 /* 21 */ 139f7788e8eSJonathan Lemon }; 140f7788e8eSJonathan Lemon 141f7788e8eSJonathan Lemon struct fxp_ident { 142f7788e8eSJonathan Lemon u_int16_t devid; 143f19fc5d8SJohn Polstra int16_t revid; /* -1 matches anything */ 144f7788e8eSJonathan Lemon char *name; 145f7788e8eSJonathan Lemon }; 146f7788e8eSJonathan Lemon 147f7788e8eSJonathan Lemon /* 148f7788e8eSJonathan Lemon * Claim various Intel PCI device identifiers for this driver. The 149f7788e8eSJonathan Lemon * sub-vendor and sub-device field are extensively used to identify 150f7788e8eSJonathan Lemon * particular variants, but we don't currently differentiate between 151f7788e8eSJonathan Lemon * them. 152f7788e8eSJonathan Lemon */ 153f7788e8eSJonathan Lemon static struct fxp_ident fxp_ident_table[] = { 154f19fc5d8SJohn Polstra { 0x1029, -1, "Intel 82559 PCI/CardBus Pro/100" }, 155f19fc5d8SJohn Polstra { 0x1030, -1, "Intel 82559 Pro/100 Ethernet" }, 156f19fc5d8SJohn Polstra { 0x1031, -1, "Intel 82801CAM (ICH3) Pro/100 VE Ethernet" }, 157f19fc5d8SJohn Polstra { 0x1032, -1, "Intel 82801CAM (ICH3) Pro/100 VE Ethernet" }, 158f19fc5d8SJohn Polstra { 0x1033, -1, "Intel 82801CAM (ICH3) Pro/100 VM Ethernet" }, 159f19fc5d8SJohn Polstra { 0x1034, -1, "Intel 82801CAM (ICH3) Pro/100 VM Ethernet" }, 160f19fc5d8SJohn Polstra { 0x1035, -1, "Intel 82801CAM (ICH3) Pro/100 Ethernet" }, 161f19fc5d8SJohn Polstra { 0x1036, -1, "Intel 82801CAM (ICH3) Pro/100 Ethernet" }, 162f19fc5d8SJohn Polstra { 0x1037, -1, "Intel 82801CAM (ICH3) Pro/100 Ethernet" }, 163f19fc5d8SJohn Polstra { 0x1038, -1, "Intel 82801CAM (ICH3) Pro/100 VM Ethernet" }, 164f19fc5d8SJohn Polstra { 0x1039, -1, "Intel 82801DB (ICH4) Pro/100 VE Ethernet" }, 165f19fc5d8SJohn Polstra { 0x103A, -1, "Intel 82801DB (ICH4) Pro/100 Ethernet" }, 166f19fc5d8SJohn Polstra { 0x103B, -1, "Intel 82801DB (ICH4) Pro/100 VM Ethernet" }, 167f19fc5d8SJohn Polstra { 0x103C, -1, "Intel 82801DB (ICH4) Pro/100 Ethernet" }, 168f19fc5d8SJohn Polstra { 0x103D, -1, "Intel 82801DB (ICH4) Pro/100 VE Ethernet" }, 169f19fc5d8SJohn Polstra { 0x103E, -1, "Intel 82801DB (ICH4) Pro/100 VM Ethernet" }, 170f19fc5d8SJohn Polstra { 0x1050, -1, "Intel 82801BA (D865) Pro/100 VE Ethernet" }, 171c2b37819SWarner Losh { 0x1051, -1, "Intel 82562ET (ICH5/ICH5R) Pro/100 VE Ethernet" }, 172f19fc5d8SJohn Polstra { 0x1059, -1, "Intel 82551QM Pro/100 M Mobile Connection" }, 173f19fc5d8SJohn Polstra { 0x1209, -1, "Intel 82559ER Embedded 10/100 Ethernet" }, 174f19fc5d8SJohn Polstra { 0x1229, 0x01, "Intel 82557 Pro/100 Ethernet" }, 175f19fc5d8SJohn Polstra { 0x1229, 0x02, "Intel 82557 Pro/100 Ethernet" }, 176f19fc5d8SJohn Polstra { 0x1229, 0x03, "Intel 82557 Pro/100 Ethernet" }, 177f19fc5d8SJohn Polstra { 0x1229, 0x04, "Intel 82558 Pro/100 Ethernet" }, 178f19fc5d8SJohn Polstra { 0x1229, 0x05, "Intel 82558 Pro/100 Ethernet" }, 179f19fc5d8SJohn Polstra { 0x1229, 0x06, "Intel 82559 Pro/100 Ethernet" }, 180f19fc5d8SJohn Polstra { 0x1229, 0x07, "Intel 82559 Pro/100 Ethernet" }, 181f19fc5d8SJohn Polstra { 0x1229, 0x08, "Intel 82559 Pro/100 Ethernet" }, 182f19fc5d8SJohn Polstra { 0x1229, 0x09, "Intel 82559ER Pro/100 Ethernet" }, 183f19fc5d8SJohn Polstra { 0x1229, 0x0c, "Intel 82550 Pro/100 Ethernet" }, 184f19fc5d8SJohn Polstra { 0x1229, 0x0d, "Intel 82550 Pro/100 Ethernet" }, 185f19fc5d8SJohn Polstra { 0x1229, 0x0e, "Intel 82550 Pro/100 Ethernet" }, 186f19fc5d8SJohn Polstra { 0x1229, 0x0f, "Intel 82551 Pro/100 Ethernet" }, 187f19fc5d8SJohn Polstra { 0x1229, 0x10, "Intel 82551 Pro/100 Ethernet" }, 188f19fc5d8SJohn Polstra { 0x1229, -1, "Intel 82557/8/9 Pro/100 Ethernet" }, 189f19fc5d8SJohn Polstra { 0x2449, -1, "Intel 82801BA/CAM (ICH2/3) Pro/100 Ethernet" }, 190f19fc5d8SJohn Polstra { 0, -1, NULL }, 191f7788e8eSJonathan Lemon }; 192f7788e8eSJonathan Lemon 193c8bca6dcSBill Paul #ifdef FXP_IP_CSUM_WAR 194c8bca6dcSBill Paul #define FXP_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP) 195c8bca6dcSBill Paul #else 196c8bca6dcSBill Paul #define FXP_CSUM_FEATURES (CSUM_TCP | CSUM_UDP) 197c8bca6dcSBill Paul #endif 198c8bca6dcSBill Paul 199f7788e8eSJonathan Lemon static int fxp_probe(device_t dev); 200f7788e8eSJonathan Lemon static int fxp_attach(device_t dev); 201f7788e8eSJonathan Lemon static int fxp_detach(device_t dev); 202f7788e8eSJonathan Lemon static int fxp_shutdown(device_t dev); 203f7788e8eSJonathan Lemon static int fxp_suspend(device_t dev); 204f7788e8eSJonathan Lemon static int fxp_resume(device_t dev); 205f7788e8eSJonathan Lemon 206f7788e8eSJonathan Lemon static void fxp_intr(void *xsc); 2074953bccaSNate Lawson static void fxp_intr_body(struct fxp_softc *sc, struct ifnet *ifp, 2084953bccaSNate Lawson u_int8_t statack, int count); 209f7788e8eSJonathan Lemon static void fxp_init(void *xsc); 2104953bccaSNate Lawson static void fxp_init_body(struct fxp_softc *sc); 211f7788e8eSJonathan Lemon static void fxp_tick(void *xsc); 212fa4b32faSWarner Losh #ifndef BURN_BRIDGES 21348e417ebSJonathan Lemon static void fxp_powerstate_d0(device_t dev); 214fa4b32faSWarner Losh #endif 215f7788e8eSJonathan Lemon static void fxp_start(struct ifnet *ifp); 2164953bccaSNate Lawson static void fxp_start_body(struct ifnet *ifp); 217f7788e8eSJonathan Lemon static void fxp_stop(struct fxp_softc *sc); 218f7788e8eSJonathan Lemon static void fxp_release(struct fxp_softc *sc); 219f7788e8eSJonathan Lemon static int fxp_ioctl(struct ifnet *ifp, u_long command, 220f7788e8eSJonathan Lemon caddr_t data); 221f7788e8eSJonathan Lemon static void fxp_watchdog(struct ifnet *ifp); 222b2badf02SMaxime Henrion static int fxp_add_rfabuf(struct fxp_softc *sc, 223b2badf02SMaxime Henrion struct fxp_rx *rxp); 22409882363SJonathan Lemon static int fxp_mc_addrs(struct fxp_softc *sc); 225f7788e8eSJonathan Lemon static void fxp_mc_setup(struct fxp_softc *sc); 226f7788e8eSJonathan Lemon static u_int16_t fxp_eeprom_getword(struct fxp_softc *sc, int offset, 227f7788e8eSJonathan Lemon int autosize); 22800c4116bSJonathan Lemon static void fxp_eeprom_putword(struct fxp_softc *sc, int offset, 22900c4116bSJonathan Lemon u_int16_t data); 230f7788e8eSJonathan Lemon static void fxp_autosize_eeprom(struct fxp_softc *sc); 231f7788e8eSJonathan Lemon static void fxp_read_eeprom(struct fxp_softc *sc, u_short *data, 232f7788e8eSJonathan Lemon int offset, int words); 23300c4116bSJonathan Lemon static void fxp_write_eeprom(struct fxp_softc *sc, u_short *data, 23400c4116bSJonathan Lemon int offset, int words); 235f7788e8eSJonathan Lemon static int fxp_ifmedia_upd(struct ifnet *ifp); 236f7788e8eSJonathan Lemon static void fxp_ifmedia_sts(struct ifnet *ifp, 237f7788e8eSJonathan Lemon struct ifmediareq *ifmr); 238f7788e8eSJonathan Lemon static int fxp_serial_ifmedia_upd(struct ifnet *ifp); 239f7788e8eSJonathan Lemon static void fxp_serial_ifmedia_sts(struct ifnet *ifp, 240f7788e8eSJonathan Lemon struct ifmediareq *ifmr); 241f7788e8eSJonathan Lemon static volatile int fxp_miibus_readreg(device_t dev, int phy, int reg); 242f7788e8eSJonathan Lemon static void fxp_miibus_writereg(device_t dev, int phy, int reg, 243f7788e8eSJonathan Lemon int value); 24472a32a26SJonathan Lemon static void fxp_load_ucode(struct fxp_softc *sc); 24572a32a26SJonathan Lemon static int sysctl_int_range(SYSCTL_HANDLER_ARGS, 24672a32a26SJonathan Lemon int low, int high); 24772a32a26SJonathan Lemon static int sysctl_hw_fxp_bundle_max(SYSCTL_HANDLER_ARGS); 24872a32a26SJonathan Lemon static int sysctl_hw_fxp_int_delay(SYSCTL_HANDLER_ARGS); 24928935f27SMaxime Henrion static void fxp_scb_wait(struct fxp_softc *sc); 25028935f27SMaxime Henrion static void fxp_scb_cmd(struct fxp_softc *sc, int cmd); 25128935f27SMaxime Henrion static void fxp_dma_wait(struct fxp_softc *sc, 252209b07bcSMaxime Henrion volatile u_int16_t *status, bus_dma_tag_t dmat, 253209b07bcSMaxime Henrion bus_dmamap_t map); 254f7788e8eSJonathan Lemon 255f7788e8eSJonathan Lemon static device_method_t fxp_methods[] = { 256f7788e8eSJonathan Lemon /* Device interface */ 257f7788e8eSJonathan Lemon DEVMETHOD(device_probe, fxp_probe), 258f7788e8eSJonathan Lemon DEVMETHOD(device_attach, fxp_attach), 259f7788e8eSJonathan Lemon DEVMETHOD(device_detach, fxp_detach), 260f7788e8eSJonathan Lemon DEVMETHOD(device_shutdown, fxp_shutdown), 261f7788e8eSJonathan Lemon DEVMETHOD(device_suspend, fxp_suspend), 262f7788e8eSJonathan Lemon DEVMETHOD(device_resume, fxp_resume), 263f7788e8eSJonathan Lemon 264f7788e8eSJonathan Lemon /* MII interface */ 265f7788e8eSJonathan Lemon DEVMETHOD(miibus_readreg, fxp_miibus_readreg), 266f7788e8eSJonathan Lemon DEVMETHOD(miibus_writereg, fxp_miibus_writereg), 267f7788e8eSJonathan Lemon 268f7788e8eSJonathan Lemon { 0, 0 } 269f7788e8eSJonathan Lemon }; 270f7788e8eSJonathan Lemon 271f7788e8eSJonathan Lemon static driver_t fxp_driver = { 272f7788e8eSJonathan Lemon "fxp", 273f7788e8eSJonathan Lemon fxp_methods, 274f7788e8eSJonathan Lemon sizeof(struct fxp_softc), 275f7788e8eSJonathan Lemon }; 276f7788e8eSJonathan Lemon 277f7788e8eSJonathan Lemon static devclass_t fxp_devclass; 278f7788e8eSJonathan Lemon 279f246e4a1SMatthew N. Dodd DRIVER_MODULE(fxp, pci, fxp_driver, fxp_devclass, 0, 0); 280347934faSWarner Losh DRIVER_MODULE(fxp, cardbus, fxp_driver, fxp_devclass, 0, 0); 281f7788e8eSJonathan Lemon DRIVER_MODULE(miibus, fxp, miibus_driver, miibus_devclass, 0, 0); 282f7788e8eSJonathan Lemon 2832b5989e9SLuigi Rizzo static int fxp_rnr; 2842b5989e9SLuigi Rizzo SYSCTL_INT(_hw, OID_AUTO, fxp_rnr, CTLFLAG_RW, &fxp_rnr, 0, "fxp rnr events"); 2852b5989e9SLuigi Rizzo 28698b27888SRobert Watson static int fxp_noflow; 28798b27888SRobert Watson SYSCTL_INT(_hw, OID_AUTO, fxp_noflow, CTLFLAG_RW, &fxp_noflow, 0, "fxp flow control disabled"); 28898b27888SRobert Watson TUNABLE_INT("hw.fxp_noflow", &fxp_noflow); 28998b27888SRobert Watson 290f7788e8eSJonathan Lemon /* 291dfe61cf1SDavid Greenman * Wait for the previous command to be accepted (but not necessarily 292dfe61cf1SDavid Greenman * completed). 293dfe61cf1SDavid Greenman */ 29428935f27SMaxime Henrion static void 295f7788e8eSJonathan Lemon fxp_scb_wait(struct fxp_softc *sc) 296a17c678eSDavid Greenman { 297a17c678eSDavid Greenman int i = 10000; 298a17c678eSDavid Greenman 2997dced78aSDavid Greenman while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i) 3007dced78aSDavid Greenman DELAY(2); 3017dced78aSDavid Greenman if (i == 0) 30200c4116bSJonathan Lemon device_printf(sc->dev, "SCB timeout: 0x%x 0x%x 0x%x 0x%x\n", 303e8c8b728SJonathan Lemon CSR_READ_1(sc, FXP_CSR_SCB_COMMAND), 304e8c8b728SJonathan Lemon CSR_READ_1(sc, FXP_CSR_SCB_STATACK), 305e8c8b728SJonathan Lemon CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS), 306e8c8b728SJonathan Lemon CSR_READ_2(sc, FXP_CSR_FLOWCONTROL)); 3077dced78aSDavid Greenman } 3087dced78aSDavid Greenman 30928935f27SMaxime Henrion static void 3102e2b8238SJonathan Lemon fxp_scb_cmd(struct fxp_softc *sc, int cmd) 3112e2b8238SJonathan Lemon { 3122e2b8238SJonathan Lemon 3132e2b8238SJonathan Lemon if (cmd == FXP_SCB_COMMAND_CU_RESUME && sc->cu_resume_bug) { 3142e2b8238SJonathan Lemon CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_CB_COMMAND_NOP); 3152e2b8238SJonathan Lemon fxp_scb_wait(sc); 3162e2b8238SJonathan Lemon } 3172e2b8238SJonathan Lemon CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, cmd); 3182e2b8238SJonathan Lemon } 3192e2b8238SJonathan Lemon 32028935f27SMaxime Henrion static void 321209b07bcSMaxime Henrion fxp_dma_wait(struct fxp_softc *sc, volatile u_int16_t *status, 322209b07bcSMaxime Henrion bus_dma_tag_t dmat, bus_dmamap_t map) 3237dced78aSDavid Greenman { 3247dced78aSDavid Greenman int i = 10000; 3257dced78aSDavid Greenman 326209b07bcSMaxime Henrion bus_dmamap_sync(dmat, map, BUS_DMASYNC_POSTREAD); 327209b07bcSMaxime Henrion while (!(le16toh(*status) & FXP_CB_STATUS_C) && --i) { 3287dced78aSDavid Greenman DELAY(2); 329209b07bcSMaxime Henrion bus_dmamap_sync(dmat, map, BUS_DMASYNC_POSTREAD); 330209b07bcSMaxime Henrion } 3317dced78aSDavid Greenman if (i == 0) 332f7788e8eSJonathan Lemon device_printf(sc->dev, "DMA timeout\n"); 333a17c678eSDavid Greenman } 334a17c678eSDavid Greenman 335dfe61cf1SDavid Greenman /* 33628935f27SMaxime Henrion * Return identification string if this device is ours. 337dfe61cf1SDavid Greenman */ 3386182fdbdSPeter Wemm static int 3396182fdbdSPeter Wemm fxp_probe(device_t dev) 340a17c678eSDavid Greenman { 341f7788e8eSJonathan Lemon u_int16_t devid; 342f19fc5d8SJohn Polstra u_int8_t revid; 343f7788e8eSJonathan Lemon struct fxp_ident *ident; 344f7788e8eSJonathan Lemon 34555ce7b51SDavid Greenman if (pci_get_vendor(dev) == FXP_VENDORID_INTEL) { 346f7788e8eSJonathan Lemon devid = pci_get_device(dev); 347f19fc5d8SJohn Polstra revid = pci_get_revid(dev); 348f7788e8eSJonathan Lemon for (ident = fxp_ident_table; ident->name != NULL; ident++) { 349f19fc5d8SJohn Polstra if (ident->devid == devid && 350f19fc5d8SJohn Polstra (ident->revid == revid || ident->revid == -1)) { 351f7788e8eSJonathan Lemon device_set_desc(dev, ident->name); 352f7788e8eSJonathan Lemon return (0); 35355ce7b51SDavid Greenman } 354dd68ef16SPeter Wemm } 355f7788e8eSJonathan Lemon } 356f7788e8eSJonathan Lemon return (ENXIO); 3576182fdbdSPeter Wemm } 3586182fdbdSPeter Wemm 359fa4b32faSWarner Losh #ifndef BURN_BRIDGES 36048e417ebSJonathan Lemon static void 36148e417ebSJonathan Lemon fxp_powerstate_d0(device_t dev) 36248e417ebSJonathan Lemon { 36348e417ebSJonathan Lemon #if __FreeBSD_version >= 430002 36448e417ebSJonathan Lemon u_int32_t iobase, membase, irq; 36548e417ebSJonathan Lemon 36648e417ebSJonathan Lemon if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { 36748e417ebSJonathan Lemon /* Save important PCI config data. */ 36848e417ebSJonathan Lemon iobase = pci_read_config(dev, FXP_PCI_IOBA, 4); 36948e417ebSJonathan Lemon membase = pci_read_config(dev, FXP_PCI_MMBA, 4); 37048e417ebSJonathan Lemon irq = pci_read_config(dev, PCIR_INTLINE, 4); 37148e417ebSJonathan Lemon 37248e417ebSJonathan Lemon /* Reset the power state. */ 37348e417ebSJonathan Lemon device_printf(dev, "chip is in D%d power mode " 37448e417ebSJonathan Lemon "-- setting to D0\n", pci_get_powerstate(dev)); 37548e417ebSJonathan Lemon 37648e417ebSJonathan Lemon pci_set_powerstate(dev, PCI_POWERSTATE_D0); 37748e417ebSJonathan Lemon 37848e417ebSJonathan Lemon /* Restore PCI config data. */ 37948e417ebSJonathan Lemon pci_write_config(dev, FXP_PCI_IOBA, iobase, 4); 38048e417ebSJonathan Lemon pci_write_config(dev, FXP_PCI_MMBA, membase, 4); 38148e417ebSJonathan Lemon pci_write_config(dev, PCIR_INTLINE, irq, 4); 38248e417ebSJonathan Lemon } 38348e417ebSJonathan Lemon #endif 38448e417ebSJonathan Lemon } 385fa4b32faSWarner Losh #endif 38648e417ebSJonathan Lemon 387b2badf02SMaxime Henrion static void 388b2badf02SMaxime Henrion fxp_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 389b2badf02SMaxime Henrion { 390b2badf02SMaxime Henrion u_int32_t *addr; 391b2badf02SMaxime Henrion 392b2badf02SMaxime Henrion if (error) 393b2badf02SMaxime Henrion return; 394b2badf02SMaxime Henrion 395b2badf02SMaxime Henrion KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 396b2badf02SMaxime Henrion addr = arg; 397b2badf02SMaxime Henrion *addr = segs->ds_addr; 398b2badf02SMaxime Henrion } 399b2badf02SMaxime Henrion 4006182fdbdSPeter Wemm static int 4016182fdbdSPeter Wemm fxp_attach(device_t dev) 402a17c678eSDavid Greenman { 4036182fdbdSPeter Wemm int error = 0; 4046182fdbdSPeter Wemm struct fxp_softc *sc = device_get_softc(dev); 405ba8c6fd5SDavid Greenman struct ifnet *ifp; 406b2badf02SMaxime Henrion struct fxp_rx *rxp; 4079fa6ccfbSMatt Jacob u_int32_t val; 40883e6547dSMaxime Henrion u_int16_t data, myea[ETHER_ADDR_LEN / 2]; 409d73e2e55SMaxime Henrion int i, rid, m1, m2, prefer_iomap, maxtxseg; 410a35e7eaaSDon Lewis int s, ipcbxmit_disable; 411a17c678eSDavid Greenman 412f7788e8eSJonathan Lemon sc->dev = dev; 41345276e4aSSam Leffler callout_init(&sc->stat_ch, CALLOUT_MPSAFE); 414a1a9c8f7SJonathan Lemon sysctl_ctx_init(&sc->sysctl_ctx); 4156008862bSJohn Baldwin mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 4164953bccaSNate Lawson MTX_DEF); 4174953bccaSNate Lawson ifmedia_init(&sc->sc_media, 0, fxp_serial_ifmedia_upd, 4184953bccaSNate Lawson fxp_serial_ifmedia_sts); 419a17c678eSDavid Greenman 420f7788e8eSJonathan Lemon s = splimp(); 421a17c678eSDavid Greenman 422dfe61cf1SDavid Greenman /* 4232bce79a2SMaxim Sobolev * Enable bus mastering. 424df373873SWes Peters */ 425cf0d8a1eSMaxim Sobolev pci_enable_busmaster(dev); 4269fa6ccfbSMatt Jacob val = pci_read_config(dev, PCIR_COMMAND, 2); 427fa4b32faSWarner Losh #ifndef BURN_BRIDGES 42848e417ebSJonathan Lemon fxp_powerstate_d0(dev); 429fa4b32faSWarner Losh #endif 430df373873SWes Peters /* 4319fa6ccfbSMatt Jacob * Figure out which we should try first - memory mapping or i/o mapping? 4329fa6ccfbSMatt Jacob * We default to memory mapping. Then we accept an override from the 4339fa6ccfbSMatt Jacob * command line. Then we check to see which one is enabled. 434dfe61cf1SDavid Greenman */ 4359fa6ccfbSMatt Jacob m1 = PCIM_CMD_MEMEN; 4369fa6ccfbSMatt Jacob m2 = PCIM_CMD_PORTEN; 4372a05a4ebSMatt Jacob prefer_iomap = 0; 4382a05a4ebSMatt Jacob if (resource_int_value(device_get_name(dev), device_get_unit(dev), 4392a05a4ebSMatt Jacob "prefer_iomap", &prefer_iomap) == 0 && prefer_iomap != 0) { 4409fa6ccfbSMatt Jacob m1 = PCIM_CMD_PORTEN; 4419fa6ccfbSMatt Jacob m2 = PCIM_CMD_MEMEN; 4429fa6ccfbSMatt Jacob } 4439fa6ccfbSMatt Jacob 444533294b9SMatthew N. Dodd sc->rtp = (m1 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT; 4459fa6ccfbSMatt Jacob sc->rgd = (m1 == PCIM_CMD_MEMEN)? FXP_PCI_MMBA : FXP_PCI_IOBA; 4465f96beb9SNate Lawson sc->mem = bus_alloc_resource_any(dev, sc->rtp, &sc->rgd, RF_ACTIVE); 447533294b9SMatthew N. Dodd if (sc->mem == NULL) { 4489fa6ccfbSMatt Jacob sc->rtp = 4499fa6ccfbSMatt Jacob (m2 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT; 4509fa6ccfbSMatt Jacob sc->rgd = (m2 == PCIM_CMD_MEMEN)? FXP_PCI_MMBA : FXP_PCI_IOBA; 4515f96beb9SNate Lawson sc->mem = bus_alloc_resource_any(dev, sc->rtp, &sc->rgd, 4525f96beb9SNate Lawson RF_ACTIVE); 4539fa6ccfbSMatt Jacob } 4549fa6ccfbSMatt Jacob 4556182fdbdSPeter Wemm if (!sc->mem) { 4566182fdbdSPeter Wemm error = ENXIO; 457a17c678eSDavid Greenman goto fail; 458a17c678eSDavid Greenman } 4599fa6ccfbSMatt Jacob if (bootverbose) { 4609fa6ccfbSMatt Jacob device_printf(dev, "using %s space register mapping\n", 4619fa6ccfbSMatt Jacob sc->rtp == SYS_RES_MEMORY? "memory" : "I/O"); 4629fa6ccfbSMatt Jacob } 4634fc1dda9SAndrew Gallatin 4644fc1dda9SAndrew Gallatin sc->sc_st = rman_get_bustag(sc->mem); 4654fc1dda9SAndrew Gallatin sc->sc_sh = rman_get_bushandle(sc->mem); 466a17c678eSDavid Greenman 467a17c678eSDavid Greenman /* 468dfe61cf1SDavid Greenman * Allocate our interrupt. 469dfe61cf1SDavid Greenman */ 4706182fdbdSPeter Wemm rid = 0; 4715f96beb9SNate Lawson sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 4726182fdbdSPeter Wemm RF_SHAREABLE | RF_ACTIVE); 4736182fdbdSPeter Wemm if (sc->irq == NULL) { 4746182fdbdSPeter Wemm device_printf(dev, "could not map interrupt\n"); 4756182fdbdSPeter Wemm error = ENXIO; 4766182fdbdSPeter Wemm goto fail; 4776182fdbdSPeter Wemm } 4786182fdbdSPeter Wemm 479f7788e8eSJonathan Lemon /* 480f7788e8eSJonathan Lemon * Reset to a stable state. 481f7788e8eSJonathan Lemon */ 482f7788e8eSJonathan Lemon CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 483f7788e8eSJonathan Lemon DELAY(10); 484f7788e8eSJonathan Lemon 485f7788e8eSJonathan Lemon /* 486f7788e8eSJonathan Lemon * Find out how large of an SEEPROM we have. 487f7788e8eSJonathan Lemon */ 488f7788e8eSJonathan Lemon fxp_autosize_eeprom(sc); 489f7788e8eSJonathan Lemon 490f7788e8eSJonathan Lemon /* 4913bd07cfdSJonathan Lemon * Determine whether we must use the 503 serial interface. 492f7788e8eSJonathan Lemon */ 493f7788e8eSJonathan Lemon fxp_read_eeprom(sc, &data, 6, 1); 494f7788e8eSJonathan Lemon if ((data & FXP_PHY_DEVICE_MASK) != 0 && 495f7788e8eSJonathan Lemon (data & FXP_PHY_SERIAL_ONLY)) 496dedabebfSJonathan Lemon sc->flags |= FXP_FLAG_SERIAL_MEDIA; 497f7788e8eSJonathan Lemon 498f7788e8eSJonathan Lemon /* 49972a32a26SJonathan Lemon * Create the sysctl tree 50072a32a26SJonathan Lemon */ 50172a32a26SJonathan Lemon sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx, 50272a32a26SJonathan Lemon SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO, 50372a32a26SJonathan Lemon device_get_nameunit(dev), CTLFLAG_RD, 0, ""); 5044953bccaSNate Lawson if (sc->sysctl_tree == NULL) { 5054953bccaSNate Lawson error = ENXIO; 50672a32a26SJonathan Lemon goto fail; 5074953bccaSNate Lawson } 50872a32a26SJonathan Lemon SYSCTL_ADD_PROC(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree), 50972a32a26SJonathan Lemon OID_AUTO, "int_delay", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_PRISON, 510858b84f5SPoul-Henning Kamp &sc->tunable_int_delay, 0, sysctl_hw_fxp_int_delay, "I", 51172a32a26SJonathan Lemon "FXP driver receive interrupt microcode bundling delay"); 51272a32a26SJonathan Lemon SYSCTL_ADD_PROC(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree), 51372a32a26SJonathan Lemon OID_AUTO, "bundle_max", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_PRISON, 514858b84f5SPoul-Henning Kamp &sc->tunable_bundle_max, 0, sysctl_hw_fxp_bundle_max, "I", 51572a32a26SJonathan Lemon "FXP driver receive interrupt microcode bundle size limit"); 51672a32a26SJonathan Lemon 51772a32a26SJonathan Lemon /* 51872a32a26SJonathan Lemon * Pull in device tunables. 51972a32a26SJonathan Lemon */ 52072a32a26SJonathan Lemon sc->tunable_int_delay = TUNABLE_INT_DELAY; 52172a32a26SJonathan Lemon sc->tunable_bundle_max = TUNABLE_BUNDLE_MAX; 52272a32a26SJonathan Lemon (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 52372a32a26SJonathan Lemon "int_delay", &sc->tunable_int_delay); 52472a32a26SJonathan Lemon (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 52572a32a26SJonathan Lemon "bundle_max", &sc->tunable_bundle_max); 52672a32a26SJonathan Lemon 52772a32a26SJonathan Lemon /* 52872a32a26SJonathan Lemon * Find out the chip revision; lump all 82557 revs together. 5293bd07cfdSJonathan Lemon */ 5303bd07cfdSJonathan Lemon fxp_read_eeprom(sc, &data, 5, 1); 5313bd07cfdSJonathan Lemon if ((data >> 8) == 1) 53272a32a26SJonathan Lemon sc->revision = FXP_REV_82557; 53372a32a26SJonathan Lemon else 53472a32a26SJonathan Lemon sc->revision = pci_get_revid(dev); 5353bd07cfdSJonathan Lemon 5363bd07cfdSJonathan Lemon /* 5372e2b8238SJonathan Lemon * Enable workarounds for certain chip revision deficiencies. 53800c4116bSJonathan Lemon * 53972a32a26SJonathan Lemon * Systems based on the ICH2/ICH2-M chip from Intel, and possibly 54072a32a26SJonathan Lemon * some systems based a normal 82559 design, have a defect where 54172a32a26SJonathan Lemon * the chip can cause a PCI protocol violation if it receives 54200c4116bSJonathan Lemon * a CU_RESUME command when it is entering the IDLE state. The 54300c4116bSJonathan Lemon * workaround is to disable Dynamic Standby Mode, so the chip never 54400c4116bSJonathan Lemon * deasserts CLKRUN#, and always remains in an active state. 54500c4116bSJonathan Lemon * 54600c4116bSJonathan Lemon * See Intel 82801BA/82801BAM Specification Update, Errata #30. 5472e2b8238SJonathan Lemon */ 5482e2b8238SJonathan Lemon i = pci_get_device(dev); 54972a32a26SJonathan Lemon if (i == 0x2449 || (i > 0x1030 && i < 0x1039) || 55072a32a26SJonathan Lemon sc->revision >= FXP_REV_82559_A0) { 55100c4116bSJonathan Lemon fxp_read_eeprom(sc, &data, 10, 1); 55200c4116bSJonathan Lemon if (data & 0x02) { /* STB enable */ 55300c4116bSJonathan Lemon u_int16_t cksum; 55400c4116bSJonathan Lemon int i; 55500c4116bSJonathan Lemon 55600c4116bSJonathan Lemon device_printf(dev, 557001cfa92SJonathan Lemon "Disabling dynamic standby mode in EEPROM\n"); 55800c4116bSJonathan Lemon data &= ~0x02; 55900c4116bSJonathan Lemon fxp_write_eeprom(sc, &data, 10, 1); 56000c4116bSJonathan Lemon device_printf(dev, "New EEPROM ID: 0x%x\n", data); 56100c4116bSJonathan Lemon cksum = 0; 56200c4116bSJonathan Lemon for (i = 0; i < (1 << sc->eeprom_size) - 1; i++) { 56300c4116bSJonathan Lemon fxp_read_eeprom(sc, &data, i, 1); 56400c4116bSJonathan Lemon cksum += data; 56500c4116bSJonathan Lemon } 56600c4116bSJonathan Lemon i = (1 << sc->eeprom_size) - 1; 56700c4116bSJonathan Lemon cksum = 0xBABA - cksum; 56800c4116bSJonathan Lemon fxp_read_eeprom(sc, &data, i, 1); 56900c4116bSJonathan Lemon fxp_write_eeprom(sc, &cksum, i, 1); 57000c4116bSJonathan Lemon device_printf(dev, 57100c4116bSJonathan Lemon "EEPROM checksum @ 0x%x: 0x%x -> 0x%x\n", 57200c4116bSJonathan Lemon i, data, cksum); 57300c4116bSJonathan Lemon #if 1 57400c4116bSJonathan Lemon /* 57500c4116bSJonathan Lemon * If the user elects to continue, try the software 57600c4116bSJonathan Lemon * workaround, as it is better than nothing. 57700c4116bSJonathan Lemon */ 5782e2b8238SJonathan Lemon sc->flags |= FXP_FLAG_CU_RESUME_BUG; 57900c4116bSJonathan Lemon #endif 58000c4116bSJonathan Lemon } 58100c4116bSJonathan Lemon } 5822e2b8238SJonathan Lemon 5832e2b8238SJonathan Lemon /* 5843bd07cfdSJonathan Lemon * If we are not a 82557 chip, we can enable extended features. 5853bd07cfdSJonathan Lemon */ 58672a32a26SJonathan Lemon if (sc->revision != FXP_REV_82557) { 5873bd07cfdSJonathan Lemon /* 58874396a0aSJonathan Lemon * If MWI is enabled in the PCI configuration, and there 58974396a0aSJonathan Lemon * is a valid cacheline size (8 or 16 dwords), then tell 59074396a0aSJonathan Lemon * the board to turn on MWI. 5913bd07cfdSJonathan Lemon */ 59274396a0aSJonathan Lemon if (val & PCIM_CMD_MWRICEN && 59374396a0aSJonathan Lemon pci_read_config(dev, PCIR_CACHELNSZ, 1) != 0) 5943bd07cfdSJonathan Lemon sc->flags |= FXP_FLAG_MWI_ENABLE; 5953bd07cfdSJonathan Lemon 5963bd07cfdSJonathan Lemon /* turn on the extended TxCB feature */ 5973bd07cfdSJonathan Lemon sc->flags |= FXP_FLAG_EXT_TXCB; 598920b58e8SBrooks Davis 599e8c8b728SJonathan Lemon /* enable reception of long frames for VLAN */ 600e8c8b728SJonathan Lemon sc->flags |= FXP_FLAG_LONG_PKT_EN; 6013bd07cfdSJonathan Lemon } 6023bd07cfdSJonathan Lemon 6033bd07cfdSJonathan Lemon /* 604c8bca6dcSBill Paul * Enable use of extended RFDs and TCBs for 82550 605c8bca6dcSBill Paul * and later chips. Note: we need extended TXCB support 606c8bca6dcSBill Paul * too, but that's already enabled by the code above. 607c8bca6dcSBill Paul * Be careful to do this only on the right devices. 608a35e7eaaSDon Lewis * 609a35e7eaaSDon Lewis * At least some 82550 cards probed as "chip=0x12298086 rev=0x0d" 610a35e7eaaSDon Lewis * truncate packets that end with an mbuf containing 1 to 3 bytes 611a35e7eaaSDon Lewis * when used with this feature enabled in the previous version of the 612a35e7eaaSDon Lewis * driver. This problem appears to be fixed now that the driver 613a35e7eaaSDon Lewis * always sets the hardware parse bit in the IPCB structure, which 614a35e7eaaSDon Lewis * the "Intel 8255x 10/100 Mbps Ethernet Controller Family Open 615a35e7eaaSDon Lewis * Source Software Developer Manual" says is necessary in the 616a35e7eaaSDon Lewis * cases where packet truncation was observed. 617a35e7eaaSDon Lewis * 618a35e7eaaSDon Lewis * The device hint "hint.fxp.UNIT_NUMBER.ipcbxmit_disable" 619a35e7eaaSDon Lewis * allows this feature to be disabled at boot time. 620a35e7eaaSDon Lewis * 621a35e7eaaSDon Lewis * If fxp is not compiled into the kernel, this feature may also 622a35e7eaaSDon Lewis * be disabled at run time: 623a35e7eaaSDon Lewis * # kldunload fxp 624a35e7eaaSDon Lewis * # kenv hint.fxp.0.ipcbxmit_disable=1 625a35e7eaaSDon Lewis * # kldload fxp 626c8bca6dcSBill Paul */ 627c8bca6dcSBill Paul 628a35e7eaaSDon Lewis if (resource_int_value("fxp", device_get_unit(dev), "ipcbxmit_disable", 629a35e7eaaSDon Lewis &ipcbxmit_disable) != 0) 630a35e7eaaSDon Lewis ipcbxmit_disable = 0; 631a35e7eaaSDon Lewis if (ipcbxmit_disable == 0 && (sc->revision == FXP_REV_82550 || 632a35e7eaaSDon Lewis sc->revision == FXP_REV_82550_C)) { 633c8bca6dcSBill Paul sc->rfa_size = sizeof (struct fxp_rfa); 634c8bca6dcSBill Paul sc->tx_cmd = FXP_CB_COMMAND_IPCBXMIT; 635c8bca6dcSBill Paul sc->flags |= FXP_FLAG_EXT_RFA; 636c8bca6dcSBill Paul } else { 637c8bca6dcSBill Paul sc->rfa_size = sizeof (struct fxp_rfa) - FXP_RFAX_LEN; 638c8bca6dcSBill Paul sc->tx_cmd = FXP_CB_COMMAND_XMIT; 639c8bca6dcSBill Paul } 640c8bca6dcSBill Paul 641c8bca6dcSBill Paul /* 642b2badf02SMaxime Henrion * Allocate DMA tags and DMA safe memory. 643b2badf02SMaxime Henrion */ 644d73e2e55SMaxime Henrion maxtxseg = sc->flags & FXP_FLAG_EXT_RFA ? FXP_NTXSEG - 1 : FXP_NTXSEG; 645b2badf02SMaxime Henrion error = bus_dma_tag_create(NULL, 2, 0, BUS_SPACE_MAXADDR_32BIT, 646d73e2e55SMaxime Henrion BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES * maxtxseg, 647f6b1c44dSScott Long maxtxseg, MCLBYTES, 0, busdma_lock_mutex, &Giant, &sc->fxp_mtag); 648b2badf02SMaxime Henrion if (error) { 649b2badf02SMaxime Henrion device_printf(dev, "could not allocate dma tag\n"); 650b2badf02SMaxime Henrion goto fail; 651b2badf02SMaxime Henrion } 652b2badf02SMaxime Henrion 653b2badf02SMaxime Henrion error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 654b2badf02SMaxime Henrion BUS_SPACE_MAXADDR, NULL, NULL, sizeof(struct fxp_stats), 1, 655f6b1c44dSScott Long sizeof(struct fxp_stats), 0, busdma_lock_mutex, &Giant, 656f6b1c44dSScott Long &sc->fxp_stag); 657b2badf02SMaxime Henrion if (error) { 658b2badf02SMaxime Henrion device_printf(dev, "could not allocate dma tag\n"); 659b2badf02SMaxime Henrion goto fail; 660b2badf02SMaxime Henrion } 661b2badf02SMaxime Henrion 662b2badf02SMaxime Henrion error = bus_dmamem_alloc(sc->fxp_stag, (void **)&sc->fxp_stats, 663aafb3ebbSMaxime Henrion BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->fxp_smap); 664b2badf02SMaxime Henrion if (error) 6654953bccaSNate Lawson goto fail; 666b2badf02SMaxime Henrion error = bus_dmamap_load(sc->fxp_stag, sc->fxp_smap, sc->fxp_stats, 667b2badf02SMaxime Henrion sizeof(struct fxp_stats), fxp_dma_map_addr, &sc->stats_addr, 0); 668b2badf02SMaxime Henrion if (error) { 669b2badf02SMaxime Henrion device_printf(dev, "could not map the stats buffer\n"); 670b2badf02SMaxime Henrion goto fail; 671b2badf02SMaxime Henrion } 672b2badf02SMaxime Henrion 673b2badf02SMaxime Henrion error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 674b2badf02SMaxime Henrion BUS_SPACE_MAXADDR, NULL, NULL, FXP_TXCB_SZ, 1, 675f6b1c44dSScott Long FXP_TXCB_SZ, 0, busdma_lock_mutex, &Giant, &sc->cbl_tag); 676b2badf02SMaxime Henrion if (error) { 677b2badf02SMaxime Henrion device_printf(dev, "could not allocate dma tag\n"); 678b2badf02SMaxime Henrion goto fail; 679b2badf02SMaxime Henrion } 680b2badf02SMaxime Henrion 681b2badf02SMaxime Henrion error = bus_dmamem_alloc(sc->cbl_tag, (void **)&sc->fxp_desc.cbl_list, 682aafb3ebbSMaxime Henrion BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->cbl_map); 683b2badf02SMaxime Henrion if (error) 6844953bccaSNate Lawson goto fail; 685b2badf02SMaxime Henrion 686b2badf02SMaxime Henrion error = bus_dmamap_load(sc->cbl_tag, sc->cbl_map, 687b2badf02SMaxime Henrion sc->fxp_desc.cbl_list, FXP_TXCB_SZ, fxp_dma_map_addr, 688b2badf02SMaxime Henrion &sc->fxp_desc.cbl_addr, 0); 689b2badf02SMaxime Henrion if (error) { 690b2badf02SMaxime Henrion device_printf(dev, "could not map DMA memory\n"); 691b2badf02SMaxime Henrion goto fail; 692b2badf02SMaxime Henrion } 693b2badf02SMaxime Henrion 694b2badf02SMaxime Henrion error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 695b2badf02SMaxime Henrion BUS_SPACE_MAXADDR, NULL, NULL, sizeof(struct fxp_cb_mcs), 1, 696f6b1c44dSScott Long sizeof(struct fxp_cb_mcs), 0, busdma_lock_mutex, &Giant, 697f6b1c44dSScott Long &sc->mcs_tag); 698b2badf02SMaxime Henrion if (error) { 699b2badf02SMaxime Henrion device_printf(dev, "could not allocate dma tag\n"); 700b2badf02SMaxime Henrion goto fail; 701b2badf02SMaxime Henrion } 702b2badf02SMaxime Henrion 703b2badf02SMaxime Henrion error = bus_dmamem_alloc(sc->mcs_tag, (void **)&sc->mcsp, 704b2badf02SMaxime Henrion BUS_DMA_NOWAIT, &sc->mcs_map); 705b2badf02SMaxime Henrion if (error) 7064953bccaSNate Lawson goto fail; 707b2badf02SMaxime Henrion error = bus_dmamap_load(sc->mcs_tag, sc->mcs_map, sc->mcsp, 708b2badf02SMaxime Henrion sizeof(struct fxp_cb_mcs), fxp_dma_map_addr, &sc->mcs_addr, 0); 709b2badf02SMaxime Henrion if (error) { 710b2badf02SMaxime Henrion device_printf(dev, "can't map the multicast setup command\n"); 711b2badf02SMaxime Henrion goto fail; 712b2badf02SMaxime Henrion } 713b2badf02SMaxime Henrion 714b2badf02SMaxime Henrion /* 715b2badf02SMaxime Henrion * Pre-allocate the TX DMA maps. 716b2badf02SMaxime Henrion */ 7174cec1653SMaxime Henrion for (i = 0; i < FXP_NTXCB; i++) { 718b2badf02SMaxime Henrion error = bus_dmamap_create(sc->fxp_mtag, 0, 719b2badf02SMaxime Henrion &sc->fxp_desc.tx_list[i].tx_map); 720b2badf02SMaxime Henrion if (error) { 721b2badf02SMaxime Henrion device_printf(dev, "can't create DMA map for TX\n"); 722b2badf02SMaxime Henrion goto fail; 723b2badf02SMaxime Henrion } 724b2badf02SMaxime Henrion } 725b2badf02SMaxime Henrion error = bus_dmamap_create(sc->fxp_mtag, 0, &sc->spare_map); 726b2badf02SMaxime Henrion if (error) { 727b2badf02SMaxime Henrion device_printf(dev, "can't create spare DMA map\n"); 728b2badf02SMaxime Henrion goto fail; 729b2badf02SMaxime Henrion } 730b2badf02SMaxime Henrion 731b2badf02SMaxime Henrion /* 732b2badf02SMaxime Henrion * Pre-allocate our receive buffers. 733b2badf02SMaxime Henrion */ 734b2badf02SMaxime Henrion sc->fxp_desc.rx_head = sc->fxp_desc.rx_tail = NULL; 735b2badf02SMaxime Henrion for (i = 0; i < FXP_NRFABUFS; i++) { 736b2badf02SMaxime Henrion rxp = &sc->fxp_desc.rx_list[i]; 737b2badf02SMaxime Henrion error = bus_dmamap_create(sc->fxp_mtag, 0, &rxp->rx_map); 738b2badf02SMaxime Henrion if (error) { 739b2badf02SMaxime Henrion device_printf(dev, "can't create DMA map for RX\n"); 740b2badf02SMaxime Henrion goto fail; 741b2badf02SMaxime Henrion } 7424953bccaSNate Lawson if (fxp_add_rfabuf(sc, rxp) != 0) { 7434953bccaSNate Lawson error = ENOMEM; 7444953bccaSNate Lawson goto fail; 7454953bccaSNate Lawson } 746b2badf02SMaxime Henrion } 747b2badf02SMaxime Henrion 748b2badf02SMaxime Henrion /* 749f7788e8eSJonathan Lemon * Read MAC address. 750f7788e8eSJonathan Lemon */ 75183e6547dSMaxime Henrion fxp_read_eeprom(sc, myea, 0, 3); 75283e6547dSMaxime Henrion sc->arpcom.ac_enaddr[0] = myea[0] & 0xff; 75383e6547dSMaxime Henrion sc->arpcom.ac_enaddr[1] = myea[0] >> 8; 75483e6547dSMaxime Henrion sc->arpcom.ac_enaddr[2] = myea[1] & 0xff; 75583e6547dSMaxime Henrion sc->arpcom.ac_enaddr[3] = myea[1] >> 8; 75683e6547dSMaxime Henrion sc->arpcom.ac_enaddr[4] = myea[2] & 0xff; 75783e6547dSMaxime Henrion sc->arpcom.ac_enaddr[5] = myea[2] >> 8; 758f7788e8eSJonathan Lemon if (bootverbose) { 7592e2b8238SJonathan Lemon device_printf(dev, "PCI IDs: %04x %04x %04x %04x %04x\n", 760f7788e8eSJonathan Lemon pci_get_vendor(dev), pci_get_device(dev), 7612e2b8238SJonathan Lemon pci_get_subvendor(dev), pci_get_subdevice(dev), 7622e2b8238SJonathan Lemon pci_get_revid(dev)); 76372a32a26SJonathan Lemon fxp_read_eeprom(sc, &data, 10, 1); 76472a32a26SJonathan Lemon device_printf(dev, "Dynamic Standby mode is %s\n", 76572a32a26SJonathan Lemon data & 0x02 ? "enabled" : "disabled"); 766f7788e8eSJonathan Lemon } 767f7788e8eSJonathan Lemon 768f7788e8eSJonathan Lemon /* 769f7788e8eSJonathan Lemon * If this is only a 10Mbps device, then there is no MII, and 770f7788e8eSJonathan Lemon * the PHY will use a serial interface instead. 771f7788e8eSJonathan Lemon * 772f7788e8eSJonathan Lemon * The Seeq 80c24 AutoDUPLEX(tm) Ethernet Interface Adapter 773f7788e8eSJonathan Lemon * doesn't have a programming interface of any sort. The 774f7788e8eSJonathan Lemon * media is sensed automatically based on how the link partner 775f7788e8eSJonathan Lemon * is configured. This is, in essence, manual configuration. 776f7788e8eSJonathan Lemon */ 777f7788e8eSJonathan Lemon if (sc->flags & FXP_FLAG_SERIAL_MEDIA) { 778f7788e8eSJonathan Lemon ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL); 779f7788e8eSJonathan Lemon ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL); 780f7788e8eSJonathan Lemon } else { 781f7788e8eSJonathan Lemon if (mii_phy_probe(dev, &sc->miibus, fxp_ifmedia_upd, 782f7788e8eSJonathan Lemon fxp_ifmedia_sts)) { 783f7788e8eSJonathan Lemon device_printf(dev, "MII without any PHY!\n"); 7846182fdbdSPeter Wemm error = ENXIO; 785ba8c6fd5SDavid Greenman goto fail; 786a17c678eSDavid Greenman } 787f7788e8eSJonathan Lemon } 788dccee1a1SDavid Greenman 789a17c678eSDavid Greenman ifp = &sc->arpcom.ac_if; 7909bf40edeSBrooks Davis if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 791a330e1f1SGary Palmer ifp->if_baudrate = 100000000; 792fb583156SDavid Greenman ifp->if_init = fxp_init; 793ba8c6fd5SDavid Greenman ifp->if_softc = sc; 794ba8c6fd5SDavid Greenman ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 795ba8c6fd5SDavid Greenman ifp->if_ioctl = fxp_ioctl; 796ba8c6fd5SDavid Greenman ifp->if_start = fxp_start; 797ba8c6fd5SDavid Greenman ifp->if_watchdog = fxp_watchdog; 798a17c678eSDavid Greenman 7995fe9116bSYaroslav Tykhiy ifp->if_capabilities = ifp->if_capenable = 0; 8005fe9116bSYaroslav Tykhiy 801c8bca6dcSBill Paul /* Enable checksum offload for 82550 or better chips */ 802c8bca6dcSBill Paul if (sc->flags & FXP_FLAG_EXT_RFA) { 803c8bca6dcSBill Paul ifp->if_hwassist = FXP_CSUM_FEATURES; 8045fe9116bSYaroslav Tykhiy ifp->if_capabilities |= IFCAP_HWCSUM; 8055fe9116bSYaroslav Tykhiy ifp->if_capenable |= IFCAP_HWCSUM; 806c8bca6dcSBill Paul } 807c8bca6dcSBill Paul 808fb917226SRuslan Ermilov #ifdef DEVICE_POLLING 809fb917226SRuslan Ermilov /* Inform the world we support polling. */ 810fb917226SRuslan Ermilov ifp->if_capabilities |= IFCAP_POLLING; 811fb917226SRuslan Ermilov ifp->if_capenable |= IFCAP_POLLING; 812fb917226SRuslan Ermilov #endif 813fb917226SRuslan Ermilov 814dfe61cf1SDavid Greenman /* 8154953bccaSNate Lawson * Attach the interface. 8164953bccaSNate Lawson */ 8174953bccaSNate Lawson ether_ifattach(ifp, sc->arpcom.ac_enaddr); 8184953bccaSNate Lawson 8194953bccaSNate Lawson /* 820e8c8b728SJonathan Lemon * Tell the upper layer(s) we support long frames. 8215fe9116bSYaroslav Tykhiy * Must appear after the call to ether_ifattach() because 8225fe9116bSYaroslav Tykhiy * ether_ifattach() sets ifi_hdrlen to the default value. 823e8c8b728SJonathan Lemon */ 824e8c8b728SJonathan Lemon ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 825673d9191SSam Leffler ifp->if_capabilities |= IFCAP_VLAN_MTU; 82621ce2bf2SYaroslav Tykhiy ifp->if_capenable |= IFCAP_VLAN_MTU; 827e8c8b728SJonathan Lemon 828483b9871SDavid Greenman /* 8293114fdb4SDavid Greenman * Let the system queue as many packets as we have available 8303114fdb4SDavid Greenman * TX descriptors. 831483b9871SDavid Greenman */ 8323114fdb4SDavid Greenman ifp->if_snd.ifq_maxlen = FXP_NTXCB - 1; 8334a684684SDavid Greenman 834201afb0eSMaxime Henrion /* 8354953bccaSNate Lawson * Hook our interrupt after all initialization is complete. 8364953bccaSNate Lawson * XXX This driver has been tested with the INTR_MPSAFFE flag set 8374953bccaSNate Lawson * however, ifp and its functions are not fully locked so MPSAFE 8384953bccaSNate Lawson * should not be used unless you can handle potential data loss. 839201afb0eSMaxime Henrion */ 840b237430cSSam Leffler error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE, 841201afb0eSMaxime Henrion fxp_intr, sc, &sc->ih); 842201afb0eSMaxime Henrion if (error) { 843201afb0eSMaxime Henrion device_printf(dev, "could not setup irq\n"); 8444953bccaSNate Lawson ether_ifdetach(&sc->arpcom.ac_if); 845201afb0eSMaxime Henrion goto fail; 846201afb0eSMaxime Henrion } 847201afb0eSMaxime Henrion 848a17c678eSDavid Greenman fail: 849f7788e8eSJonathan Lemon splx(s); 8504953bccaSNate Lawson if (error) 851f7788e8eSJonathan Lemon fxp_release(sc); 852f7788e8eSJonathan Lemon return (error); 853f7788e8eSJonathan Lemon } 854f7788e8eSJonathan Lemon 855f7788e8eSJonathan Lemon /* 8564953bccaSNate Lawson * Release all resources. The softc lock should not be held and the 8574953bccaSNate Lawson * interrupt should already be torn down. 858f7788e8eSJonathan Lemon */ 859f7788e8eSJonathan Lemon static void 860f7788e8eSJonathan Lemon fxp_release(struct fxp_softc *sc) 861f7788e8eSJonathan Lemon { 862b2badf02SMaxime Henrion struct fxp_rx *rxp; 863b2badf02SMaxime Henrion struct fxp_tx *txp; 864b2badf02SMaxime Henrion int i; 865b2badf02SMaxime Henrion 8664953bccaSNate Lawson mtx_assert(&sc->sc_mtx, MA_NOTOWNED); 867670f5d73SMaxime Henrion KASSERT(sc->ih == NULL, 868670f5d73SMaxime Henrion ("fxp_release() called with intr handle still active")); 8694953bccaSNate Lawson if (sc->miibus) 8704953bccaSNate Lawson device_delete_child(sc->dev, sc->miibus); 8714953bccaSNate Lawson bus_generic_detach(sc->dev); 8724953bccaSNate Lawson ifmedia_removeall(&sc->sc_media); 873b2badf02SMaxime Henrion if (sc->fxp_desc.cbl_list) { 874b2badf02SMaxime Henrion bus_dmamap_unload(sc->cbl_tag, sc->cbl_map); 875b2badf02SMaxime Henrion bus_dmamem_free(sc->cbl_tag, sc->fxp_desc.cbl_list, 876b2badf02SMaxime Henrion sc->cbl_map); 877b2badf02SMaxime Henrion } 878b2badf02SMaxime Henrion if (sc->fxp_stats) { 879b2badf02SMaxime Henrion bus_dmamap_unload(sc->fxp_stag, sc->fxp_smap); 880b2badf02SMaxime Henrion bus_dmamem_free(sc->fxp_stag, sc->fxp_stats, sc->fxp_smap); 881b2badf02SMaxime Henrion } 882b2badf02SMaxime Henrion if (sc->mcsp) { 883b2badf02SMaxime Henrion bus_dmamap_unload(sc->mcs_tag, sc->mcs_map); 884b2badf02SMaxime Henrion bus_dmamem_free(sc->mcs_tag, sc->mcsp, sc->mcs_map); 885b2badf02SMaxime Henrion } 886f7788e8eSJonathan Lemon if (sc->irq) 887f7788e8eSJonathan Lemon bus_release_resource(sc->dev, SYS_RES_IRQ, 0, sc->irq); 888f7788e8eSJonathan Lemon if (sc->mem) 889f7788e8eSJonathan Lemon bus_release_resource(sc->dev, sc->rtp, sc->rgd, sc->mem); 890b983c7b3SMaxime Henrion if (sc->fxp_mtag) { 891b983c7b3SMaxime Henrion for (i = 0; i < FXP_NRFABUFS; i++) { 892b983c7b3SMaxime Henrion rxp = &sc->fxp_desc.rx_list[i]; 893b983c7b3SMaxime Henrion if (rxp->rx_mbuf != NULL) { 894b983c7b3SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, rxp->rx_map, 895b983c7b3SMaxime Henrion BUS_DMASYNC_POSTREAD); 896b983c7b3SMaxime Henrion bus_dmamap_unload(sc->fxp_mtag, rxp->rx_map); 897b983c7b3SMaxime Henrion m_freem(rxp->rx_mbuf); 898b983c7b3SMaxime Henrion } 899b983c7b3SMaxime Henrion bus_dmamap_destroy(sc->fxp_mtag, rxp->rx_map); 900b983c7b3SMaxime Henrion } 901b983c7b3SMaxime Henrion bus_dmamap_destroy(sc->fxp_mtag, sc->spare_map); 902b2badf02SMaxime Henrion bus_dma_tag_destroy(sc->fxp_mtag); 903b983c7b3SMaxime Henrion } 904b983c7b3SMaxime Henrion if (sc->fxp_stag) { 905b983c7b3SMaxime Henrion for (i = 0; i < FXP_NTXCB; i++) { 906b983c7b3SMaxime Henrion txp = &sc->fxp_desc.tx_list[i]; 907b983c7b3SMaxime Henrion if (txp->tx_mbuf != NULL) { 908b983c7b3SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, txp->tx_map, 909b983c7b3SMaxime Henrion BUS_DMASYNC_POSTWRITE); 910b983c7b3SMaxime Henrion bus_dmamap_unload(sc->fxp_mtag, txp->tx_map); 911b983c7b3SMaxime Henrion m_freem(txp->tx_mbuf); 912b983c7b3SMaxime Henrion } 913b983c7b3SMaxime Henrion bus_dmamap_destroy(sc->fxp_mtag, txp->tx_map); 914b983c7b3SMaxime Henrion } 915b2badf02SMaxime Henrion bus_dma_tag_destroy(sc->fxp_stag); 916b983c7b3SMaxime Henrion } 917b2badf02SMaxime Henrion if (sc->cbl_tag) 918b2badf02SMaxime Henrion bus_dma_tag_destroy(sc->cbl_tag); 919b2badf02SMaxime Henrion if (sc->mcs_tag) 920b2badf02SMaxime Henrion bus_dma_tag_destroy(sc->mcs_tag); 92172a32a26SJonathan Lemon 92272a32a26SJonathan Lemon sysctl_ctx_free(&sc->sysctl_ctx); 92372a32a26SJonathan Lemon 9240f4dc94cSChuck Paterson mtx_destroy(&sc->sc_mtx); 9256182fdbdSPeter Wemm } 9266182fdbdSPeter Wemm 9276182fdbdSPeter Wemm /* 9286182fdbdSPeter Wemm * Detach interface. 9296182fdbdSPeter Wemm */ 9306182fdbdSPeter Wemm static int 9316182fdbdSPeter Wemm fxp_detach(device_t dev) 9326182fdbdSPeter Wemm { 9336182fdbdSPeter Wemm struct fxp_softc *sc = device_get_softc(dev); 934f7788e8eSJonathan Lemon int s; 9356182fdbdSPeter Wemm 9364953bccaSNate Lawson FXP_LOCK(sc); 937f7788e8eSJonathan Lemon s = splimp(); 93832cd7a9cSWarner Losh 9391d2945d5SWarner Losh sc->suspended = 1; /* Do same thing as we do for suspend */ 9406182fdbdSPeter Wemm /* 941f7788e8eSJonathan Lemon * Close down routes etc. 9426182fdbdSPeter Wemm */ 943673d9191SSam Leffler ether_ifdetach(&sc->arpcom.ac_if); 94420f0c80fSMaxime Henrion 94520f0c80fSMaxime Henrion /* 94632cd7a9cSWarner Losh * Stop DMA and drop transmit queue, but disable interrupts first. 94720f0c80fSMaxime Henrion */ 94820f0c80fSMaxime Henrion CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, FXP_SCB_INTR_DISABLE); 94920f0c80fSMaxime Henrion fxp_stop(sc); 95032cd7a9cSWarner Losh FXP_UNLOCK(sc); 95120f0c80fSMaxime Henrion 9526182fdbdSPeter Wemm /* 9534953bccaSNate Lawson * Unhook interrupt before dropping lock. This is to prevent 9544953bccaSNate Lawson * races with fxp_intr(). 9556182fdbdSPeter Wemm */ 9564953bccaSNate Lawson bus_teardown_intr(sc->dev, sc->irq, sc->ih); 9574953bccaSNate Lawson sc->ih = NULL; 9586182fdbdSPeter Wemm 959f7788e8eSJonathan Lemon splx(s); 9606182fdbdSPeter Wemm 961f7788e8eSJonathan Lemon /* Release our allocated resources. */ 962f7788e8eSJonathan Lemon fxp_release(sc); 963f7788e8eSJonathan Lemon return (0); 964a17c678eSDavid Greenman } 965a17c678eSDavid Greenman 966a17c678eSDavid Greenman /* 9674a684684SDavid Greenman * Device shutdown routine. Called at system shutdown after sync. The 968a17c678eSDavid Greenman * main purpose of this routine is to shut off receiver DMA so that 969a17c678eSDavid Greenman * kernel memory doesn't get clobbered during warmboot. 970a17c678eSDavid Greenman */ 9716182fdbdSPeter Wemm static int 9726182fdbdSPeter Wemm fxp_shutdown(device_t dev) 973a17c678eSDavid Greenman { 9746182fdbdSPeter Wemm /* 9756182fdbdSPeter Wemm * Make sure that DMA is disabled prior to reboot. Not doing 9766182fdbdSPeter Wemm * do could allow DMA to corrupt kernel memory during the 9776182fdbdSPeter Wemm * reboot before the driver initializes. 9786182fdbdSPeter Wemm */ 9796182fdbdSPeter Wemm fxp_stop((struct fxp_softc *) device_get_softc(dev)); 980f7788e8eSJonathan Lemon return (0); 981a17c678eSDavid Greenman } 982a17c678eSDavid Greenman 9837dced78aSDavid Greenman /* 9847dced78aSDavid Greenman * Device suspend routine. Stop the interface and save some PCI 9857dced78aSDavid Greenman * settings in case the BIOS doesn't restore them properly on 9867dced78aSDavid Greenman * resume. 9877dced78aSDavid Greenman */ 9887dced78aSDavid Greenman static int 9897dced78aSDavid Greenman fxp_suspend(device_t dev) 9907dced78aSDavid Greenman { 9917dced78aSDavid Greenman struct fxp_softc *sc = device_get_softc(dev); 992f7788e8eSJonathan Lemon int i, s; 9937dced78aSDavid Greenman 9944953bccaSNate Lawson FXP_LOCK(sc); 995f7788e8eSJonathan Lemon s = splimp(); 9967dced78aSDavid Greenman 9977dced78aSDavid Greenman fxp_stop(sc); 9987dced78aSDavid Greenman 9997dced78aSDavid Greenman for (i = 0; i < 5; i++) 1000e27951b2SJohn Baldwin sc->saved_maps[i] = pci_read_config(dev, PCIR_BAR(i), 4); 10017dced78aSDavid Greenman sc->saved_biosaddr = pci_read_config(dev, PCIR_BIOS, 4); 10027dced78aSDavid Greenman sc->saved_intline = pci_read_config(dev, PCIR_INTLINE, 1); 10037dced78aSDavid Greenman sc->saved_cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1); 10047dced78aSDavid Greenman sc->saved_lattimer = pci_read_config(dev, PCIR_LATTIMER, 1); 10057dced78aSDavid Greenman 10067dced78aSDavid Greenman sc->suspended = 1; 10077dced78aSDavid Greenman 10084953bccaSNate Lawson FXP_UNLOCK(sc); 1009f7788e8eSJonathan Lemon splx(s); 1010f7788e8eSJonathan Lemon return (0); 10117dced78aSDavid Greenman } 10127dced78aSDavid Greenman 10137dced78aSDavid Greenman /* 10147dced78aSDavid Greenman * Device resume routine. Restore some PCI settings in case the BIOS 10157dced78aSDavid Greenman * doesn't, re-enable busmastering, and restart the interface if 10167dced78aSDavid Greenman * appropriate. 10177dced78aSDavid Greenman */ 10187dced78aSDavid Greenman static int 10197dced78aSDavid Greenman fxp_resume(device_t dev) 10207dced78aSDavid Greenman { 10217dced78aSDavid Greenman struct fxp_softc *sc = device_get_softc(dev); 10227dced78aSDavid Greenman struct ifnet *ifp = &sc->sc_if; 10237dced78aSDavid Greenman u_int16_t pci_command; 1024f7788e8eSJonathan Lemon int i, s; 10257dced78aSDavid Greenman 10264953bccaSNate Lawson FXP_LOCK(sc); 1027f7788e8eSJonathan Lemon s = splimp(); 1028fa4b32faSWarner Losh #ifndef BURN_BRIDGES 102948e417ebSJonathan Lemon fxp_powerstate_d0(dev); 1030fa4b32faSWarner Losh #endif 10317dced78aSDavid Greenman /* better way to do this? */ 10327dced78aSDavid Greenman for (i = 0; i < 5; i++) 1033e27951b2SJohn Baldwin pci_write_config(dev, PCIR_BAR(i), sc->saved_maps[i], 4); 10347dced78aSDavid Greenman pci_write_config(dev, PCIR_BIOS, sc->saved_biosaddr, 4); 10357dced78aSDavid Greenman pci_write_config(dev, PCIR_INTLINE, sc->saved_intline, 1); 10367dced78aSDavid Greenman pci_write_config(dev, PCIR_CACHELNSZ, sc->saved_cachelnsz, 1); 10377dced78aSDavid Greenman pci_write_config(dev, PCIR_LATTIMER, sc->saved_lattimer, 1); 10387dced78aSDavid Greenman 10397dced78aSDavid Greenman /* reenable busmastering */ 10407dced78aSDavid Greenman pci_command = pci_read_config(dev, PCIR_COMMAND, 2); 10417dced78aSDavid Greenman pci_command |= (PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 10427dced78aSDavid Greenman pci_write_config(dev, PCIR_COMMAND, pci_command, 2); 10437dced78aSDavid Greenman 10447dced78aSDavid Greenman CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 10457dced78aSDavid Greenman DELAY(10); 10467dced78aSDavid Greenman 10477dced78aSDavid Greenman /* reinitialize interface if necessary */ 10487dced78aSDavid Greenman if (ifp->if_flags & IFF_UP) 10494953bccaSNate Lawson fxp_init_body(sc); 10507dced78aSDavid Greenman 10517dced78aSDavid Greenman sc->suspended = 0; 10527dced78aSDavid Greenman 10534953bccaSNate Lawson FXP_UNLOCK(sc); 1054f7788e8eSJonathan Lemon splx(s); 1055ba8c6fd5SDavid Greenman return (0); 1056f7788e8eSJonathan Lemon } 1057ba8c6fd5SDavid Greenman 105800c4116bSJonathan Lemon static void 105900c4116bSJonathan Lemon fxp_eeprom_shiftin(struct fxp_softc *sc, int data, int length) 106000c4116bSJonathan Lemon { 106100c4116bSJonathan Lemon u_int16_t reg; 106200c4116bSJonathan Lemon int x; 106300c4116bSJonathan Lemon 106400c4116bSJonathan Lemon /* 106500c4116bSJonathan Lemon * Shift in data. 106600c4116bSJonathan Lemon */ 106700c4116bSJonathan Lemon for (x = 1 << (length - 1); x; x >>= 1) { 106800c4116bSJonathan Lemon if (data & x) 106900c4116bSJonathan Lemon reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 107000c4116bSJonathan Lemon else 107100c4116bSJonathan Lemon reg = FXP_EEPROM_EECS; 107200c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 107300c4116bSJonathan Lemon DELAY(1); 107400c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK); 107500c4116bSJonathan Lemon DELAY(1); 107600c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 107700c4116bSJonathan Lemon DELAY(1); 107800c4116bSJonathan Lemon } 107900c4116bSJonathan Lemon } 108000c4116bSJonathan Lemon 1081f7788e8eSJonathan Lemon /* 1082f7788e8eSJonathan Lemon * Read from the serial EEPROM. Basically, you manually shift in 1083f7788e8eSJonathan Lemon * the read opcode (one bit at a time) and then shift in the address, 1084f7788e8eSJonathan Lemon * and then you shift out the data (all of this one bit at a time). 1085f7788e8eSJonathan Lemon * The word size is 16 bits, so you have to provide the address for 1086f7788e8eSJonathan Lemon * every 16 bits of data. 1087f7788e8eSJonathan Lemon */ 1088f7788e8eSJonathan Lemon static u_int16_t 1089f7788e8eSJonathan Lemon fxp_eeprom_getword(struct fxp_softc *sc, int offset, int autosize) 1090f7788e8eSJonathan Lemon { 1091f7788e8eSJonathan Lemon u_int16_t reg, data; 1092f7788e8eSJonathan Lemon int x; 1093ba8c6fd5SDavid Greenman 1094f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 1095f7788e8eSJonathan Lemon /* 1096f7788e8eSJonathan Lemon * Shift in read opcode. 1097f7788e8eSJonathan Lemon */ 109800c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, FXP_EEPROM_OPC_READ, 3); 1099f7788e8eSJonathan Lemon /* 1100f7788e8eSJonathan Lemon * Shift in address. 1101f7788e8eSJonathan Lemon */ 1102f7788e8eSJonathan Lemon data = 0; 1103f7788e8eSJonathan Lemon for (x = 1 << (sc->eeprom_size - 1); x; x >>= 1) { 1104f7788e8eSJonathan Lemon if (offset & x) 1105f7788e8eSJonathan Lemon reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 1106f7788e8eSJonathan Lemon else 1107f7788e8eSJonathan Lemon reg = FXP_EEPROM_EECS; 1108f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 1109f7788e8eSJonathan Lemon DELAY(1); 1110f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK); 1111f7788e8eSJonathan Lemon DELAY(1); 1112f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 1113f7788e8eSJonathan Lemon DELAY(1); 1114f7788e8eSJonathan Lemon reg = CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO; 1115f7788e8eSJonathan Lemon data++; 1116f7788e8eSJonathan Lemon if (autosize && reg == 0) { 1117f7788e8eSJonathan Lemon sc->eeprom_size = data; 1118f7788e8eSJonathan Lemon break; 1119f7788e8eSJonathan Lemon } 1120f7788e8eSJonathan Lemon } 1121f7788e8eSJonathan Lemon /* 1122f7788e8eSJonathan Lemon * Shift out data. 1123f7788e8eSJonathan Lemon */ 1124f7788e8eSJonathan Lemon data = 0; 1125f7788e8eSJonathan Lemon reg = FXP_EEPROM_EECS; 1126f7788e8eSJonathan Lemon for (x = 1 << 15; x; x >>= 1) { 1127f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK); 1128f7788e8eSJonathan Lemon DELAY(1); 1129f7788e8eSJonathan Lemon if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO) 1130f7788e8eSJonathan Lemon data |= x; 1131f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 1132f7788e8eSJonathan Lemon DELAY(1); 1133f7788e8eSJonathan Lemon } 1134f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 1135f7788e8eSJonathan Lemon DELAY(1); 1136f7788e8eSJonathan Lemon 1137f7788e8eSJonathan Lemon return (data); 1138ba8c6fd5SDavid Greenman } 1139ba8c6fd5SDavid Greenman 114000c4116bSJonathan Lemon static void 114100c4116bSJonathan Lemon fxp_eeprom_putword(struct fxp_softc *sc, int offset, u_int16_t data) 114200c4116bSJonathan Lemon { 114300c4116bSJonathan Lemon int i; 114400c4116bSJonathan Lemon 114500c4116bSJonathan Lemon /* 114600c4116bSJonathan Lemon * Erase/write enable. 114700c4116bSJonathan Lemon */ 114800c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 114900c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, 0x4, 3); 115000c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, 0x03 << (sc->eeprom_size - 2), sc->eeprom_size); 115100c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 115200c4116bSJonathan Lemon DELAY(1); 115300c4116bSJonathan Lemon /* 115400c4116bSJonathan Lemon * Shift in write opcode, address, data. 115500c4116bSJonathan Lemon */ 115600c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 115700c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, FXP_EEPROM_OPC_WRITE, 3); 115800c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, offset, sc->eeprom_size); 115900c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, data, 16); 116000c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 116100c4116bSJonathan Lemon DELAY(1); 116200c4116bSJonathan Lemon /* 116300c4116bSJonathan Lemon * Wait for EEPROM to finish up. 116400c4116bSJonathan Lemon */ 116500c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 116600c4116bSJonathan Lemon DELAY(1); 116700c4116bSJonathan Lemon for (i = 0; i < 1000; i++) { 116800c4116bSJonathan Lemon if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO) 116900c4116bSJonathan Lemon break; 117000c4116bSJonathan Lemon DELAY(50); 117100c4116bSJonathan Lemon } 117200c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 117300c4116bSJonathan Lemon DELAY(1); 117400c4116bSJonathan Lemon /* 117500c4116bSJonathan Lemon * Erase/write disable. 117600c4116bSJonathan Lemon */ 117700c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 117800c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, 0x4, 3); 117900c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, 0, sc->eeprom_size); 118000c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 118100c4116bSJonathan Lemon DELAY(1); 118200c4116bSJonathan Lemon } 118300c4116bSJonathan Lemon 1184ba8c6fd5SDavid Greenman /* 1185e9bf2fa7SDavid Greenman * From NetBSD: 1186e9bf2fa7SDavid Greenman * 1187e9bf2fa7SDavid Greenman * Figure out EEPROM size. 1188e9bf2fa7SDavid Greenman * 1189e9bf2fa7SDavid Greenman * 559's can have either 64-word or 256-word EEPROMs, the 558 1190e9bf2fa7SDavid Greenman * datasheet only talks about 64-word EEPROMs, and the 557 datasheet 1191e9bf2fa7SDavid Greenman * talks about the existance of 16 to 256 word EEPROMs. 1192e9bf2fa7SDavid Greenman * 1193e9bf2fa7SDavid Greenman * The only known sizes are 64 and 256, where the 256 version is used 1194e9bf2fa7SDavid Greenman * by CardBus cards to store CIS information. 1195e9bf2fa7SDavid Greenman * 1196e9bf2fa7SDavid Greenman * The address is shifted in msb-to-lsb, and after the last 1197e9bf2fa7SDavid Greenman * address-bit the EEPROM is supposed to output a `dummy zero' bit, 1198e9bf2fa7SDavid Greenman * after which follows the actual data. We try to detect this zero, by 1199e9bf2fa7SDavid Greenman * probing the data-out bit in the EEPROM control register just after 1200e9bf2fa7SDavid Greenman * having shifted in a bit. If the bit is zero, we assume we've 1201e9bf2fa7SDavid Greenman * shifted enough address bits. The data-out should be tri-state, 1202e9bf2fa7SDavid Greenman * before this, which should translate to a logical one. 1203e9bf2fa7SDavid Greenman */ 1204e9bf2fa7SDavid Greenman static void 1205f7788e8eSJonathan Lemon fxp_autosize_eeprom(struct fxp_softc *sc) 1206e9bf2fa7SDavid Greenman { 1207e9bf2fa7SDavid Greenman 1208f7788e8eSJonathan Lemon /* guess maximum size of 256 words */ 1209f7788e8eSJonathan Lemon sc->eeprom_size = 8; 1210f7788e8eSJonathan Lemon 1211f7788e8eSJonathan Lemon /* autosize */ 1212f7788e8eSJonathan Lemon (void) fxp_eeprom_getword(sc, 0, 1); 1213e9bf2fa7SDavid Greenman } 1214f7788e8eSJonathan Lemon 1215ba8c6fd5SDavid Greenman static void 1216f7788e8eSJonathan Lemon fxp_read_eeprom(struct fxp_softc *sc, u_short *data, int offset, int words) 1217ba8c6fd5SDavid Greenman { 1218f7788e8eSJonathan Lemon int i; 1219ba8c6fd5SDavid Greenman 1220f7788e8eSJonathan Lemon for (i = 0; i < words; i++) 1221f7788e8eSJonathan Lemon data[i] = fxp_eeprom_getword(sc, offset + i, 0); 1222ba8c6fd5SDavid Greenman } 1223ba8c6fd5SDavid Greenman 122400c4116bSJonathan Lemon static void 122500c4116bSJonathan Lemon fxp_write_eeprom(struct fxp_softc *sc, u_short *data, int offset, int words) 122600c4116bSJonathan Lemon { 122700c4116bSJonathan Lemon int i; 122800c4116bSJonathan Lemon 122900c4116bSJonathan Lemon for (i = 0; i < words; i++) 123000c4116bSJonathan Lemon fxp_eeprom_putword(sc, offset + i, data[i]); 123100c4116bSJonathan Lemon } 123200c4116bSJonathan Lemon 1233b2badf02SMaxime Henrion static void 1234b2badf02SMaxime Henrion fxp_dma_map_txbuf(void *arg, bus_dma_segment_t *segs, int nseg, 1235b2badf02SMaxime Henrion bus_size_t mapsize, int error) 1236b2badf02SMaxime Henrion { 1237b2badf02SMaxime Henrion struct fxp_softc *sc; 1238b2badf02SMaxime Henrion struct fxp_cb_tx *txp; 1239b2badf02SMaxime Henrion int i; 1240b2badf02SMaxime Henrion 1241b2badf02SMaxime Henrion if (error) 1242b2badf02SMaxime Henrion return; 1243b2badf02SMaxime Henrion 1244b2badf02SMaxime Henrion KASSERT(nseg <= FXP_NTXSEG, ("too many DMA segments")); 1245b2badf02SMaxime Henrion 1246b2badf02SMaxime Henrion sc = arg; 1247b2badf02SMaxime Henrion txp = sc->fxp_desc.tx_last->tx_next->tx_cb; 1248b2badf02SMaxime Henrion for (i = 0; i < nseg; i++) { 1249b2badf02SMaxime Henrion KASSERT(segs[i].ds_len <= MCLBYTES, ("segment size too large")); 1250b2badf02SMaxime Henrion /* 1251b2badf02SMaxime Henrion * If this is an 82550/82551, then we're using extended 1252b2badf02SMaxime Henrion * TxCBs _and_ we're using checksum offload. This means 1253b2badf02SMaxime Henrion * that the TxCB is really an IPCB. One major difference 1254b2badf02SMaxime Henrion * between the two is that with plain extended TxCBs, 1255b2badf02SMaxime Henrion * the bottom half of the TxCB contains two entries from 1256b2badf02SMaxime Henrion * the TBD array, whereas IPCBs contain just one entry: 1257b2badf02SMaxime Henrion * one entry (8 bytes) has been sacrificed for the TCP/IP 1258b2badf02SMaxime Henrion * checksum offload control bits. So to make things work 1259b2badf02SMaxime Henrion * right, we have to start filling in the TBD array 1260b2badf02SMaxime Henrion * starting from a different place depending on whether 1261b2badf02SMaxime Henrion * the chip is an 82550/82551 or not. 1262b2badf02SMaxime Henrion */ 1263b2badf02SMaxime Henrion if (sc->flags & FXP_FLAG_EXT_RFA) { 126483e6547dSMaxime Henrion txp->tbd[i + 1].tb_addr = htole32(segs[i].ds_addr); 126583e6547dSMaxime Henrion txp->tbd[i + 1].tb_size = htole32(segs[i].ds_len); 1266b2badf02SMaxime Henrion } else { 126783e6547dSMaxime Henrion txp->tbd[i].tb_addr = htole32(segs[i].ds_addr); 126883e6547dSMaxime Henrion txp->tbd[i].tb_size = htole32(segs[i].ds_len); 1269b2badf02SMaxime Henrion } 1270b2badf02SMaxime Henrion } 1271b2badf02SMaxime Henrion txp->tbd_number = nseg; 1272b2badf02SMaxime Henrion } 1273b2badf02SMaxime Henrion 1274a17c678eSDavid Greenman /* 12754953bccaSNate Lawson * Grab the softc lock and call the real fxp_start_body() routine 1276a17c678eSDavid Greenman */ 1277a17c678eSDavid Greenman static void 1278f7788e8eSJonathan Lemon fxp_start(struct ifnet *ifp) 1279a17c678eSDavid Greenman { 12809b44ff22SGarrett Wollman struct fxp_softc *sc = ifp->if_softc; 12814953bccaSNate Lawson 12824953bccaSNate Lawson FXP_LOCK(sc); 12834953bccaSNate Lawson fxp_start_body(ifp); 12844953bccaSNate Lawson FXP_UNLOCK(sc); 12854953bccaSNate Lawson } 12864953bccaSNate Lawson 12874953bccaSNate Lawson /* 12884953bccaSNate Lawson * Start packet transmission on the interface. 12894953bccaSNate Lawson * This routine must be called with the softc lock held, and is an 12904953bccaSNate Lawson * internal entry point only. 12914953bccaSNate Lawson */ 12924953bccaSNate Lawson static void 12934953bccaSNate Lawson fxp_start_body(struct ifnet *ifp) 12944953bccaSNate Lawson { 12954953bccaSNate Lawson struct fxp_softc *sc = ifp->if_softc; 129650d81222SMaxime Henrion struct fxp_tx *txp; 1297b2badf02SMaxime Henrion struct mbuf *mb_head; 1298b2badf02SMaxime Henrion int error; 1299a17c678eSDavid Greenman 13004953bccaSNate Lawson mtx_assert(&sc->sc_mtx, MA_OWNED); 1301a17c678eSDavid Greenman /* 1302483b9871SDavid Greenman * See if we need to suspend xmit until the multicast filter 1303483b9871SDavid Greenman * has been reprogrammed (which can only be done at the head 1304483b9871SDavid Greenman * of the command chain). 1305a17c678eSDavid Greenman */ 13060f4dc94cSChuck Paterson if (sc->need_mcsetup) { 1307a17c678eSDavid Greenman return; 13080f4dc94cSChuck Paterson } 13091cd443acSDavid Greenman 1310483b9871SDavid Greenman txp = NULL; 1311483b9871SDavid Greenman 1312483b9871SDavid Greenman /* 1313483b9871SDavid Greenman * We're finished if there is nothing more to add to the list or if 1314483b9871SDavid Greenman * we're all filled up with buffers to transmit. 13153114fdb4SDavid Greenman * NOTE: One TxCB is reserved to guarantee that fxp_mc_setup() can add 13163114fdb4SDavid Greenman * a NOP command when needed. 1317483b9871SDavid Greenman */ 13183114fdb4SDavid Greenman while (ifp->if_snd.ifq_head != NULL && sc->tx_queued < FXP_NTXCB - 1) { 1319483b9871SDavid Greenman 1320dfe61cf1SDavid Greenman /* 1321dfe61cf1SDavid Greenman * Grab a packet to transmit. 1322dfe61cf1SDavid Greenman */ 13236318197eSDavid Greenman IF_DEQUEUE(&ifp->if_snd, mb_head); 1324a17c678eSDavid Greenman 1325dfe61cf1SDavid Greenman /* 1326483b9871SDavid Greenman * Get pointer to next available tx desc. 1327dfe61cf1SDavid Greenman */ 1328b2badf02SMaxime Henrion txp = sc->fxp_desc.tx_last->tx_next; 1329c8bca6dcSBill Paul 1330c8bca6dcSBill Paul /* 1331a35e7eaaSDon Lewis * A note in Appendix B of the Intel 8255x 10/100 Mbps 1332a35e7eaaSDon Lewis * Ethernet Controller Family Open Source Software 1333a35e7eaaSDon Lewis * Developer Manual says: 1334a35e7eaaSDon Lewis * Using software parsing is only allowed with legal 1335a35e7eaaSDon Lewis * TCP/IP or UDP/IP packets. 1336a35e7eaaSDon Lewis * ... 1337a35e7eaaSDon Lewis * For all other datagrams, hardware parsing must 1338a35e7eaaSDon Lewis * be used. 1339a35e7eaaSDon Lewis * Software parsing appears to truncate ICMP and 1340a35e7eaaSDon Lewis * fragmented UDP packets that contain one to three 1341a35e7eaaSDon Lewis * bytes in the second (and final) mbuf of the packet. 1342a35e7eaaSDon Lewis */ 1343a35e7eaaSDon Lewis if (sc->flags & FXP_FLAG_EXT_RFA) 1344a35e7eaaSDon Lewis txp->tx_cb->ipcb_ip_activation_high = 1345a35e7eaaSDon Lewis FXP_IPCB_HARDWAREPARSING_ENABLE; 1346a35e7eaaSDon Lewis 1347a35e7eaaSDon Lewis /* 1348c8bca6dcSBill Paul * Deal with TCP/IP checksum offload. Note that 1349c8bca6dcSBill Paul * in order for TCP checksum offload to work, 1350c8bca6dcSBill Paul * the pseudo header checksum must have already 1351c8bca6dcSBill Paul * been computed and stored in the checksum field 1352c8bca6dcSBill Paul * in the TCP header. The stack should have 1353c8bca6dcSBill Paul * already done this for us. 1354c8bca6dcSBill Paul */ 1355c8bca6dcSBill Paul 1356c8bca6dcSBill Paul if (mb_head->m_pkthdr.csum_flags) { 1357c8bca6dcSBill Paul if (mb_head->m_pkthdr.csum_flags & CSUM_DELAY_DATA) { 1358b2badf02SMaxime Henrion txp->tx_cb->ipcb_ip_schedule = 1359c8bca6dcSBill Paul FXP_IPCB_TCPUDP_CHECKSUM_ENABLE; 1360c8bca6dcSBill Paul if (mb_head->m_pkthdr.csum_flags & CSUM_TCP) 1361b2badf02SMaxime Henrion txp->tx_cb->ipcb_ip_schedule |= 1362c8bca6dcSBill Paul FXP_IPCB_TCP_PACKET; 1363c8bca6dcSBill Paul } 1364c8bca6dcSBill Paul #ifdef FXP_IP_CSUM_WAR 1365c8bca6dcSBill Paul /* 1366c8bca6dcSBill Paul * XXX The 82550 chip appears to have trouble 1367c8bca6dcSBill Paul * dealing with IP header checksums in very small 1368c8bca6dcSBill Paul * datagrams, namely fragments from 1 to 3 bytes 1369c8bca6dcSBill Paul * in size. For example, say you want to transmit 1370c8bca6dcSBill Paul * a UDP packet of 1473 bytes. The packet will be 1371c8bca6dcSBill Paul * fragmented over two IP datagrams, the latter 1372c8bca6dcSBill Paul * containing only one byte of data. The 82550 will 1373c8bca6dcSBill Paul * botch the header checksum on the 1-byte fragment. 1374c8bca6dcSBill Paul * As long as the datagram contains 4 or more bytes 1375c8bca6dcSBill Paul * of data, you're ok. 1376c8bca6dcSBill Paul * 1377c8bca6dcSBill Paul * The following code attempts to work around this 1378c8bca6dcSBill Paul * problem: if the datagram is less than 38 bytes 1379c8bca6dcSBill Paul * in size (14 bytes ether header, 20 bytes IP header, 1380c8bca6dcSBill Paul * plus 4 bytes of data), we punt and compute the IP 1381c8bca6dcSBill Paul * header checksum by hand. This workaround doesn't 1382c8bca6dcSBill Paul * work very well, however, since it can be fooled 1383c8bca6dcSBill Paul * by things like VLAN tags and IP options that make 1384c8bca6dcSBill Paul * the header sizes/offsets vary. 1385c8bca6dcSBill Paul */ 1386c8bca6dcSBill Paul 1387c8bca6dcSBill Paul if (mb_head->m_pkthdr.csum_flags & CSUM_IP) { 1388c8bca6dcSBill Paul if (mb_head->m_pkthdr.len < 38) { 1389c8bca6dcSBill Paul struct ip *ip; 1390c8bca6dcSBill Paul mb_head->m_data += ETHER_HDR_LEN; 1391c8bca6dcSBill Paul ip = mtod(mb_head, struct ip *); 1392c8bca6dcSBill Paul ip->ip_sum = in_cksum(mb_head, 1393c8bca6dcSBill Paul ip->ip_hl << 2); 1394c8bca6dcSBill Paul mb_head->m_data -= ETHER_HDR_LEN; 1395c8bca6dcSBill Paul } else { 1396b2badf02SMaxime Henrion txp->tx_cb->ipcb_ip_activation_high = 1397c8bca6dcSBill Paul FXP_IPCB_HARDWAREPARSING_ENABLE; 1398b2badf02SMaxime Henrion txp->tx_cb->ipcb_ip_schedule |= 1399c8bca6dcSBill Paul FXP_IPCB_IP_CHECKSUM_ENABLE; 1400c8bca6dcSBill Paul } 1401c8bca6dcSBill Paul } 1402c8bca6dcSBill Paul #endif 1403c8bca6dcSBill Paul } 1404c8bca6dcSBill Paul 1405c8bca6dcSBill Paul /* 1406a17c678eSDavid Greenman * Go through each of the mbufs in the chain and initialize 1407483b9871SDavid Greenman * the transmit buffer descriptors with the physical address 1408a17c678eSDavid Greenman * and size of the mbuf. 1409a17c678eSDavid Greenman */ 1410b2badf02SMaxime Henrion error = bus_dmamap_load_mbuf(sc->fxp_mtag, txp->tx_map, 1411b2badf02SMaxime Henrion mb_head, fxp_dma_map_txbuf, sc, 0); 1412b2badf02SMaxime Henrion 1413b2badf02SMaxime Henrion if (error && error != EFBIG) { 1414b2badf02SMaxime Henrion device_printf(sc->dev, "can't map mbuf (error %d)\n", 1415b2badf02SMaxime Henrion error); 1416b2badf02SMaxime Henrion m_freem(mb_head); 1417a17c678eSDavid Greenman break; 1418a17c678eSDavid Greenman } 1419b2badf02SMaxime Henrion 1420b2badf02SMaxime Henrion if (error) { 142123a0ed7cSDavid Greenman struct mbuf *mn; 142223a0ed7cSDavid Greenman 1423a17c678eSDavid Greenman /* 14243bd07cfdSJonathan Lemon * We ran out of segments. We have to recopy this 14253bd07cfdSJonathan Lemon * mbuf chain first. Bail out if we can't get the 14263bd07cfdSJonathan Lemon * new buffers. 1427a17c678eSDavid Greenman */ 14281104779bSMike Silbersack mn = m_defrag(mb_head, M_DONTWAIT); 142923a0ed7cSDavid Greenman if (mn == NULL) { 143023a0ed7cSDavid Greenman m_freem(mb_head); 1431483b9871SDavid Greenman break; 14321104779bSMike Silbersack } else { 143323a0ed7cSDavid Greenman mb_head = mn; 14341104779bSMike Silbersack } 1435b2badf02SMaxime Henrion error = bus_dmamap_load_mbuf(sc->fxp_mtag, txp->tx_map, 1436b2badf02SMaxime Henrion mb_head, fxp_dma_map_txbuf, sc, 0); 1437b2badf02SMaxime Henrion if (error) { 1438b2badf02SMaxime Henrion device_printf(sc->dev, 1439b2badf02SMaxime Henrion "can't map mbuf (error %d)\n", error); 1440b2badf02SMaxime Henrion m_freem(mb_head); 1441b2badf02SMaxime Henrion break; 1442b2badf02SMaxime Henrion } 144323a0ed7cSDavid Greenman } 144423a0ed7cSDavid Greenman 1445b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, txp->tx_map, 1446b2badf02SMaxime Henrion BUS_DMASYNC_PREWRITE); 1447b2badf02SMaxime Henrion 1448b2badf02SMaxime Henrion txp->tx_mbuf = mb_head; 1449b2badf02SMaxime Henrion txp->tx_cb->cb_status = 0; 1450b2badf02SMaxime Henrion txp->tx_cb->byte_count = 0; 14513114fdb4SDavid Greenman if (sc->tx_queued != FXP_CXINT_THRESH - 1) { 1452b2badf02SMaxime Henrion txp->tx_cb->cb_command = 145383e6547dSMaxime Henrion htole16(sc->tx_cmd | FXP_CB_COMMAND_SF | 145483e6547dSMaxime Henrion FXP_CB_COMMAND_S); 14553114fdb4SDavid Greenman } else { 1456b2badf02SMaxime Henrion txp->tx_cb->cb_command = 145783e6547dSMaxime Henrion htole16(sc->tx_cmd | FXP_CB_COMMAND_SF | 145883e6547dSMaxime Henrion FXP_CB_COMMAND_S | FXP_CB_COMMAND_I); 14593114fdb4SDavid Greenman /* 14603bd07cfdSJonathan Lemon * Set a 5 second timer just in case we don't hear 14613bd07cfdSJonathan Lemon * from the card again. 14623114fdb4SDavid Greenman */ 14633114fdb4SDavid Greenman ifp->if_timer = 5; 14643114fdb4SDavid Greenman } 1465b2badf02SMaxime Henrion txp->tx_cb->tx_threshold = tx_threshold; 1466a17c678eSDavid Greenman 1467a17c678eSDavid Greenman /* 1468483b9871SDavid Greenman * Advance the end of list forward. 1469a17c678eSDavid Greenman */ 147006175228SAndrew Gallatin 147150d81222SMaxime Henrion #ifdef __alpha__ 147206175228SAndrew Gallatin /* 147306175228SAndrew Gallatin * On platforms which can't access memory in 16-bit 147406175228SAndrew Gallatin * granularities, we must prevent the card from DMA'ing 147506175228SAndrew Gallatin * up the status while we update the command field. 147606175228SAndrew Gallatin * This could cause us to overwrite the completion status. 147714fd1071SMaxime Henrion * XXX This is probably bogus and we're _not_ looking 147814fd1071SMaxime Henrion * for atomicity here. 147906175228SAndrew Gallatin */ 148014fd1071SMaxime Henrion atomic_clear_16(&sc->fxp_desc.tx_last->tx_cb->cb_command, 1481bafb64afSMaxime Henrion htole16(FXP_CB_COMMAND_S)); 148250d81222SMaxime Henrion #else 1483bafb64afSMaxime Henrion sc->fxp_desc.tx_last->tx_cb->cb_command &= 1484bafb64afSMaxime Henrion htole16(~FXP_CB_COMMAND_S); 148550d81222SMaxime Henrion #endif /*__alpha__*/ 1486b2badf02SMaxime Henrion sc->fxp_desc.tx_last = txp; 1487a17c678eSDavid Greenman 1488a17c678eSDavid Greenman /* 14891cd443acSDavid Greenman * Advance the beginning of the list forward if there are 1490b2badf02SMaxime Henrion * no other packets queued (when nothing is queued, tx_first 1491483b9871SDavid Greenman * sits on the last TxCB that was sent out). 1492a17c678eSDavid Greenman */ 14931cd443acSDavid Greenman if (sc->tx_queued == 0) 1494b2badf02SMaxime Henrion sc->fxp_desc.tx_first = txp; 1495a17c678eSDavid Greenman 14961cd443acSDavid Greenman sc->tx_queued++; 14971cd443acSDavid Greenman 1498a17c678eSDavid Greenman /* 1499a17c678eSDavid Greenman * Pass packet to bpf if there is a listener. 1500a17c678eSDavid Greenman */ 1501673d9191SSam Leffler BPF_MTAP(ifp, mb_head); 1502483b9871SDavid Greenman } 1503b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 1504483b9871SDavid Greenman 1505483b9871SDavid Greenman /* 1506483b9871SDavid Greenman * We're finished. If we added to the list, issue a RESUME to get DMA 1507483b9871SDavid Greenman * going again if suspended. 1508483b9871SDavid Greenman */ 1509483b9871SDavid Greenman if (txp != NULL) { 1510483b9871SDavid Greenman fxp_scb_wait(sc); 15112e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_RESUME); 1512483b9871SDavid Greenman } 1513a17c678eSDavid Greenman } 1514a17c678eSDavid Greenman 1515e4fc250cSLuigi Rizzo #ifdef DEVICE_POLLING 1516e4fc250cSLuigi Rizzo static poll_handler_t fxp_poll; 1517e4fc250cSLuigi Rizzo 1518e4fc250cSLuigi Rizzo static void 1519e4fc250cSLuigi Rizzo fxp_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) 1520e4fc250cSLuigi Rizzo { 1521e4fc250cSLuigi Rizzo struct fxp_softc *sc = ifp->if_softc; 1522e4fc250cSLuigi Rizzo u_int8_t statack; 1523e4fc250cSLuigi Rizzo 15244953bccaSNate Lawson FXP_LOCK(sc); 1525fb917226SRuslan Ermilov if (!(ifp->if_capenable & IFCAP_POLLING)) { 1526fb917226SRuslan Ermilov ether_poll_deregister(ifp); 1527fb917226SRuslan Ermilov cmd = POLL_DEREGISTER; 1528fb917226SRuslan Ermilov } 1529e4fc250cSLuigi Rizzo if (cmd == POLL_DEREGISTER) { /* final call, enable interrupts */ 1530e4fc250cSLuigi Rizzo CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, 0); 15314953bccaSNate Lawson FXP_UNLOCK(sc); 1532e4fc250cSLuigi Rizzo return; 1533e4fc250cSLuigi Rizzo } 1534e4fc250cSLuigi Rizzo statack = FXP_SCB_STATACK_CXTNO | FXP_SCB_STATACK_CNA | 1535e4fc250cSLuigi Rizzo FXP_SCB_STATACK_FR; 1536e4fc250cSLuigi Rizzo if (cmd == POLL_AND_CHECK_STATUS) { 1537e4fc250cSLuigi Rizzo u_int8_t tmp; 15386481f301SPeter Wemm 1539e4fc250cSLuigi Rizzo tmp = CSR_READ_1(sc, FXP_CSR_SCB_STATACK); 15404953bccaSNate Lawson if (tmp == 0xff || tmp == 0) { 15414953bccaSNate Lawson FXP_UNLOCK(sc); 1542e4fc250cSLuigi Rizzo return; /* nothing to do */ 15434953bccaSNate Lawson } 1544e4fc250cSLuigi Rizzo tmp &= ~statack; 1545e4fc250cSLuigi Rizzo /* ack what we can */ 1546e4fc250cSLuigi Rizzo if (tmp != 0) 1547e4fc250cSLuigi Rizzo CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, tmp); 1548e4fc250cSLuigi Rizzo statack |= tmp; 1549e4fc250cSLuigi Rizzo } 15504953bccaSNate Lawson fxp_intr_body(sc, ifp, statack, count); 15514953bccaSNate Lawson FXP_UNLOCK(sc); 1552e4fc250cSLuigi Rizzo } 1553e4fc250cSLuigi Rizzo #endif /* DEVICE_POLLING */ 1554e4fc250cSLuigi Rizzo 1555a17c678eSDavid Greenman /* 15569c7d2607SDavid Greenman * Process interface interrupts. 1557a17c678eSDavid Greenman */ 155894927790SDavid Greenman static void 1559f7788e8eSJonathan Lemon fxp_intr(void *xsc) 1560a17c678eSDavid Greenman { 1561f7788e8eSJonathan Lemon struct fxp_softc *sc = xsc; 15624953bccaSNate Lawson struct ifnet *ifp = &sc->sc_if; 15631cd443acSDavid Greenman u_int8_t statack; 15640f4dc94cSChuck Paterson 15654953bccaSNate Lawson FXP_LOCK(sc); 1566704d1965SWarner Losh if (sc->suspended) { 1567704d1965SWarner Losh FXP_UNLOCK(sc); 1568704d1965SWarner Losh return; 1569704d1965SWarner Losh } 1570704d1965SWarner Losh 1571e4fc250cSLuigi Rizzo #ifdef DEVICE_POLLING 15724953bccaSNate Lawson if (ifp->if_flags & IFF_POLLING) { 15734953bccaSNate Lawson FXP_UNLOCK(sc); 1574e4fc250cSLuigi Rizzo return; 15754953bccaSNate Lawson } 1576fb917226SRuslan Ermilov if ((ifp->if_capenable & IFCAP_POLLING) && 1577fb917226SRuslan Ermilov ether_poll_register(fxp_poll, ifp)) { 1578e4fc250cSLuigi Rizzo /* disable interrupts */ 1579e4fc250cSLuigi Rizzo CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, FXP_SCB_INTR_DISABLE); 15804953bccaSNate Lawson FXP_UNLOCK(sc); 1581c660bdfaSJohn Baldwin fxp_poll(ifp, 0, 1); 1582e4fc250cSLuigi Rizzo return; 1583e4fc250cSLuigi Rizzo } 1584e4fc250cSLuigi Rizzo #endif 1585b184b38eSDavid Greenman while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) { 1586a17c678eSDavid Greenman /* 158711457bbfSJonathan Lemon * It should not be possible to have all bits set; the 158811457bbfSJonathan Lemon * FXP_SCB_INTR_SWI bit always returns 0 on a read. If 158911457bbfSJonathan Lemon * all bits are set, this may indicate that the card has 159011457bbfSJonathan Lemon * been physically ejected, so ignore it. 159111457bbfSJonathan Lemon */ 15924953bccaSNate Lawson if (statack == 0xff) { 15934953bccaSNate Lawson FXP_UNLOCK(sc); 159411457bbfSJonathan Lemon return; 15954953bccaSNate Lawson } 159611457bbfSJonathan Lemon 159711457bbfSJonathan Lemon /* 1598a17c678eSDavid Greenman * First ACK all the interrupts in this pass. 1599a17c678eSDavid Greenman */ 1600ba8c6fd5SDavid Greenman CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack); 16014953bccaSNate Lawson fxp_intr_body(sc, ifp, statack, -1); 1602e4fc250cSLuigi Rizzo } 16034953bccaSNate Lawson FXP_UNLOCK(sc); 1604e4fc250cSLuigi Rizzo } 1605e4fc250cSLuigi Rizzo 1606e4fc250cSLuigi Rizzo static void 1607b2badf02SMaxime Henrion fxp_txeof(struct fxp_softc *sc) 1608b2badf02SMaxime Henrion { 1609b2badf02SMaxime Henrion struct fxp_tx *txp; 1610b2badf02SMaxime Henrion 1611b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREREAD); 1612b2badf02SMaxime Henrion for (txp = sc->fxp_desc.tx_first; sc->tx_queued && 161383e6547dSMaxime Henrion (le16toh(txp->tx_cb->cb_status) & FXP_CB_STATUS_C) != 0; 1614b2badf02SMaxime Henrion txp = txp->tx_next) { 1615b2badf02SMaxime Henrion if (txp->tx_mbuf != NULL) { 1616b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, txp->tx_map, 1617b2badf02SMaxime Henrion BUS_DMASYNC_POSTWRITE); 1618b2badf02SMaxime Henrion bus_dmamap_unload(sc->fxp_mtag, txp->tx_map); 1619b2badf02SMaxime Henrion m_freem(txp->tx_mbuf); 1620b2badf02SMaxime Henrion txp->tx_mbuf = NULL; 1621b2badf02SMaxime Henrion /* clear this to reset csum offload bits */ 1622b2badf02SMaxime Henrion txp->tx_cb->tbd[0].tb_addr = 0; 1623b2badf02SMaxime Henrion } 1624b2badf02SMaxime Henrion sc->tx_queued--; 1625b2badf02SMaxime Henrion } 1626b2badf02SMaxime Henrion sc->fxp_desc.tx_first = txp; 1627b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 1628b2badf02SMaxime Henrion } 1629b2badf02SMaxime Henrion 1630b2badf02SMaxime Henrion static void 16314953bccaSNate Lawson fxp_intr_body(struct fxp_softc *sc, struct ifnet *ifp, u_int8_t statack, 16324953bccaSNate Lawson int count) 1633e4fc250cSLuigi Rizzo { 16342b5989e9SLuigi Rizzo struct mbuf *m; 1635b2badf02SMaxime Henrion struct fxp_rx *rxp; 16362b5989e9SLuigi Rizzo struct fxp_rfa *rfa; 16372b5989e9SLuigi Rizzo int rnr = (statack & FXP_SCB_STATACK_RNR) ? 1 : 0; 16382b5989e9SLuigi Rizzo 16394953bccaSNate Lawson mtx_assert(&sc->sc_mtx, MA_OWNED); 16402b5989e9SLuigi Rizzo if (rnr) 16412b5989e9SLuigi Rizzo fxp_rnr++; 1642947e3815SIan Dowse #ifdef DEVICE_POLLING 1643947e3815SIan Dowse /* Pick up a deferred RNR condition if `count' ran out last time. */ 1644947e3815SIan Dowse if (sc->flags & FXP_FLAG_DEFERRED_RNR) { 1645947e3815SIan Dowse sc->flags &= ~FXP_FLAG_DEFERRED_RNR; 1646947e3815SIan Dowse rnr = 1; 1647947e3815SIan Dowse } 1648947e3815SIan Dowse #endif 1649a17c678eSDavid Greenman 1650a17c678eSDavid Greenman /* 16513114fdb4SDavid Greenman * Free any finished transmit mbuf chains. 165206936301SBill Paul * 165306936301SBill Paul * Handle the CNA event likt a CXTNO event. It used to 165406936301SBill Paul * be that this event (control unit not ready) was not 165506936301SBill Paul * encountered, but it is now with the SMPng modifications. 165606936301SBill Paul * The exact sequence of events that occur when the interface 165706936301SBill Paul * is brought up are different now, and if this event 165806936301SBill Paul * goes unhandled, the configuration/rxfilter setup sequence 165906936301SBill Paul * can stall for several seconds. The result is that no 166006936301SBill Paul * packets go out onto the wire for about 5 to 10 seconds 166106936301SBill Paul * after the interface is ifconfig'ed for the first time. 16623114fdb4SDavid Greenman */ 166306936301SBill Paul if (statack & (FXP_SCB_STATACK_CXTNO | FXP_SCB_STATACK_CNA)) { 1664b2badf02SMaxime Henrion fxp_txeof(sc); 16653114fdb4SDavid Greenman 166641aa0ba2SLuigi Rizzo ifp->if_timer = 0; 1667e2102ae4SMike Silbersack if (sc->tx_queued == 0) { 16683114fdb4SDavid Greenman if (sc->need_mcsetup) 16693114fdb4SDavid Greenman fxp_mc_setup(sc); 1670e2102ae4SMike Silbersack } 16713114fdb4SDavid Greenman /* 16723114fdb4SDavid Greenman * Try to start more packets transmitting. 16733114fdb4SDavid Greenman */ 16743114fdb4SDavid Greenman if (ifp->if_snd.ifq_head != NULL) 16754953bccaSNate Lawson fxp_start_body(ifp); 16763114fdb4SDavid Greenman } 16772b5989e9SLuigi Rizzo 16782b5989e9SLuigi Rizzo /* 16792b5989e9SLuigi Rizzo * Just return if nothing happened on the receive side. 16802b5989e9SLuigi Rizzo */ 1681947e3815SIan Dowse if (!rnr && (statack & FXP_SCB_STATACK_FR) == 0) 16822b5989e9SLuigi Rizzo return; 16832b5989e9SLuigi Rizzo 16843114fdb4SDavid Greenman /* 1685a17c678eSDavid Greenman * Process receiver interrupts. If a no-resource (RNR) 1686a17c678eSDavid Greenman * condition exists, get whatever packets we can and 1687a17c678eSDavid Greenman * re-start the receiver. 1688947e3815SIan Dowse * 16892b5989e9SLuigi Rizzo * When using polling, we do not process the list to completion, 16902b5989e9SLuigi Rizzo * so when we get an RNR interrupt we must defer the restart 16912b5989e9SLuigi Rizzo * until we hit the last buffer with the C bit set. 16922b5989e9SLuigi Rizzo * If we run out of cycles and rfa_headm has the C bit set, 1693947e3815SIan Dowse * record the pending RNR in the FXP_FLAG_DEFERRED_RNR flag so 1694947e3815SIan Dowse * that the info will be used in the subsequent polling cycle. 1695a17c678eSDavid Greenman */ 16962b5989e9SLuigi Rizzo for (;;) { 1697b2badf02SMaxime Henrion rxp = sc->fxp_desc.rx_head; 1698b2badf02SMaxime Henrion m = rxp->rx_mbuf; 1699ba8c6fd5SDavid Greenman rfa = (struct fxp_rfa *)(m->m_ext.ext_buf + 1700ba8c6fd5SDavid Greenman RFA_ALIGNMENT_FUDGE); 1701b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, rxp->rx_map, 1702b2badf02SMaxime Henrion BUS_DMASYNC_POSTREAD); 1703a17c678eSDavid Greenman 1704e4fc250cSLuigi Rizzo #ifdef DEVICE_POLLING /* loop at most count times if count >=0 */ 1705947e3815SIan Dowse if (count >= 0 && count-- == 0) { 1706947e3815SIan Dowse if (rnr) { 1707947e3815SIan Dowse /* Defer RNR processing until the next time. */ 1708947e3815SIan Dowse sc->flags |= FXP_FLAG_DEFERRED_RNR; 1709947e3815SIan Dowse rnr = 0; 1710947e3815SIan Dowse } 17112b5989e9SLuigi Rizzo break; 1712947e3815SIan Dowse } 17132b5989e9SLuigi Rizzo #endif /* DEVICE_POLLING */ 17142b5989e9SLuigi Rizzo 171583e6547dSMaxime Henrion if ((le16toh(rfa->rfa_status) & FXP_RFA_STATUS_C) == 0) 17162b5989e9SLuigi Rizzo break; 17172b5989e9SLuigi Rizzo 1718dfe61cf1SDavid Greenman /* 1719b2badf02SMaxime Henrion * Advance head forward. 1720dfe61cf1SDavid Greenman */ 1721b2badf02SMaxime Henrion sc->fxp_desc.rx_head = rxp->rx_next; 1722a17c678eSDavid Greenman 1723dfe61cf1SDavid Greenman /* 1724ba8c6fd5SDavid Greenman * Add a new buffer to the receive chain. 1725ba8c6fd5SDavid Greenman * If this fails, the old buffer is recycled 1726ba8c6fd5SDavid Greenman * instead. 1727dfe61cf1SDavid Greenman */ 1728b2badf02SMaxime Henrion if (fxp_add_rfabuf(sc, rxp) == 0) { 1729aed53495SDavid Greenman int total_len; 1730a17c678eSDavid Greenman 1731e8c8b728SJonathan Lemon /* 17322b5989e9SLuigi Rizzo * Fetch packet length (the top 2 bits of 17332b5989e9SLuigi Rizzo * actual_size are flags set by the controller 17342b5989e9SLuigi Rizzo * upon completion), and drop the packet in case 17352b5989e9SLuigi Rizzo * of bogus length or CRC errors. 1736e8c8b728SJonathan Lemon */ 1737bafb64afSMaxime Henrion total_len = le16toh(rfa->actual_size) & 0x3fff; 17382b5989e9SLuigi Rizzo if (total_len < sizeof(struct ether_header) || 17392b5989e9SLuigi Rizzo total_len > MCLBYTES - RFA_ALIGNMENT_FUDGE - 1740b2badf02SMaxime Henrion sc->rfa_size || 174183e6547dSMaxime Henrion le16toh(rfa->rfa_status) & FXP_RFA_STATUS_CRC) { 1742e8c8b728SJonathan Lemon m_freem(m); 17432b5989e9SLuigi Rizzo continue; 1744e8c8b728SJonathan Lemon } 1745920b58e8SBrooks Davis 1746c8bca6dcSBill Paul /* Do IP checksum checking. */ 174783e6547dSMaxime Henrion if (le16toh(rfa->rfa_status) & FXP_RFA_STATUS_PARSE) { 1748c8bca6dcSBill Paul if (rfa->rfax_csum_sts & 1749c8bca6dcSBill Paul FXP_RFDX_CS_IP_CSUM_BIT_VALID) 1750c8bca6dcSBill Paul m->m_pkthdr.csum_flags |= 1751c8bca6dcSBill Paul CSUM_IP_CHECKED; 1752c8bca6dcSBill Paul if (rfa->rfax_csum_sts & 1753c8bca6dcSBill Paul FXP_RFDX_CS_IP_CSUM_VALID) 1754c8bca6dcSBill Paul m->m_pkthdr.csum_flags |= 1755c8bca6dcSBill Paul CSUM_IP_VALID; 1756c8bca6dcSBill Paul if ((rfa->rfax_csum_sts & 1757c8bca6dcSBill Paul FXP_RFDX_CS_TCPUDP_CSUM_BIT_VALID) && 1758c8bca6dcSBill Paul (rfa->rfax_csum_sts & 1759c8bca6dcSBill Paul FXP_RFDX_CS_TCPUDP_CSUM_VALID)) { 1760c8bca6dcSBill Paul m->m_pkthdr.csum_flags |= 1761c8bca6dcSBill Paul CSUM_DATA_VALID|CSUM_PSEUDO_HDR; 1762c8bca6dcSBill Paul m->m_pkthdr.csum_data = 0xffff; 1763c8bca6dcSBill Paul } 1764c8bca6dcSBill Paul } 1765c8bca6dcSBill Paul 17662e2de7f2SArchie Cobbs m->m_pkthdr.len = m->m_len = total_len; 1767673d9191SSam Leffler m->m_pkthdr.rcvif = ifp; 1768673d9191SSam Leffler 176905fb8c3fSNate Lawson /* 177005fb8c3fSNate Lawson * Drop locks before calling if_input() since it 177105fb8c3fSNate Lawson * may re-enter fxp_start() in the netisr case. 177205fb8c3fSNate Lawson * This would result in a lock reversal. Better 177305fb8c3fSNate Lawson * performance might be obtained by chaining all 177405fb8c3fSNate Lawson * packets received, dropping the lock, and then 177505fb8c3fSNate Lawson * calling if_input() on each one. 177605fb8c3fSNate Lawson */ 177705fb8c3fSNate Lawson FXP_UNLOCK(sc); 1778673d9191SSam Leffler (*ifp->if_input)(ifp, m); 177905fb8c3fSNate Lawson FXP_LOCK(sc); 1780a17c678eSDavid Greenman } 1781a17c678eSDavid Greenman } 17822b5989e9SLuigi Rizzo if (rnr) { 1783ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 1784ba8c6fd5SDavid Greenman CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 1785b2badf02SMaxime Henrion sc->fxp_desc.rx_head->rx_addr); 17862e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_RU_START); 1787a17c678eSDavid Greenman } 1788a17c678eSDavid Greenman } 1789a17c678eSDavid Greenman 1790dfe61cf1SDavid Greenman /* 1791dfe61cf1SDavid Greenman * Update packet in/out/collision statistics. The i82557 doesn't 1792dfe61cf1SDavid Greenman * allow you to access these counters without doing a fairly 1793dfe61cf1SDavid Greenman * expensive DMA to get _all_ of the statistics it maintains, so 1794dfe61cf1SDavid Greenman * we do this operation here only once per second. The statistics 1795dfe61cf1SDavid Greenman * counters in the kernel are updated from the previous dump-stats 1796dfe61cf1SDavid Greenman * DMA and then a new dump-stats DMA is started. The on-chip 1797dfe61cf1SDavid Greenman * counters are zeroed when the DMA completes. If we can't start 1798dfe61cf1SDavid Greenman * the DMA immediately, we don't wait - we just prepare to read 1799dfe61cf1SDavid Greenman * them again next time. 1800dfe61cf1SDavid Greenman */ 1801303b270bSEivind Eklund static void 1802f7788e8eSJonathan Lemon fxp_tick(void *xsc) 1803a17c678eSDavid Greenman { 1804f7788e8eSJonathan Lemon struct fxp_softc *sc = xsc; 1805ba8c6fd5SDavid Greenman struct ifnet *ifp = &sc->sc_if; 1806a17c678eSDavid Greenman struct fxp_stats *sp = sc->fxp_stats; 1807f7788e8eSJonathan Lemon int s; 1808a17c678eSDavid Greenman 18094953bccaSNate Lawson FXP_LOCK(sc); 18104953bccaSNate Lawson s = splimp(); 1811b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_stag, sc->fxp_smap, BUS_DMASYNC_POSTREAD); 181283e6547dSMaxime Henrion ifp->if_opackets += le32toh(sp->tx_good); 181383e6547dSMaxime Henrion ifp->if_collisions += le32toh(sp->tx_total_collisions); 1814397f9dfeSDavid Greenman if (sp->rx_good) { 181583e6547dSMaxime Henrion ifp->if_ipackets += le32toh(sp->rx_good); 1816397f9dfeSDavid Greenman sc->rx_idle_secs = 0; 1817397f9dfeSDavid Greenman } else { 1818c8cc6fcaSDavid Greenman /* 1819c8cc6fcaSDavid Greenman * Receiver's been idle for another second. 1820c8cc6fcaSDavid Greenman */ 1821397f9dfeSDavid Greenman sc->rx_idle_secs++; 1822397f9dfeSDavid Greenman } 18233ba65732SDavid Greenman ifp->if_ierrors += 182483e6547dSMaxime Henrion le32toh(sp->rx_crc_errors) + 182583e6547dSMaxime Henrion le32toh(sp->rx_alignment_errors) + 182683e6547dSMaxime Henrion le32toh(sp->rx_rnr_errors) + 182783e6547dSMaxime Henrion le32toh(sp->rx_overrun_errors); 1828a17c678eSDavid Greenman /* 1829f9be9005SDavid Greenman * If any transmit underruns occured, bump up the transmit 1830f9be9005SDavid Greenman * threshold by another 512 bytes (64 * 8). 1831f9be9005SDavid Greenman */ 1832f9be9005SDavid Greenman if (sp->tx_underruns) { 183383e6547dSMaxime Henrion ifp->if_oerrors += le32toh(sp->tx_underruns); 1834f9be9005SDavid Greenman if (tx_threshold < 192) 1835f9be9005SDavid Greenman tx_threshold += 64; 1836f9be9005SDavid Greenman } 18374953bccaSNate Lawson 1838397f9dfeSDavid Greenman /* 1839c8cc6fcaSDavid Greenman * Release any xmit buffers that have completed DMA. This isn't 1840c8cc6fcaSDavid Greenman * strictly necessary to do here, but it's advantagous for mbufs 1841c8cc6fcaSDavid Greenman * with external storage to be released in a timely manner rather 1842c8cc6fcaSDavid Greenman * than being defered for a potentially long time. This limits 1843c8cc6fcaSDavid Greenman * the delay to a maximum of one second. 1844c8cc6fcaSDavid Greenman */ 1845b2badf02SMaxime Henrion fxp_txeof(sc); 1846b2badf02SMaxime Henrion 1847c8cc6fcaSDavid Greenman /* 1848397f9dfeSDavid Greenman * If we haven't received any packets in FXP_MAC_RX_IDLE seconds, 1849397f9dfeSDavid Greenman * then assume the receiver has locked up and attempt to clear 1850397f9dfeSDavid Greenman * the condition by reprogramming the multicast filter. This is 1851397f9dfeSDavid Greenman * a work-around for a bug in the 82557 where the receiver locks 1852397f9dfeSDavid Greenman * up if it gets certain types of garbage in the syncronization 1853397f9dfeSDavid Greenman * bits prior to the packet header. This bug is supposed to only 1854397f9dfeSDavid Greenman * occur in 10Mbps mode, but has been seen to occur in 100Mbps 1855397f9dfeSDavid Greenman * mode as well (perhaps due to a 10/100 speed transition). 1856397f9dfeSDavid Greenman */ 1857397f9dfeSDavid Greenman if (sc->rx_idle_secs > FXP_MAX_RX_IDLE) { 1858397f9dfeSDavid Greenman sc->rx_idle_secs = 0; 1859397f9dfeSDavid Greenman fxp_mc_setup(sc); 1860397f9dfeSDavid Greenman } 1861f9be9005SDavid Greenman /* 18623ba65732SDavid Greenman * If there is no pending command, start another stats 18633ba65732SDavid Greenman * dump. Otherwise punt for now. 1864a17c678eSDavid Greenman */ 1865397f9dfeSDavid Greenman if (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) == 0) { 1866a17c678eSDavid Greenman /* 1867397f9dfeSDavid Greenman * Start another stats dump. 1868a17c678eSDavid Greenman */ 1869b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_stag, sc->fxp_smap, 1870b2badf02SMaxime Henrion BUS_DMASYNC_PREREAD); 18712e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_DUMPRESET); 1872dfe61cf1SDavid Greenman } else { 1873dfe61cf1SDavid Greenman /* 1874dfe61cf1SDavid Greenman * A previous command is still waiting to be accepted. 1875dfe61cf1SDavid Greenman * Just zero our copy of the stats and wait for the 18763ba65732SDavid Greenman * next timer event to update them. 1877dfe61cf1SDavid Greenman */ 1878dfe61cf1SDavid Greenman sp->tx_good = 0; 1879f9be9005SDavid Greenman sp->tx_underruns = 0; 1880dfe61cf1SDavid Greenman sp->tx_total_collisions = 0; 18813ba65732SDavid Greenman 1882dfe61cf1SDavid Greenman sp->rx_good = 0; 18833ba65732SDavid Greenman sp->rx_crc_errors = 0; 18843ba65732SDavid Greenman sp->rx_alignment_errors = 0; 18853ba65732SDavid Greenman sp->rx_rnr_errors = 0; 18863ba65732SDavid Greenman sp->rx_overrun_errors = 0; 1887dfe61cf1SDavid Greenman } 1888f7788e8eSJonathan Lemon if (sc->miibus != NULL) 1889f7788e8eSJonathan Lemon mii_tick(device_get_softc(sc->miibus)); 18904953bccaSNate Lawson 1891a17c678eSDavid Greenman /* 1892a17c678eSDavid Greenman * Schedule another timeout one second from now. 1893a17c678eSDavid Greenman */ 189445276e4aSSam Leffler callout_reset(&sc->stat_ch, hz, fxp_tick, sc); 18954953bccaSNate Lawson FXP_UNLOCK(sc); 18964953bccaSNate Lawson splx(s); 1897a17c678eSDavid Greenman } 1898a17c678eSDavid Greenman 1899a17c678eSDavid Greenman /* 1900a17c678eSDavid Greenman * Stop the interface. Cancels the statistics updater and resets 1901a17c678eSDavid Greenman * the interface. 1902a17c678eSDavid Greenman */ 1903a17c678eSDavid Greenman static void 1904f7788e8eSJonathan Lemon fxp_stop(struct fxp_softc *sc) 1905a17c678eSDavid Greenman { 1906ba8c6fd5SDavid Greenman struct ifnet *ifp = &sc->sc_if; 1907b2badf02SMaxime Henrion struct fxp_tx *txp; 19083ba65732SDavid Greenman int i; 1909a17c678eSDavid Greenman 19107dced78aSDavid Greenman ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 19117dced78aSDavid Greenman ifp->if_timer = 0; 19127dced78aSDavid Greenman 1913e4fc250cSLuigi Rizzo #ifdef DEVICE_POLLING 1914e4fc250cSLuigi Rizzo ether_poll_deregister(ifp); 1915e4fc250cSLuigi Rizzo #endif 1916a17c678eSDavid Greenman /* 1917a17c678eSDavid Greenman * Cancel stats updater. 1918a17c678eSDavid Greenman */ 191945276e4aSSam Leffler callout_stop(&sc->stat_ch); 19203ba65732SDavid Greenman 19213ba65732SDavid Greenman /* 192272a32a26SJonathan Lemon * Issue software reset, which also unloads the microcode. 19233ba65732SDavid Greenman */ 192472a32a26SJonathan Lemon sc->flags &= ~FXP_FLAG_UCODE; 192509882363SJonathan Lemon CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SOFTWARE_RESET); 192672a32a26SJonathan Lemon DELAY(50); 1927a17c678eSDavid Greenman 19283ba65732SDavid Greenman /* 19293ba65732SDavid Greenman * Release any xmit buffers. 19303ba65732SDavid Greenman */ 1931b2badf02SMaxime Henrion txp = sc->fxp_desc.tx_list; 1932da91462dSDavid Greenman if (txp != NULL) { 1933da91462dSDavid Greenman for (i = 0; i < FXP_NTXCB; i++) { 1934b2badf02SMaxime Henrion if (txp[i].tx_mbuf != NULL) { 1935b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, txp[i].tx_map, 1936b2badf02SMaxime Henrion BUS_DMASYNC_POSTWRITE); 1937b2badf02SMaxime Henrion bus_dmamap_unload(sc->fxp_mtag, txp[i].tx_map); 1938b2badf02SMaxime Henrion m_freem(txp[i].tx_mbuf); 1939b2badf02SMaxime Henrion txp[i].tx_mbuf = NULL; 1940c8bca6dcSBill Paul /* clear this to reset csum offload bits */ 1941b2badf02SMaxime Henrion txp[i].tx_cb->tbd[0].tb_addr = 0; 1942da91462dSDavid Greenman } 1943da91462dSDavid Greenman } 19443ba65732SDavid Greenman } 1945b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 19463ba65732SDavid Greenman sc->tx_queued = 0; 1947a17c678eSDavid Greenman } 1948a17c678eSDavid Greenman 1949a17c678eSDavid Greenman /* 1950a17c678eSDavid Greenman * Watchdog/transmission transmit timeout handler. Called when a 1951a17c678eSDavid Greenman * transmission is started on the interface, but no interrupt is 1952a17c678eSDavid Greenman * received before the timeout. This usually indicates that the 1953a17c678eSDavid Greenman * card has wedged for some reason. 1954a17c678eSDavid Greenman */ 1955a17c678eSDavid Greenman static void 1956f7788e8eSJonathan Lemon fxp_watchdog(struct ifnet *ifp) 1957a17c678eSDavid Greenman { 1958ba8c6fd5SDavid Greenman struct fxp_softc *sc = ifp->if_softc; 1959ba8c6fd5SDavid Greenman 19604953bccaSNate Lawson FXP_LOCK(sc); 1961f7788e8eSJonathan Lemon device_printf(sc->dev, "device timeout\n"); 19624a5f1499SDavid Greenman ifp->if_oerrors++; 1963a17c678eSDavid Greenman 19644953bccaSNate Lawson fxp_init_body(sc); 19654953bccaSNate Lawson FXP_UNLOCK(sc); 1966a17c678eSDavid Greenman } 1967a17c678eSDavid Greenman 19684953bccaSNate Lawson /* 19694953bccaSNate Lawson * Acquire locks and then call the real initialization function. This 19704953bccaSNate Lawson * is necessary because ether_ioctl() calls if_init() and this would 19714953bccaSNate Lawson * result in mutex recursion if the mutex was held. 19724953bccaSNate Lawson */ 1973a17c678eSDavid Greenman static void 1974f7788e8eSJonathan Lemon fxp_init(void *xsc) 1975a17c678eSDavid Greenman { 1976fb583156SDavid Greenman struct fxp_softc *sc = xsc; 19774953bccaSNate Lawson 19784953bccaSNate Lawson FXP_LOCK(sc); 19794953bccaSNate Lawson fxp_init_body(sc); 19804953bccaSNate Lawson FXP_UNLOCK(sc); 19814953bccaSNate Lawson } 19824953bccaSNate Lawson 19834953bccaSNate Lawson /* 19844953bccaSNate Lawson * Perform device initialization. This routine must be called with the 19854953bccaSNate Lawson * softc lock held. 19864953bccaSNate Lawson */ 19874953bccaSNate Lawson static void 19884953bccaSNate Lawson fxp_init_body(struct fxp_softc *sc) 19894953bccaSNate Lawson { 1990ba8c6fd5SDavid Greenman struct ifnet *ifp = &sc->sc_if; 1991a17c678eSDavid Greenman struct fxp_cb_config *cbp; 1992a17c678eSDavid Greenman struct fxp_cb_ias *cb_ias; 1993b2badf02SMaxime Henrion struct fxp_cb_tx *tcbp; 1994b2badf02SMaxime Henrion struct fxp_tx *txp; 199509882363SJonathan Lemon struct fxp_cb_mcs *mcsp; 1996f7788e8eSJonathan Lemon int i, prm, s; 1997a17c678eSDavid Greenman 19984953bccaSNate Lawson mtx_assert(&sc->sc_mtx, MA_OWNED); 1999f7788e8eSJonathan Lemon s = splimp(); 2000a17c678eSDavid Greenman /* 20013ba65732SDavid Greenman * Cancel any pending I/O 2002a17c678eSDavid Greenman */ 20033ba65732SDavid Greenman fxp_stop(sc); 2004a17c678eSDavid Greenman 2005a17c678eSDavid Greenman prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0; 2006a17c678eSDavid Greenman 2007a17c678eSDavid Greenman /* 2008a17c678eSDavid Greenman * Initialize base of CBL and RFA memory. Loading with zero 2009a17c678eSDavid Greenman * sets it up for regular linear addressing. 2010a17c678eSDavid Greenman */ 2011ba8c6fd5SDavid Greenman CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0); 20122e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_BASE); 2013a17c678eSDavid Greenman 2014ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 20152e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_RU_BASE); 2016a17c678eSDavid Greenman 2017a17c678eSDavid Greenman /* 2018a17c678eSDavid Greenman * Initialize base of dump-stats buffer. 2019a17c678eSDavid Greenman */ 2020ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 2021b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_stag, sc->fxp_smap, BUS_DMASYNC_PREREAD); 2022b2badf02SMaxime Henrion CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->stats_addr); 20232e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_DUMP_ADR); 2024a17c678eSDavid Greenman 2025a17c678eSDavid Greenman /* 202672a32a26SJonathan Lemon * Attempt to load microcode if requested. 202772a32a26SJonathan Lemon */ 202872a32a26SJonathan Lemon if (ifp->if_flags & IFF_LINK0 && (sc->flags & FXP_FLAG_UCODE) == 0) 202972a32a26SJonathan Lemon fxp_load_ucode(sc); 203072a32a26SJonathan Lemon 203172a32a26SJonathan Lemon /* 203209882363SJonathan Lemon * Initialize the multicast address list. 203309882363SJonathan Lemon */ 203409882363SJonathan Lemon if (fxp_mc_addrs(sc)) { 203509882363SJonathan Lemon mcsp = sc->mcsp; 203609882363SJonathan Lemon mcsp->cb_status = 0; 203783e6547dSMaxime Henrion mcsp->cb_command = 203883e6547dSMaxime Henrion htole16(FXP_CB_COMMAND_MCAS | FXP_CB_COMMAND_EL); 203983e6547dSMaxime Henrion mcsp->link_addr = 0xffffffff; 204009882363SJonathan Lemon /* 204109882363SJonathan Lemon * Start the multicast setup command. 204209882363SJonathan Lemon */ 204309882363SJonathan Lemon fxp_scb_wait(sc); 2044b2badf02SMaxime Henrion bus_dmamap_sync(sc->mcs_tag, sc->mcs_map, BUS_DMASYNC_PREWRITE); 2045b2badf02SMaxime Henrion CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->mcs_addr); 204609882363SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); 204709882363SJonathan Lemon /* ...and wait for it to complete. */ 2048209b07bcSMaxime Henrion fxp_dma_wait(sc, &mcsp->cb_status, sc->mcs_tag, sc->mcs_map); 2049b2badf02SMaxime Henrion bus_dmamap_sync(sc->mcs_tag, sc->mcs_map, 2050b2badf02SMaxime Henrion BUS_DMASYNC_POSTWRITE); 205109882363SJonathan Lemon } 205209882363SJonathan Lemon 205309882363SJonathan Lemon /* 2054a17c678eSDavid Greenman * We temporarily use memory that contains the TxCB list to 2055a17c678eSDavid Greenman * construct the config CB. The TxCB list memory is rebuilt 2056a17c678eSDavid Greenman * later. 2057a17c678eSDavid Greenman */ 2058b2badf02SMaxime Henrion cbp = (struct fxp_cb_config *)sc->fxp_desc.cbl_list; 2059a17c678eSDavid Greenman 2060a17c678eSDavid Greenman /* 2061a17c678eSDavid Greenman * This bcopy is kind of disgusting, but there are a bunch of must be 2062a17c678eSDavid Greenman * zero and must be one bits in this structure and this is the easiest 2063a17c678eSDavid Greenman * way to initialize them all to proper values. 2064a17c678eSDavid Greenman */ 2065b2badf02SMaxime Henrion bcopy(fxp_cb_config_template, cbp, sizeof(fxp_cb_config_template)); 2066a17c678eSDavid Greenman 2067a17c678eSDavid Greenman cbp->cb_status = 0; 206883e6547dSMaxime Henrion cbp->cb_command = htole16(FXP_CB_COMMAND_CONFIG | 206983e6547dSMaxime Henrion FXP_CB_COMMAND_EL); 207083e6547dSMaxime Henrion cbp->link_addr = 0xffffffff; /* (no) next command */ 20712c6c0947SMaxime Henrion cbp->byte_count = sc->flags & FXP_FLAG_EXT_RFA ? 32 : 22; 2072001696daSDavid Greenman cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */ 2073001696daSDavid Greenman cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */ 2074a17c678eSDavid Greenman cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */ 2075f7788e8eSJonathan Lemon cbp->mwi_enable = sc->flags & FXP_FLAG_MWI_ENABLE ? 1 : 0; 2076f7788e8eSJonathan Lemon cbp->type_enable = 0; /* actually reserved */ 2077f7788e8eSJonathan Lemon cbp->read_align_en = sc->flags & FXP_FLAG_READ_ALIGN ? 1 : 0; 2078f7788e8eSJonathan Lemon cbp->end_wr_on_cl = sc->flags & FXP_FLAG_WRITE_ALIGN ? 1 : 0; 2079001696daSDavid Greenman cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */ 2080001696daSDavid Greenman cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */ 2081f7788e8eSJonathan Lemon cbp->dma_mbce = 0; /* (disable) dma max counters */ 2082a17c678eSDavid Greenman cbp->late_scb = 0; /* (don't) defer SCB update */ 2083f7788e8eSJonathan Lemon cbp->direct_dma_dis = 1; /* disable direct rcv dma mode */ 2084f7788e8eSJonathan Lemon cbp->tno_int_or_tco_en =0; /* (disable) tx not okay interrupt */ 20853114fdb4SDavid Greenman cbp->ci_int = 1; /* interrupt on CU idle */ 2086f7788e8eSJonathan Lemon cbp->ext_txcb_dis = sc->flags & FXP_FLAG_EXT_TXCB ? 0 : 1; 2087f7788e8eSJonathan Lemon cbp->ext_stats_dis = 1; /* disable extended counters */ 2088f7788e8eSJonathan Lemon cbp->keep_overrun_rx = 0; /* don't pass overrun frames to host */ 208972a32a26SJonathan Lemon cbp->save_bf = sc->revision == FXP_REV_82557 ? 1 : prm; 2090a17c678eSDavid Greenman cbp->disc_short_rx = !prm; /* discard short packets */ 2091f7788e8eSJonathan Lemon cbp->underrun_retry = 1; /* retry mode (once) on DMA underrun */ 2092f7788e8eSJonathan Lemon cbp->two_frames = 0; /* do not limit FIFO to 2 frames */ 2093f7788e8eSJonathan Lemon cbp->dyn_tbd = 0; /* (no) dynamic TBD mode */ 2094c8bca6dcSBill Paul cbp->ext_rfa = sc->flags & FXP_FLAG_EXT_RFA ? 1 : 0; 2095f7788e8eSJonathan Lemon cbp->mediatype = sc->flags & FXP_FLAG_SERIAL_MEDIA ? 0 : 1; 2096f7788e8eSJonathan Lemon cbp->csma_dis = 0; /* (don't) disable link */ 2097f7788e8eSJonathan Lemon cbp->tcp_udp_cksum = 0; /* (don't) enable checksum */ 2098f7788e8eSJonathan Lemon cbp->vlan_tco = 0; /* (don't) enable vlan wakeup */ 2099f7788e8eSJonathan Lemon cbp->link_wake_en = 0; /* (don't) assert PME# on link change */ 2100f7788e8eSJonathan Lemon cbp->arp_wake_en = 0; /* (don't) assert PME# on arp */ 2101f7788e8eSJonathan Lemon cbp->mc_wake_en = 0; /* (don't) enable PME# on mcmatch */ 2102a17c678eSDavid Greenman cbp->nsai = 1; /* (don't) disable source addr insert */ 2103a17c678eSDavid Greenman cbp->preamble_length = 2; /* (7 byte) preamble */ 2104a17c678eSDavid Greenman cbp->loopback = 0; /* (don't) loopback */ 2105a17c678eSDavid Greenman cbp->linear_priority = 0; /* (normal CSMA/CD operation) */ 2106a17c678eSDavid Greenman cbp->linear_pri_mode = 0; /* (wait after xmit only) */ 2107a17c678eSDavid Greenman cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */ 2108a17c678eSDavid Greenman cbp->promiscuous = prm; /* promiscuous mode */ 2109a17c678eSDavid Greenman cbp->bcast_disable = 0; /* (don't) disable broadcasts */ 2110f7788e8eSJonathan Lemon cbp->wait_after_win = 0; /* (don't) enable modified backoff alg*/ 2111f7788e8eSJonathan Lemon cbp->ignore_ul = 0; /* consider U/L bit in IA matching */ 2112f7788e8eSJonathan Lemon cbp->crc16_en = 0; /* (don't) enable crc-16 algorithm */ 2113f7788e8eSJonathan Lemon cbp->crscdt = sc->flags & FXP_FLAG_SERIAL_MEDIA ? 1 : 0; 2114f7788e8eSJonathan Lemon 2115a17c678eSDavid Greenman cbp->stripping = !prm; /* truncate rx packet to byte count */ 2116a17c678eSDavid Greenman cbp->padding = 1; /* (do) pad short tx packets */ 2117a17c678eSDavid Greenman cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */ 2118f7788e8eSJonathan Lemon cbp->long_rx_en = sc->flags & FXP_FLAG_LONG_PKT_EN ? 1 : 0; 2119f7788e8eSJonathan Lemon cbp->ia_wake_en = 0; /* (don't) wake up on address match */ 2120f7788e8eSJonathan Lemon cbp->magic_pkt_dis = 0; /* (don't) disable magic packet */ 2121f7788e8eSJonathan Lemon /* must set wake_en in PMCSR also */ 2122a17c678eSDavid Greenman cbp->force_fdx = 0; /* (don't) force full duplex */ 21233ba65732SDavid Greenman cbp->fdx_pin_en = 1; /* (enable) FDX# pin */ 2124a17c678eSDavid Greenman cbp->multi_ia = 0; /* (don't) accept multiple IAs */ 2125f7788e8eSJonathan Lemon cbp->mc_all = sc->flags & FXP_FLAG_ALL_MCAST ? 1 : 0; 2126c8bca6dcSBill Paul cbp->gamla_rx = sc->flags & FXP_FLAG_EXT_RFA ? 1 : 0; 2127a17c678eSDavid Greenman 212898b27888SRobert Watson if (fxp_noflow || sc->revision == FXP_REV_82557) { 21293bd07cfdSJonathan Lemon /* 21303bd07cfdSJonathan Lemon * The 82557 has no hardware flow control, the values 21313bd07cfdSJonathan Lemon * below are the defaults for the chip. 21323bd07cfdSJonathan Lemon */ 21333bd07cfdSJonathan Lemon cbp->fc_delay_lsb = 0; 21343bd07cfdSJonathan Lemon cbp->fc_delay_msb = 0x40; 21353bd07cfdSJonathan Lemon cbp->pri_fc_thresh = 3; 21363bd07cfdSJonathan Lemon cbp->tx_fc_dis = 0; 21373bd07cfdSJonathan Lemon cbp->rx_fc_restop = 0; 21383bd07cfdSJonathan Lemon cbp->rx_fc_restart = 0; 21393bd07cfdSJonathan Lemon cbp->fc_filter = 0; 21403bd07cfdSJonathan Lemon cbp->pri_fc_loc = 1; 21413bd07cfdSJonathan Lemon } else { 21423bd07cfdSJonathan Lemon cbp->fc_delay_lsb = 0x1f; 21433bd07cfdSJonathan Lemon cbp->fc_delay_msb = 0x01; 21443bd07cfdSJonathan Lemon cbp->pri_fc_thresh = 3; 21453bd07cfdSJonathan Lemon cbp->tx_fc_dis = 0; /* enable transmit FC */ 21463bd07cfdSJonathan Lemon cbp->rx_fc_restop = 1; /* enable FC restop frames */ 21473bd07cfdSJonathan Lemon cbp->rx_fc_restart = 1; /* enable FC restart frames */ 21483bd07cfdSJonathan Lemon cbp->fc_filter = !prm; /* drop FC frames to host */ 21493bd07cfdSJonathan Lemon cbp->pri_fc_loc = 1; /* FC pri location (byte31) */ 21503bd07cfdSJonathan Lemon } 21513bd07cfdSJonathan Lemon 2152a17c678eSDavid Greenman /* 2153a17c678eSDavid Greenman * Start the config command/DMA. 2154a17c678eSDavid Greenman */ 2155ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 2156b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 2157b2badf02SMaxime Henrion CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->fxp_desc.cbl_addr); 21582e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); 2159a17c678eSDavid Greenman /* ...and wait for it to complete. */ 2160209b07bcSMaxime Henrion fxp_dma_wait(sc, &cbp->cb_status, sc->cbl_tag, sc->cbl_map); 2161b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_POSTWRITE); 2162a17c678eSDavid Greenman 2163a17c678eSDavid Greenman /* 2164a17c678eSDavid Greenman * Now initialize the station address. Temporarily use the TxCB 2165a17c678eSDavid Greenman * memory area like we did above for the config CB. 2166a17c678eSDavid Greenman */ 2167b2badf02SMaxime Henrion cb_ias = (struct fxp_cb_ias *)sc->fxp_desc.cbl_list; 2168a17c678eSDavid Greenman cb_ias->cb_status = 0; 216983e6547dSMaxime Henrion cb_ias->cb_command = htole16(FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL); 217083e6547dSMaxime Henrion cb_ias->link_addr = 0xffffffff; 2171e609b4d7SMaxime Henrion bcopy(sc->arpcom.ac_enaddr, cb_ias->macaddr, 2172a17c678eSDavid Greenman sizeof(sc->arpcom.ac_enaddr)); 2173a17c678eSDavid Greenman 2174a17c678eSDavid Greenman /* 2175a17c678eSDavid Greenman * Start the IAS (Individual Address Setup) command/DMA. 2176a17c678eSDavid Greenman */ 2177ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 2178b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 21792e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); 2180a17c678eSDavid Greenman /* ...and wait for it to complete. */ 2181209b07bcSMaxime Henrion fxp_dma_wait(sc, &cb_ias->cb_status, sc->cbl_tag, sc->cbl_map); 2182b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_POSTWRITE); 2183a17c678eSDavid Greenman 2184a17c678eSDavid Greenman /* 2185a17c678eSDavid Greenman * Initialize transmit control block (TxCB) list. 2186a17c678eSDavid Greenman */ 2187b2badf02SMaxime Henrion txp = sc->fxp_desc.tx_list; 2188b2badf02SMaxime Henrion tcbp = sc->fxp_desc.cbl_list; 2189b2badf02SMaxime Henrion bzero(tcbp, FXP_TXCB_SZ); 2190a17c678eSDavid Greenman for (i = 0; i < FXP_NTXCB; i++) { 2191b2badf02SMaxime Henrion txp[i].tx_cb = tcbp + i; 2192b2badf02SMaxime Henrion txp[i].tx_mbuf = NULL; 219383e6547dSMaxime Henrion tcbp[i].cb_status = htole16(FXP_CB_STATUS_C | FXP_CB_STATUS_OK); 219483e6547dSMaxime Henrion tcbp[i].cb_command = htole16(FXP_CB_COMMAND_NOP); 219583e6547dSMaxime Henrion tcbp[i].link_addr = htole32(sc->fxp_desc.cbl_addr + 219683e6547dSMaxime Henrion (((i + 1) & FXP_TXCB_MASK) * sizeof(struct fxp_cb_tx))); 21973bd07cfdSJonathan Lemon if (sc->flags & FXP_FLAG_EXT_TXCB) 2198b2badf02SMaxime Henrion tcbp[i].tbd_array_addr = 219983e6547dSMaxime Henrion htole32(FXP_TXCB_DMA_ADDR(sc, &tcbp[i].tbd[2])); 22003bd07cfdSJonathan Lemon else 2201b2badf02SMaxime Henrion tcbp[i].tbd_array_addr = 220283e6547dSMaxime Henrion htole32(FXP_TXCB_DMA_ADDR(sc, &tcbp[i].tbd[0])); 2203b2badf02SMaxime Henrion txp[i].tx_next = &txp[(i + 1) & FXP_TXCB_MASK]; 2204a17c678eSDavid Greenman } 2205a17c678eSDavid Greenman /* 2206397f9dfeSDavid Greenman * Set the suspend flag on the first TxCB and start the control 2207a17c678eSDavid Greenman * unit. It will execute the NOP and then suspend. 2208a17c678eSDavid Greenman */ 220983e6547dSMaxime Henrion tcbp->cb_command = htole16(FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S); 2210b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 2211b2badf02SMaxime Henrion sc->fxp_desc.tx_first = sc->fxp_desc.tx_last = txp; 2212397f9dfeSDavid Greenman sc->tx_queued = 1; 2213a17c678eSDavid Greenman 2214ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 22152e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); 2216a17c678eSDavid Greenman 2217a17c678eSDavid Greenman /* 2218a17c678eSDavid Greenman * Initialize receiver buffer area - RFA. 2219a17c678eSDavid Greenman */ 2220ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 2221b2badf02SMaxime Henrion CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->fxp_desc.rx_head->rx_addr); 22222e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_RU_START); 2223a17c678eSDavid Greenman 2224dccee1a1SDavid Greenman /* 2225ba8c6fd5SDavid Greenman * Set current media. 2226dccee1a1SDavid Greenman */ 2227f7788e8eSJonathan Lemon if (sc->miibus != NULL) 2228f7788e8eSJonathan Lemon mii_mediachg(device_get_softc(sc->miibus)); 2229dccee1a1SDavid Greenman 2230a17c678eSDavid Greenman ifp->if_flags |= IFF_RUNNING; 2231a17c678eSDavid Greenman ifp->if_flags &= ~IFF_OACTIVE; 2232e8c8b728SJonathan Lemon 2233e8c8b728SJonathan Lemon /* 2234e8c8b728SJonathan Lemon * Enable interrupts. 2235e8c8b728SJonathan Lemon */ 22362b5989e9SLuigi Rizzo #ifdef DEVICE_POLLING 22372b5989e9SLuigi Rizzo /* 22382b5989e9SLuigi Rizzo * ... but only do that if we are not polling. And because (presumably) 22392b5989e9SLuigi Rizzo * the default is interrupts on, we need to disable them explicitly! 22402b5989e9SLuigi Rizzo */ 224162f76486SMaxim Sobolev if ( ifp->if_flags & IFF_POLLING ) 22422b5989e9SLuigi Rizzo CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, FXP_SCB_INTR_DISABLE); 22432b5989e9SLuigi Rizzo else 22442b5989e9SLuigi Rizzo #endif /* DEVICE_POLLING */ 2245e8c8b728SJonathan Lemon CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, 0); 2246a17c678eSDavid Greenman 2247a17c678eSDavid Greenman /* 2248a17c678eSDavid Greenman * Start stats updater. 2249a17c678eSDavid Greenman */ 225045276e4aSSam Leffler callout_reset(&sc->stat_ch, hz, fxp_tick, sc); 22514953bccaSNate Lawson splx(s); 2252f7788e8eSJonathan Lemon } 2253f7788e8eSJonathan Lemon 2254f7788e8eSJonathan Lemon static int 2255f7788e8eSJonathan Lemon fxp_serial_ifmedia_upd(struct ifnet *ifp) 2256f7788e8eSJonathan Lemon { 2257f7788e8eSJonathan Lemon 2258f7788e8eSJonathan Lemon return (0); 2259a17c678eSDavid Greenman } 2260a17c678eSDavid Greenman 2261303b270bSEivind Eklund static void 2262f7788e8eSJonathan Lemon fxp_serial_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 2263ba8c6fd5SDavid Greenman { 2264ba8c6fd5SDavid Greenman 2265f7788e8eSJonathan Lemon ifmr->ifm_active = IFM_ETHER|IFM_MANUAL; 2266ba8c6fd5SDavid Greenman } 2267ba8c6fd5SDavid Greenman 2268ba8c6fd5SDavid Greenman /* 2269ba8c6fd5SDavid Greenman * Change media according to request. 2270ba8c6fd5SDavid Greenman */ 2271f7788e8eSJonathan Lemon static int 2272f7788e8eSJonathan Lemon fxp_ifmedia_upd(struct ifnet *ifp) 2273ba8c6fd5SDavid Greenman { 2274ba8c6fd5SDavid Greenman struct fxp_softc *sc = ifp->if_softc; 2275f7788e8eSJonathan Lemon struct mii_data *mii; 2276ba8c6fd5SDavid Greenman 2277f7788e8eSJonathan Lemon mii = device_get_softc(sc->miibus); 2278f7788e8eSJonathan Lemon mii_mediachg(mii); 2279ba8c6fd5SDavid Greenman return (0); 2280ba8c6fd5SDavid Greenman } 2281ba8c6fd5SDavid Greenman 2282ba8c6fd5SDavid Greenman /* 2283ba8c6fd5SDavid Greenman * Notify the world which media we're using. 2284ba8c6fd5SDavid Greenman */ 2285f7788e8eSJonathan Lemon static void 2286f7788e8eSJonathan Lemon fxp_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 2287ba8c6fd5SDavid Greenman { 2288ba8c6fd5SDavid Greenman struct fxp_softc *sc = ifp->if_softc; 2289f7788e8eSJonathan Lemon struct mii_data *mii; 2290ba8c6fd5SDavid Greenman 2291f7788e8eSJonathan Lemon mii = device_get_softc(sc->miibus); 2292f7788e8eSJonathan Lemon mii_pollstat(mii); 2293f7788e8eSJonathan Lemon ifmr->ifm_active = mii->mii_media_active; 2294f7788e8eSJonathan Lemon ifmr->ifm_status = mii->mii_media_status; 22952e2b8238SJonathan Lemon 22962e2b8238SJonathan Lemon if (ifmr->ifm_status & IFM_10_T && sc->flags & FXP_FLAG_CU_RESUME_BUG) 22972e2b8238SJonathan Lemon sc->cu_resume_bug = 1; 22982e2b8238SJonathan Lemon else 22992e2b8238SJonathan Lemon sc->cu_resume_bug = 0; 2300ba8c6fd5SDavid Greenman } 2301ba8c6fd5SDavid Greenman 2302a17c678eSDavid Greenman /* 2303a17c678eSDavid Greenman * Add a buffer to the end of the RFA buffer list. 2304a17c678eSDavid Greenman * Return 0 if successful, 1 for failure. A failure results in 2305a17c678eSDavid Greenman * adding the 'oldm' (if non-NULL) on to the end of the list - 2306dc733423SDag-Erling Smørgrav * tossing out its old contents and recycling it. 2307a17c678eSDavid Greenman * The RFA struct is stuck at the beginning of mbuf cluster and the 2308a17c678eSDavid Greenman * data pointer is fixed up to point just past it. 2309a17c678eSDavid Greenman */ 2310a17c678eSDavid Greenman static int 2311b2badf02SMaxime Henrion fxp_add_rfabuf(struct fxp_softc *sc, struct fxp_rx *rxp) 2312a17c678eSDavid Greenman { 2313a17c678eSDavid Greenman struct mbuf *m; 2314a17c678eSDavid Greenman struct fxp_rfa *rfa, *p_rfa; 2315b2badf02SMaxime Henrion struct fxp_rx *p_rx; 2316b2badf02SMaxime Henrion bus_dmamap_t tmp_map; 2317b2badf02SMaxime Henrion int error; 2318a17c678eSDavid Greenman 2319a163d034SWarner Losh m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 2320b2badf02SMaxime Henrion if (m == NULL) 2321b2badf02SMaxime Henrion return (ENOBUFS); 2322ba8c6fd5SDavid Greenman 2323ba8c6fd5SDavid Greenman /* 2324ba8c6fd5SDavid Greenman * Move the data pointer up so that the incoming data packet 2325ba8c6fd5SDavid Greenman * will be 32-bit aligned. 2326ba8c6fd5SDavid Greenman */ 2327ba8c6fd5SDavid Greenman m->m_data += RFA_ALIGNMENT_FUDGE; 2328ba8c6fd5SDavid Greenman 2329eadd5e3aSDavid Greenman /* 2330eadd5e3aSDavid Greenman * Get a pointer to the base of the mbuf cluster and move 2331eadd5e3aSDavid Greenman * data start past it. 2332eadd5e3aSDavid Greenman */ 2333a17c678eSDavid Greenman rfa = mtod(m, struct fxp_rfa *); 2334c8bca6dcSBill Paul m->m_data += sc->rfa_size; 233583e6547dSMaxime Henrion rfa->size = htole16(MCLBYTES - sc->rfa_size - RFA_ALIGNMENT_FUDGE); 2336eadd5e3aSDavid Greenman 2337a17c678eSDavid Greenman rfa->rfa_status = 0; 233883e6547dSMaxime Henrion rfa->rfa_control = htole16(FXP_RFA_CONTROL_EL); 2339a17c678eSDavid Greenman rfa->actual_size = 0; 2340ba8c6fd5SDavid Greenman 234128935f27SMaxime Henrion /* 234228935f27SMaxime Henrion * Initialize the rest of the RFA. Note that since the RFA 234328935f27SMaxime Henrion * is misaligned, we cannot store values directly. We're thus 234428935f27SMaxime Henrion * using the le32enc() function which handles endianness and 234528935f27SMaxime Henrion * is also alignment-safe. 234628935f27SMaxime Henrion */ 234783e6547dSMaxime Henrion le32enc(&rfa->link_addr, 0xffffffff); 234883e6547dSMaxime Henrion le32enc(&rfa->rbd_addr, 0xffffffff); 2349ba8c6fd5SDavid Greenman 2350b2badf02SMaxime Henrion /* Map the RFA into DMA memory. */ 2351b2badf02SMaxime Henrion error = bus_dmamap_load(sc->fxp_mtag, sc->spare_map, rfa, 2352b2badf02SMaxime Henrion MCLBYTES - RFA_ALIGNMENT_FUDGE, fxp_dma_map_addr, 2353b2badf02SMaxime Henrion &rxp->rx_addr, 0); 2354b2badf02SMaxime Henrion if (error) { 2355b2badf02SMaxime Henrion m_freem(m); 2356b2badf02SMaxime Henrion return (error); 2357b2badf02SMaxime Henrion } 2358b2badf02SMaxime Henrion 2359b2badf02SMaxime Henrion bus_dmamap_unload(sc->fxp_mtag, rxp->rx_map); 2360b2badf02SMaxime Henrion tmp_map = sc->spare_map; 2361b2badf02SMaxime Henrion sc->spare_map = rxp->rx_map; 2362b2badf02SMaxime Henrion rxp->rx_map = tmp_map; 2363b2badf02SMaxime Henrion rxp->rx_mbuf = m; 2364b2badf02SMaxime Henrion 2365b983c7b3SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, rxp->rx_map, 2366b983c7b3SMaxime Henrion BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2367b2badf02SMaxime Henrion 2368dfe61cf1SDavid Greenman /* 2369dfe61cf1SDavid Greenman * If there are other buffers already on the list, attach this 2370dfe61cf1SDavid Greenman * one to the end by fixing up the tail to point to this one. 2371dfe61cf1SDavid Greenman */ 2372b2badf02SMaxime Henrion if (sc->fxp_desc.rx_head != NULL) { 2373b2badf02SMaxime Henrion p_rx = sc->fxp_desc.rx_tail; 2374b2badf02SMaxime Henrion p_rfa = (struct fxp_rfa *) 2375b2badf02SMaxime Henrion (p_rx->rx_mbuf->m_ext.ext_buf + RFA_ALIGNMENT_FUDGE); 2376b2badf02SMaxime Henrion p_rx->rx_next = rxp; 237783e6547dSMaxime Henrion le32enc(&p_rfa->link_addr, rxp->rx_addr); 2378aed53495SDavid Greenman p_rfa->rfa_control = 0; 2379b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, p_rx->rx_map, 23804cec1653SMaxime Henrion BUS_DMASYNC_PREWRITE); 2381a17c678eSDavid Greenman } else { 2382b2badf02SMaxime Henrion rxp->rx_next = NULL; 2383b2badf02SMaxime Henrion sc->fxp_desc.rx_head = rxp; 2384a17c678eSDavid Greenman } 2385b2badf02SMaxime Henrion sc->fxp_desc.rx_tail = rxp; 2386b2badf02SMaxime Henrion return (0); 2387a17c678eSDavid Greenman } 2388a17c678eSDavid Greenman 23896ebc3153SDavid Greenman static volatile int 2390f7788e8eSJonathan Lemon fxp_miibus_readreg(device_t dev, int phy, int reg) 2391dccee1a1SDavid Greenman { 2392f7788e8eSJonathan Lemon struct fxp_softc *sc = device_get_softc(dev); 2393dccee1a1SDavid Greenman int count = 10000; 23946ebc3153SDavid Greenman int value; 2395dccee1a1SDavid Greenman 2396ba8c6fd5SDavid Greenman CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 2397ba8c6fd5SDavid Greenman (FXP_MDI_READ << 26) | (reg << 16) | (phy << 21)); 2398dccee1a1SDavid Greenman 2399ba8c6fd5SDavid Greenman while (((value = CSR_READ_4(sc, FXP_CSR_MDICONTROL)) & 0x10000000) == 0 2400ba8c6fd5SDavid Greenman && count--) 24016ebc3153SDavid Greenman DELAY(10); 2402dccee1a1SDavid Greenman 2403dccee1a1SDavid Greenman if (count <= 0) 2404f7788e8eSJonathan Lemon device_printf(dev, "fxp_miibus_readreg: timed out\n"); 2405dccee1a1SDavid Greenman 24066ebc3153SDavid Greenman return (value & 0xffff); 2407dccee1a1SDavid Greenman } 2408dccee1a1SDavid Greenman 2409dccee1a1SDavid Greenman static void 2410f7788e8eSJonathan Lemon fxp_miibus_writereg(device_t dev, int phy, int reg, int value) 2411dccee1a1SDavid Greenman { 2412f7788e8eSJonathan Lemon struct fxp_softc *sc = device_get_softc(dev); 2413dccee1a1SDavid Greenman int count = 10000; 2414dccee1a1SDavid Greenman 2415ba8c6fd5SDavid Greenman CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 2416ba8c6fd5SDavid Greenman (FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21) | 2417ba8c6fd5SDavid Greenman (value & 0xffff)); 2418dccee1a1SDavid Greenman 2419ba8c6fd5SDavid Greenman while ((CSR_READ_4(sc, FXP_CSR_MDICONTROL) & 0x10000000) == 0 && 2420ba8c6fd5SDavid Greenman count--) 24216ebc3153SDavid Greenman DELAY(10); 2422dccee1a1SDavid Greenman 2423dccee1a1SDavid Greenman if (count <= 0) 2424f7788e8eSJonathan Lemon device_printf(dev, "fxp_miibus_writereg: timed out\n"); 2425dccee1a1SDavid Greenman } 2426dccee1a1SDavid Greenman 2427dccee1a1SDavid Greenman static int 2428f7788e8eSJonathan Lemon fxp_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 2429a17c678eSDavid Greenman { 24309b44ff22SGarrett Wollman struct fxp_softc *sc = ifp->if_softc; 2431a17c678eSDavid Greenman struct ifreq *ifr = (struct ifreq *)data; 2432f7788e8eSJonathan Lemon struct mii_data *mii; 2433f7788e8eSJonathan Lemon int s, error = 0; 2434a17c678eSDavid Greenman 2435704d1965SWarner Losh /* 2436704d1965SWarner Losh * Detaching causes us to call ioctl with the mutex owned. Preclude 2437704d1965SWarner Losh * that by saying we're busy if the lock is already held. 2438704d1965SWarner Losh */ 2439704d1965SWarner Losh if (mtx_owned(&sc->sc_mtx)) 2440704d1965SWarner Losh return (EBUSY); 244132cd7a9cSWarner Losh 24424953bccaSNate Lawson FXP_LOCK(sc); 2443f7788e8eSJonathan Lemon s = splimp(); 2444a17c678eSDavid Greenman 2445a17c678eSDavid Greenman switch (command) { 2446a17c678eSDavid Greenman case SIOCSIFFLAGS: 2447f7788e8eSJonathan Lemon if (ifp->if_flags & IFF_ALLMULTI) 2448f7788e8eSJonathan Lemon sc->flags |= FXP_FLAG_ALL_MCAST; 2449f7788e8eSJonathan Lemon else 2450f7788e8eSJonathan Lemon sc->flags &= ~FXP_FLAG_ALL_MCAST; 2451a17c678eSDavid Greenman 2452a17c678eSDavid Greenman /* 2453a17c678eSDavid Greenman * If interface is marked up and not running, then start it. 2454a17c678eSDavid Greenman * If it is marked down and running, stop it. 2455a17c678eSDavid Greenman * XXX If it's up then re-initialize it. This is so flags 2456a17c678eSDavid Greenman * such as IFF_PROMISC are handled. 2457a17c678eSDavid Greenman */ 2458a17c678eSDavid Greenman if (ifp->if_flags & IFF_UP) { 24594953bccaSNate Lawson fxp_init_body(sc); 2460a17c678eSDavid Greenman } else { 2461a17c678eSDavid Greenman if (ifp->if_flags & IFF_RUNNING) 24624a5f1499SDavid Greenman fxp_stop(sc); 2463a17c678eSDavid Greenman } 2464a17c678eSDavid Greenman break; 2465a17c678eSDavid Greenman 2466a17c678eSDavid Greenman case SIOCADDMULTI: 2467a17c678eSDavid Greenman case SIOCDELMULTI: 2468f7788e8eSJonathan Lemon if (ifp->if_flags & IFF_ALLMULTI) 2469f7788e8eSJonathan Lemon sc->flags |= FXP_FLAG_ALL_MCAST; 2470f7788e8eSJonathan Lemon else 2471f7788e8eSJonathan Lemon sc->flags &= ~FXP_FLAG_ALL_MCAST; 2472a17c678eSDavid Greenman /* 2473a17c678eSDavid Greenman * Multicast list has changed; set the hardware filter 2474a17c678eSDavid Greenman * accordingly. 2475a17c678eSDavid Greenman */ 2476f7788e8eSJonathan Lemon if ((sc->flags & FXP_FLAG_ALL_MCAST) == 0) 2477397f9dfeSDavid Greenman fxp_mc_setup(sc); 2478397f9dfeSDavid Greenman /* 2479f7788e8eSJonathan Lemon * fxp_mc_setup() can set FXP_FLAG_ALL_MCAST, so check it 2480397f9dfeSDavid Greenman * again rather than else {}. 2481397f9dfeSDavid Greenman */ 2482f7788e8eSJonathan Lemon if (sc->flags & FXP_FLAG_ALL_MCAST) 24834953bccaSNate Lawson fxp_init_body(sc); 2484a17c678eSDavid Greenman error = 0; 2485ba8c6fd5SDavid Greenman break; 2486ba8c6fd5SDavid Greenman 2487ba8c6fd5SDavid Greenman case SIOCSIFMEDIA: 2488ba8c6fd5SDavid Greenman case SIOCGIFMEDIA: 2489f7788e8eSJonathan Lemon if (sc->miibus != NULL) { 2490f7788e8eSJonathan Lemon mii = device_get_softc(sc->miibus); 2491f7788e8eSJonathan Lemon error = ifmedia_ioctl(ifp, ifr, 2492f7788e8eSJonathan Lemon &mii->mii_media, command); 2493f7788e8eSJonathan Lemon } else { 2494ba8c6fd5SDavid Greenman error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, command); 2495f7788e8eSJonathan Lemon } 2496a17c678eSDavid Greenman break; 2497a17c678eSDavid Greenman 2498fb917226SRuslan Ermilov case SIOCSIFCAP: 249925fbb2c3SYaroslav Tykhiy ifp->if_capenable &= ~IFCAP_POLLING; 250025fbb2c3SYaroslav Tykhiy ifp->if_capenable |= ifr->ifr_reqcap & IFCAP_POLLING; 2501fb917226SRuslan Ermilov break; 2502fb917226SRuslan Ermilov 2503a17c678eSDavid Greenman default: 25044953bccaSNate Lawson /* 25054953bccaSNate Lawson * ether_ioctl() will eventually call fxp_start() which 25064953bccaSNate Lawson * will result in mutex recursion so drop it first. 25074953bccaSNate Lawson */ 25084953bccaSNate Lawson FXP_UNLOCK(sc); 2509673d9191SSam Leffler error = ether_ioctl(ifp, command, data); 2510a17c678eSDavid Greenman } 25114953bccaSNate Lawson if (mtx_owned(&sc->sc_mtx)) 25124953bccaSNate Lawson FXP_UNLOCK(sc); 2513f7788e8eSJonathan Lemon splx(s); 2514a17c678eSDavid Greenman return (error); 2515a17c678eSDavid Greenman } 2516397f9dfeSDavid Greenman 2517397f9dfeSDavid Greenman /* 251809882363SJonathan Lemon * Fill in the multicast address list and return number of entries. 251909882363SJonathan Lemon */ 252009882363SJonathan Lemon static int 252109882363SJonathan Lemon fxp_mc_addrs(struct fxp_softc *sc) 252209882363SJonathan Lemon { 252309882363SJonathan Lemon struct fxp_cb_mcs *mcsp = sc->mcsp; 252409882363SJonathan Lemon struct ifnet *ifp = &sc->sc_if; 252509882363SJonathan Lemon struct ifmultiaddr *ifma; 252609882363SJonathan Lemon int nmcasts; 252709882363SJonathan Lemon 252809882363SJonathan Lemon nmcasts = 0; 252909882363SJonathan Lemon if ((sc->flags & FXP_FLAG_ALL_MCAST) == 0) { 253009882363SJonathan Lemon #if __FreeBSD_version < 500000 253109882363SJonathan Lemon LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 253209882363SJonathan Lemon #else 253309882363SJonathan Lemon TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 253409882363SJonathan Lemon #endif 253509882363SJonathan Lemon if (ifma->ifma_addr->sa_family != AF_LINK) 253609882363SJonathan Lemon continue; 253709882363SJonathan Lemon if (nmcasts >= MAXMCADDR) { 253809882363SJonathan Lemon sc->flags |= FXP_FLAG_ALL_MCAST; 253909882363SJonathan Lemon nmcasts = 0; 254009882363SJonathan Lemon break; 254109882363SJonathan Lemon } 254209882363SJonathan Lemon bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 2543bafb64afSMaxime Henrion &sc->mcsp->mc_addr[nmcasts][0], ETHER_ADDR_LEN); 254409882363SJonathan Lemon nmcasts++; 254509882363SJonathan Lemon } 254609882363SJonathan Lemon } 2547bafb64afSMaxime Henrion mcsp->mc_cnt = htole16(nmcasts * ETHER_ADDR_LEN); 254809882363SJonathan Lemon return (nmcasts); 254909882363SJonathan Lemon } 255009882363SJonathan Lemon 255109882363SJonathan Lemon /* 2552397f9dfeSDavid Greenman * Program the multicast filter. 2553397f9dfeSDavid Greenman * 2554397f9dfeSDavid Greenman * We have an artificial restriction that the multicast setup command 2555397f9dfeSDavid Greenman * must be the first command in the chain, so we take steps to ensure 25563114fdb4SDavid Greenman * this. By requiring this, it allows us to keep up the performance of 2557397f9dfeSDavid Greenman * the pre-initialized command ring (esp. link pointers) by not actually 2558dc733423SDag-Erling Smørgrav * inserting the mcsetup command in the ring - i.e. its link pointer 2559397f9dfeSDavid Greenman * points to the TxCB ring, but the mcsetup descriptor itself is not part 2560397f9dfeSDavid Greenman * of it. We then can do 'CU_START' on the mcsetup descriptor and have it 2561397f9dfeSDavid Greenman * lead into the regular TxCB ring when it completes. 2562397f9dfeSDavid Greenman * 2563397f9dfeSDavid Greenman * This function must be called at splimp. 2564397f9dfeSDavid Greenman */ 2565397f9dfeSDavid Greenman static void 2566f7788e8eSJonathan Lemon fxp_mc_setup(struct fxp_softc *sc) 2567397f9dfeSDavid Greenman { 2568397f9dfeSDavid Greenman struct fxp_cb_mcs *mcsp = sc->mcsp; 2569397f9dfeSDavid Greenman struct ifnet *ifp = &sc->sc_if; 2570b2badf02SMaxime Henrion struct fxp_tx *txp; 25717dced78aSDavid Greenman int count; 2572397f9dfeSDavid Greenman 25733114fdb4SDavid Greenman /* 25743114fdb4SDavid Greenman * If there are queued commands, we must wait until they are all 25753114fdb4SDavid Greenman * completed. If we are already waiting, then add a NOP command 25763114fdb4SDavid Greenman * with interrupt option so that we're notified when all commands 25773114fdb4SDavid Greenman * have been completed - fxp_start() ensures that no additional 25783114fdb4SDavid Greenman * TX commands will be added when need_mcsetup is true. 25793114fdb4SDavid Greenman */ 2580397f9dfeSDavid Greenman if (sc->tx_queued) { 25813114fdb4SDavid Greenman /* 25823114fdb4SDavid Greenman * need_mcsetup will be true if we are already waiting for the 25833114fdb4SDavid Greenman * NOP command to be completed (see below). In this case, bail. 25843114fdb4SDavid Greenman */ 25853114fdb4SDavid Greenman if (sc->need_mcsetup) 25863114fdb4SDavid Greenman return; 2587397f9dfeSDavid Greenman sc->need_mcsetup = 1; 25883114fdb4SDavid Greenman 25893114fdb4SDavid Greenman /* 259072a32a26SJonathan Lemon * Add a NOP command with interrupt so that we are notified 259172a32a26SJonathan Lemon * when all TX commands have been processed. 25923114fdb4SDavid Greenman */ 2593b2badf02SMaxime Henrion txp = sc->fxp_desc.tx_last->tx_next; 2594b2badf02SMaxime Henrion txp->tx_mbuf = NULL; 2595b2badf02SMaxime Henrion txp->tx_cb->cb_status = 0; 259683e6547dSMaxime Henrion txp->tx_cb->cb_command = htole16(FXP_CB_COMMAND_NOP | 259783e6547dSMaxime Henrion FXP_CB_COMMAND_S | FXP_CB_COMMAND_I); 25983114fdb4SDavid Greenman /* 25993114fdb4SDavid Greenman * Advance the end of list forward. 26003114fdb4SDavid Greenman */ 260183e6547dSMaxime Henrion sc->fxp_desc.tx_last->tx_cb->cb_command &= 260283e6547dSMaxime Henrion htole16(~FXP_CB_COMMAND_S); 26035f361cbeSMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 2604b2badf02SMaxime Henrion sc->fxp_desc.tx_last = txp; 26053114fdb4SDavid Greenman sc->tx_queued++; 26063114fdb4SDavid Greenman /* 26073114fdb4SDavid Greenman * Issue a resume in case the CU has just suspended. 26083114fdb4SDavid Greenman */ 26093114fdb4SDavid Greenman fxp_scb_wait(sc); 26102e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_RESUME); 26113114fdb4SDavid Greenman /* 26123114fdb4SDavid Greenman * Set a 5 second timer just in case we don't hear from the 26133114fdb4SDavid Greenman * card again. 26143114fdb4SDavid Greenman */ 26153114fdb4SDavid Greenman ifp->if_timer = 5; 26163114fdb4SDavid Greenman 2617397f9dfeSDavid Greenman return; 2618397f9dfeSDavid Greenman } 2619397f9dfeSDavid Greenman sc->need_mcsetup = 0; 2620397f9dfeSDavid Greenman 2621397f9dfeSDavid Greenman /* 2622397f9dfeSDavid Greenman * Initialize multicast setup descriptor. 2623397f9dfeSDavid Greenman */ 2624397f9dfeSDavid Greenman mcsp->cb_status = 0; 262583e6547dSMaxime Henrion mcsp->cb_command = htole16(FXP_CB_COMMAND_MCAS | 262683e6547dSMaxime Henrion FXP_CB_COMMAND_S | FXP_CB_COMMAND_I); 262783e6547dSMaxime Henrion mcsp->link_addr = htole32(sc->fxp_desc.cbl_addr); 2628b2badf02SMaxime Henrion txp = &sc->fxp_desc.mcs_tx; 2629b2badf02SMaxime Henrion txp->tx_mbuf = NULL; 2630b2badf02SMaxime Henrion txp->tx_cb = (struct fxp_cb_tx *)sc->mcsp; 2631b2badf02SMaxime Henrion txp->tx_next = sc->fxp_desc.tx_list; 263209882363SJonathan Lemon (void) fxp_mc_addrs(sc); 2633b2badf02SMaxime Henrion sc->fxp_desc.tx_first = sc->fxp_desc.tx_last = txp; 2634397f9dfeSDavid Greenman sc->tx_queued = 1; 2635397f9dfeSDavid Greenman 2636397f9dfeSDavid Greenman /* 2637397f9dfeSDavid Greenman * Wait until command unit is not active. This should never 2638397f9dfeSDavid Greenman * be the case when nothing is queued, but make sure anyway. 2639397f9dfeSDavid Greenman */ 26407dced78aSDavid Greenman count = 100; 2641397f9dfeSDavid Greenman while ((CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS) >> 6) == 26427dced78aSDavid Greenman FXP_SCB_CUS_ACTIVE && --count) 26437dced78aSDavid Greenman DELAY(10); 26447dced78aSDavid Greenman if (count == 0) { 2645f7788e8eSJonathan Lemon device_printf(sc->dev, "command queue timeout\n"); 26467dced78aSDavid Greenman return; 26477dced78aSDavid Greenman } 2648397f9dfeSDavid Greenman 2649397f9dfeSDavid Greenman /* 2650397f9dfeSDavid Greenman * Start the multicast setup command. 2651397f9dfeSDavid Greenman */ 2652397f9dfeSDavid Greenman fxp_scb_wait(sc); 2653b2badf02SMaxime Henrion bus_dmamap_sync(sc->mcs_tag, sc->mcs_map, BUS_DMASYNC_PREWRITE); 2654b2badf02SMaxime Henrion CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->mcs_addr); 26552e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); 2656397f9dfeSDavid Greenman 26573114fdb4SDavid Greenman ifp->if_timer = 2; 2658397f9dfeSDavid Greenman return; 2659397f9dfeSDavid Greenman } 266072a32a26SJonathan Lemon 266172a32a26SJonathan Lemon static u_int32_t fxp_ucode_d101a[] = D101_A_RCVBUNDLE_UCODE; 266272a32a26SJonathan Lemon static u_int32_t fxp_ucode_d101b0[] = D101_B0_RCVBUNDLE_UCODE; 266372a32a26SJonathan Lemon static u_int32_t fxp_ucode_d101ma[] = D101M_B_RCVBUNDLE_UCODE; 266472a32a26SJonathan Lemon static u_int32_t fxp_ucode_d101s[] = D101S_RCVBUNDLE_UCODE; 266572a32a26SJonathan Lemon static u_int32_t fxp_ucode_d102[] = D102_B_RCVBUNDLE_UCODE; 266672a32a26SJonathan Lemon static u_int32_t fxp_ucode_d102c[] = D102_C_RCVBUNDLE_UCODE; 266772a32a26SJonathan Lemon 266872a32a26SJonathan Lemon #define UCODE(x) x, sizeof(x) 266972a32a26SJonathan Lemon 267072a32a26SJonathan Lemon struct ucode { 267172a32a26SJonathan Lemon u_int32_t revision; 267272a32a26SJonathan Lemon u_int32_t *ucode; 267372a32a26SJonathan Lemon int length; 267472a32a26SJonathan Lemon u_short int_delay_offset; 267572a32a26SJonathan Lemon u_short bundle_max_offset; 267672a32a26SJonathan Lemon } ucode_table[] = { 267772a32a26SJonathan Lemon { FXP_REV_82558_A4, UCODE(fxp_ucode_d101a), D101_CPUSAVER_DWORD, 0 }, 267872a32a26SJonathan Lemon { FXP_REV_82558_B0, UCODE(fxp_ucode_d101b0), D101_CPUSAVER_DWORD, 0 }, 267972a32a26SJonathan Lemon { FXP_REV_82559_A0, UCODE(fxp_ucode_d101ma), 268072a32a26SJonathan Lemon D101M_CPUSAVER_DWORD, D101M_CPUSAVER_BUNDLE_MAX_DWORD }, 268172a32a26SJonathan Lemon { FXP_REV_82559S_A, UCODE(fxp_ucode_d101s), 268272a32a26SJonathan Lemon D101S_CPUSAVER_DWORD, D101S_CPUSAVER_BUNDLE_MAX_DWORD }, 268372a32a26SJonathan Lemon { FXP_REV_82550, UCODE(fxp_ucode_d102), 268472a32a26SJonathan Lemon D102_B_CPUSAVER_DWORD, D102_B_CPUSAVER_BUNDLE_MAX_DWORD }, 268572a32a26SJonathan Lemon { FXP_REV_82550_C, UCODE(fxp_ucode_d102c), 268672a32a26SJonathan Lemon D102_C_CPUSAVER_DWORD, D102_C_CPUSAVER_BUNDLE_MAX_DWORD }, 268772a32a26SJonathan Lemon { 0, NULL, 0, 0, 0 } 268872a32a26SJonathan Lemon }; 268972a32a26SJonathan Lemon 269072a32a26SJonathan Lemon static void 269172a32a26SJonathan Lemon fxp_load_ucode(struct fxp_softc *sc) 269272a32a26SJonathan Lemon { 269372a32a26SJonathan Lemon struct ucode *uc; 269472a32a26SJonathan Lemon struct fxp_cb_ucode *cbp; 269572a32a26SJonathan Lemon 269672a32a26SJonathan Lemon for (uc = ucode_table; uc->ucode != NULL; uc++) 269772a32a26SJonathan Lemon if (sc->revision == uc->revision) 269872a32a26SJonathan Lemon break; 269972a32a26SJonathan Lemon if (uc->ucode == NULL) 270072a32a26SJonathan Lemon return; 2701b2badf02SMaxime Henrion cbp = (struct fxp_cb_ucode *)sc->fxp_desc.cbl_list; 270272a32a26SJonathan Lemon cbp->cb_status = 0; 270383e6547dSMaxime Henrion cbp->cb_command = htole16(FXP_CB_COMMAND_UCODE | FXP_CB_COMMAND_EL); 270483e6547dSMaxime Henrion cbp->link_addr = 0xffffffff; /* (no) next command */ 270572a32a26SJonathan Lemon memcpy(cbp->ucode, uc->ucode, uc->length); 270672a32a26SJonathan Lemon if (uc->int_delay_offset) 270783e6547dSMaxime Henrion *(u_int16_t *)&cbp->ucode[uc->int_delay_offset] = 270883e6547dSMaxime Henrion htole16(sc->tunable_int_delay + sc->tunable_int_delay / 2); 270972a32a26SJonathan Lemon if (uc->bundle_max_offset) 271083e6547dSMaxime Henrion *(u_int16_t *)&cbp->ucode[uc->bundle_max_offset] = 271183e6547dSMaxime Henrion htole16(sc->tunable_bundle_max); 271272a32a26SJonathan Lemon /* 271372a32a26SJonathan Lemon * Download the ucode to the chip. 271472a32a26SJonathan Lemon */ 271572a32a26SJonathan Lemon fxp_scb_wait(sc); 2716b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 2717b2badf02SMaxime Henrion CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->fxp_desc.cbl_addr); 271872a32a26SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); 271972a32a26SJonathan Lemon /* ...and wait for it to complete. */ 2720209b07bcSMaxime Henrion fxp_dma_wait(sc, &cbp->cb_status, sc->cbl_tag, sc->cbl_map); 2721b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_POSTWRITE); 272272a32a26SJonathan Lemon device_printf(sc->dev, 272372a32a26SJonathan Lemon "Microcode loaded, int_delay: %d usec bundle_max: %d\n", 272472a32a26SJonathan Lemon sc->tunable_int_delay, 272572a32a26SJonathan Lemon uc->bundle_max_offset == 0 ? 0 : sc->tunable_bundle_max); 272672a32a26SJonathan Lemon sc->flags |= FXP_FLAG_UCODE; 272772a32a26SJonathan Lemon } 272872a32a26SJonathan Lemon 272972a32a26SJonathan Lemon static int 273072a32a26SJonathan Lemon sysctl_int_range(SYSCTL_HANDLER_ARGS, int low, int high) 273172a32a26SJonathan Lemon { 273272a32a26SJonathan Lemon int error, value; 273372a32a26SJonathan Lemon 273472a32a26SJonathan Lemon value = *(int *)arg1; 273572a32a26SJonathan Lemon error = sysctl_handle_int(oidp, &value, 0, req); 273672a32a26SJonathan Lemon if (error || !req->newptr) 273772a32a26SJonathan Lemon return (error); 273872a32a26SJonathan Lemon if (value < low || value > high) 273972a32a26SJonathan Lemon return (EINVAL); 274072a32a26SJonathan Lemon *(int *)arg1 = value; 274172a32a26SJonathan Lemon return (0); 274272a32a26SJonathan Lemon } 274372a32a26SJonathan Lemon 274472a32a26SJonathan Lemon /* 274572a32a26SJonathan Lemon * Interrupt delay is expressed in microseconds, a multiplier is used 274672a32a26SJonathan Lemon * to convert this to the appropriate clock ticks before using. 274772a32a26SJonathan Lemon */ 274872a32a26SJonathan Lemon static int 274972a32a26SJonathan Lemon sysctl_hw_fxp_int_delay(SYSCTL_HANDLER_ARGS) 275072a32a26SJonathan Lemon { 275172a32a26SJonathan Lemon return (sysctl_int_range(oidp, arg1, arg2, req, 300, 3000)); 275272a32a26SJonathan Lemon } 275372a32a26SJonathan Lemon 275472a32a26SJonathan Lemon static int 275572a32a26SJonathan Lemon sysctl_hw_fxp_bundle_max(SYSCTL_HANDLER_ARGS) 275672a32a26SJonathan Lemon { 275772a32a26SJonathan Lemon return (sysctl_int_range(oidp, arg1, arg2, req, 1, 0xffff)); 275872a32a26SJonathan Lemon } 2759