1f7788e8eSJonathan Lemon /*- 2a17c678eSDavid Greenman * Copyright (c) 1995, David Greenman 33bd07cfdSJonathan Lemon * Copyright (c) 2001 Jonathan Lemon <jlemon@freebsd.org> 4a17c678eSDavid Greenman * All rights reserved. 5a17c678eSDavid Greenman * 6a17c678eSDavid Greenman * Redistribution and use in source and binary forms, with or without 7a17c678eSDavid Greenman * modification, are permitted provided that the following conditions 8a17c678eSDavid Greenman * are met: 9a17c678eSDavid Greenman * 1. Redistributions of source code must retain the above copyright 10a17c678eSDavid Greenman * notice unmodified, this list of conditions, and the following 11a17c678eSDavid Greenman * disclaimer. 12a17c678eSDavid Greenman * 2. Redistributions in binary form must reproduce the above copyright 13a17c678eSDavid Greenman * notice, this list of conditions and the following disclaimer in the 14a17c678eSDavid Greenman * documentation and/or other materials provided with the distribution. 15a17c678eSDavid Greenman * 16a17c678eSDavid Greenman * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17a17c678eSDavid Greenman * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18a17c678eSDavid Greenman * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19a17c678eSDavid Greenman * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20a17c678eSDavid Greenman * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21a17c678eSDavid Greenman * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22a17c678eSDavid Greenman * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23a17c678eSDavid Greenman * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24a17c678eSDavid Greenman * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25a17c678eSDavid Greenman * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26a17c678eSDavid Greenman * SUCH DAMAGE. 27a17c678eSDavid Greenman * 28a17c678eSDavid Greenman */ 29a17c678eSDavid Greenman 30aad970f1SDavid E. O'Brien #include <sys/cdefs.h> 31aad970f1SDavid E. O'Brien __FBSDID("$FreeBSD$"); 32aad970f1SDavid E. O'Brien 33a17c678eSDavid Greenman /* 34ae12cddaSDavid Greenman * Intel EtherExpress Pro/100B PCI Fast Ethernet driver 35a17c678eSDavid Greenman */ 36a17c678eSDavid Greenman 3701c516b0SMaxime Henrion #include <sys/cdefs.h> 3801c516b0SMaxime Henrion __FBSDID("$FreeBSD$"); 3901c516b0SMaxime Henrion 40a17c678eSDavid Greenman #include <sys/param.h> 41a17c678eSDavid Greenman #include <sys/systm.h> 4283e6547dSMaxime Henrion #include <sys/endian.h> 43a17c678eSDavid Greenman #include <sys/mbuf.h> 44f7788e8eSJonathan Lemon /* #include <sys/mutex.h> */ 45a17c678eSDavid Greenman #include <sys/kernel.h> 464458ac71SBruce Evans #include <sys/socket.h> 4772a32a26SJonathan Lemon #include <sys/sysctl.h> 48a17c678eSDavid Greenman 49a17c678eSDavid Greenman #include <net/if.h> 50397f9dfeSDavid Greenman #include <net/if_dl.h> 51ba8c6fd5SDavid Greenman #include <net/if_media.h> 52a17c678eSDavid Greenman 53a17c678eSDavid Greenman #include <net/bpf.h> 54ba8c6fd5SDavid Greenman #include <sys/sockio.h> 556182fdbdSPeter Wemm #include <sys/bus.h> 566182fdbdSPeter Wemm #include <machine/bus.h> 576182fdbdSPeter Wemm #include <sys/rman.h> 586182fdbdSPeter Wemm #include <machine/resource.h> 59ba8c6fd5SDavid Greenman 601d5e9e22SEivind Eklund #include <net/ethernet.h> 611d5e9e22SEivind Eklund #include <net/if_arp.h> 62ba8c6fd5SDavid Greenman 63f7788e8eSJonathan Lemon #include <machine/clock.h> /* for DELAY */ 64a17c678eSDavid Greenman 65e8c8b728SJonathan Lemon #include <net/if_types.h> 66e8c8b728SJonathan Lemon #include <net/if_vlan_var.h> 67e8c8b728SJonathan Lemon 68c8bca6dcSBill Paul #ifdef FXP_IP_CSUM_WAR 69c8bca6dcSBill Paul #include <netinet/in.h> 70c8bca6dcSBill Paul #include <netinet/in_systm.h> 71c8bca6dcSBill Paul #include <netinet/ip.h> 72c8bca6dcSBill Paul #include <machine/in_cksum.h> 73c8bca6dcSBill Paul #endif 74c8bca6dcSBill Paul 754fbd232cSWarner Losh #include <dev/pci/pcivar.h> 764fbd232cSWarner Losh #include <dev/pci/pcireg.h> /* for PCIM_CMD_xxx */ 77a17c678eSDavid Greenman 78f7788e8eSJonathan Lemon #include <dev/mii/mii.h> 79f7788e8eSJonathan Lemon #include <dev/mii/miivar.h> 80f7788e8eSJonathan Lemon 81f7788e8eSJonathan Lemon #include <dev/fxp/if_fxpreg.h> 82f7788e8eSJonathan Lemon #include <dev/fxp/if_fxpvar.h> 8372a32a26SJonathan Lemon #include <dev/fxp/rcvbundl.h> 84f7788e8eSJonathan Lemon 85f246e4a1SMatthew N. Dodd MODULE_DEPEND(fxp, pci, 1, 1, 1); 86f246e4a1SMatthew N. Dodd MODULE_DEPEND(fxp, ether, 1, 1, 1); 87f7788e8eSJonathan Lemon MODULE_DEPEND(fxp, miibus, 1, 1, 1); 88f7788e8eSJonathan Lemon #include "miibus_if.h" 894fc1dda9SAndrew Gallatin 90ba8c6fd5SDavid Greenman /* 91ba8c6fd5SDavid Greenman * NOTE! On the Alpha, we have an alignment constraint. The 92ba8c6fd5SDavid Greenman * card DMAs the packet immediately following the RFA. However, 93ba8c6fd5SDavid Greenman * the first thing in the packet is a 14-byte Ethernet header. 94ba8c6fd5SDavid Greenman * This means that the packet is misaligned. To compensate, 95ba8c6fd5SDavid Greenman * we actually offset the RFA 2 bytes into the cluster. This 96ba8c6fd5SDavid Greenman * alignes the packet after the Ethernet header at a 32-bit 97ba8c6fd5SDavid Greenman * boundary. HOWEVER! This means that the RFA is misaligned! 98ba8c6fd5SDavid Greenman */ 99ba8c6fd5SDavid Greenman #define RFA_ALIGNMENT_FUDGE 2 100ba8c6fd5SDavid Greenman 101ba8c6fd5SDavid Greenman /* 102f7788e8eSJonathan Lemon * Set initial transmit threshold at 64 (512 bytes). This is 103f7788e8eSJonathan Lemon * increased by 64 (512 bytes) at a time, to maximum of 192 104f7788e8eSJonathan Lemon * (1536 bytes), if an underrun occurs. 105f7788e8eSJonathan Lemon */ 106f7788e8eSJonathan Lemon static int tx_threshold = 64; 107f7788e8eSJonathan Lemon 108f7788e8eSJonathan Lemon /* 109f7788e8eSJonathan Lemon * The configuration byte map has several undefined fields which 110f7788e8eSJonathan Lemon * must be one or must be zero. Set up a template for these bits 111f7788e8eSJonathan Lemon * only, (assuming a 82557 chip) leaving the actual configuration 112f7788e8eSJonathan Lemon * to fxp_init. 113f7788e8eSJonathan Lemon * 114f7788e8eSJonathan Lemon * See struct fxp_cb_config for the bit definitions. 115f7788e8eSJonathan Lemon */ 116f7788e8eSJonathan Lemon static u_char fxp_cb_config_template[] = { 117f7788e8eSJonathan Lemon 0x0, 0x0, /* cb_status */ 118f7788e8eSJonathan Lemon 0x0, 0x0, /* cb_command */ 119f7788e8eSJonathan Lemon 0x0, 0x0, 0x0, 0x0, /* link_addr */ 120f7788e8eSJonathan Lemon 0x0, /* 0 */ 121f7788e8eSJonathan Lemon 0x0, /* 1 */ 122f7788e8eSJonathan Lemon 0x0, /* 2 */ 123f7788e8eSJonathan Lemon 0x0, /* 3 */ 124f7788e8eSJonathan Lemon 0x0, /* 4 */ 125f7788e8eSJonathan Lemon 0x0, /* 5 */ 126f7788e8eSJonathan Lemon 0x32, /* 6 */ 127f7788e8eSJonathan Lemon 0x0, /* 7 */ 128f7788e8eSJonathan Lemon 0x0, /* 8 */ 129f7788e8eSJonathan Lemon 0x0, /* 9 */ 130f7788e8eSJonathan Lemon 0x6, /* 10 */ 131f7788e8eSJonathan Lemon 0x0, /* 11 */ 132f7788e8eSJonathan Lemon 0x0, /* 12 */ 133f7788e8eSJonathan Lemon 0x0, /* 13 */ 134f7788e8eSJonathan Lemon 0xf2, /* 14 */ 135f7788e8eSJonathan Lemon 0x48, /* 15 */ 136f7788e8eSJonathan Lemon 0x0, /* 16 */ 137f7788e8eSJonathan Lemon 0x40, /* 17 */ 138f7788e8eSJonathan Lemon 0xf0, /* 18 */ 139f7788e8eSJonathan Lemon 0x0, /* 19 */ 140f7788e8eSJonathan Lemon 0x3f, /* 20 */ 141f7788e8eSJonathan Lemon 0x5 /* 21 */ 142f7788e8eSJonathan Lemon }; 143f7788e8eSJonathan Lemon 144f7788e8eSJonathan Lemon struct fxp_ident { 145f7788e8eSJonathan Lemon u_int16_t devid; 146f19fc5d8SJohn Polstra int16_t revid; /* -1 matches anything */ 147f7788e8eSJonathan Lemon char *name; 148f7788e8eSJonathan Lemon }; 149f7788e8eSJonathan Lemon 150f7788e8eSJonathan Lemon /* 151f7788e8eSJonathan Lemon * Claim various Intel PCI device identifiers for this driver. The 152f7788e8eSJonathan Lemon * sub-vendor and sub-device field are extensively used to identify 153f7788e8eSJonathan Lemon * particular variants, but we don't currently differentiate between 154f7788e8eSJonathan Lemon * them. 155f7788e8eSJonathan Lemon */ 156f7788e8eSJonathan Lemon static struct fxp_ident fxp_ident_table[] = { 157f19fc5d8SJohn Polstra { 0x1029, -1, "Intel 82559 PCI/CardBus Pro/100" }, 158f19fc5d8SJohn Polstra { 0x1030, -1, "Intel 82559 Pro/100 Ethernet" }, 159f19fc5d8SJohn Polstra { 0x1031, -1, "Intel 82801CAM (ICH3) Pro/100 VE Ethernet" }, 160f19fc5d8SJohn Polstra { 0x1032, -1, "Intel 82801CAM (ICH3) Pro/100 VE Ethernet" }, 161f19fc5d8SJohn Polstra { 0x1033, -1, "Intel 82801CAM (ICH3) Pro/100 VM Ethernet" }, 162f19fc5d8SJohn Polstra { 0x1034, -1, "Intel 82801CAM (ICH3) Pro/100 VM Ethernet" }, 163f19fc5d8SJohn Polstra { 0x1035, -1, "Intel 82801CAM (ICH3) Pro/100 Ethernet" }, 164f19fc5d8SJohn Polstra { 0x1036, -1, "Intel 82801CAM (ICH3) Pro/100 Ethernet" }, 165f19fc5d8SJohn Polstra { 0x1037, -1, "Intel 82801CAM (ICH3) Pro/100 Ethernet" }, 166f19fc5d8SJohn Polstra { 0x1038, -1, "Intel 82801CAM (ICH3) Pro/100 VM Ethernet" }, 167f19fc5d8SJohn Polstra { 0x1039, -1, "Intel 82801DB (ICH4) Pro/100 VE Ethernet" }, 168f19fc5d8SJohn Polstra { 0x103A, -1, "Intel 82801DB (ICH4) Pro/100 Ethernet" }, 169f19fc5d8SJohn Polstra { 0x103B, -1, "Intel 82801DB (ICH4) Pro/100 VM Ethernet" }, 170f19fc5d8SJohn Polstra { 0x103C, -1, "Intel 82801DB (ICH4) Pro/100 Ethernet" }, 171f19fc5d8SJohn Polstra { 0x103D, -1, "Intel 82801DB (ICH4) Pro/100 VE Ethernet" }, 172f19fc5d8SJohn Polstra { 0x103E, -1, "Intel 82801DB (ICH4) Pro/100 VM Ethernet" }, 173f19fc5d8SJohn Polstra { 0x1050, -1, "Intel 82801BA (D865) Pro/100 VE Ethernet" }, 174f19fc5d8SJohn Polstra { 0x1059, -1, "Intel 82551QM Pro/100 M Mobile Connection" }, 175f19fc5d8SJohn Polstra { 0x1209, -1, "Intel 82559ER Embedded 10/100 Ethernet" }, 176f19fc5d8SJohn Polstra { 0x1229, 0x01, "Intel 82557 Pro/100 Ethernet" }, 177f19fc5d8SJohn Polstra { 0x1229, 0x02, "Intel 82557 Pro/100 Ethernet" }, 178f19fc5d8SJohn Polstra { 0x1229, 0x03, "Intel 82557 Pro/100 Ethernet" }, 179f19fc5d8SJohn Polstra { 0x1229, 0x04, "Intel 82558 Pro/100 Ethernet" }, 180f19fc5d8SJohn Polstra { 0x1229, 0x05, "Intel 82558 Pro/100 Ethernet" }, 181f19fc5d8SJohn Polstra { 0x1229, 0x06, "Intel 82559 Pro/100 Ethernet" }, 182f19fc5d8SJohn Polstra { 0x1229, 0x07, "Intel 82559 Pro/100 Ethernet" }, 183f19fc5d8SJohn Polstra { 0x1229, 0x08, "Intel 82559 Pro/100 Ethernet" }, 184f19fc5d8SJohn Polstra { 0x1229, 0x09, "Intel 82559ER Pro/100 Ethernet" }, 185f19fc5d8SJohn Polstra { 0x1229, 0x0c, "Intel 82550 Pro/100 Ethernet" }, 186f19fc5d8SJohn Polstra { 0x1229, 0x0d, "Intel 82550 Pro/100 Ethernet" }, 187f19fc5d8SJohn Polstra { 0x1229, 0x0e, "Intel 82550 Pro/100 Ethernet" }, 188f19fc5d8SJohn Polstra { 0x1229, 0x0f, "Intel 82551 Pro/100 Ethernet" }, 189f19fc5d8SJohn Polstra { 0x1229, 0x10, "Intel 82551 Pro/100 Ethernet" }, 190f19fc5d8SJohn Polstra { 0x1229, -1, "Intel 82557/8/9 Pro/100 Ethernet" }, 191f19fc5d8SJohn Polstra { 0x2449, -1, "Intel 82801BA/CAM (ICH2/3) Pro/100 Ethernet" }, 192f19fc5d8SJohn Polstra { 0, -1, NULL }, 193f7788e8eSJonathan Lemon }; 194f7788e8eSJonathan Lemon 195c8bca6dcSBill Paul #ifdef FXP_IP_CSUM_WAR 196c8bca6dcSBill Paul #define FXP_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP) 197c8bca6dcSBill Paul #else 198c8bca6dcSBill Paul #define FXP_CSUM_FEATURES (CSUM_TCP | CSUM_UDP) 199c8bca6dcSBill Paul #endif 200c8bca6dcSBill Paul 201f7788e8eSJonathan Lemon static int fxp_probe(device_t dev); 202f7788e8eSJonathan Lemon static int fxp_attach(device_t dev); 203f7788e8eSJonathan Lemon static int fxp_detach(device_t dev); 204f7788e8eSJonathan Lemon static int fxp_shutdown(device_t dev); 205f7788e8eSJonathan Lemon static int fxp_suspend(device_t dev); 206f7788e8eSJonathan Lemon static int fxp_resume(device_t dev); 207f7788e8eSJonathan Lemon 208f7788e8eSJonathan Lemon static void fxp_intr(void *xsc); 2094953bccaSNate Lawson static void fxp_intr_body(struct fxp_softc *sc, struct ifnet *ifp, 2104953bccaSNate Lawson u_int8_t statack, int count); 211f7788e8eSJonathan Lemon static void fxp_init(void *xsc); 2124953bccaSNate Lawson static void fxp_init_body(struct fxp_softc *sc); 213f7788e8eSJonathan Lemon static void fxp_tick(void *xsc); 214fa4b32faSWarner Losh #ifndef BURN_BRIDGES 21548e417ebSJonathan Lemon static void fxp_powerstate_d0(device_t dev); 216fa4b32faSWarner Losh #endif 217f7788e8eSJonathan Lemon static void fxp_start(struct ifnet *ifp); 2184953bccaSNate Lawson static void fxp_start_body(struct ifnet *ifp); 219f7788e8eSJonathan Lemon static void fxp_stop(struct fxp_softc *sc); 220f7788e8eSJonathan Lemon static void fxp_release(struct fxp_softc *sc); 221f7788e8eSJonathan Lemon static int fxp_ioctl(struct ifnet *ifp, u_long command, 222f7788e8eSJonathan Lemon caddr_t data); 223f7788e8eSJonathan Lemon static void fxp_watchdog(struct ifnet *ifp); 224b2badf02SMaxime Henrion static int fxp_add_rfabuf(struct fxp_softc *sc, 225b2badf02SMaxime Henrion struct fxp_rx *rxp); 22609882363SJonathan Lemon static int fxp_mc_addrs(struct fxp_softc *sc); 227f7788e8eSJonathan Lemon static void fxp_mc_setup(struct fxp_softc *sc); 228f7788e8eSJonathan Lemon static u_int16_t fxp_eeprom_getword(struct fxp_softc *sc, int offset, 229f7788e8eSJonathan Lemon int autosize); 23000c4116bSJonathan Lemon static void fxp_eeprom_putword(struct fxp_softc *sc, int offset, 23100c4116bSJonathan Lemon u_int16_t data); 232f7788e8eSJonathan Lemon static void fxp_autosize_eeprom(struct fxp_softc *sc); 233f7788e8eSJonathan Lemon static void fxp_read_eeprom(struct fxp_softc *sc, u_short *data, 234f7788e8eSJonathan Lemon int offset, int words); 23500c4116bSJonathan Lemon static void fxp_write_eeprom(struct fxp_softc *sc, u_short *data, 23600c4116bSJonathan Lemon int offset, int words); 237f7788e8eSJonathan Lemon static int fxp_ifmedia_upd(struct ifnet *ifp); 238f7788e8eSJonathan Lemon static void fxp_ifmedia_sts(struct ifnet *ifp, 239f7788e8eSJonathan Lemon struct ifmediareq *ifmr); 240f7788e8eSJonathan Lemon static int fxp_serial_ifmedia_upd(struct ifnet *ifp); 241f7788e8eSJonathan Lemon static void fxp_serial_ifmedia_sts(struct ifnet *ifp, 242f7788e8eSJonathan Lemon struct ifmediareq *ifmr); 243f7788e8eSJonathan Lemon static volatile int fxp_miibus_readreg(device_t dev, int phy, int reg); 244f7788e8eSJonathan Lemon static void fxp_miibus_writereg(device_t dev, int phy, int reg, 245f7788e8eSJonathan Lemon int value); 24672a32a26SJonathan Lemon static void fxp_load_ucode(struct fxp_softc *sc); 24772a32a26SJonathan Lemon static int sysctl_int_range(SYSCTL_HANDLER_ARGS, 24872a32a26SJonathan Lemon int low, int high); 24972a32a26SJonathan Lemon static int sysctl_hw_fxp_bundle_max(SYSCTL_HANDLER_ARGS); 25072a32a26SJonathan Lemon static int sysctl_hw_fxp_int_delay(SYSCTL_HANDLER_ARGS); 25128935f27SMaxime Henrion static void fxp_scb_wait(struct fxp_softc *sc); 25228935f27SMaxime Henrion static void fxp_scb_cmd(struct fxp_softc *sc, int cmd); 25328935f27SMaxime Henrion static void fxp_dma_wait(struct fxp_softc *sc, 254209b07bcSMaxime Henrion volatile u_int16_t *status, bus_dma_tag_t dmat, 255209b07bcSMaxime Henrion bus_dmamap_t map); 256f7788e8eSJonathan Lemon 257f7788e8eSJonathan Lemon static device_method_t fxp_methods[] = { 258f7788e8eSJonathan Lemon /* Device interface */ 259f7788e8eSJonathan Lemon DEVMETHOD(device_probe, fxp_probe), 260f7788e8eSJonathan Lemon DEVMETHOD(device_attach, fxp_attach), 261f7788e8eSJonathan Lemon DEVMETHOD(device_detach, fxp_detach), 262f7788e8eSJonathan Lemon DEVMETHOD(device_shutdown, fxp_shutdown), 263f7788e8eSJonathan Lemon DEVMETHOD(device_suspend, fxp_suspend), 264f7788e8eSJonathan Lemon DEVMETHOD(device_resume, fxp_resume), 265f7788e8eSJonathan Lemon 266f7788e8eSJonathan Lemon /* MII interface */ 267f7788e8eSJonathan Lemon DEVMETHOD(miibus_readreg, fxp_miibus_readreg), 268f7788e8eSJonathan Lemon DEVMETHOD(miibus_writereg, fxp_miibus_writereg), 269f7788e8eSJonathan Lemon 270f7788e8eSJonathan Lemon { 0, 0 } 271f7788e8eSJonathan Lemon }; 272f7788e8eSJonathan Lemon 273f7788e8eSJonathan Lemon static driver_t fxp_driver = { 274f7788e8eSJonathan Lemon "fxp", 275f7788e8eSJonathan Lemon fxp_methods, 276f7788e8eSJonathan Lemon sizeof(struct fxp_softc), 277f7788e8eSJonathan Lemon }; 278f7788e8eSJonathan Lemon 279f7788e8eSJonathan Lemon static devclass_t fxp_devclass; 280f7788e8eSJonathan Lemon 281f246e4a1SMatthew N. Dodd DRIVER_MODULE(fxp, pci, fxp_driver, fxp_devclass, 0, 0); 282f246e4a1SMatthew N. Dodd DRIVER_MODULE(fxp, cardbus, fxp_driver, fxp_devclass, 0, 0); 283f7788e8eSJonathan Lemon DRIVER_MODULE(miibus, fxp, miibus_driver, miibus_devclass, 0, 0); 284f7788e8eSJonathan Lemon 2852b5989e9SLuigi Rizzo static int fxp_rnr; 2862b5989e9SLuigi Rizzo SYSCTL_INT(_hw, OID_AUTO, fxp_rnr, CTLFLAG_RW, &fxp_rnr, 0, "fxp rnr events"); 2872b5989e9SLuigi Rizzo 28898b27888SRobert Watson static int fxp_noflow; 28998b27888SRobert Watson SYSCTL_INT(_hw, OID_AUTO, fxp_noflow, CTLFLAG_RW, &fxp_noflow, 0, "fxp flow control disabled"); 29098b27888SRobert Watson TUNABLE_INT("hw.fxp_noflow", &fxp_noflow); 29198b27888SRobert Watson 292f7788e8eSJonathan Lemon /* 293dfe61cf1SDavid Greenman * Wait for the previous command to be accepted (but not necessarily 294dfe61cf1SDavid Greenman * completed). 295dfe61cf1SDavid Greenman */ 29628935f27SMaxime Henrion static void 297f7788e8eSJonathan Lemon fxp_scb_wait(struct fxp_softc *sc) 298a17c678eSDavid Greenman { 299a17c678eSDavid Greenman int i = 10000; 300a17c678eSDavid Greenman 3017dced78aSDavid Greenman while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i) 3027dced78aSDavid Greenman DELAY(2); 3037dced78aSDavid Greenman if (i == 0) 30400c4116bSJonathan Lemon device_printf(sc->dev, "SCB timeout: 0x%x 0x%x 0x%x 0x%x\n", 305e8c8b728SJonathan Lemon CSR_READ_1(sc, FXP_CSR_SCB_COMMAND), 306e8c8b728SJonathan Lemon CSR_READ_1(sc, FXP_CSR_SCB_STATACK), 307e8c8b728SJonathan Lemon CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS), 308e8c8b728SJonathan Lemon CSR_READ_2(sc, FXP_CSR_FLOWCONTROL)); 3097dced78aSDavid Greenman } 3107dced78aSDavid Greenman 31128935f27SMaxime Henrion static void 3122e2b8238SJonathan Lemon fxp_scb_cmd(struct fxp_softc *sc, int cmd) 3132e2b8238SJonathan Lemon { 3142e2b8238SJonathan Lemon 3152e2b8238SJonathan Lemon if (cmd == FXP_SCB_COMMAND_CU_RESUME && sc->cu_resume_bug) { 3162e2b8238SJonathan Lemon CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_CB_COMMAND_NOP); 3172e2b8238SJonathan Lemon fxp_scb_wait(sc); 3182e2b8238SJonathan Lemon } 3192e2b8238SJonathan Lemon CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, cmd); 3202e2b8238SJonathan Lemon } 3212e2b8238SJonathan Lemon 32228935f27SMaxime Henrion static void 323209b07bcSMaxime Henrion fxp_dma_wait(struct fxp_softc *sc, volatile u_int16_t *status, 324209b07bcSMaxime Henrion bus_dma_tag_t dmat, bus_dmamap_t map) 3257dced78aSDavid Greenman { 3267dced78aSDavid Greenman int i = 10000; 3277dced78aSDavid Greenman 328209b07bcSMaxime Henrion bus_dmamap_sync(dmat, map, BUS_DMASYNC_POSTREAD); 329209b07bcSMaxime Henrion while (!(le16toh(*status) & FXP_CB_STATUS_C) && --i) { 3307dced78aSDavid Greenman DELAY(2); 331209b07bcSMaxime Henrion bus_dmamap_sync(dmat, map, BUS_DMASYNC_POSTREAD); 332209b07bcSMaxime Henrion } 3337dced78aSDavid Greenman if (i == 0) 334f7788e8eSJonathan Lemon device_printf(sc->dev, "DMA timeout\n"); 335a17c678eSDavid Greenman } 336a17c678eSDavid Greenman 337dfe61cf1SDavid Greenman /* 33828935f27SMaxime Henrion * Return identification string if this device is ours. 339dfe61cf1SDavid Greenman */ 3406182fdbdSPeter Wemm static int 3416182fdbdSPeter Wemm fxp_probe(device_t dev) 342a17c678eSDavid Greenman { 343f7788e8eSJonathan Lemon u_int16_t devid; 344f19fc5d8SJohn Polstra u_int8_t revid; 345f7788e8eSJonathan Lemon struct fxp_ident *ident; 346f7788e8eSJonathan Lemon 34755ce7b51SDavid Greenman if (pci_get_vendor(dev) == FXP_VENDORID_INTEL) { 348f7788e8eSJonathan Lemon devid = pci_get_device(dev); 349f19fc5d8SJohn Polstra revid = pci_get_revid(dev); 350f7788e8eSJonathan Lemon for (ident = fxp_ident_table; ident->name != NULL; ident++) { 351f19fc5d8SJohn Polstra if (ident->devid == devid && 352f19fc5d8SJohn Polstra (ident->revid == revid || ident->revid == -1)) { 353f7788e8eSJonathan Lemon device_set_desc(dev, ident->name); 354f7788e8eSJonathan Lemon return (0); 35555ce7b51SDavid Greenman } 356dd68ef16SPeter Wemm } 357f7788e8eSJonathan Lemon } 358f7788e8eSJonathan Lemon return (ENXIO); 3596182fdbdSPeter Wemm } 3606182fdbdSPeter Wemm 361fa4b32faSWarner Losh #ifndef BURN_BRIDGES 36248e417ebSJonathan Lemon static void 36348e417ebSJonathan Lemon fxp_powerstate_d0(device_t dev) 36448e417ebSJonathan Lemon { 36548e417ebSJonathan Lemon #if __FreeBSD_version >= 430002 36648e417ebSJonathan Lemon u_int32_t iobase, membase, irq; 36748e417ebSJonathan Lemon 36848e417ebSJonathan Lemon if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { 36948e417ebSJonathan Lemon /* Save important PCI config data. */ 37048e417ebSJonathan Lemon iobase = pci_read_config(dev, FXP_PCI_IOBA, 4); 37148e417ebSJonathan Lemon membase = pci_read_config(dev, FXP_PCI_MMBA, 4); 37248e417ebSJonathan Lemon irq = pci_read_config(dev, PCIR_INTLINE, 4); 37348e417ebSJonathan Lemon 37448e417ebSJonathan Lemon /* Reset the power state. */ 37548e417ebSJonathan Lemon device_printf(dev, "chip is in D%d power mode " 37648e417ebSJonathan Lemon "-- setting to D0\n", pci_get_powerstate(dev)); 37748e417ebSJonathan Lemon 37848e417ebSJonathan Lemon pci_set_powerstate(dev, PCI_POWERSTATE_D0); 37948e417ebSJonathan Lemon 38048e417ebSJonathan Lemon /* Restore PCI config data. */ 38148e417ebSJonathan Lemon pci_write_config(dev, FXP_PCI_IOBA, iobase, 4); 38248e417ebSJonathan Lemon pci_write_config(dev, FXP_PCI_MMBA, membase, 4); 38348e417ebSJonathan Lemon pci_write_config(dev, PCIR_INTLINE, irq, 4); 38448e417ebSJonathan Lemon } 38548e417ebSJonathan Lemon #endif 38648e417ebSJonathan Lemon } 387fa4b32faSWarner Losh #endif 38848e417ebSJonathan Lemon 389b2badf02SMaxime Henrion static void 390b2badf02SMaxime Henrion fxp_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 391b2badf02SMaxime Henrion { 392b2badf02SMaxime Henrion u_int32_t *addr; 393b2badf02SMaxime Henrion 394b2badf02SMaxime Henrion if (error) 395b2badf02SMaxime Henrion return; 396b2badf02SMaxime Henrion 397b2badf02SMaxime Henrion KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 398b2badf02SMaxime Henrion addr = arg; 399b2badf02SMaxime Henrion *addr = segs->ds_addr; 400b2badf02SMaxime Henrion } 401b2badf02SMaxime Henrion 4026182fdbdSPeter Wemm static int 4036182fdbdSPeter Wemm fxp_attach(device_t dev) 404a17c678eSDavid Greenman { 4056182fdbdSPeter Wemm int error = 0; 4066182fdbdSPeter Wemm struct fxp_softc *sc = device_get_softc(dev); 407ba8c6fd5SDavid Greenman struct ifnet *ifp; 408b2badf02SMaxime Henrion struct fxp_rx *rxp; 4099fa6ccfbSMatt Jacob u_int32_t val; 41083e6547dSMaxime Henrion u_int16_t data, myea[ETHER_ADDR_LEN / 2]; 411d73e2e55SMaxime Henrion int i, rid, m1, m2, prefer_iomap, maxtxseg; 412a35e7eaaSDon Lewis int s, ipcbxmit_disable; 413a17c678eSDavid Greenman 414f7788e8eSJonathan Lemon sc->dev = dev; 41545276e4aSSam Leffler callout_init(&sc->stat_ch, CALLOUT_MPSAFE); 416a1a9c8f7SJonathan Lemon sysctl_ctx_init(&sc->sysctl_ctx); 4176008862bSJohn Baldwin mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 4184953bccaSNate Lawson MTX_DEF); 4194953bccaSNate Lawson ifmedia_init(&sc->sc_media, 0, fxp_serial_ifmedia_upd, 4204953bccaSNate Lawson fxp_serial_ifmedia_sts); 421a17c678eSDavid Greenman 422f7788e8eSJonathan Lemon s = splimp(); 423a17c678eSDavid Greenman 424dfe61cf1SDavid Greenman /* 4252bce79a2SMaxim Sobolev * Enable bus mastering. 426df373873SWes Peters */ 427cf0d8a1eSMaxim Sobolev pci_enable_busmaster(dev); 4289fa6ccfbSMatt Jacob val = pci_read_config(dev, PCIR_COMMAND, 2); 429fa4b32faSWarner Losh #ifndef BURN_BRIDGES 43048e417ebSJonathan Lemon fxp_powerstate_d0(dev); 431fa4b32faSWarner Losh #endif 432df373873SWes Peters /* 4339fa6ccfbSMatt Jacob * Figure out which we should try first - memory mapping or i/o mapping? 4349fa6ccfbSMatt Jacob * We default to memory mapping. Then we accept an override from the 4359fa6ccfbSMatt Jacob * command line. Then we check to see which one is enabled. 436dfe61cf1SDavid Greenman */ 4379fa6ccfbSMatt Jacob m1 = PCIM_CMD_MEMEN; 4389fa6ccfbSMatt Jacob m2 = PCIM_CMD_PORTEN; 4392a05a4ebSMatt Jacob prefer_iomap = 0; 4402a05a4ebSMatt Jacob if (resource_int_value(device_get_name(dev), device_get_unit(dev), 4412a05a4ebSMatt Jacob "prefer_iomap", &prefer_iomap) == 0 && prefer_iomap != 0) { 4429fa6ccfbSMatt Jacob m1 = PCIM_CMD_PORTEN; 4439fa6ccfbSMatt Jacob m2 = PCIM_CMD_MEMEN; 4449fa6ccfbSMatt Jacob } 4459fa6ccfbSMatt Jacob 446533294b9SMatthew N. Dodd sc->rtp = (m1 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT; 4479fa6ccfbSMatt Jacob sc->rgd = (m1 == PCIM_CMD_MEMEN)? FXP_PCI_MMBA : FXP_PCI_IOBA; 4489fa6ccfbSMatt Jacob sc->mem = bus_alloc_resource(dev, sc->rtp, &sc->rgd, 4496182fdbdSPeter Wemm 0, ~0, 1, RF_ACTIVE); 450533294b9SMatthew N. Dodd if (sc->mem == NULL) { 4519fa6ccfbSMatt Jacob sc->rtp = 4529fa6ccfbSMatt Jacob (m2 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT; 4539fa6ccfbSMatt Jacob sc->rgd = (m2 == PCIM_CMD_MEMEN)? FXP_PCI_MMBA : FXP_PCI_IOBA; 4549fa6ccfbSMatt Jacob sc->mem = bus_alloc_resource(dev, sc->rtp, &sc->rgd, 4559fa6ccfbSMatt Jacob 0, ~0, 1, RF_ACTIVE); 4569fa6ccfbSMatt Jacob } 4579fa6ccfbSMatt Jacob 4586182fdbdSPeter Wemm if (!sc->mem) { 4596182fdbdSPeter Wemm error = ENXIO; 460a17c678eSDavid Greenman goto fail; 461a17c678eSDavid Greenman } 4629fa6ccfbSMatt Jacob if (bootverbose) { 4639fa6ccfbSMatt Jacob device_printf(dev, "using %s space register mapping\n", 4649fa6ccfbSMatt Jacob sc->rtp == SYS_RES_MEMORY? "memory" : "I/O"); 4659fa6ccfbSMatt Jacob } 4664fc1dda9SAndrew Gallatin 4674fc1dda9SAndrew Gallatin sc->sc_st = rman_get_bustag(sc->mem); 4684fc1dda9SAndrew Gallatin sc->sc_sh = rman_get_bushandle(sc->mem); 469a17c678eSDavid Greenman 470a17c678eSDavid Greenman /* 471dfe61cf1SDavid Greenman * Allocate our interrupt. 472dfe61cf1SDavid Greenman */ 4736182fdbdSPeter Wemm rid = 0; 4746182fdbdSPeter Wemm sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, 4756182fdbdSPeter Wemm RF_SHAREABLE | RF_ACTIVE); 4766182fdbdSPeter Wemm if (sc->irq == NULL) { 4776182fdbdSPeter Wemm device_printf(dev, "could not map interrupt\n"); 4786182fdbdSPeter Wemm error = ENXIO; 4796182fdbdSPeter Wemm goto fail; 4806182fdbdSPeter Wemm } 4816182fdbdSPeter Wemm 482f7788e8eSJonathan Lemon /* 483f7788e8eSJonathan Lemon * Reset to a stable state. 484f7788e8eSJonathan Lemon */ 485f7788e8eSJonathan Lemon CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 486f7788e8eSJonathan Lemon DELAY(10); 487f7788e8eSJonathan Lemon 488f7788e8eSJonathan Lemon /* 489f7788e8eSJonathan Lemon * Find out how large of an SEEPROM we have. 490f7788e8eSJonathan Lemon */ 491f7788e8eSJonathan Lemon fxp_autosize_eeprom(sc); 492f7788e8eSJonathan Lemon 493f7788e8eSJonathan Lemon /* 4943bd07cfdSJonathan Lemon * Determine whether we must use the 503 serial interface. 495f7788e8eSJonathan Lemon */ 496f7788e8eSJonathan Lemon fxp_read_eeprom(sc, &data, 6, 1); 497f7788e8eSJonathan Lemon if ((data & FXP_PHY_DEVICE_MASK) != 0 && 498f7788e8eSJonathan Lemon (data & FXP_PHY_SERIAL_ONLY)) 499dedabebfSJonathan Lemon sc->flags |= FXP_FLAG_SERIAL_MEDIA; 500f7788e8eSJonathan Lemon 501f7788e8eSJonathan Lemon /* 50272a32a26SJonathan Lemon * Create the sysctl tree 50372a32a26SJonathan Lemon */ 50472a32a26SJonathan Lemon sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx, 50572a32a26SJonathan Lemon SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO, 50672a32a26SJonathan Lemon device_get_nameunit(dev), CTLFLAG_RD, 0, ""); 5074953bccaSNate Lawson if (sc->sysctl_tree == NULL) { 5084953bccaSNate Lawson error = ENXIO; 50972a32a26SJonathan Lemon goto fail; 5104953bccaSNate Lawson } 51172a32a26SJonathan Lemon SYSCTL_ADD_PROC(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree), 51272a32a26SJonathan Lemon OID_AUTO, "int_delay", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_PRISON, 513858b84f5SPoul-Henning Kamp &sc->tunable_int_delay, 0, sysctl_hw_fxp_int_delay, "I", 51472a32a26SJonathan Lemon "FXP driver receive interrupt microcode bundling delay"); 51572a32a26SJonathan Lemon SYSCTL_ADD_PROC(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree), 51672a32a26SJonathan Lemon OID_AUTO, "bundle_max", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_PRISON, 517858b84f5SPoul-Henning Kamp &sc->tunable_bundle_max, 0, sysctl_hw_fxp_bundle_max, "I", 51872a32a26SJonathan Lemon "FXP driver receive interrupt microcode bundle size limit"); 51972a32a26SJonathan Lemon 52072a32a26SJonathan Lemon /* 52172a32a26SJonathan Lemon * Pull in device tunables. 52272a32a26SJonathan Lemon */ 52372a32a26SJonathan Lemon sc->tunable_int_delay = TUNABLE_INT_DELAY; 52472a32a26SJonathan Lemon sc->tunable_bundle_max = TUNABLE_BUNDLE_MAX; 52572a32a26SJonathan Lemon (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 52672a32a26SJonathan Lemon "int_delay", &sc->tunable_int_delay); 52772a32a26SJonathan Lemon (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 52872a32a26SJonathan Lemon "bundle_max", &sc->tunable_bundle_max); 52972a32a26SJonathan Lemon 53072a32a26SJonathan Lemon /* 53172a32a26SJonathan Lemon * Find out the chip revision; lump all 82557 revs together. 5323bd07cfdSJonathan Lemon */ 5333bd07cfdSJonathan Lemon fxp_read_eeprom(sc, &data, 5, 1); 5343bd07cfdSJonathan Lemon if ((data >> 8) == 1) 53572a32a26SJonathan Lemon sc->revision = FXP_REV_82557; 53672a32a26SJonathan Lemon else 53772a32a26SJonathan Lemon sc->revision = pci_get_revid(dev); 5383bd07cfdSJonathan Lemon 5393bd07cfdSJonathan Lemon /* 5402e2b8238SJonathan Lemon * Enable workarounds for certain chip revision deficiencies. 54100c4116bSJonathan Lemon * 54272a32a26SJonathan Lemon * Systems based on the ICH2/ICH2-M chip from Intel, and possibly 54372a32a26SJonathan Lemon * some systems based a normal 82559 design, have a defect where 54472a32a26SJonathan Lemon * the chip can cause a PCI protocol violation if it receives 54500c4116bSJonathan Lemon * a CU_RESUME command when it is entering the IDLE state. The 54600c4116bSJonathan Lemon * workaround is to disable Dynamic Standby Mode, so the chip never 54700c4116bSJonathan Lemon * deasserts CLKRUN#, and always remains in an active state. 54800c4116bSJonathan Lemon * 54900c4116bSJonathan Lemon * See Intel 82801BA/82801BAM Specification Update, Errata #30. 5502e2b8238SJonathan Lemon */ 5512e2b8238SJonathan Lemon i = pci_get_device(dev); 55272a32a26SJonathan Lemon if (i == 0x2449 || (i > 0x1030 && i < 0x1039) || 55372a32a26SJonathan Lemon sc->revision >= FXP_REV_82559_A0) { 55400c4116bSJonathan Lemon fxp_read_eeprom(sc, &data, 10, 1); 55500c4116bSJonathan Lemon if (data & 0x02) { /* STB enable */ 55600c4116bSJonathan Lemon u_int16_t cksum; 55700c4116bSJonathan Lemon int i; 55800c4116bSJonathan Lemon 55900c4116bSJonathan Lemon device_printf(dev, 560001cfa92SJonathan Lemon "Disabling dynamic standby mode in EEPROM\n"); 56100c4116bSJonathan Lemon data &= ~0x02; 56200c4116bSJonathan Lemon fxp_write_eeprom(sc, &data, 10, 1); 56300c4116bSJonathan Lemon device_printf(dev, "New EEPROM ID: 0x%x\n", data); 56400c4116bSJonathan Lemon cksum = 0; 56500c4116bSJonathan Lemon for (i = 0; i < (1 << sc->eeprom_size) - 1; i++) { 56600c4116bSJonathan Lemon fxp_read_eeprom(sc, &data, i, 1); 56700c4116bSJonathan Lemon cksum += data; 56800c4116bSJonathan Lemon } 56900c4116bSJonathan Lemon i = (1 << sc->eeprom_size) - 1; 57000c4116bSJonathan Lemon cksum = 0xBABA - cksum; 57100c4116bSJonathan Lemon fxp_read_eeprom(sc, &data, i, 1); 57200c4116bSJonathan Lemon fxp_write_eeprom(sc, &cksum, i, 1); 57300c4116bSJonathan Lemon device_printf(dev, 57400c4116bSJonathan Lemon "EEPROM checksum @ 0x%x: 0x%x -> 0x%x\n", 57500c4116bSJonathan Lemon i, data, cksum); 57600c4116bSJonathan Lemon #if 1 57700c4116bSJonathan Lemon /* 57800c4116bSJonathan Lemon * If the user elects to continue, try the software 57900c4116bSJonathan Lemon * workaround, as it is better than nothing. 58000c4116bSJonathan Lemon */ 5812e2b8238SJonathan Lemon sc->flags |= FXP_FLAG_CU_RESUME_BUG; 58200c4116bSJonathan Lemon #endif 58300c4116bSJonathan Lemon } 58400c4116bSJonathan Lemon } 5852e2b8238SJonathan Lemon 5862e2b8238SJonathan Lemon /* 5873bd07cfdSJonathan Lemon * If we are not a 82557 chip, we can enable extended features. 5883bd07cfdSJonathan Lemon */ 58972a32a26SJonathan Lemon if (sc->revision != FXP_REV_82557) { 5903bd07cfdSJonathan Lemon /* 59174396a0aSJonathan Lemon * If MWI is enabled in the PCI configuration, and there 59274396a0aSJonathan Lemon * is a valid cacheline size (8 or 16 dwords), then tell 59374396a0aSJonathan Lemon * the board to turn on MWI. 5943bd07cfdSJonathan Lemon */ 59574396a0aSJonathan Lemon if (val & PCIM_CMD_MWRICEN && 59674396a0aSJonathan Lemon pci_read_config(dev, PCIR_CACHELNSZ, 1) != 0) 5973bd07cfdSJonathan Lemon sc->flags |= FXP_FLAG_MWI_ENABLE; 5983bd07cfdSJonathan Lemon 5993bd07cfdSJonathan Lemon /* turn on the extended TxCB feature */ 6003bd07cfdSJonathan Lemon sc->flags |= FXP_FLAG_EXT_TXCB; 601920b58e8SBrooks Davis 602e8c8b728SJonathan Lemon /* enable reception of long frames for VLAN */ 603e8c8b728SJonathan Lemon sc->flags |= FXP_FLAG_LONG_PKT_EN; 6043bd07cfdSJonathan Lemon } 6053bd07cfdSJonathan Lemon 6063bd07cfdSJonathan Lemon /* 607c8bca6dcSBill Paul * Enable use of extended RFDs and TCBs for 82550 608c8bca6dcSBill Paul * and later chips. Note: we need extended TXCB support 609c8bca6dcSBill Paul * too, but that's already enabled by the code above. 610c8bca6dcSBill Paul * Be careful to do this only on the right devices. 611a35e7eaaSDon Lewis * 612a35e7eaaSDon Lewis * At least some 82550 cards probed as "chip=0x12298086 rev=0x0d" 613a35e7eaaSDon Lewis * truncate packets that end with an mbuf containing 1 to 3 bytes 614a35e7eaaSDon Lewis * when used with this feature enabled in the previous version of the 615a35e7eaaSDon Lewis * driver. This problem appears to be fixed now that the driver 616a35e7eaaSDon Lewis * always sets the hardware parse bit in the IPCB structure, which 617a35e7eaaSDon Lewis * the "Intel 8255x 10/100 Mbps Ethernet Controller Family Open 618a35e7eaaSDon Lewis * Source Software Developer Manual" says is necessary in the 619a35e7eaaSDon Lewis * cases where packet truncation was observed. 620a35e7eaaSDon Lewis * 621a35e7eaaSDon Lewis * The device hint "hint.fxp.UNIT_NUMBER.ipcbxmit_disable" 622a35e7eaaSDon Lewis * allows this feature to be disabled at boot time. 623a35e7eaaSDon Lewis * 624a35e7eaaSDon Lewis * If fxp is not compiled into the kernel, this feature may also 625a35e7eaaSDon Lewis * be disabled at run time: 626a35e7eaaSDon Lewis * # kldunload fxp 627a35e7eaaSDon Lewis * # kenv hint.fxp.0.ipcbxmit_disable=1 628a35e7eaaSDon Lewis * # kldload fxp 629c8bca6dcSBill Paul */ 630c8bca6dcSBill Paul 631a35e7eaaSDon Lewis if (resource_int_value("fxp", device_get_unit(dev), "ipcbxmit_disable", 632a35e7eaaSDon Lewis &ipcbxmit_disable) != 0) 633a35e7eaaSDon Lewis ipcbxmit_disable = 0; 634a35e7eaaSDon Lewis if (ipcbxmit_disable == 0 && (sc->revision == FXP_REV_82550 || 635a35e7eaaSDon Lewis sc->revision == FXP_REV_82550_C)) { 636c8bca6dcSBill Paul sc->rfa_size = sizeof (struct fxp_rfa); 637c8bca6dcSBill Paul sc->tx_cmd = FXP_CB_COMMAND_IPCBXMIT; 638c8bca6dcSBill Paul sc->flags |= FXP_FLAG_EXT_RFA; 639c8bca6dcSBill Paul } else { 640c8bca6dcSBill Paul sc->rfa_size = sizeof (struct fxp_rfa) - FXP_RFAX_LEN; 641c8bca6dcSBill Paul sc->tx_cmd = FXP_CB_COMMAND_XMIT; 642c8bca6dcSBill Paul } 643c8bca6dcSBill Paul 644c8bca6dcSBill Paul /* 645b2badf02SMaxime Henrion * Allocate DMA tags and DMA safe memory. 646b2badf02SMaxime Henrion */ 647d73e2e55SMaxime Henrion maxtxseg = sc->flags & FXP_FLAG_EXT_RFA ? FXP_NTXSEG - 1 : FXP_NTXSEG; 648b2badf02SMaxime Henrion error = bus_dma_tag_create(NULL, 2, 0, BUS_SPACE_MAXADDR_32BIT, 649d73e2e55SMaxime Henrion BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES * maxtxseg, 650f6b1c44dSScott Long maxtxseg, MCLBYTES, 0, busdma_lock_mutex, &Giant, &sc->fxp_mtag); 651b2badf02SMaxime Henrion if (error) { 652b2badf02SMaxime Henrion device_printf(dev, "could not allocate dma tag\n"); 653b2badf02SMaxime Henrion goto fail; 654b2badf02SMaxime Henrion } 655b2badf02SMaxime Henrion 656b2badf02SMaxime Henrion error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 657b2badf02SMaxime Henrion BUS_SPACE_MAXADDR, NULL, NULL, sizeof(struct fxp_stats), 1, 658f6b1c44dSScott Long sizeof(struct fxp_stats), 0, busdma_lock_mutex, &Giant, 659f6b1c44dSScott Long &sc->fxp_stag); 660b2badf02SMaxime Henrion if (error) { 661b2badf02SMaxime Henrion device_printf(dev, "could not allocate dma tag\n"); 662b2badf02SMaxime Henrion goto fail; 663b2badf02SMaxime Henrion } 664b2badf02SMaxime Henrion 665b2badf02SMaxime Henrion error = bus_dmamem_alloc(sc->fxp_stag, (void **)&sc->fxp_stats, 666aafb3ebbSMaxime Henrion BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->fxp_smap); 667b2badf02SMaxime Henrion if (error) 6684953bccaSNate Lawson goto fail; 669b2badf02SMaxime Henrion error = bus_dmamap_load(sc->fxp_stag, sc->fxp_smap, sc->fxp_stats, 670b2badf02SMaxime Henrion sizeof(struct fxp_stats), fxp_dma_map_addr, &sc->stats_addr, 0); 671b2badf02SMaxime Henrion if (error) { 672b2badf02SMaxime Henrion device_printf(dev, "could not map the stats buffer\n"); 673b2badf02SMaxime Henrion goto fail; 674b2badf02SMaxime Henrion } 675b2badf02SMaxime Henrion 676b2badf02SMaxime Henrion error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 677b2badf02SMaxime Henrion BUS_SPACE_MAXADDR, NULL, NULL, FXP_TXCB_SZ, 1, 678f6b1c44dSScott Long FXP_TXCB_SZ, 0, busdma_lock_mutex, &Giant, &sc->cbl_tag); 679b2badf02SMaxime Henrion if (error) { 680b2badf02SMaxime Henrion device_printf(dev, "could not allocate dma tag\n"); 681b2badf02SMaxime Henrion goto fail; 682b2badf02SMaxime Henrion } 683b2badf02SMaxime Henrion 684b2badf02SMaxime Henrion error = bus_dmamem_alloc(sc->cbl_tag, (void **)&sc->fxp_desc.cbl_list, 685aafb3ebbSMaxime Henrion BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->cbl_map); 686b2badf02SMaxime Henrion if (error) 6874953bccaSNate Lawson goto fail; 688b2badf02SMaxime Henrion 689b2badf02SMaxime Henrion error = bus_dmamap_load(sc->cbl_tag, sc->cbl_map, 690b2badf02SMaxime Henrion sc->fxp_desc.cbl_list, FXP_TXCB_SZ, fxp_dma_map_addr, 691b2badf02SMaxime Henrion &sc->fxp_desc.cbl_addr, 0); 692b2badf02SMaxime Henrion if (error) { 693b2badf02SMaxime Henrion device_printf(dev, "could not map DMA memory\n"); 694b2badf02SMaxime Henrion goto fail; 695b2badf02SMaxime Henrion } 696b2badf02SMaxime Henrion 697b2badf02SMaxime Henrion error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 698b2badf02SMaxime Henrion BUS_SPACE_MAXADDR, NULL, NULL, sizeof(struct fxp_cb_mcs), 1, 699f6b1c44dSScott Long sizeof(struct fxp_cb_mcs), 0, busdma_lock_mutex, &Giant, 700f6b1c44dSScott Long &sc->mcs_tag); 701b2badf02SMaxime Henrion if (error) { 702b2badf02SMaxime Henrion device_printf(dev, "could not allocate dma tag\n"); 703b2badf02SMaxime Henrion goto fail; 704b2badf02SMaxime Henrion } 705b2badf02SMaxime Henrion 706b2badf02SMaxime Henrion error = bus_dmamem_alloc(sc->mcs_tag, (void **)&sc->mcsp, 707b2badf02SMaxime Henrion BUS_DMA_NOWAIT, &sc->mcs_map); 708b2badf02SMaxime Henrion if (error) 7094953bccaSNate Lawson goto fail; 710b2badf02SMaxime Henrion error = bus_dmamap_load(sc->mcs_tag, sc->mcs_map, sc->mcsp, 711b2badf02SMaxime Henrion sizeof(struct fxp_cb_mcs), fxp_dma_map_addr, &sc->mcs_addr, 0); 712b2badf02SMaxime Henrion if (error) { 713b2badf02SMaxime Henrion device_printf(dev, "can't map the multicast setup command\n"); 714b2badf02SMaxime Henrion goto fail; 715b2badf02SMaxime Henrion } 716b2badf02SMaxime Henrion 717b2badf02SMaxime Henrion /* 718b2badf02SMaxime Henrion * Pre-allocate the TX DMA maps. 719b2badf02SMaxime Henrion */ 7204cec1653SMaxime Henrion for (i = 0; i < FXP_NTXCB; i++) { 721b2badf02SMaxime Henrion error = bus_dmamap_create(sc->fxp_mtag, 0, 722b2badf02SMaxime Henrion &sc->fxp_desc.tx_list[i].tx_map); 723b2badf02SMaxime Henrion if (error) { 724b2badf02SMaxime Henrion device_printf(dev, "can't create DMA map for TX\n"); 725b2badf02SMaxime Henrion goto fail; 726b2badf02SMaxime Henrion } 727b2badf02SMaxime Henrion } 728b2badf02SMaxime Henrion error = bus_dmamap_create(sc->fxp_mtag, 0, &sc->spare_map); 729b2badf02SMaxime Henrion if (error) { 730b2badf02SMaxime Henrion device_printf(dev, "can't create spare DMA map\n"); 731b2badf02SMaxime Henrion goto fail; 732b2badf02SMaxime Henrion } 733b2badf02SMaxime Henrion 734b2badf02SMaxime Henrion /* 735b2badf02SMaxime Henrion * Pre-allocate our receive buffers. 736b2badf02SMaxime Henrion */ 737b2badf02SMaxime Henrion sc->fxp_desc.rx_head = sc->fxp_desc.rx_tail = NULL; 738b2badf02SMaxime Henrion for (i = 0; i < FXP_NRFABUFS; i++) { 739b2badf02SMaxime Henrion rxp = &sc->fxp_desc.rx_list[i]; 740b2badf02SMaxime Henrion error = bus_dmamap_create(sc->fxp_mtag, 0, &rxp->rx_map); 741b2badf02SMaxime Henrion if (error) { 742b2badf02SMaxime Henrion device_printf(dev, "can't create DMA map for RX\n"); 743b2badf02SMaxime Henrion goto fail; 744b2badf02SMaxime Henrion } 7454953bccaSNate Lawson if (fxp_add_rfabuf(sc, rxp) != 0) { 7464953bccaSNate Lawson error = ENOMEM; 7474953bccaSNate Lawson goto fail; 7484953bccaSNate Lawson } 749b2badf02SMaxime Henrion } 750b2badf02SMaxime Henrion 751b2badf02SMaxime Henrion /* 752f7788e8eSJonathan Lemon * Read MAC address. 753f7788e8eSJonathan Lemon */ 75483e6547dSMaxime Henrion fxp_read_eeprom(sc, myea, 0, 3); 75583e6547dSMaxime Henrion sc->arpcom.ac_enaddr[0] = myea[0] & 0xff; 75683e6547dSMaxime Henrion sc->arpcom.ac_enaddr[1] = myea[0] >> 8; 75783e6547dSMaxime Henrion sc->arpcom.ac_enaddr[2] = myea[1] & 0xff; 75883e6547dSMaxime Henrion sc->arpcom.ac_enaddr[3] = myea[1] >> 8; 75983e6547dSMaxime Henrion sc->arpcom.ac_enaddr[4] = myea[2] & 0xff; 76083e6547dSMaxime Henrion sc->arpcom.ac_enaddr[5] = myea[2] >> 8; 761f7788e8eSJonathan Lemon device_printf(dev, "Ethernet address %6D%s\n", 762f7788e8eSJonathan Lemon sc->arpcom.ac_enaddr, ":", 763f7788e8eSJonathan Lemon sc->flags & FXP_FLAG_SERIAL_MEDIA ? ", 10Mbps" : ""); 764f7788e8eSJonathan Lemon if (bootverbose) { 7652e2b8238SJonathan Lemon device_printf(dev, "PCI IDs: %04x %04x %04x %04x %04x\n", 766f7788e8eSJonathan Lemon pci_get_vendor(dev), pci_get_device(dev), 7672e2b8238SJonathan Lemon pci_get_subvendor(dev), pci_get_subdevice(dev), 7682e2b8238SJonathan Lemon pci_get_revid(dev)); 76972a32a26SJonathan Lemon fxp_read_eeprom(sc, &data, 10, 1); 77072a32a26SJonathan Lemon device_printf(dev, "Dynamic Standby mode is %s\n", 77172a32a26SJonathan Lemon data & 0x02 ? "enabled" : "disabled"); 772f7788e8eSJonathan Lemon } 773f7788e8eSJonathan Lemon 774f7788e8eSJonathan Lemon /* 775f7788e8eSJonathan Lemon * If this is only a 10Mbps device, then there is no MII, and 776f7788e8eSJonathan Lemon * the PHY will use a serial interface instead. 777f7788e8eSJonathan Lemon * 778f7788e8eSJonathan Lemon * The Seeq 80c24 AutoDUPLEX(tm) Ethernet Interface Adapter 779f7788e8eSJonathan Lemon * doesn't have a programming interface of any sort. The 780f7788e8eSJonathan Lemon * media is sensed automatically based on how the link partner 781f7788e8eSJonathan Lemon * is configured. This is, in essence, manual configuration. 782f7788e8eSJonathan Lemon */ 783f7788e8eSJonathan Lemon if (sc->flags & FXP_FLAG_SERIAL_MEDIA) { 784f7788e8eSJonathan Lemon ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL); 785f7788e8eSJonathan Lemon ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL); 786f7788e8eSJonathan Lemon } else { 787f7788e8eSJonathan Lemon if (mii_phy_probe(dev, &sc->miibus, fxp_ifmedia_upd, 788f7788e8eSJonathan Lemon fxp_ifmedia_sts)) { 789f7788e8eSJonathan Lemon device_printf(dev, "MII without any PHY!\n"); 7906182fdbdSPeter Wemm error = ENXIO; 791ba8c6fd5SDavid Greenman goto fail; 792a17c678eSDavid Greenman } 793f7788e8eSJonathan Lemon } 794dccee1a1SDavid Greenman 795a17c678eSDavid Greenman ifp = &sc->arpcom.ac_if; 7966182fdbdSPeter Wemm ifp->if_unit = device_get_unit(dev); 797a17c678eSDavid Greenman ifp->if_name = "fxp"; 798a17c678eSDavid Greenman ifp->if_output = ether_output; 799a330e1f1SGary Palmer ifp->if_baudrate = 100000000; 800fb583156SDavid Greenman ifp->if_init = fxp_init; 801ba8c6fd5SDavid Greenman ifp->if_softc = sc; 802ba8c6fd5SDavid Greenman ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 803ba8c6fd5SDavid Greenman ifp->if_ioctl = fxp_ioctl; 804ba8c6fd5SDavid Greenman ifp->if_start = fxp_start; 805ba8c6fd5SDavid Greenman ifp->if_watchdog = fxp_watchdog; 806a17c678eSDavid Greenman 807c8bca6dcSBill Paul /* Enable checksum offload for 82550 or better chips */ 808c8bca6dcSBill Paul if (sc->flags & FXP_FLAG_EXT_RFA) { 809c8bca6dcSBill Paul ifp->if_hwassist = FXP_CSUM_FEATURES; 810c8bca6dcSBill Paul ifp->if_capabilities = IFCAP_HWCSUM; 811c6d8cd1eSBill Paul ifp->if_capenable = ifp->if_capabilities; 812c8bca6dcSBill Paul } 813c8bca6dcSBill Paul 814dfe61cf1SDavid Greenman /* 8154953bccaSNate Lawson * Attach the interface. 8164953bccaSNate Lawson */ 8174953bccaSNate Lawson ether_ifattach(ifp, sc->arpcom.ac_enaddr); 8184953bccaSNate Lawson 8194953bccaSNate Lawson /* 820e8c8b728SJonathan Lemon * Tell the upper layer(s) we support long frames. 821e8c8b728SJonathan Lemon */ 822e8c8b728SJonathan Lemon ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 823673d9191SSam Leffler ifp->if_capabilities |= IFCAP_VLAN_MTU; 824e8c8b728SJonathan Lemon 825483b9871SDavid Greenman /* 8263114fdb4SDavid Greenman * Let the system queue as many packets as we have available 8273114fdb4SDavid Greenman * TX descriptors. 828483b9871SDavid Greenman */ 8293114fdb4SDavid Greenman ifp->if_snd.ifq_maxlen = FXP_NTXCB - 1; 8304a684684SDavid Greenman 831201afb0eSMaxime Henrion /* 8324953bccaSNate Lawson * Hook our interrupt after all initialization is complete. 8334953bccaSNate Lawson * XXX This driver has been tested with the INTR_MPSAFFE flag set 8344953bccaSNate Lawson * however, ifp and its functions are not fully locked so MPSAFE 8354953bccaSNate Lawson * should not be used unless you can handle potential data loss. 836201afb0eSMaxime Henrion */ 8374953bccaSNate Lawson error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET /*|INTR_MPSAFE*/, 838201afb0eSMaxime Henrion fxp_intr, sc, &sc->ih); 839201afb0eSMaxime Henrion if (error) { 840201afb0eSMaxime Henrion device_printf(dev, "could not setup irq\n"); 8414953bccaSNate Lawson ether_ifdetach(&sc->arpcom.ac_if); 842201afb0eSMaxime Henrion goto fail; 843201afb0eSMaxime Henrion } 844201afb0eSMaxime Henrion 845a17c678eSDavid Greenman fail: 846f7788e8eSJonathan Lemon splx(s); 8474953bccaSNate Lawson if (error) 848f7788e8eSJonathan Lemon fxp_release(sc); 849f7788e8eSJonathan Lemon return (error); 850f7788e8eSJonathan Lemon } 851f7788e8eSJonathan Lemon 852f7788e8eSJonathan Lemon /* 8534953bccaSNate Lawson * Release all resources. The softc lock should not be held and the 8544953bccaSNate Lawson * interrupt should already be torn down. 855f7788e8eSJonathan Lemon */ 856f7788e8eSJonathan Lemon static void 857f7788e8eSJonathan Lemon fxp_release(struct fxp_softc *sc) 858f7788e8eSJonathan Lemon { 859b2badf02SMaxime Henrion struct fxp_rx *rxp; 860b2badf02SMaxime Henrion struct fxp_tx *txp; 861b2badf02SMaxime Henrion int i; 862b2badf02SMaxime Henrion 8634953bccaSNate Lawson mtx_assert(&sc->sc_mtx, MA_NOTOWNED); 864b983c7b3SMaxime Henrion if (sc->ih) 8654953bccaSNate Lawson panic("fxp_release() called with intr handle still active"); 8664953bccaSNate Lawson if (sc->miibus) 8674953bccaSNate Lawson device_delete_child(sc->dev, sc->miibus); 8684953bccaSNate Lawson bus_generic_detach(sc->dev); 8694953bccaSNate Lawson ifmedia_removeall(&sc->sc_media); 870b2badf02SMaxime Henrion if (sc->fxp_desc.cbl_list) { 871b2badf02SMaxime Henrion bus_dmamap_unload(sc->cbl_tag, sc->cbl_map); 872b2badf02SMaxime Henrion bus_dmamem_free(sc->cbl_tag, sc->fxp_desc.cbl_list, 873b2badf02SMaxime Henrion sc->cbl_map); 874b2badf02SMaxime Henrion } 875b2badf02SMaxime Henrion if (sc->fxp_stats) { 876b2badf02SMaxime Henrion bus_dmamap_unload(sc->fxp_stag, sc->fxp_smap); 877b2badf02SMaxime Henrion bus_dmamem_free(sc->fxp_stag, sc->fxp_stats, sc->fxp_smap); 878b2badf02SMaxime Henrion } 879b2badf02SMaxime Henrion if (sc->mcsp) { 880b2badf02SMaxime Henrion bus_dmamap_unload(sc->mcs_tag, sc->mcs_map); 881b2badf02SMaxime Henrion bus_dmamem_free(sc->mcs_tag, sc->mcsp, sc->mcs_map); 882b2badf02SMaxime Henrion } 883f7788e8eSJonathan Lemon if (sc->irq) 884f7788e8eSJonathan Lemon bus_release_resource(sc->dev, SYS_RES_IRQ, 0, sc->irq); 885f7788e8eSJonathan Lemon if (sc->mem) 886f7788e8eSJonathan Lemon bus_release_resource(sc->dev, sc->rtp, sc->rgd, sc->mem); 887b983c7b3SMaxime Henrion if (sc->fxp_mtag) { 888b983c7b3SMaxime Henrion for (i = 0; i < FXP_NRFABUFS; i++) { 889b983c7b3SMaxime Henrion rxp = &sc->fxp_desc.rx_list[i]; 890b983c7b3SMaxime Henrion if (rxp->rx_mbuf != NULL) { 891b983c7b3SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, rxp->rx_map, 892b983c7b3SMaxime Henrion BUS_DMASYNC_POSTREAD); 893b983c7b3SMaxime Henrion bus_dmamap_unload(sc->fxp_mtag, rxp->rx_map); 894b983c7b3SMaxime Henrion m_freem(rxp->rx_mbuf); 895b983c7b3SMaxime Henrion } 896b983c7b3SMaxime Henrion bus_dmamap_destroy(sc->fxp_mtag, rxp->rx_map); 897b983c7b3SMaxime Henrion } 898b983c7b3SMaxime Henrion bus_dmamap_destroy(sc->fxp_mtag, sc->spare_map); 899b2badf02SMaxime Henrion bus_dma_tag_destroy(sc->fxp_mtag); 900b983c7b3SMaxime Henrion } 901b983c7b3SMaxime Henrion if (sc->fxp_stag) { 902b983c7b3SMaxime Henrion for (i = 0; i < FXP_NTXCB; i++) { 903b983c7b3SMaxime Henrion txp = &sc->fxp_desc.tx_list[i]; 904b983c7b3SMaxime Henrion if (txp->tx_mbuf != NULL) { 905b983c7b3SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, txp->tx_map, 906b983c7b3SMaxime Henrion BUS_DMASYNC_POSTWRITE); 907b983c7b3SMaxime Henrion bus_dmamap_unload(sc->fxp_mtag, txp->tx_map); 908b983c7b3SMaxime Henrion m_freem(txp->tx_mbuf); 909b983c7b3SMaxime Henrion } 910b983c7b3SMaxime Henrion bus_dmamap_destroy(sc->fxp_mtag, txp->tx_map); 911b983c7b3SMaxime Henrion } 912b2badf02SMaxime Henrion bus_dma_tag_destroy(sc->fxp_stag); 913b983c7b3SMaxime Henrion } 914b2badf02SMaxime Henrion if (sc->cbl_tag) 915b2badf02SMaxime Henrion bus_dma_tag_destroy(sc->cbl_tag); 916b2badf02SMaxime Henrion if (sc->mcs_tag) 917b2badf02SMaxime Henrion bus_dma_tag_destroy(sc->mcs_tag); 91872a32a26SJonathan Lemon 91972a32a26SJonathan Lemon sysctl_ctx_free(&sc->sysctl_ctx); 92072a32a26SJonathan Lemon 9210f4dc94cSChuck Paterson mtx_destroy(&sc->sc_mtx); 9226182fdbdSPeter Wemm } 9236182fdbdSPeter Wemm 9246182fdbdSPeter Wemm /* 9256182fdbdSPeter Wemm * Detach interface. 9266182fdbdSPeter Wemm */ 9276182fdbdSPeter Wemm static int 9286182fdbdSPeter Wemm fxp_detach(device_t dev) 9296182fdbdSPeter Wemm { 9306182fdbdSPeter Wemm struct fxp_softc *sc = device_get_softc(dev); 931f7788e8eSJonathan Lemon int s; 9326182fdbdSPeter Wemm 9334953bccaSNate Lawson FXP_LOCK(sc); 934f7788e8eSJonathan Lemon s = splimp(); 93532cd7a9cSWarner Losh 9361d2945d5SWarner Losh sc->suspended = 1; /* Do same thing as we do for suspend */ 9376182fdbdSPeter Wemm /* 938f7788e8eSJonathan Lemon * Close down routes etc. 9396182fdbdSPeter Wemm */ 940673d9191SSam Leffler ether_ifdetach(&sc->arpcom.ac_if); 94120f0c80fSMaxime Henrion 94220f0c80fSMaxime Henrion /* 94332cd7a9cSWarner Losh * Stop DMA and drop transmit queue, but disable interrupts first. 94420f0c80fSMaxime Henrion */ 94520f0c80fSMaxime Henrion CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, FXP_SCB_INTR_DISABLE); 94620f0c80fSMaxime Henrion fxp_stop(sc); 94732cd7a9cSWarner Losh FXP_UNLOCK(sc); 94820f0c80fSMaxime Henrion 9496182fdbdSPeter Wemm /* 9504953bccaSNate Lawson * Unhook interrupt before dropping lock. This is to prevent 9514953bccaSNate Lawson * races with fxp_intr(). 9526182fdbdSPeter Wemm */ 9534953bccaSNate Lawson bus_teardown_intr(sc->dev, sc->irq, sc->ih); 9544953bccaSNate Lawson sc->ih = NULL; 9556182fdbdSPeter Wemm 956f7788e8eSJonathan Lemon splx(s); 9576182fdbdSPeter Wemm 958f7788e8eSJonathan Lemon /* Release our allocated resources. */ 959f7788e8eSJonathan Lemon fxp_release(sc); 960f7788e8eSJonathan Lemon return (0); 961a17c678eSDavid Greenman } 962a17c678eSDavid Greenman 963a17c678eSDavid Greenman /* 9644a684684SDavid Greenman * Device shutdown routine. Called at system shutdown after sync. The 965a17c678eSDavid Greenman * main purpose of this routine is to shut off receiver DMA so that 966a17c678eSDavid Greenman * kernel memory doesn't get clobbered during warmboot. 967a17c678eSDavid Greenman */ 9686182fdbdSPeter Wemm static int 9696182fdbdSPeter Wemm fxp_shutdown(device_t dev) 970a17c678eSDavid Greenman { 9716182fdbdSPeter Wemm /* 9726182fdbdSPeter Wemm * Make sure that DMA is disabled prior to reboot. Not doing 9736182fdbdSPeter Wemm * do could allow DMA to corrupt kernel memory during the 9746182fdbdSPeter Wemm * reboot before the driver initializes. 9756182fdbdSPeter Wemm */ 9766182fdbdSPeter Wemm fxp_stop((struct fxp_softc *) device_get_softc(dev)); 977f7788e8eSJonathan Lemon return (0); 978a17c678eSDavid Greenman } 979a17c678eSDavid Greenman 9807dced78aSDavid Greenman /* 9817dced78aSDavid Greenman * Device suspend routine. Stop the interface and save some PCI 9827dced78aSDavid Greenman * settings in case the BIOS doesn't restore them properly on 9837dced78aSDavid Greenman * resume. 9847dced78aSDavid Greenman */ 9857dced78aSDavid Greenman static int 9867dced78aSDavid Greenman fxp_suspend(device_t dev) 9877dced78aSDavid Greenman { 9887dced78aSDavid Greenman struct fxp_softc *sc = device_get_softc(dev); 989f7788e8eSJonathan Lemon int i, s; 9907dced78aSDavid Greenman 9914953bccaSNate Lawson FXP_LOCK(sc); 992f7788e8eSJonathan Lemon s = splimp(); 9937dced78aSDavid Greenman 9947dced78aSDavid Greenman fxp_stop(sc); 9957dced78aSDavid Greenman 9967dced78aSDavid Greenman for (i = 0; i < 5; i++) 997e27951b2SJohn Baldwin sc->saved_maps[i] = pci_read_config(dev, PCIR_BAR(i), 4); 9987dced78aSDavid Greenman sc->saved_biosaddr = pci_read_config(dev, PCIR_BIOS, 4); 9997dced78aSDavid Greenman sc->saved_intline = pci_read_config(dev, PCIR_INTLINE, 1); 10007dced78aSDavid Greenman sc->saved_cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1); 10017dced78aSDavid Greenman sc->saved_lattimer = pci_read_config(dev, PCIR_LATTIMER, 1); 10027dced78aSDavid Greenman 10037dced78aSDavid Greenman sc->suspended = 1; 10047dced78aSDavid Greenman 10054953bccaSNate Lawson FXP_UNLOCK(sc); 1006f7788e8eSJonathan Lemon splx(s); 1007f7788e8eSJonathan Lemon return (0); 10087dced78aSDavid Greenman } 10097dced78aSDavid Greenman 10107dced78aSDavid Greenman /* 10117dced78aSDavid Greenman * Device resume routine. Restore some PCI settings in case the BIOS 10127dced78aSDavid Greenman * doesn't, re-enable busmastering, and restart the interface if 10137dced78aSDavid Greenman * appropriate. 10147dced78aSDavid Greenman */ 10157dced78aSDavid Greenman static int 10167dced78aSDavid Greenman fxp_resume(device_t dev) 10177dced78aSDavid Greenman { 10187dced78aSDavid Greenman struct fxp_softc *sc = device_get_softc(dev); 10197dced78aSDavid Greenman struct ifnet *ifp = &sc->sc_if; 10207dced78aSDavid Greenman u_int16_t pci_command; 1021f7788e8eSJonathan Lemon int i, s; 10227dced78aSDavid Greenman 10234953bccaSNate Lawson FXP_LOCK(sc); 1024f7788e8eSJonathan Lemon s = splimp(); 1025fa4b32faSWarner Losh #ifndef BURN_BRIDGES 102648e417ebSJonathan Lemon fxp_powerstate_d0(dev); 1027fa4b32faSWarner Losh #endif 10287dced78aSDavid Greenman /* better way to do this? */ 10297dced78aSDavid Greenman for (i = 0; i < 5; i++) 1030e27951b2SJohn Baldwin pci_write_config(dev, PCIR_BAR(i), sc->saved_maps[i], 4); 10317dced78aSDavid Greenman pci_write_config(dev, PCIR_BIOS, sc->saved_biosaddr, 4); 10327dced78aSDavid Greenman pci_write_config(dev, PCIR_INTLINE, sc->saved_intline, 1); 10337dced78aSDavid Greenman pci_write_config(dev, PCIR_CACHELNSZ, sc->saved_cachelnsz, 1); 10347dced78aSDavid Greenman pci_write_config(dev, PCIR_LATTIMER, sc->saved_lattimer, 1); 10357dced78aSDavid Greenman 10367dced78aSDavid Greenman /* reenable busmastering */ 10377dced78aSDavid Greenman pci_command = pci_read_config(dev, PCIR_COMMAND, 2); 10387dced78aSDavid Greenman pci_command |= (PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 10397dced78aSDavid Greenman pci_write_config(dev, PCIR_COMMAND, pci_command, 2); 10407dced78aSDavid Greenman 10417dced78aSDavid Greenman CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 10427dced78aSDavid Greenman DELAY(10); 10437dced78aSDavid Greenman 10447dced78aSDavid Greenman /* reinitialize interface if necessary */ 10457dced78aSDavid Greenman if (ifp->if_flags & IFF_UP) 10464953bccaSNate Lawson fxp_init_body(sc); 10477dced78aSDavid Greenman 10487dced78aSDavid Greenman sc->suspended = 0; 10497dced78aSDavid Greenman 10504953bccaSNate Lawson FXP_UNLOCK(sc); 1051f7788e8eSJonathan Lemon splx(s); 1052ba8c6fd5SDavid Greenman return (0); 1053f7788e8eSJonathan Lemon } 1054ba8c6fd5SDavid Greenman 105500c4116bSJonathan Lemon static void 105600c4116bSJonathan Lemon fxp_eeprom_shiftin(struct fxp_softc *sc, int data, int length) 105700c4116bSJonathan Lemon { 105800c4116bSJonathan Lemon u_int16_t reg; 105900c4116bSJonathan Lemon int x; 106000c4116bSJonathan Lemon 106100c4116bSJonathan Lemon /* 106200c4116bSJonathan Lemon * Shift in data. 106300c4116bSJonathan Lemon */ 106400c4116bSJonathan Lemon for (x = 1 << (length - 1); x; x >>= 1) { 106500c4116bSJonathan Lemon if (data & x) 106600c4116bSJonathan Lemon reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 106700c4116bSJonathan Lemon else 106800c4116bSJonathan Lemon reg = FXP_EEPROM_EECS; 106900c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 107000c4116bSJonathan Lemon DELAY(1); 107100c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK); 107200c4116bSJonathan Lemon DELAY(1); 107300c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 107400c4116bSJonathan Lemon DELAY(1); 107500c4116bSJonathan Lemon } 107600c4116bSJonathan Lemon } 107700c4116bSJonathan Lemon 1078f7788e8eSJonathan Lemon /* 1079f7788e8eSJonathan Lemon * Read from the serial EEPROM. Basically, you manually shift in 1080f7788e8eSJonathan Lemon * the read opcode (one bit at a time) and then shift in the address, 1081f7788e8eSJonathan Lemon * and then you shift out the data (all of this one bit at a time). 1082f7788e8eSJonathan Lemon * The word size is 16 bits, so you have to provide the address for 1083f7788e8eSJonathan Lemon * every 16 bits of data. 1084f7788e8eSJonathan Lemon */ 1085f7788e8eSJonathan Lemon static u_int16_t 1086f7788e8eSJonathan Lemon fxp_eeprom_getword(struct fxp_softc *sc, int offset, int autosize) 1087f7788e8eSJonathan Lemon { 1088f7788e8eSJonathan Lemon u_int16_t reg, data; 1089f7788e8eSJonathan Lemon int x; 1090ba8c6fd5SDavid Greenman 1091f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 1092f7788e8eSJonathan Lemon /* 1093f7788e8eSJonathan Lemon * Shift in read opcode. 1094f7788e8eSJonathan Lemon */ 109500c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, FXP_EEPROM_OPC_READ, 3); 1096f7788e8eSJonathan Lemon /* 1097f7788e8eSJonathan Lemon * Shift in address. 1098f7788e8eSJonathan Lemon */ 1099f7788e8eSJonathan Lemon data = 0; 1100f7788e8eSJonathan Lemon for (x = 1 << (sc->eeprom_size - 1); x; x >>= 1) { 1101f7788e8eSJonathan Lemon if (offset & x) 1102f7788e8eSJonathan Lemon reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 1103f7788e8eSJonathan Lemon else 1104f7788e8eSJonathan Lemon reg = FXP_EEPROM_EECS; 1105f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 1106f7788e8eSJonathan Lemon DELAY(1); 1107f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK); 1108f7788e8eSJonathan Lemon DELAY(1); 1109f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 1110f7788e8eSJonathan Lemon DELAY(1); 1111f7788e8eSJonathan Lemon reg = CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO; 1112f7788e8eSJonathan Lemon data++; 1113f7788e8eSJonathan Lemon if (autosize && reg == 0) { 1114f7788e8eSJonathan Lemon sc->eeprom_size = data; 1115f7788e8eSJonathan Lemon break; 1116f7788e8eSJonathan Lemon } 1117f7788e8eSJonathan Lemon } 1118f7788e8eSJonathan Lemon /* 1119f7788e8eSJonathan Lemon * Shift out data. 1120f7788e8eSJonathan Lemon */ 1121f7788e8eSJonathan Lemon data = 0; 1122f7788e8eSJonathan Lemon reg = FXP_EEPROM_EECS; 1123f7788e8eSJonathan Lemon for (x = 1 << 15; x; x >>= 1) { 1124f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK); 1125f7788e8eSJonathan Lemon DELAY(1); 1126f7788e8eSJonathan Lemon if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO) 1127f7788e8eSJonathan Lemon data |= x; 1128f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 1129f7788e8eSJonathan Lemon DELAY(1); 1130f7788e8eSJonathan Lemon } 1131f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 1132f7788e8eSJonathan Lemon DELAY(1); 1133f7788e8eSJonathan Lemon 1134f7788e8eSJonathan Lemon return (data); 1135ba8c6fd5SDavid Greenman } 1136ba8c6fd5SDavid Greenman 113700c4116bSJonathan Lemon static void 113800c4116bSJonathan Lemon fxp_eeprom_putword(struct fxp_softc *sc, int offset, u_int16_t data) 113900c4116bSJonathan Lemon { 114000c4116bSJonathan Lemon int i; 114100c4116bSJonathan Lemon 114200c4116bSJonathan Lemon /* 114300c4116bSJonathan Lemon * Erase/write enable. 114400c4116bSJonathan Lemon */ 114500c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 114600c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, 0x4, 3); 114700c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, 0x03 << (sc->eeprom_size - 2), sc->eeprom_size); 114800c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 114900c4116bSJonathan Lemon DELAY(1); 115000c4116bSJonathan Lemon /* 115100c4116bSJonathan Lemon * Shift in write opcode, address, data. 115200c4116bSJonathan Lemon */ 115300c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 115400c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, FXP_EEPROM_OPC_WRITE, 3); 115500c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, offset, sc->eeprom_size); 115600c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, data, 16); 115700c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 115800c4116bSJonathan Lemon DELAY(1); 115900c4116bSJonathan Lemon /* 116000c4116bSJonathan Lemon * Wait for EEPROM to finish up. 116100c4116bSJonathan Lemon */ 116200c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 116300c4116bSJonathan Lemon DELAY(1); 116400c4116bSJonathan Lemon for (i = 0; i < 1000; i++) { 116500c4116bSJonathan Lemon if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO) 116600c4116bSJonathan Lemon break; 116700c4116bSJonathan Lemon DELAY(50); 116800c4116bSJonathan Lemon } 116900c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 117000c4116bSJonathan Lemon DELAY(1); 117100c4116bSJonathan Lemon /* 117200c4116bSJonathan Lemon * Erase/write disable. 117300c4116bSJonathan Lemon */ 117400c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 117500c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, 0x4, 3); 117600c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, 0, sc->eeprom_size); 117700c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 117800c4116bSJonathan Lemon DELAY(1); 117900c4116bSJonathan Lemon } 118000c4116bSJonathan Lemon 1181ba8c6fd5SDavid Greenman /* 1182e9bf2fa7SDavid Greenman * From NetBSD: 1183e9bf2fa7SDavid Greenman * 1184e9bf2fa7SDavid Greenman * Figure out EEPROM size. 1185e9bf2fa7SDavid Greenman * 1186e9bf2fa7SDavid Greenman * 559's can have either 64-word or 256-word EEPROMs, the 558 1187e9bf2fa7SDavid Greenman * datasheet only talks about 64-word EEPROMs, and the 557 datasheet 1188e9bf2fa7SDavid Greenman * talks about the existance of 16 to 256 word EEPROMs. 1189e9bf2fa7SDavid Greenman * 1190e9bf2fa7SDavid Greenman * The only known sizes are 64 and 256, where the 256 version is used 1191e9bf2fa7SDavid Greenman * by CardBus cards to store CIS information. 1192e9bf2fa7SDavid Greenman * 1193e9bf2fa7SDavid Greenman * The address is shifted in msb-to-lsb, and after the last 1194e9bf2fa7SDavid Greenman * address-bit the EEPROM is supposed to output a `dummy zero' bit, 1195e9bf2fa7SDavid Greenman * after which follows the actual data. We try to detect this zero, by 1196e9bf2fa7SDavid Greenman * probing the data-out bit in the EEPROM control register just after 1197e9bf2fa7SDavid Greenman * having shifted in a bit. If the bit is zero, we assume we've 1198e9bf2fa7SDavid Greenman * shifted enough address bits. The data-out should be tri-state, 1199e9bf2fa7SDavid Greenman * before this, which should translate to a logical one. 1200e9bf2fa7SDavid Greenman */ 1201e9bf2fa7SDavid Greenman static void 1202f7788e8eSJonathan Lemon fxp_autosize_eeprom(struct fxp_softc *sc) 1203e9bf2fa7SDavid Greenman { 1204e9bf2fa7SDavid Greenman 1205f7788e8eSJonathan Lemon /* guess maximum size of 256 words */ 1206f7788e8eSJonathan Lemon sc->eeprom_size = 8; 1207f7788e8eSJonathan Lemon 1208f7788e8eSJonathan Lemon /* autosize */ 1209f7788e8eSJonathan Lemon (void) fxp_eeprom_getword(sc, 0, 1); 1210e9bf2fa7SDavid Greenman } 1211f7788e8eSJonathan Lemon 1212ba8c6fd5SDavid Greenman static void 1213f7788e8eSJonathan Lemon fxp_read_eeprom(struct fxp_softc *sc, u_short *data, int offset, int words) 1214ba8c6fd5SDavid Greenman { 1215f7788e8eSJonathan Lemon int i; 1216ba8c6fd5SDavid Greenman 1217f7788e8eSJonathan Lemon for (i = 0; i < words; i++) 1218f7788e8eSJonathan Lemon data[i] = fxp_eeprom_getword(sc, offset + i, 0); 1219ba8c6fd5SDavid Greenman } 1220ba8c6fd5SDavid Greenman 122100c4116bSJonathan Lemon static void 122200c4116bSJonathan Lemon fxp_write_eeprom(struct fxp_softc *sc, u_short *data, int offset, int words) 122300c4116bSJonathan Lemon { 122400c4116bSJonathan Lemon int i; 122500c4116bSJonathan Lemon 122600c4116bSJonathan Lemon for (i = 0; i < words; i++) 122700c4116bSJonathan Lemon fxp_eeprom_putword(sc, offset + i, data[i]); 122800c4116bSJonathan Lemon } 122900c4116bSJonathan Lemon 1230b2badf02SMaxime Henrion static void 1231b2badf02SMaxime Henrion fxp_dma_map_txbuf(void *arg, bus_dma_segment_t *segs, int nseg, 1232b2badf02SMaxime Henrion bus_size_t mapsize, int error) 1233b2badf02SMaxime Henrion { 1234b2badf02SMaxime Henrion struct fxp_softc *sc; 1235b2badf02SMaxime Henrion struct fxp_cb_tx *txp; 1236b2badf02SMaxime Henrion int i; 1237b2badf02SMaxime Henrion 1238b2badf02SMaxime Henrion if (error) 1239b2badf02SMaxime Henrion return; 1240b2badf02SMaxime Henrion 1241b2badf02SMaxime Henrion KASSERT(nseg <= FXP_NTXSEG, ("too many DMA segments")); 1242b2badf02SMaxime Henrion 1243b2badf02SMaxime Henrion sc = arg; 1244b2badf02SMaxime Henrion txp = sc->fxp_desc.tx_last->tx_next->tx_cb; 1245b2badf02SMaxime Henrion for (i = 0; i < nseg; i++) { 1246b2badf02SMaxime Henrion KASSERT(segs[i].ds_len <= MCLBYTES, ("segment size too large")); 1247b2badf02SMaxime Henrion /* 1248b2badf02SMaxime Henrion * If this is an 82550/82551, then we're using extended 1249b2badf02SMaxime Henrion * TxCBs _and_ we're using checksum offload. This means 1250b2badf02SMaxime Henrion * that the TxCB is really an IPCB. One major difference 1251b2badf02SMaxime Henrion * between the two is that with plain extended TxCBs, 1252b2badf02SMaxime Henrion * the bottom half of the TxCB contains two entries from 1253b2badf02SMaxime Henrion * the TBD array, whereas IPCBs contain just one entry: 1254b2badf02SMaxime Henrion * one entry (8 bytes) has been sacrificed for the TCP/IP 1255b2badf02SMaxime Henrion * checksum offload control bits. So to make things work 1256b2badf02SMaxime Henrion * right, we have to start filling in the TBD array 1257b2badf02SMaxime Henrion * starting from a different place depending on whether 1258b2badf02SMaxime Henrion * the chip is an 82550/82551 or not. 1259b2badf02SMaxime Henrion */ 1260b2badf02SMaxime Henrion if (sc->flags & FXP_FLAG_EXT_RFA) { 126183e6547dSMaxime Henrion txp->tbd[i + 1].tb_addr = htole32(segs[i].ds_addr); 126283e6547dSMaxime Henrion txp->tbd[i + 1].tb_size = htole32(segs[i].ds_len); 1263b2badf02SMaxime Henrion } else { 126483e6547dSMaxime Henrion txp->tbd[i].tb_addr = htole32(segs[i].ds_addr); 126583e6547dSMaxime Henrion txp->tbd[i].tb_size = htole32(segs[i].ds_len); 1266b2badf02SMaxime Henrion } 1267b2badf02SMaxime Henrion } 1268b2badf02SMaxime Henrion txp->tbd_number = nseg; 1269b2badf02SMaxime Henrion } 1270b2badf02SMaxime Henrion 1271a17c678eSDavid Greenman /* 12724953bccaSNate Lawson * Grab the softc lock and call the real fxp_start_body() routine 1273a17c678eSDavid Greenman */ 1274a17c678eSDavid Greenman static void 1275f7788e8eSJonathan Lemon fxp_start(struct ifnet *ifp) 1276a17c678eSDavid Greenman { 12779b44ff22SGarrett Wollman struct fxp_softc *sc = ifp->if_softc; 12784953bccaSNate Lawson 12794953bccaSNate Lawson FXP_LOCK(sc); 12804953bccaSNate Lawson fxp_start_body(ifp); 12814953bccaSNate Lawson FXP_UNLOCK(sc); 12824953bccaSNate Lawson } 12834953bccaSNate Lawson 12844953bccaSNate Lawson /* 12854953bccaSNate Lawson * Start packet transmission on the interface. 12864953bccaSNate Lawson * This routine must be called with the softc lock held, and is an 12874953bccaSNate Lawson * internal entry point only. 12884953bccaSNate Lawson */ 12894953bccaSNate Lawson static void 12904953bccaSNate Lawson fxp_start_body(struct ifnet *ifp) 12914953bccaSNate Lawson { 12924953bccaSNate Lawson struct fxp_softc *sc = ifp->if_softc; 129350d81222SMaxime Henrion struct fxp_tx *txp; 1294b2badf02SMaxime Henrion struct mbuf *mb_head; 1295b2badf02SMaxime Henrion int error; 1296a17c678eSDavid Greenman 12974953bccaSNate Lawson mtx_assert(&sc->sc_mtx, MA_OWNED); 1298a17c678eSDavid Greenman /* 1299483b9871SDavid Greenman * See if we need to suspend xmit until the multicast filter 1300483b9871SDavid Greenman * has been reprogrammed (which can only be done at the head 1301483b9871SDavid Greenman * of the command chain). 1302a17c678eSDavid Greenman */ 13030f4dc94cSChuck Paterson if (sc->need_mcsetup) { 1304a17c678eSDavid Greenman return; 13050f4dc94cSChuck Paterson } 13061cd443acSDavid Greenman 1307483b9871SDavid Greenman txp = NULL; 1308483b9871SDavid Greenman 1309483b9871SDavid Greenman /* 1310483b9871SDavid Greenman * We're finished if there is nothing more to add to the list or if 1311483b9871SDavid Greenman * we're all filled up with buffers to transmit. 13123114fdb4SDavid Greenman * NOTE: One TxCB is reserved to guarantee that fxp_mc_setup() can add 13133114fdb4SDavid Greenman * a NOP command when needed. 1314483b9871SDavid Greenman */ 13153114fdb4SDavid Greenman while (ifp->if_snd.ifq_head != NULL && sc->tx_queued < FXP_NTXCB - 1) { 1316483b9871SDavid Greenman 1317dfe61cf1SDavid Greenman /* 1318dfe61cf1SDavid Greenman * Grab a packet to transmit. 1319dfe61cf1SDavid Greenman */ 13206318197eSDavid Greenman IF_DEQUEUE(&ifp->if_snd, mb_head); 1321a17c678eSDavid Greenman 1322dfe61cf1SDavid Greenman /* 1323483b9871SDavid Greenman * Get pointer to next available tx desc. 1324dfe61cf1SDavid Greenman */ 1325b2badf02SMaxime Henrion txp = sc->fxp_desc.tx_last->tx_next; 1326c8bca6dcSBill Paul 1327c8bca6dcSBill Paul /* 1328a35e7eaaSDon Lewis * A note in Appendix B of the Intel 8255x 10/100 Mbps 1329a35e7eaaSDon Lewis * Ethernet Controller Family Open Source Software 1330a35e7eaaSDon Lewis * Developer Manual says: 1331a35e7eaaSDon Lewis * Using software parsing is only allowed with legal 1332a35e7eaaSDon Lewis * TCP/IP or UDP/IP packets. 1333a35e7eaaSDon Lewis * ... 1334a35e7eaaSDon Lewis * For all other datagrams, hardware parsing must 1335a35e7eaaSDon Lewis * be used. 1336a35e7eaaSDon Lewis * Software parsing appears to truncate ICMP and 1337a35e7eaaSDon Lewis * fragmented UDP packets that contain one to three 1338a35e7eaaSDon Lewis * bytes in the second (and final) mbuf of the packet. 1339a35e7eaaSDon Lewis */ 1340a35e7eaaSDon Lewis if (sc->flags & FXP_FLAG_EXT_RFA) 1341a35e7eaaSDon Lewis txp->tx_cb->ipcb_ip_activation_high = 1342a35e7eaaSDon Lewis FXP_IPCB_HARDWAREPARSING_ENABLE; 1343a35e7eaaSDon Lewis 1344a35e7eaaSDon Lewis /* 1345c8bca6dcSBill Paul * Deal with TCP/IP checksum offload. Note that 1346c8bca6dcSBill Paul * in order for TCP checksum offload to work, 1347c8bca6dcSBill Paul * the pseudo header checksum must have already 1348c8bca6dcSBill Paul * been computed and stored in the checksum field 1349c8bca6dcSBill Paul * in the TCP header. The stack should have 1350c8bca6dcSBill Paul * already done this for us. 1351c8bca6dcSBill Paul */ 1352c8bca6dcSBill Paul 1353c8bca6dcSBill Paul if (mb_head->m_pkthdr.csum_flags) { 1354c8bca6dcSBill Paul if (mb_head->m_pkthdr.csum_flags & CSUM_DELAY_DATA) { 1355b2badf02SMaxime Henrion txp->tx_cb->ipcb_ip_schedule = 1356c8bca6dcSBill Paul FXP_IPCB_TCPUDP_CHECKSUM_ENABLE; 1357c8bca6dcSBill Paul if (mb_head->m_pkthdr.csum_flags & CSUM_TCP) 1358b2badf02SMaxime Henrion txp->tx_cb->ipcb_ip_schedule |= 1359c8bca6dcSBill Paul FXP_IPCB_TCP_PACKET; 1360c8bca6dcSBill Paul } 1361c8bca6dcSBill Paul #ifdef FXP_IP_CSUM_WAR 1362c8bca6dcSBill Paul /* 1363c8bca6dcSBill Paul * XXX The 82550 chip appears to have trouble 1364c8bca6dcSBill Paul * dealing with IP header checksums in very small 1365c8bca6dcSBill Paul * datagrams, namely fragments from 1 to 3 bytes 1366c8bca6dcSBill Paul * in size. For example, say you want to transmit 1367c8bca6dcSBill Paul * a UDP packet of 1473 bytes. The packet will be 1368c8bca6dcSBill Paul * fragmented over two IP datagrams, the latter 1369c8bca6dcSBill Paul * containing only one byte of data. The 82550 will 1370c8bca6dcSBill Paul * botch the header checksum on the 1-byte fragment. 1371c8bca6dcSBill Paul * As long as the datagram contains 4 or more bytes 1372c8bca6dcSBill Paul * of data, you're ok. 1373c8bca6dcSBill Paul * 1374c8bca6dcSBill Paul * The following code attempts to work around this 1375c8bca6dcSBill Paul * problem: if the datagram is less than 38 bytes 1376c8bca6dcSBill Paul * in size (14 bytes ether header, 20 bytes IP header, 1377c8bca6dcSBill Paul * plus 4 bytes of data), we punt and compute the IP 1378c8bca6dcSBill Paul * header checksum by hand. This workaround doesn't 1379c8bca6dcSBill Paul * work very well, however, since it can be fooled 1380c8bca6dcSBill Paul * by things like VLAN tags and IP options that make 1381c8bca6dcSBill Paul * the header sizes/offsets vary. 1382c8bca6dcSBill Paul */ 1383c8bca6dcSBill Paul 1384c8bca6dcSBill Paul if (mb_head->m_pkthdr.csum_flags & CSUM_IP) { 1385c8bca6dcSBill Paul if (mb_head->m_pkthdr.len < 38) { 1386c8bca6dcSBill Paul struct ip *ip; 1387c8bca6dcSBill Paul mb_head->m_data += ETHER_HDR_LEN; 1388c8bca6dcSBill Paul ip = mtod(mb_head, struct ip *); 1389c8bca6dcSBill Paul ip->ip_sum = in_cksum(mb_head, 1390c8bca6dcSBill Paul ip->ip_hl << 2); 1391c8bca6dcSBill Paul mb_head->m_data -= ETHER_HDR_LEN; 1392c8bca6dcSBill Paul } else { 1393b2badf02SMaxime Henrion txp->tx_cb->ipcb_ip_activation_high = 1394c8bca6dcSBill Paul FXP_IPCB_HARDWAREPARSING_ENABLE; 1395b2badf02SMaxime Henrion txp->tx_cb->ipcb_ip_schedule |= 1396c8bca6dcSBill Paul FXP_IPCB_IP_CHECKSUM_ENABLE; 1397c8bca6dcSBill Paul } 1398c8bca6dcSBill Paul } 1399c8bca6dcSBill Paul #endif 1400c8bca6dcSBill Paul } 1401c8bca6dcSBill Paul 1402c8bca6dcSBill Paul /* 1403a17c678eSDavid Greenman * Go through each of the mbufs in the chain and initialize 1404483b9871SDavid Greenman * the transmit buffer descriptors with the physical address 1405a17c678eSDavid Greenman * and size of the mbuf. 1406a17c678eSDavid Greenman */ 1407b2badf02SMaxime Henrion error = bus_dmamap_load_mbuf(sc->fxp_mtag, txp->tx_map, 1408b2badf02SMaxime Henrion mb_head, fxp_dma_map_txbuf, sc, 0); 1409b2badf02SMaxime Henrion 1410b2badf02SMaxime Henrion if (error && error != EFBIG) { 1411b2badf02SMaxime Henrion device_printf(sc->dev, "can't map mbuf (error %d)\n", 1412b2badf02SMaxime Henrion error); 1413b2badf02SMaxime Henrion m_freem(mb_head); 1414a17c678eSDavid Greenman break; 1415a17c678eSDavid Greenman } 1416b2badf02SMaxime Henrion 1417b2badf02SMaxime Henrion if (error) { 141823a0ed7cSDavid Greenman struct mbuf *mn; 141923a0ed7cSDavid Greenman 1420a17c678eSDavid Greenman /* 14213bd07cfdSJonathan Lemon * We ran out of segments. We have to recopy this 14223bd07cfdSJonathan Lemon * mbuf chain first. Bail out if we can't get the 14233bd07cfdSJonathan Lemon * new buffers. 1424a17c678eSDavid Greenman */ 14251104779bSMike Silbersack mn = m_defrag(mb_head, M_DONTWAIT); 142623a0ed7cSDavid Greenman if (mn == NULL) { 142723a0ed7cSDavid Greenman m_freem(mb_head); 1428483b9871SDavid Greenman break; 14291104779bSMike Silbersack } else { 143023a0ed7cSDavid Greenman mb_head = mn; 14311104779bSMike Silbersack } 1432b2badf02SMaxime Henrion error = bus_dmamap_load_mbuf(sc->fxp_mtag, txp->tx_map, 1433b2badf02SMaxime Henrion mb_head, fxp_dma_map_txbuf, sc, 0); 1434b2badf02SMaxime Henrion if (error) { 1435b2badf02SMaxime Henrion device_printf(sc->dev, 1436b2badf02SMaxime Henrion "can't map mbuf (error %d)\n", error); 1437b2badf02SMaxime Henrion m_freem(mb_head); 1438b2badf02SMaxime Henrion break; 1439b2badf02SMaxime Henrion } 144023a0ed7cSDavid Greenman } 144123a0ed7cSDavid Greenman 1442b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, txp->tx_map, 1443b2badf02SMaxime Henrion BUS_DMASYNC_PREWRITE); 1444b2badf02SMaxime Henrion 1445b2badf02SMaxime Henrion txp->tx_mbuf = mb_head; 1446b2badf02SMaxime Henrion txp->tx_cb->cb_status = 0; 1447b2badf02SMaxime Henrion txp->tx_cb->byte_count = 0; 14483114fdb4SDavid Greenman if (sc->tx_queued != FXP_CXINT_THRESH - 1) { 1449b2badf02SMaxime Henrion txp->tx_cb->cb_command = 145083e6547dSMaxime Henrion htole16(sc->tx_cmd | FXP_CB_COMMAND_SF | 145183e6547dSMaxime Henrion FXP_CB_COMMAND_S); 14523114fdb4SDavid Greenman } else { 1453b2badf02SMaxime Henrion txp->tx_cb->cb_command = 145483e6547dSMaxime Henrion htole16(sc->tx_cmd | FXP_CB_COMMAND_SF | 145583e6547dSMaxime Henrion FXP_CB_COMMAND_S | FXP_CB_COMMAND_I); 14563114fdb4SDavid Greenman /* 14573bd07cfdSJonathan Lemon * Set a 5 second timer just in case we don't hear 14583bd07cfdSJonathan Lemon * from the card again. 14593114fdb4SDavid Greenman */ 14603114fdb4SDavid Greenman ifp->if_timer = 5; 14613114fdb4SDavid Greenman } 1462b2badf02SMaxime Henrion txp->tx_cb->tx_threshold = tx_threshold; 1463a17c678eSDavid Greenman 1464a17c678eSDavid Greenman /* 1465483b9871SDavid Greenman * Advance the end of list forward. 1466a17c678eSDavid Greenman */ 146706175228SAndrew Gallatin 146850d81222SMaxime Henrion #ifdef __alpha__ 146906175228SAndrew Gallatin /* 147006175228SAndrew Gallatin * On platforms which can't access memory in 16-bit 147106175228SAndrew Gallatin * granularities, we must prevent the card from DMA'ing 147206175228SAndrew Gallatin * up the status while we update the command field. 147306175228SAndrew Gallatin * This could cause us to overwrite the completion status. 147414fd1071SMaxime Henrion * XXX This is probably bogus and we're _not_ looking 147514fd1071SMaxime Henrion * for atomicity here. 147606175228SAndrew Gallatin */ 147714fd1071SMaxime Henrion atomic_clear_16(&sc->fxp_desc.tx_last->tx_cb->cb_command, 1478bafb64afSMaxime Henrion htole16(FXP_CB_COMMAND_S)); 147950d81222SMaxime Henrion #else 1480bafb64afSMaxime Henrion sc->fxp_desc.tx_last->tx_cb->cb_command &= 1481bafb64afSMaxime Henrion htole16(~FXP_CB_COMMAND_S); 148250d81222SMaxime Henrion #endif /*__alpha__*/ 1483b2badf02SMaxime Henrion sc->fxp_desc.tx_last = txp; 1484a17c678eSDavid Greenman 1485a17c678eSDavid Greenman /* 14861cd443acSDavid Greenman * Advance the beginning of the list forward if there are 1487b2badf02SMaxime Henrion * no other packets queued (when nothing is queued, tx_first 1488483b9871SDavid Greenman * sits on the last TxCB that was sent out). 1489a17c678eSDavid Greenman */ 14901cd443acSDavid Greenman if (sc->tx_queued == 0) 1491b2badf02SMaxime Henrion sc->fxp_desc.tx_first = txp; 1492a17c678eSDavid Greenman 14931cd443acSDavid Greenman sc->tx_queued++; 14941cd443acSDavid Greenman 1495a17c678eSDavid Greenman /* 1496a17c678eSDavid Greenman * Pass packet to bpf if there is a listener. 1497a17c678eSDavid Greenman */ 1498673d9191SSam Leffler BPF_MTAP(ifp, mb_head); 1499483b9871SDavid Greenman } 1500b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 1501483b9871SDavid Greenman 1502483b9871SDavid Greenman /* 1503483b9871SDavid Greenman * We're finished. If we added to the list, issue a RESUME to get DMA 1504483b9871SDavid Greenman * going again if suspended. 1505483b9871SDavid Greenman */ 1506483b9871SDavid Greenman if (txp != NULL) { 1507483b9871SDavid Greenman fxp_scb_wait(sc); 15082e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_RESUME); 1509483b9871SDavid Greenman } 1510a17c678eSDavid Greenman } 1511a17c678eSDavid Greenman 1512e4fc250cSLuigi Rizzo #ifdef DEVICE_POLLING 1513e4fc250cSLuigi Rizzo static poll_handler_t fxp_poll; 1514e4fc250cSLuigi Rizzo 1515e4fc250cSLuigi Rizzo static void 1516e4fc250cSLuigi Rizzo fxp_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) 1517e4fc250cSLuigi Rizzo { 1518e4fc250cSLuigi Rizzo struct fxp_softc *sc = ifp->if_softc; 1519e4fc250cSLuigi Rizzo u_int8_t statack; 1520e4fc250cSLuigi Rizzo 15214953bccaSNate Lawson FXP_LOCK(sc); 1522e4fc250cSLuigi Rizzo if (cmd == POLL_DEREGISTER) { /* final call, enable interrupts */ 1523e4fc250cSLuigi Rizzo CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, 0); 15244953bccaSNate Lawson FXP_UNLOCK(sc); 1525e4fc250cSLuigi Rizzo return; 1526e4fc250cSLuigi Rizzo } 1527e4fc250cSLuigi Rizzo statack = FXP_SCB_STATACK_CXTNO | FXP_SCB_STATACK_CNA | 1528e4fc250cSLuigi Rizzo FXP_SCB_STATACK_FR; 1529e4fc250cSLuigi Rizzo if (cmd == POLL_AND_CHECK_STATUS) { 1530e4fc250cSLuigi Rizzo u_int8_t tmp; 15316481f301SPeter Wemm 1532e4fc250cSLuigi Rizzo tmp = CSR_READ_1(sc, FXP_CSR_SCB_STATACK); 15334953bccaSNate Lawson if (tmp == 0xff || tmp == 0) { 15344953bccaSNate Lawson FXP_UNLOCK(sc); 1535e4fc250cSLuigi Rizzo return; /* nothing to do */ 15364953bccaSNate Lawson } 1537e4fc250cSLuigi Rizzo tmp &= ~statack; 1538e4fc250cSLuigi Rizzo /* ack what we can */ 1539e4fc250cSLuigi Rizzo if (tmp != 0) 1540e4fc250cSLuigi Rizzo CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, tmp); 1541e4fc250cSLuigi Rizzo statack |= tmp; 1542e4fc250cSLuigi Rizzo } 15434953bccaSNate Lawson fxp_intr_body(sc, ifp, statack, count); 15444953bccaSNate Lawson FXP_UNLOCK(sc); 1545e4fc250cSLuigi Rizzo } 1546e4fc250cSLuigi Rizzo #endif /* DEVICE_POLLING */ 1547e4fc250cSLuigi Rizzo 1548a17c678eSDavid Greenman /* 15499c7d2607SDavid Greenman * Process interface interrupts. 1550a17c678eSDavid Greenman */ 155194927790SDavid Greenman static void 1552f7788e8eSJonathan Lemon fxp_intr(void *xsc) 1553a17c678eSDavid Greenman { 1554f7788e8eSJonathan Lemon struct fxp_softc *sc = xsc; 15554953bccaSNate Lawson struct ifnet *ifp = &sc->sc_if; 15561cd443acSDavid Greenman u_int8_t statack; 15570f4dc94cSChuck Paterson 15584953bccaSNate Lawson FXP_LOCK(sc); 1559704d1965SWarner Losh if (sc->suspended) { 1560704d1965SWarner Losh FXP_UNLOCK(sc); 1561704d1965SWarner Losh return; 1562704d1965SWarner Losh } 1563704d1965SWarner Losh 1564e4fc250cSLuigi Rizzo #ifdef DEVICE_POLLING 15654953bccaSNate Lawson if (ifp->if_flags & IFF_POLLING) { 15664953bccaSNate Lawson FXP_UNLOCK(sc); 1567e4fc250cSLuigi Rizzo return; 15684953bccaSNate Lawson } 1569e4fc250cSLuigi Rizzo if (ether_poll_register(fxp_poll, ifp)) { 1570e4fc250cSLuigi Rizzo /* disable interrupts */ 1571e4fc250cSLuigi Rizzo CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, FXP_SCB_INTR_DISABLE); 15724953bccaSNate Lawson FXP_UNLOCK(sc); 1573c660bdfaSJohn Baldwin fxp_poll(ifp, 0, 1); 1574e4fc250cSLuigi Rizzo return; 1575e4fc250cSLuigi Rizzo } 1576e4fc250cSLuigi Rizzo #endif 1577b184b38eSDavid Greenman while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) { 1578a17c678eSDavid Greenman /* 157911457bbfSJonathan Lemon * It should not be possible to have all bits set; the 158011457bbfSJonathan Lemon * FXP_SCB_INTR_SWI bit always returns 0 on a read. If 158111457bbfSJonathan Lemon * all bits are set, this may indicate that the card has 158211457bbfSJonathan Lemon * been physically ejected, so ignore it. 158311457bbfSJonathan Lemon */ 15844953bccaSNate Lawson if (statack == 0xff) { 15854953bccaSNate Lawson FXP_UNLOCK(sc); 158611457bbfSJonathan Lemon return; 15874953bccaSNate Lawson } 158811457bbfSJonathan Lemon 158911457bbfSJonathan Lemon /* 1590a17c678eSDavid Greenman * First ACK all the interrupts in this pass. 1591a17c678eSDavid Greenman */ 1592ba8c6fd5SDavid Greenman CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack); 15934953bccaSNate Lawson fxp_intr_body(sc, ifp, statack, -1); 1594e4fc250cSLuigi Rizzo } 15954953bccaSNate Lawson FXP_UNLOCK(sc); 1596e4fc250cSLuigi Rizzo } 1597e4fc250cSLuigi Rizzo 1598e4fc250cSLuigi Rizzo static void 1599b2badf02SMaxime Henrion fxp_txeof(struct fxp_softc *sc) 1600b2badf02SMaxime Henrion { 1601b2badf02SMaxime Henrion struct fxp_tx *txp; 1602b2badf02SMaxime Henrion 1603b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREREAD); 1604b2badf02SMaxime Henrion for (txp = sc->fxp_desc.tx_first; sc->tx_queued && 160583e6547dSMaxime Henrion (le16toh(txp->tx_cb->cb_status) & FXP_CB_STATUS_C) != 0; 1606b2badf02SMaxime Henrion txp = txp->tx_next) { 1607b2badf02SMaxime Henrion if (txp->tx_mbuf != NULL) { 1608b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, txp->tx_map, 1609b2badf02SMaxime Henrion BUS_DMASYNC_POSTWRITE); 1610b2badf02SMaxime Henrion bus_dmamap_unload(sc->fxp_mtag, txp->tx_map); 1611b2badf02SMaxime Henrion m_freem(txp->tx_mbuf); 1612b2badf02SMaxime Henrion txp->tx_mbuf = NULL; 1613b2badf02SMaxime Henrion /* clear this to reset csum offload bits */ 1614b2badf02SMaxime Henrion txp->tx_cb->tbd[0].tb_addr = 0; 1615b2badf02SMaxime Henrion } 1616b2badf02SMaxime Henrion sc->tx_queued--; 1617b2badf02SMaxime Henrion } 1618b2badf02SMaxime Henrion sc->fxp_desc.tx_first = txp; 1619b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 1620b2badf02SMaxime Henrion } 1621b2badf02SMaxime Henrion 1622b2badf02SMaxime Henrion static void 16234953bccaSNate Lawson fxp_intr_body(struct fxp_softc *sc, struct ifnet *ifp, u_int8_t statack, 16244953bccaSNate Lawson int count) 1625e4fc250cSLuigi Rizzo { 16262b5989e9SLuigi Rizzo struct mbuf *m; 1627b2badf02SMaxime Henrion struct fxp_rx *rxp; 16282b5989e9SLuigi Rizzo struct fxp_rfa *rfa; 16292b5989e9SLuigi Rizzo int rnr = (statack & FXP_SCB_STATACK_RNR) ? 1 : 0; 16302b5989e9SLuigi Rizzo 16314953bccaSNate Lawson mtx_assert(&sc->sc_mtx, MA_OWNED); 16322b5989e9SLuigi Rizzo if (rnr) 16332b5989e9SLuigi Rizzo fxp_rnr++; 1634947e3815SIan Dowse #ifdef DEVICE_POLLING 1635947e3815SIan Dowse /* Pick up a deferred RNR condition if `count' ran out last time. */ 1636947e3815SIan Dowse if (sc->flags & FXP_FLAG_DEFERRED_RNR) { 1637947e3815SIan Dowse sc->flags &= ~FXP_FLAG_DEFERRED_RNR; 1638947e3815SIan Dowse rnr = 1; 1639947e3815SIan Dowse } 1640947e3815SIan Dowse #endif 1641a17c678eSDavid Greenman 1642a17c678eSDavid Greenman /* 16433114fdb4SDavid Greenman * Free any finished transmit mbuf chains. 164406936301SBill Paul * 164506936301SBill Paul * Handle the CNA event likt a CXTNO event. It used to 164606936301SBill Paul * be that this event (control unit not ready) was not 164706936301SBill Paul * encountered, but it is now with the SMPng modifications. 164806936301SBill Paul * The exact sequence of events that occur when the interface 164906936301SBill Paul * is brought up are different now, and if this event 165006936301SBill Paul * goes unhandled, the configuration/rxfilter setup sequence 165106936301SBill Paul * can stall for several seconds. The result is that no 165206936301SBill Paul * packets go out onto the wire for about 5 to 10 seconds 165306936301SBill Paul * after the interface is ifconfig'ed for the first time. 16543114fdb4SDavid Greenman */ 165506936301SBill Paul if (statack & (FXP_SCB_STATACK_CXTNO | FXP_SCB_STATACK_CNA)) { 1656b2badf02SMaxime Henrion fxp_txeof(sc); 16573114fdb4SDavid Greenman 165841aa0ba2SLuigi Rizzo ifp->if_timer = 0; 1659e2102ae4SMike Silbersack if (sc->tx_queued == 0) { 16603114fdb4SDavid Greenman if (sc->need_mcsetup) 16613114fdb4SDavid Greenman fxp_mc_setup(sc); 1662e2102ae4SMike Silbersack } 16633114fdb4SDavid Greenman /* 16643114fdb4SDavid Greenman * Try to start more packets transmitting. 16653114fdb4SDavid Greenman */ 16663114fdb4SDavid Greenman if (ifp->if_snd.ifq_head != NULL) 16674953bccaSNate Lawson fxp_start_body(ifp); 16683114fdb4SDavid Greenman } 16692b5989e9SLuigi Rizzo 16702b5989e9SLuigi Rizzo /* 16712b5989e9SLuigi Rizzo * Just return if nothing happened on the receive side. 16722b5989e9SLuigi Rizzo */ 1673947e3815SIan Dowse if (!rnr && (statack & FXP_SCB_STATACK_FR) == 0) 16742b5989e9SLuigi Rizzo return; 16752b5989e9SLuigi Rizzo 16763114fdb4SDavid Greenman /* 1677a17c678eSDavid Greenman * Process receiver interrupts. If a no-resource (RNR) 1678a17c678eSDavid Greenman * condition exists, get whatever packets we can and 1679a17c678eSDavid Greenman * re-start the receiver. 1680947e3815SIan Dowse * 16812b5989e9SLuigi Rizzo * When using polling, we do not process the list to completion, 16822b5989e9SLuigi Rizzo * so when we get an RNR interrupt we must defer the restart 16832b5989e9SLuigi Rizzo * until we hit the last buffer with the C bit set. 16842b5989e9SLuigi Rizzo * If we run out of cycles and rfa_headm has the C bit set, 1685947e3815SIan Dowse * record the pending RNR in the FXP_FLAG_DEFERRED_RNR flag so 1686947e3815SIan Dowse * that the info will be used in the subsequent polling cycle. 1687a17c678eSDavid Greenman */ 16882b5989e9SLuigi Rizzo for (;;) { 1689b2badf02SMaxime Henrion rxp = sc->fxp_desc.rx_head; 1690b2badf02SMaxime Henrion m = rxp->rx_mbuf; 1691ba8c6fd5SDavid Greenman rfa = (struct fxp_rfa *)(m->m_ext.ext_buf + 1692ba8c6fd5SDavid Greenman RFA_ALIGNMENT_FUDGE); 1693b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, rxp->rx_map, 1694b2badf02SMaxime Henrion BUS_DMASYNC_POSTREAD); 1695a17c678eSDavid Greenman 1696e4fc250cSLuigi Rizzo #ifdef DEVICE_POLLING /* loop at most count times if count >=0 */ 1697947e3815SIan Dowse if (count >= 0 && count-- == 0) { 1698947e3815SIan Dowse if (rnr) { 1699947e3815SIan Dowse /* Defer RNR processing until the next time. */ 1700947e3815SIan Dowse sc->flags |= FXP_FLAG_DEFERRED_RNR; 1701947e3815SIan Dowse rnr = 0; 1702947e3815SIan Dowse } 17032b5989e9SLuigi Rizzo break; 1704947e3815SIan Dowse } 17052b5989e9SLuigi Rizzo #endif /* DEVICE_POLLING */ 17062b5989e9SLuigi Rizzo 170783e6547dSMaxime Henrion if ((le16toh(rfa->rfa_status) & FXP_RFA_STATUS_C) == 0) 17082b5989e9SLuigi Rizzo break; 17092b5989e9SLuigi Rizzo 1710dfe61cf1SDavid Greenman /* 1711b2badf02SMaxime Henrion * Advance head forward. 1712dfe61cf1SDavid Greenman */ 1713b2badf02SMaxime Henrion sc->fxp_desc.rx_head = rxp->rx_next; 1714a17c678eSDavid Greenman 1715dfe61cf1SDavid Greenman /* 1716ba8c6fd5SDavid Greenman * Add a new buffer to the receive chain. 1717ba8c6fd5SDavid Greenman * If this fails, the old buffer is recycled 1718ba8c6fd5SDavid Greenman * instead. 1719dfe61cf1SDavid Greenman */ 1720b2badf02SMaxime Henrion if (fxp_add_rfabuf(sc, rxp) == 0) { 1721aed53495SDavid Greenman int total_len; 1722a17c678eSDavid Greenman 1723e8c8b728SJonathan Lemon /* 17242b5989e9SLuigi Rizzo * Fetch packet length (the top 2 bits of 17252b5989e9SLuigi Rizzo * actual_size are flags set by the controller 17262b5989e9SLuigi Rizzo * upon completion), and drop the packet in case 17272b5989e9SLuigi Rizzo * of bogus length or CRC errors. 1728e8c8b728SJonathan Lemon */ 1729bafb64afSMaxime Henrion total_len = le16toh(rfa->actual_size) & 0x3fff; 17302b5989e9SLuigi Rizzo if (total_len < sizeof(struct ether_header) || 17312b5989e9SLuigi Rizzo total_len > MCLBYTES - RFA_ALIGNMENT_FUDGE - 1732b2badf02SMaxime Henrion sc->rfa_size || 173383e6547dSMaxime Henrion le16toh(rfa->rfa_status) & FXP_RFA_STATUS_CRC) { 1734e8c8b728SJonathan Lemon m_freem(m); 17352b5989e9SLuigi Rizzo continue; 1736e8c8b728SJonathan Lemon } 1737920b58e8SBrooks Davis 1738c8bca6dcSBill Paul /* Do IP checksum checking. */ 173983e6547dSMaxime Henrion if (le16toh(rfa->rfa_status) & FXP_RFA_STATUS_PARSE) { 1740c8bca6dcSBill Paul if (rfa->rfax_csum_sts & 1741c8bca6dcSBill Paul FXP_RFDX_CS_IP_CSUM_BIT_VALID) 1742c8bca6dcSBill Paul m->m_pkthdr.csum_flags |= 1743c8bca6dcSBill Paul CSUM_IP_CHECKED; 1744c8bca6dcSBill Paul if (rfa->rfax_csum_sts & 1745c8bca6dcSBill Paul FXP_RFDX_CS_IP_CSUM_VALID) 1746c8bca6dcSBill Paul m->m_pkthdr.csum_flags |= 1747c8bca6dcSBill Paul CSUM_IP_VALID; 1748c8bca6dcSBill Paul if ((rfa->rfax_csum_sts & 1749c8bca6dcSBill Paul FXP_RFDX_CS_TCPUDP_CSUM_BIT_VALID) && 1750c8bca6dcSBill Paul (rfa->rfax_csum_sts & 1751c8bca6dcSBill Paul FXP_RFDX_CS_TCPUDP_CSUM_VALID)) { 1752c8bca6dcSBill Paul m->m_pkthdr.csum_flags |= 1753c8bca6dcSBill Paul CSUM_DATA_VALID|CSUM_PSEUDO_HDR; 1754c8bca6dcSBill Paul m->m_pkthdr.csum_data = 0xffff; 1755c8bca6dcSBill Paul } 1756c8bca6dcSBill Paul } 1757c8bca6dcSBill Paul 17582e2de7f2SArchie Cobbs m->m_pkthdr.len = m->m_len = total_len; 1759673d9191SSam Leffler m->m_pkthdr.rcvif = ifp; 1760673d9191SSam Leffler 176105fb8c3fSNate Lawson /* 176205fb8c3fSNate Lawson * Drop locks before calling if_input() since it 176305fb8c3fSNate Lawson * may re-enter fxp_start() in the netisr case. 176405fb8c3fSNate Lawson * This would result in a lock reversal. Better 176505fb8c3fSNate Lawson * performance might be obtained by chaining all 176605fb8c3fSNate Lawson * packets received, dropping the lock, and then 176705fb8c3fSNate Lawson * calling if_input() on each one. 176805fb8c3fSNate Lawson */ 176905fb8c3fSNate Lawson FXP_UNLOCK(sc); 1770673d9191SSam Leffler (*ifp->if_input)(ifp, m); 177105fb8c3fSNate Lawson FXP_LOCK(sc); 1772a17c678eSDavid Greenman } 1773a17c678eSDavid Greenman } 17742b5989e9SLuigi Rizzo if (rnr) { 1775ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 1776ba8c6fd5SDavid Greenman CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 1777b2badf02SMaxime Henrion sc->fxp_desc.rx_head->rx_addr); 17782e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_RU_START); 1779a17c678eSDavid Greenman } 1780a17c678eSDavid Greenman } 1781a17c678eSDavid Greenman 1782dfe61cf1SDavid Greenman /* 1783dfe61cf1SDavid Greenman * Update packet in/out/collision statistics. The i82557 doesn't 1784dfe61cf1SDavid Greenman * allow you to access these counters without doing a fairly 1785dfe61cf1SDavid Greenman * expensive DMA to get _all_ of the statistics it maintains, so 1786dfe61cf1SDavid Greenman * we do this operation here only once per second. The statistics 1787dfe61cf1SDavid Greenman * counters in the kernel are updated from the previous dump-stats 1788dfe61cf1SDavid Greenman * DMA and then a new dump-stats DMA is started. The on-chip 1789dfe61cf1SDavid Greenman * counters are zeroed when the DMA completes. If we can't start 1790dfe61cf1SDavid Greenman * the DMA immediately, we don't wait - we just prepare to read 1791dfe61cf1SDavid Greenman * them again next time. 1792dfe61cf1SDavid Greenman */ 1793303b270bSEivind Eklund static void 1794f7788e8eSJonathan Lemon fxp_tick(void *xsc) 1795a17c678eSDavid Greenman { 1796f7788e8eSJonathan Lemon struct fxp_softc *sc = xsc; 1797ba8c6fd5SDavid Greenman struct ifnet *ifp = &sc->sc_if; 1798a17c678eSDavid Greenman struct fxp_stats *sp = sc->fxp_stats; 1799f7788e8eSJonathan Lemon int s; 1800a17c678eSDavid Greenman 18014953bccaSNate Lawson FXP_LOCK(sc); 18024953bccaSNate Lawson s = splimp(); 1803b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_stag, sc->fxp_smap, BUS_DMASYNC_POSTREAD); 180483e6547dSMaxime Henrion ifp->if_opackets += le32toh(sp->tx_good); 180583e6547dSMaxime Henrion ifp->if_collisions += le32toh(sp->tx_total_collisions); 1806397f9dfeSDavid Greenman if (sp->rx_good) { 180783e6547dSMaxime Henrion ifp->if_ipackets += le32toh(sp->rx_good); 1808397f9dfeSDavid Greenman sc->rx_idle_secs = 0; 1809397f9dfeSDavid Greenman } else { 1810c8cc6fcaSDavid Greenman /* 1811c8cc6fcaSDavid Greenman * Receiver's been idle for another second. 1812c8cc6fcaSDavid Greenman */ 1813397f9dfeSDavid Greenman sc->rx_idle_secs++; 1814397f9dfeSDavid Greenman } 18153ba65732SDavid Greenman ifp->if_ierrors += 181683e6547dSMaxime Henrion le32toh(sp->rx_crc_errors) + 181783e6547dSMaxime Henrion le32toh(sp->rx_alignment_errors) + 181883e6547dSMaxime Henrion le32toh(sp->rx_rnr_errors) + 181983e6547dSMaxime Henrion le32toh(sp->rx_overrun_errors); 1820a17c678eSDavid Greenman /* 1821f9be9005SDavid Greenman * If any transmit underruns occured, bump up the transmit 1822f9be9005SDavid Greenman * threshold by another 512 bytes (64 * 8). 1823f9be9005SDavid Greenman */ 1824f9be9005SDavid Greenman if (sp->tx_underruns) { 182583e6547dSMaxime Henrion ifp->if_oerrors += le32toh(sp->tx_underruns); 1826f9be9005SDavid Greenman if (tx_threshold < 192) 1827f9be9005SDavid Greenman tx_threshold += 64; 1828f9be9005SDavid Greenman } 18294953bccaSNate Lawson 1830397f9dfeSDavid Greenman /* 1831c8cc6fcaSDavid Greenman * Release any xmit buffers that have completed DMA. This isn't 1832c8cc6fcaSDavid Greenman * strictly necessary to do here, but it's advantagous for mbufs 1833c8cc6fcaSDavid Greenman * with external storage to be released in a timely manner rather 1834c8cc6fcaSDavid Greenman * than being defered for a potentially long time. This limits 1835c8cc6fcaSDavid Greenman * the delay to a maximum of one second. 1836c8cc6fcaSDavid Greenman */ 1837b2badf02SMaxime Henrion fxp_txeof(sc); 1838b2badf02SMaxime Henrion 1839c8cc6fcaSDavid Greenman /* 1840397f9dfeSDavid Greenman * If we haven't received any packets in FXP_MAC_RX_IDLE seconds, 1841397f9dfeSDavid Greenman * then assume the receiver has locked up and attempt to clear 1842397f9dfeSDavid Greenman * the condition by reprogramming the multicast filter. This is 1843397f9dfeSDavid Greenman * a work-around for a bug in the 82557 where the receiver locks 1844397f9dfeSDavid Greenman * up if it gets certain types of garbage in the syncronization 1845397f9dfeSDavid Greenman * bits prior to the packet header. This bug is supposed to only 1846397f9dfeSDavid Greenman * occur in 10Mbps mode, but has been seen to occur in 100Mbps 1847397f9dfeSDavid Greenman * mode as well (perhaps due to a 10/100 speed transition). 1848397f9dfeSDavid Greenman */ 1849397f9dfeSDavid Greenman if (sc->rx_idle_secs > FXP_MAX_RX_IDLE) { 1850397f9dfeSDavid Greenman sc->rx_idle_secs = 0; 1851397f9dfeSDavid Greenman fxp_mc_setup(sc); 1852397f9dfeSDavid Greenman } 1853f9be9005SDavid Greenman /* 18543ba65732SDavid Greenman * If there is no pending command, start another stats 18553ba65732SDavid Greenman * dump. Otherwise punt for now. 1856a17c678eSDavid Greenman */ 1857397f9dfeSDavid Greenman if (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) == 0) { 1858a17c678eSDavid Greenman /* 1859397f9dfeSDavid Greenman * Start another stats dump. 1860a17c678eSDavid Greenman */ 1861b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_stag, sc->fxp_smap, 1862b2badf02SMaxime Henrion BUS_DMASYNC_PREREAD); 18632e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_DUMPRESET); 1864dfe61cf1SDavid Greenman } else { 1865dfe61cf1SDavid Greenman /* 1866dfe61cf1SDavid Greenman * A previous command is still waiting to be accepted. 1867dfe61cf1SDavid Greenman * Just zero our copy of the stats and wait for the 18683ba65732SDavid Greenman * next timer event to update them. 1869dfe61cf1SDavid Greenman */ 1870dfe61cf1SDavid Greenman sp->tx_good = 0; 1871f9be9005SDavid Greenman sp->tx_underruns = 0; 1872dfe61cf1SDavid Greenman sp->tx_total_collisions = 0; 18733ba65732SDavid Greenman 1874dfe61cf1SDavid Greenman sp->rx_good = 0; 18753ba65732SDavid Greenman sp->rx_crc_errors = 0; 18763ba65732SDavid Greenman sp->rx_alignment_errors = 0; 18773ba65732SDavid Greenman sp->rx_rnr_errors = 0; 18783ba65732SDavid Greenman sp->rx_overrun_errors = 0; 1879dfe61cf1SDavid Greenman } 1880f7788e8eSJonathan Lemon if (sc->miibus != NULL) 1881f7788e8eSJonathan Lemon mii_tick(device_get_softc(sc->miibus)); 18824953bccaSNate Lawson 1883a17c678eSDavid Greenman /* 1884a17c678eSDavid Greenman * Schedule another timeout one second from now. 1885a17c678eSDavid Greenman */ 188645276e4aSSam Leffler callout_reset(&sc->stat_ch, hz, fxp_tick, sc); 18874953bccaSNate Lawson FXP_UNLOCK(sc); 18884953bccaSNate Lawson splx(s); 1889a17c678eSDavid Greenman } 1890a17c678eSDavid Greenman 1891a17c678eSDavid Greenman /* 1892a17c678eSDavid Greenman * Stop the interface. Cancels the statistics updater and resets 1893a17c678eSDavid Greenman * the interface. 1894a17c678eSDavid Greenman */ 1895a17c678eSDavid Greenman static void 1896f7788e8eSJonathan Lemon fxp_stop(struct fxp_softc *sc) 1897a17c678eSDavid Greenman { 1898ba8c6fd5SDavid Greenman struct ifnet *ifp = &sc->sc_if; 1899b2badf02SMaxime Henrion struct fxp_tx *txp; 19003ba65732SDavid Greenman int i; 1901a17c678eSDavid Greenman 19027dced78aSDavid Greenman ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 19037dced78aSDavid Greenman ifp->if_timer = 0; 19047dced78aSDavid Greenman 1905e4fc250cSLuigi Rizzo #ifdef DEVICE_POLLING 1906e4fc250cSLuigi Rizzo ether_poll_deregister(ifp); 1907e4fc250cSLuigi Rizzo #endif 1908a17c678eSDavid Greenman /* 1909a17c678eSDavid Greenman * Cancel stats updater. 1910a17c678eSDavid Greenman */ 191145276e4aSSam Leffler callout_stop(&sc->stat_ch); 19123ba65732SDavid Greenman 19133ba65732SDavid Greenman /* 191472a32a26SJonathan Lemon * Issue software reset, which also unloads the microcode. 19153ba65732SDavid Greenman */ 191672a32a26SJonathan Lemon sc->flags &= ~FXP_FLAG_UCODE; 191709882363SJonathan Lemon CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SOFTWARE_RESET); 191872a32a26SJonathan Lemon DELAY(50); 1919a17c678eSDavid Greenman 19203ba65732SDavid Greenman /* 19213ba65732SDavid Greenman * Release any xmit buffers. 19223ba65732SDavid Greenman */ 1923b2badf02SMaxime Henrion txp = sc->fxp_desc.tx_list; 1924da91462dSDavid Greenman if (txp != NULL) { 1925da91462dSDavid Greenman for (i = 0; i < FXP_NTXCB; i++) { 1926b2badf02SMaxime Henrion if (txp[i].tx_mbuf != NULL) { 1927b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, txp[i].tx_map, 1928b2badf02SMaxime Henrion BUS_DMASYNC_POSTWRITE); 1929b2badf02SMaxime Henrion bus_dmamap_unload(sc->fxp_mtag, txp[i].tx_map); 1930b2badf02SMaxime Henrion m_freem(txp[i].tx_mbuf); 1931b2badf02SMaxime Henrion txp[i].tx_mbuf = NULL; 1932c8bca6dcSBill Paul /* clear this to reset csum offload bits */ 1933b2badf02SMaxime Henrion txp[i].tx_cb->tbd[0].tb_addr = 0; 1934da91462dSDavid Greenman } 1935da91462dSDavid Greenman } 19363ba65732SDavid Greenman } 1937b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 19383ba65732SDavid Greenman sc->tx_queued = 0; 1939a17c678eSDavid Greenman } 1940a17c678eSDavid Greenman 1941a17c678eSDavid Greenman /* 1942a17c678eSDavid Greenman * Watchdog/transmission transmit timeout handler. Called when a 1943a17c678eSDavid Greenman * transmission is started on the interface, but no interrupt is 1944a17c678eSDavid Greenman * received before the timeout. This usually indicates that the 1945a17c678eSDavid Greenman * card has wedged for some reason. 1946a17c678eSDavid Greenman */ 1947a17c678eSDavid Greenman static void 1948f7788e8eSJonathan Lemon fxp_watchdog(struct ifnet *ifp) 1949a17c678eSDavid Greenman { 1950ba8c6fd5SDavid Greenman struct fxp_softc *sc = ifp->if_softc; 1951ba8c6fd5SDavid Greenman 19524953bccaSNate Lawson FXP_LOCK(sc); 1953f7788e8eSJonathan Lemon device_printf(sc->dev, "device timeout\n"); 19544a5f1499SDavid Greenman ifp->if_oerrors++; 1955a17c678eSDavid Greenman 19564953bccaSNate Lawson fxp_init_body(sc); 19574953bccaSNate Lawson FXP_UNLOCK(sc); 1958a17c678eSDavid Greenman } 1959a17c678eSDavid Greenman 19604953bccaSNate Lawson /* 19614953bccaSNate Lawson * Acquire locks and then call the real initialization function. This 19624953bccaSNate Lawson * is necessary because ether_ioctl() calls if_init() and this would 19634953bccaSNate Lawson * result in mutex recursion if the mutex was held. 19644953bccaSNate Lawson */ 1965a17c678eSDavid Greenman static void 1966f7788e8eSJonathan Lemon fxp_init(void *xsc) 1967a17c678eSDavid Greenman { 1968fb583156SDavid Greenman struct fxp_softc *sc = xsc; 19694953bccaSNate Lawson 19704953bccaSNate Lawson FXP_LOCK(sc); 19714953bccaSNate Lawson fxp_init_body(sc); 19724953bccaSNate Lawson FXP_UNLOCK(sc); 19734953bccaSNate Lawson } 19744953bccaSNate Lawson 19754953bccaSNate Lawson /* 19764953bccaSNate Lawson * Perform device initialization. This routine must be called with the 19774953bccaSNate Lawson * softc lock held. 19784953bccaSNate Lawson */ 19794953bccaSNate Lawson static void 19804953bccaSNate Lawson fxp_init_body(struct fxp_softc *sc) 19814953bccaSNate Lawson { 1982ba8c6fd5SDavid Greenman struct ifnet *ifp = &sc->sc_if; 1983a17c678eSDavid Greenman struct fxp_cb_config *cbp; 1984a17c678eSDavid Greenman struct fxp_cb_ias *cb_ias; 1985b2badf02SMaxime Henrion struct fxp_cb_tx *tcbp; 1986b2badf02SMaxime Henrion struct fxp_tx *txp; 198709882363SJonathan Lemon struct fxp_cb_mcs *mcsp; 1988f7788e8eSJonathan Lemon int i, prm, s; 1989a17c678eSDavid Greenman 19904953bccaSNate Lawson mtx_assert(&sc->sc_mtx, MA_OWNED); 1991f7788e8eSJonathan Lemon s = splimp(); 1992a17c678eSDavid Greenman /* 19933ba65732SDavid Greenman * Cancel any pending I/O 1994a17c678eSDavid Greenman */ 19953ba65732SDavid Greenman fxp_stop(sc); 1996a17c678eSDavid Greenman 1997a17c678eSDavid Greenman prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0; 1998a17c678eSDavid Greenman 1999a17c678eSDavid Greenman /* 2000a17c678eSDavid Greenman * Initialize base of CBL and RFA memory. Loading with zero 2001a17c678eSDavid Greenman * sets it up for regular linear addressing. 2002a17c678eSDavid Greenman */ 2003ba8c6fd5SDavid Greenman CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0); 20042e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_BASE); 2005a17c678eSDavid Greenman 2006ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 20072e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_RU_BASE); 2008a17c678eSDavid Greenman 2009a17c678eSDavid Greenman /* 2010a17c678eSDavid Greenman * Initialize base of dump-stats buffer. 2011a17c678eSDavid Greenman */ 2012ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 2013b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_stag, sc->fxp_smap, BUS_DMASYNC_PREREAD); 2014b2badf02SMaxime Henrion CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->stats_addr); 20152e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_DUMP_ADR); 2016a17c678eSDavid Greenman 2017a17c678eSDavid Greenman /* 201872a32a26SJonathan Lemon * Attempt to load microcode if requested. 201972a32a26SJonathan Lemon */ 202072a32a26SJonathan Lemon if (ifp->if_flags & IFF_LINK0 && (sc->flags & FXP_FLAG_UCODE) == 0) 202172a32a26SJonathan Lemon fxp_load_ucode(sc); 202272a32a26SJonathan Lemon 202372a32a26SJonathan Lemon /* 202409882363SJonathan Lemon * Initialize the multicast address list. 202509882363SJonathan Lemon */ 202609882363SJonathan Lemon if (fxp_mc_addrs(sc)) { 202709882363SJonathan Lemon mcsp = sc->mcsp; 202809882363SJonathan Lemon mcsp->cb_status = 0; 202983e6547dSMaxime Henrion mcsp->cb_command = 203083e6547dSMaxime Henrion htole16(FXP_CB_COMMAND_MCAS | FXP_CB_COMMAND_EL); 203183e6547dSMaxime Henrion mcsp->link_addr = 0xffffffff; 203209882363SJonathan Lemon /* 203309882363SJonathan Lemon * Start the multicast setup command. 203409882363SJonathan Lemon */ 203509882363SJonathan Lemon fxp_scb_wait(sc); 2036b2badf02SMaxime Henrion bus_dmamap_sync(sc->mcs_tag, sc->mcs_map, BUS_DMASYNC_PREWRITE); 2037b2badf02SMaxime Henrion CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->mcs_addr); 203809882363SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); 203909882363SJonathan Lemon /* ...and wait for it to complete. */ 2040209b07bcSMaxime Henrion fxp_dma_wait(sc, &mcsp->cb_status, sc->mcs_tag, sc->mcs_map); 2041b2badf02SMaxime Henrion bus_dmamap_sync(sc->mcs_tag, sc->mcs_map, 2042b2badf02SMaxime Henrion BUS_DMASYNC_POSTWRITE); 204309882363SJonathan Lemon } 204409882363SJonathan Lemon 204509882363SJonathan Lemon /* 2046a17c678eSDavid Greenman * We temporarily use memory that contains the TxCB list to 2047a17c678eSDavid Greenman * construct the config CB. The TxCB list memory is rebuilt 2048a17c678eSDavid Greenman * later. 2049a17c678eSDavid Greenman */ 2050b2badf02SMaxime Henrion cbp = (struct fxp_cb_config *)sc->fxp_desc.cbl_list; 2051a17c678eSDavid Greenman 2052a17c678eSDavid Greenman /* 2053a17c678eSDavid Greenman * This bcopy is kind of disgusting, but there are a bunch of must be 2054a17c678eSDavid Greenman * zero and must be one bits in this structure and this is the easiest 2055a17c678eSDavid Greenman * way to initialize them all to proper values. 2056a17c678eSDavid Greenman */ 2057b2badf02SMaxime Henrion bcopy(fxp_cb_config_template, cbp, sizeof(fxp_cb_config_template)); 2058a17c678eSDavid Greenman 2059a17c678eSDavid Greenman cbp->cb_status = 0; 206083e6547dSMaxime Henrion cbp->cb_command = htole16(FXP_CB_COMMAND_CONFIG | 206183e6547dSMaxime Henrion FXP_CB_COMMAND_EL); 206283e6547dSMaxime Henrion cbp->link_addr = 0xffffffff; /* (no) next command */ 20632c6c0947SMaxime Henrion cbp->byte_count = sc->flags & FXP_FLAG_EXT_RFA ? 32 : 22; 2064001696daSDavid Greenman cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */ 2065001696daSDavid Greenman cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */ 2066a17c678eSDavid Greenman cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */ 2067f7788e8eSJonathan Lemon cbp->mwi_enable = sc->flags & FXP_FLAG_MWI_ENABLE ? 1 : 0; 2068f7788e8eSJonathan Lemon cbp->type_enable = 0; /* actually reserved */ 2069f7788e8eSJonathan Lemon cbp->read_align_en = sc->flags & FXP_FLAG_READ_ALIGN ? 1 : 0; 2070f7788e8eSJonathan Lemon cbp->end_wr_on_cl = sc->flags & FXP_FLAG_WRITE_ALIGN ? 1 : 0; 2071001696daSDavid Greenman cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */ 2072001696daSDavid Greenman cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */ 2073f7788e8eSJonathan Lemon cbp->dma_mbce = 0; /* (disable) dma max counters */ 2074a17c678eSDavid Greenman cbp->late_scb = 0; /* (don't) defer SCB update */ 2075f7788e8eSJonathan Lemon cbp->direct_dma_dis = 1; /* disable direct rcv dma mode */ 2076f7788e8eSJonathan Lemon cbp->tno_int_or_tco_en =0; /* (disable) tx not okay interrupt */ 20773114fdb4SDavid Greenman cbp->ci_int = 1; /* interrupt on CU idle */ 2078f7788e8eSJonathan Lemon cbp->ext_txcb_dis = sc->flags & FXP_FLAG_EXT_TXCB ? 0 : 1; 2079f7788e8eSJonathan Lemon cbp->ext_stats_dis = 1; /* disable extended counters */ 2080f7788e8eSJonathan Lemon cbp->keep_overrun_rx = 0; /* don't pass overrun frames to host */ 208172a32a26SJonathan Lemon cbp->save_bf = sc->revision == FXP_REV_82557 ? 1 : prm; 2082a17c678eSDavid Greenman cbp->disc_short_rx = !prm; /* discard short packets */ 2083f7788e8eSJonathan Lemon cbp->underrun_retry = 1; /* retry mode (once) on DMA underrun */ 2084f7788e8eSJonathan Lemon cbp->two_frames = 0; /* do not limit FIFO to 2 frames */ 2085f7788e8eSJonathan Lemon cbp->dyn_tbd = 0; /* (no) dynamic TBD mode */ 2086c8bca6dcSBill Paul cbp->ext_rfa = sc->flags & FXP_FLAG_EXT_RFA ? 1 : 0; 2087f7788e8eSJonathan Lemon cbp->mediatype = sc->flags & FXP_FLAG_SERIAL_MEDIA ? 0 : 1; 2088f7788e8eSJonathan Lemon cbp->csma_dis = 0; /* (don't) disable link */ 2089f7788e8eSJonathan Lemon cbp->tcp_udp_cksum = 0; /* (don't) enable checksum */ 2090f7788e8eSJonathan Lemon cbp->vlan_tco = 0; /* (don't) enable vlan wakeup */ 2091f7788e8eSJonathan Lemon cbp->link_wake_en = 0; /* (don't) assert PME# on link change */ 2092f7788e8eSJonathan Lemon cbp->arp_wake_en = 0; /* (don't) assert PME# on arp */ 2093f7788e8eSJonathan Lemon cbp->mc_wake_en = 0; /* (don't) enable PME# on mcmatch */ 2094a17c678eSDavid Greenman cbp->nsai = 1; /* (don't) disable source addr insert */ 2095a17c678eSDavid Greenman cbp->preamble_length = 2; /* (7 byte) preamble */ 2096a17c678eSDavid Greenman cbp->loopback = 0; /* (don't) loopback */ 2097a17c678eSDavid Greenman cbp->linear_priority = 0; /* (normal CSMA/CD operation) */ 2098a17c678eSDavid Greenman cbp->linear_pri_mode = 0; /* (wait after xmit only) */ 2099a17c678eSDavid Greenman cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */ 2100a17c678eSDavid Greenman cbp->promiscuous = prm; /* promiscuous mode */ 2101a17c678eSDavid Greenman cbp->bcast_disable = 0; /* (don't) disable broadcasts */ 2102f7788e8eSJonathan Lemon cbp->wait_after_win = 0; /* (don't) enable modified backoff alg*/ 2103f7788e8eSJonathan Lemon cbp->ignore_ul = 0; /* consider U/L bit in IA matching */ 2104f7788e8eSJonathan Lemon cbp->crc16_en = 0; /* (don't) enable crc-16 algorithm */ 2105f7788e8eSJonathan Lemon cbp->crscdt = sc->flags & FXP_FLAG_SERIAL_MEDIA ? 1 : 0; 2106f7788e8eSJonathan Lemon 2107a17c678eSDavid Greenman cbp->stripping = !prm; /* truncate rx packet to byte count */ 2108a17c678eSDavid Greenman cbp->padding = 1; /* (do) pad short tx packets */ 2109a17c678eSDavid Greenman cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */ 2110f7788e8eSJonathan Lemon cbp->long_rx_en = sc->flags & FXP_FLAG_LONG_PKT_EN ? 1 : 0; 2111f7788e8eSJonathan Lemon cbp->ia_wake_en = 0; /* (don't) wake up on address match */ 2112f7788e8eSJonathan Lemon cbp->magic_pkt_dis = 0; /* (don't) disable magic packet */ 2113f7788e8eSJonathan Lemon /* must set wake_en in PMCSR also */ 2114a17c678eSDavid Greenman cbp->force_fdx = 0; /* (don't) force full duplex */ 21153ba65732SDavid Greenman cbp->fdx_pin_en = 1; /* (enable) FDX# pin */ 2116a17c678eSDavid Greenman cbp->multi_ia = 0; /* (don't) accept multiple IAs */ 2117f7788e8eSJonathan Lemon cbp->mc_all = sc->flags & FXP_FLAG_ALL_MCAST ? 1 : 0; 2118c8bca6dcSBill Paul cbp->gamla_rx = sc->flags & FXP_FLAG_EXT_RFA ? 1 : 0; 2119a17c678eSDavid Greenman 212098b27888SRobert Watson if (fxp_noflow || sc->revision == FXP_REV_82557) { 21213bd07cfdSJonathan Lemon /* 21223bd07cfdSJonathan Lemon * The 82557 has no hardware flow control, the values 21233bd07cfdSJonathan Lemon * below are the defaults for the chip. 21243bd07cfdSJonathan Lemon */ 21253bd07cfdSJonathan Lemon cbp->fc_delay_lsb = 0; 21263bd07cfdSJonathan Lemon cbp->fc_delay_msb = 0x40; 21273bd07cfdSJonathan Lemon cbp->pri_fc_thresh = 3; 21283bd07cfdSJonathan Lemon cbp->tx_fc_dis = 0; 21293bd07cfdSJonathan Lemon cbp->rx_fc_restop = 0; 21303bd07cfdSJonathan Lemon cbp->rx_fc_restart = 0; 21313bd07cfdSJonathan Lemon cbp->fc_filter = 0; 21323bd07cfdSJonathan Lemon cbp->pri_fc_loc = 1; 21333bd07cfdSJonathan Lemon } else { 21343bd07cfdSJonathan Lemon cbp->fc_delay_lsb = 0x1f; 21353bd07cfdSJonathan Lemon cbp->fc_delay_msb = 0x01; 21363bd07cfdSJonathan Lemon cbp->pri_fc_thresh = 3; 21373bd07cfdSJonathan Lemon cbp->tx_fc_dis = 0; /* enable transmit FC */ 21383bd07cfdSJonathan Lemon cbp->rx_fc_restop = 1; /* enable FC restop frames */ 21393bd07cfdSJonathan Lemon cbp->rx_fc_restart = 1; /* enable FC restart frames */ 21403bd07cfdSJonathan Lemon cbp->fc_filter = !prm; /* drop FC frames to host */ 21413bd07cfdSJonathan Lemon cbp->pri_fc_loc = 1; /* FC pri location (byte31) */ 21423bd07cfdSJonathan Lemon } 21433bd07cfdSJonathan Lemon 2144a17c678eSDavid Greenman /* 2145a17c678eSDavid Greenman * Start the config command/DMA. 2146a17c678eSDavid Greenman */ 2147ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 2148b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 2149b2badf02SMaxime Henrion CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->fxp_desc.cbl_addr); 21502e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); 2151a17c678eSDavid Greenman /* ...and wait for it to complete. */ 2152209b07bcSMaxime Henrion fxp_dma_wait(sc, &cbp->cb_status, sc->cbl_tag, sc->cbl_map); 2153b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_POSTWRITE); 2154a17c678eSDavid Greenman 2155a17c678eSDavid Greenman /* 2156a17c678eSDavid Greenman * Now initialize the station address. Temporarily use the TxCB 2157a17c678eSDavid Greenman * memory area like we did above for the config CB. 2158a17c678eSDavid Greenman */ 2159b2badf02SMaxime Henrion cb_ias = (struct fxp_cb_ias *)sc->fxp_desc.cbl_list; 2160a17c678eSDavid Greenman cb_ias->cb_status = 0; 216183e6547dSMaxime Henrion cb_ias->cb_command = htole16(FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL); 216283e6547dSMaxime Henrion cb_ias->link_addr = 0xffffffff; 2163e609b4d7SMaxime Henrion bcopy(sc->arpcom.ac_enaddr, cb_ias->macaddr, 2164a17c678eSDavid Greenman sizeof(sc->arpcom.ac_enaddr)); 2165a17c678eSDavid Greenman 2166a17c678eSDavid Greenman /* 2167a17c678eSDavid Greenman * Start the IAS (Individual Address Setup) command/DMA. 2168a17c678eSDavid Greenman */ 2169ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 2170b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 21712e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); 2172a17c678eSDavid Greenman /* ...and wait for it to complete. */ 2173209b07bcSMaxime Henrion fxp_dma_wait(sc, &cb_ias->cb_status, sc->cbl_tag, sc->cbl_map); 2174b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_POSTWRITE); 2175a17c678eSDavid Greenman 2176a17c678eSDavid Greenman /* 2177a17c678eSDavid Greenman * Initialize transmit control block (TxCB) list. 2178a17c678eSDavid Greenman */ 2179b2badf02SMaxime Henrion txp = sc->fxp_desc.tx_list; 2180b2badf02SMaxime Henrion tcbp = sc->fxp_desc.cbl_list; 2181b2badf02SMaxime Henrion bzero(tcbp, FXP_TXCB_SZ); 2182a17c678eSDavid Greenman for (i = 0; i < FXP_NTXCB; i++) { 2183b2badf02SMaxime Henrion txp[i].tx_cb = tcbp + i; 2184b2badf02SMaxime Henrion txp[i].tx_mbuf = NULL; 218583e6547dSMaxime Henrion tcbp[i].cb_status = htole16(FXP_CB_STATUS_C | FXP_CB_STATUS_OK); 218683e6547dSMaxime Henrion tcbp[i].cb_command = htole16(FXP_CB_COMMAND_NOP); 218783e6547dSMaxime Henrion tcbp[i].link_addr = htole32(sc->fxp_desc.cbl_addr + 218883e6547dSMaxime Henrion (((i + 1) & FXP_TXCB_MASK) * sizeof(struct fxp_cb_tx))); 21893bd07cfdSJonathan Lemon if (sc->flags & FXP_FLAG_EXT_TXCB) 2190b2badf02SMaxime Henrion tcbp[i].tbd_array_addr = 219183e6547dSMaxime Henrion htole32(FXP_TXCB_DMA_ADDR(sc, &tcbp[i].tbd[2])); 21923bd07cfdSJonathan Lemon else 2193b2badf02SMaxime Henrion tcbp[i].tbd_array_addr = 219483e6547dSMaxime Henrion htole32(FXP_TXCB_DMA_ADDR(sc, &tcbp[i].tbd[0])); 2195b2badf02SMaxime Henrion txp[i].tx_next = &txp[(i + 1) & FXP_TXCB_MASK]; 2196a17c678eSDavid Greenman } 2197a17c678eSDavid Greenman /* 2198397f9dfeSDavid Greenman * Set the suspend flag on the first TxCB and start the control 2199a17c678eSDavid Greenman * unit. It will execute the NOP and then suspend. 2200a17c678eSDavid Greenman */ 220183e6547dSMaxime Henrion tcbp->cb_command = htole16(FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S); 2202b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 2203b2badf02SMaxime Henrion sc->fxp_desc.tx_first = sc->fxp_desc.tx_last = txp; 2204397f9dfeSDavid Greenman sc->tx_queued = 1; 2205a17c678eSDavid Greenman 2206ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 22072e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); 2208a17c678eSDavid Greenman 2209a17c678eSDavid Greenman /* 2210a17c678eSDavid Greenman * Initialize receiver buffer area - RFA. 2211a17c678eSDavid Greenman */ 2212ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 2213b2badf02SMaxime Henrion CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->fxp_desc.rx_head->rx_addr); 22142e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_RU_START); 2215a17c678eSDavid Greenman 2216dccee1a1SDavid Greenman /* 2217ba8c6fd5SDavid Greenman * Set current media. 2218dccee1a1SDavid Greenman */ 2219f7788e8eSJonathan Lemon if (sc->miibus != NULL) 2220f7788e8eSJonathan Lemon mii_mediachg(device_get_softc(sc->miibus)); 2221dccee1a1SDavid Greenman 2222a17c678eSDavid Greenman ifp->if_flags |= IFF_RUNNING; 2223a17c678eSDavid Greenman ifp->if_flags &= ~IFF_OACTIVE; 2224e8c8b728SJonathan Lemon 2225e8c8b728SJonathan Lemon /* 2226e8c8b728SJonathan Lemon * Enable interrupts. 2227e8c8b728SJonathan Lemon */ 22282b5989e9SLuigi Rizzo #ifdef DEVICE_POLLING 22292b5989e9SLuigi Rizzo /* 22302b5989e9SLuigi Rizzo * ... but only do that if we are not polling. And because (presumably) 22312b5989e9SLuigi Rizzo * the default is interrupts on, we need to disable them explicitly! 22322b5989e9SLuigi Rizzo */ 223362f76486SMaxim Sobolev if ( ifp->if_flags & IFF_POLLING ) 22342b5989e9SLuigi Rizzo CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, FXP_SCB_INTR_DISABLE); 22352b5989e9SLuigi Rizzo else 22362b5989e9SLuigi Rizzo #endif /* DEVICE_POLLING */ 2237e8c8b728SJonathan Lemon CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, 0); 2238a17c678eSDavid Greenman 2239a17c678eSDavid Greenman /* 2240a17c678eSDavid Greenman * Start stats updater. 2241a17c678eSDavid Greenman */ 224245276e4aSSam Leffler callout_reset(&sc->stat_ch, hz, fxp_tick, sc); 22434953bccaSNate Lawson splx(s); 2244f7788e8eSJonathan Lemon } 2245f7788e8eSJonathan Lemon 2246f7788e8eSJonathan Lemon static int 2247f7788e8eSJonathan Lemon fxp_serial_ifmedia_upd(struct ifnet *ifp) 2248f7788e8eSJonathan Lemon { 2249f7788e8eSJonathan Lemon 2250f7788e8eSJonathan Lemon return (0); 2251a17c678eSDavid Greenman } 2252a17c678eSDavid Greenman 2253303b270bSEivind Eklund static void 2254f7788e8eSJonathan Lemon fxp_serial_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 2255ba8c6fd5SDavid Greenman { 2256ba8c6fd5SDavid Greenman 2257f7788e8eSJonathan Lemon ifmr->ifm_active = IFM_ETHER|IFM_MANUAL; 2258ba8c6fd5SDavid Greenman } 2259ba8c6fd5SDavid Greenman 2260ba8c6fd5SDavid Greenman /* 2261ba8c6fd5SDavid Greenman * Change media according to request. 2262ba8c6fd5SDavid Greenman */ 2263f7788e8eSJonathan Lemon static int 2264f7788e8eSJonathan Lemon fxp_ifmedia_upd(struct ifnet *ifp) 2265ba8c6fd5SDavid Greenman { 2266ba8c6fd5SDavid Greenman struct fxp_softc *sc = ifp->if_softc; 2267f7788e8eSJonathan Lemon struct mii_data *mii; 2268ba8c6fd5SDavid Greenman 2269f7788e8eSJonathan Lemon mii = device_get_softc(sc->miibus); 2270f7788e8eSJonathan Lemon mii_mediachg(mii); 2271ba8c6fd5SDavid Greenman return (0); 2272ba8c6fd5SDavid Greenman } 2273ba8c6fd5SDavid Greenman 2274ba8c6fd5SDavid Greenman /* 2275ba8c6fd5SDavid Greenman * Notify the world which media we're using. 2276ba8c6fd5SDavid Greenman */ 2277f7788e8eSJonathan Lemon static void 2278f7788e8eSJonathan Lemon fxp_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 2279ba8c6fd5SDavid Greenman { 2280ba8c6fd5SDavid Greenman struct fxp_softc *sc = ifp->if_softc; 2281f7788e8eSJonathan Lemon struct mii_data *mii; 2282ba8c6fd5SDavid Greenman 2283f7788e8eSJonathan Lemon mii = device_get_softc(sc->miibus); 2284f7788e8eSJonathan Lemon mii_pollstat(mii); 2285f7788e8eSJonathan Lemon ifmr->ifm_active = mii->mii_media_active; 2286f7788e8eSJonathan Lemon ifmr->ifm_status = mii->mii_media_status; 22872e2b8238SJonathan Lemon 22882e2b8238SJonathan Lemon if (ifmr->ifm_status & IFM_10_T && sc->flags & FXP_FLAG_CU_RESUME_BUG) 22892e2b8238SJonathan Lemon sc->cu_resume_bug = 1; 22902e2b8238SJonathan Lemon else 22912e2b8238SJonathan Lemon sc->cu_resume_bug = 0; 2292ba8c6fd5SDavid Greenman } 2293ba8c6fd5SDavid Greenman 2294a17c678eSDavid Greenman /* 2295a17c678eSDavid Greenman * Add a buffer to the end of the RFA buffer list. 2296a17c678eSDavid Greenman * Return 0 if successful, 1 for failure. A failure results in 2297a17c678eSDavid Greenman * adding the 'oldm' (if non-NULL) on to the end of the list - 2298dc733423SDag-Erling Smørgrav * tossing out its old contents and recycling it. 2299a17c678eSDavid Greenman * The RFA struct is stuck at the beginning of mbuf cluster and the 2300a17c678eSDavid Greenman * data pointer is fixed up to point just past it. 2301a17c678eSDavid Greenman */ 2302a17c678eSDavid Greenman static int 2303b2badf02SMaxime Henrion fxp_add_rfabuf(struct fxp_softc *sc, struct fxp_rx *rxp) 2304a17c678eSDavid Greenman { 2305a17c678eSDavid Greenman struct mbuf *m; 2306a17c678eSDavid Greenman struct fxp_rfa *rfa, *p_rfa; 2307b2badf02SMaxime Henrion struct fxp_rx *p_rx; 2308b2badf02SMaxime Henrion bus_dmamap_t tmp_map; 2309b2badf02SMaxime Henrion int error; 2310a17c678eSDavid Greenman 2311a163d034SWarner Losh m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 2312b2badf02SMaxime Henrion if (m == NULL) 2313b2badf02SMaxime Henrion return (ENOBUFS); 2314ba8c6fd5SDavid Greenman 2315ba8c6fd5SDavid Greenman /* 2316ba8c6fd5SDavid Greenman * Move the data pointer up so that the incoming data packet 2317ba8c6fd5SDavid Greenman * will be 32-bit aligned. 2318ba8c6fd5SDavid Greenman */ 2319ba8c6fd5SDavid Greenman m->m_data += RFA_ALIGNMENT_FUDGE; 2320ba8c6fd5SDavid Greenman 2321eadd5e3aSDavid Greenman /* 2322eadd5e3aSDavid Greenman * Get a pointer to the base of the mbuf cluster and move 2323eadd5e3aSDavid Greenman * data start past it. 2324eadd5e3aSDavid Greenman */ 2325a17c678eSDavid Greenman rfa = mtod(m, struct fxp_rfa *); 2326c8bca6dcSBill Paul m->m_data += sc->rfa_size; 232783e6547dSMaxime Henrion rfa->size = htole16(MCLBYTES - sc->rfa_size - RFA_ALIGNMENT_FUDGE); 2328eadd5e3aSDavid Greenman 2329a17c678eSDavid Greenman rfa->rfa_status = 0; 233083e6547dSMaxime Henrion rfa->rfa_control = htole16(FXP_RFA_CONTROL_EL); 2331a17c678eSDavid Greenman rfa->actual_size = 0; 2332ba8c6fd5SDavid Greenman 233328935f27SMaxime Henrion /* 233428935f27SMaxime Henrion * Initialize the rest of the RFA. Note that since the RFA 233528935f27SMaxime Henrion * is misaligned, we cannot store values directly. We're thus 233628935f27SMaxime Henrion * using the le32enc() function which handles endianness and 233728935f27SMaxime Henrion * is also alignment-safe. 233828935f27SMaxime Henrion */ 233983e6547dSMaxime Henrion le32enc(&rfa->link_addr, 0xffffffff); 234083e6547dSMaxime Henrion le32enc(&rfa->rbd_addr, 0xffffffff); 2341ba8c6fd5SDavid Greenman 2342b2badf02SMaxime Henrion /* Map the RFA into DMA memory. */ 2343b2badf02SMaxime Henrion error = bus_dmamap_load(sc->fxp_mtag, sc->spare_map, rfa, 2344b2badf02SMaxime Henrion MCLBYTES - RFA_ALIGNMENT_FUDGE, fxp_dma_map_addr, 2345b2badf02SMaxime Henrion &rxp->rx_addr, 0); 2346b2badf02SMaxime Henrion if (error) { 2347b2badf02SMaxime Henrion m_freem(m); 2348b2badf02SMaxime Henrion return (error); 2349b2badf02SMaxime Henrion } 2350b2badf02SMaxime Henrion 2351b2badf02SMaxime Henrion bus_dmamap_unload(sc->fxp_mtag, rxp->rx_map); 2352b2badf02SMaxime Henrion tmp_map = sc->spare_map; 2353b2badf02SMaxime Henrion sc->spare_map = rxp->rx_map; 2354b2badf02SMaxime Henrion rxp->rx_map = tmp_map; 2355b2badf02SMaxime Henrion rxp->rx_mbuf = m; 2356b2badf02SMaxime Henrion 2357b983c7b3SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, rxp->rx_map, 2358b983c7b3SMaxime Henrion BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2359b2badf02SMaxime Henrion 2360dfe61cf1SDavid Greenman /* 2361dfe61cf1SDavid Greenman * If there are other buffers already on the list, attach this 2362dfe61cf1SDavid Greenman * one to the end by fixing up the tail to point to this one. 2363dfe61cf1SDavid Greenman */ 2364b2badf02SMaxime Henrion if (sc->fxp_desc.rx_head != NULL) { 2365b2badf02SMaxime Henrion p_rx = sc->fxp_desc.rx_tail; 2366b2badf02SMaxime Henrion p_rfa = (struct fxp_rfa *) 2367b2badf02SMaxime Henrion (p_rx->rx_mbuf->m_ext.ext_buf + RFA_ALIGNMENT_FUDGE); 2368b2badf02SMaxime Henrion p_rx->rx_next = rxp; 236983e6547dSMaxime Henrion le32enc(&p_rfa->link_addr, rxp->rx_addr); 2370aed53495SDavid Greenman p_rfa->rfa_control = 0; 2371b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, p_rx->rx_map, 23724cec1653SMaxime Henrion BUS_DMASYNC_PREWRITE); 2373a17c678eSDavid Greenman } else { 2374b2badf02SMaxime Henrion rxp->rx_next = NULL; 2375b2badf02SMaxime Henrion sc->fxp_desc.rx_head = rxp; 2376a17c678eSDavid Greenman } 2377b2badf02SMaxime Henrion sc->fxp_desc.rx_tail = rxp; 2378b2badf02SMaxime Henrion return (0); 2379a17c678eSDavid Greenman } 2380a17c678eSDavid Greenman 23816ebc3153SDavid Greenman static volatile int 2382f7788e8eSJonathan Lemon fxp_miibus_readreg(device_t dev, int phy, int reg) 2383dccee1a1SDavid Greenman { 2384f7788e8eSJonathan Lemon struct fxp_softc *sc = device_get_softc(dev); 2385dccee1a1SDavid Greenman int count = 10000; 23866ebc3153SDavid Greenman int value; 2387dccee1a1SDavid Greenman 2388ba8c6fd5SDavid Greenman CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 2389ba8c6fd5SDavid Greenman (FXP_MDI_READ << 26) | (reg << 16) | (phy << 21)); 2390dccee1a1SDavid Greenman 2391ba8c6fd5SDavid Greenman while (((value = CSR_READ_4(sc, FXP_CSR_MDICONTROL)) & 0x10000000) == 0 2392ba8c6fd5SDavid Greenman && count--) 23936ebc3153SDavid Greenman DELAY(10); 2394dccee1a1SDavid Greenman 2395dccee1a1SDavid Greenman if (count <= 0) 2396f7788e8eSJonathan Lemon device_printf(dev, "fxp_miibus_readreg: timed out\n"); 2397dccee1a1SDavid Greenman 23986ebc3153SDavid Greenman return (value & 0xffff); 2399dccee1a1SDavid Greenman } 2400dccee1a1SDavid Greenman 2401dccee1a1SDavid Greenman static void 2402f7788e8eSJonathan Lemon fxp_miibus_writereg(device_t dev, int phy, int reg, int value) 2403dccee1a1SDavid Greenman { 2404f7788e8eSJonathan Lemon struct fxp_softc *sc = device_get_softc(dev); 2405dccee1a1SDavid Greenman int count = 10000; 2406dccee1a1SDavid Greenman 2407ba8c6fd5SDavid Greenman CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 2408ba8c6fd5SDavid Greenman (FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21) | 2409ba8c6fd5SDavid Greenman (value & 0xffff)); 2410dccee1a1SDavid Greenman 2411ba8c6fd5SDavid Greenman while ((CSR_READ_4(sc, FXP_CSR_MDICONTROL) & 0x10000000) == 0 && 2412ba8c6fd5SDavid Greenman count--) 24136ebc3153SDavid Greenman DELAY(10); 2414dccee1a1SDavid Greenman 2415dccee1a1SDavid Greenman if (count <= 0) 2416f7788e8eSJonathan Lemon device_printf(dev, "fxp_miibus_writereg: timed out\n"); 2417dccee1a1SDavid Greenman } 2418dccee1a1SDavid Greenman 2419dccee1a1SDavid Greenman static int 2420f7788e8eSJonathan Lemon fxp_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 2421a17c678eSDavid Greenman { 24229b44ff22SGarrett Wollman struct fxp_softc *sc = ifp->if_softc; 2423a17c678eSDavid Greenman struct ifreq *ifr = (struct ifreq *)data; 2424f7788e8eSJonathan Lemon struct mii_data *mii; 2425f7788e8eSJonathan Lemon int s, error = 0; 2426a17c678eSDavid Greenman 2427704d1965SWarner Losh /* 2428704d1965SWarner Losh * Detaching causes us to call ioctl with the mutex owned. Preclude 2429704d1965SWarner Losh * that by saying we're busy if the lock is already held. 2430704d1965SWarner Losh */ 2431704d1965SWarner Losh if (mtx_owned(&sc->sc_mtx)) 2432704d1965SWarner Losh return (EBUSY); 243332cd7a9cSWarner Losh 24344953bccaSNate Lawson FXP_LOCK(sc); 2435f7788e8eSJonathan Lemon s = splimp(); 2436a17c678eSDavid Greenman 2437a17c678eSDavid Greenman switch (command) { 2438a17c678eSDavid Greenman case SIOCSIFFLAGS: 2439f7788e8eSJonathan Lemon if (ifp->if_flags & IFF_ALLMULTI) 2440f7788e8eSJonathan Lemon sc->flags |= FXP_FLAG_ALL_MCAST; 2441f7788e8eSJonathan Lemon else 2442f7788e8eSJonathan Lemon sc->flags &= ~FXP_FLAG_ALL_MCAST; 2443a17c678eSDavid Greenman 2444a17c678eSDavid Greenman /* 2445a17c678eSDavid Greenman * If interface is marked up and not running, then start it. 2446a17c678eSDavid Greenman * If it is marked down and running, stop it. 2447a17c678eSDavid Greenman * XXX If it's up then re-initialize it. This is so flags 2448a17c678eSDavid Greenman * such as IFF_PROMISC are handled. 2449a17c678eSDavid Greenman */ 2450a17c678eSDavid Greenman if (ifp->if_flags & IFF_UP) { 24514953bccaSNate Lawson fxp_init_body(sc); 2452a17c678eSDavid Greenman } else { 2453a17c678eSDavid Greenman if (ifp->if_flags & IFF_RUNNING) 24544a5f1499SDavid Greenman fxp_stop(sc); 2455a17c678eSDavid Greenman } 2456a17c678eSDavid Greenman break; 2457a17c678eSDavid Greenman 2458a17c678eSDavid Greenman case SIOCADDMULTI: 2459a17c678eSDavid Greenman case SIOCDELMULTI: 2460f7788e8eSJonathan Lemon if (ifp->if_flags & IFF_ALLMULTI) 2461f7788e8eSJonathan Lemon sc->flags |= FXP_FLAG_ALL_MCAST; 2462f7788e8eSJonathan Lemon else 2463f7788e8eSJonathan Lemon sc->flags &= ~FXP_FLAG_ALL_MCAST; 2464a17c678eSDavid Greenman /* 2465a17c678eSDavid Greenman * Multicast list has changed; set the hardware filter 2466a17c678eSDavid Greenman * accordingly. 2467a17c678eSDavid Greenman */ 2468f7788e8eSJonathan Lemon if ((sc->flags & FXP_FLAG_ALL_MCAST) == 0) 2469397f9dfeSDavid Greenman fxp_mc_setup(sc); 2470397f9dfeSDavid Greenman /* 2471f7788e8eSJonathan Lemon * fxp_mc_setup() can set FXP_FLAG_ALL_MCAST, so check it 2472397f9dfeSDavid Greenman * again rather than else {}. 2473397f9dfeSDavid Greenman */ 2474f7788e8eSJonathan Lemon if (sc->flags & FXP_FLAG_ALL_MCAST) 24754953bccaSNate Lawson fxp_init_body(sc); 2476a17c678eSDavid Greenman error = 0; 2477ba8c6fd5SDavid Greenman break; 2478ba8c6fd5SDavid Greenman 2479ba8c6fd5SDavid Greenman case SIOCSIFMEDIA: 2480ba8c6fd5SDavid Greenman case SIOCGIFMEDIA: 2481f7788e8eSJonathan Lemon if (sc->miibus != NULL) { 2482f7788e8eSJonathan Lemon mii = device_get_softc(sc->miibus); 2483f7788e8eSJonathan Lemon error = ifmedia_ioctl(ifp, ifr, 2484f7788e8eSJonathan Lemon &mii->mii_media, command); 2485f7788e8eSJonathan Lemon } else { 2486ba8c6fd5SDavid Greenman error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, command); 2487f7788e8eSJonathan Lemon } 2488a17c678eSDavid Greenman break; 2489a17c678eSDavid Greenman 2490a17c678eSDavid Greenman default: 24914953bccaSNate Lawson /* 24924953bccaSNate Lawson * ether_ioctl() will eventually call fxp_start() which 24934953bccaSNate Lawson * will result in mutex recursion so drop it first. 24944953bccaSNate Lawson */ 24954953bccaSNate Lawson FXP_UNLOCK(sc); 2496673d9191SSam Leffler error = ether_ioctl(ifp, command, data); 2497a17c678eSDavid Greenman } 24984953bccaSNate Lawson if (mtx_owned(&sc->sc_mtx)) 24994953bccaSNate Lawson FXP_UNLOCK(sc); 2500f7788e8eSJonathan Lemon splx(s); 2501a17c678eSDavid Greenman return (error); 2502a17c678eSDavid Greenman } 2503397f9dfeSDavid Greenman 2504397f9dfeSDavid Greenman /* 250509882363SJonathan Lemon * Fill in the multicast address list and return number of entries. 250609882363SJonathan Lemon */ 250709882363SJonathan Lemon static int 250809882363SJonathan Lemon fxp_mc_addrs(struct fxp_softc *sc) 250909882363SJonathan Lemon { 251009882363SJonathan Lemon struct fxp_cb_mcs *mcsp = sc->mcsp; 251109882363SJonathan Lemon struct ifnet *ifp = &sc->sc_if; 251209882363SJonathan Lemon struct ifmultiaddr *ifma; 251309882363SJonathan Lemon int nmcasts; 251409882363SJonathan Lemon 251509882363SJonathan Lemon nmcasts = 0; 251609882363SJonathan Lemon if ((sc->flags & FXP_FLAG_ALL_MCAST) == 0) { 251709882363SJonathan Lemon #if __FreeBSD_version < 500000 251809882363SJonathan Lemon LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 251909882363SJonathan Lemon #else 252009882363SJonathan Lemon TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 252109882363SJonathan Lemon #endif 252209882363SJonathan Lemon if (ifma->ifma_addr->sa_family != AF_LINK) 252309882363SJonathan Lemon continue; 252409882363SJonathan Lemon if (nmcasts >= MAXMCADDR) { 252509882363SJonathan Lemon sc->flags |= FXP_FLAG_ALL_MCAST; 252609882363SJonathan Lemon nmcasts = 0; 252709882363SJonathan Lemon break; 252809882363SJonathan Lemon } 252909882363SJonathan Lemon bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 2530bafb64afSMaxime Henrion &sc->mcsp->mc_addr[nmcasts][0], ETHER_ADDR_LEN); 253109882363SJonathan Lemon nmcasts++; 253209882363SJonathan Lemon } 253309882363SJonathan Lemon } 2534bafb64afSMaxime Henrion mcsp->mc_cnt = htole16(nmcasts * ETHER_ADDR_LEN); 253509882363SJonathan Lemon return (nmcasts); 253609882363SJonathan Lemon } 253709882363SJonathan Lemon 253809882363SJonathan Lemon /* 2539397f9dfeSDavid Greenman * Program the multicast filter. 2540397f9dfeSDavid Greenman * 2541397f9dfeSDavid Greenman * We have an artificial restriction that the multicast setup command 2542397f9dfeSDavid Greenman * must be the first command in the chain, so we take steps to ensure 25433114fdb4SDavid Greenman * this. By requiring this, it allows us to keep up the performance of 2544397f9dfeSDavid Greenman * the pre-initialized command ring (esp. link pointers) by not actually 2545dc733423SDag-Erling Smørgrav * inserting the mcsetup command in the ring - i.e. its link pointer 2546397f9dfeSDavid Greenman * points to the TxCB ring, but the mcsetup descriptor itself is not part 2547397f9dfeSDavid Greenman * of it. We then can do 'CU_START' on the mcsetup descriptor and have it 2548397f9dfeSDavid Greenman * lead into the regular TxCB ring when it completes. 2549397f9dfeSDavid Greenman * 2550397f9dfeSDavid Greenman * This function must be called at splimp. 2551397f9dfeSDavid Greenman */ 2552397f9dfeSDavid Greenman static void 2553f7788e8eSJonathan Lemon fxp_mc_setup(struct fxp_softc *sc) 2554397f9dfeSDavid Greenman { 2555397f9dfeSDavid Greenman struct fxp_cb_mcs *mcsp = sc->mcsp; 2556397f9dfeSDavid Greenman struct ifnet *ifp = &sc->sc_if; 2557b2badf02SMaxime Henrion struct fxp_tx *txp; 25587dced78aSDavid Greenman int count; 2559397f9dfeSDavid Greenman 25603114fdb4SDavid Greenman /* 25613114fdb4SDavid Greenman * If there are queued commands, we must wait until they are all 25623114fdb4SDavid Greenman * completed. If we are already waiting, then add a NOP command 25633114fdb4SDavid Greenman * with interrupt option so that we're notified when all commands 25643114fdb4SDavid Greenman * have been completed - fxp_start() ensures that no additional 25653114fdb4SDavid Greenman * TX commands will be added when need_mcsetup is true. 25663114fdb4SDavid Greenman */ 2567397f9dfeSDavid Greenman if (sc->tx_queued) { 25683114fdb4SDavid Greenman /* 25693114fdb4SDavid Greenman * need_mcsetup will be true if we are already waiting for the 25703114fdb4SDavid Greenman * NOP command to be completed (see below). In this case, bail. 25713114fdb4SDavid Greenman */ 25723114fdb4SDavid Greenman if (sc->need_mcsetup) 25733114fdb4SDavid Greenman return; 2574397f9dfeSDavid Greenman sc->need_mcsetup = 1; 25753114fdb4SDavid Greenman 25763114fdb4SDavid Greenman /* 257772a32a26SJonathan Lemon * Add a NOP command with interrupt so that we are notified 257872a32a26SJonathan Lemon * when all TX commands have been processed. 25793114fdb4SDavid Greenman */ 2580b2badf02SMaxime Henrion txp = sc->fxp_desc.tx_last->tx_next; 2581b2badf02SMaxime Henrion txp->tx_mbuf = NULL; 2582b2badf02SMaxime Henrion txp->tx_cb->cb_status = 0; 258383e6547dSMaxime Henrion txp->tx_cb->cb_command = htole16(FXP_CB_COMMAND_NOP | 258483e6547dSMaxime Henrion FXP_CB_COMMAND_S | FXP_CB_COMMAND_I); 25853114fdb4SDavid Greenman /* 25863114fdb4SDavid Greenman * Advance the end of list forward. 25873114fdb4SDavid Greenman */ 258883e6547dSMaxime Henrion sc->fxp_desc.tx_last->tx_cb->cb_command &= 258983e6547dSMaxime Henrion htole16(~FXP_CB_COMMAND_S); 25905f361cbeSMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 2591b2badf02SMaxime Henrion sc->fxp_desc.tx_last = txp; 25923114fdb4SDavid Greenman sc->tx_queued++; 25933114fdb4SDavid Greenman /* 25943114fdb4SDavid Greenman * Issue a resume in case the CU has just suspended. 25953114fdb4SDavid Greenman */ 25963114fdb4SDavid Greenman fxp_scb_wait(sc); 25972e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_RESUME); 25983114fdb4SDavid Greenman /* 25993114fdb4SDavid Greenman * Set a 5 second timer just in case we don't hear from the 26003114fdb4SDavid Greenman * card again. 26013114fdb4SDavid Greenman */ 26023114fdb4SDavid Greenman ifp->if_timer = 5; 26033114fdb4SDavid Greenman 2604397f9dfeSDavid Greenman return; 2605397f9dfeSDavid Greenman } 2606397f9dfeSDavid Greenman sc->need_mcsetup = 0; 2607397f9dfeSDavid Greenman 2608397f9dfeSDavid Greenman /* 2609397f9dfeSDavid Greenman * Initialize multicast setup descriptor. 2610397f9dfeSDavid Greenman */ 2611397f9dfeSDavid Greenman mcsp->cb_status = 0; 261283e6547dSMaxime Henrion mcsp->cb_command = htole16(FXP_CB_COMMAND_MCAS | 261383e6547dSMaxime Henrion FXP_CB_COMMAND_S | FXP_CB_COMMAND_I); 261483e6547dSMaxime Henrion mcsp->link_addr = htole32(sc->fxp_desc.cbl_addr); 2615b2badf02SMaxime Henrion txp = &sc->fxp_desc.mcs_tx; 2616b2badf02SMaxime Henrion txp->tx_mbuf = NULL; 2617b2badf02SMaxime Henrion txp->tx_cb = (struct fxp_cb_tx *)sc->mcsp; 2618b2badf02SMaxime Henrion txp->tx_next = sc->fxp_desc.tx_list; 261909882363SJonathan Lemon (void) fxp_mc_addrs(sc); 2620b2badf02SMaxime Henrion sc->fxp_desc.tx_first = sc->fxp_desc.tx_last = txp; 2621397f9dfeSDavid Greenman sc->tx_queued = 1; 2622397f9dfeSDavid Greenman 2623397f9dfeSDavid Greenman /* 2624397f9dfeSDavid Greenman * Wait until command unit is not active. This should never 2625397f9dfeSDavid Greenman * be the case when nothing is queued, but make sure anyway. 2626397f9dfeSDavid Greenman */ 26277dced78aSDavid Greenman count = 100; 2628397f9dfeSDavid Greenman while ((CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS) >> 6) == 26297dced78aSDavid Greenman FXP_SCB_CUS_ACTIVE && --count) 26307dced78aSDavid Greenman DELAY(10); 26317dced78aSDavid Greenman if (count == 0) { 2632f7788e8eSJonathan Lemon device_printf(sc->dev, "command queue timeout\n"); 26337dced78aSDavid Greenman return; 26347dced78aSDavid Greenman } 2635397f9dfeSDavid Greenman 2636397f9dfeSDavid Greenman /* 2637397f9dfeSDavid Greenman * Start the multicast setup command. 2638397f9dfeSDavid Greenman */ 2639397f9dfeSDavid Greenman fxp_scb_wait(sc); 2640b2badf02SMaxime Henrion bus_dmamap_sync(sc->mcs_tag, sc->mcs_map, BUS_DMASYNC_PREWRITE); 2641b2badf02SMaxime Henrion CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->mcs_addr); 26422e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); 2643397f9dfeSDavid Greenman 26443114fdb4SDavid Greenman ifp->if_timer = 2; 2645397f9dfeSDavid Greenman return; 2646397f9dfeSDavid Greenman } 264772a32a26SJonathan Lemon 264872a32a26SJonathan Lemon static u_int32_t fxp_ucode_d101a[] = D101_A_RCVBUNDLE_UCODE; 264972a32a26SJonathan Lemon static u_int32_t fxp_ucode_d101b0[] = D101_B0_RCVBUNDLE_UCODE; 265072a32a26SJonathan Lemon static u_int32_t fxp_ucode_d101ma[] = D101M_B_RCVBUNDLE_UCODE; 265172a32a26SJonathan Lemon static u_int32_t fxp_ucode_d101s[] = D101S_RCVBUNDLE_UCODE; 265272a32a26SJonathan Lemon static u_int32_t fxp_ucode_d102[] = D102_B_RCVBUNDLE_UCODE; 265372a32a26SJonathan Lemon static u_int32_t fxp_ucode_d102c[] = D102_C_RCVBUNDLE_UCODE; 265472a32a26SJonathan Lemon 265572a32a26SJonathan Lemon #define UCODE(x) x, sizeof(x) 265672a32a26SJonathan Lemon 265772a32a26SJonathan Lemon struct ucode { 265872a32a26SJonathan Lemon u_int32_t revision; 265972a32a26SJonathan Lemon u_int32_t *ucode; 266072a32a26SJonathan Lemon int length; 266172a32a26SJonathan Lemon u_short int_delay_offset; 266272a32a26SJonathan Lemon u_short bundle_max_offset; 266372a32a26SJonathan Lemon } ucode_table[] = { 266472a32a26SJonathan Lemon { FXP_REV_82558_A4, UCODE(fxp_ucode_d101a), D101_CPUSAVER_DWORD, 0 }, 266572a32a26SJonathan Lemon { FXP_REV_82558_B0, UCODE(fxp_ucode_d101b0), D101_CPUSAVER_DWORD, 0 }, 266672a32a26SJonathan Lemon { FXP_REV_82559_A0, UCODE(fxp_ucode_d101ma), 266772a32a26SJonathan Lemon D101M_CPUSAVER_DWORD, D101M_CPUSAVER_BUNDLE_MAX_DWORD }, 266872a32a26SJonathan Lemon { FXP_REV_82559S_A, UCODE(fxp_ucode_d101s), 266972a32a26SJonathan Lemon D101S_CPUSAVER_DWORD, D101S_CPUSAVER_BUNDLE_MAX_DWORD }, 267072a32a26SJonathan Lemon { FXP_REV_82550, UCODE(fxp_ucode_d102), 267172a32a26SJonathan Lemon D102_B_CPUSAVER_DWORD, D102_B_CPUSAVER_BUNDLE_MAX_DWORD }, 267272a32a26SJonathan Lemon { FXP_REV_82550_C, UCODE(fxp_ucode_d102c), 267372a32a26SJonathan Lemon D102_C_CPUSAVER_DWORD, D102_C_CPUSAVER_BUNDLE_MAX_DWORD }, 267472a32a26SJonathan Lemon { 0, NULL, 0, 0, 0 } 267572a32a26SJonathan Lemon }; 267672a32a26SJonathan Lemon 267772a32a26SJonathan Lemon static void 267872a32a26SJonathan Lemon fxp_load_ucode(struct fxp_softc *sc) 267972a32a26SJonathan Lemon { 268072a32a26SJonathan Lemon struct ucode *uc; 268172a32a26SJonathan Lemon struct fxp_cb_ucode *cbp; 268272a32a26SJonathan Lemon 268372a32a26SJonathan Lemon for (uc = ucode_table; uc->ucode != NULL; uc++) 268472a32a26SJonathan Lemon if (sc->revision == uc->revision) 268572a32a26SJonathan Lemon break; 268672a32a26SJonathan Lemon if (uc->ucode == NULL) 268772a32a26SJonathan Lemon return; 2688b2badf02SMaxime Henrion cbp = (struct fxp_cb_ucode *)sc->fxp_desc.cbl_list; 268972a32a26SJonathan Lemon cbp->cb_status = 0; 269083e6547dSMaxime Henrion cbp->cb_command = htole16(FXP_CB_COMMAND_UCODE | FXP_CB_COMMAND_EL); 269183e6547dSMaxime Henrion cbp->link_addr = 0xffffffff; /* (no) next command */ 269272a32a26SJonathan Lemon memcpy(cbp->ucode, uc->ucode, uc->length); 269372a32a26SJonathan Lemon if (uc->int_delay_offset) 269483e6547dSMaxime Henrion *(u_int16_t *)&cbp->ucode[uc->int_delay_offset] = 269583e6547dSMaxime Henrion htole16(sc->tunable_int_delay + sc->tunable_int_delay / 2); 269672a32a26SJonathan Lemon if (uc->bundle_max_offset) 269783e6547dSMaxime Henrion *(u_int16_t *)&cbp->ucode[uc->bundle_max_offset] = 269883e6547dSMaxime Henrion htole16(sc->tunable_bundle_max); 269972a32a26SJonathan Lemon /* 270072a32a26SJonathan Lemon * Download the ucode to the chip. 270172a32a26SJonathan Lemon */ 270272a32a26SJonathan Lemon fxp_scb_wait(sc); 2703b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 2704b2badf02SMaxime Henrion CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->fxp_desc.cbl_addr); 270572a32a26SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); 270672a32a26SJonathan Lemon /* ...and wait for it to complete. */ 2707209b07bcSMaxime Henrion fxp_dma_wait(sc, &cbp->cb_status, sc->cbl_tag, sc->cbl_map); 2708b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_POSTWRITE); 270972a32a26SJonathan Lemon device_printf(sc->dev, 271072a32a26SJonathan Lemon "Microcode loaded, int_delay: %d usec bundle_max: %d\n", 271172a32a26SJonathan Lemon sc->tunable_int_delay, 271272a32a26SJonathan Lemon uc->bundle_max_offset == 0 ? 0 : sc->tunable_bundle_max); 271372a32a26SJonathan Lemon sc->flags |= FXP_FLAG_UCODE; 271472a32a26SJonathan Lemon } 271572a32a26SJonathan Lemon 271672a32a26SJonathan Lemon static int 271772a32a26SJonathan Lemon sysctl_int_range(SYSCTL_HANDLER_ARGS, int low, int high) 271872a32a26SJonathan Lemon { 271972a32a26SJonathan Lemon int error, value; 272072a32a26SJonathan Lemon 272172a32a26SJonathan Lemon value = *(int *)arg1; 272272a32a26SJonathan Lemon error = sysctl_handle_int(oidp, &value, 0, req); 272372a32a26SJonathan Lemon if (error || !req->newptr) 272472a32a26SJonathan Lemon return (error); 272572a32a26SJonathan Lemon if (value < low || value > high) 272672a32a26SJonathan Lemon return (EINVAL); 272772a32a26SJonathan Lemon *(int *)arg1 = value; 272872a32a26SJonathan Lemon return (0); 272972a32a26SJonathan Lemon } 273072a32a26SJonathan Lemon 273172a32a26SJonathan Lemon /* 273272a32a26SJonathan Lemon * Interrupt delay is expressed in microseconds, a multiplier is used 273372a32a26SJonathan Lemon * to convert this to the appropriate clock ticks before using. 273472a32a26SJonathan Lemon */ 273572a32a26SJonathan Lemon static int 273672a32a26SJonathan Lemon sysctl_hw_fxp_int_delay(SYSCTL_HANDLER_ARGS) 273772a32a26SJonathan Lemon { 273872a32a26SJonathan Lemon return (sysctl_int_range(oidp, arg1, arg2, req, 300, 3000)); 273972a32a26SJonathan Lemon } 274072a32a26SJonathan Lemon 274172a32a26SJonathan Lemon static int 274272a32a26SJonathan Lemon sysctl_hw_fxp_bundle_max(SYSCTL_HANDLER_ARGS) 274372a32a26SJonathan Lemon { 274472a32a26SJonathan Lemon return (sysctl_int_range(oidp, arg1, arg2, req, 1, 0xffff)); 274572a32a26SJonathan Lemon } 2746