1f7788e8eSJonathan Lemon /*- 2a17c678eSDavid Greenman * Copyright (c) 1995, David Greenman 33bd07cfdSJonathan Lemon * Copyright (c) 2001 Jonathan Lemon <jlemon@freebsd.org> 4a17c678eSDavid Greenman * All rights reserved. 5a17c678eSDavid Greenman * 6a17c678eSDavid Greenman * Redistribution and use in source and binary forms, with or without 7a17c678eSDavid Greenman * modification, are permitted provided that the following conditions 8a17c678eSDavid Greenman * are met: 9a17c678eSDavid Greenman * 1. Redistributions of source code must retain the above copyright 10a17c678eSDavid Greenman * notice unmodified, this list of conditions, and the following 11a17c678eSDavid Greenman * disclaimer. 12a17c678eSDavid Greenman * 2. Redistributions in binary form must reproduce the above copyright 13a17c678eSDavid Greenman * notice, this list of conditions and the following disclaimer in the 14a17c678eSDavid Greenman * documentation and/or other materials provided with the distribution. 15a17c678eSDavid Greenman * 16a17c678eSDavid Greenman * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17a17c678eSDavid Greenman * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18a17c678eSDavid Greenman * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19a17c678eSDavid Greenman * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20a17c678eSDavid Greenman * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21a17c678eSDavid Greenman * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22a17c678eSDavid Greenman * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23a17c678eSDavid Greenman * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24a17c678eSDavid Greenman * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25a17c678eSDavid Greenman * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26a17c678eSDavid Greenman * SUCH DAMAGE. 27a17c678eSDavid Greenman * 28c3aac50fSPeter Wemm * $FreeBSD$ 29a17c678eSDavid Greenman */ 30a17c678eSDavid Greenman 31a17c678eSDavid Greenman /* 32ae12cddaSDavid Greenman * Intel EtherExpress Pro/100B PCI Fast Ethernet driver 33a17c678eSDavid Greenman */ 34a17c678eSDavid Greenman 35a17c678eSDavid Greenman #include <sys/param.h> 36a17c678eSDavid Greenman #include <sys/systm.h> 37a17c678eSDavid Greenman #include <sys/mbuf.h> 38f7788e8eSJonathan Lemon /* #include <sys/mutex.h> */ 39a17c678eSDavid Greenman #include <sys/kernel.h> 404458ac71SBruce Evans #include <sys/socket.h> 4172a32a26SJonathan Lemon #include <sys/sysctl.h> 42a17c678eSDavid Greenman 43a17c678eSDavid Greenman #include <net/if.h> 44397f9dfeSDavid Greenman #include <net/if_dl.h> 45ba8c6fd5SDavid Greenman #include <net/if_media.h> 46a17c678eSDavid Greenman 47a17c678eSDavid Greenman #include <net/bpf.h> 48ba8c6fd5SDavid Greenman #include <sys/sockio.h> 496182fdbdSPeter Wemm #include <sys/bus.h> 506182fdbdSPeter Wemm #include <machine/bus.h> 516182fdbdSPeter Wemm #include <sys/rman.h> 526182fdbdSPeter Wemm #include <machine/resource.h> 53ba8c6fd5SDavid Greenman 541d5e9e22SEivind Eklund #include <net/ethernet.h> 551d5e9e22SEivind Eklund #include <net/if_arp.h> 56ba8c6fd5SDavid Greenman 57f7788e8eSJonathan Lemon #include <machine/clock.h> /* for DELAY */ 58a17c678eSDavid Greenman 59e8c8b728SJonathan Lemon #include <net/if_types.h> 60e8c8b728SJonathan Lemon #include <net/if_vlan_var.h> 61e8c8b728SJonathan Lemon 62c8bca6dcSBill Paul #ifdef FXP_IP_CSUM_WAR 63c8bca6dcSBill Paul #include <netinet/in.h> 64c8bca6dcSBill Paul #include <netinet/in_systm.h> 65c8bca6dcSBill Paul #include <netinet/ip.h> 66c8bca6dcSBill Paul #include <machine/in_cksum.h> 67c8bca6dcSBill Paul #endif 68c8bca6dcSBill Paul 69a17c678eSDavid Greenman #include <pci/pcivar.h> 70df373873SWes Peters #include <pci/pcireg.h> /* for PCIM_CMD_xxx */ 71a17c678eSDavid Greenman 72f7788e8eSJonathan Lemon #include <dev/mii/mii.h> 73f7788e8eSJonathan Lemon #include <dev/mii/miivar.h> 74f7788e8eSJonathan Lemon 75f7788e8eSJonathan Lemon #include <dev/fxp/if_fxpreg.h> 76f7788e8eSJonathan Lemon #include <dev/fxp/if_fxpvar.h> 7772a32a26SJonathan Lemon #include <dev/fxp/rcvbundl.h> 78f7788e8eSJonathan Lemon 79f7788e8eSJonathan Lemon MODULE_DEPEND(fxp, miibus, 1, 1, 1); 80f7788e8eSJonathan Lemon #include "miibus_if.h" 814fc1dda9SAndrew Gallatin 82ba8c6fd5SDavid Greenman /* 83ba8c6fd5SDavid Greenman * NOTE! On the Alpha, we have an alignment constraint. The 84ba8c6fd5SDavid Greenman * card DMAs the packet immediately following the RFA. However, 85ba8c6fd5SDavid Greenman * the first thing in the packet is a 14-byte Ethernet header. 86ba8c6fd5SDavid Greenman * This means that the packet is misaligned. To compensate, 87ba8c6fd5SDavid Greenman * we actually offset the RFA 2 bytes into the cluster. This 88ba8c6fd5SDavid Greenman * alignes the packet after the Ethernet header at a 32-bit 89ba8c6fd5SDavid Greenman * boundary. HOWEVER! This means that the RFA is misaligned! 90ba8c6fd5SDavid Greenman */ 91ba8c6fd5SDavid Greenman #define RFA_ALIGNMENT_FUDGE 2 92ba8c6fd5SDavid Greenman 93ba8c6fd5SDavid Greenman /* 94f7788e8eSJonathan Lemon * Set initial transmit threshold at 64 (512 bytes). This is 95f7788e8eSJonathan Lemon * increased by 64 (512 bytes) at a time, to maximum of 192 96f7788e8eSJonathan Lemon * (1536 bytes), if an underrun occurs. 97f7788e8eSJonathan Lemon */ 98f7788e8eSJonathan Lemon static int tx_threshold = 64; 99f7788e8eSJonathan Lemon 100f7788e8eSJonathan Lemon /* 101f7788e8eSJonathan Lemon * The configuration byte map has several undefined fields which 102f7788e8eSJonathan Lemon * must be one or must be zero. Set up a template for these bits 103f7788e8eSJonathan Lemon * only, (assuming a 82557 chip) leaving the actual configuration 104f7788e8eSJonathan Lemon * to fxp_init. 105f7788e8eSJonathan Lemon * 106f7788e8eSJonathan Lemon * See struct fxp_cb_config for the bit definitions. 107f7788e8eSJonathan Lemon */ 108f7788e8eSJonathan Lemon static u_char fxp_cb_config_template[] = { 109f7788e8eSJonathan Lemon 0x0, 0x0, /* cb_status */ 110f7788e8eSJonathan Lemon 0x0, 0x0, /* cb_command */ 111f7788e8eSJonathan Lemon 0x0, 0x0, 0x0, 0x0, /* link_addr */ 112f7788e8eSJonathan Lemon 0x0, /* 0 */ 113f7788e8eSJonathan Lemon 0x0, /* 1 */ 114f7788e8eSJonathan Lemon 0x0, /* 2 */ 115f7788e8eSJonathan Lemon 0x0, /* 3 */ 116f7788e8eSJonathan Lemon 0x0, /* 4 */ 117f7788e8eSJonathan Lemon 0x0, /* 5 */ 118f7788e8eSJonathan Lemon 0x32, /* 6 */ 119f7788e8eSJonathan Lemon 0x0, /* 7 */ 120f7788e8eSJonathan Lemon 0x0, /* 8 */ 121f7788e8eSJonathan Lemon 0x0, /* 9 */ 122f7788e8eSJonathan Lemon 0x6, /* 10 */ 123f7788e8eSJonathan Lemon 0x0, /* 11 */ 124f7788e8eSJonathan Lemon 0x0, /* 12 */ 125f7788e8eSJonathan Lemon 0x0, /* 13 */ 126f7788e8eSJonathan Lemon 0xf2, /* 14 */ 127f7788e8eSJonathan Lemon 0x48, /* 15 */ 128f7788e8eSJonathan Lemon 0x0, /* 16 */ 129f7788e8eSJonathan Lemon 0x40, /* 17 */ 130f7788e8eSJonathan Lemon 0xf0, /* 18 */ 131f7788e8eSJonathan Lemon 0x0, /* 19 */ 132f7788e8eSJonathan Lemon 0x3f, /* 20 */ 133f7788e8eSJonathan Lemon 0x5 /* 21 */ 134f7788e8eSJonathan Lemon }; 135f7788e8eSJonathan Lemon 136f7788e8eSJonathan Lemon struct fxp_ident { 137f7788e8eSJonathan Lemon u_int16_t devid; 138f7788e8eSJonathan Lemon char *name; 139f7788e8eSJonathan Lemon }; 140f7788e8eSJonathan Lemon 141f7788e8eSJonathan Lemon /* 142f7788e8eSJonathan Lemon * Claim various Intel PCI device identifiers for this driver. The 143f7788e8eSJonathan Lemon * sub-vendor and sub-device field are extensively used to identify 144f7788e8eSJonathan Lemon * particular variants, but we don't currently differentiate between 145f7788e8eSJonathan Lemon * them. 146f7788e8eSJonathan Lemon */ 147f7788e8eSJonathan Lemon static struct fxp_ident fxp_ident_table[] = { 148537b41d5SJohn Polstra { 0x1029, "Intel 82559 PCI/CardBus Pro/100" }, 149537b41d5SJohn Polstra { 0x1030, "Intel 82559 Pro/100 Ethernet" }, 150537b41d5SJohn Polstra { 0x1031, "Intel 82801CAM (ICH3) Pro/100 VE Ethernet" }, 151537b41d5SJohn Polstra { 0x1032, "Intel 82801CAM (ICH3) Pro/100 VE Ethernet" }, 152537b41d5SJohn Polstra { 0x1033, "Intel 82801CAM (ICH3) Pro/100 VM Ethernet" }, 153537b41d5SJohn Polstra { 0x1034, "Intel 82801CAM (ICH3) Pro/100 VM Ethernet" }, 154537b41d5SJohn Polstra { 0x1035, "Intel 82801CAM (ICH3) Pro/100 Ethernet" }, 155537b41d5SJohn Polstra { 0x1036, "Intel 82801CAM (ICH3) Pro/100 Ethernet" }, 156537b41d5SJohn Polstra { 0x1037, "Intel 82801CAM (ICH3) Pro/100 Ethernet" }, 157537b41d5SJohn Polstra { 0x1038, "Intel 82801CAM (ICH3) Pro/100 VM Ethernet" }, 158537b41d5SJohn Polstra { 0x1039, "Intel 82801DB (ICH4) Pro/100 VE Ethernet" }, 159537b41d5SJohn Polstra { 0x103A, "Intel 82801DB (ICH4) Pro/100 Ethernet" }, 160537b41d5SJohn Polstra { 0x103B, "Intel 82801DB (ICH4) Pro/100 VM Ethernet" }, 161537b41d5SJohn Polstra { 0x103C, "Intel 82801DB (ICH4) Pro/100 Ethernet" }, 162537b41d5SJohn Polstra { 0x103D, "Intel 82801DB (ICH4) Pro/100 VE Ethernet" }, 163537b41d5SJohn Polstra { 0x103E, "Intel 82801DB (ICH4) Pro/100 VM Ethernet" }, 164537b41d5SJohn Polstra { 0x1059, "Intel 82551QM Pro/100 M Mobile Connection" }, 165537b41d5SJohn Polstra { 0x1209, "Intel 82559ER Embedded 10/100 Ethernet" }, 166537b41d5SJohn Polstra { 0x1229, "Intel 82557/8/9 EtherExpress Pro/100(B) Ethernet" }, 167537b41d5SJohn Polstra { 0x2449, "Intel 82801BA/CAM (ICH2/3) Pro/100 Ethernet" }, 168f7788e8eSJonathan Lemon { 0, NULL }, 169f7788e8eSJonathan Lemon }; 170f7788e8eSJonathan Lemon 171c8bca6dcSBill Paul #ifdef FXP_IP_CSUM_WAR 172c8bca6dcSBill Paul #define FXP_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP) 173c8bca6dcSBill Paul #else 174c8bca6dcSBill Paul #define FXP_CSUM_FEATURES (CSUM_TCP | CSUM_UDP) 175c8bca6dcSBill Paul #endif 176c8bca6dcSBill Paul 177f7788e8eSJonathan Lemon static int fxp_probe(device_t dev); 178f7788e8eSJonathan Lemon static int fxp_attach(device_t dev); 179f7788e8eSJonathan Lemon static int fxp_detach(device_t dev); 180f7788e8eSJonathan Lemon static int fxp_shutdown(device_t dev); 181f7788e8eSJonathan Lemon static int fxp_suspend(device_t dev); 182f7788e8eSJonathan Lemon static int fxp_resume(device_t dev); 183f7788e8eSJonathan Lemon 184f7788e8eSJonathan Lemon static void fxp_intr(void *xsc); 185f7788e8eSJonathan Lemon static void fxp_init(void *xsc); 186f7788e8eSJonathan Lemon static void fxp_tick(void *xsc); 18748e417ebSJonathan Lemon static void fxp_powerstate_d0(device_t dev); 188f7788e8eSJonathan Lemon static void fxp_start(struct ifnet *ifp); 189f7788e8eSJonathan Lemon static void fxp_stop(struct fxp_softc *sc); 190f7788e8eSJonathan Lemon static void fxp_release(struct fxp_softc *sc); 191f7788e8eSJonathan Lemon static int fxp_ioctl(struct ifnet *ifp, u_long command, 192f7788e8eSJonathan Lemon caddr_t data); 193f7788e8eSJonathan Lemon static void fxp_watchdog(struct ifnet *ifp); 194b2badf02SMaxime Henrion static int fxp_add_rfabuf(struct fxp_softc *sc, 195b2badf02SMaxime Henrion struct fxp_rx *rxp); 19609882363SJonathan Lemon static int fxp_mc_addrs(struct fxp_softc *sc); 197f7788e8eSJonathan Lemon static void fxp_mc_setup(struct fxp_softc *sc); 198f7788e8eSJonathan Lemon static u_int16_t fxp_eeprom_getword(struct fxp_softc *sc, int offset, 199f7788e8eSJonathan Lemon int autosize); 20000c4116bSJonathan Lemon static void fxp_eeprom_putword(struct fxp_softc *sc, int offset, 20100c4116bSJonathan Lemon u_int16_t data); 202f7788e8eSJonathan Lemon static void fxp_autosize_eeprom(struct fxp_softc *sc); 203f7788e8eSJonathan Lemon static void fxp_read_eeprom(struct fxp_softc *sc, u_short *data, 204f7788e8eSJonathan Lemon int offset, int words); 20500c4116bSJonathan Lemon static void fxp_write_eeprom(struct fxp_softc *sc, u_short *data, 20600c4116bSJonathan Lemon int offset, int words); 207f7788e8eSJonathan Lemon static int fxp_ifmedia_upd(struct ifnet *ifp); 208f7788e8eSJonathan Lemon static void fxp_ifmedia_sts(struct ifnet *ifp, 209f7788e8eSJonathan Lemon struct ifmediareq *ifmr); 210f7788e8eSJonathan Lemon static int fxp_serial_ifmedia_upd(struct ifnet *ifp); 211f7788e8eSJonathan Lemon static void fxp_serial_ifmedia_sts(struct ifnet *ifp, 212f7788e8eSJonathan Lemon struct ifmediareq *ifmr); 213f7788e8eSJonathan Lemon static volatile int fxp_miibus_readreg(device_t dev, int phy, int reg); 214f7788e8eSJonathan Lemon static void fxp_miibus_writereg(device_t dev, int phy, int reg, 215f7788e8eSJonathan Lemon int value); 21672a32a26SJonathan Lemon static void fxp_load_ucode(struct fxp_softc *sc); 21772a32a26SJonathan Lemon static int sysctl_int_range(SYSCTL_HANDLER_ARGS, 21872a32a26SJonathan Lemon int low, int high); 21972a32a26SJonathan Lemon static int sysctl_hw_fxp_bundle_max(SYSCTL_HANDLER_ARGS); 22072a32a26SJonathan Lemon static int sysctl_hw_fxp_int_delay(SYSCTL_HANDLER_ARGS); 221f7788e8eSJonathan Lemon static __inline void fxp_lwcopy(volatile u_int32_t *src, 222f7788e8eSJonathan Lemon volatile u_int32_t *dst); 223f7788e8eSJonathan Lemon static __inline void fxp_scb_wait(struct fxp_softc *sc); 2242e2b8238SJonathan Lemon static __inline void fxp_scb_cmd(struct fxp_softc *sc, int cmd); 225f7788e8eSJonathan Lemon static __inline void fxp_dma_wait(volatile u_int16_t *status, 226f7788e8eSJonathan Lemon struct fxp_softc *sc); 227f7788e8eSJonathan Lemon 228f7788e8eSJonathan Lemon static device_method_t fxp_methods[] = { 229f7788e8eSJonathan Lemon /* Device interface */ 230f7788e8eSJonathan Lemon DEVMETHOD(device_probe, fxp_probe), 231f7788e8eSJonathan Lemon DEVMETHOD(device_attach, fxp_attach), 232f7788e8eSJonathan Lemon DEVMETHOD(device_detach, fxp_detach), 233f7788e8eSJonathan Lemon DEVMETHOD(device_shutdown, fxp_shutdown), 234f7788e8eSJonathan Lemon DEVMETHOD(device_suspend, fxp_suspend), 235f7788e8eSJonathan Lemon DEVMETHOD(device_resume, fxp_resume), 236f7788e8eSJonathan Lemon 237f7788e8eSJonathan Lemon /* MII interface */ 238f7788e8eSJonathan Lemon DEVMETHOD(miibus_readreg, fxp_miibus_readreg), 239f7788e8eSJonathan Lemon DEVMETHOD(miibus_writereg, fxp_miibus_writereg), 240f7788e8eSJonathan Lemon 241f7788e8eSJonathan Lemon { 0, 0 } 242f7788e8eSJonathan Lemon }; 243f7788e8eSJonathan Lemon 244f7788e8eSJonathan Lemon static driver_t fxp_driver = { 245f7788e8eSJonathan Lemon "fxp", 246f7788e8eSJonathan Lemon fxp_methods, 247f7788e8eSJonathan Lemon sizeof(struct fxp_softc), 248f7788e8eSJonathan Lemon }; 249f7788e8eSJonathan Lemon 250f7788e8eSJonathan Lemon static devclass_t fxp_devclass; 251f7788e8eSJonathan Lemon 252f7788e8eSJonathan Lemon DRIVER_MODULE(if_fxp, pci, fxp_driver, fxp_devclass, 0, 0); 253f7788e8eSJonathan Lemon DRIVER_MODULE(if_fxp, cardbus, fxp_driver, fxp_devclass, 0, 0); 254f7788e8eSJonathan Lemon DRIVER_MODULE(miibus, fxp, miibus_driver, miibus_devclass, 0, 0); 255f7788e8eSJonathan Lemon 2562b5989e9SLuigi Rizzo static int fxp_rnr; 2572b5989e9SLuigi Rizzo SYSCTL_INT(_hw, OID_AUTO, fxp_rnr, CTLFLAG_RW, &fxp_rnr, 0, "fxp rnr events"); 2582b5989e9SLuigi Rizzo 259f7788e8eSJonathan Lemon /* 260ba8c6fd5SDavid Greenman * Inline function to copy a 16-bit aligned 32-bit quantity. 261ba8c6fd5SDavid Greenman */ 262ba8c6fd5SDavid Greenman static __inline void 263f7788e8eSJonathan Lemon fxp_lwcopy(volatile u_int32_t *src, volatile u_int32_t *dst) 264ba8c6fd5SDavid Greenman { 265aed53495SDavid Greenman #ifdef __i386__ 266aed53495SDavid Greenman *dst = *src; 267aed53495SDavid Greenman #else 268fe08c21aSMatthew Dillon volatile u_int16_t *a = (volatile u_int16_t *)src; 269fe08c21aSMatthew Dillon volatile u_int16_t *b = (volatile u_int16_t *)dst; 270ba8c6fd5SDavid Greenman 271ba8c6fd5SDavid Greenman b[0] = a[0]; 272ba8c6fd5SDavid Greenman b[1] = a[1]; 273aed53495SDavid Greenman #endif 274ba8c6fd5SDavid Greenman } 275a17c678eSDavid Greenman 276a17c678eSDavid Greenman /* 277dfe61cf1SDavid Greenman * Wait for the previous command to be accepted (but not necessarily 278dfe61cf1SDavid Greenman * completed). 279dfe61cf1SDavid Greenman */ 280c1087c13SBruce Evans static __inline void 281f7788e8eSJonathan Lemon fxp_scb_wait(struct fxp_softc *sc) 282a17c678eSDavid Greenman { 283a17c678eSDavid Greenman int i = 10000; 284a17c678eSDavid Greenman 2857dced78aSDavid Greenman while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i) 2867dced78aSDavid Greenman DELAY(2); 2877dced78aSDavid Greenman if (i == 0) 28800c4116bSJonathan Lemon device_printf(sc->dev, "SCB timeout: 0x%x 0x%x 0x%x 0x%x\n", 289e8c8b728SJonathan Lemon CSR_READ_1(sc, FXP_CSR_SCB_COMMAND), 290e8c8b728SJonathan Lemon CSR_READ_1(sc, FXP_CSR_SCB_STATACK), 291e8c8b728SJonathan Lemon CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS), 292e8c8b728SJonathan Lemon CSR_READ_2(sc, FXP_CSR_FLOWCONTROL)); 2937dced78aSDavid Greenman } 2947dced78aSDavid Greenman 2957dced78aSDavid Greenman static __inline void 2962e2b8238SJonathan Lemon fxp_scb_cmd(struct fxp_softc *sc, int cmd) 2972e2b8238SJonathan Lemon { 2982e2b8238SJonathan Lemon 2992e2b8238SJonathan Lemon if (cmd == FXP_SCB_COMMAND_CU_RESUME && sc->cu_resume_bug) { 3002e2b8238SJonathan Lemon CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_CB_COMMAND_NOP); 3012e2b8238SJonathan Lemon fxp_scb_wait(sc); 3022e2b8238SJonathan Lemon } 3032e2b8238SJonathan Lemon CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, cmd); 3042e2b8238SJonathan Lemon } 3052e2b8238SJonathan Lemon 3062e2b8238SJonathan Lemon static __inline void 307f7788e8eSJonathan Lemon fxp_dma_wait(volatile u_int16_t *status, struct fxp_softc *sc) 3087dced78aSDavid Greenman { 3097dced78aSDavid Greenman int i = 10000; 3107dced78aSDavid Greenman 3117dced78aSDavid Greenman while (!(*status & FXP_CB_STATUS_C) && --i) 3127dced78aSDavid Greenman DELAY(2); 3137dced78aSDavid Greenman if (i == 0) 314f7788e8eSJonathan Lemon device_printf(sc->dev, "DMA timeout\n"); 315a17c678eSDavid Greenman } 316a17c678eSDavid Greenman 317dfe61cf1SDavid Greenman /* 318dfe61cf1SDavid Greenman * Return identification string if this is device is ours. 319dfe61cf1SDavid Greenman */ 3206182fdbdSPeter Wemm static int 3216182fdbdSPeter Wemm fxp_probe(device_t dev) 322a17c678eSDavid Greenman { 323f7788e8eSJonathan Lemon u_int16_t devid; 324f7788e8eSJonathan Lemon struct fxp_ident *ident; 325f7788e8eSJonathan Lemon 32655ce7b51SDavid Greenman if (pci_get_vendor(dev) == FXP_VENDORID_INTEL) { 327f7788e8eSJonathan Lemon devid = pci_get_device(dev); 328f7788e8eSJonathan Lemon for (ident = fxp_ident_table; ident->name != NULL; ident++) { 329f7788e8eSJonathan Lemon if (ident->devid == devid) { 330f7788e8eSJonathan Lemon device_set_desc(dev, ident->name); 331f7788e8eSJonathan Lemon return (0); 33255ce7b51SDavid Greenman } 333dd68ef16SPeter Wemm } 334f7788e8eSJonathan Lemon } 335f7788e8eSJonathan Lemon return (ENXIO); 3366182fdbdSPeter Wemm } 3376182fdbdSPeter Wemm 33848e417ebSJonathan Lemon static void 33948e417ebSJonathan Lemon fxp_powerstate_d0(device_t dev) 34048e417ebSJonathan Lemon { 34148e417ebSJonathan Lemon #if __FreeBSD_version >= 430002 34248e417ebSJonathan Lemon u_int32_t iobase, membase, irq; 34348e417ebSJonathan Lemon 34448e417ebSJonathan Lemon if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { 34548e417ebSJonathan Lemon /* Save important PCI config data. */ 34648e417ebSJonathan Lemon iobase = pci_read_config(dev, FXP_PCI_IOBA, 4); 34748e417ebSJonathan Lemon membase = pci_read_config(dev, FXP_PCI_MMBA, 4); 34848e417ebSJonathan Lemon irq = pci_read_config(dev, PCIR_INTLINE, 4); 34948e417ebSJonathan Lemon 35048e417ebSJonathan Lemon /* Reset the power state. */ 35148e417ebSJonathan Lemon device_printf(dev, "chip is in D%d power mode " 35248e417ebSJonathan Lemon "-- setting to D0\n", pci_get_powerstate(dev)); 35348e417ebSJonathan Lemon 35448e417ebSJonathan Lemon pci_set_powerstate(dev, PCI_POWERSTATE_D0); 35548e417ebSJonathan Lemon 35648e417ebSJonathan Lemon /* Restore PCI config data. */ 35748e417ebSJonathan Lemon pci_write_config(dev, FXP_PCI_IOBA, iobase, 4); 35848e417ebSJonathan Lemon pci_write_config(dev, FXP_PCI_MMBA, membase, 4); 35948e417ebSJonathan Lemon pci_write_config(dev, PCIR_INTLINE, irq, 4); 36048e417ebSJonathan Lemon } 36148e417ebSJonathan Lemon #endif 36248e417ebSJonathan Lemon } 36348e417ebSJonathan Lemon 364b2badf02SMaxime Henrion static void 365b2badf02SMaxime Henrion fxp_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 366b2badf02SMaxime Henrion { 367b2badf02SMaxime Henrion u_int32_t *addr; 368b2badf02SMaxime Henrion 369b2badf02SMaxime Henrion if (error) 370b2badf02SMaxime Henrion return; 371b2badf02SMaxime Henrion 372b2badf02SMaxime Henrion KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 373b2badf02SMaxime Henrion addr = arg; 374b2badf02SMaxime Henrion *addr = segs->ds_addr; 375b2badf02SMaxime Henrion } 376b2badf02SMaxime Henrion 3776182fdbdSPeter Wemm static int 3786182fdbdSPeter Wemm fxp_attach(device_t dev) 379a17c678eSDavid Greenman { 3806182fdbdSPeter Wemm int error = 0; 3816182fdbdSPeter Wemm struct fxp_softc *sc = device_get_softc(dev); 382ba8c6fd5SDavid Greenman struct ifnet *ifp; 383b2badf02SMaxime Henrion struct fxp_rx *rxp; 3849fa6ccfbSMatt Jacob u_int32_t val; 385f7788e8eSJonathan Lemon u_int16_t data; 386f7788e8eSJonathan Lemon int i, rid, m1, m2, prefer_iomap; 387f7788e8eSJonathan Lemon int s; 388a17c678eSDavid Greenman 389f7788e8eSJonathan Lemon bzero(sc, sizeof(*sc)); 390f7788e8eSJonathan Lemon sc->dev = dev; 3916c951b44SJustin T. Gibbs callout_handle_init(&sc->stat_ch); 392a1a9c8f7SJonathan Lemon sysctl_ctx_init(&sc->sysctl_ctx); 3936008862bSJohn Baldwin mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 3946008862bSJohn Baldwin MTX_DEF | MTX_RECURSE); 395a17c678eSDavid Greenman 396f7788e8eSJonathan Lemon s = splimp(); 397a17c678eSDavid Greenman 398dfe61cf1SDavid Greenman /* 3999fa6ccfbSMatt Jacob * Enable bus mastering. Enable memory space too, in case 4009fa6ccfbSMatt Jacob * BIOS/Prom forgot about it. 401df373873SWes Peters */ 4026182fdbdSPeter Wemm val = pci_read_config(dev, PCIR_COMMAND, 2); 403df373873SWes Peters val |= (PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 4046182fdbdSPeter Wemm pci_write_config(dev, PCIR_COMMAND, val, 2); 4059fa6ccfbSMatt Jacob val = pci_read_config(dev, PCIR_COMMAND, 2); 406df373873SWes Peters 40748e417ebSJonathan Lemon fxp_powerstate_d0(dev); 4088d799694SBill Paul 409df373873SWes Peters /* 4109fa6ccfbSMatt Jacob * Figure out which we should try first - memory mapping or i/o mapping? 4119fa6ccfbSMatt Jacob * We default to memory mapping. Then we accept an override from the 4129fa6ccfbSMatt Jacob * command line. Then we check to see which one is enabled. 413dfe61cf1SDavid Greenman */ 4149fa6ccfbSMatt Jacob m1 = PCIM_CMD_MEMEN; 4159fa6ccfbSMatt Jacob m2 = PCIM_CMD_PORTEN; 4162a05a4ebSMatt Jacob prefer_iomap = 0; 4172a05a4ebSMatt Jacob if (resource_int_value(device_get_name(dev), device_get_unit(dev), 4182a05a4ebSMatt Jacob "prefer_iomap", &prefer_iomap) == 0 && prefer_iomap != 0) { 4199fa6ccfbSMatt Jacob m1 = PCIM_CMD_PORTEN; 4209fa6ccfbSMatt Jacob m2 = PCIM_CMD_MEMEN; 4219fa6ccfbSMatt Jacob } 4229fa6ccfbSMatt Jacob 4239fa6ccfbSMatt Jacob if (val & m1) { 4249fa6ccfbSMatt Jacob sc->rtp = 4259fa6ccfbSMatt Jacob (m1 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT; 4269fa6ccfbSMatt Jacob sc->rgd = (m1 == PCIM_CMD_MEMEN)? FXP_PCI_MMBA : FXP_PCI_IOBA; 4279fa6ccfbSMatt Jacob sc->mem = bus_alloc_resource(dev, sc->rtp, &sc->rgd, 4286182fdbdSPeter Wemm 0, ~0, 1, RF_ACTIVE); 4299fa6ccfbSMatt Jacob } 4309fa6ccfbSMatt Jacob if (sc->mem == NULL && (val & m2)) { 4319fa6ccfbSMatt Jacob sc->rtp = 4329fa6ccfbSMatt Jacob (m2 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT; 4339fa6ccfbSMatt Jacob sc->rgd = (m2 == PCIM_CMD_MEMEN)? FXP_PCI_MMBA : FXP_PCI_IOBA; 4349fa6ccfbSMatt Jacob sc->mem = bus_alloc_resource(dev, sc->rtp, &sc->rgd, 4359fa6ccfbSMatt Jacob 0, ~0, 1, RF_ACTIVE); 4369fa6ccfbSMatt Jacob } 4379fa6ccfbSMatt Jacob 4386182fdbdSPeter Wemm if (!sc->mem) { 4399fa6ccfbSMatt Jacob device_printf(dev, "could not map device registers\n"); 4406182fdbdSPeter Wemm error = ENXIO; 441a17c678eSDavid Greenman goto fail; 442a17c678eSDavid Greenman } 4439fa6ccfbSMatt Jacob if (bootverbose) { 4449fa6ccfbSMatt Jacob device_printf(dev, "using %s space register mapping\n", 4459fa6ccfbSMatt Jacob sc->rtp == SYS_RES_MEMORY? "memory" : "I/O"); 4469fa6ccfbSMatt Jacob } 4474fc1dda9SAndrew Gallatin 4484fc1dda9SAndrew Gallatin sc->sc_st = rman_get_bustag(sc->mem); 4494fc1dda9SAndrew Gallatin sc->sc_sh = rman_get_bushandle(sc->mem); 450a17c678eSDavid Greenman 451a17c678eSDavid Greenman /* 452dfe61cf1SDavid Greenman * Allocate our interrupt. 453dfe61cf1SDavid Greenman */ 4546182fdbdSPeter Wemm rid = 0; 4556182fdbdSPeter Wemm sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, 4566182fdbdSPeter Wemm RF_SHAREABLE | RF_ACTIVE); 4576182fdbdSPeter Wemm if (sc->irq == NULL) { 4586182fdbdSPeter Wemm device_printf(dev, "could not map interrupt\n"); 4596182fdbdSPeter Wemm error = ENXIO; 4606182fdbdSPeter Wemm goto fail; 4616182fdbdSPeter Wemm } 4626182fdbdSPeter Wemm 463f7788e8eSJonathan Lemon /* 464f7788e8eSJonathan Lemon * Reset to a stable state. 465f7788e8eSJonathan Lemon */ 466f7788e8eSJonathan Lemon CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 467f7788e8eSJonathan Lemon DELAY(10); 468f7788e8eSJonathan Lemon 469f7788e8eSJonathan Lemon /* 470f7788e8eSJonathan Lemon * Find out how large of an SEEPROM we have. 471f7788e8eSJonathan Lemon */ 472f7788e8eSJonathan Lemon fxp_autosize_eeprom(sc); 473f7788e8eSJonathan Lemon 474f7788e8eSJonathan Lemon /* 4753bd07cfdSJonathan Lemon * Determine whether we must use the 503 serial interface. 476f7788e8eSJonathan Lemon */ 477f7788e8eSJonathan Lemon fxp_read_eeprom(sc, &data, 6, 1); 478f7788e8eSJonathan Lemon if ((data & FXP_PHY_DEVICE_MASK) != 0 && 479f7788e8eSJonathan Lemon (data & FXP_PHY_SERIAL_ONLY)) 480dedabebfSJonathan Lemon sc->flags |= FXP_FLAG_SERIAL_MEDIA; 481f7788e8eSJonathan Lemon 482f7788e8eSJonathan Lemon /* 48372a32a26SJonathan Lemon * Create the sysctl tree 48472a32a26SJonathan Lemon */ 48572a32a26SJonathan Lemon sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx, 48672a32a26SJonathan Lemon SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO, 48772a32a26SJonathan Lemon device_get_nameunit(dev), CTLFLAG_RD, 0, ""); 48872a32a26SJonathan Lemon if (sc->sysctl_tree == NULL) 48972a32a26SJonathan Lemon goto fail; 49072a32a26SJonathan Lemon SYSCTL_ADD_PROC(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree), 49172a32a26SJonathan Lemon OID_AUTO, "int_delay", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_PRISON, 492858b84f5SPoul-Henning Kamp &sc->tunable_int_delay, 0, sysctl_hw_fxp_int_delay, "I", 49372a32a26SJonathan Lemon "FXP driver receive interrupt microcode bundling delay"); 49472a32a26SJonathan Lemon SYSCTL_ADD_PROC(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree), 49572a32a26SJonathan Lemon OID_AUTO, "bundle_max", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_PRISON, 496858b84f5SPoul-Henning Kamp &sc->tunable_bundle_max, 0, sysctl_hw_fxp_bundle_max, "I", 49772a32a26SJonathan Lemon "FXP driver receive interrupt microcode bundle size limit"); 49872a32a26SJonathan Lemon 49972a32a26SJonathan Lemon /* 50072a32a26SJonathan Lemon * Pull in device tunables. 50172a32a26SJonathan Lemon */ 50272a32a26SJonathan Lemon sc->tunable_int_delay = TUNABLE_INT_DELAY; 50372a32a26SJonathan Lemon sc->tunable_bundle_max = TUNABLE_BUNDLE_MAX; 50472a32a26SJonathan Lemon (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 50572a32a26SJonathan Lemon "int_delay", &sc->tunable_int_delay); 50672a32a26SJonathan Lemon (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 50772a32a26SJonathan Lemon "bundle_max", &sc->tunable_bundle_max); 50872a32a26SJonathan Lemon 50972a32a26SJonathan Lemon /* 51072a32a26SJonathan Lemon * Find out the chip revision; lump all 82557 revs together. 5113bd07cfdSJonathan Lemon */ 5123bd07cfdSJonathan Lemon fxp_read_eeprom(sc, &data, 5, 1); 5133bd07cfdSJonathan Lemon if ((data >> 8) == 1) 51472a32a26SJonathan Lemon sc->revision = FXP_REV_82557; 51572a32a26SJonathan Lemon else 51672a32a26SJonathan Lemon sc->revision = pci_get_revid(dev); 5173bd07cfdSJonathan Lemon 5183bd07cfdSJonathan Lemon /* 5192e2b8238SJonathan Lemon * Enable workarounds for certain chip revision deficiencies. 52000c4116bSJonathan Lemon * 52172a32a26SJonathan Lemon * Systems based on the ICH2/ICH2-M chip from Intel, and possibly 52272a32a26SJonathan Lemon * some systems based a normal 82559 design, have a defect where 52372a32a26SJonathan Lemon * the chip can cause a PCI protocol violation if it receives 52400c4116bSJonathan Lemon * a CU_RESUME command when it is entering the IDLE state. The 52500c4116bSJonathan Lemon * workaround is to disable Dynamic Standby Mode, so the chip never 52600c4116bSJonathan Lemon * deasserts CLKRUN#, and always remains in an active state. 52700c4116bSJonathan Lemon * 52800c4116bSJonathan Lemon * See Intel 82801BA/82801BAM Specification Update, Errata #30. 5292e2b8238SJonathan Lemon */ 5302e2b8238SJonathan Lemon i = pci_get_device(dev); 53172a32a26SJonathan Lemon if (i == 0x2449 || (i > 0x1030 && i < 0x1039) || 53272a32a26SJonathan Lemon sc->revision >= FXP_REV_82559_A0) { 53300c4116bSJonathan Lemon fxp_read_eeprom(sc, &data, 10, 1); 53400c4116bSJonathan Lemon if (data & 0x02) { /* STB enable */ 53500c4116bSJonathan Lemon u_int16_t cksum; 53600c4116bSJonathan Lemon int i; 53700c4116bSJonathan Lemon 53800c4116bSJonathan Lemon device_printf(dev, 539001cfa92SJonathan Lemon "Disabling dynamic standby mode in EEPROM\n"); 54000c4116bSJonathan Lemon data &= ~0x02; 54100c4116bSJonathan Lemon fxp_write_eeprom(sc, &data, 10, 1); 54200c4116bSJonathan Lemon device_printf(dev, "New EEPROM ID: 0x%x\n", data); 54300c4116bSJonathan Lemon cksum = 0; 54400c4116bSJonathan Lemon for (i = 0; i < (1 << sc->eeprom_size) - 1; i++) { 54500c4116bSJonathan Lemon fxp_read_eeprom(sc, &data, i, 1); 54600c4116bSJonathan Lemon cksum += data; 54700c4116bSJonathan Lemon } 54800c4116bSJonathan Lemon i = (1 << sc->eeprom_size) - 1; 54900c4116bSJonathan Lemon cksum = 0xBABA - cksum; 55000c4116bSJonathan Lemon fxp_read_eeprom(sc, &data, i, 1); 55100c4116bSJonathan Lemon fxp_write_eeprom(sc, &cksum, i, 1); 55200c4116bSJonathan Lemon device_printf(dev, 55300c4116bSJonathan Lemon "EEPROM checksum @ 0x%x: 0x%x -> 0x%x\n", 55400c4116bSJonathan Lemon i, data, cksum); 55500c4116bSJonathan Lemon #if 1 55600c4116bSJonathan Lemon /* 55700c4116bSJonathan Lemon * If the user elects to continue, try the software 55800c4116bSJonathan Lemon * workaround, as it is better than nothing. 55900c4116bSJonathan Lemon */ 5602e2b8238SJonathan Lemon sc->flags |= FXP_FLAG_CU_RESUME_BUG; 56100c4116bSJonathan Lemon #endif 56200c4116bSJonathan Lemon } 56300c4116bSJonathan Lemon } 5642e2b8238SJonathan Lemon 5652e2b8238SJonathan Lemon /* 5663bd07cfdSJonathan Lemon * If we are not a 82557 chip, we can enable extended features. 5673bd07cfdSJonathan Lemon */ 56872a32a26SJonathan Lemon if (sc->revision != FXP_REV_82557) { 5693bd07cfdSJonathan Lemon /* 57074396a0aSJonathan Lemon * If MWI is enabled in the PCI configuration, and there 57174396a0aSJonathan Lemon * is a valid cacheline size (8 or 16 dwords), then tell 57274396a0aSJonathan Lemon * the board to turn on MWI. 5733bd07cfdSJonathan Lemon */ 57474396a0aSJonathan Lemon if (val & PCIM_CMD_MWRICEN && 57574396a0aSJonathan Lemon pci_read_config(dev, PCIR_CACHELNSZ, 1) != 0) 5763bd07cfdSJonathan Lemon sc->flags |= FXP_FLAG_MWI_ENABLE; 5773bd07cfdSJonathan Lemon 5783bd07cfdSJonathan Lemon /* turn on the extended TxCB feature */ 5793bd07cfdSJonathan Lemon sc->flags |= FXP_FLAG_EXT_TXCB; 580920b58e8SBrooks Davis 581e8c8b728SJonathan Lemon /* enable reception of long frames for VLAN */ 582e8c8b728SJonathan Lemon sc->flags |= FXP_FLAG_LONG_PKT_EN; 5833bd07cfdSJonathan Lemon } 5843bd07cfdSJonathan Lemon 5853bd07cfdSJonathan Lemon /* 586c8bca6dcSBill Paul * Enable use of extended RFDs and TCBs for 82550 587c8bca6dcSBill Paul * and later chips. Note: we need extended TXCB support 588c8bca6dcSBill Paul * too, but that's already enabled by the code above. 589c8bca6dcSBill Paul * Be careful to do this only on the right devices. 590c8bca6dcSBill Paul */ 591c8bca6dcSBill Paul 592c8bca6dcSBill Paul if (sc->revision == FXP_REV_82550 || sc->revision == FXP_REV_82550_C) { 593c8bca6dcSBill Paul sc->rfa_size = sizeof (struct fxp_rfa); 594c8bca6dcSBill Paul sc->tx_cmd = FXP_CB_COMMAND_IPCBXMIT; 595c8bca6dcSBill Paul sc->flags |= FXP_FLAG_EXT_RFA; 596c8bca6dcSBill Paul } else { 597c8bca6dcSBill Paul sc->rfa_size = sizeof (struct fxp_rfa) - FXP_RFAX_LEN; 598c8bca6dcSBill Paul sc->tx_cmd = FXP_CB_COMMAND_XMIT; 599c8bca6dcSBill Paul } 600c8bca6dcSBill Paul 601c8bca6dcSBill Paul /* 602b2badf02SMaxime Henrion * Allocate DMA tags and DMA safe memory. 603b2badf02SMaxime Henrion */ 604b2badf02SMaxime Henrion error = bus_dma_tag_create(NULL, 2, 0, BUS_SPACE_MAXADDR_32BIT, 605b2badf02SMaxime Henrion BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 606b2badf02SMaxime Henrion sc->flags & FXP_FLAG_EXT_RFA ? FXP_NTXSEG - 1 : FXP_NTXSEG, 607b2badf02SMaxime Henrion BUS_SPACE_MAXSIZE_32BIT, 0, &sc->fxp_mtag); 608b2badf02SMaxime Henrion if (error) { 609b2badf02SMaxime Henrion device_printf(dev, "could not allocate dma tag\n"); 610b2badf02SMaxime Henrion goto fail; 611b2badf02SMaxime Henrion } 612b2badf02SMaxime Henrion 613b2badf02SMaxime Henrion error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 614b2badf02SMaxime Henrion BUS_SPACE_MAXADDR, NULL, NULL, sizeof(struct fxp_stats), 1, 615b2badf02SMaxime Henrion BUS_SPACE_MAXSIZE_32BIT, 0, &sc->fxp_stag); 616b2badf02SMaxime Henrion if (error) { 617b2badf02SMaxime Henrion device_printf(dev, "could not allocate dma tag\n"); 618b2badf02SMaxime Henrion goto fail; 619b2badf02SMaxime Henrion } 620b2badf02SMaxime Henrion 621b2badf02SMaxime Henrion error = bus_dmamem_alloc(sc->fxp_stag, (void **)&sc->fxp_stats, 622b2badf02SMaxime Henrion BUS_DMA_NOWAIT, &sc->fxp_smap); 623b2badf02SMaxime Henrion if (error) 624b2badf02SMaxime Henrion goto failmem; 625b2badf02SMaxime Henrion error = bus_dmamap_load(sc->fxp_stag, sc->fxp_smap, sc->fxp_stats, 626b2badf02SMaxime Henrion sizeof(struct fxp_stats), fxp_dma_map_addr, &sc->stats_addr, 0); 627b2badf02SMaxime Henrion if (error) { 628b2badf02SMaxime Henrion device_printf(dev, "could not map the stats buffer\n"); 629b2badf02SMaxime Henrion goto fail; 630b2badf02SMaxime Henrion } 631b2badf02SMaxime Henrion bzero(sc->fxp_stats, sizeof(struct fxp_stats)); 632b2badf02SMaxime Henrion 633b2badf02SMaxime Henrion error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 634b2badf02SMaxime Henrion BUS_SPACE_MAXADDR, NULL, NULL, FXP_TXCB_SZ, 1, 635b2badf02SMaxime Henrion BUS_SPACE_MAXSIZE_32BIT, 0, &sc->cbl_tag); 636b2badf02SMaxime Henrion if (error) { 637b2badf02SMaxime Henrion device_printf(dev, "could not allocate dma tag\n"); 638b2badf02SMaxime Henrion goto fail; 639b2badf02SMaxime Henrion } 640b2badf02SMaxime Henrion 641b2badf02SMaxime Henrion error = bus_dmamem_alloc(sc->cbl_tag, (void **)&sc->fxp_desc.cbl_list, 642b2badf02SMaxime Henrion BUS_DMA_NOWAIT, &sc->cbl_map); 643b2badf02SMaxime Henrion if (error) 644b2badf02SMaxime Henrion goto failmem; 645b2badf02SMaxime Henrion bzero(sc->fxp_desc.cbl_list, FXP_TXCB_SZ); 646b2badf02SMaxime Henrion 647b2badf02SMaxime Henrion error = bus_dmamap_load(sc->cbl_tag, sc->cbl_map, 648b2badf02SMaxime Henrion sc->fxp_desc.cbl_list, FXP_TXCB_SZ, fxp_dma_map_addr, 649b2badf02SMaxime Henrion &sc->fxp_desc.cbl_addr, 0); 650b2badf02SMaxime Henrion if (error) { 651b2badf02SMaxime Henrion device_printf(dev, "could not map DMA memory\n"); 652b2badf02SMaxime Henrion goto fail; 653b2badf02SMaxime Henrion } 654b2badf02SMaxime Henrion 655b2badf02SMaxime Henrion error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 656b2badf02SMaxime Henrion BUS_SPACE_MAXADDR, NULL, NULL, sizeof(struct fxp_cb_mcs), 1, 657b2badf02SMaxime Henrion BUS_SPACE_MAXSIZE_32BIT, 0, &sc->mcs_tag); 658b2badf02SMaxime Henrion if (error) { 659b2badf02SMaxime Henrion device_printf(dev, "could not allocate dma tag\n"); 660b2badf02SMaxime Henrion goto fail; 661b2badf02SMaxime Henrion } 662b2badf02SMaxime Henrion 663b2badf02SMaxime Henrion error = bus_dmamem_alloc(sc->mcs_tag, (void **)&sc->mcsp, 664b2badf02SMaxime Henrion BUS_DMA_NOWAIT, &sc->mcs_map); 665b2badf02SMaxime Henrion if (error) 666b2badf02SMaxime Henrion goto failmem; 667b2badf02SMaxime Henrion error = bus_dmamap_load(sc->mcs_tag, sc->mcs_map, sc->mcsp, 668b2badf02SMaxime Henrion sizeof(struct fxp_cb_mcs), fxp_dma_map_addr, &sc->mcs_addr, 0); 669b2badf02SMaxime Henrion if (error) { 670b2badf02SMaxime Henrion device_printf(dev, "can't map the multicast setup command\n"); 671b2badf02SMaxime Henrion goto fail; 672b2badf02SMaxime Henrion } 673b2badf02SMaxime Henrion 674b2badf02SMaxime Henrion /* 675b2badf02SMaxime Henrion * Pre-allocate the TX DMA maps. 676b2badf02SMaxime Henrion */ 677b2badf02SMaxime Henrion for (i = 0; i < FXP_NRFABUFS; i++) { 678b2badf02SMaxime Henrion error = bus_dmamap_create(sc->fxp_mtag, 0, 679b2badf02SMaxime Henrion &sc->fxp_desc.tx_list[i].tx_map); 680b2badf02SMaxime Henrion if (error) { 681b2badf02SMaxime Henrion device_printf(dev, "can't create DMA map for TX\n"); 682b2badf02SMaxime Henrion goto fail; 683b2badf02SMaxime Henrion } 684b2badf02SMaxime Henrion } 685b2badf02SMaxime Henrion error = bus_dmamap_create(sc->fxp_mtag, 0, &sc->spare_map); 686b2badf02SMaxime Henrion if (error) { 687b2badf02SMaxime Henrion device_printf(dev, "can't create spare DMA map\n"); 688b2badf02SMaxime Henrion goto fail; 689b2badf02SMaxime Henrion } 690b2badf02SMaxime Henrion 691b2badf02SMaxime Henrion /* 692b2badf02SMaxime Henrion * Pre-allocate our receive buffers. 693b2badf02SMaxime Henrion */ 694b2badf02SMaxime Henrion sc->fxp_desc.rx_head = sc->fxp_desc.rx_tail = NULL; 695b2badf02SMaxime Henrion for (i = 0; i < FXP_NRFABUFS; i++) { 696b2badf02SMaxime Henrion rxp = &sc->fxp_desc.rx_list[i]; 697b2badf02SMaxime Henrion error = bus_dmamap_create(sc->fxp_mtag, 0, &rxp->rx_map); 698b2badf02SMaxime Henrion if (error) { 699b2badf02SMaxime Henrion device_printf(dev, "can't create DMA map for RX\n"); 700b2badf02SMaxime Henrion goto fail; 701b2badf02SMaxime Henrion } 702b2badf02SMaxime Henrion if (fxp_add_rfabuf(sc, rxp) != 0) 703b2badf02SMaxime Henrion goto failmem; 704b2badf02SMaxime Henrion } 705b2badf02SMaxime Henrion 706b2badf02SMaxime Henrion /* 707f7788e8eSJonathan Lemon * Read MAC address. 708f7788e8eSJonathan Lemon */ 709f7788e8eSJonathan Lemon fxp_read_eeprom(sc, (u_int16_t *)sc->arpcom.ac_enaddr, 0, 3); 710f7788e8eSJonathan Lemon device_printf(dev, "Ethernet address %6D%s\n", 711f7788e8eSJonathan Lemon sc->arpcom.ac_enaddr, ":", 712f7788e8eSJonathan Lemon sc->flags & FXP_FLAG_SERIAL_MEDIA ? ", 10Mbps" : ""); 713f7788e8eSJonathan Lemon if (bootverbose) { 7142e2b8238SJonathan Lemon device_printf(dev, "PCI IDs: %04x %04x %04x %04x %04x\n", 715f7788e8eSJonathan Lemon pci_get_vendor(dev), pci_get_device(dev), 7162e2b8238SJonathan Lemon pci_get_subvendor(dev), pci_get_subdevice(dev), 7172e2b8238SJonathan Lemon pci_get_revid(dev)); 71872a32a26SJonathan Lemon fxp_read_eeprom(sc, &data, 10, 1); 71972a32a26SJonathan Lemon device_printf(dev, "Dynamic Standby mode is %s\n", 72072a32a26SJonathan Lemon data & 0x02 ? "enabled" : "disabled"); 721f7788e8eSJonathan Lemon } 722f7788e8eSJonathan Lemon 723f7788e8eSJonathan Lemon /* 724f7788e8eSJonathan Lemon * If this is only a 10Mbps device, then there is no MII, and 725f7788e8eSJonathan Lemon * the PHY will use a serial interface instead. 726f7788e8eSJonathan Lemon * 727f7788e8eSJonathan Lemon * The Seeq 80c24 AutoDUPLEX(tm) Ethernet Interface Adapter 728f7788e8eSJonathan Lemon * doesn't have a programming interface of any sort. The 729f7788e8eSJonathan Lemon * media is sensed automatically based on how the link partner 730f7788e8eSJonathan Lemon * is configured. This is, in essence, manual configuration. 731f7788e8eSJonathan Lemon */ 732f7788e8eSJonathan Lemon if (sc->flags & FXP_FLAG_SERIAL_MEDIA) { 733f7788e8eSJonathan Lemon ifmedia_init(&sc->sc_media, 0, fxp_serial_ifmedia_upd, 734f7788e8eSJonathan Lemon fxp_serial_ifmedia_sts); 735f7788e8eSJonathan Lemon ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL); 736f7788e8eSJonathan Lemon ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL); 737f7788e8eSJonathan Lemon } else { 738f7788e8eSJonathan Lemon if (mii_phy_probe(dev, &sc->miibus, fxp_ifmedia_upd, 739f7788e8eSJonathan Lemon fxp_ifmedia_sts)) { 740f7788e8eSJonathan Lemon device_printf(dev, "MII without any PHY!\n"); 7416182fdbdSPeter Wemm error = ENXIO; 742ba8c6fd5SDavid Greenman goto fail; 743a17c678eSDavid Greenman } 744f7788e8eSJonathan Lemon } 745dccee1a1SDavid Greenman 746a17c678eSDavid Greenman ifp = &sc->arpcom.ac_if; 7476182fdbdSPeter Wemm ifp->if_unit = device_get_unit(dev); 748a17c678eSDavid Greenman ifp->if_name = "fxp"; 749a17c678eSDavid Greenman ifp->if_output = ether_output; 750a330e1f1SGary Palmer ifp->if_baudrate = 100000000; 751fb583156SDavid Greenman ifp->if_init = fxp_init; 752ba8c6fd5SDavid Greenman ifp->if_softc = sc; 753ba8c6fd5SDavid Greenman ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 754ba8c6fd5SDavid Greenman ifp->if_ioctl = fxp_ioctl; 755ba8c6fd5SDavid Greenman ifp->if_start = fxp_start; 756ba8c6fd5SDavid Greenman ifp->if_watchdog = fxp_watchdog; 757a17c678eSDavid Greenman 758c8bca6dcSBill Paul /* Enable checksum offload for 82550 or better chips */ 759c8bca6dcSBill Paul 760c8bca6dcSBill Paul if (sc->flags & FXP_FLAG_EXT_RFA) { 761c8bca6dcSBill Paul ifp->if_hwassist = FXP_CSUM_FEATURES; 762c8bca6dcSBill Paul ifp->if_capabilities = IFCAP_HWCSUM; 763c6d8cd1eSBill Paul ifp->if_capenable = ifp->if_capabilities; 764c8bca6dcSBill Paul } 765c8bca6dcSBill Paul 766dfe61cf1SDavid Greenman /* 767e8c8b728SJonathan Lemon * Tell the upper layer(s) we support long frames. 768e8c8b728SJonathan Lemon */ 769e8c8b728SJonathan Lemon ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header); 770673d9191SSam Leffler ifp->if_capabilities |= IFCAP_VLAN_MTU; 771e8c8b728SJonathan Lemon 772483b9871SDavid Greenman /* 7733114fdb4SDavid Greenman * Let the system queue as many packets as we have available 7743114fdb4SDavid Greenman * TX descriptors. 775483b9871SDavid Greenman */ 7763114fdb4SDavid Greenman ifp->if_snd.ifq_maxlen = FXP_NTXCB - 1; 7774a684684SDavid Greenman 778201afb0eSMaxime Henrion /* 779201afb0eSMaxime Henrion * Attach the interface. 780201afb0eSMaxime Henrion */ 781201afb0eSMaxime Henrion ether_ifattach(ifp, sc->arpcom.ac_enaddr); 782201afb0eSMaxime Henrion 783201afb0eSMaxime Henrion error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET, 784201afb0eSMaxime Henrion fxp_intr, sc, &sc->ih); 785201afb0eSMaxime Henrion if (error) { 786201afb0eSMaxime Henrion device_printf(dev, "could not setup irq\n"); 787201afb0eSMaxime Henrion goto fail; 788201afb0eSMaxime Henrion } 789201afb0eSMaxime Henrion 790f7788e8eSJonathan Lemon splx(s); 791f7788e8eSJonathan Lemon return (0); 792a17c678eSDavid Greenman 793f7788e8eSJonathan Lemon failmem: 794f7788e8eSJonathan Lemon device_printf(dev, "Failed to malloc memory\n"); 795f7788e8eSJonathan Lemon error = ENOMEM; 796a17c678eSDavid Greenman fail: 797f7788e8eSJonathan Lemon splx(s); 798f7788e8eSJonathan Lemon fxp_release(sc); 799f7788e8eSJonathan Lemon return (error); 800f7788e8eSJonathan Lemon } 801f7788e8eSJonathan Lemon 802f7788e8eSJonathan Lemon /* 803f7788e8eSJonathan Lemon * release all resources 804f7788e8eSJonathan Lemon */ 805f7788e8eSJonathan Lemon static void 806f7788e8eSJonathan Lemon fxp_release(struct fxp_softc *sc) 807f7788e8eSJonathan Lemon { 808b2badf02SMaxime Henrion struct fxp_rx *rxp; 809b2badf02SMaxime Henrion struct fxp_tx *txp; 810b2badf02SMaxime Henrion int i; 811b2badf02SMaxime Henrion 812b2badf02SMaxime Henrion for (i = 0; i < FXP_NRFABUFS; i++) { 813b2badf02SMaxime Henrion rxp = &sc->fxp_desc.rx_list[i]; 814b2badf02SMaxime Henrion if (rxp->rx_mbuf != NULL) { 815b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, rxp->rx_map, 816b2badf02SMaxime Henrion BUS_DMASYNC_POSTREAD); 817b2badf02SMaxime Henrion bus_dmamap_unload(sc->fxp_mtag, rxp->rx_map); 818b2badf02SMaxime Henrion m_freem(rxp->rx_mbuf); 819b2badf02SMaxime Henrion } 820b2badf02SMaxime Henrion bus_dmamap_destroy(sc->fxp_mtag, rxp->rx_map); 821b2badf02SMaxime Henrion } 822b2badf02SMaxime Henrion bus_dmamap_destroy(sc->fxp_mtag, sc->spare_map); 823b2badf02SMaxime Henrion 824b2badf02SMaxime Henrion for (i = 0; i < FXP_NTXCB; i++) { 825b2badf02SMaxime Henrion txp = &sc->fxp_desc.tx_list[i]; 826b2badf02SMaxime Henrion if (txp->tx_mbuf != NULL) { 827b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, txp->tx_map, 828b2badf02SMaxime Henrion BUS_DMASYNC_POSTWRITE); 829b2badf02SMaxime Henrion bus_dmamap_unload(sc->fxp_mtag, txp->tx_map); 830b2badf02SMaxime Henrion m_freem(txp->tx_mbuf); 831b2badf02SMaxime Henrion } 832b2badf02SMaxime Henrion bus_dmamap_destroy(sc->fxp_mtag, txp->tx_map); 833b2badf02SMaxime Henrion } 834f7788e8eSJonathan Lemon 835f7788e8eSJonathan Lemon bus_generic_detach(sc->dev); 8363bd07cfdSJonathan Lemon if (sc->miibus) 837f7788e8eSJonathan Lemon device_delete_child(sc->dev, sc->miibus); 838f7788e8eSJonathan Lemon 839b2badf02SMaxime Henrion if (sc->fxp_desc.cbl_list) { 840b2badf02SMaxime Henrion bus_dmamap_unload(sc->cbl_tag, sc->cbl_map); 841b2badf02SMaxime Henrion bus_dmamem_free(sc->cbl_tag, sc->fxp_desc.cbl_list, 842b2badf02SMaxime Henrion sc->cbl_map); 843b2badf02SMaxime Henrion } 844b2badf02SMaxime Henrion if (sc->fxp_stats) { 845b2badf02SMaxime Henrion bus_dmamap_unload(sc->fxp_stag, sc->fxp_smap); 846b2badf02SMaxime Henrion bus_dmamem_free(sc->fxp_stag, sc->fxp_stats, sc->fxp_smap); 847b2badf02SMaxime Henrion } 848b2badf02SMaxime Henrion if (sc->mcsp) { 849b2badf02SMaxime Henrion bus_dmamap_unload(sc->mcs_tag, sc->mcs_map); 850b2badf02SMaxime Henrion bus_dmamem_free(sc->mcs_tag, sc->mcsp, sc->mcs_map); 851b2badf02SMaxime Henrion } 852f7788e8eSJonathan Lemon if (sc->ih) 853f7788e8eSJonathan Lemon bus_teardown_intr(sc->dev, sc->irq, sc->ih); 854f7788e8eSJonathan Lemon if (sc->irq) 855f7788e8eSJonathan Lemon bus_release_resource(sc->dev, SYS_RES_IRQ, 0, sc->irq); 856f7788e8eSJonathan Lemon if (sc->mem) 857f7788e8eSJonathan Lemon bus_release_resource(sc->dev, sc->rtp, sc->rgd, sc->mem); 858b2badf02SMaxime Henrion if (sc->fxp_mtag) 859b2badf02SMaxime Henrion bus_dma_tag_destroy(sc->fxp_mtag); 860b2badf02SMaxime Henrion if (sc->fxp_stag) 861b2badf02SMaxime Henrion bus_dma_tag_destroy(sc->fxp_stag); 862b2badf02SMaxime Henrion if (sc->cbl_tag) 863b2badf02SMaxime Henrion bus_dma_tag_destroy(sc->cbl_tag); 864b2badf02SMaxime Henrion if (sc->mcs_tag) 865b2badf02SMaxime Henrion bus_dma_tag_destroy(sc->mcs_tag); 86672a32a26SJonathan Lemon 86772a32a26SJonathan Lemon sysctl_ctx_free(&sc->sysctl_ctx); 86872a32a26SJonathan Lemon 8690f4dc94cSChuck Paterson mtx_destroy(&sc->sc_mtx); 8706182fdbdSPeter Wemm } 8716182fdbdSPeter Wemm 8726182fdbdSPeter Wemm /* 8736182fdbdSPeter Wemm * Detach interface. 8746182fdbdSPeter Wemm */ 8756182fdbdSPeter Wemm static int 8766182fdbdSPeter Wemm fxp_detach(device_t dev) 8776182fdbdSPeter Wemm { 8786182fdbdSPeter Wemm struct fxp_softc *sc = device_get_softc(dev); 879f7788e8eSJonathan Lemon int s; 8806182fdbdSPeter Wemm 8812e2b8238SJonathan Lemon /* disable interrupts */ 8822e2b8238SJonathan Lemon CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, FXP_SCB_INTR_DISABLE); 8832e2b8238SJonathan Lemon 884f7788e8eSJonathan Lemon s = splimp(); 8856182fdbdSPeter Wemm 8866182fdbdSPeter Wemm /* 8876182fdbdSPeter Wemm * Stop DMA and drop transmit queue. 8886182fdbdSPeter Wemm */ 8896182fdbdSPeter Wemm fxp_stop(sc); 8906182fdbdSPeter Wemm 8916182fdbdSPeter Wemm /* 892f7788e8eSJonathan Lemon * Close down routes etc. 8936182fdbdSPeter Wemm */ 894673d9191SSam Leffler ether_ifdetach(&sc->arpcom.ac_if); 8956182fdbdSPeter Wemm 8966182fdbdSPeter Wemm /* 8976182fdbdSPeter Wemm * Free all media structures. 8986182fdbdSPeter Wemm */ 8996182fdbdSPeter Wemm ifmedia_removeall(&sc->sc_media); 9006182fdbdSPeter Wemm 901f7788e8eSJonathan Lemon splx(s); 9026182fdbdSPeter Wemm 903f7788e8eSJonathan Lemon /* Release our allocated resources. */ 904f7788e8eSJonathan Lemon fxp_release(sc); 9056182fdbdSPeter Wemm 906f7788e8eSJonathan Lemon return (0); 907a17c678eSDavid Greenman } 908a17c678eSDavid Greenman 909a17c678eSDavid Greenman /* 9104a684684SDavid Greenman * Device shutdown routine. Called at system shutdown after sync. The 911a17c678eSDavid Greenman * main purpose of this routine is to shut off receiver DMA so that 912a17c678eSDavid Greenman * kernel memory doesn't get clobbered during warmboot. 913a17c678eSDavid Greenman */ 9146182fdbdSPeter Wemm static int 9156182fdbdSPeter Wemm fxp_shutdown(device_t dev) 916a17c678eSDavid Greenman { 9176182fdbdSPeter Wemm /* 9186182fdbdSPeter Wemm * Make sure that DMA is disabled prior to reboot. Not doing 9196182fdbdSPeter Wemm * do could allow DMA to corrupt kernel memory during the 9206182fdbdSPeter Wemm * reboot before the driver initializes. 9216182fdbdSPeter Wemm */ 9226182fdbdSPeter Wemm fxp_stop((struct fxp_softc *) device_get_softc(dev)); 923f7788e8eSJonathan Lemon return (0); 924a17c678eSDavid Greenman } 925a17c678eSDavid Greenman 9267dced78aSDavid Greenman /* 9277dced78aSDavid Greenman * Device suspend routine. Stop the interface and save some PCI 9287dced78aSDavid Greenman * settings in case the BIOS doesn't restore them properly on 9297dced78aSDavid Greenman * resume. 9307dced78aSDavid Greenman */ 9317dced78aSDavid Greenman static int 9327dced78aSDavid Greenman fxp_suspend(device_t dev) 9337dced78aSDavid Greenman { 9347dced78aSDavid Greenman struct fxp_softc *sc = device_get_softc(dev); 935f7788e8eSJonathan Lemon int i, s; 9367dced78aSDavid Greenman 937f7788e8eSJonathan Lemon s = splimp(); 9387dced78aSDavid Greenman 9397dced78aSDavid Greenman fxp_stop(sc); 9407dced78aSDavid Greenman 9417dced78aSDavid Greenman for (i = 0; i < 5; i++) 9427dced78aSDavid Greenman sc->saved_maps[i] = pci_read_config(dev, PCIR_MAPS + i * 4, 4); 9437dced78aSDavid Greenman sc->saved_biosaddr = pci_read_config(dev, PCIR_BIOS, 4); 9447dced78aSDavid Greenman sc->saved_intline = pci_read_config(dev, PCIR_INTLINE, 1); 9457dced78aSDavid Greenman sc->saved_cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1); 9467dced78aSDavid Greenman sc->saved_lattimer = pci_read_config(dev, PCIR_LATTIMER, 1); 9477dced78aSDavid Greenman 9487dced78aSDavid Greenman sc->suspended = 1; 9497dced78aSDavid Greenman 950f7788e8eSJonathan Lemon splx(s); 951f7788e8eSJonathan Lemon return (0); 9527dced78aSDavid Greenman } 9537dced78aSDavid Greenman 9547dced78aSDavid Greenman /* 9557dced78aSDavid Greenman * Device resume routine. Restore some PCI settings in case the BIOS 9567dced78aSDavid Greenman * doesn't, re-enable busmastering, and restart the interface if 9577dced78aSDavid Greenman * appropriate. 9587dced78aSDavid Greenman */ 9597dced78aSDavid Greenman static int 9607dced78aSDavid Greenman fxp_resume(device_t dev) 9617dced78aSDavid Greenman { 9627dced78aSDavid Greenman struct fxp_softc *sc = device_get_softc(dev); 9637dced78aSDavid Greenman struct ifnet *ifp = &sc->sc_if; 9647dced78aSDavid Greenman u_int16_t pci_command; 965f7788e8eSJonathan Lemon int i, s; 9667dced78aSDavid Greenman 967f7788e8eSJonathan Lemon s = splimp(); 9687dced78aSDavid Greenman 96948e417ebSJonathan Lemon fxp_powerstate_d0(dev); 97048e417ebSJonathan Lemon 9717dced78aSDavid Greenman /* better way to do this? */ 9727dced78aSDavid Greenman for (i = 0; i < 5; i++) 9737dced78aSDavid Greenman pci_write_config(dev, PCIR_MAPS + i * 4, sc->saved_maps[i], 4); 9747dced78aSDavid Greenman pci_write_config(dev, PCIR_BIOS, sc->saved_biosaddr, 4); 9757dced78aSDavid Greenman pci_write_config(dev, PCIR_INTLINE, sc->saved_intline, 1); 9767dced78aSDavid Greenman pci_write_config(dev, PCIR_CACHELNSZ, sc->saved_cachelnsz, 1); 9777dced78aSDavid Greenman pci_write_config(dev, PCIR_LATTIMER, sc->saved_lattimer, 1); 9787dced78aSDavid Greenman 9797dced78aSDavid Greenman /* reenable busmastering */ 9807dced78aSDavid Greenman pci_command = pci_read_config(dev, PCIR_COMMAND, 2); 9817dced78aSDavid Greenman pci_command |= (PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); 9827dced78aSDavid Greenman pci_write_config(dev, PCIR_COMMAND, pci_command, 2); 9837dced78aSDavid Greenman 9847dced78aSDavid Greenman CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET); 9857dced78aSDavid Greenman DELAY(10); 9867dced78aSDavid Greenman 9877dced78aSDavid Greenman /* reinitialize interface if necessary */ 9887dced78aSDavid Greenman if (ifp->if_flags & IFF_UP) 9897dced78aSDavid Greenman fxp_init(sc); 9907dced78aSDavid Greenman 9917dced78aSDavid Greenman sc->suspended = 0; 9927dced78aSDavid Greenman 993f7788e8eSJonathan Lemon splx(s); 994ba8c6fd5SDavid Greenman return (0); 995f7788e8eSJonathan Lemon } 996ba8c6fd5SDavid Greenman 99700c4116bSJonathan Lemon static void 99800c4116bSJonathan Lemon fxp_eeprom_shiftin(struct fxp_softc *sc, int data, int length) 99900c4116bSJonathan Lemon { 100000c4116bSJonathan Lemon u_int16_t reg; 100100c4116bSJonathan Lemon int x; 100200c4116bSJonathan Lemon 100300c4116bSJonathan Lemon /* 100400c4116bSJonathan Lemon * Shift in data. 100500c4116bSJonathan Lemon */ 100600c4116bSJonathan Lemon for (x = 1 << (length - 1); x; x >>= 1) { 100700c4116bSJonathan Lemon if (data & x) 100800c4116bSJonathan Lemon reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 100900c4116bSJonathan Lemon else 101000c4116bSJonathan Lemon reg = FXP_EEPROM_EECS; 101100c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 101200c4116bSJonathan Lemon DELAY(1); 101300c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK); 101400c4116bSJonathan Lemon DELAY(1); 101500c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 101600c4116bSJonathan Lemon DELAY(1); 101700c4116bSJonathan Lemon } 101800c4116bSJonathan Lemon } 101900c4116bSJonathan Lemon 1020f7788e8eSJonathan Lemon /* 1021f7788e8eSJonathan Lemon * Read from the serial EEPROM. Basically, you manually shift in 1022f7788e8eSJonathan Lemon * the read opcode (one bit at a time) and then shift in the address, 1023f7788e8eSJonathan Lemon * and then you shift out the data (all of this one bit at a time). 1024f7788e8eSJonathan Lemon * The word size is 16 bits, so you have to provide the address for 1025f7788e8eSJonathan Lemon * every 16 bits of data. 1026f7788e8eSJonathan Lemon */ 1027f7788e8eSJonathan Lemon static u_int16_t 1028f7788e8eSJonathan Lemon fxp_eeprom_getword(struct fxp_softc *sc, int offset, int autosize) 1029f7788e8eSJonathan Lemon { 1030f7788e8eSJonathan Lemon u_int16_t reg, data; 1031f7788e8eSJonathan Lemon int x; 1032ba8c6fd5SDavid Greenman 1033f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 1034f7788e8eSJonathan Lemon /* 1035f7788e8eSJonathan Lemon * Shift in read opcode. 1036f7788e8eSJonathan Lemon */ 103700c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, FXP_EEPROM_OPC_READ, 3); 1038f7788e8eSJonathan Lemon /* 1039f7788e8eSJonathan Lemon * Shift in address. 1040f7788e8eSJonathan Lemon */ 1041f7788e8eSJonathan Lemon data = 0; 1042f7788e8eSJonathan Lemon for (x = 1 << (sc->eeprom_size - 1); x; x >>= 1) { 1043f7788e8eSJonathan Lemon if (offset & x) 1044f7788e8eSJonathan Lemon reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI; 1045f7788e8eSJonathan Lemon else 1046f7788e8eSJonathan Lemon reg = FXP_EEPROM_EECS; 1047f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 1048f7788e8eSJonathan Lemon DELAY(1); 1049f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK); 1050f7788e8eSJonathan Lemon DELAY(1); 1051f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 1052f7788e8eSJonathan Lemon DELAY(1); 1053f7788e8eSJonathan Lemon reg = CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO; 1054f7788e8eSJonathan Lemon data++; 1055f7788e8eSJonathan Lemon if (autosize && reg == 0) { 1056f7788e8eSJonathan Lemon sc->eeprom_size = data; 1057f7788e8eSJonathan Lemon break; 1058f7788e8eSJonathan Lemon } 1059f7788e8eSJonathan Lemon } 1060f7788e8eSJonathan Lemon /* 1061f7788e8eSJonathan Lemon * Shift out data. 1062f7788e8eSJonathan Lemon */ 1063f7788e8eSJonathan Lemon data = 0; 1064f7788e8eSJonathan Lemon reg = FXP_EEPROM_EECS; 1065f7788e8eSJonathan Lemon for (x = 1 << 15; x; x >>= 1) { 1066f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK); 1067f7788e8eSJonathan Lemon DELAY(1); 1068f7788e8eSJonathan Lemon if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO) 1069f7788e8eSJonathan Lemon data |= x; 1070f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg); 1071f7788e8eSJonathan Lemon DELAY(1); 1072f7788e8eSJonathan Lemon } 1073f7788e8eSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 1074f7788e8eSJonathan Lemon DELAY(1); 1075f7788e8eSJonathan Lemon 1076f7788e8eSJonathan Lemon return (data); 1077ba8c6fd5SDavid Greenman } 1078ba8c6fd5SDavid Greenman 107900c4116bSJonathan Lemon static void 108000c4116bSJonathan Lemon fxp_eeprom_putword(struct fxp_softc *sc, int offset, u_int16_t data) 108100c4116bSJonathan Lemon { 108200c4116bSJonathan Lemon int i; 108300c4116bSJonathan Lemon 108400c4116bSJonathan Lemon /* 108500c4116bSJonathan Lemon * Erase/write enable. 108600c4116bSJonathan Lemon */ 108700c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 108800c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, 0x4, 3); 108900c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, 0x03 << (sc->eeprom_size - 2), sc->eeprom_size); 109000c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 109100c4116bSJonathan Lemon DELAY(1); 109200c4116bSJonathan Lemon /* 109300c4116bSJonathan Lemon * Shift in write opcode, address, data. 109400c4116bSJonathan Lemon */ 109500c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 109600c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, FXP_EEPROM_OPC_WRITE, 3); 109700c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, offset, sc->eeprom_size); 109800c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, data, 16); 109900c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 110000c4116bSJonathan Lemon DELAY(1); 110100c4116bSJonathan Lemon /* 110200c4116bSJonathan Lemon * Wait for EEPROM to finish up. 110300c4116bSJonathan Lemon */ 110400c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 110500c4116bSJonathan Lemon DELAY(1); 110600c4116bSJonathan Lemon for (i = 0; i < 1000; i++) { 110700c4116bSJonathan Lemon if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO) 110800c4116bSJonathan Lemon break; 110900c4116bSJonathan Lemon DELAY(50); 111000c4116bSJonathan Lemon } 111100c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 111200c4116bSJonathan Lemon DELAY(1); 111300c4116bSJonathan Lemon /* 111400c4116bSJonathan Lemon * Erase/write disable. 111500c4116bSJonathan Lemon */ 111600c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS); 111700c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, 0x4, 3); 111800c4116bSJonathan Lemon fxp_eeprom_shiftin(sc, 0, sc->eeprom_size); 111900c4116bSJonathan Lemon CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0); 112000c4116bSJonathan Lemon DELAY(1); 112100c4116bSJonathan Lemon } 112200c4116bSJonathan Lemon 1123ba8c6fd5SDavid Greenman /* 1124e9bf2fa7SDavid Greenman * From NetBSD: 1125e9bf2fa7SDavid Greenman * 1126e9bf2fa7SDavid Greenman * Figure out EEPROM size. 1127e9bf2fa7SDavid Greenman * 1128e9bf2fa7SDavid Greenman * 559's can have either 64-word or 256-word EEPROMs, the 558 1129e9bf2fa7SDavid Greenman * datasheet only talks about 64-word EEPROMs, and the 557 datasheet 1130e9bf2fa7SDavid Greenman * talks about the existance of 16 to 256 word EEPROMs. 1131e9bf2fa7SDavid Greenman * 1132e9bf2fa7SDavid Greenman * The only known sizes are 64 and 256, where the 256 version is used 1133e9bf2fa7SDavid Greenman * by CardBus cards to store CIS information. 1134e9bf2fa7SDavid Greenman * 1135e9bf2fa7SDavid Greenman * The address is shifted in msb-to-lsb, and after the last 1136e9bf2fa7SDavid Greenman * address-bit the EEPROM is supposed to output a `dummy zero' bit, 1137e9bf2fa7SDavid Greenman * after which follows the actual data. We try to detect this zero, by 1138e9bf2fa7SDavid Greenman * probing the data-out bit in the EEPROM control register just after 1139e9bf2fa7SDavid Greenman * having shifted in a bit. If the bit is zero, we assume we've 1140e9bf2fa7SDavid Greenman * shifted enough address bits. The data-out should be tri-state, 1141e9bf2fa7SDavid Greenman * before this, which should translate to a logical one. 1142e9bf2fa7SDavid Greenman */ 1143e9bf2fa7SDavid Greenman static void 1144f7788e8eSJonathan Lemon fxp_autosize_eeprom(struct fxp_softc *sc) 1145e9bf2fa7SDavid Greenman { 1146e9bf2fa7SDavid Greenman 1147f7788e8eSJonathan Lemon /* guess maximum size of 256 words */ 1148f7788e8eSJonathan Lemon sc->eeprom_size = 8; 1149f7788e8eSJonathan Lemon 1150f7788e8eSJonathan Lemon /* autosize */ 1151f7788e8eSJonathan Lemon (void) fxp_eeprom_getword(sc, 0, 1); 1152e9bf2fa7SDavid Greenman } 1153f7788e8eSJonathan Lemon 1154ba8c6fd5SDavid Greenman static void 1155f7788e8eSJonathan Lemon fxp_read_eeprom(struct fxp_softc *sc, u_short *data, int offset, int words) 1156ba8c6fd5SDavid Greenman { 1157f7788e8eSJonathan Lemon int i; 1158ba8c6fd5SDavid Greenman 1159f7788e8eSJonathan Lemon for (i = 0; i < words; i++) 1160f7788e8eSJonathan Lemon data[i] = fxp_eeprom_getword(sc, offset + i, 0); 1161ba8c6fd5SDavid Greenman } 1162ba8c6fd5SDavid Greenman 116300c4116bSJonathan Lemon static void 116400c4116bSJonathan Lemon fxp_write_eeprom(struct fxp_softc *sc, u_short *data, int offset, int words) 116500c4116bSJonathan Lemon { 116600c4116bSJonathan Lemon int i; 116700c4116bSJonathan Lemon 116800c4116bSJonathan Lemon for (i = 0; i < words; i++) 116900c4116bSJonathan Lemon fxp_eeprom_putword(sc, offset + i, data[i]); 117000c4116bSJonathan Lemon } 117100c4116bSJonathan Lemon 1172b2badf02SMaxime Henrion static void 1173b2badf02SMaxime Henrion fxp_dma_map_txbuf(void *arg, bus_dma_segment_t *segs, int nseg, 1174b2badf02SMaxime Henrion bus_size_t mapsize, int error) 1175b2badf02SMaxime Henrion { 1176b2badf02SMaxime Henrion struct fxp_softc *sc; 1177b2badf02SMaxime Henrion struct fxp_cb_tx *txp; 1178b2badf02SMaxime Henrion int i; 1179b2badf02SMaxime Henrion 1180b2badf02SMaxime Henrion if (error) 1181b2badf02SMaxime Henrion return; 1182b2badf02SMaxime Henrion 1183b2badf02SMaxime Henrion KASSERT(nseg <= FXP_NTXSEG, ("too many DMA segments")); 1184b2badf02SMaxime Henrion 1185b2badf02SMaxime Henrion sc = arg; 1186b2badf02SMaxime Henrion txp = sc->fxp_desc.tx_last->tx_next->tx_cb; 1187b2badf02SMaxime Henrion for (i = 0; i < nseg; i++) { 1188b2badf02SMaxime Henrion KASSERT(segs[i].ds_len <= MCLBYTES, ("segment size too large")); 1189b2badf02SMaxime Henrion /* 1190b2badf02SMaxime Henrion * If this is an 82550/82551, then we're using extended 1191b2badf02SMaxime Henrion * TxCBs _and_ we're using checksum offload. This means 1192b2badf02SMaxime Henrion * that the TxCB is really an IPCB. One major difference 1193b2badf02SMaxime Henrion * between the two is that with plain extended TxCBs, 1194b2badf02SMaxime Henrion * the bottom half of the TxCB contains two entries from 1195b2badf02SMaxime Henrion * the TBD array, whereas IPCBs contain just one entry: 1196b2badf02SMaxime Henrion * one entry (8 bytes) has been sacrificed for the TCP/IP 1197b2badf02SMaxime Henrion * checksum offload control bits. So to make things work 1198b2badf02SMaxime Henrion * right, we have to start filling in the TBD array 1199b2badf02SMaxime Henrion * starting from a different place depending on whether 1200b2badf02SMaxime Henrion * the chip is an 82550/82551 or not. 1201b2badf02SMaxime Henrion */ 1202b2badf02SMaxime Henrion if (sc->flags & FXP_FLAG_EXT_RFA) { 1203b2badf02SMaxime Henrion txp->tbd[i + 1].tb_addr = segs[i].ds_addr; 1204b2badf02SMaxime Henrion txp->tbd[i + 1].tb_size = segs[i].ds_len; 1205b2badf02SMaxime Henrion } else { 1206b2badf02SMaxime Henrion txp->tbd[i].tb_addr = segs[i].ds_addr; 1207b2badf02SMaxime Henrion txp->tbd[i].tb_size = segs[i].ds_len; 1208b2badf02SMaxime Henrion } 1209b2badf02SMaxime Henrion } 1210b2badf02SMaxime Henrion txp->tbd_number = nseg; 1211b2badf02SMaxime Henrion } 1212b2badf02SMaxime Henrion 1213a17c678eSDavid Greenman /* 1214a17c678eSDavid Greenman * Start packet transmission on the interface. 1215a17c678eSDavid Greenman */ 1216a17c678eSDavid Greenman static void 1217f7788e8eSJonathan Lemon fxp_start(struct ifnet *ifp) 1218a17c678eSDavid Greenman { 12199b44ff22SGarrett Wollman struct fxp_softc *sc = ifp->if_softc; 1220b2badf02SMaxime Henrion struct fxp_tx *txp; 1221b2badf02SMaxime Henrion struct mbuf *mb_head; 1222b2badf02SMaxime Henrion int error; 1223a17c678eSDavid Greenman 1224a17c678eSDavid Greenman /* 1225483b9871SDavid Greenman * See if we need to suspend xmit until the multicast filter 1226483b9871SDavid Greenman * has been reprogrammed (which can only be done at the head 1227483b9871SDavid Greenman * of the command chain). 1228a17c678eSDavid Greenman */ 12290f4dc94cSChuck Paterson if (sc->need_mcsetup) { 1230a17c678eSDavid Greenman return; 12310f4dc94cSChuck Paterson } 12321cd443acSDavid Greenman 1233483b9871SDavid Greenman txp = NULL; 1234483b9871SDavid Greenman 1235483b9871SDavid Greenman /* 1236483b9871SDavid Greenman * We're finished if there is nothing more to add to the list or if 1237483b9871SDavid Greenman * we're all filled up with buffers to transmit. 12383114fdb4SDavid Greenman * NOTE: One TxCB is reserved to guarantee that fxp_mc_setup() can add 12393114fdb4SDavid Greenman * a NOP command when needed. 1240483b9871SDavid Greenman */ 12413114fdb4SDavid Greenman while (ifp->if_snd.ifq_head != NULL && sc->tx_queued < FXP_NTXCB - 1) { 1242483b9871SDavid Greenman 1243dfe61cf1SDavid Greenman /* 1244dfe61cf1SDavid Greenman * Grab a packet to transmit. 1245dfe61cf1SDavid Greenman */ 12466318197eSDavid Greenman IF_DEQUEUE(&ifp->if_snd, mb_head); 1247a17c678eSDavid Greenman 1248dfe61cf1SDavid Greenman /* 1249483b9871SDavid Greenman * Get pointer to next available tx desc. 1250dfe61cf1SDavid Greenman */ 1251b2badf02SMaxime Henrion txp = sc->fxp_desc.tx_last->tx_next; 1252c8bca6dcSBill Paul 1253c8bca6dcSBill Paul /* 1254c8bca6dcSBill Paul * Deal with TCP/IP checksum offload. Note that 1255c8bca6dcSBill Paul * in order for TCP checksum offload to work, 1256c8bca6dcSBill Paul * the pseudo header checksum must have already 1257c8bca6dcSBill Paul * been computed and stored in the checksum field 1258c8bca6dcSBill Paul * in the TCP header. The stack should have 1259c8bca6dcSBill Paul * already done this for us. 1260c8bca6dcSBill Paul */ 1261c8bca6dcSBill Paul 1262c8bca6dcSBill Paul if (mb_head->m_pkthdr.csum_flags) { 1263c8bca6dcSBill Paul if (mb_head->m_pkthdr.csum_flags & CSUM_DELAY_DATA) { 1264b2badf02SMaxime Henrion txp->tx_cb->ipcb_ip_activation_high = 1265c8bca6dcSBill Paul FXP_IPCB_HARDWAREPARSING_ENABLE; 1266b2badf02SMaxime Henrion txp->tx_cb->ipcb_ip_schedule = 1267c8bca6dcSBill Paul FXP_IPCB_TCPUDP_CHECKSUM_ENABLE; 1268c8bca6dcSBill Paul if (mb_head->m_pkthdr.csum_flags & CSUM_TCP) 1269b2badf02SMaxime Henrion txp->tx_cb->ipcb_ip_schedule |= 1270c8bca6dcSBill Paul FXP_IPCB_TCP_PACKET; 1271c8bca6dcSBill Paul } 1272c8bca6dcSBill Paul #ifdef FXP_IP_CSUM_WAR 1273c8bca6dcSBill Paul /* 1274c8bca6dcSBill Paul * XXX The 82550 chip appears to have trouble 1275c8bca6dcSBill Paul * dealing with IP header checksums in very small 1276c8bca6dcSBill Paul * datagrams, namely fragments from 1 to 3 bytes 1277c8bca6dcSBill Paul * in size. For example, say you want to transmit 1278c8bca6dcSBill Paul * a UDP packet of 1473 bytes. The packet will be 1279c8bca6dcSBill Paul * fragmented over two IP datagrams, the latter 1280c8bca6dcSBill Paul * containing only one byte of data. The 82550 will 1281c8bca6dcSBill Paul * botch the header checksum on the 1-byte fragment. 1282c8bca6dcSBill Paul * As long as the datagram contains 4 or more bytes 1283c8bca6dcSBill Paul * of data, you're ok. 1284c8bca6dcSBill Paul * 1285c8bca6dcSBill Paul * The following code attempts to work around this 1286c8bca6dcSBill Paul * problem: if the datagram is less than 38 bytes 1287c8bca6dcSBill Paul * in size (14 bytes ether header, 20 bytes IP header, 1288c8bca6dcSBill Paul * plus 4 bytes of data), we punt and compute the IP 1289c8bca6dcSBill Paul * header checksum by hand. This workaround doesn't 1290c8bca6dcSBill Paul * work very well, however, since it can be fooled 1291c8bca6dcSBill Paul * by things like VLAN tags and IP options that make 1292c8bca6dcSBill Paul * the header sizes/offsets vary. 1293c8bca6dcSBill Paul */ 1294c8bca6dcSBill Paul 1295c8bca6dcSBill Paul if (mb_head->m_pkthdr.csum_flags & CSUM_IP) { 1296c8bca6dcSBill Paul if (mb_head->m_pkthdr.len < 38) { 1297c8bca6dcSBill Paul struct ip *ip; 1298c8bca6dcSBill Paul mb_head->m_data += ETHER_HDR_LEN; 1299c8bca6dcSBill Paul ip = mtod(mb_head, struct ip *); 1300c8bca6dcSBill Paul ip->ip_sum = in_cksum(mb_head, 1301c8bca6dcSBill Paul ip->ip_hl << 2); 1302c8bca6dcSBill Paul mb_head->m_data -= ETHER_HDR_LEN; 1303c8bca6dcSBill Paul } else { 1304b2badf02SMaxime Henrion txp->tx_cb->ipcb_ip_activation_high = 1305c8bca6dcSBill Paul FXP_IPCB_HARDWAREPARSING_ENABLE; 1306b2badf02SMaxime Henrion txp->tx_cb->ipcb_ip_schedule |= 1307c8bca6dcSBill Paul FXP_IPCB_IP_CHECKSUM_ENABLE; 1308c8bca6dcSBill Paul } 1309c8bca6dcSBill Paul } 1310c8bca6dcSBill Paul #endif 1311c8bca6dcSBill Paul } 1312c8bca6dcSBill Paul 1313c8bca6dcSBill Paul /* 1314a17c678eSDavid Greenman * Go through each of the mbufs in the chain and initialize 1315483b9871SDavid Greenman * the transmit buffer descriptors with the physical address 1316a17c678eSDavid Greenman * and size of the mbuf. 1317a17c678eSDavid Greenman */ 1318b2badf02SMaxime Henrion error = bus_dmamap_load_mbuf(sc->fxp_mtag, txp->tx_map, 1319b2badf02SMaxime Henrion mb_head, fxp_dma_map_txbuf, sc, 0); 1320b2badf02SMaxime Henrion 1321b2badf02SMaxime Henrion if (error && error != EFBIG) { 1322b2badf02SMaxime Henrion device_printf(sc->dev, "can't map mbuf (error %d)\n", 1323b2badf02SMaxime Henrion error); 1324b2badf02SMaxime Henrion m_freem(mb_head); 1325a17c678eSDavid Greenman break; 1326a17c678eSDavid Greenman } 1327b2badf02SMaxime Henrion 1328b2badf02SMaxime Henrion if (error) { 132923a0ed7cSDavid Greenman struct mbuf *mn; 133023a0ed7cSDavid Greenman 1331a17c678eSDavid Greenman /* 13323bd07cfdSJonathan Lemon * We ran out of segments. We have to recopy this 13333bd07cfdSJonathan Lemon * mbuf chain first. Bail out if we can't get the 13343bd07cfdSJonathan Lemon * new buffers. 1335a17c678eSDavid Greenman */ 1336a163d034SWarner Losh MGETHDR(mn, M_DONTWAIT, MT_DATA); 133723a0ed7cSDavid Greenman if (mn == NULL) { 133823a0ed7cSDavid Greenman m_freem(mb_head); 1339483b9871SDavid Greenman break; 1340a17c678eSDavid Greenman } 134123a0ed7cSDavid Greenman if (mb_head->m_pkthdr.len > MHLEN) { 1342a163d034SWarner Losh MCLGET(mn, M_DONTWAIT); 134323a0ed7cSDavid Greenman if ((mn->m_flags & M_EXT) == 0) { 134423a0ed7cSDavid Greenman m_freem(mn); 134523a0ed7cSDavid Greenman m_freem(mb_head); 1346483b9871SDavid Greenman break; 134723a0ed7cSDavid Greenman } 134823a0ed7cSDavid Greenman } 1349ba8c6fd5SDavid Greenman m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 1350ba8c6fd5SDavid Greenman mtod(mn, caddr_t)); 135123a0ed7cSDavid Greenman mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 135223a0ed7cSDavid Greenman m_freem(mb_head); 135323a0ed7cSDavid Greenman mb_head = mn; 1354b2badf02SMaxime Henrion error = bus_dmamap_load_mbuf(sc->fxp_mtag, txp->tx_map, 1355b2badf02SMaxime Henrion mb_head, fxp_dma_map_txbuf, sc, 0); 1356b2badf02SMaxime Henrion if (error) { 1357b2badf02SMaxime Henrion device_printf(sc->dev, 1358b2badf02SMaxime Henrion "can't map mbuf (error %d)\n", error); 1359b2badf02SMaxime Henrion m_freem(mb_head); 1360b2badf02SMaxime Henrion break; 1361b2badf02SMaxime Henrion } 136223a0ed7cSDavid Greenman } 136323a0ed7cSDavid Greenman 1364b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, txp->tx_map, 1365b2badf02SMaxime Henrion BUS_DMASYNC_PREWRITE); 1366b2badf02SMaxime Henrion 1367b2badf02SMaxime Henrion txp->tx_mbuf = mb_head; 1368b2badf02SMaxime Henrion txp->tx_cb->cb_status = 0; 1369b2badf02SMaxime Henrion txp->tx_cb->byte_count = 0; 13703114fdb4SDavid Greenman if (sc->tx_queued != FXP_CXINT_THRESH - 1) { 1371b2badf02SMaxime Henrion txp->tx_cb->cb_command = 1372c8bca6dcSBill Paul sc->tx_cmd | FXP_CB_COMMAND_SF | 13733bd07cfdSJonathan Lemon FXP_CB_COMMAND_S; 13743114fdb4SDavid Greenman } else { 1375b2badf02SMaxime Henrion txp->tx_cb->cb_command = 1376c8bca6dcSBill Paul sc->tx_cmd | FXP_CB_COMMAND_SF | 13773bd07cfdSJonathan Lemon FXP_CB_COMMAND_S | FXP_CB_COMMAND_I; 13783114fdb4SDavid Greenman /* 13793bd07cfdSJonathan Lemon * Set a 5 second timer just in case we don't hear 13803bd07cfdSJonathan Lemon * from the card again. 13813114fdb4SDavid Greenman */ 13823114fdb4SDavid Greenman ifp->if_timer = 5; 13833114fdb4SDavid Greenman } 1384b2badf02SMaxime Henrion txp->tx_cb->tx_threshold = tx_threshold; 1385a17c678eSDavid Greenman 1386a17c678eSDavid Greenman /* 1387483b9871SDavid Greenman * Advance the end of list forward. 1388a17c678eSDavid Greenman */ 138906175228SAndrew Gallatin 139006175228SAndrew Gallatin #ifdef __alpha__ 139106175228SAndrew Gallatin /* 139206175228SAndrew Gallatin * On platforms which can't access memory in 16-bit 139306175228SAndrew Gallatin * granularities, we must prevent the card from DMA'ing 139406175228SAndrew Gallatin * up the status while we update the command field. 139506175228SAndrew Gallatin * This could cause us to overwrite the completion status. 139606175228SAndrew Gallatin */ 1397b2badf02SMaxime Henrion atomic_clear_short(&sc->fxp_desc.tx_last->tx_cb->cb_command, 139806175228SAndrew Gallatin FXP_CB_COMMAND_S); 139906175228SAndrew Gallatin #else 1400b2badf02SMaxime Henrion sc->fxp_desc.tx_last->tx_cb->cb_command &= ~FXP_CB_COMMAND_S; 140106175228SAndrew Gallatin #endif /*__alpha__*/ 1402b2badf02SMaxime Henrion sc->fxp_desc.tx_last = txp; 1403a17c678eSDavid Greenman 1404a17c678eSDavid Greenman /* 14051cd443acSDavid Greenman * Advance the beginning of the list forward if there are 1406b2badf02SMaxime Henrion * no other packets queued (when nothing is queued, tx_first 1407483b9871SDavid Greenman * sits on the last TxCB that was sent out). 1408a17c678eSDavid Greenman */ 14091cd443acSDavid Greenman if (sc->tx_queued == 0) 1410b2badf02SMaxime Henrion sc->fxp_desc.tx_first = txp; 1411a17c678eSDavid Greenman 14121cd443acSDavid Greenman sc->tx_queued++; 14131cd443acSDavid Greenman 1414a17c678eSDavid Greenman /* 1415a17c678eSDavid Greenman * Pass packet to bpf if there is a listener. 1416a17c678eSDavid Greenman */ 1417673d9191SSam Leffler BPF_MTAP(ifp, mb_head); 1418483b9871SDavid Greenman } 1419b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 1420483b9871SDavid Greenman 1421483b9871SDavid Greenman /* 1422483b9871SDavid Greenman * We're finished. If we added to the list, issue a RESUME to get DMA 1423483b9871SDavid Greenman * going again if suspended. 1424483b9871SDavid Greenman */ 1425483b9871SDavid Greenman if (txp != NULL) { 1426483b9871SDavid Greenman fxp_scb_wait(sc); 14272e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_RESUME); 1428483b9871SDavid Greenman } 1429a17c678eSDavid Greenman } 1430a17c678eSDavid Greenman 1431e4fc250cSLuigi Rizzo static void fxp_intr_body(struct fxp_softc *sc, u_int8_t statack, int count); 1432e4fc250cSLuigi Rizzo 1433e4fc250cSLuigi Rizzo #ifdef DEVICE_POLLING 1434e4fc250cSLuigi Rizzo static poll_handler_t fxp_poll; 1435e4fc250cSLuigi Rizzo 1436e4fc250cSLuigi Rizzo static void 1437e4fc250cSLuigi Rizzo fxp_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) 1438e4fc250cSLuigi Rizzo { 1439e4fc250cSLuigi Rizzo struct fxp_softc *sc = ifp->if_softc; 1440e4fc250cSLuigi Rizzo u_int8_t statack; 1441e4fc250cSLuigi Rizzo 1442e4fc250cSLuigi Rizzo if (cmd == POLL_DEREGISTER) { /* final call, enable interrupts */ 1443e4fc250cSLuigi Rizzo CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, 0); 1444e4fc250cSLuigi Rizzo return; 1445e4fc250cSLuigi Rizzo } 1446e4fc250cSLuigi Rizzo statack = FXP_SCB_STATACK_CXTNO | FXP_SCB_STATACK_CNA | 1447e4fc250cSLuigi Rizzo FXP_SCB_STATACK_FR; 1448e4fc250cSLuigi Rizzo if (cmd == POLL_AND_CHECK_STATUS) { 1449e4fc250cSLuigi Rizzo u_int8_t tmp; 14506481f301SPeter Wemm 1451e4fc250cSLuigi Rizzo tmp = CSR_READ_1(sc, FXP_CSR_SCB_STATACK); 1452e4fc250cSLuigi Rizzo if (tmp == 0xff || tmp == 0) 1453e4fc250cSLuigi Rizzo return; /* nothing to do */ 1454e4fc250cSLuigi Rizzo tmp &= ~statack; 1455e4fc250cSLuigi Rizzo /* ack what we can */ 1456e4fc250cSLuigi Rizzo if (tmp != 0) 1457e4fc250cSLuigi Rizzo CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, tmp); 1458e4fc250cSLuigi Rizzo statack |= tmp; 1459e4fc250cSLuigi Rizzo } 1460e4fc250cSLuigi Rizzo fxp_intr_body(sc, statack, count); 1461e4fc250cSLuigi Rizzo } 1462e4fc250cSLuigi Rizzo #endif /* DEVICE_POLLING */ 1463e4fc250cSLuigi Rizzo 1464a17c678eSDavid Greenman /* 14659c7d2607SDavid Greenman * Process interface interrupts. 1466a17c678eSDavid Greenman */ 146794927790SDavid Greenman static void 1468f7788e8eSJonathan Lemon fxp_intr(void *xsc) 1469a17c678eSDavid Greenman { 1470f7788e8eSJonathan Lemon struct fxp_softc *sc = xsc; 14711cd443acSDavid Greenman u_int8_t statack; 14720f4dc94cSChuck Paterson 1473e4fc250cSLuigi Rizzo #ifdef DEVICE_POLLING 1474e4fc250cSLuigi Rizzo struct ifnet *ifp = &sc->sc_if; 1475e4fc250cSLuigi Rizzo 147662f76486SMaxim Sobolev if (ifp->if_flags & IFF_POLLING) 1477e4fc250cSLuigi Rizzo return; 1478e4fc250cSLuigi Rizzo if (ether_poll_register(fxp_poll, ifp)) { 1479e4fc250cSLuigi Rizzo /* disable interrupts */ 1480e4fc250cSLuigi Rizzo CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, FXP_SCB_INTR_DISABLE); 1481e4fc250cSLuigi Rizzo fxp_poll(ifp, 0, 1); 1482e4fc250cSLuigi Rizzo return; 1483e4fc250cSLuigi Rizzo } 1484e4fc250cSLuigi Rizzo #endif 1485e4fc250cSLuigi Rizzo 1486b184b38eSDavid Greenman if (sc->suspended) { 1487b184b38eSDavid Greenman return; 1488b184b38eSDavid Greenman } 1489b184b38eSDavid Greenman 1490b184b38eSDavid Greenman while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) { 1491a17c678eSDavid Greenman /* 149211457bbfSJonathan Lemon * It should not be possible to have all bits set; the 149311457bbfSJonathan Lemon * FXP_SCB_INTR_SWI bit always returns 0 on a read. If 149411457bbfSJonathan Lemon * all bits are set, this may indicate that the card has 149511457bbfSJonathan Lemon * been physically ejected, so ignore it. 149611457bbfSJonathan Lemon */ 149711457bbfSJonathan Lemon if (statack == 0xff) 149811457bbfSJonathan Lemon return; 149911457bbfSJonathan Lemon 150011457bbfSJonathan Lemon /* 1501a17c678eSDavid Greenman * First ACK all the interrupts in this pass. 1502a17c678eSDavid Greenman */ 1503ba8c6fd5SDavid Greenman CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack); 1504e4fc250cSLuigi Rizzo fxp_intr_body(sc, statack, -1); 1505e4fc250cSLuigi Rizzo } 1506e4fc250cSLuigi Rizzo } 1507e4fc250cSLuigi Rizzo 1508e4fc250cSLuigi Rizzo static void 1509b2badf02SMaxime Henrion fxp_txeof(struct fxp_softc *sc) 1510b2badf02SMaxime Henrion { 1511b2badf02SMaxime Henrion struct fxp_tx *txp; 1512b2badf02SMaxime Henrion 1513b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREREAD); 1514b2badf02SMaxime Henrion for (txp = sc->fxp_desc.tx_first; sc->tx_queued && 1515b2badf02SMaxime Henrion (txp->tx_cb->cb_status & FXP_CB_STATUS_C) != 0; 1516b2badf02SMaxime Henrion txp = txp->tx_next) { 1517b2badf02SMaxime Henrion if (txp->tx_mbuf != NULL) { 1518b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, txp->tx_map, 1519b2badf02SMaxime Henrion BUS_DMASYNC_POSTWRITE); 1520b2badf02SMaxime Henrion bus_dmamap_unload(sc->fxp_mtag, txp->tx_map); 1521b2badf02SMaxime Henrion m_freem(txp->tx_mbuf); 1522b2badf02SMaxime Henrion txp->tx_mbuf = NULL; 1523b2badf02SMaxime Henrion /* clear this to reset csum offload bits */ 1524b2badf02SMaxime Henrion txp->tx_cb->tbd[0].tb_addr = 0; 1525b2badf02SMaxime Henrion } 1526b2badf02SMaxime Henrion sc->tx_queued--; 1527b2badf02SMaxime Henrion } 1528b2badf02SMaxime Henrion sc->fxp_desc.tx_first = txp; 1529b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 1530b2badf02SMaxime Henrion } 1531b2badf02SMaxime Henrion 1532b2badf02SMaxime Henrion static void 1533e4fc250cSLuigi Rizzo fxp_intr_body(struct fxp_softc *sc, u_int8_t statack, int count) 1534e4fc250cSLuigi Rizzo { 1535e4fc250cSLuigi Rizzo struct ifnet *ifp = &sc->sc_if; 15362b5989e9SLuigi Rizzo struct mbuf *m; 1537b2badf02SMaxime Henrion struct fxp_rx *rxp; 15382b5989e9SLuigi Rizzo struct fxp_rfa *rfa; 15392b5989e9SLuigi Rizzo int rnr = (statack & FXP_SCB_STATACK_RNR) ? 1 : 0; 15402b5989e9SLuigi Rizzo 15412b5989e9SLuigi Rizzo if (rnr) 15422b5989e9SLuigi Rizzo fxp_rnr++; 1543947e3815SIan Dowse #ifdef DEVICE_POLLING 1544947e3815SIan Dowse /* Pick up a deferred RNR condition if `count' ran out last time. */ 1545947e3815SIan Dowse if (sc->flags & FXP_FLAG_DEFERRED_RNR) { 1546947e3815SIan Dowse sc->flags &= ~FXP_FLAG_DEFERRED_RNR; 1547947e3815SIan Dowse rnr = 1; 1548947e3815SIan Dowse } 1549947e3815SIan Dowse #endif 1550a17c678eSDavid Greenman 1551a17c678eSDavid Greenman /* 15523114fdb4SDavid Greenman * Free any finished transmit mbuf chains. 155306936301SBill Paul * 155406936301SBill Paul * Handle the CNA event likt a CXTNO event. It used to 155506936301SBill Paul * be that this event (control unit not ready) was not 155606936301SBill Paul * encountered, but it is now with the SMPng modifications. 155706936301SBill Paul * The exact sequence of events that occur when the interface 155806936301SBill Paul * is brought up are different now, and if this event 155906936301SBill Paul * goes unhandled, the configuration/rxfilter setup sequence 156006936301SBill Paul * can stall for several seconds. The result is that no 156106936301SBill Paul * packets go out onto the wire for about 5 to 10 seconds 156206936301SBill Paul * after the interface is ifconfig'ed for the first time. 15633114fdb4SDavid Greenman */ 156406936301SBill Paul if (statack & (FXP_SCB_STATACK_CXTNO | FXP_SCB_STATACK_CNA)) { 1565b2badf02SMaxime Henrion fxp_txeof(sc); 15663114fdb4SDavid Greenman 156741aa0ba2SLuigi Rizzo ifp->if_timer = 0; 1568e2102ae4SMike Silbersack if (sc->tx_queued == 0) { 15693114fdb4SDavid Greenman if (sc->need_mcsetup) 15703114fdb4SDavid Greenman fxp_mc_setup(sc); 1571e2102ae4SMike Silbersack } 15723114fdb4SDavid Greenman /* 15733114fdb4SDavid Greenman * Try to start more packets transmitting. 15743114fdb4SDavid Greenman */ 15753114fdb4SDavid Greenman if (ifp->if_snd.ifq_head != NULL) 15763114fdb4SDavid Greenman fxp_start(ifp); 15773114fdb4SDavid Greenman } 15782b5989e9SLuigi Rizzo 15792b5989e9SLuigi Rizzo /* 15802b5989e9SLuigi Rizzo * Just return if nothing happened on the receive side. 15812b5989e9SLuigi Rizzo */ 1582947e3815SIan Dowse if (!rnr && (statack & FXP_SCB_STATACK_FR) == 0) 15832b5989e9SLuigi Rizzo return; 15842b5989e9SLuigi Rizzo 15853114fdb4SDavid Greenman /* 1586a17c678eSDavid Greenman * Process receiver interrupts. If a no-resource (RNR) 1587a17c678eSDavid Greenman * condition exists, get whatever packets we can and 1588a17c678eSDavid Greenman * re-start the receiver. 1589947e3815SIan Dowse * 15902b5989e9SLuigi Rizzo * When using polling, we do not process the list to completion, 15912b5989e9SLuigi Rizzo * so when we get an RNR interrupt we must defer the restart 15922b5989e9SLuigi Rizzo * until we hit the last buffer with the C bit set. 15932b5989e9SLuigi Rizzo * If we run out of cycles and rfa_headm has the C bit set, 1594947e3815SIan Dowse * record the pending RNR in the FXP_FLAG_DEFERRED_RNR flag so 1595947e3815SIan Dowse * that the info will be used in the subsequent polling cycle. 1596a17c678eSDavid Greenman */ 15972b5989e9SLuigi Rizzo for (;;) { 1598b2badf02SMaxime Henrion rxp = sc->fxp_desc.rx_head; 1599b2badf02SMaxime Henrion m = rxp->rx_mbuf; 1600ba8c6fd5SDavid Greenman rfa = (struct fxp_rfa *)(m->m_ext.ext_buf + 1601ba8c6fd5SDavid Greenman RFA_ALIGNMENT_FUDGE); 1602b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, rxp->rx_map, 1603b2badf02SMaxime Henrion BUS_DMASYNC_POSTREAD); 1604a17c678eSDavid Greenman 1605e4fc250cSLuigi Rizzo #ifdef DEVICE_POLLING /* loop at most count times if count >=0 */ 1606947e3815SIan Dowse if (count >= 0 && count-- == 0) { 1607947e3815SIan Dowse if (rnr) { 1608947e3815SIan Dowse /* Defer RNR processing until the next time. */ 1609947e3815SIan Dowse sc->flags |= FXP_FLAG_DEFERRED_RNR; 1610947e3815SIan Dowse rnr = 0; 1611947e3815SIan Dowse } 16122b5989e9SLuigi Rizzo break; 1613947e3815SIan Dowse } 16142b5989e9SLuigi Rizzo #endif /* DEVICE_POLLING */ 16152b5989e9SLuigi Rizzo 16162b5989e9SLuigi Rizzo if ((rfa->rfa_status & FXP_RFA_STATUS_C) == 0) 16172b5989e9SLuigi Rizzo break; 16182b5989e9SLuigi Rizzo 1619dfe61cf1SDavid Greenman /* 1620b2badf02SMaxime Henrion * Advance head forward. 1621dfe61cf1SDavid Greenman */ 1622b2badf02SMaxime Henrion sc->fxp_desc.rx_head = rxp->rx_next; 1623a17c678eSDavid Greenman 1624dfe61cf1SDavid Greenman /* 1625ba8c6fd5SDavid Greenman * Add a new buffer to the receive chain. 1626ba8c6fd5SDavid Greenman * If this fails, the old buffer is recycled 1627ba8c6fd5SDavid Greenman * instead. 1628dfe61cf1SDavid Greenman */ 1629b2badf02SMaxime Henrion if (fxp_add_rfabuf(sc, rxp) == 0) { 1630aed53495SDavid Greenman int total_len; 1631a17c678eSDavid Greenman 1632e8c8b728SJonathan Lemon /* 16332b5989e9SLuigi Rizzo * Fetch packet length (the top 2 bits of 16342b5989e9SLuigi Rizzo * actual_size are flags set by the controller 16352b5989e9SLuigi Rizzo * upon completion), and drop the packet in case 16362b5989e9SLuigi Rizzo * of bogus length or CRC errors. 1637e8c8b728SJonathan Lemon */ 16382b5989e9SLuigi Rizzo total_len = rfa->actual_size & 0x3fff; 16392b5989e9SLuigi Rizzo if (total_len < sizeof(struct ether_header) || 16402b5989e9SLuigi Rizzo total_len > MCLBYTES - RFA_ALIGNMENT_FUDGE - 1641b2badf02SMaxime Henrion sc->rfa_size || 16422b5989e9SLuigi Rizzo rfa->rfa_status & FXP_RFA_STATUS_CRC) { 1643e8c8b728SJonathan Lemon m_freem(m); 16442b5989e9SLuigi Rizzo continue; 1645e8c8b728SJonathan Lemon } 1646920b58e8SBrooks Davis 1647c8bca6dcSBill Paul /* Do IP checksum checking. */ 1648c8bca6dcSBill Paul if (rfa->rfa_status & FXP_RFA_STATUS_PARSE) { 1649c8bca6dcSBill Paul if (rfa->rfax_csum_sts & 1650c8bca6dcSBill Paul FXP_RFDX_CS_IP_CSUM_BIT_VALID) 1651c8bca6dcSBill Paul m->m_pkthdr.csum_flags |= 1652c8bca6dcSBill Paul CSUM_IP_CHECKED; 1653c8bca6dcSBill Paul if (rfa->rfax_csum_sts & 1654c8bca6dcSBill Paul FXP_RFDX_CS_IP_CSUM_VALID) 1655c8bca6dcSBill Paul m->m_pkthdr.csum_flags |= 1656c8bca6dcSBill Paul CSUM_IP_VALID; 1657c8bca6dcSBill Paul if ((rfa->rfax_csum_sts & 1658c8bca6dcSBill Paul FXP_RFDX_CS_TCPUDP_CSUM_BIT_VALID) && 1659c8bca6dcSBill Paul (rfa->rfax_csum_sts & 1660c8bca6dcSBill Paul FXP_RFDX_CS_TCPUDP_CSUM_VALID)) { 1661c8bca6dcSBill Paul m->m_pkthdr.csum_flags |= 1662c8bca6dcSBill Paul CSUM_DATA_VALID|CSUM_PSEUDO_HDR; 1663c8bca6dcSBill Paul m->m_pkthdr.csum_data = 0xffff; 1664c8bca6dcSBill Paul } 1665c8bca6dcSBill Paul } 1666c8bca6dcSBill Paul 16672e2de7f2SArchie Cobbs m->m_pkthdr.len = m->m_len = total_len; 1668673d9191SSam Leffler m->m_pkthdr.rcvif = ifp; 1669673d9191SSam Leffler 1670673d9191SSam Leffler (*ifp->if_input)(ifp, m); 1671a17c678eSDavid Greenman } 1672a17c678eSDavid Greenman } 16732b5989e9SLuigi Rizzo if (rnr) { 1674ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 1675ba8c6fd5SDavid Greenman CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 1676b2badf02SMaxime Henrion sc->fxp_desc.rx_head->rx_addr); 16772e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_RU_START); 1678a17c678eSDavid Greenman } 1679a17c678eSDavid Greenman } 1680a17c678eSDavid Greenman 1681dfe61cf1SDavid Greenman /* 1682dfe61cf1SDavid Greenman * Update packet in/out/collision statistics. The i82557 doesn't 1683dfe61cf1SDavid Greenman * allow you to access these counters without doing a fairly 1684dfe61cf1SDavid Greenman * expensive DMA to get _all_ of the statistics it maintains, so 1685dfe61cf1SDavid Greenman * we do this operation here only once per second. The statistics 1686dfe61cf1SDavid Greenman * counters in the kernel are updated from the previous dump-stats 1687dfe61cf1SDavid Greenman * DMA and then a new dump-stats DMA is started. The on-chip 1688dfe61cf1SDavid Greenman * counters are zeroed when the DMA completes. If we can't start 1689dfe61cf1SDavid Greenman * the DMA immediately, we don't wait - we just prepare to read 1690dfe61cf1SDavid Greenman * them again next time. 1691dfe61cf1SDavid Greenman */ 1692303b270bSEivind Eklund static void 1693f7788e8eSJonathan Lemon fxp_tick(void *xsc) 1694a17c678eSDavid Greenman { 1695f7788e8eSJonathan Lemon struct fxp_softc *sc = xsc; 1696ba8c6fd5SDavid Greenman struct ifnet *ifp = &sc->sc_if; 1697a17c678eSDavid Greenman struct fxp_stats *sp = sc->fxp_stats; 1698f7788e8eSJonathan Lemon int s; 1699a17c678eSDavid Greenman 1700b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_stag, sc->fxp_smap, BUS_DMASYNC_POSTREAD); 1701a17c678eSDavid Greenman ifp->if_opackets += sp->tx_good; 1702a17c678eSDavid Greenman ifp->if_collisions += sp->tx_total_collisions; 1703397f9dfeSDavid Greenman if (sp->rx_good) { 1704397f9dfeSDavid Greenman ifp->if_ipackets += sp->rx_good; 1705397f9dfeSDavid Greenman sc->rx_idle_secs = 0; 1706397f9dfeSDavid Greenman } else { 1707c8cc6fcaSDavid Greenman /* 1708c8cc6fcaSDavid Greenman * Receiver's been idle for another second. 1709c8cc6fcaSDavid Greenman */ 1710397f9dfeSDavid Greenman sc->rx_idle_secs++; 1711397f9dfeSDavid Greenman } 17123ba65732SDavid Greenman ifp->if_ierrors += 17133ba65732SDavid Greenman sp->rx_crc_errors + 17143ba65732SDavid Greenman sp->rx_alignment_errors + 17153ba65732SDavid Greenman sp->rx_rnr_errors + 17166e39e599SDavid Greenman sp->rx_overrun_errors; 1717a17c678eSDavid Greenman /* 1718f9be9005SDavid Greenman * If any transmit underruns occured, bump up the transmit 1719f9be9005SDavid Greenman * threshold by another 512 bytes (64 * 8). 1720f9be9005SDavid Greenman */ 1721f9be9005SDavid Greenman if (sp->tx_underruns) { 1722f9be9005SDavid Greenman ifp->if_oerrors += sp->tx_underruns; 1723f9be9005SDavid Greenman if (tx_threshold < 192) 1724f9be9005SDavid Greenman tx_threshold += 64; 1725f9be9005SDavid Greenman } 1726f7788e8eSJonathan Lemon s = splimp(); 1727397f9dfeSDavid Greenman /* 1728c8cc6fcaSDavid Greenman * Release any xmit buffers that have completed DMA. This isn't 1729c8cc6fcaSDavid Greenman * strictly necessary to do here, but it's advantagous for mbufs 1730c8cc6fcaSDavid Greenman * with external storage to be released in a timely manner rather 1731c8cc6fcaSDavid Greenman * than being defered for a potentially long time. This limits 1732c8cc6fcaSDavid Greenman * the delay to a maximum of one second. 1733c8cc6fcaSDavid Greenman */ 1734b2badf02SMaxime Henrion fxp_txeof(sc); 1735b2badf02SMaxime Henrion 1736c8cc6fcaSDavid Greenman /* 1737397f9dfeSDavid Greenman * If we haven't received any packets in FXP_MAC_RX_IDLE seconds, 1738397f9dfeSDavid Greenman * then assume the receiver has locked up and attempt to clear 1739397f9dfeSDavid Greenman * the condition by reprogramming the multicast filter. This is 1740397f9dfeSDavid Greenman * a work-around for a bug in the 82557 where the receiver locks 1741397f9dfeSDavid Greenman * up if it gets certain types of garbage in the syncronization 1742397f9dfeSDavid Greenman * bits prior to the packet header. This bug is supposed to only 1743397f9dfeSDavid Greenman * occur in 10Mbps mode, but has been seen to occur in 100Mbps 1744397f9dfeSDavid Greenman * mode as well (perhaps due to a 10/100 speed transition). 1745397f9dfeSDavid Greenman */ 1746397f9dfeSDavid Greenman if (sc->rx_idle_secs > FXP_MAX_RX_IDLE) { 1747397f9dfeSDavid Greenman sc->rx_idle_secs = 0; 1748397f9dfeSDavid Greenman fxp_mc_setup(sc); 1749397f9dfeSDavid Greenman } 1750f9be9005SDavid Greenman /* 17513ba65732SDavid Greenman * If there is no pending command, start another stats 17523ba65732SDavid Greenman * dump. Otherwise punt for now. 1753a17c678eSDavid Greenman */ 1754397f9dfeSDavid Greenman if (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) == 0) { 1755a17c678eSDavid Greenman /* 1756397f9dfeSDavid Greenman * Start another stats dump. 1757a17c678eSDavid Greenman */ 1758b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_stag, sc->fxp_smap, 1759b2badf02SMaxime Henrion BUS_DMASYNC_PREREAD); 17602e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_DUMPRESET); 1761dfe61cf1SDavid Greenman } else { 1762dfe61cf1SDavid Greenman /* 1763dfe61cf1SDavid Greenman * A previous command is still waiting to be accepted. 1764dfe61cf1SDavid Greenman * Just zero our copy of the stats and wait for the 17653ba65732SDavid Greenman * next timer event to update them. 1766dfe61cf1SDavid Greenman */ 1767dfe61cf1SDavid Greenman sp->tx_good = 0; 1768f9be9005SDavid Greenman sp->tx_underruns = 0; 1769dfe61cf1SDavid Greenman sp->tx_total_collisions = 0; 17703ba65732SDavid Greenman 1771dfe61cf1SDavid Greenman sp->rx_good = 0; 17723ba65732SDavid Greenman sp->rx_crc_errors = 0; 17733ba65732SDavid Greenman sp->rx_alignment_errors = 0; 17743ba65732SDavid Greenman sp->rx_rnr_errors = 0; 17753ba65732SDavid Greenman sp->rx_overrun_errors = 0; 1776dfe61cf1SDavid Greenman } 1777f7788e8eSJonathan Lemon if (sc->miibus != NULL) 1778f7788e8eSJonathan Lemon mii_tick(device_get_softc(sc->miibus)); 177974396a0aSJonathan Lemon splx(s); 1780a17c678eSDavid Greenman /* 1781a17c678eSDavid Greenman * Schedule another timeout one second from now. 1782a17c678eSDavid Greenman */ 1783f7788e8eSJonathan Lemon sc->stat_ch = timeout(fxp_tick, sc, hz); 1784a17c678eSDavid Greenman } 1785a17c678eSDavid Greenman 1786a17c678eSDavid Greenman /* 1787a17c678eSDavid Greenman * Stop the interface. Cancels the statistics updater and resets 1788a17c678eSDavid Greenman * the interface. 1789a17c678eSDavid Greenman */ 1790a17c678eSDavid Greenman static void 1791f7788e8eSJonathan Lemon fxp_stop(struct fxp_softc *sc) 1792a17c678eSDavid Greenman { 1793ba8c6fd5SDavid Greenman struct ifnet *ifp = &sc->sc_if; 1794b2badf02SMaxime Henrion struct fxp_tx *txp; 17953ba65732SDavid Greenman int i; 1796a17c678eSDavid Greenman 17977dced78aSDavid Greenman ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 17987dced78aSDavid Greenman ifp->if_timer = 0; 17997dced78aSDavid Greenman 1800e4fc250cSLuigi Rizzo #ifdef DEVICE_POLLING 1801e4fc250cSLuigi Rizzo ether_poll_deregister(ifp); 1802e4fc250cSLuigi Rizzo #endif 1803a17c678eSDavid Greenman /* 1804a17c678eSDavid Greenman * Cancel stats updater. 1805a17c678eSDavid Greenman */ 1806f7788e8eSJonathan Lemon untimeout(fxp_tick, sc, sc->stat_ch); 18073ba65732SDavid Greenman 18083ba65732SDavid Greenman /* 180972a32a26SJonathan Lemon * Issue software reset, which also unloads the microcode. 18103ba65732SDavid Greenman */ 181172a32a26SJonathan Lemon sc->flags &= ~FXP_FLAG_UCODE; 181209882363SJonathan Lemon CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SOFTWARE_RESET); 181372a32a26SJonathan Lemon DELAY(50); 1814a17c678eSDavid Greenman 18153ba65732SDavid Greenman /* 18163ba65732SDavid Greenman * Release any xmit buffers. 18173ba65732SDavid Greenman */ 1818b2badf02SMaxime Henrion txp = sc->fxp_desc.tx_list; 1819da91462dSDavid Greenman if (txp != NULL) { 1820da91462dSDavid Greenman for (i = 0; i < FXP_NTXCB; i++) { 1821b2badf02SMaxime Henrion if (txp[i].tx_mbuf != NULL) { 1822b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, txp[i].tx_map, 1823b2badf02SMaxime Henrion BUS_DMASYNC_POSTWRITE); 1824b2badf02SMaxime Henrion bus_dmamap_unload(sc->fxp_mtag, txp[i].tx_map); 1825b2badf02SMaxime Henrion m_freem(txp[i].tx_mbuf); 1826b2badf02SMaxime Henrion txp[i].tx_mbuf = NULL; 1827c8bca6dcSBill Paul /* clear this to reset csum offload bits */ 1828b2badf02SMaxime Henrion txp[i].tx_cb->tbd[0].tb_addr = 0; 1829da91462dSDavid Greenman } 1830da91462dSDavid Greenman } 18313ba65732SDavid Greenman } 1832b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 18333ba65732SDavid Greenman sc->tx_queued = 0; 1834a17c678eSDavid Greenman } 1835a17c678eSDavid Greenman 1836a17c678eSDavid Greenman /* 1837a17c678eSDavid Greenman * Watchdog/transmission transmit timeout handler. Called when a 1838a17c678eSDavid Greenman * transmission is started on the interface, but no interrupt is 1839a17c678eSDavid Greenman * received before the timeout. This usually indicates that the 1840a17c678eSDavid Greenman * card has wedged for some reason. 1841a17c678eSDavid Greenman */ 1842a17c678eSDavid Greenman static void 1843f7788e8eSJonathan Lemon fxp_watchdog(struct ifnet *ifp) 1844a17c678eSDavid Greenman { 1845ba8c6fd5SDavid Greenman struct fxp_softc *sc = ifp->if_softc; 1846ba8c6fd5SDavid Greenman 1847f7788e8eSJonathan Lemon device_printf(sc->dev, "device timeout\n"); 18484a5f1499SDavid Greenman ifp->if_oerrors++; 1849a17c678eSDavid Greenman 1850ba8c6fd5SDavid Greenman fxp_init(sc); 1851a17c678eSDavid Greenman } 1852a17c678eSDavid Greenman 1853a17c678eSDavid Greenman static void 1854f7788e8eSJonathan Lemon fxp_init(void *xsc) 1855a17c678eSDavid Greenman { 1856fb583156SDavid Greenman struct fxp_softc *sc = xsc; 1857ba8c6fd5SDavid Greenman struct ifnet *ifp = &sc->sc_if; 1858a17c678eSDavid Greenman struct fxp_cb_config *cbp; 1859a17c678eSDavid Greenman struct fxp_cb_ias *cb_ias; 1860b2badf02SMaxime Henrion struct fxp_cb_tx *tcbp; 1861b2badf02SMaxime Henrion struct fxp_tx *txp; 186209882363SJonathan Lemon struct fxp_cb_mcs *mcsp; 1863f7788e8eSJonathan Lemon int i, prm, s; 1864a17c678eSDavid Greenman 1865f7788e8eSJonathan Lemon s = splimp(); 1866a17c678eSDavid Greenman /* 18673ba65732SDavid Greenman * Cancel any pending I/O 1868a17c678eSDavid Greenman */ 18693ba65732SDavid Greenman fxp_stop(sc); 1870a17c678eSDavid Greenman 1871a17c678eSDavid Greenman prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0; 1872a17c678eSDavid Greenman 1873a17c678eSDavid Greenman /* 1874a17c678eSDavid Greenman * Initialize base of CBL and RFA memory. Loading with zero 1875a17c678eSDavid Greenman * sets it up for regular linear addressing. 1876a17c678eSDavid Greenman */ 1877ba8c6fd5SDavid Greenman CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0); 18782e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_BASE); 1879a17c678eSDavid Greenman 1880ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 18812e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_RU_BASE); 1882a17c678eSDavid Greenman 1883a17c678eSDavid Greenman /* 1884a17c678eSDavid Greenman * Initialize base of dump-stats buffer. 1885a17c678eSDavid Greenman */ 1886ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 1887b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_stag, sc->fxp_smap, BUS_DMASYNC_PREREAD); 1888b2badf02SMaxime Henrion CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->stats_addr); 18892e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_DUMP_ADR); 1890a17c678eSDavid Greenman 1891a17c678eSDavid Greenman /* 189272a32a26SJonathan Lemon * Attempt to load microcode if requested. 189372a32a26SJonathan Lemon */ 189472a32a26SJonathan Lemon if (ifp->if_flags & IFF_LINK0 && (sc->flags & FXP_FLAG_UCODE) == 0) 189572a32a26SJonathan Lemon fxp_load_ucode(sc); 189672a32a26SJonathan Lemon 189772a32a26SJonathan Lemon /* 189809882363SJonathan Lemon * Initialize the multicast address list. 189909882363SJonathan Lemon */ 190009882363SJonathan Lemon if (fxp_mc_addrs(sc)) { 190109882363SJonathan Lemon mcsp = sc->mcsp; 190209882363SJonathan Lemon mcsp->cb_status = 0; 190309882363SJonathan Lemon mcsp->cb_command = FXP_CB_COMMAND_MCAS | FXP_CB_COMMAND_EL; 190409882363SJonathan Lemon mcsp->link_addr = -1; 190509882363SJonathan Lemon /* 190609882363SJonathan Lemon * Start the multicast setup command. 190709882363SJonathan Lemon */ 190809882363SJonathan Lemon fxp_scb_wait(sc); 1909b2badf02SMaxime Henrion bus_dmamap_sync(sc->mcs_tag, sc->mcs_map, BUS_DMASYNC_PREWRITE); 1910b2badf02SMaxime Henrion CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->mcs_addr); 191109882363SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); 191209882363SJonathan Lemon /* ...and wait for it to complete. */ 191309882363SJonathan Lemon fxp_dma_wait(&mcsp->cb_status, sc); 1914b2badf02SMaxime Henrion bus_dmamap_sync(sc->mcs_tag, sc->mcs_map, 1915b2badf02SMaxime Henrion BUS_DMASYNC_POSTWRITE); 191609882363SJonathan Lemon } 191709882363SJonathan Lemon 191809882363SJonathan Lemon /* 1919a17c678eSDavid Greenman * We temporarily use memory that contains the TxCB list to 1920a17c678eSDavid Greenman * construct the config CB. The TxCB list memory is rebuilt 1921a17c678eSDavid Greenman * later. 1922a17c678eSDavid Greenman */ 1923b2badf02SMaxime Henrion cbp = (struct fxp_cb_config *)sc->fxp_desc.cbl_list; 1924a17c678eSDavid Greenman 1925a17c678eSDavid Greenman /* 1926a17c678eSDavid Greenman * This bcopy is kind of disgusting, but there are a bunch of must be 1927a17c678eSDavid Greenman * zero and must be one bits in this structure and this is the easiest 1928a17c678eSDavid Greenman * way to initialize them all to proper values. 1929a17c678eSDavid Greenman */ 1930b2badf02SMaxime Henrion bcopy(fxp_cb_config_template, cbp, sizeof(fxp_cb_config_template)); 1931a17c678eSDavid Greenman 1932a17c678eSDavid Greenman cbp->cb_status = 0; 1933a17c678eSDavid Greenman cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL; 1934a17c678eSDavid Greenman cbp->link_addr = -1; /* (no) next command */ 1935c8bca6dcSBill Paul cbp->byte_count = sc->flags & FXP_FLAG_EXT_RFA ? 32 : 22; 1936001696daSDavid Greenman cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */ 1937001696daSDavid Greenman cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */ 1938a17c678eSDavid Greenman cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */ 1939f7788e8eSJonathan Lemon cbp->mwi_enable = sc->flags & FXP_FLAG_MWI_ENABLE ? 1 : 0; 1940f7788e8eSJonathan Lemon cbp->type_enable = 0; /* actually reserved */ 1941f7788e8eSJonathan Lemon cbp->read_align_en = sc->flags & FXP_FLAG_READ_ALIGN ? 1 : 0; 1942f7788e8eSJonathan Lemon cbp->end_wr_on_cl = sc->flags & FXP_FLAG_WRITE_ALIGN ? 1 : 0; 1943001696daSDavid Greenman cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */ 1944001696daSDavid Greenman cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */ 1945f7788e8eSJonathan Lemon cbp->dma_mbce = 0; /* (disable) dma max counters */ 1946a17c678eSDavid Greenman cbp->late_scb = 0; /* (don't) defer SCB update */ 1947f7788e8eSJonathan Lemon cbp->direct_dma_dis = 1; /* disable direct rcv dma mode */ 1948f7788e8eSJonathan Lemon cbp->tno_int_or_tco_en =0; /* (disable) tx not okay interrupt */ 19493114fdb4SDavid Greenman cbp->ci_int = 1; /* interrupt on CU idle */ 1950f7788e8eSJonathan Lemon cbp->ext_txcb_dis = sc->flags & FXP_FLAG_EXT_TXCB ? 0 : 1; 1951f7788e8eSJonathan Lemon cbp->ext_stats_dis = 1; /* disable extended counters */ 1952f7788e8eSJonathan Lemon cbp->keep_overrun_rx = 0; /* don't pass overrun frames to host */ 195372a32a26SJonathan Lemon cbp->save_bf = sc->revision == FXP_REV_82557 ? 1 : prm; 1954a17c678eSDavid Greenman cbp->disc_short_rx = !prm; /* discard short packets */ 1955f7788e8eSJonathan Lemon cbp->underrun_retry = 1; /* retry mode (once) on DMA underrun */ 1956f7788e8eSJonathan Lemon cbp->two_frames = 0; /* do not limit FIFO to 2 frames */ 1957f7788e8eSJonathan Lemon cbp->dyn_tbd = 0; /* (no) dynamic TBD mode */ 1958c8bca6dcSBill Paul cbp->ext_rfa = sc->flags & FXP_FLAG_EXT_RFA ? 1 : 0; 1959f7788e8eSJonathan Lemon cbp->mediatype = sc->flags & FXP_FLAG_SERIAL_MEDIA ? 0 : 1; 1960f7788e8eSJonathan Lemon cbp->csma_dis = 0; /* (don't) disable link */ 1961f7788e8eSJonathan Lemon cbp->tcp_udp_cksum = 0; /* (don't) enable checksum */ 1962f7788e8eSJonathan Lemon cbp->vlan_tco = 0; /* (don't) enable vlan wakeup */ 1963f7788e8eSJonathan Lemon cbp->link_wake_en = 0; /* (don't) assert PME# on link change */ 1964f7788e8eSJonathan Lemon cbp->arp_wake_en = 0; /* (don't) assert PME# on arp */ 1965f7788e8eSJonathan Lemon cbp->mc_wake_en = 0; /* (don't) enable PME# on mcmatch */ 1966a17c678eSDavid Greenman cbp->nsai = 1; /* (don't) disable source addr insert */ 1967a17c678eSDavid Greenman cbp->preamble_length = 2; /* (7 byte) preamble */ 1968a17c678eSDavid Greenman cbp->loopback = 0; /* (don't) loopback */ 1969a17c678eSDavid Greenman cbp->linear_priority = 0; /* (normal CSMA/CD operation) */ 1970a17c678eSDavid Greenman cbp->linear_pri_mode = 0; /* (wait after xmit only) */ 1971a17c678eSDavid Greenman cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */ 1972a17c678eSDavid Greenman cbp->promiscuous = prm; /* promiscuous mode */ 1973a17c678eSDavid Greenman cbp->bcast_disable = 0; /* (don't) disable broadcasts */ 1974f7788e8eSJonathan Lemon cbp->wait_after_win = 0; /* (don't) enable modified backoff alg*/ 1975f7788e8eSJonathan Lemon cbp->ignore_ul = 0; /* consider U/L bit in IA matching */ 1976f7788e8eSJonathan Lemon cbp->crc16_en = 0; /* (don't) enable crc-16 algorithm */ 1977f7788e8eSJonathan Lemon cbp->crscdt = sc->flags & FXP_FLAG_SERIAL_MEDIA ? 1 : 0; 1978f7788e8eSJonathan Lemon 1979a17c678eSDavid Greenman cbp->stripping = !prm; /* truncate rx packet to byte count */ 1980a17c678eSDavid Greenman cbp->padding = 1; /* (do) pad short tx packets */ 1981a17c678eSDavid Greenman cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */ 1982f7788e8eSJonathan Lemon cbp->long_rx_en = sc->flags & FXP_FLAG_LONG_PKT_EN ? 1 : 0; 1983f7788e8eSJonathan Lemon cbp->ia_wake_en = 0; /* (don't) wake up on address match */ 1984f7788e8eSJonathan Lemon cbp->magic_pkt_dis = 0; /* (don't) disable magic packet */ 1985f7788e8eSJonathan Lemon /* must set wake_en in PMCSR also */ 1986a17c678eSDavid Greenman cbp->force_fdx = 0; /* (don't) force full duplex */ 19873ba65732SDavid Greenman cbp->fdx_pin_en = 1; /* (enable) FDX# pin */ 1988a17c678eSDavid Greenman cbp->multi_ia = 0; /* (don't) accept multiple IAs */ 1989f7788e8eSJonathan Lemon cbp->mc_all = sc->flags & FXP_FLAG_ALL_MCAST ? 1 : 0; 1990c8bca6dcSBill Paul cbp->gamla_rx = sc->flags & FXP_FLAG_EXT_RFA ? 1 : 0; 1991a17c678eSDavid Greenman 199272a32a26SJonathan Lemon if (sc->revision == FXP_REV_82557) { 19933bd07cfdSJonathan Lemon /* 19943bd07cfdSJonathan Lemon * The 82557 has no hardware flow control, the values 19953bd07cfdSJonathan Lemon * below are the defaults for the chip. 19963bd07cfdSJonathan Lemon */ 19973bd07cfdSJonathan Lemon cbp->fc_delay_lsb = 0; 19983bd07cfdSJonathan Lemon cbp->fc_delay_msb = 0x40; 19993bd07cfdSJonathan Lemon cbp->pri_fc_thresh = 3; 20003bd07cfdSJonathan Lemon cbp->tx_fc_dis = 0; 20013bd07cfdSJonathan Lemon cbp->rx_fc_restop = 0; 20023bd07cfdSJonathan Lemon cbp->rx_fc_restart = 0; 20033bd07cfdSJonathan Lemon cbp->fc_filter = 0; 20043bd07cfdSJonathan Lemon cbp->pri_fc_loc = 1; 20053bd07cfdSJonathan Lemon } else { 20063bd07cfdSJonathan Lemon cbp->fc_delay_lsb = 0x1f; 20073bd07cfdSJonathan Lemon cbp->fc_delay_msb = 0x01; 20083bd07cfdSJonathan Lemon cbp->pri_fc_thresh = 3; 20093bd07cfdSJonathan Lemon cbp->tx_fc_dis = 0; /* enable transmit FC */ 20103bd07cfdSJonathan Lemon cbp->rx_fc_restop = 1; /* enable FC restop frames */ 20113bd07cfdSJonathan Lemon cbp->rx_fc_restart = 1; /* enable FC restart frames */ 20123bd07cfdSJonathan Lemon cbp->fc_filter = !prm; /* drop FC frames to host */ 20133bd07cfdSJonathan Lemon cbp->pri_fc_loc = 1; /* FC pri location (byte31) */ 20143bd07cfdSJonathan Lemon } 20153bd07cfdSJonathan Lemon 2016a17c678eSDavid Greenman /* 2017a17c678eSDavid Greenman * Start the config command/DMA. 2018a17c678eSDavid Greenman */ 2019ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 2020b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 2021b2badf02SMaxime Henrion CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->fxp_desc.cbl_addr); 20222e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); 2023a17c678eSDavid Greenman /* ...and wait for it to complete. */ 20247dced78aSDavid Greenman fxp_dma_wait(&cbp->cb_status, sc); 2025b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_POSTWRITE); 2026a17c678eSDavid Greenman 2027a17c678eSDavid Greenman /* 2028a17c678eSDavid Greenman * Now initialize the station address. Temporarily use the TxCB 2029a17c678eSDavid Greenman * memory area like we did above for the config CB. 2030a17c678eSDavid Greenman */ 2031b2badf02SMaxime Henrion cb_ias = (struct fxp_cb_ias *)sc->fxp_desc.cbl_list; 2032a17c678eSDavid Greenman cb_ias->cb_status = 0; 2033a17c678eSDavid Greenman cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL; 2034a17c678eSDavid Greenman cb_ias->link_addr = -1; 2035e609b4d7SMaxime Henrion bcopy(sc->arpcom.ac_enaddr, cb_ias->macaddr, 2036a17c678eSDavid Greenman sizeof(sc->arpcom.ac_enaddr)); 2037a17c678eSDavid Greenman 2038a17c678eSDavid Greenman /* 2039a17c678eSDavid Greenman * Start the IAS (Individual Address Setup) command/DMA. 2040a17c678eSDavid Greenman */ 2041ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 2042b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 20432e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); 2044a17c678eSDavid Greenman /* ...and wait for it to complete. */ 20457dced78aSDavid Greenman fxp_dma_wait(&cb_ias->cb_status, sc); 2046b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_POSTWRITE); 2047a17c678eSDavid Greenman 2048a17c678eSDavid Greenman /* 2049a17c678eSDavid Greenman * Initialize transmit control block (TxCB) list. 2050a17c678eSDavid Greenman */ 2051b2badf02SMaxime Henrion txp = sc->fxp_desc.tx_list; 2052b2badf02SMaxime Henrion tcbp = sc->fxp_desc.cbl_list; 2053b2badf02SMaxime Henrion bzero(tcbp, FXP_TXCB_SZ); 2054a17c678eSDavid Greenman for (i = 0; i < FXP_NTXCB; i++) { 2055b2badf02SMaxime Henrion txp[i].tx_cb = tcbp + i; 2056b2badf02SMaxime Henrion txp[i].tx_mbuf = NULL; 2057b2badf02SMaxime Henrion tcbp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK; 2058b2badf02SMaxime Henrion tcbp[i].cb_command = FXP_CB_COMMAND_NOP; 2059b2badf02SMaxime Henrion tcbp[i].link_addr = sc->fxp_desc.cbl_addr + 2060b2badf02SMaxime Henrion (((i + 1) & FXP_TXCB_MASK) * sizeof(struct fxp_cb_tx)); 20613bd07cfdSJonathan Lemon if (sc->flags & FXP_FLAG_EXT_TXCB) 2062b2badf02SMaxime Henrion tcbp[i].tbd_array_addr = 2063b2badf02SMaxime Henrion FXP_TXCB_DMA_ADDR(sc, &tcbp[i].tbd[2]); 20643bd07cfdSJonathan Lemon else 2065b2badf02SMaxime Henrion tcbp[i].tbd_array_addr = 2066b2badf02SMaxime Henrion FXP_TXCB_DMA_ADDR(sc, &tcbp[i].tbd[0]); 2067b2badf02SMaxime Henrion txp[i].tx_next = &txp[(i + 1) & FXP_TXCB_MASK]; 2068a17c678eSDavid Greenman } 2069a17c678eSDavid Greenman /* 2070397f9dfeSDavid Greenman * Set the suspend flag on the first TxCB and start the control 2071a17c678eSDavid Greenman * unit. It will execute the NOP and then suspend. 2072a17c678eSDavid Greenman */ 2073b2badf02SMaxime Henrion tcbp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S; 2074b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 2075b2badf02SMaxime Henrion sc->fxp_desc.tx_first = sc->fxp_desc.tx_last = txp; 2076397f9dfeSDavid Greenman sc->tx_queued = 1; 2077a17c678eSDavid Greenman 2078ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 20792e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); 2080a17c678eSDavid Greenman 2081a17c678eSDavid Greenman /* 2082a17c678eSDavid Greenman * Initialize receiver buffer area - RFA. 2083a17c678eSDavid Greenman */ 2084ba8c6fd5SDavid Greenman fxp_scb_wait(sc); 2085b2badf02SMaxime Henrion CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->fxp_desc.rx_head->rx_addr); 20862e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_RU_START); 2087a17c678eSDavid Greenman 2088dccee1a1SDavid Greenman /* 2089ba8c6fd5SDavid Greenman * Set current media. 2090dccee1a1SDavid Greenman */ 2091f7788e8eSJonathan Lemon if (sc->miibus != NULL) 2092f7788e8eSJonathan Lemon mii_mediachg(device_get_softc(sc->miibus)); 2093dccee1a1SDavid Greenman 2094a17c678eSDavid Greenman ifp->if_flags |= IFF_RUNNING; 2095a17c678eSDavid Greenman ifp->if_flags &= ~IFF_OACTIVE; 2096e8c8b728SJonathan Lemon 2097e8c8b728SJonathan Lemon /* 2098e8c8b728SJonathan Lemon * Enable interrupts. 2099e8c8b728SJonathan Lemon */ 21002b5989e9SLuigi Rizzo #ifdef DEVICE_POLLING 21012b5989e9SLuigi Rizzo /* 21022b5989e9SLuigi Rizzo * ... but only do that if we are not polling. And because (presumably) 21032b5989e9SLuigi Rizzo * the default is interrupts on, we need to disable them explicitly! 21042b5989e9SLuigi Rizzo */ 210562f76486SMaxim Sobolev if ( ifp->if_flags & IFF_POLLING ) 21062b5989e9SLuigi Rizzo CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, FXP_SCB_INTR_DISABLE); 21072b5989e9SLuigi Rizzo else 21082b5989e9SLuigi Rizzo #endif /* DEVICE_POLLING */ 2109e8c8b728SJonathan Lemon CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, 0); 2110f7788e8eSJonathan Lemon splx(s); 2111a17c678eSDavid Greenman 2112a17c678eSDavid Greenman /* 2113a17c678eSDavid Greenman * Start stats updater. 2114a17c678eSDavid Greenman */ 2115f7788e8eSJonathan Lemon sc->stat_ch = timeout(fxp_tick, sc, hz); 2116f7788e8eSJonathan Lemon } 2117f7788e8eSJonathan Lemon 2118f7788e8eSJonathan Lemon static int 2119f7788e8eSJonathan Lemon fxp_serial_ifmedia_upd(struct ifnet *ifp) 2120f7788e8eSJonathan Lemon { 2121f7788e8eSJonathan Lemon 2122f7788e8eSJonathan Lemon return (0); 2123a17c678eSDavid Greenman } 2124a17c678eSDavid Greenman 2125303b270bSEivind Eklund static void 2126f7788e8eSJonathan Lemon fxp_serial_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 2127ba8c6fd5SDavid Greenman { 2128ba8c6fd5SDavid Greenman 2129f7788e8eSJonathan Lemon ifmr->ifm_active = IFM_ETHER|IFM_MANUAL; 2130ba8c6fd5SDavid Greenman } 2131ba8c6fd5SDavid Greenman 2132ba8c6fd5SDavid Greenman /* 2133ba8c6fd5SDavid Greenman * Change media according to request. 2134ba8c6fd5SDavid Greenman */ 2135f7788e8eSJonathan Lemon static int 2136f7788e8eSJonathan Lemon fxp_ifmedia_upd(struct ifnet *ifp) 2137ba8c6fd5SDavid Greenman { 2138ba8c6fd5SDavid Greenman struct fxp_softc *sc = ifp->if_softc; 2139f7788e8eSJonathan Lemon struct mii_data *mii; 2140ba8c6fd5SDavid Greenman 2141f7788e8eSJonathan Lemon mii = device_get_softc(sc->miibus); 2142f7788e8eSJonathan Lemon mii_mediachg(mii); 2143ba8c6fd5SDavid Greenman return (0); 2144ba8c6fd5SDavid Greenman } 2145ba8c6fd5SDavid Greenman 2146ba8c6fd5SDavid Greenman /* 2147ba8c6fd5SDavid Greenman * Notify the world which media we're using. 2148ba8c6fd5SDavid Greenman */ 2149f7788e8eSJonathan Lemon static void 2150f7788e8eSJonathan Lemon fxp_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 2151ba8c6fd5SDavid Greenman { 2152ba8c6fd5SDavid Greenman struct fxp_softc *sc = ifp->if_softc; 2153f7788e8eSJonathan Lemon struct mii_data *mii; 2154ba8c6fd5SDavid Greenman 2155f7788e8eSJonathan Lemon mii = device_get_softc(sc->miibus); 2156f7788e8eSJonathan Lemon mii_pollstat(mii); 2157f7788e8eSJonathan Lemon ifmr->ifm_active = mii->mii_media_active; 2158f7788e8eSJonathan Lemon ifmr->ifm_status = mii->mii_media_status; 21592e2b8238SJonathan Lemon 21602e2b8238SJonathan Lemon if (ifmr->ifm_status & IFM_10_T && sc->flags & FXP_FLAG_CU_RESUME_BUG) 21612e2b8238SJonathan Lemon sc->cu_resume_bug = 1; 21622e2b8238SJonathan Lemon else 21632e2b8238SJonathan Lemon sc->cu_resume_bug = 0; 2164ba8c6fd5SDavid Greenman } 2165ba8c6fd5SDavid Greenman 2166a17c678eSDavid Greenman /* 2167a17c678eSDavid Greenman * Add a buffer to the end of the RFA buffer list. 2168a17c678eSDavid Greenman * Return 0 if successful, 1 for failure. A failure results in 2169a17c678eSDavid Greenman * adding the 'oldm' (if non-NULL) on to the end of the list - 2170dc733423SDag-Erling Smørgrav * tossing out its old contents and recycling it. 2171a17c678eSDavid Greenman * The RFA struct is stuck at the beginning of mbuf cluster and the 2172a17c678eSDavid Greenman * data pointer is fixed up to point just past it. 2173a17c678eSDavid Greenman */ 2174a17c678eSDavid Greenman static int 2175b2badf02SMaxime Henrion fxp_add_rfabuf(struct fxp_softc *sc, struct fxp_rx *rxp) 2176a17c678eSDavid Greenman { 2177a17c678eSDavid Greenman struct mbuf *m; 2178a17c678eSDavid Greenman struct fxp_rfa *rfa, *p_rfa; 2179b2badf02SMaxime Henrion struct fxp_rx *p_rx; 2180b2badf02SMaxime Henrion bus_dmamap_t tmp_map; 2181b2badf02SMaxime Henrion u_int32_t v; 2182b2badf02SMaxime Henrion int error; 2183a17c678eSDavid Greenman 2184a163d034SWarner Losh m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 2185b2badf02SMaxime Henrion if (m == NULL) 2186b2badf02SMaxime Henrion return (ENOBUFS); 2187ba8c6fd5SDavid Greenman 2188ba8c6fd5SDavid Greenman /* 2189ba8c6fd5SDavid Greenman * Move the data pointer up so that the incoming data packet 2190ba8c6fd5SDavid Greenman * will be 32-bit aligned. 2191ba8c6fd5SDavid Greenman */ 2192ba8c6fd5SDavid Greenman m->m_data += RFA_ALIGNMENT_FUDGE; 2193ba8c6fd5SDavid Greenman 2194eadd5e3aSDavid Greenman /* 2195eadd5e3aSDavid Greenman * Get a pointer to the base of the mbuf cluster and move 2196eadd5e3aSDavid Greenman * data start past it. 2197eadd5e3aSDavid Greenman */ 2198a17c678eSDavid Greenman rfa = mtod(m, struct fxp_rfa *); 2199c8bca6dcSBill Paul m->m_data += sc->rfa_size; 2200b2badf02SMaxime Henrion rfa->size = MCLBYTES - sc->rfa_size - RFA_ALIGNMENT_FUDGE; 2201eadd5e3aSDavid Greenman 2202ba8c6fd5SDavid Greenman /* 2203ba8c6fd5SDavid Greenman * Initialize the rest of the RFA. Note that since the RFA 2204ba8c6fd5SDavid Greenman * is misaligned, we cannot store values directly. Instead, 2205ba8c6fd5SDavid Greenman * we use an optimized, inline copy. 2206ba8c6fd5SDavid Greenman */ 22074fc1dda9SAndrew Gallatin 2208a17c678eSDavid Greenman rfa->rfa_status = 0; 2209a17c678eSDavid Greenman rfa->rfa_control = FXP_RFA_CONTROL_EL; 2210a17c678eSDavid Greenman rfa->actual_size = 0; 2211ba8c6fd5SDavid Greenman 2212ba8c6fd5SDavid Greenman v = -1; 22134fc1dda9SAndrew Gallatin fxp_lwcopy(&v, (volatile u_int32_t *) rfa->link_addr); 22144fc1dda9SAndrew Gallatin fxp_lwcopy(&v, (volatile u_int32_t *) rfa->rbd_addr); 2215ba8c6fd5SDavid Greenman 2216b2badf02SMaxime Henrion /* Map the RFA into DMA memory. */ 2217b2badf02SMaxime Henrion error = bus_dmamap_load(sc->fxp_mtag, sc->spare_map, rfa, 2218b2badf02SMaxime Henrion MCLBYTES - RFA_ALIGNMENT_FUDGE, fxp_dma_map_addr, 2219b2badf02SMaxime Henrion &rxp->rx_addr, 0); 2220b2badf02SMaxime Henrion if (error) { 2221b2badf02SMaxime Henrion m_freem(m); 2222b2badf02SMaxime Henrion return (error); 2223b2badf02SMaxime Henrion } 2224b2badf02SMaxime Henrion 2225b2badf02SMaxime Henrion bus_dmamap_unload(sc->fxp_mtag, rxp->rx_map); 2226b2badf02SMaxime Henrion tmp_map = sc->spare_map; 2227b2badf02SMaxime Henrion sc->spare_map = rxp->rx_map; 2228b2badf02SMaxime Henrion rxp->rx_map = tmp_map; 2229b2badf02SMaxime Henrion rxp->rx_mbuf = m; 2230b2badf02SMaxime Henrion 2231b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, rxp->rx_map, BUS_DMASYNC_PREREAD); 2232b2badf02SMaxime Henrion 2233dfe61cf1SDavid Greenman /* 2234dfe61cf1SDavid Greenman * If there are other buffers already on the list, attach this 2235dfe61cf1SDavid Greenman * one to the end by fixing up the tail to point to this one. 2236dfe61cf1SDavid Greenman */ 2237b2badf02SMaxime Henrion if (sc->fxp_desc.rx_head != NULL) { 2238b2badf02SMaxime Henrion p_rx = sc->fxp_desc.rx_tail; 2239b2badf02SMaxime Henrion p_rfa = (struct fxp_rfa *) 2240b2badf02SMaxime Henrion (p_rx->rx_mbuf->m_ext.ext_buf + RFA_ALIGNMENT_FUDGE); 2241b2badf02SMaxime Henrion p_rx->rx_next = rxp; 2242b2badf02SMaxime Henrion fxp_lwcopy(&rxp->rx_addr, 2243b2badf02SMaxime Henrion (volatile u_int32_t *)p_rfa->link_addr); 2244aed53495SDavid Greenman p_rfa->rfa_control = 0; 2245b2badf02SMaxime Henrion bus_dmamap_sync(sc->fxp_mtag, p_rx->rx_map, 2246b2badf02SMaxime Henrion BUS_DMASYNC_PREREAD); 2247a17c678eSDavid Greenman } else { 2248b2badf02SMaxime Henrion rxp->rx_next = NULL; 2249b2badf02SMaxime Henrion sc->fxp_desc.rx_head = rxp; 2250a17c678eSDavid Greenman } 2251b2badf02SMaxime Henrion sc->fxp_desc.rx_tail = rxp; 2252b2badf02SMaxime Henrion return (0); 2253a17c678eSDavid Greenman } 2254a17c678eSDavid Greenman 22556ebc3153SDavid Greenman static volatile int 2256f7788e8eSJonathan Lemon fxp_miibus_readreg(device_t dev, int phy, int reg) 2257dccee1a1SDavid Greenman { 2258f7788e8eSJonathan Lemon struct fxp_softc *sc = device_get_softc(dev); 2259dccee1a1SDavid Greenman int count = 10000; 22606ebc3153SDavid Greenman int value; 2261dccee1a1SDavid Greenman 2262ba8c6fd5SDavid Greenman CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 2263ba8c6fd5SDavid Greenman (FXP_MDI_READ << 26) | (reg << 16) | (phy << 21)); 2264dccee1a1SDavid Greenman 2265ba8c6fd5SDavid Greenman while (((value = CSR_READ_4(sc, FXP_CSR_MDICONTROL)) & 0x10000000) == 0 2266ba8c6fd5SDavid Greenman && count--) 22676ebc3153SDavid Greenman DELAY(10); 2268dccee1a1SDavid Greenman 2269dccee1a1SDavid Greenman if (count <= 0) 2270f7788e8eSJonathan Lemon device_printf(dev, "fxp_miibus_readreg: timed out\n"); 2271dccee1a1SDavid Greenman 22726ebc3153SDavid Greenman return (value & 0xffff); 2273dccee1a1SDavid Greenman } 2274dccee1a1SDavid Greenman 2275dccee1a1SDavid Greenman static void 2276f7788e8eSJonathan Lemon fxp_miibus_writereg(device_t dev, int phy, int reg, int value) 2277dccee1a1SDavid Greenman { 2278f7788e8eSJonathan Lemon struct fxp_softc *sc = device_get_softc(dev); 2279dccee1a1SDavid Greenman int count = 10000; 2280dccee1a1SDavid Greenman 2281ba8c6fd5SDavid Greenman CSR_WRITE_4(sc, FXP_CSR_MDICONTROL, 2282ba8c6fd5SDavid Greenman (FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21) | 2283ba8c6fd5SDavid Greenman (value & 0xffff)); 2284dccee1a1SDavid Greenman 2285ba8c6fd5SDavid Greenman while ((CSR_READ_4(sc, FXP_CSR_MDICONTROL) & 0x10000000) == 0 && 2286ba8c6fd5SDavid Greenman count--) 22876ebc3153SDavid Greenman DELAY(10); 2288dccee1a1SDavid Greenman 2289dccee1a1SDavid Greenman if (count <= 0) 2290f7788e8eSJonathan Lemon device_printf(dev, "fxp_miibus_writereg: timed out\n"); 2291dccee1a1SDavid Greenman } 2292dccee1a1SDavid Greenman 2293dccee1a1SDavid Greenman static int 2294f7788e8eSJonathan Lemon fxp_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 2295a17c678eSDavid Greenman { 22969b44ff22SGarrett Wollman struct fxp_softc *sc = ifp->if_softc; 2297a17c678eSDavid Greenman struct ifreq *ifr = (struct ifreq *)data; 2298f7788e8eSJonathan Lemon struct mii_data *mii; 2299f7788e8eSJonathan Lemon int s, error = 0; 2300a17c678eSDavid Greenman 2301f7788e8eSJonathan Lemon s = splimp(); 2302a17c678eSDavid Greenman 2303a17c678eSDavid Greenman switch (command) { 2304a17c678eSDavid Greenman case SIOCSIFFLAGS: 2305f7788e8eSJonathan Lemon if (ifp->if_flags & IFF_ALLMULTI) 2306f7788e8eSJonathan Lemon sc->flags |= FXP_FLAG_ALL_MCAST; 2307f7788e8eSJonathan Lemon else 2308f7788e8eSJonathan Lemon sc->flags &= ~FXP_FLAG_ALL_MCAST; 2309a17c678eSDavid Greenman 2310a17c678eSDavid Greenman /* 2311a17c678eSDavid Greenman * If interface is marked up and not running, then start it. 2312a17c678eSDavid Greenman * If it is marked down and running, stop it. 2313a17c678eSDavid Greenman * XXX If it's up then re-initialize it. This is so flags 2314a17c678eSDavid Greenman * such as IFF_PROMISC are handled. 2315a17c678eSDavid Greenman */ 2316a17c678eSDavid Greenman if (ifp->if_flags & IFF_UP) { 2317fb583156SDavid Greenman fxp_init(sc); 2318a17c678eSDavid Greenman } else { 2319a17c678eSDavid Greenman if (ifp->if_flags & IFF_RUNNING) 23204a5f1499SDavid Greenman fxp_stop(sc); 2321a17c678eSDavid Greenman } 2322a17c678eSDavid Greenman break; 2323a17c678eSDavid Greenman 2324a17c678eSDavid Greenman case SIOCADDMULTI: 2325a17c678eSDavid Greenman case SIOCDELMULTI: 2326f7788e8eSJonathan Lemon if (ifp->if_flags & IFF_ALLMULTI) 2327f7788e8eSJonathan Lemon sc->flags |= FXP_FLAG_ALL_MCAST; 2328f7788e8eSJonathan Lemon else 2329f7788e8eSJonathan Lemon sc->flags &= ~FXP_FLAG_ALL_MCAST; 2330a17c678eSDavid Greenman /* 2331a17c678eSDavid Greenman * Multicast list has changed; set the hardware filter 2332a17c678eSDavid Greenman * accordingly. 2333a17c678eSDavid Greenman */ 2334f7788e8eSJonathan Lemon if ((sc->flags & FXP_FLAG_ALL_MCAST) == 0) 2335397f9dfeSDavid Greenman fxp_mc_setup(sc); 2336397f9dfeSDavid Greenman /* 2337f7788e8eSJonathan Lemon * fxp_mc_setup() can set FXP_FLAG_ALL_MCAST, so check it 2338397f9dfeSDavid Greenman * again rather than else {}. 2339397f9dfeSDavid Greenman */ 2340f7788e8eSJonathan Lemon if (sc->flags & FXP_FLAG_ALL_MCAST) 2341fb583156SDavid Greenman fxp_init(sc); 2342a17c678eSDavid Greenman error = 0; 2343ba8c6fd5SDavid Greenman break; 2344ba8c6fd5SDavid Greenman 2345ba8c6fd5SDavid Greenman case SIOCSIFMEDIA: 2346ba8c6fd5SDavid Greenman case SIOCGIFMEDIA: 2347f7788e8eSJonathan Lemon if (sc->miibus != NULL) { 2348f7788e8eSJonathan Lemon mii = device_get_softc(sc->miibus); 2349f7788e8eSJonathan Lemon error = ifmedia_ioctl(ifp, ifr, 2350f7788e8eSJonathan Lemon &mii->mii_media, command); 2351f7788e8eSJonathan Lemon } else { 2352ba8c6fd5SDavid Greenman error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, command); 2353f7788e8eSJonathan Lemon } 2354a17c678eSDavid Greenman break; 2355a17c678eSDavid Greenman 2356a17c678eSDavid Greenman default: 2357673d9191SSam Leffler error = ether_ioctl(ifp, command, data); 2358a17c678eSDavid Greenman } 2359f7788e8eSJonathan Lemon splx(s); 2360a17c678eSDavid Greenman return (error); 2361a17c678eSDavid Greenman } 2362397f9dfeSDavid Greenman 2363397f9dfeSDavid Greenman /* 236409882363SJonathan Lemon * Fill in the multicast address list and return number of entries. 236509882363SJonathan Lemon */ 236609882363SJonathan Lemon static int 236709882363SJonathan Lemon fxp_mc_addrs(struct fxp_softc *sc) 236809882363SJonathan Lemon { 236909882363SJonathan Lemon struct fxp_cb_mcs *mcsp = sc->mcsp; 237009882363SJonathan Lemon struct ifnet *ifp = &sc->sc_if; 237109882363SJonathan Lemon struct ifmultiaddr *ifma; 237209882363SJonathan Lemon int nmcasts; 237309882363SJonathan Lemon 237409882363SJonathan Lemon nmcasts = 0; 237509882363SJonathan Lemon if ((sc->flags & FXP_FLAG_ALL_MCAST) == 0) { 237609882363SJonathan Lemon #if __FreeBSD_version < 500000 237709882363SJonathan Lemon LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 237809882363SJonathan Lemon #else 237909882363SJonathan Lemon TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 238009882363SJonathan Lemon #endif 238109882363SJonathan Lemon if (ifma->ifma_addr->sa_family != AF_LINK) 238209882363SJonathan Lemon continue; 238309882363SJonathan Lemon if (nmcasts >= MAXMCADDR) { 238409882363SJonathan Lemon sc->flags |= FXP_FLAG_ALL_MCAST; 238509882363SJonathan Lemon nmcasts = 0; 238609882363SJonathan Lemon break; 238709882363SJonathan Lemon } 238809882363SJonathan Lemon bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 238909882363SJonathan Lemon &sc->mcsp->mc_addr[nmcasts][0], 6); 239009882363SJonathan Lemon nmcasts++; 239109882363SJonathan Lemon } 239209882363SJonathan Lemon } 239309882363SJonathan Lemon mcsp->mc_cnt = nmcasts * 6; 239409882363SJonathan Lemon return (nmcasts); 239509882363SJonathan Lemon } 239609882363SJonathan Lemon 239709882363SJonathan Lemon /* 2398397f9dfeSDavid Greenman * Program the multicast filter. 2399397f9dfeSDavid Greenman * 2400397f9dfeSDavid Greenman * We have an artificial restriction that the multicast setup command 2401397f9dfeSDavid Greenman * must be the first command in the chain, so we take steps to ensure 24023114fdb4SDavid Greenman * this. By requiring this, it allows us to keep up the performance of 2403397f9dfeSDavid Greenman * the pre-initialized command ring (esp. link pointers) by not actually 2404dc733423SDag-Erling Smørgrav * inserting the mcsetup command in the ring - i.e. its link pointer 2405397f9dfeSDavid Greenman * points to the TxCB ring, but the mcsetup descriptor itself is not part 2406397f9dfeSDavid Greenman * of it. We then can do 'CU_START' on the mcsetup descriptor and have it 2407397f9dfeSDavid Greenman * lead into the regular TxCB ring when it completes. 2408397f9dfeSDavid Greenman * 2409397f9dfeSDavid Greenman * This function must be called at splimp. 2410397f9dfeSDavid Greenman */ 2411397f9dfeSDavid Greenman static void 2412f7788e8eSJonathan Lemon fxp_mc_setup(struct fxp_softc *sc) 2413397f9dfeSDavid Greenman { 2414397f9dfeSDavid Greenman struct fxp_cb_mcs *mcsp = sc->mcsp; 2415397f9dfeSDavid Greenman struct ifnet *ifp = &sc->sc_if; 2416b2badf02SMaxime Henrion struct fxp_tx *txp; 24177dced78aSDavid Greenman int count; 2418397f9dfeSDavid Greenman 24193114fdb4SDavid Greenman /* 24203114fdb4SDavid Greenman * If there are queued commands, we must wait until they are all 24213114fdb4SDavid Greenman * completed. If we are already waiting, then add a NOP command 24223114fdb4SDavid Greenman * with interrupt option so that we're notified when all commands 24233114fdb4SDavid Greenman * have been completed - fxp_start() ensures that no additional 24243114fdb4SDavid Greenman * TX commands will be added when need_mcsetup is true. 24253114fdb4SDavid Greenman */ 2426397f9dfeSDavid Greenman if (sc->tx_queued) { 24273114fdb4SDavid Greenman /* 24283114fdb4SDavid Greenman * need_mcsetup will be true if we are already waiting for the 24293114fdb4SDavid Greenman * NOP command to be completed (see below). In this case, bail. 24303114fdb4SDavid Greenman */ 24313114fdb4SDavid Greenman if (sc->need_mcsetup) 24323114fdb4SDavid Greenman return; 2433397f9dfeSDavid Greenman sc->need_mcsetup = 1; 24343114fdb4SDavid Greenman 24353114fdb4SDavid Greenman /* 243672a32a26SJonathan Lemon * Add a NOP command with interrupt so that we are notified 243772a32a26SJonathan Lemon * when all TX commands have been processed. 24383114fdb4SDavid Greenman */ 2439b2badf02SMaxime Henrion txp = sc->fxp_desc.tx_last->tx_next; 2440b2badf02SMaxime Henrion txp->tx_mbuf = NULL; 2441b2badf02SMaxime Henrion txp->tx_cb->cb_status = 0; 2442b2badf02SMaxime Henrion txp->tx_cb->cb_command = FXP_CB_COMMAND_NOP | 2443e8c8b728SJonathan Lemon FXP_CB_COMMAND_S | FXP_CB_COMMAND_I; 2444b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 24453114fdb4SDavid Greenman /* 24463114fdb4SDavid Greenman * Advance the end of list forward. 24473114fdb4SDavid Greenman */ 2448b2badf02SMaxime Henrion sc->fxp_desc.tx_last->tx_cb->cb_command &= ~FXP_CB_COMMAND_S; 2449b2badf02SMaxime Henrion sc->fxp_desc.tx_last = txp; 24503114fdb4SDavid Greenman sc->tx_queued++; 24513114fdb4SDavid Greenman /* 24523114fdb4SDavid Greenman * Issue a resume in case the CU has just suspended. 24533114fdb4SDavid Greenman */ 24543114fdb4SDavid Greenman fxp_scb_wait(sc); 24552e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_RESUME); 24563114fdb4SDavid Greenman /* 24573114fdb4SDavid Greenman * Set a 5 second timer just in case we don't hear from the 24583114fdb4SDavid Greenman * card again. 24593114fdb4SDavid Greenman */ 24603114fdb4SDavid Greenman ifp->if_timer = 5; 24613114fdb4SDavid Greenman 2462397f9dfeSDavid Greenman return; 2463397f9dfeSDavid Greenman } 2464397f9dfeSDavid Greenman sc->need_mcsetup = 0; 2465397f9dfeSDavid Greenman 2466397f9dfeSDavid Greenman /* 2467397f9dfeSDavid Greenman * Initialize multicast setup descriptor. 2468397f9dfeSDavid Greenman */ 2469397f9dfeSDavid Greenman mcsp->cb_status = 0; 2470e8c8b728SJonathan Lemon mcsp->cb_command = FXP_CB_COMMAND_MCAS | 2471e8c8b728SJonathan Lemon FXP_CB_COMMAND_S | FXP_CB_COMMAND_I; 2472b2badf02SMaxime Henrion mcsp->link_addr = sc->fxp_desc.cbl_addr; 2473b2badf02SMaxime Henrion txp = &sc->fxp_desc.mcs_tx; 2474b2badf02SMaxime Henrion txp->tx_mbuf = NULL; 2475b2badf02SMaxime Henrion txp->tx_cb = (struct fxp_cb_tx *)sc->mcsp; 2476b2badf02SMaxime Henrion txp->tx_next = sc->fxp_desc.tx_list; 247709882363SJonathan Lemon (void) fxp_mc_addrs(sc); 2478b2badf02SMaxime Henrion sc->fxp_desc.tx_first = sc->fxp_desc.tx_last = txp; 2479397f9dfeSDavid Greenman sc->tx_queued = 1; 2480397f9dfeSDavid Greenman 2481397f9dfeSDavid Greenman /* 2482397f9dfeSDavid Greenman * Wait until command unit is not active. This should never 2483397f9dfeSDavid Greenman * be the case when nothing is queued, but make sure anyway. 2484397f9dfeSDavid Greenman */ 24857dced78aSDavid Greenman count = 100; 2486397f9dfeSDavid Greenman while ((CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS) >> 6) == 24877dced78aSDavid Greenman FXP_SCB_CUS_ACTIVE && --count) 24887dced78aSDavid Greenman DELAY(10); 24897dced78aSDavid Greenman if (count == 0) { 2490f7788e8eSJonathan Lemon device_printf(sc->dev, "command queue timeout\n"); 24917dced78aSDavid Greenman return; 24927dced78aSDavid Greenman } 2493397f9dfeSDavid Greenman 2494397f9dfeSDavid Greenman /* 2495397f9dfeSDavid Greenman * Start the multicast setup command. 2496397f9dfeSDavid Greenman */ 2497397f9dfeSDavid Greenman fxp_scb_wait(sc); 2498b2badf02SMaxime Henrion bus_dmamap_sync(sc->mcs_tag, sc->mcs_map, BUS_DMASYNC_PREWRITE); 2499b2badf02SMaxime Henrion CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->mcs_addr); 25002e2b8238SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); 2501397f9dfeSDavid Greenman 25023114fdb4SDavid Greenman ifp->if_timer = 2; 2503397f9dfeSDavid Greenman return; 2504397f9dfeSDavid Greenman } 250572a32a26SJonathan Lemon 250672a32a26SJonathan Lemon static u_int32_t fxp_ucode_d101a[] = D101_A_RCVBUNDLE_UCODE; 250772a32a26SJonathan Lemon static u_int32_t fxp_ucode_d101b0[] = D101_B0_RCVBUNDLE_UCODE; 250872a32a26SJonathan Lemon static u_int32_t fxp_ucode_d101ma[] = D101M_B_RCVBUNDLE_UCODE; 250972a32a26SJonathan Lemon static u_int32_t fxp_ucode_d101s[] = D101S_RCVBUNDLE_UCODE; 251072a32a26SJonathan Lemon static u_int32_t fxp_ucode_d102[] = D102_B_RCVBUNDLE_UCODE; 251172a32a26SJonathan Lemon static u_int32_t fxp_ucode_d102c[] = D102_C_RCVBUNDLE_UCODE; 251272a32a26SJonathan Lemon 251372a32a26SJonathan Lemon #define UCODE(x) x, sizeof(x) 251472a32a26SJonathan Lemon 251572a32a26SJonathan Lemon struct ucode { 251672a32a26SJonathan Lemon u_int32_t revision; 251772a32a26SJonathan Lemon u_int32_t *ucode; 251872a32a26SJonathan Lemon int length; 251972a32a26SJonathan Lemon u_short int_delay_offset; 252072a32a26SJonathan Lemon u_short bundle_max_offset; 252172a32a26SJonathan Lemon } ucode_table[] = { 252272a32a26SJonathan Lemon { FXP_REV_82558_A4, UCODE(fxp_ucode_d101a), D101_CPUSAVER_DWORD, 0 }, 252372a32a26SJonathan Lemon { FXP_REV_82558_B0, UCODE(fxp_ucode_d101b0), D101_CPUSAVER_DWORD, 0 }, 252472a32a26SJonathan Lemon { FXP_REV_82559_A0, UCODE(fxp_ucode_d101ma), 252572a32a26SJonathan Lemon D101M_CPUSAVER_DWORD, D101M_CPUSAVER_BUNDLE_MAX_DWORD }, 252672a32a26SJonathan Lemon { FXP_REV_82559S_A, UCODE(fxp_ucode_d101s), 252772a32a26SJonathan Lemon D101S_CPUSAVER_DWORD, D101S_CPUSAVER_BUNDLE_MAX_DWORD }, 252872a32a26SJonathan Lemon { FXP_REV_82550, UCODE(fxp_ucode_d102), 252972a32a26SJonathan Lemon D102_B_CPUSAVER_DWORD, D102_B_CPUSAVER_BUNDLE_MAX_DWORD }, 253072a32a26SJonathan Lemon { FXP_REV_82550_C, UCODE(fxp_ucode_d102c), 253172a32a26SJonathan Lemon D102_C_CPUSAVER_DWORD, D102_C_CPUSAVER_BUNDLE_MAX_DWORD }, 253272a32a26SJonathan Lemon { 0, NULL, 0, 0, 0 } 253372a32a26SJonathan Lemon }; 253472a32a26SJonathan Lemon 253572a32a26SJonathan Lemon static void 253672a32a26SJonathan Lemon fxp_load_ucode(struct fxp_softc *sc) 253772a32a26SJonathan Lemon { 253872a32a26SJonathan Lemon struct ucode *uc; 253972a32a26SJonathan Lemon struct fxp_cb_ucode *cbp; 254072a32a26SJonathan Lemon 254172a32a26SJonathan Lemon for (uc = ucode_table; uc->ucode != NULL; uc++) 254272a32a26SJonathan Lemon if (sc->revision == uc->revision) 254372a32a26SJonathan Lemon break; 254472a32a26SJonathan Lemon if (uc->ucode == NULL) 254572a32a26SJonathan Lemon return; 2546b2badf02SMaxime Henrion cbp = (struct fxp_cb_ucode *)sc->fxp_desc.cbl_list; 254772a32a26SJonathan Lemon cbp->cb_status = 0; 254872a32a26SJonathan Lemon cbp->cb_command = FXP_CB_COMMAND_UCODE | FXP_CB_COMMAND_EL; 254972a32a26SJonathan Lemon cbp->link_addr = -1; /* (no) next command */ 255072a32a26SJonathan Lemon memcpy(cbp->ucode, uc->ucode, uc->length); 255172a32a26SJonathan Lemon if (uc->int_delay_offset) 255272a32a26SJonathan Lemon *(u_short *)&cbp->ucode[uc->int_delay_offset] = 2553208b417fSJonathan Lemon sc->tunable_int_delay + sc->tunable_int_delay / 2; 255472a32a26SJonathan Lemon if (uc->bundle_max_offset) 255572a32a26SJonathan Lemon *(u_short *)&cbp->ucode[uc->bundle_max_offset] = 255672a32a26SJonathan Lemon sc->tunable_bundle_max; 255772a32a26SJonathan Lemon /* 255872a32a26SJonathan Lemon * Download the ucode to the chip. 255972a32a26SJonathan Lemon */ 256072a32a26SJonathan Lemon fxp_scb_wait(sc); 2561b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_PREWRITE); 2562b2badf02SMaxime Henrion CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->fxp_desc.cbl_addr); 256372a32a26SJonathan Lemon fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START); 256472a32a26SJonathan Lemon /* ...and wait for it to complete. */ 256572a32a26SJonathan Lemon fxp_dma_wait(&cbp->cb_status, sc); 2566b2badf02SMaxime Henrion bus_dmamap_sync(sc->cbl_tag, sc->cbl_map, BUS_DMASYNC_POSTWRITE); 256772a32a26SJonathan Lemon device_printf(sc->dev, 256872a32a26SJonathan Lemon "Microcode loaded, int_delay: %d usec bundle_max: %d\n", 256972a32a26SJonathan Lemon sc->tunable_int_delay, 257072a32a26SJonathan Lemon uc->bundle_max_offset == 0 ? 0 : sc->tunable_bundle_max); 257172a32a26SJonathan Lemon sc->flags |= FXP_FLAG_UCODE; 257272a32a26SJonathan Lemon } 257372a32a26SJonathan Lemon 257472a32a26SJonathan Lemon static int 257572a32a26SJonathan Lemon sysctl_int_range(SYSCTL_HANDLER_ARGS, int low, int high) 257672a32a26SJonathan Lemon { 257772a32a26SJonathan Lemon int error, value; 257872a32a26SJonathan Lemon 257972a32a26SJonathan Lemon value = *(int *)arg1; 258072a32a26SJonathan Lemon error = sysctl_handle_int(oidp, &value, 0, req); 258172a32a26SJonathan Lemon if (error || !req->newptr) 258272a32a26SJonathan Lemon return (error); 258372a32a26SJonathan Lemon if (value < low || value > high) 258472a32a26SJonathan Lemon return (EINVAL); 258572a32a26SJonathan Lemon *(int *)arg1 = value; 258672a32a26SJonathan Lemon return (0); 258772a32a26SJonathan Lemon } 258872a32a26SJonathan Lemon 258972a32a26SJonathan Lemon /* 259072a32a26SJonathan Lemon * Interrupt delay is expressed in microseconds, a multiplier is used 259172a32a26SJonathan Lemon * to convert this to the appropriate clock ticks before using. 259272a32a26SJonathan Lemon */ 259372a32a26SJonathan Lemon static int 259472a32a26SJonathan Lemon sysctl_hw_fxp_int_delay(SYSCTL_HANDLER_ARGS) 259572a32a26SJonathan Lemon { 259672a32a26SJonathan Lemon return (sysctl_int_range(oidp, arg1, arg2, req, 300, 3000)); 259772a32a26SJonathan Lemon } 259872a32a26SJonathan Lemon 259972a32a26SJonathan Lemon static int 260072a32a26SJonathan Lemon sysctl_hw_fxp_bundle_max(SYSCTL_HANDLER_ARGS) 260172a32a26SJonathan Lemon { 260272a32a26SJonathan Lemon return (sysctl_int_range(oidp, arg1, arg2, req, 1, 0xffff)); 260372a32a26SJonathan Lemon } 2604