1 /*- 2 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3 * Copyright (c) 2009 Oleksandr Tymoshenko. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 __FBSDID("$FreeBSD$"); 28 29 #include "opt_platform.h" 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/bio.h> 34 #include <sys/bus.h> 35 #include <sys/conf.h> 36 #include <sys/kernel.h> 37 #include <sys/kthread.h> 38 #include <sys/lock.h> 39 #include <sys/mbuf.h> 40 #include <sys/malloc.h> 41 #include <sys/module.h> 42 #include <sys/mutex.h> 43 #include <geom/geom_disk.h> 44 45 #ifdef FDT 46 #include <dev/fdt/fdt_common.h> 47 #include <dev/ofw/ofw_bus_subr.h> 48 #include <dev/ofw/openfirm.h> 49 #endif 50 51 #include <dev/spibus/spi.h> 52 #include "spibus_if.h" 53 54 #include <dev/flash/mx25lreg.h> 55 56 #define FL_NONE 0x00 57 #define FL_ERASE_4K 0x01 58 #define FL_ERASE_32K 0x02 59 #define FL_ENABLE_4B_ADDR 0x04 60 #define FL_DISABLE_4B_ADDR 0x08 61 62 /* 63 * Define the sectorsize to be a smaller size rather than the flash 64 * sector size. Trying to run FFS off of a 64k flash sector size 65 * results in a completely un-usable system. 66 */ 67 #define MX25L_SECTORSIZE 512 68 69 struct mx25l_flash_ident 70 { 71 const char *name; 72 uint8_t manufacturer_id; 73 uint16_t device_id; 74 unsigned int sectorsize; 75 unsigned int sectorcount; 76 unsigned int flags; 77 }; 78 79 struct mx25l_softc 80 { 81 device_t sc_dev; 82 uint8_t sc_manufacturer_id; 83 uint16_t sc_device_id; 84 unsigned int sc_sectorsize; 85 struct mtx sc_mtx; 86 struct disk *sc_disk; 87 struct proc *sc_p; 88 struct bio_queue_head sc_bio_queue; 89 unsigned int sc_flags; 90 }; 91 92 #define M25PXX_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 93 #define M25PXX_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 94 #define M25PXX_LOCK_INIT(_sc) \ 95 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \ 96 "mx25l", MTX_DEF) 97 #define M25PXX_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); 98 #define M25PXX_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED); 99 #define M25PXX_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED); 100 101 /* disk routines */ 102 static int mx25l_open(struct disk *dp); 103 static int mx25l_close(struct disk *dp); 104 static int mx25l_ioctl(struct disk *, u_long, void *, int, struct thread *); 105 static void mx25l_strategy(struct bio *bp); 106 static int mx25l_getattr(struct bio *bp); 107 static void mx25l_task(void *arg); 108 109 struct mx25l_flash_ident flash_devices[] = { 110 { "en25f32", 0x1c, 0x3116, 64 * 1024, 64, FL_NONE }, 111 { "en25p32", 0x1c, 0x2016, 64 * 1024, 64, FL_NONE }, 112 { "en25p64", 0x1c, 0x2017, 64 * 1024, 128, FL_NONE }, 113 { "en25q32", 0x1c, 0x3016, 64 * 1024, 64, FL_NONE }, 114 { "en25q64", 0x1c, 0x3017, 64 * 1024, 128, FL_ERASE_4K }, 115 { "m25p32", 0x20, 0x2016, 64 * 1024, 64, FL_NONE }, 116 { "m25p64", 0x20, 0x2017, 64 * 1024, 128, FL_NONE }, 117 { "mx25ll32", 0xc2, 0x2016, 64 * 1024, 64, FL_NONE }, 118 { "mx25ll64", 0xc2, 0x2017, 64 * 1024, 128, FL_NONE }, 119 { "mx25ll128", 0xc2, 0x2018, 64 * 1024, 256, FL_ERASE_4K | FL_ERASE_32K }, 120 { "mx25ll256", 0xc2, 0x2019, 64 * 1024, 512, FL_ERASE_4K | FL_ERASE_32K | FL_ENABLE_4B_ADDR }, 121 { "s25fl032", 0x01, 0x0215, 64 * 1024, 64, FL_NONE }, 122 { "s25fl064", 0x01, 0x0216, 64 * 1024, 128, FL_NONE }, 123 { "s25fl128", 0x01, 0x2018, 64 * 1024, 256, FL_NONE }, 124 { "s25fl256s", 0x01, 0x0219, 64 * 1024, 512, FL_NONE }, 125 { "SST25VF010A", 0xbf, 0x2549, 4 * 1024, 32, FL_ERASE_4K | FL_ERASE_32K }, 126 { "SST25VF032B", 0xbf, 0x254a, 64 * 1024, 64, FL_ERASE_4K | FL_ERASE_32K }, 127 128 /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ 129 { "w25x32", 0xef, 0x3016, 64 * 1024, 64, FL_ERASE_4K }, 130 { "w25x64", 0xef, 0x3017, 64 * 1024, 128, FL_ERASE_4K }, 131 { "w25q32", 0xef, 0x4016, 64 * 1024, 64, FL_ERASE_4K }, 132 { "w25q64", 0xef, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 133 { "w25q64bv", 0xef, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 134 { "w25q128", 0xef, 0x4018, 64 * 1024, 256, FL_ERASE_4K }, 135 { "w25q256", 0xef, 0x4019, 64 * 1024, 512, FL_ERASE_4K }, 136 137 /* Atmel */ 138 { "at25df641", 0x1f, 0x4800, 64 * 1024, 128, FL_ERASE_4K }, 139 140 /* GigaDevice */ 141 { "gd25q64", 0xc8, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 142 }; 143 144 static uint8_t 145 mx25l_get_status(device_t dev) 146 { 147 uint8_t txBuf[2], rxBuf[2]; 148 struct spi_command cmd; 149 int err; 150 151 memset(&cmd, 0, sizeof(cmd)); 152 memset(txBuf, 0, sizeof(txBuf)); 153 memset(rxBuf, 0, sizeof(rxBuf)); 154 155 txBuf[0] = CMD_READ_STATUS; 156 cmd.tx_cmd = txBuf; 157 cmd.rx_cmd = rxBuf; 158 cmd.rx_cmd_sz = 2; 159 cmd.tx_cmd_sz = 2; 160 err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); 161 return (rxBuf[1]); 162 } 163 164 static void 165 mx25l_wait_for_device_ready(device_t dev) 166 { 167 while ((mx25l_get_status(dev) & STATUS_WIP)) 168 continue; 169 } 170 171 static struct mx25l_flash_ident* 172 mx25l_get_device_ident(struct mx25l_softc *sc) 173 { 174 device_t dev = sc->sc_dev; 175 uint8_t txBuf[8], rxBuf[8]; 176 struct spi_command cmd; 177 uint8_t manufacturer_id; 178 uint16_t dev_id; 179 int err, i; 180 181 memset(&cmd, 0, sizeof(cmd)); 182 memset(txBuf, 0, sizeof(txBuf)); 183 memset(rxBuf, 0, sizeof(rxBuf)); 184 185 txBuf[0] = CMD_READ_IDENT; 186 cmd.tx_cmd = &txBuf; 187 cmd.rx_cmd = &rxBuf; 188 /* 189 * Some compatible devices has extended two-bytes ID 190 * We'll use only manufacturer/deviceid atm 191 */ 192 cmd.tx_cmd_sz = 4; 193 cmd.rx_cmd_sz = 4; 194 err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); 195 if (err) 196 return (NULL); 197 198 manufacturer_id = rxBuf[1]; 199 dev_id = (rxBuf[2] << 8) | (rxBuf[3]); 200 201 for (i = 0; 202 i < nitems(flash_devices); i++) { 203 if ((flash_devices[i].manufacturer_id == manufacturer_id) && 204 (flash_devices[i].device_id == dev_id)) 205 return &flash_devices[i]; 206 } 207 208 printf("Unknown SPI flash device. Vendor: %02x, device id: %04x\n", 209 manufacturer_id, dev_id); 210 return (NULL); 211 } 212 213 static void 214 mx25l_set_writable(device_t dev, int writable) 215 { 216 uint8_t txBuf[1], rxBuf[1]; 217 struct spi_command cmd; 218 int err; 219 220 memset(&cmd, 0, sizeof(cmd)); 221 memset(txBuf, 0, sizeof(txBuf)); 222 memset(rxBuf, 0, sizeof(rxBuf)); 223 224 txBuf[0] = writable ? CMD_WRITE_ENABLE : CMD_WRITE_DISABLE; 225 cmd.tx_cmd = txBuf; 226 cmd.rx_cmd = rxBuf; 227 cmd.rx_cmd_sz = 1; 228 cmd.tx_cmd_sz = 1; 229 err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); 230 } 231 232 static void 233 mx25l_erase_cmd(device_t dev, off_t sector, uint8_t ecmd) 234 { 235 struct mx25l_softc *sc; 236 uint8_t txBuf[5], rxBuf[5]; 237 struct spi_command cmd; 238 int err; 239 240 sc = device_get_softc(dev); 241 242 mx25l_wait_for_device_ready(dev); 243 mx25l_set_writable(dev, 1); 244 245 memset(&cmd, 0, sizeof(cmd)); 246 memset(txBuf, 0, sizeof(txBuf)); 247 memset(rxBuf, 0, sizeof(rxBuf)); 248 249 txBuf[0] = ecmd; 250 cmd.tx_cmd = txBuf; 251 cmd.rx_cmd = rxBuf; 252 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 253 cmd.rx_cmd_sz = 5; 254 cmd.tx_cmd_sz = 5; 255 txBuf[1] = ((sector >> 24) & 0xff); 256 txBuf[2] = ((sector >> 16) & 0xff); 257 txBuf[3] = ((sector >> 8) & 0xff); 258 txBuf[4] = (sector & 0xff); 259 } else { 260 cmd.rx_cmd_sz = 4; 261 cmd.tx_cmd_sz = 4; 262 txBuf[1] = ((sector >> 16) & 0xff); 263 txBuf[2] = ((sector >> 8) & 0xff); 264 txBuf[3] = (sector & 0xff); 265 } 266 err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); 267 } 268 269 static int 270 mx25l_write(device_t dev, off_t offset, caddr_t data, off_t count) 271 { 272 struct mx25l_softc *sc; 273 uint8_t txBuf[8], rxBuf[8]; 274 struct spi_command cmd; 275 off_t write_offset; 276 long bytes_to_write, bytes_writen; 277 device_t pdev; 278 int err = 0; 279 280 pdev = device_get_parent(dev); 281 sc = device_get_softc(dev); 282 283 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 284 cmd.tx_cmd_sz = 5; 285 cmd.rx_cmd_sz = 5; 286 } else { 287 cmd.tx_cmd_sz = 4; 288 cmd.rx_cmd_sz = 4; 289 } 290 291 bytes_writen = 0; 292 write_offset = offset; 293 294 /* 295 * Use the erase sectorsize here since blocks are fully erased 296 * first before they're written to. 297 */ 298 if (count % sc->sc_sectorsize != 0 || offset % sc->sc_sectorsize != 0) 299 return (EIO); 300 301 /* 302 * Assume here that we write per-sector only 303 * and sector size should be 256 bytes aligned 304 */ 305 KASSERT(write_offset % FLASH_PAGE_SIZE == 0, 306 ("offset for BIO_WRITE is not page size (%d bytes) aligned", 307 FLASH_PAGE_SIZE)); 308 309 /* 310 * Maximum write size for CMD_PAGE_PROGRAM is 311 * FLASH_PAGE_SIZE, so split data to chunks 312 * FLASH_PAGE_SIZE bytes eash and write them 313 * one by one 314 */ 315 while (bytes_writen < count) { 316 /* 317 * If we crossed sector boundary - erase next sector 318 */ 319 if (((offset + bytes_writen) % sc->sc_sectorsize) == 0) 320 mx25l_erase_cmd(dev, offset + bytes_writen, CMD_SECTOR_ERASE); 321 322 txBuf[0] = CMD_PAGE_PROGRAM; 323 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 324 txBuf[1] = ((write_offset >> 24) & 0xff); 325 txBuf[2] = ((write_offset >> 16) & 0xff); 326 txBuf[3] = ((write_offset >> 8) & 0xff); 327 txBuf[4] = (write_offset & 0xff); 328 } else { 329 txBuf[1] = ((write_offset >> 16) & 0xff); 330 txBuf[2] = ((write_offset >> 8) & 0xff); 331 txBuf[3] = (write_offset & 0xff); 332 } 333 334 bytes_to_write = MIN(FLASH_PAGE_SIZE, 335 count - bytes_writen); 336 cmd.tx_cmd = txBuf; 337 cmd.rx_cmd = rxBuf; 338 cmd.tx_data = data + bytes_writen; 339 cmd.tx_data_sz = bytes_to_write; 340 cmd.rx_data = data + bytes_writen; 341 cmd.rx_data_sz = bytes_to_write; 342 343 /* 344 * Eash completed write operation resets WEL 345 * (write enable latch) to disabled state, 346 * so we re-enable it here 347 */ 348 mx25l_wait_for_device_ready(dev); 349 mx25l_set_writable(dev, 1); 350 351 err = SPIBUS_TRANSFER(pdev, dev, &cmd); 352 if (err) 353 break; 354 355 bytes_writen += bytes_to_write; 356 write_offset += bytes_to_write; 357 } 358 359 return (err); 360 } 361 362 static int 363 mx25l_read(device_t dev, off_t offset, caddr_t data, off_t count) 364 { 365 struct mx25l_softc *sc; 366 uint8_t txBuf[8], rxBuf[8]; 367 struct spi_command cmd; 368 device_t pdev; 369 int err = 0; 370 371 pdev = device_get_parent(dev); 372 sc = device_get_softc(dev); 373 374 /* 375 * Enforce the disk read sectorsize not the erase sectorsize. 376 * In this way, smaller read IO is possible,dramatically 377 * speeding up filesystem/geom_compress access. 378 */ 379 if (count % sc->sc_disk->d_sectorsize != 0 380 || offset % sc->sc_disk->d_sectorsize != 0) 381 return (EIO); 382 383 txBuf[0] = CMD_FAST_READ; 384 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 385 cmd.tx_cmd_sz = 6; 386 cmd.rx_cmd_sz = 6; 387 388 txBuf[1] = ((offset >> 24) & 0xff); 389 txBuf[2] = ((offset >> 16) & 0xff); 390 txBuf[3] = ((offset >> 8) & 0xff); 391 txBuf[4] = (offset & 0xff); 392 /* Dummy byte */ 393 txBuf[5] = 0; 394 } else { 395 cmd.tx_cmd_sz = 5; 396 cmd.rx_cmd_sz = 5; 397 398 txBuf[1] = ((offset >> 16) & 0xff); 399 txBuf[2] = ((offset >> 8) & 0xff); 400 txBuf[3] = (offset & 0xff); 401 /* Dummy byte */ 402 txBuf[4] = 0; 403 } 404 405 cmd.tx_cmd = txBuf; 406 cmd.rx_cmd = rxBuf; 407 cmd.tx_data = data; 408 cmd.tx_data_sz = count; 409 cmd.rx_data = data; 410 cmd.rx_data_sz = count; 411 412 err = SPIBUS_TRANSFER(pdev, dev, &cmd); 413 414 return (err); 415 } 416 417 static int 418 mx25l_set_4b_mode(device_t dev, uint8_t command) 419 { 420 uint8_t txBuf[1], rxBuf[1]; 421 struct spi_command cmd; 422 device_t pdev; 423 int err; 424 425 memset(&cmd, 0, sizeof(cmd)); 426 memset(txBuf, 0, sizeof(txBuf)); 427 memset(rxBuf, 0, sizeof(rxBuf)); 428 429 pdev = device_get_parent(dev); 430 431 cmd.tx_cmd_sz = cmd.rx_cmd_sz = 1; 432 433 cmd.tx_cmd = txBuf; 434 cmd.rx_cmd = rxBuf; 435 436 txBuf[0] = command; 437 438 err = SPIBUS_TRANSFER(pdev, dev, &cmd); 439 440 mx25l_wait_for_device_ready(dev); 441 442 return (err); 443 } 444 445 #ifdef FDT 446 static struct ofw_compat_data compat_data[] = { 447 { "st,m25p", 1 }, 448 { "jedec,spi-nor", 1 }, 449 { NULL, 0 }, 450 }; 451 #endif 452 453 static int 454 mx25l_probe(device_t dev) 455 { 456 #ifdef FDT 457 int i; 458 459 if (!ofw_bus_status_okay(dev)) 460 return (ENXIO); 461 462 /* First try to match the compatible property to the compat_data */ 463 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 1) 464 goto found; 465 466 /* 467 * Next, try to find a compatible device using the names in the 468 * flash_devices structure 469 */ 470 for (i = 0; i < nitems(flash_devices); i++) 471 if (ofw_bus_is_compatible(dev, flash_devices[i].name)) 472 goto found; 473 474 return (ENXIO); 475 found: 476 #endif 477 device_set_desc(dev, "M25Pxx Flash Family"); 478 479 return (0); 480 } 481 482 static int 483 mx25l_attach(device_t dev) 484 { 485 struct mx25l_softc *sc; 486 struct mx25l_flash_ident *ident; 487 488 sc = device_get_softc(dev); 489 sc->sc_dev = dev; 490 M25PXX_LOCK_INIT(sc); 491 492 ident = mx25l_get_device_ident(sc); 493 if (ident == NULL) 494 return (ENXIO); 495 496 mx25l_wait_for_device_ready(sc->sc_dev); 497 498 sc->sc_disk = disk_alloc(); 499 sc->sc_disk->d_open = mx25l_open; 500 sc->sc_disk->d_close = mx25l_close; 501 sc->sc_disk->d_strategy = mx25l_strategy; 502 sc->sc_disk->d_getattr = mx25l_getattr; 503 sc->sc_disk->d_ioctl = mx25l_ioctl; 504 sc->sc_disk->d_name = "flash/spi"; 505 sc->sc_disk->d_drv1 = sc; 506 sc->sc_disk->d_maxsize = DFLTPHYS; 507 sc->sc_disk->d_sectorsize = MX25L_SECTORSIZE; 508 sc->sc_disk->d_mediasize = ident->sectorsize * ident->sectorcount; 509 sc->sc_disk->d_unit = device_get_unit(sc->sc_dev); 510 sc->sc_disk->d_dump = NULL; /* NB: no dumps */ 511 /* Sectorsize for erase operations */ 512 sc->sc_sectorsize = ident->sectorsize; 513 sc->sc_flags = ident->flags; 514 515 if (sc->sc_flags & FL_ENABLE_4B_ADDR) 516 mx25l_set_4b_mode(dev, CMD_ENTER_4B_MODE); 517 518 if (sc->sc_flags & FL_DISABLE_4B_ADDR) 519 mx25l_set_4b_mode(dev, CMD_EXIT_4B_MODE); 520 521 /* NB: use stripesize to hold the erase/region size for RedBoot */ 522 sc->sc_disk->d_stripesize = ident->sectorsize; 523 524 disk_create(sc->sc_disk, DISK_VERSION); 525 bioq_init(&sc->sc_bio_queue); 526 527 kproc_create(&mx25l_task, sc, &sc->sc_p, 0, 0, "task: mx25l flash"); 528 device_printf(sc->sc_dev, "%s, sector %d bytes, %d sectors\n", 529 ident->name, ident->sectorsize, ident->sectorcount); 530 531 return (0); 532 } 533 534 static int 535 mx25l_detach(device_t dev) 536 { 537 538 return (EIO); 539 } 540 541 static int 542 mx25l_open(struct disk *dp) 543 { 544 return (0); 545 } 546 547 static int 548 mx25l_close(struct disk *dp) 549 { 550 551 return (0); 552 } 553 554 static int 555 mx25l_ioctl(struct disk *dp, u_long cmd, void *data, int fflag, 556 struct thread *td) 557 { 558 559 return (EINVAL); 560 } 561 562 static void 563 mx25l_strategy(struct bio *bp) 564 { 565 struct mx25l_softc *sc; 566 567 sc = (struct mx25l_softc *)bp->bio_disk->d_drv1; 568 M25PXX_LOCK(sc); 569 bioq_disksort(&sc->sc_bio_queue, bp); 570 wakeup(sc); 571 M25PXX_UNLOCK(sc); 572 } 573 574 static int 575 mx25l_getattr(struct bio *bp) 576 { 577 struct mx25l_softc *sc; 578 device_t dev; 579 580 if (bp->bio_disk == NULL || bp->bio_disk->d_drv1 == NULL) 581 return (ENXIO); 582 583 sc = bp->bio_disk->d_drv1; 584 dev = sc->sc_dev; 585 586 if (strcmp(bp->bio_attribute, "SPI::device") == 0) { 587 if (bp->bio_length != sizeof(dev)) 588 return (EFAULT); 589 bcopy(&dev, bp->bio_data, sizeof(dev)); 590 } else 591 return (-1); 592 return (0); 593 } 594 595 static void 596 mx25l_task(void *arg) 597 { 598 struct mx25l_softc *sc = (struct mx25l_softc*)arg; 599 struct bio *bp; 600 device_t dev; 601 602 for (;;) { 603 dev = sc->sc_dev; 604 M25PXX_LOCK(sc); 605 do { 606 bp = bioq_first(&sc->sc_bio_queue); 607 if (bp == NULL) 608 msleep(sc, &sc->sc_mtx, PRIBIO, "jobqueue", 0); 609 } while (bp == NULL); 610 bioq_remove(&sc->sc_bio_queue, bp); 611 M25PXX_UNLOCK(sc); 612 613 switch (bp->bio_cmd) { 614 case BIO_READ: 615 bp->bio_error = mx25l_read(dev, bp->bio_offset, 616 bp->bio_data, bp->bio_bcount); 617 break; 618 case BIO_WRITE: 619 bp->bio_error = mx25l_write(dev, bp->bio_offset, 620 bp->bio_data, bp->bio_bcount); 621 break; 622 default: 623 bp->bio_error = EINVAL; 624 } 625 626 627 biodone(bp); 628 } 629 } 630 631 static devclass_t mx25l_devclass; 632 633 static device_method_t mx25l_methods[] = { 634 /* Device interface */ 635 DEVMETHOD(device_probe, mx25l_probe), 636 DEVMETHOD(device_attach, mx25l_attach), 637 DEVMETHOD(device_detach, mx25l_detach), 638 639 { 0, 0 } 640 }; 641 642 static driver_t mx25l_driver = { 643 "mx25l", 644 mx25l_methods, 645 sizeof(struct mx25l_softc), 646 }; 647 648 DRIVER_MODULE(mx25l, spibus, mx25l_driver, mx25l_devclass, 0, 0); 649