1 /*- 2 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3 * Copyright (c) 2009 Oleksandr Tymoshenko. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 __FBSDID("$FreeBSD$"); 28 29 #include "opt_platform.h" 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/bio.h> 34 #include <sys/bus.h> 35 #include <sys/conf.h> 36 #include <sys/kernel.h> 37 #include <sys/kthread.h> 38 #include <sys/lock.h> 39 #include <sys/mbuf.h> 40 #include <sys/malloc.h> 41 #include <sys/module.h> 42 #include <sys/mutex.h> 43 #include <geom/geom_disk.h> 44 45 #ifdef FDT 46 #include <dev/fdt/fdt_common.h> 47 #include <dev/ofw/ofw_bus_subr.h> 48 #include <dev/ofw/openfirm.h> 49 #endif 50 51 #include <dev/spibus/spi.h> 52 #include "spibus_if.h" 53 54 #include <dev/flash/mx25lreg.h> 55 56 #define FL_NONE 0x00 57 #define FL_ERASE_4K 0x01 58 #define FL_ERASE_32K 0x02 59 #define FL_ENABLE_4B_ADDR 0x04 60 #define FL_DISABLE_4B_ADDR 0x08 61 62 /* 63 * Define the sectorsize to be a smaller size rather than the flash 64 * sector size. Trying to run FFS off of a 64k flash sector size 65 * results in a completely un-usable system. 66 */ 67 #define MX25L_SECTORSIZE 512 68 69 struct mx25l_flash_ident 70 { 71 const char *name; 72 uint8_t manufacturer_id; 73 uint16_t device_id; 74 unsigned int sectorsize; 75 unsigned int sectorcount; 76 unsigned int flags; 77 }; 78 79 struct mx25l_softc 80 { 81 device_t sc_dev; 82 uint8_t sc_manufacturer_id; 83 uint16_t sc_device_id; 84 unsigned int sc_sectorsize; 85 struct mtx sc_mtx; 86 struct disk *sc_disk; 87 struct proc *sc_p; 88 struct bio_queue_head sc_bio_queue; 89 unsigned int sc_flags; 90 }; 91 92 #define M25PXX_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 93 #define M25PXX_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 94 #define M25PXX_LOCK_INIT(_sc) \ 95 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \ 96 "mx25l", MTX_DEF) 97 #define M25PXX_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); 98 #define M25PXX_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED); 99 #define M25PXX_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED); 100 101 /* disk routines */ 102 static int mx25l_open(struct disk *dp); 103 static int mx25l_close(struct disk *dp); 104 static int mx25l_ioctl(struct disk *, u_long, void *, int, struct thread *); 105 static void mx25l_strategy(struct bio *bp); 106 static int mx25l_getattr(struct bio *bp); 107 static void mx25l_task(void *arg); 108 109 struct mx25l_flash_ident flash_devices[] = { 110 { "en25f32", 0x1c, 0x3116, 64 * 1024, 64, FL_NONE }, 111 { "en25p32", 0x1c, 0x2016, 64 * 1024, 64, FL_NONE }, 112 { "en25p64", 0x1c, 0x2017, 64 * 1024, 128, FL_NONE }, 113 { "en25q64", 0x1c, 0x3017, 64 * 1024, 128, FL_ERASE_4K }, 114 { "m25p64", 0x20, 0x2017, 64 * 1024, 128, FL_NONE }, 115 { "mx25ll32", 0xc2, 0x2016, 64 * 1024, 64, FL_NONE }, 116 { "mx25ll64", 0xc2, 0x2017, 64 * 1024, 128, FL_NONE }, 117 { "mx25ll128", 0xc2, 0x2018, 64 * 1024, 256, FL_ERASE_4K | FL_ERASE_32K }, 118 { "mx25ll256", 0xc2, 0x2019, 64 * 1024, 512, FL_ERASE_4K | FL_ERASE_32K | FL_ENABLE_4B_ADDR }, 119 { "s25fl032", 0x01, 0x0215, 64 * 1024, 64, FL_NONE }, 120 { "s25fl064", 0x01, 0x0216, 64 * 1024, 128, FL_NONE }, 121 { "s25fl128", 0x01, 0x2018, 64 * 1024, 256, FL_NONE }, 122 { "s25fl256s", 0x01, 0x0219, 64 * 1024, 512, FL_NONE }, 123 { "SST25VF032B", 0xbf, 0x254a, 64 * 1024, 64, FL_ERASE_4K | FL_ERASE_32K }, 124 125 /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ 126 { "w25x32", 0xef, 0x3016, 64 * 1024, 64, FL_ERASE_4K }, 127 { "w25x64", 0xef, 0x3017, 64 * 1024, 128, FL_ERASE_4K }, 128 { "w25q32", 0xef, 0x4016, 64 * 1024, 64, FL_ERASE_4K }, 129 { "w25q64", 0xef, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 130 { "w25q64bv", 0xef, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 131 { "w25q128", 0xef, 0x4018, 64 * 1024, 256, FL_ERASE_4K }, 132 { "w25q256", 0xef, 0x4019, 64 * 1024, 512, FL_ERASE_4K }, 133 134 /* Atmel */ 135 { "at25df641", 0x1f, 0x4800, 64 * 1024, 128, FL_ERASE_4K }, 136 }; 137 138 static uint8_t 139 mx25l_get_status(device_t dev) 140 { 141 uint8_t txBuf[2], rxBuf[2]; 142 struct spi_command cmd; 143 int err; 144 145 memset(&cmd, 0, sizeof(cmd)); 146 memset(txBuf, 0, sizeof(txBuf)); 147 memset(rxBuf, 0, sizeof(rxBuf)); 148 149 txBuf[0] = CMD_READ_STATUS; 150 cmd.tx_cmd = txBuf; 151 cmd.rx_cmd = rxBuf; 152 cmd.rx_cmd_sz = 2; 153 cmd.tx_cmd_sz = 2; 154 err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); 155 return (rxBuf[1]); 156 } 157 158 static void 159 mx25l_wait_for_device_ready(device_t dev) 160 { 161 while ((mx25l_get_status(dev) & STATUS_WIP)) 162 continue; 163 } 164 165 static struct mx25l_flash_ident* 166 mx25l_get_device_ident(struct mx25l_softc *sc) 167 { 168 device_t dev = sc->sc_dev; 169 uint8_t txBuf[8], rxBuf[8]; 170 struct spi_command cmd; 171 uint8_t manufacturer_id; 172 uint16_t dev_id; 173 int err, i; 174 175 memset(&cmd, 0, sizeof(cmd)); 176 memset(txBuf, 0, sizeof(txBuf)); 177 memset(rxBuf, 0, sizeof(rxBuf)); 178 179 txBuf[0] = CMD_READ_IDENT; 180 cmd.tx_cmd = &txBuf; 181 cmd.rx_cmd = &rxBuf; 182 /* 183 * Some compatible devices has extended two-bytes ID 184 * We'll use only manufacturer/deviceid atm 185 */ 186 cmd.tx_cmd_sz = 4; 187 cmd.rx_cmd_sz = 4; 188 err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); 189 if (err) 190 return (NULL); 191 192 manufacturer_id = rxBuf[1]; 193 dev_id = (rxBuf[2] << 8) | (rxBuf[3]); 194 195 for (i = 0; 196 i < nitems(flash_devices); i++) { 197 if ((flash_devices[i].manufacturer_id == manufacturer_id) && 198 (flash_devices[i].device_id == dev_id)) 199 return &flash_devices[i]; 200 } 201 202 printf("Unknown SPI flash device. Vendor: %02x, device id: %04x\n", 203 manufacturer_id, dev_id); 204 return (NULL); 205 } 206 207 static void 208 mx25l_set_writable(device_t dev, int writable) 209 { 210 uint8_t txBuf[1], rxBuf[1]; 211 struct spi_command cmd; 212 int err; 213 214 memset(&cmd, 0, sizeof(cmd)); 215 memset(txBuf, 0, sizeof(txBuf)); 216 memset(rxBuf, 0, sizeof(rxBuf)); 217 218 txBuf[0] = writable ? CMD_WRITE_ENABLE : CMD_WRITE_DISABLE; 219 cmd.tx_cmd = txBuf; 220 cmd.rx_cmd = rxBuf; 221 cmd.rx_cmd_sz = 1; 222 cmd.tx_cmd_sz = 1; 223 err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); 224 } 225 226 static void 227 mx25l_erase_cmd(device_t dev, off_t sector, uint8_t ecmd) 228 { 229 struct mx25l_softc *sc; 230 uint8_t txBuf[5], rxBuf[5]; 231 struct spi_command cmd; 232 int err; 233 234 sc = device_get_softc(dev); 235 236 mx25l_wait_for_device_ready(dev); 237 mx25l_set_writable(dev, 1); 238 239 memset(&cmd, 0, sizeof(cmd)); 240 memset(txBuf, 0, sizeof(txBuf)); 241 memset(rxBuf, 0, sizeof(rxBuf)); 242 243 txBuf[0] = ecmd; 244 cmd.tx_cmd = txBuf; 245 cmd.rx_cmd = rxBuf; 246 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 247 cmd.rx_cmd_sz = 5; 248 cmd.tx_cmd_sz = 5; 249 txBuf[1] = ((sector >> 24) & 0xff); 250 txBuf[2] = ((sector >> 16) & 0xff); 251 txBuf[3] = ((sector >> 8) & 0xff); 252 txBuf[4] = (sector & 0xff); 253 } else { 254 cmd.rx_cmd_sz = 4; 255 cmd.tx_cmd_sz = 4; 256 txBuf[1] = ((sector >> 16) & 0xff); 257 txBuf[2] = ((sector >> 8) & 0xff); 258 txBuf[3] = (sector & 0xff); 259 } 260 err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); 261 } 262 263 static int 264 mx25l_write(device_t dev, off_t offset, caddr_t data, off_t count) 265 { 266 struct mx25l_softc *sc; 267 uint8_t txBuf[8], rxBuf[8]; 268 struct spi_command cmd; 269 off_t write_offset; 270 long bytes_to_write, bytes_writen; 271 device_t pdev; 272 int err = 0; 273 274 pdev = device_get_parent(dev); 275 sc = device_get_softc(dev); 276 277 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 278 cmd.tx_cmd_sz = 5; 279 cmd.rx_cmd_sz = 5; 280 } else { 281 cmd.tx_cmd_sz = 4; 282 cmd.rx_cmd_sz = 4; 283 } 284 285 bytes_writen = 0; 286 write_offset = offset; 287 288 /* 289 * Use the erase sectorsize here since blocks are fully erased 290 * first before they're written to. 291 */ 292 if (count % sc->sc_sectorsize != 0 || offset % sc->sc_sectorsize != 0) 293 return (EIO); 294 295 /* 296 * Assume here that we write per-sector only 297 * and sector size should be 256 bytes aligned 298 */ 299 KASSERT(write_offset % FLASH_PAGE_SIZE == 0, 300 ("offset for BIO_WRITE is not page size (%d bytes) aligned", 301 FLASH_PAGE_SIZE)); 302 303 /* 304 * Maximum write size for CMD_PAGE_PROGRAM is 305 * FLASH_PAGE_SIZE, so split data to chunks 306 * FLASH_PAGE_SIZE bytes eash and write them 307 * one by one 308 */ 309 while (bytes_writen < count) { 310 /* 311 * If we crossed sector boundary - erase next sector 312 */ 313 if (((offset + bytes_writen) % sc->sc_sectorsize) == 0) 314 mx25l_erase_cmd(dev, offset + bytes_writen, CMD_SECTOR_ERASE); 315 316 txBuf[0] = CMD_PAGE_PROGRAM; 317 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 318 txBuf[1] = ((write_offset >> 24) & 0xff); 319 txBuf[2] = ((write_offset >> 16) & 0xff); 320 txBuf[3] = ((write_offset >> 8) & 0xff); 321 txBuf[4] = (write_offset & 0xff); 322 } else { 323 txBuf[1] = ((write_offset >> 16) & 0xff); 324 txBuf[2] = ((write_offset >> 8) & 0xff); 325 txBuf[3] = (write_offset & 0xff); 326 } 327 328 bytes_to_write = MIN(FLASH_PAGE_SIZE, 329 count - bytes_writen); 330 cmd.tx_cmd = txBuf; 331 cmd.rx_cmd = rxBuf; 332 cmd.tx_data = data + bytes_writen; 333 cmd.tx_data_sz = bytes_to_write; 334 cmd.rx_data = data + bytes_writen; 335 cmd.rx_data_sz = bytes_to_write; 336 337 /* 338 * Eash completed write operation resets WEL 339 * (write enable latch) to disabled state, 340 * so we re-enable it here 341 */ 342 mx25l_wait_for_device_ready(dev); 343 mx25l_set_writable(dev, 1); 344 345 err = SPIBUS_TRANSFER(pdev, dev, &cmd); 346 if (err) 347 break; 348 349 bytes_writen += bytes_to_write; 350 write_offset += bytes_to_write; 351 } 352 353 return (err); 354 } 355 356 static int 357 mx25l_read(device_t dev, off_t offset, caddr_t data, off_t count) 358 { 359 struct mx25l_softc *sc; 360 uint8_t txBuf[8], rxBuf[8]; 361 struct spi_command cmd; 362 device_t pdev; 363 int err = 0; 364 365 pdev = device_get_parent(dev); 366 sc = device_get_softc(dev); 367 368 /* 369 * Enforce the disk read sectorsize not the erase sectorsize. 370 * In this way, smaller read IO is possible,dramatically 371 * speeding up filesystem/geom_compress access. 372 */ 373 if (count % sc->sc_disk->d_sectorsize != 0 374 || offset % sc->sc_disk->d_sectorsize != 0) 375 return (EIO); 376 377 txBuf[0] = CMD_FAST_READ; 378 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 379 cmd.tx_cmd_sz = 6; 380 cmd.rx_cmd_sz = 6; 381 382 txBuf[1] = ((offset >> 24) & 0xff); 383 txBuf[2] = ((offset >> 16) & 0xff); 384 txBuf[3] = ((offset >> 8) & 0xff); 385 txBuf[4] = (offset & 0xff); 386 /* Dummy byte */ 387 txBuf[5] = 0; 388 } else { 389 cmd.tx_cmd_sz = 5; 390 cmd.rx_cmd_sz = 5; 391 392 txBuf[1] = ((offset >> 16) & 0xff); 393 txBuf[2] = ((offset >> 8) & 0xff); 394 txBuf[3] = (offset & 0xff); 395 /* Dummy byte */ 396 txBuf[4] = 0; 397 } 398 399 cmd.tx_cmd = txBuf; 400 cmd.rx_cmd = rxBuf; 401 cmd.tx_data = data; 402 cmd.tx_data_sz = count; 403 cmd.rx_data = data; 404 cmd.rx_data_sz = count; 405 406 err = SPIBUS_TRANSFER(pdev, dev, &cmd); 407 408 return (err); 409 } 410 411 static int 412 mx25l_set_4b_mode(device_t dev, uint8_t command) 413 { 414 uint8_t txBuf[1], rxBuf[1]; 415 struct spi_command cmd; 416 device_t pdev; 417 int err; 418 419 memset(&cmd, 0, sizeof(cmd)); 420 memset(txBuf, 0, sizeof(txBuf)); 421 memset(rxBuf, 0, sizeof(rxBuf)); 422 423 pdev = device_get_parent(dev); 424 425 cmd.tx_cmd_sz = cmd.rx_cmd_sz = 1; 426 427 cmd.tx_cmd = txBuf; 428 cmd.rx_cmd = rxBuf; 429 430 txBuf[0] = command; 431 432 err = SPIBUS_TRANSFER(pdev, dev, &cmd); 433 434 mx25l_wait_for_device_ready(dev); 435 436 return (err); 437 } 438 439 #ifdef FDT 440 static struct ofw_compat_data compat_data[] = { 441 { "st,m25p", 1 }, 442 { "jedec,spi-nor", 1 }, 443 { NULL, 0 }, 444 }; 445 #endif 446 447 static int 448 mx25l_probe(device_t dev) 449 { 450 #ifdef FDT 451 int i; 452 453 if (!ofw_bus_status_okay(dev)) 454 return (ENXIO); 455 456 /* First try to match the compatible property to the compat_data */ 457 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 1) 458 goto found; 459 460 /* 461 * Next, try to find a compatible device using the names in the 462 * flash_devices structure 463 */ 464 for (i = 0; i < nitems(flash_devices); i++) 465 if (ofw_bus_is_compatible(dev, flash_devices[i].name)) 466 goto found; 467 468 return (ENXIO); 469 found: 470 #endif 471 device_set_desc(dev, "M25Pxx Flash Family"); 472 473 return (0); 474 } 475 476 static int 477 mx25l_attach(device_t dev) 478 { 479 struct mx25l_softc *sc; 480 struct mx25l_flash_ident *ident; 481 482 sc = device_get_softc(dev); 483 sc->sc_dev = dev; 484 M25PXX_LOCK_INIT(sc); 485 486 ident = mx25l_get_device_ident(sc); 487 if (ident == NULL) 488 return (ENXIO); 489 490 mx25l_wait_for_device_ready(sc->sc_dev); 491 492 sc->sc_disk = disk_alloc(); 493 sc->sc_disk->d_open = mx25l_open; 494 sc->sc_disk->d_close = mx25l_close; 495 sc->sc_disk->d_strategy = mx25l_strategy; 496 sc->sc_disk->d_getattr = mx25l_getattr; 497 sc->sc_disk->d_ioctl = mx25l_ioctl; 498 sc->sc_disk->d_name = "flash/spi"; 499 sc->sc_disk->d_drv1 = sc; 500 sc->sc_disk->d_maxsize = DFLTPHYS; 501 sc->sc_disk->d_sectorsize = MX25L_SECTORSIZE; 502 sc->sc_disk->d_mediasize = ident->sectorsize * ident->sectorcount; 503 sc->sc_disk->d_unit = device_get_unit(sc->sc_dev); 504 sc->sc_disk->d_dump = NULL; /* NB: no dumps */ 505 /* Sectorsize for erase operations */ 506 sc->sc_sectorsize = ident->sectorsize; 507 sc->sc_flags = ident->flags; 508 509 if (sc->sc_flags & FL_ENABLE_4B_ADDR) 510 mx25l_set_4b_mode(dev, CMD_ENTER_4B_MODE); 511 512 if (sc->sc_flags & FL_DISABLE_4B_ADDR) 513 mx25l_set_4b_mode(dev, CMD_EXIT_4B_MODE); 514 515 /* NB: use stripesize to hold the erase/region size for RedBoot */ 516 sc->sc_disk->d_stripesize = ident->sectorsize; 517 518 disk_create(sc->sc_disk, DISK_VERSION); 519 bioq_init(&sc->sc_bio_queue); 520 521 kproc_create(&mx25l_task, sc, &sc->sc_p, 0, 0, "task: mx25l flash"); 522 device_printf(sc->sc_dev, "%s, sector %d bytes, %d sectors\n", 523 ident->name, ident->sectorsize, ident->sectorcount); 524 525 return (0); 526 } 527 528 static int 529 mx25l_detach(device_t dev) 530 { 531 532 return (EIO); 533 } 534 535 static int 536 mx25l_open(struct disk *dp) 537 { 538 return (0); 539 } 540 541 static int 542 mx25l_close(struct disk *dp) 543 { 544 545 return (0); 546 } 547 548 static int 549 mx25l_ioctl(struct disk *dp, u_long cmd, void *data, int fflag, 550 struct thread *td) 551 { 552 553 return (EINVAL); 554 } 555 556 static void 557 mx25l_strategy(struct bio *bp) 558 { 559 struct mx25l_softc *sc; 560 561 sc = (struct mx25l_softc *)bp->bio_disk->d_drv1; 562 M25PXX_LOCK(sc); 563 bioq_disksort(&sc->sc_bio_queue, bp); 564 wakeup(sc); 565 M25PXX_UNLOCK(sc); 566 } 567 568 static int 569 mx25l_getattr(struct bio *bp) 570 { 571 struct mx25l_softc *sc; 572 device_t dev; 573 574 if (bp->bio_disk == NULL || bp->bio_disk->d_drv1 == NULL) 575 return (ENXIO); 576 577 sc = bp->bio_disk->d_drv1; 578 dev = sc->sc_dev; 579 580 if (strcmp(bp->bio_attribute, "SPI::device") == 0) { 581 if (bp->bio_length != sizeof(dev)) 582 return (EFAULT); 583 bcopy(&dev, bp->bio_data, sizeof(dev)); 584 } else 585 return (-1); 586 return (0); 587 } 588 589 static void 590 mx25l_task(void *arg) 591 { 592 struct mx25l_softc *sc = (struct mx25l_softc*)arg; 593 struct bio *bp; 594 device_t dev; 595 596 for (;;) { 597 dev = sc->sc_dev; 598 M25PXX_LOCK(sc); 599 do { 600 bp = bioq_first(&sc->sc_bio_queue); 601 if (bp == NULL) 602 msleep(sc, &sc->sc_mtx, PRIBIO, "jobqueue", 0); 603 } while (bp == NULL); 604 bioq_remove(&sc->sc_bio_queue, bp); 605 M25PXX_UNLOCK(sc); 606 607 switch (bp->bio_cmd) { 608 case BIO_READ: 609 bp->bio_error = mx25l_read(dev, bp->bio_offset, 610 bp->bio_data, bp->bio_bcount); 611 break; 612 case BIO_WRITE: 613 bp->bio_error = mx25l_write(dev, bp->bio_offset, 614 bp->bio_data, bp->bio_bcount); 615 break; 616 default: 617 bp->bio_error = EINVAL; 618 } 619 620 621 biodone(bp); 622 } 623 } 624 625 static devclass_t mx25l_devclass; 626 627 static device_method_t mx25l_methods[] = { 628 /* Device interface */ 629 DEVMETHOD(device_probe, mx25l_probe), 630 DEVMETHOD(device_attach, mx25l_attach), 631 DEVMETHOD(device_detach, mx25l_detach), 632 633 { 0, 0 } 634 }; 635 636 static driver_t mx25l_driver = { 637 "mx25l", 638 mx25l_methods, 639 sizeof(struct mx25l_softc), 640 }; 641 642 DRIVER_MODULE(mx25l, spibus, mx25l_driver, mx25l_devclass, 0, 0); 643