1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2009 Oleksandr Tymoshenko. All rights reserved. 5 * Copyright (c) 2018 Ian Lepore. All rights reserved. 6 * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include "opt_platform.h" 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/bio.h> 37 #include <sys/bus.h> 38 #include <sys/conf.h> 39 #include <sys/kernel.h> 40 #include <sys/kthread.h> 41 #include <sys/lock.h> 42 #include <sys/mbuf.h> 43 #include <sys/malloc.h> 44 #include <sys/module.h> 45 #include <sys/mutex.h> 46 #include <geom/geom_disk.h> 47 48 #ifdef FDT 49 #include <dev/fdt/fdt_common.h> 50 #include <dev/ofw/ofw_bus_subr.h> 51 #include <dev/ofw/openfirm.h> 52 #endif 53 54 #include <dev/spibus/spi.h> 55 #include "spibus_if.h" 56 57 #include <dev/flash/mx25lreg.h> 58 59 #define FL_NONE 0x00 60 #define FL_ERASE_4K 0x01 61 #define FL_ERASE_32K 0x02 62 #define FL_ENABLE_4B_ADDR 0x04 63 #define FL_DISABLE_4B_ADDR 0x08 64 65 /* 66 * Define the sectorsize to be a smaller size rather than the flash 67 * sector size. Trying to run FFS off of a 64k flash sector size 68 * results in a completely un-usable system. 69 */ 70 #define MX25L_SECTORSIZE 512 71 72 struct mx25l_flash_ident 73 { 74 const char *name; 75 uint8_t manufacturer_id; 76 uint16_t device_id; 77 unsigned int sectorsize; 78 unsigned int sectorcount; 79 unsigned int flags; 80 }; 81 82 struct mx25l_softc 83 { 84 device_t sc_dev; 85 device_t sc_parent; 86 uint8_t sc_manufacturer_id; 87 uint16_t sc_device_id; 88 unsigned int sc_erasesize; 89 struct mtx sc_mtx; 90 struct disk *sc_disk; 91 struct proc *sc_p; 92 struct bio_queue_head sc_bio_queue; 93 unsigned int sc_flags; 94 unsigned int sc_taskstate; 95 uint8_t sc_dummybuf[FLASH_PAGE_SIZE]; 96 }; 97 98 #define TSTATE_STOPPED 0 99 #define TSTATE_STOPPING 1 100 #define TSTATE_RUNNING 2 101 102 #define M25PXX_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 103 #define M25PXX_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 104 #define M25PXX_LOCK_INIT(_sc) \ 105 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \ 106 "mx25l", MTX_DEF) 107 #define M25PXX_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); 108 #define M25PXX_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED); 109 #define M25PXX_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED); 110 111 /* disk routines */ 112 static int mx25l_open(struct disk *dp); 113 static int mx25l_close(struct disk *dp); 114 static int mx25l_ioctl(struct disk *, u_long, void *, int, struct thread *); 115 static void mx25l_strategy(struct bio *bp); 116 static int mx25l_getattr(struct bio *bp); 117 static void mx25l_task(void *arg); 118 119 static struct mx25l_flash_ident flash_devices[] = { 120 { "en25f32", 0x1c, 0x3116, 64 * 1024, 64, FL_NONE }, 121 { "en25p32", 0x1c, 0x2016, 64 * 1024, 64, FL_NONE }, 122 { "en25p64", 0x1c, 0x2017, 64 * 1024, 128, FL_NONE }, 123 { "en25q32", 0x1c, 0x3016, 64 * 1024, 64, FL_NONE }, 124 { "en25q64", 0x1c, 0x3017, 64 * 1024, 128, FL_ERASE_4K }, 125 { "m25p32", 0x20, 0x2016, 64 * 1024, 64, FL_NONE }, 126 { "m25p64", 0x20, 0x2017, 64 * 1024, 128, FL_NONE }, 127 { "mx25l1606e", 0xc2, 0x2015, 64 * 1024, 32, FL_ERASE_4K}, 128 { "mx25ll32", 0xc2, 0x2016, 64 * 1024, 64, FL_NONE }, 129 { "mx25ll64", 0xc2, 0x2017, 64 * 1024, 128, FL_NONE }, 130 { "mx25ll128", 0xc2, 0x2018, 64 * 1024, 256, FL_ERASE_4K | FL_ERASE_32K }, 131 { "mx25ll256", 0xc2, 0x2019, 64 * 1024, 512, FL_ERASE_4K | FL_ERASE_32K | FL_ENABLE_4B_ADDR }, 132 { "s25fl032", 0x01, 0x0215, 64 * 1024, 64, FL_NONE }, 133 { "s25fl064", 0x01, 0x0216, 64 * 1024, 128, FL_NONE }, 134 { "s25fl128", 0x01, 0x2018, 64 * 1024, 256, FL_NONE }, 135 { "s25fl256s", 0x01, 0x0219, 64 * 1024, 512, FL_NONE }, 136 { "s25fl512s", 0x01, 0x0220, 64 * 1024, 1024, FL_NONE }, 137 { "SST25VF010A", 0xbf, 0x2549, 4 * 1024, 32, FL_ERASE_4K | FL_ERASE_32K }, 138 { "SST25VF032B", 0xbf, 0x254a, 64 * 1024, 64, FL_ERASE_4K | FL_ERASE_32K }, 139 140 /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ 141 { "w25x32", 0xef, 0x3016, 64 * 1024, 64, FL_ERASE_4K }, 142 { "w25x64", 0xef, 0x3017, 64 * 1024, 128, FL_ERASE_4K }, 143 { "w25q32", 0xef, 0x4016, 64 * 1024, 64, FL_ERASE_4K }, 144 { "w25q64", 0xef, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 145 { "w25q64bv", 0xef, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 146 { "w25q128", 0xef, 0x4018, 64 * 1024, 256, FL_ERASE_4K }, 147 { "w25q256", 0xef, 0x4019, 64 * 1024, 512, FL_ERASE_4K }, 148 149 /* Atmel */ 150 { "at25df641", 0x1f, 0x4800, 64 * 1024, 128, FL_ERASE_4K }, 151 152 /* GigaDevice */ 153 { "gd25q64", 0xc8, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 154 { "gd25q128", 0xc8, 0x4018, 64 * 1024, 256, FL_ERASE_4K }, 155 156 /* Integrated Silicon Solution */ 157 { "is25wp256", 0x9d, 0x7019, 64 * 1024, 512, FL_ERASE_4K | FL_ENABLE_4B_ADDR}, 158 }; 159 160 static int 161 mx25l_wait_for_device_ready(struct mx25l_softc *sc) 162 { 163 uint8_t txBuf[2], rxBuf[2]; 164 struct spi_command cmd; 165 int err; 166 167 memset(&cmd, 0, sizeof(cmd)); 168 169 do { 170 txBuf[0] = CMD_READ_STATUS; 171 cmd.tx_cmd = txBuf; 172 cmd.rx_cmd = rxBuf; 173 cmd.rx_cmd_sz = 2; 174 cmd.tx_cmd_sz = 2; 175 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 176 } while (err == 0 && (rxBuf[1] & STATUS_WIP)); 177 178 return (err); 179 } 180 181 static struct mx25l_flash_ident* 182 mx25l_get_device_ident(struct mx25l_softc *sc) 183 { 184 uint8_t txBuf[8], rxBuf[8]; 185 struct spi_command cmd; 186 uint8_t manufacturer_id; 187 uint16_t dev_id; 188 int err, i; 189 190 memset(&cmd, 0, sizeof(cmd)); 191 memset(txBuf, 0, sizeof(txBuf)); 192 memset(rxBuf, 0, sizeof(rxBuf)); 193 194 txBuf[0] = CMD_READ_IDENT; 195 cmd.tx_cmd = &txBuf; 196 cmd.rx_cmd = &rxBuf; 197 /* 198 * Some compatible devices has extended two-bytes ID 199 * We'll use only manufacturer/deviceid atm 200 */ 201 cmd.tx_cmd_sz = 4; 202 cmd.rx_cmd_sz = 4; 203 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 204 if (err) 205 return (NULL); 206 207 manufacturer_id = rxBuf[1]; 208 dev_id = (rxBuf[2] << 8) | (rxBuf[3]); 209 210 for (i = 0; i < nitems(flash_devices); i++) { 211 if ((flash_devices[i].manufacturer_id == manufacturer_id) && 212 (flash_devices[i].device_id == dev_id)) 213 return &flash_devices[i]; 214 } 215 216 device_printf(sc->sc_dev, 217 "Unknown SPI flash device. Vendor: %02x, device id: %04x\n", 218 manufacturer_id, dev_id); 219 return (NULL); 220 } 221 222 static int 223 mx25l_set_writable(struct mx25l_softc *sc, int writable) 224 { 225 uint8_t txBuf[1], rxBuf[1]; 226 struct spi_command cmd; 227 int err; 228 229 memset(&cmd, 0, sizeof(cmd)); 230 memset(txBuf, 0, sizeof(txBuf)); 231 memset(rxBuf, 0, sizeof(rxBuf)); 232 233 txBuf[0] = writable ? CMD_WRITE_ENABLE : CMD_WRITE_DISABLE; 234 cmd.tx_cmd = txBuf; 235 cmd.rx_cmd = rxBuf; 236 cmd.rx_cmd_sz = 1; 237 cmd.tx_cmd_sz = 1; 238 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 239 return (err); 240 } 241 242 static int 243 mx25l_erase_cmd(struct mx25l_softc *sc, off_t sector) 244 { 245 uint8_t txBuf[5], rxBuf[5]; 246 struct spi_command cmd; 247 int err; 248 249 if ((err = mx25l_set_writable(sc, 1)) != 0) 250 return (err); 251 252 memset(&cmd, 0, sizeof(cmd)); 253 memset(txBuf, 0, sizeof(txBuf)); 254 memset(rxBuf, 0, sizeof(rxBuf)); 255 256 cmd.tx_cmd = txBuf; 257 cmd.rx_cmd = rxBuf; 258 259 if (sc->sc_flags & FL_ERASE_4K) 260 txBuf[0] = CMD_BLOCK_4K_ERASE; 261 else if (sc->sc_flags & FL_ERASE_32K) 262 txBuf[0] = CMD_BLOCK_32K_ERASE; 263 else 264 txBuf[0] = CMD_SECTOR_ERASE; 265 266 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 267 cmd.rx_cmd_sz = 5; 268 cmd.tx_cmd_sz = 5; 269 txBuf[1] = ((sector >> 24) & 0xff); 270 txBuf[2] = ((sector >> 16) & 0xff); 271 txBuf[3] = ((sector >> 8) & 0xff); 272 txBuf[4] = (sector & 0xff); 273 } else { 274 cmd.rx_cmd_sz = 4; 275 cmd.tx_cmd_sz = 4; 276 txBuf[1] = ((sector >> 16) & 0xff); 277 txBuf[2] = ((sector >> 8) & 0xff); 278 txBuf[3] = (sector & 0xff); 279 } 280 if ((err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd)) != 0) 281 return (err); 282 err = mx25l_wait_for_device_ready(sc); 283 return (err); 284 } 285 286 static int 287 mx25l_write(struct mx25l_softc *sc, off_t offset, caddr_t data, off_t count) 288 { 289 uint8_t txBuf[8], rxBuf[8]; 290 struct spi_command cmd; 291 off_t bytes_to_write; 292 int err = 0; 293 294 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 295 cmd.tx_cmd_sz = 5; 296 cmd.rx_cmd_sz = 5; 297 } else { 298 cmd.tx_cmd_sz = 4; 299 cmd.rx_cmd_sz = 4; 300 } 301 302 /* 303 * Writes must be aligned to the erase sectorsize, since blocks are 304 * fully erased before they're written to. 305 */ 306 if (count % sc->sc_erasesize != 0 || offset % sc->sc_erasesize != 0) 307 return (EIO); 308 309 /* 310 * Maximum write size for CMD_PAGE_PROGRAM is FLASH_PAGE_SIZE, so loop 311 * to write chunks of FLASH_PAGE_SIZE bytes each. 312 */ 313 while (count != 0) { 314 /* If we crossed a sector boundary, erase the next sector. */ 315 if (((offset) % sc->sc_erasesize) == 0) { 316 err = mx25l_erase_cmd(sc, offset); 317 if (err) 318 break; 319 } 320 321 txBuf[0] = CMD_PAGE_PROGRAM; 322 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 323 txBuf[1] = (offset >> 24) & 0xff; 324 txBuf[2] = (offset >> 16) & 0xff; 325 txBuf[3] = (offset >> 8) & 0xff; 326 txBuf[4] = offset & 0xff; 327 } else { 328 txBuf[1] = (offset >> 16) & 0xff; 329 txBuf[2] = (offset >> 8) & 0xff; 330 txBuf[3] = offset & 0xff; 331 } 332 333 bytes_to_write = MIN(FLASH_PAGE_SIZE, count); 334 cmd.tx_cmd = txBuf; 335 cmd.rx_cmd = rxBuf; 336 cmd.tx_data = data; 337 cmd.rx_data = sc->sc_dummybuf; 338 cmd.tx_data_sz = (uint32_t)bytes_to_write; 339 cmd.rx_data_sz = (uint32_t)bytes_to_write; 340 341 /* 342 * Each completed write operation resets WEL (write enable 343 * latch) to disabled state, so we re-enable it here. 344 */ 345 if ((err = mx25l_wait_for_device_ready(sc)) != 0) 346 break; 347 if ((err = mx25l_set_writable(sc, 1)) != 0) 348 break; 349 350 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 351 if (err != 0) 352 break; 353 err = mx25l_wait_for_device_ready(sc); 354 if (err) 355 break; 356 357 data += bytes_to_write; 358 offset += bytes_to_write; 359 count -= bytes_to_write; 360 } 361 362 return (err); 363 } 364 365 static int 366 mx25l_read(struct mx25l_softc *sc, off_t offset, caddr_t data, off_t count) 367 { 368 uint8_t txBuf[8], rxBuf[8]; 369 struct spi_command cmd; 370 int err = 0; 371 372 /* 373 * Enforce that reads are aligned to the disk sectorsize, not the 374 * erase sectorsize. In this way, smaller read IO is possible, 375 * dramatically speeding up filesystem/geom_compress access. 376 */ 377 if (count % sc->sc_disk->d_sectorsize != 0 || 378 offset % sc->sc_disk->d_sectorsize != 0) 379 return (EIO); 380 381 txBuf[0] = CMD_FAST_READ; 382 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 383 cmd.tx_cmd_sz = 6; 384 cmd.rx_cmd_sz = 6; 385 386 txBuf[1] = (offset >> 24) & 0xff; 387 txBuf[2] = (offset >> 16) & 0xff; 388 txBuf[3] = (offset >> 8) & 0xff; 389 txBuf[4] = offset & 0xff; 390 /* Dummy byte */ 391 txBuf[5] = 0; 392 } else { 393 cmd.tx_cmd_sz = 5; 394 cmd.rx_cmd_sz = 5; 395 396 txBuf[1] = (offset >> 16) & 0xff; 397 txBuf[2] = (offset >> 8) & 0xff; 398 txBuf[3] = offset & 0xff; 399 /* Dummy byte */ 400 txBuf[4] = 0; 401 } 402 403 cmd.tx_cmd = txBuf; 404 cmd.rx_cmd = rxBuf; 405 cmd.tx_data = data; 406 cmd.rx_data = data; 407 cmd.tx_data_sz = count; 408 cmd.rx_data_sz = count; 409 410 err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd); 411 return (err); 412 } 413 414 static int 415 mx25l_set_4b_mode(struct mx25l_softc *sc, uint8_t command) 416 { 417 uint8_t txBuf[1], rxBuf[1]; 418 struct spi_command cmd; 419 int err; 420 421 memset(&cmd, 0, sizeof(cmd)); 422 memset(txBuf, 0, sizeof(txBuf)); 423 memset(rxBuf, 0, sizeof(rxBuf)); 424 425 cmd.tx_cmd_sz = cmd.rx_cmd_sz = 1; 426 427 cmd.tx_cmd = txBuf; 428 cmd.rx_cmd = rxBuf; 429 430 txBuf[0] = command; 431 432 if ((err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd)) == 0) 433 err = mx25l_wait_for_device_ready(sc); 434 435 return (err); 436 } 437 438 #ifdef FDT 439 static struct ofw_compat_data compat_data[] = { 440 { "st,m25p", 1 }, 441 { "jedec,spi-nor", 1 }, 442 { NULL, 0 }, 443 }; 444 #endif 445 446 static int 447 mx25l_probe(device_t dev) 448 { 449 #ifdef FDT 450 int i; 451 452 if (!ofw_bus_status_okay(dev)) 453 return (ENXIO); 454 455 /* First try to match the compatible property to the compat_data */ 456 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 1) 457 goto found; 458 459 /* 460 * Next, try to find a compatible device using the names in the 461 * flash_devices structure 462 */ 463 for (i = 0; i < nitems(flash_devices); i++) 464 if (ofw_bus_is_compatible(dev, flash_devices[i].name)) 465 goto found; 466 467 return (ENXIO); 468 found: 469 #endif 470 device_set_desc(dev, "M25Pxx Flash Family"); 471 472 return (0); 473 } 474 475 static int 476 mx25l_attach(device_t dev) 477 { 478 struct mx25l_softc *sc; 479 struct mx25l_flash_ident *ident; 480 int err; 481 482 sc = device_get_softc(dev); 483 sc->sc_dev = dev; 484 sc->sc_parent = device_get_parent(sc->sc_dev); 485 486 M25PXX_LOCK_INIT(sc); 487 488 ident = mx25l_get_device_ident(sc); 489 if (ident == NULL) 490 return (ENXIO); 491 492 if ((err = mx25l_wait_for_device_ready(sc)) != 0) 493 return (err); 494 495 sc->sc_flags = ident->flags; 496 497 if (sc->sc_flags & FL_ERASE_4K) 498 sc->sc_erasesize = 4 * 1024; 499 else if (sc->sc_flags & FL_ERASE_32K) 500 sc->sc_erasesize = 32 * 1024; 501 else 502 sc->sc_erasesize = ident->sectorsize; 503 504 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 505 if ((err = mx25l_set_4b_mode(sc, CMD_ENTER_4B_MODE)) != 0) 506 return (err); 507 } else if (sc->sc_flags & FL_DISABLE_4B_ADDR) { 508 if ((err = mx25l_set_4b_mode(sc, CMD_EXIT_4B_MODE)) != 0) 509 return (err); 510 } 511 512 sc->sc_disk = disk_alloc(); 513 sc->sc_disk->d_open = mx25l_open; 514 sc->sc_disk->d_close = mx25l_close; 515 sc->sc_disk->d_strategy = mx25l_strategy; 516 sc->sc_disk->d_getattr = mx25l_getattr; 517 sc->sc_disk->d_ioctl = mx25l_ioctl; 518 sc->sc_disk->d_name = "flash/spi"; 519 sc->sc_disk->d_drv1 = sc; 520 sc->sc_disk->d_maxsize = DFLTPHYS; 521 sc->sc_disk->d_sectorsize = MX25L_SECTORSIZE; 522 sc->sc_disk->d_mediasize = ident->sectorsize * ident->sectorcount; 523 sc->sc_disk->d_stripesize = sc->sc_erasesize; 524 sc->sc_disk->d_unit = device_get_unit(sc->sc_dev); 525 sc->sc_disk->d_dump = NULL; /* NB: no dumps */ 526 strlcpy(sc->sc_disk->d_descr, ident->name, 527 sizeof(sc->sc_disk->d_descr)); 528 529 disk_create(sc->sc_disk, DISK_VERSION); 530 bioq_init(&sc->sc_bio_queue); 531 532 kproc_create(&mx25l_task, sc, &sc->sc_p, 0, 0, "task: mx25l flash"); 533 sc->sc_taskstate = TSTATE_RUNNING; 534 535 device_printf(sc->sc_dev, 536 "device type %s, size %dK in %d sectors of %dK, erase size %dK\n", 537 ident->name, 538 ident->sectorcount * ident->sectorsize / 1024, 539 ident->sectorcount, ident->sectorsize / 1024, 540 sc->sc_erasesize / 1024); 541 542 return (0); 543 } 544 545 static int 546 mx25l_detach(device_t dev) 547 { 548 struct mx25l_softc *sc; 549 int err; 550 551 sc = device_get_softc(dev); 552 err = 0; 553 554 M25PXX_LOCK(sc); 555 if (sc->sc_taskstate == TSTATE_RUNNING) { 556 sc->sc_taskstate = TSTATE_STOPPING; 557 wakeup(sc); 558 while (err == 0 && sc->sc_taskstate != TSTATE_STOPPED) { 559 err = msleep(sc, &sc->sc_mtx, 0, "mx25dt", hz * 3); 560 if (err != 0) { 561 sc->sc_taskstate = TSTATE_RUNNING; 562 device_printf(sc->sc_dev, 563 "Failed to stop queue task\n"); 564 } 565 } 566 } 567 M25PXX_UNLOCK(sc); 568 569 if (err == 0 && sc->sc_taskstate == TSTATE_STOPPED) { 570 disk_destroy(sc->sc_disk); 571 bioq_flush(&sc->sc_bio_queue, NULL, ENXIO); 572 M25PXX_LOCK_DESTROY(sc); 573 } 574 return (err); 575 } 576 577 static int 578 mx25l_open(struct disk *dp) 579 { 580 return (0); 581 } 582 583 static int 584 mx25l_close(struct disk *dp) 585 { 586 587 return (0); 588 } 589 590 static int 591 mx25l_ioctl(struct disk *dp, u_long cmd, void *data, int fflag, 592 struct thread *td) 593 { 594 595 return (EINVAL); 596 } 597 598 static void 599 mx25l_strategy(struct bio *bp) 600 { 601 struct mx25l_softc *sc; 602 603 sc = (struct mx25l_softc *)bp->bio_disk->d_drv1; 604 M25PXX_LOCK(sc); 605 bioq_disksort(&sc->sc_bio_queue, bp); 606 wakeup(sc); 607 M25PXX_UNLOCK(sc); 608 } 609 610 static int 611 mx25l_getattr(struct bio *bp) 612 { 613 struct mx25l_softc *sc; 614 device_t dev; 615 616 if (bp->bio_disk == NULL || bp->bio_disk->d_drv1 == NULL) 617 return (ENXIO); 618 619 sc = bp->bio_disk->d_drv1; 620 dev = sc->sc_dev; 621 622 if (strcmp(bp->bio_attribute, "SPI::device") == 0) { 623 if (bp->bio_length != sizeof(dev)) 624 return (EFAULT); 625 bcopy(&dev, bp->bio_data, sizeof(dev)); 626 } else 627 return (-1); 628 return (0); 629 } 630 631 static void 632 mx25l_task(void *arg) 633 { 634 struct mx25l_softc *sc = (struct mx25l_softc*)arg; 635 struct bio *bp; 636 637 for (;;) { 638 M25PXX_LOCK(sc); 639 do { 640 if (sc->sc_taskstate == TSTATE_STOPPING) { 641 sc->sc_taskstate = TSTATE_STOPPED; 642 M25PXX_UNLOCK(sc); 643 wakeup(sc); 644 kproc_exit(0); 645 } 646 bp = bioq_first(&sc->sc_bio_queue); 647 if (bp == NULL) 648 msleep(sc, &sc->sc_mtx, PRIBIO, "mx25jq", 0); 649 } while (bp == NULL); 650 bioq_remove(&sc->sc_bio_queue, bp); 651 M25PXX_UNLOCK(sc); 652 653 switch (bp->bio_cmd) { 654 case BIO_READ: 655 bp->bio_error = mx25l_read(sc, bp->bio_offset, 656 bp->bio_data, bp->bio_bcount); 657 break; 658 case BIO_WRITE: 659 bp->bio_error = mx25l_write(sc, bp->bio_offset, 660 bp->bio_data, bp->bio_bcount); 661 break; 662 default: 663 bp->bio_error = EOPNOTSUPP; 664 } 665 666 667 biodone(bp); 668 } 669 } 670 671 static device_method_t mx25l_methods[] = { 672 /* Device interface */ 673 DEVMETHOD(device_probe, mx25l_probe), 674 DEVMETHOD(device_attach, mx25l_attach), 675 DEVMETHOD(device_detach, mx25l_detach), 676 677 { 0, 0 } 678 }; 679 680 static driver_t mx25l_driver = { 681 "mx25l", 682 mx25l_methods, 683 sizeof(struct mx25l_softc), 684 }; 685 686 DRIVER_MODULE(mx25l, spibus, mx25l_driver, 0, 0); 687 MODULE_DEPEND(mx25l, spibus, 1, 1, 1); 688 #ifdef FDT 689 MODULE_DEPEND(mx25l, fdt_slicer, 1, 1, 1); 690 SPIBUS_FDT_PNP_INFO(compat_data); 691 #endif 692