1 /*- 2 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3 * Copyright (c) 2009 Oleksandr Tymoshenko. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 __FBSDID("$FreeBSD$"); 28 29 #include "opt_platform.h" 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/bio.h> 34 #include <sys/bus.h> 35 #include <sys/conf.h> 36 #include <sys/kernel.h> 37 #include <sys/kthread.h> 38 #include <sys/lock.h> 39 #include <sys/mbuf.h> 40 #include <sys/malloc.h> 41 #include <sys/module.h> 42 #include <sys/mutex.h> 43 #include <geom/geom_disk.h> 44 45 #ifdef FDT 46 #include <dev/fdt/fdt_common.h> 47 #include <dev/ofw/ofw_bus_subr.h> 48 #include <dev/ofw/openfirm.h> 49 #endif 50 51 #include <dev/spibus/spi.h> 52 #include "spibus_if.h" 53 54 #include <dev/flash/mx25lreg.h> 55 56 #define FL_NONE 0x00 57 #define FL_ERASE_4K 0x01 58 #define FL_ERASE_32K 0x02 59 #define FL_ENABLE_4B_ADDR 0x04 60 #define FL_DISABLE_4B_ADDR 0x08 61 62 /* 63 * Define the sectorsize to be a smaller size rather than the flash 64 * sector size. Trying to run FFS off of a 64k flash sector size 65 * results in a completely un-usable system. 66 */ 67 #define MX25L_SECTORSIZE 512 68 69 struct mx25l_flash_ident 70 { 71 const char *name; 72 uint8_t manufacturer_id; 73 uint16_t device_id; 74 unsigned int sectorsize; 75 unsigned int sectorcount; 76 unsigned int flags; 77 }; 78 79 struct mx25l_softc 80 { 81 device_t sc_dev; 82 uint8_t sc_manufacturer_id; 83 uint16_t sc_device_id; 84 unsigned int sc_sectorsize; 85 struct mtx sc_mtx; 86 struct disk *sc_disk; 87 struct proc *sc_p; 88 struct bio_queue_head sc_bio_queue; 89 unsigned int sc_flags; 90 }; 91 92 #define M25PXX_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 93 #define M25PXX_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 94 #define M25PXX_LOCK_INIT(_sc) \ 95 mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->sc_dev), \ 96 "mx25l", MTX_DEF) 97 #define M25PXX_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); 98 #define M25PXX_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED); 99 #define M25PXX_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED); 100 101 /* disk routines */ 102 static int mx25l_open(struct disk *dp); 103 static int mx25l_close(struct disk *dp); 104 static int mx25l_ioctl(struct disk *, u_long, void *, int, struct thread *); 105 static void mx25l_strategy(struct bio *bp); 106 static int mx25l_getattr(struct bio *bp); 107 static void mx25l_task(void *arg); 108 109 struct mx25l_flash_ident flash_devices[] = { 110 { "en25f32", 0x1c, 0x3116, 64 * 1024, 64, FL_NONE }, 111 { "en25p32", 0x1c, 0x2016, 64 * 1024, 64, FL_NONE }, 112 { "en25p64", 0x1c, 0x2017, 64 * 1024, 128, FL_NONE }, 113 { "en25q32", 0x1c, 0x3016, 64 * 1024, 64, FL_NONE }, 114 { "en25q64", 0x1c, 0x3017, 64 * 1024, 128, FL_ERASE_4K }, 115 { "m25p32", 0x20, 0x2016, 64 * 1024, 64, FL_NONE }, 116 { "m25p64", 0x20, 0x2017, 64 * 1024, 128, FL_NONE }, 117 { "mx25ll32", 0xc2, 0x2016, 64 * 1024, 64, FL_NONE }, 118 { "mx25ll64", 0xc2, 0x2017, 64 * 1024, 128, FL_NONE }, 119 { "mx25ll128", 0xc2, 0x2018, 64 * 1024, 256, FL_ERASE_4K | FL_ERASE_32K }, 120 { "mx25ll256", 0xc2, 0x2019, 64 * 1024, 512, FL_ERASE_4K | FL_ERASE_32K | FL_ENABLE_4B_ADDR }, 121 { "s25fl032", 0x01, 0x0215, 64 * 1024, 64, FL_NONE }, 122 { "s25fl064", 0x01, 0x0216, 64 * 1024, 128, FL_NONE }, 123 { "s25fl128", 0x01, 0x2018, 64 * 1024, 256, FL_NONE }, 124 { "s25fl256s", 0x01, 0x0219, 64 * 1024, 512, FL_NONE }, 125 { "SST25VF032B", 0xbf, 0x254a, 64 * 1024, 64, FL_ERASE_4K | FL_ERASE_32K }, 126 127 /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ 128 { "w25x32", 0xef, 0x3016, 64 * 1024, 64, FL_ERASE_4K }, 129 { "w25x64", 0xef, 0x3017, 64 * 1024, 128, FL_ERASE_4K }, 130 { "w25q32", 0xef, 0x4016, 64 * 1024, 64, FL_ERASE_4K }, 131 { "w25q64", 0xef, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 132 { "w25q64bv", 0xef, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 133 { "w25q128", 0xef, 0x4018, 64 * 1024, 256, FL_ERASE_4K }, 134 { "w25q256", 0xef, 0x4019, 64 * 1024, 512, FL_ERASE_4K }, 135 136 /* Atmel */ 137 { "at25df641", 0x1f, 0x4800, 64 * 1024, 128, FL_ERASE_4K }, 138 139 /* GigaDevice */ 140 { "gd25q64", 0xc8, 0x4017, 64 * 1024, 128, FL_ERASE_4K }, 141 }; 142 143 static uint8_t 144 mx25l_get_status(device_t dev) 145 { 146 uint8_t txBuf[2], rxBuf[2]; 147 struct spi_command cmd; 148 int err; 149 150 memset(&cmd, 0, sizeof(cmd)); 151 memset(txBuf, 0, sizeof(txBuf)); 152 memset(rxBuf, 0, sizeof(rxBuf)); 153 154 txBuf[0] = CMD_READ_STATUS; 155 cmd.tx_cmd = txBuf; 156 cmd.rx_cmd = rxBuf; 157 cmd.rx_cmd_sz = 2; 158 cmd.tx_cmd_sz = 2; 159 err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); 160 return (rxBuf[1]); 161 } 162 163 static void 164 mx25l_wait_for_device_ready(device_t dev) 165 { 166 while ((mx25l_get_status(dev) & STATUS_WIP)) 167 continue; 168 } 169 170 static struct mx25l_flash_ident* 171 mx25l_get_device_ident(struct mx25l_softc *sc) 172 { 173 device_t dev = sc->sc_dev; 174 uint8_t txBuf[8], rxBuf[8]; 175 struct spi_command cmd; 176 uint8_t manufacturer_id; 177 uint16_t dev_id; 178 int err, i; 179 180 memset(&cmd, 0, sizeof(cmd)); 181 memset(txBuf, 0, sizeof(txBuf)); 182 memset(rxBuf, 0, sizeof(rxBuf)); 183 184 txBuf[0] = CMD_READ_IDENT; 185 cmd.tx_cmd = &txBuf; 186 cmd.rx_cmd = &rxBuf; 187 /* 188 * Some compatible devices has extended two-bytes ID 189 * We'll use only manufacturer/deviceid atm 190 */ 191 cmd.tx_cmd_sz = 4; 192 cmd.rx_cmd_sz = 4; 193 err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); 194 if (err) 195 return (NULL); 196 197 manufacturer_id = rxBuf[1]; 198 dev_id = (rxBuf[2] << 8) | (rxBuf[3]); 199 200 for (i = 0; 201 i < nitems(flash_devices); i++) { 202 if ((flash_devices[i].manufacturer_id == manufacturer_id) && 203 (flash_devices[i].device_id == dev_id)) 204 return &flash_devices[i]; 205 } 206 207 printf("Unknown SPI flash device. Vendor: %02x, device id: %04x\n", 208 manufacturer_id, dev_id); 209 return (NULL); 210 } 211 212 static void 213 mx25l_set_writable(device_t dev, int writable) 214 { 215 uint8_t txBuf[1], rxBuf[1]; 216 struct spi_command cmd; 217 int err; 218 219 memset(&cmd, 0, sizeof(cmd)); 220 memset(txBuf, 0, sizeof(txBuf)); 221 memset(rxBuf, 0, sizeof(rxBuf)); 222 223 txBuf[0] = writable ? CMD_WRITE_ENABLE : CMD_WRITE_DISABLE; 224 cmd.tx_cmd = txBuf; 225 cmd.rx_cmd = rxBuf; 226 cmd.rx_cmd_sz = 1; 227 cmd.tx_cmd_sz = 1; 228 err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); 229 } 230 231 static void 232 mx25l_erase_cmd(device_t dev, off_t sector, uint8_t ecmd) 233 { 234 struct mx25l_softc *sc; 235 uint8_t txBuf[5], rxBuf[5]; 236 struct spi_command cmd; 237 int err; 238 239 sc = device_get_softc(dev); 240 241 mx25l_wait_for_device_ready(dev); 242 mx25l_set_writable(dev, 1); 243 244 memset(&cmd, 0, sizeof(cmd)); 245 memset(txBuf, 0, sizeof(txBuf)); 246 memset(rxBuf, 0, sizeof(rxBuf)); 247 248 txBuf[0] = ecmd; 249 cmd.tx_cmd = txBuf; 250 cmd.rx_cmd = rxBuf; 251 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 252 cmd.rx_cmd_sz = 5; 253 cmd.tx_cmd_sz = 5; 254 txBuf[1] = ((sector >> 24) & 0xff); 255 txBuf[2] = ((sector >> 16) & 0xff); 256 txBuf[3] = ((sector >> 8) & 0xff); 257 txBuf[4] = (sector & 0xff); 258 } else { 259 cmd.rx_cmd_sz = 4; 260 cmd.tx_cmd_sz = 4; 261 txBuf[1] = ((sector >> 16) & 0xff); 262 txBuf[2] = ((sector >> 8) & 0xff); 263 txBuf[3] = (sector & 0xff); 264 } 265 err = SPIBUS_TRANSFER(device_get_parent(dev), dev, &cmd); 266 } 267 268 static int 269 mx25l_write(device_t dev, off_t offset, caddr_t data, off_t count) 270 { 271 struct mx25l_softc *sc; 272 uint8_t txBuf[8], rxBuf[8]; 273 struct spi_command cmd; 274 off_t write_offset; 275 long bytes_to_write, bytes_writen; 276 device_t pdev; 277 int err = 0; 278 279 pdev = device_get_parent(dev); 280 sc = device_get_softc(dev); 281 282 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 283 cmd.tx_cmd_sz = 5; 284 cmd.rx_cmd_sz = 5; 285 } else { 286 cmd.tx_cmd_sz = 4; 287 cmd.rx_cmd_sz = 4; 288 } 289 290 bytes_writen = 0; 291 write_offset = offset; 292 293 /* 294 * Use the erase sectorsize here since blocks are fully erased 295 * first before they're written to. 296 */ 297 if (count % sc->sc_sectorsize != 0 || offset % sc->sc_sectorsize != 0) 298 return (EIO); 299 300 /* 301 * Assume here that we write per-sector only 302 * and sector size should be 256 bytes aligned 303 */ 304 KASSERT(write_offset % FLASH_PAGE_SIZE == 0, 305 ("offset for BIO_WRITE is not page size (%d bytes) aligned", 306 FLASH_PAGE_SIZE)); 307 308 /* 309 * Maximum write size for CMD_PAGE_PROGRAM is 310 * FLASH_PAGE_SIZE, so split data to chunks 311 * FLASH_PAGE_SIZE bytes eash and write them 312 * one by one 313 */ 314 while (bytes_writen < count) { 315 /* 316 * If we crossed sector boundary - erase next sector 317 */ 318 if (((offset + bytes_writen) % sc->sc_sectorsize) == 0) 319 mx25l_erase_cmd(dev, offset + bytes_writen, CMD_SECTOR_ERASE); 320 321 txBuf[0] = CMD_PAGE_PROGRAM; 322 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 323 txBuf[1] = ((write_offset >> 24) & 0xff); 324 txBuf[2] = ((write_offset >> 16) & 0xff); 325 txBuf[3] = ((write_offset >> 8) & 0xff); 326 txBuf[4] = (write_offset & 0xff); 327 } else { 328 txBuf[1] = ((write_offset >> 16) & 0xff); 329 txBuf[2] = ((write_offset >> 8) & 0xff); 330 txBuf[3] = (write_offset & 0xff); 331 } 332 333 bytes_to_write = MIN(FLASH_PAGE_SIZE, 334 count - bytes_writen); 335 cmd.tx_cmd = txBuf; 336 cmd.rx_cmd = rxBuf; 337 cmd.tx_data = data + bytes_writen; 338 cmd.tx_data_sz = bytes_to_write; 339 cmd.rx_data = data + bytes_writen; 340 cmd.rx_data_sz = bytes_to_write; 341 342 /* 343 * Eash completed write operation resets WEL 344 * (write enable latch) to disabled state, 345 * so we re-enable it here 346 */ 347 mx25l_wait_for_device_ready(dev); 348 mx25l_set_writable(dev, 1); 349 350 err = SPIBUS_TRANSFER(pdev, dev, &cmd); 351 if (err) 352 break; 353 354 bytes_writen += bytes_to_write; 355 write_offset += bytes_to_write; 356 } 357 358 return (err); 359 } 360 361 static int 362 mx25l_read(device_t dev, off_t offset, caddr_t data, off_t count) 363 { 364 struct mx25l_softc *sc; 365 uint8_t txBuf[8], rxBuf[8]; 366 struct spi_command cmd; 367 device_t pdev; 368 int err = 0; 369 370 pdev = device_get_parent(dev); 371 sc = device_get_softc(dev); 372 373 /* 374 * Enforce the disk read sectorsize not the erase sectorsize. 375 * In this way, smaller read IO is possible,dramatically 376 * speeding up filesystem/geom_compress access. 377 */ 378 if (count % sc->sc_disk->d_sectorsize != 0 379 || offset % sc->sc_disk->d_sectorsize != 0) 380 return (EIO); 381 382 txBuf[0] = CMD_FAST_READ; 383 if (sc->sc_flags & FL_ENABLE_4B_ADDR) { 384 cmd.tx_cmd_sz = 6; 385 cmd.rx_cmd_sz = 6; 386 387 txBuf[1] = ((offset >> 24) & 0xff); 388 txBuf[2] = ((offset >> 16) & 0xff); 389 txBuf[3] = ((offset >> 8) & 0xff); 390 txBuf[4] = (offset & 0xff); 391 /* Dummy byte */ 392 txBuf[5] = 0; 393 } else { 394 cmd.tx_cmd_sz = 5; 395 cmd.rx_cmd_sz = 5; 396 397 txBuf[1] = ((offset >> 16) & 0xff); 398 txBuf[2] = ((offset >> 8) & 0xff); 399 txBuf[3] = (offset & 0xff); 400 /* Dummy byte */ 401 txBuf[4] = 0; 402 } 403 404 cmd.tx_cmd = txBuf; 405 cmd.rx_cmd = rxBuf; 406 cmd.tx_data = data; 407 cmd.tx_data_sz = count; 408 cmd.rx_data = data; 409 cmd.rx_data_sz = count; 410 411 err = SPIBUS_TRANSFER(pdev, dev, &cmd); 412 413 return (err); 414 } 415 416 static int 417 mx25l_set_4b_mode(device_t dev, uint8_t command) 418 { 419 uint8_t txBuf[1], rxBuf[1]; 420 struct spi_command cmd; 421 device_t pdev; 422 int err; 423 424 memset(&cmd, 0, sizeof(cmd)); 425 memset(txBuf, 0, sizeof(txBuf)); 426 memset(rxBuf, 0, sizeof(rxBuf)); 427 428 pdev = device_get_parent(dev); 429 430 cmd.tx_cmd_sz = cmd.rx_cmd_sz = 1; 431 432 cmd.tx_cmd = txBuf; 433 cmd.rx_cmd = rxBuf; 434 435 txBuf[0] = command; 436 437 err = SPIBUS_TRANSFER(pdev, dev, &cmd); 438 439 mx25l_wait_for_device_ready(dev); 440 441 return (err); 442 } 443 444 #ifdef FDT 445 static struct ofw_compat_data compat_data[] = { 446 { "st,m25p", 1 }, 447 { "jedec,spi-nor", 1 }, 448 { NULL, 0 }, 449 }; 450 #endif 451 452 static int 453 mx25l_probe(device_t dev) 454 { 455 #ifdef FDT 456 int i; 457 458 if (!ofw_bus_status_okay(dev)) 459 return (ENXIO); 460 461 /* First try to match the compatible property to the compat_data */ 462 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 1) 463 goto found; 464 465 /* 466 * Next, try to find a compatible device using the names in the 467 * flash_devices structure 468 */ 469 for (i = 0; i < nitems(flash_devices); i++) 470 if (ofw_bus_is_compatible(dev, flash_devices[i].name)) 471 goto found; 472 473 return (ENXIO); 474 found: 475 #endif 476 device_set_desc(dev, "M25Pxx Flash Family"); 477 478 return (0); 479 } 480 481 static int 482 mx25l_attach(device_t dev) 483 { 484 struct mx25l_softc *sc; 485 struct mx25l_flash_ident *ident; 486 487 sc = device_get_softc(dev); 488 sc->sc_dev = dev; 489 M25PXX_LOCK_INIT(sc); 490 491 ident = mx25l_get_device_ident(sc); 492 if (ident == NULL) 493 return (ENXIO); 494 495 mx25l_wait_for_device_ready(sc->sc_dev); 496 497 sc->sc_disk = disk_alloc(); 498 sc->sc_disk->d_open = mx25l_open; 499 sc->sc_disk->d_close = mx25l_close; 500 sc->sc_disk->d_strategy = mx25l_strategy; 501 sc->sc_disk->d_getattr = mx25l_getattr; 502 sc->sc_disk->d_ioctl = mx25l_ioctl; 503 sc->sc_disk->d_name = "flash/spi"; 504 sc->sc_disk->d_drv1 = sc; 505 sc->sc_disk->d_maxsize = DFLTPHYS; 506 sc->sc_disk->d_sectorsize = MX25L_SECTORSIZE; 507 sc->sc_disk->d_mediasize = ident->sectorsize * ident->sectorcount; 508 sc->sc_disk->d_unit = device_get_unit(sc->sc_dev); 509 sc->sc_disk->d_dump = NULL; /* NB: no dumps */ 510 /* Sectorsize for erase operations */ 511 sc->sc_sectorsize = ident->sectorsize; 512 sc->sc_flags = ident->flags; 513 514 if (sc->sc_flags & FL_ENABLE_4B_ADDR) 515 mx25l_set_4b_mode(dev, CMD_ENTER_4B_MODE); 516 517 if (sc->sc_flags & FL_DISABLE_4B_ADDR) 518 mx25l_set_4b_mode(dev, CMD_EXIT_4B_MODE); 519 520 /* NB: use stripesize to hold the erase/region size for RedBoot */ 521 sc->sc_disk->d_stripesize = ident->sectorsize; 522 523 disk_create(sc->sc_disk, DISK_VERSION); 524 bioq_init(&sc->sc_bio_queue); 525 526 kproc_create(&mx25l_task, sc, &sc->sc_p, 0, 0, "task: mx25l flash"); 527 device_printf(sc->sc_dev, "%s, sector %d bytes, %d sectors\n", 528 ident->name, ident->sectorsize, ident->sectorcount); 529 530 return (0); 531 } 532 533 static int 534 mx25l_detach(device_t dev) 535 { 536 537 return (EIO); 538 } 539 540 static int 541 mx25l_open(struct disk *dp) 542 { 543 return (0); 544 } 545 546 static int 547 mx25l_close(struct disk *dp) 548 { 549 550 return (0); 551 } 552 553 static int 554 mx25l_ioctl(struct disk *dp, u_long cmd, void *data, int fflag, 555 struct thread *td) 556 { 557 558 return (EINVAL); 559 } 560 561 static void 562 mx25l_strategy(struct bio *bp) 563 { 564 struct mx25l_softc *sc; 565 566 sc = (struct mx25l_softc *)bp->bio_disk->d_drv1; 567 M25PXX_LOCK(sc); 568 bioq_disksort(&sc->sc_bio_queue, bp); 569 wakeup(sc); 570 M25PXX_UNLOCK(sc); 571 } 572 573 static int 574 mx25l_getattr(struct bio *bp) 575 { 576 struct mx25l_softc *sc; 577 device_t dev; 578 579 if (bp->bio_disk == NULL || bp->bio_disk->d_drv1 == NULL) 580 return (ENXIO); 581 582 sc = bp->bio_disk->d_drv1; 583 dev = sc->sc_dev; 584 585 if (strcmp(bp->bio_attribute, "SPI::device") == 0) { 586 if (bp->bio_length != sizeof(dev)) 587 return (EFAULT); 588 bcopy(&dev, bp->bio_data, sizeof(dev)); 589 } else 590 return (-1); 591 return (0); 592 } 593 594 static void 595 mx25l_task(void *arg) 596 { 597 struct mx25l_softc *sc = (struct mx25l_softc*)arg; 598 struct bio *bp; 599 device_t dev; 600 601 for (;;) { 602 dev = sc->sc_dev; 603 M25PXX_LOCK(sc); 604 do { 605 bp = bioq_first(&sc->sc_bio_queue); 606 if (bp == NULL) 607 msleep(sc, &sc->sc_mtx, PRIBIO, "jobqueue", 0); 608 } while (bp == NULL); 609 bioq_remove(&sc->sc_bio_queue, bp); 610 M25PXX_UNLOCK(sc); 611 612 switch (bp->bio_cmd) { 613 case BIO_READ: 614 bp->bio_error = mx25l_read(dev, bp->bio_offset, 615 bp->bio_data, bp->bio_bcount); 616 break; 617 case BIO_WRITE: 618 bp->bio_error = mx25l_write(dev, bp->bio_offset, 619 bp->bio_data, bp->bio_bcount); 620 break; 621 default: 622 bp->bio_error = EINVAL; 623 } 624 625 626 biodone(bp); 627 } 628 } 629 630 static devclass_t mx25l_devclass; 631 632 static device_method_t mx25l_methods[] = { 633 /* Device interface */ 634 DEVMETHOD(device_probe, mx25l_probe), 635 DEVMETHOD(device_attach, mx25l_attach), 636 DEVMETHOD(device_detach, mx25l_detach), 637 638 { 0, 0 } 639 }; 640 641 static driver_t mx25l_driver = { 642 "mx25l", 643 mx25l_methods, 644 sizeof(struct mx25l_softc), 645 }; 646 647 DRIVER_MODULE(mx25l, spibus, mx25l_driver, mx25l_devclass, 0, 0); 648