1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2022 Ruslan Bukin <br@bsdpad.com> 5 * 6 * This work was supported by Innovate UK project 105694, "Digital Security 7 * by Design (DSbD) Technology Platform Prototype". 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 #ifndef _ARM64_SCMI_SCMI_CLK_H_ 32 #define _ARM64_SCMI_SCMI_CLK_H_ 33 34 /* 35 * SCMI Clock Protocol 36 */ 37 38 struct scmi_clk_protocol_attrs_out { 39 int32_t status; 40 uint32_t attributes; 41 #define CLK_ATTRS_NCLOCKS_S 0 42 #define CLK_ATTRS_NCLOCKS_M (0xffff << CLK_ATTRS_NCLOCKS_S) 43 }; 44 45 struct scmi_clk_attrs_in { 46 uint32_t clock_id; 47 }; 48 49 struct scmi_clk_attrs_out { 50 int32_t status; 51 uint32_t attributes; 52 #define CLK_ATTRS_RATE_CHANGE_NOTIFY_SUPP (1 << 31) 53 #define CLK_ATTRS_RATE_REQ_CHANGE_NOTIFY_SUPP (1 << 30) 54 #define CLK_ATTRS_EXT_CLK_NAME (1 << 29) 55 #define CLK_ATTRS_ENABLED (1 << 0) 56 uint8_t clock_name[16]; /* only if attrs bit 29 unset */ 57 uint32_t clock_enable_delay; /* worst case */ 58 }; 59 60 struct scmi_clk_name_get_in { 61 uint32_t clock_id; 62 }; 63 64 struct scmi_clk_name_get_out { 65 int32_t status; 66 uint32_t flags; 67 uint8_t name[64]; 68 }; 69 70 enum scmi_clock_message_id { 71 SCMI_CLOCK_ATTRIBUTES = 0x3, 72 SCMI_CLOCK_RATE_SET = 0x5, 73 SCMI_CLOCK_RATE_GET = 0x6, 74 SCMI_CLOCK_CONFIG_SET = 0x7, 75 SCMI_CLOCK_NAME_GET = 0x8, 76 }; 77 78 #define SCMI_CLK_RATE_ASYNC_NOTIFY (1 << 0) 79 #define SCMI_CLK_RATE_ASYNC_NORESP (1 << 0 | 1 << 1) 80 #define SCMI_CLK_RATE_ROUND_DOWN 0 81 #define SCMI_CLK_RATE_ROUND_UP (1 << 2) 82 #define SCMI_CLK_RATE_ROUND_CLOSEST (1 << 3) 83 84 struct scmi_clk_state_in { 85 uint32_t clock_id; 86 uint32_t attributes; 87 }; 88 89 struct scmi_clk_state_out { 90 int32_t status; 91 }; 92 93 struct scmi_clk_rate_get_in { 94 uint32_t clock_id; 95 }; 96 97 struct scmi_clk_rate_get_out { 98 int32_t status; 99 uint32_t rate_lsb; 100 uint32_t rate_msb; 101 }; 102 103 struct scmi_clk_rate_set_in { 104 uint32_t flags; 105 uint32_t clock_id; 106 uint32_t rate_lsb; 107 uint32_t rate_msb; 108 }; 109 110 struct scmi_clk_rate_set_out { 111 int32_t status; 112 }; 113 114 #endif /* !_ARM64_SCMI_SCMI_CLK_H_ */ 115