1 /*- 2 * SPDX-License-Identifier: BSD-4-Clause 3 * 4 * Copyright (c) 2003 Hidetoshi Shimokawa 5 * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the acknowledgement as bellow: 18 * 19 * This product includes software developed by K. Kobayashi and H. SHimokawa 20 * 21 * 4. The name of the author may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 32 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 33 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #include <sys/cdefs.h> 38 __FBSDID("$FreeBSD$"); 39 40 #define BOUNCE_BUFFER_TEST 0 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/module.h> 46 #include <sys/bus.h> 47 #include <sys/queue.h> 48 #include <machine/bus.h> 49 #include <sys/rman.h> 50 #include <sys/malloc.h> 51 #include <sys/lock.h> 52 #include <sys/mutex.h> 53 #include <machine/resource.h> 54 55 #include <dev/pci/pcivar.h> 56 #include <dev/pci/pcireg.h> 57 58 #include <dev/firewire/firewire.h> 59 #include <dev/firewire/firewirereg.h> 60 61 #include <dev/firewire/fwdma.h> 62 #include <dev/firewire/fwohcireg.h> 63 #include <dev/firewire/fwohcivar.h> 64 65 static int fwohci_pci_attach(device_t self); 66 static int fwohci_pci_detach(device_t self); 67 68 /* 69 * The probe routine. 70 */ 71 static int 72 fwohci_pci_probe(device_t dev) 73 { 74 uint32_t id; 75 76 id = pci_get_devid(dev); 77 if (id == (FW_VENDORID_NATSEMI | FW_DEVICE_CS4210)) { 78 device_set_desc(dev, "National Semiconductor CS4210"); 79 return BUS_PROBE_DEFAULT; 80 } 81 if (id == (FW_VENDORID_NEC | FW_DEVICE_UPD861)) { 82 device_set_desc(dev, "NEC uPD72861"); 83 return BUS_PROBE_DEFAULT; 84 } 85 if (id == (FW_VENDORID_NEC | FW_DEVICE_UPD871)) { 86 device_set_desc(dev, "NEC uPD72871/2"); 87 return BUS_PROBE_DEFAULT; 88 } 89 if (id == (FW_VENDORID_NEC | FW_DEVICE_UPD72870)) { 90 device_set_desc(dev, "NEC uPD72870"); 91 return BUS_PROBE_DEFAULT; 92 } 93 if (id == (FW_VENDORID_NEC | FW_DEVICE_UPD72873)) { 94 device_set_desc(dev, "NEC uPD72873"); 95 return BUS_PROBE_DEFAULT; 96 } 97 if (id == (FW_VENDORID_NEC | FW_DEVICE_UPD72874)) { 98 device_set_desc(dev, "NEC uPD72874"); 99 return BUS_PROBE_DEFAULT; 100 } 101 if (id == (FW_VENDORID_SIS | FW_DEVICE_7007)) { 102 /* It has no real identifier, using device id. */ 103 device_set_desc(dev, "SiS 7007"); 104 return BUS_PROBE_DEFAULT; 105 } 106 if (id == (FW_VENDORID_TI | FW_DEVICE_TITSB22)) { 107 device_set_desc(dev, "Texas Instruments TSB12LV22"); 108 return BUS_PROBE_DEFAULT; 109 } 110 if (id == (FW_VENDORID_TI | FW_DEVICE_TITSB23)) { 111 device_set_desc(dev, "Texas Instruments TSB12LV23"); 112 return BUS_PROBE_DEFAULT; 113 } 114 if (id == (FW_VENDORID_TI | FW_DEVICE_TITSB26)) { 115 device_set_desc(dev, "Texas Instruments TSB12LV26"); 116 return BUS_PROBE_DEFAULT; 117 } 118 if (id == (FW_VENDORID_TI | FW_DEVICE_TITSB43)) { 119 device_set_desc(dev, "Texas Instruments TSB43AA22"); 120 return BUS_PROBE_DEFAULT; 121 } 122 if (id == (FW_VENDORID_TI | FW_DEVICE_TITSB43A)) { 123 device_set_desc(dev, "Texas Instruments TSB43AB22/A"); 124 return BUS_PROBE_DEFAULT; 125 } 126 if (id == (FW_VENDORID_TI | FW_DEVICE_TITSB43AB21)) { 127 device_set_desc(dev, "Texas Instruments TSB43AB21/A/AI/A-EP"); 128 return BUS_PROBE_DEFAULT; 129 } 130 if (id == (FW_VENDORID_TI | FW_DEVICE_TITSB43AB23)) { 131 device_set_desc(dev, "Texas Instruments TSB43AB23"); 132 return BUS_PROBE_DEFAULT; 133 } 134 if (id == (FW_VENDORID_TI | FW_DEVICE_TITSB82AA2)) { 135 device_set_desc(dev, "Texas Instruments TSB82AA2"); 136 return BUS_PROBE_DEFAULT; 137 } 138 if (id == (FW_VENDORID_TI | FW_DEVICE_TIPCI4450)) { 139 device_set_desc(dev, "Texas Instruments PCI4450"); 140 return BUS_PROBE_DEFAULT; 141 } 142 if (id == (FW_VENDORID_TI | FW_DEVICE_TIPCI4410A)) { 143 device_set_desc(dev, "Texas Instruments PCI4410A"); 144 return BUS_PROBE_DEFAULT; 145 } 146 if (id == (FW_VENDORID_TI | FW_DEVICE_TIPCI4451)) { 147 device_set_desc(dev, "Texas Instruments PCI4451"); 148 return BUS_PROBE_DEFAULT; 149 } 150 if (id == (FW_VENDORID_SONY | FW_DEVICE_CXD1947)) { 151 device_printf(dev, "Sony i.LINK (CXD1947) not supported\n"); 152 return ENXIO; 153 } 154 if (id == (FW_VENDORID_SONY | FW_DEVICE_CXD3222)) { 155 device_set_desc(dev, "Sony i.LINK (CXD3222)"); 156 return BUS_PROBE_DEFAULT; 157 } 158 if (id == (FW_VENDORID_VIA | FW_DEVICE_VT6306)) { 159 device_set_desc(dev, "VIA Fire II (VT6306)"); 160 return BUS_PROBE_DEFAULT; 161 } 162 if (id == (FW_VENDORID_RICOH | FW_DEVICE_R5C551)) { 163 device_set_desc(dev, "Ricoh R5C551"); 164 return BUS_PROBE_DEFAULT; 165 } 166 if (id == (FW_VENDORID_RICOH | FW_DEVICE_R5C552)) { 167 device_set_desc(dev, "Ricoh R5C552"); 168 return BUS_PROBE_DEFAULT; 169 } 170 if (id == (FW_VENDORID_APPLE | FW_DEVICE_PANGEA)) { 171 device_set_desc(dev, "Apple Pangea"); 172 return BUS_PROBE_DEFAULT; 173 } 174 if (id == (FW_VENDORID_APPLE | FW_DEVICE_UNINORTH2)) { 175 device_set_desc(dev, "Apple UniNorth 2"); 176 return BUS_PROBE_DEFAULT; 177 } 178 if (id == (FW_VENDORID_LUCENT | FW_DEVICE_FW322)) { 179 device_set_desc(dev, "Lucent FW322/323"); 180 return BUS_PROBE_DEFAULT; 181 } 182 if (id == (FW_VENDORID_INTEL | FW_DEVICE_82372FB)) { 183 device_set_desc(dev, "Intel 82372FB"); 184 return BUS_PROBE_DEFAULT; 185 } 186 if (id == (FW_VENDORID_ADAPTEC | FW_DEVICE_AIC5800)) { 187 device_set_desc(dev, "Adaptec AHA-894x/AIC-5800"); 188 return BUS_PROBE_DEFAULT; 189 } 190 if (id == (FW_VENDORID_SUN | FW_DEVICE_PCIO2FW)) { 191 device_set_desc(dev, "Sun PCIO-2"); 192 return BUS_PROBE_DEFAULT; 193 } 194 if (pci_get_class(dev) == PCIC_SERIALBUS 195 && pci_get_subclass(dev) == PCIS_SERIALBUS_FW 196 && pci_get_progif(dev) == PCI_INTERFACE_OHCI) { 197 if (bootverbose) 198 device_printf(dev, "vendor=%x, dev=%x\n", 199 pci_get_vendor(dev), pci_get_device(dev)); 200 device_set_desc(dev, "1394 Open Host Controller Interface"); 201 return BUS_PROBE_DEFAULT; 202 } 203 204 return ENXIO; 205 } 206 207 static int 208 fwohci_pci_init(device_t self) 209 { 210 int olatency, latency, ocache_line, cache_line; 211 uint16_t cmd; 212 213 cmd = pci_read_config(self, PCIR_COMMAND, 2); 214 cmd |= PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN; 215 #if 1 /* for broken hardware */ 216 cmd &= ~PCIM_CMD_MWRICEN; 217 #endif 218 pci_write_config(self, PCIR_COMMAND, cmd, 2); 219 220 /* 221 * Some Sun PCIO-2 FireWire controllers have their intpin register 222 * bogusly set to 0, although it should be 3. Correct that. 223 */ 224 if (pci_get_devid(self) == (FW_VENDORID_SUN | FW_DEVICE_PCIO2FW) && 225 pci_get_intpin(self) == 0) 226 pci_set_intpin(self, 3); 227 228 latency = olatency = pci_read_config(self, PCIR_LATTIMER, 1); 229 #define DEF_LATENCY 0x20 230 if (olatency < DEF_LATENCY) { 231 latency = DEF_LATENCY; 232 pci_write_config(self, PCIR_LATTIMER, latency, 1); 233 } 234 235 cache_line = ocache_line = pci_read_config(self, PCIR_CACHELNSZ, 1); 236 #define DEF_CACHE_LINE 8 237 if (ocache_line < DEF_CACHE_LINE) { 238 cache_line = DEF_CACHE_LINE; 239 pci_write_config(self, PCIR_CACHELNSZ, cache_line, 1); 240 } 241 242 if (firewire_debug) { 243 device_printf(self, "latency timer %d -> %d.\n", 244 olatency, latency); 245 device_printf(self, "cache size %d -> %d.\n", 246 ocache_line, cache_line); 247 } 248 249 return 0; 250 } 251 252 static int 253 fwohci_pci_attach(device_t self) 254 { 255 fwohci_softc_t *sc = device_get_softc(self); 256 int err; 257 int rid; 258 259 #if 0 260 if (bootverbose) 261 firewire_debug = bootverbose; 262 #endif 263 264 mtx_init(FW_GMTX(&sc->fc), "firewire", NULL, MTX_DEF); 265 fwohci_pci_init(self); 266 267 rid = PCI_CBMEM; 268 sc->bsr = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE); 269 if (!sc->bsr) { 270 device_printf(self, "Could not map memory\n"); 271 return ENXIO; 272 } 273 274 sc->bst = rman_get_bustag(sc->bsr); 275 sc->bsh = rman_get_bushandle(sc->bsr); 276 277 rid = 0; 278 sc->irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid, 279 RF_SHAREABLE | RF_ACTIVE); 280 if (sc->irq_res == NULL) { 281 device_printf(self, "Could not allocate irq\n"); 282 fwohci_pci_detach(self); 283 return ENXIO; 284 } 285 286 err = bus_setup_intr(self, sc->irq_res, 287 INTR_TYPE_NET | INTR_MPSAFE, 288 NULL, (driver_intr_t *) fwohci_intr, 289 sc, &sc->ih); 290 291 if (err) { 292 device_printf(self, "Could not setup irq, %d\n", err); 293 fwohci_pci_detach(self); 294 return ENXIO; 295 } 296 297 err = bus_dma_tag_create( 298 /*parent*/bus_get_dma_tag(self), 299 /*alignment*/1, 300 /*boundary*/0, 301 #if BOUNCE_BUFFER_TEST 302 /*lowaddr*/BUS_SPACE_MAXADDR_24BIT, 303 #else 304 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT, 305 #endif 306 /*highaddr*/BUS_SPACE_MAXADDR, 307 /*filter*/NULL, /*filterarg*/NULL, 308 /*maxsize*/0x100000, 309 /*nsegments*/0x20, 310 /*maxsegsz*/0x8000, 311 /*flags*/BUS_DMA_ALLOCNOW, 312 /*lockfunc*/busdma_lock_mutex, 313 /*lockarg*/FW_GMTX(&sc->fc), 314 &sc->fc.dmat); 315 if (err != 0) { 316 device_printf(self, "fwohci_pci_attach: Could not allocate DMA " 317 "tag - error %d\n", err); 318 fwohci_pci_detach(self); 319 return (ENOMEM); 320 } 321 322 err = fwohci_init(sc, self); 323 324 if (err != 0) { 325 device_printf(self, "fwohci_init failed with err=%d\n", err); 326 fwohci_pci_detach(self); 327 return EIO; 328 } 329 330 /* probe and attach a child device(firewire) */ 331 bus_generic_probe(self); 332 bus_generic_attach(self); 333 334 return 0; 335 } 336 337 static int 338 fwohci_pci_detach(device_t self) 339 { 340 fwohci_softc_t *sc = device_get_softc(self); 341 int s; 342 343 s = splfw(); 344 345 if (sc->bsr) 346 fwohci_stop(sc, self); 347 348 bus_generic_detach(self); 349 350 if (sc->fc.bdev) { 351 device_delete_child(self, sc->fc.bdev); 352 sc->fc.bdev = NULL; 353 } 354 355 /* disable interrupts that might have been switched on */ 356 if (sc->bst && sc->bsh) 357 bus_space_write_4(sc->bst, sc->bsh, 358 FWOHCI_INTMASKCLR, OHCI_INT_EN); 359 360 if (sc->irq_res) { 361 int err; 362 if (sc->ih) { 363 err = bus_teardown_intr(self, sc->irq_res, sc->ih); 364 if (err) 365 device_printf(self, 366 "Could not tear down irq, %d\n", err); 367 sc->ih = NULL; 368 } 369 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res); 370 sc->irq_res = NULL; 371 } 372 373 if (sc->bsr) { 374 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM, sc->bsr); 375 sc->bsr = NULL; 376 sc->bst = 0; 377 sc->bsh = 0; 378 } 379 380 fwohci_detach(sc, self); 381 mtx_destroy(FW_GMTX(&sc->fc)); 382 splx(s); 383 384 return 0; 385 } 386 387 static int 388 fwohci_pci_suspend(device_t dev) 389 { 390 fwohci_softc_t *sc = device_get_softc(dev); 391 int err; 392 393 device_printf(dev, "fwohci_pci_suspend\n"); 394 err = bus_generic_suspend(dev); 395 if (err) 396 return err; 397 fwohci_stop(sc, dev); 398 return 0; 399 } 400 401 static int 402 fwohci_pci_resume(device_t dev) 403 { 404 fwohci_softc_t *sc = device_get_softc(dev); 405 406 fwohci_pci_init(dev); 407 fwohci_resume(sc, dev); 408 return 0; 409 } 410 411 static int 412 fwohci_pci_shutdown(device_t dev) 413 { 414 fwohci_softc_t *sc = device_get_softc(dev); 415 416 bus_generic_shutdown(dev); 417 fwohci_stop(sc, dev); 418 return 0; 419 } 420 421 static device_t 422 fwohci_pci_add_child(device_t dev, u_int order, const char *name, int unit) 423 { 424 struct fwohci_softc *sc; 425 device_t child; 426 int err = 0; 427 428 sc = (struct fwohci_softc *)device_get_softc(dev); 429 child = device_add_child(dev, name, unit); 430 if (child == NULL) 431 return (child); 432 433 sc->fc.bdev = child; 434 device_set_ivars(child, &sc->fc); 435 436 err = device_probe_and_attach(child); 437 if (err) { 438 device_printf(dev, "probe_and_attach failed with err=%d\n", 439 err); 440 fwohci_pci_detach(dev); 441 device_delete_child(dev, child); 442 return NULL; 443 } 444 445 /* XXX 446 * Clear the bus reset event flag to start transactions even when 447 * interrupt is disabled during the boot process. 448 */ 449 if (cold) { 450 int s; 451 DELAY(250); /* 2 cycles */ 452 s = splfw(); 453 fwohci_poll(&sc->fc, 0, -1); 454 splx(s); 455 } 456 457 return (child); 458 } 459 460 static device_method_t fwohci_methods[] = { 461 /* Device interface */ 462 DEVMETHOD(device_probe, fwohci_pci_probe), 463 DEVMETHOD(device_attach, fwohci_pci_attach), 464 DEVMETHOD(device_detach, fwohci_pci_detach), 465 DEVMETHOD(device_suspend, fwohci_pci_suspend), 466 DEVMETHOD(device_resume, fwohci_pci_resume), 467 DEVMETHOD(device_shutdown, fwohci_pci_shutdown), 468 469 /* Bus interface */ 470 DEVMETHOD(bus_add_child, fwohci_pci_add_child), 471 472 DEVMETHOD_END 473 }; 474 475 static driver_t fwohci_driver = { 476 "fwohci", 477 fwohci_methods, 478 sizeof(fwohci_softc_t), 479 }; 480 481 static devclass_t fwohci_devclass; 482 483 #ifdef FWOHCI_MODULE 484 MODULE_DEPEND(fwohci, firewire, 1, 1, 1); 485 #endif 486 DRIVER_MODULE(fwohci, pci, fwohci_driver, fwohci_devclass, 0, 0); 487