13c60ba66SKatsushi Kobayashi /* 23c60ba66SKatsushi Kobayashi * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa 33c60ba66SKatsushi Kobayashi * All rights reserved. 43c60ba66SKatsushi Kobayashi * 53c60ba66SKatsushi Kobayashi * Redistribution and use in source and binary forms, with or without 63c60ba66SKatsushi Kobayashi * modification, are permitted provided that the following conditions 73c60ba66SKatsushi Kobayashi * are met: 83c60ba66SKatsushi Kobayashi * 1. Redistributions of source code must retain the above copyright 93c60ba66SKatsushi Kobayashi * notice, this list of conditions and the following disclaimer. 103c60ba66SKatsushi Kobayashi * 2. Redistributions in binary form must reproduce the above copyright 113c60ba66SKatsushi Kobayashi * notice, this list of conditions and the following disclaimer in the 123c60ba66SKatsushi Kobayashi * documentation and/or other materials provided with the distribution. 133c60ba66SKatsushi Kobayashi * 3. All advertising materials mentioning features or use of this software 143c60ba66SKatsushi Kobayashi * must display the acknowledgement as bellow: 153c60ba66SKatsushi Kobayashi * 168da326fdSHidetoshi Shimokawa * This product includes software developed by K. Kobayashi and H. Shimokawa 173c60ba66SKatsushi Kobayashi * 183c60ba66SKatsushi Kobayashi * 4. The name of the author may not be used to endorse or promote products 193c60ba66SKatsushi Kobayashi * derived from this software without specific prior written permission. 203c60ba66SKatsushi Kobayashi * 213c60ba66SKatsushi Kobayashi * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 223c60ba66SKatsushi Kobayashi * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 233c60ba66SKatsushi Kobayashi * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 243c60ba66SKatsushi Kobayashi * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 253c60ba66SKatsushi Kobayashi * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 263c60ba66SKatsushi Kobayashi * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 273c60ba66SKatsushi Kobayashi * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 283c60ba66SKatsushi Kobayashi * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 293c60ba66SKatsushi Kobayashi * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 303c60ba66SKatsushi Kobayashi * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 313c60ba66SKatsushi Kobayashi * POSSIBILITY OF SUCH DAMAGE. 323c60ba66SKatsushi Kobayashi * 333c60ba66SKatsushi Kobayashi * $FreeBSD$ 343c60ba66SKatsushi Kobayashi * 353c60ba66SKatsushi Kobayashi */ 368da326fdSHidetoshi Shimokawa 373c60ba66SKatsushi Kobayashi #define ATRQ_CH 0 383c60ba66SKatsushi Kobayashi #define ATRS_CH 1 393c60ba66SKatsushi Kobayashi #define ARRQ_CH 2 403c60ba66SKatsushi Kobayashi #define ARRS_CH 3 413c60ba66SKatsushi Kobayashi #define ITX_CH 4 423c60ba66SKatsushi Kobayashi #define IRX_CH 0x24 433c60ba66SKatsushi Kobayashi 443c60ba66SKatsushi Kobayashi #include <sys/param.h> 453c60ba66SKatsushi Kobayashi #include <sys/systm.h> 463c60ba66SKatsushi Kobayashi #include <sys/types.h> 473c60ba66SKatsushi Kobayashi #include <sys/mbuf.h> 483c60ba66SKatsushi Kobayashi #include <sys/mman.h> 493c60ba66SKatsushi Kobayashi #include <sys/socket.h> 503c60ba66SKatsushi Kobayashi #include <sys/socketvar.h> 513c60ba66SKatsushi Kobayashi #include <sys/signalvar.h> 523c60ba66SKatsushi Kobayashi #include <sys/malloc.h> 533c60ba66SKatsushi Kobayashi #include <sys/uio.h> 543c60ba66SKatsushi Kobayashi #include <sys/sockio.h> 553c60ba66SKatsushi Kobayashi #include <sys/bus.h> 563c60ba66SKatsushi Kobayashi #include <sys/kernel.h> 573c60ba66SKatsushi Kobayashi #include <sys/conf.h> 583c60ba66SKatsushi Kobayashi 593c60ba66SKatsushi Kobayashi #include <machine/bus.h> 603c60ba66SKatsushi Kobayashi #include <machine/resource.h> 613c60ba66SKatsushi Kobayashi #include <sys/rman.h> 623c60ba66SKatsushi Kobayashi 633c60ba66SKatsushi Kobayashi #include <machine/cpufunc.h> /* for rdtsc proto for clock.h below */ 643c60ba66SKatsushi Kobayashi #include <machine/clock.h> 653c60ba66SKatsushi Kobayashi #include <pci/pcivar.h> 663c60ba66SKatsushi Kobayashi #include <pci/pcireg.h> 673c60ba66SKatsushi Kobayashi #include <vm/vm.h> 683c60ba66SKatsushi Kobayashi #include <vm/vm_extern.h> 693c60ba66SKatsushi Kobayashi #include <vm/pmap.h> /* for vtophys proto */ 703c60ba66SKatsushi Kobayashi 713c60ba66SKatsushi Kobayashi #include <dev/firewire/firewire.h> 723c60ba66SKatsushi Kobayashi #include <dev/firewire/firewirereg.h> 733c60ba66SKatsushi Kobayashi #include <dev/firewire/fwohcireg.h> 743c60ba66SKatsushi Kobayashi #include <dev/firewire/fwohcivar.h> 753c60ba66SKatsushi Kobayashi #include <dev/firewire/firewire_phy.h> 763c60ba66SKatsushi Kobayashi 770aaa9a23SHidetoshi Shimokawa #include <dev/firewire/iec68113.h> 780aaa9a23SHidetoshi Shimokawa 793c60ba66SKatsushi Kobayashi #undef OHCI_DEBUG 808da326fdSHidetoshi Shimokawa 813c60ba66SKatsushi Kobayashi static char dbcode[16][0x10]={"OUTM", "OUTL","INPM","INPL", 823c60ba66SKatsushi Kobayashi "STOR","LOAD","NOP ","STOP",}; 833c60ba66SKatsushi Kobayashi static char dbkey[8][0x10]={"ST0", "ST1","ST2","ST3", 843c60ba66SKatsushi Kobayashi "UNDEF","REG","SYS","DEV"}; 853c60ba66SKatsushi Kobayashi char fwohcicode[32][0x20]={ 863c60ba66SKatsushi Kobayashi "No stat","Undef","long","miss Ack err", 873c60ba66SKatsushi Kobayashi "underrun","overrun","desc err", "data read err", 883c60ba66SKatsushi Kobayashi "data write err","bus reset","timeout","tcode err", 893c60ba66SKatsushi Kobayashi "Undef","Undef","unknown event","flushed", 903c60ba66SKatsushi Kobayashi "Undef","ack complete","ack pend","Undef", 913c60ba66SKatsushi Kobayashi "ack busy_X","ack busy_A","ack busy_B","Undef", 923c60ba66SKatsushi Kobayashi "Undef","Undef","Undef","ack tardy", 933c60ba66SKatsushi Kobayashi "Undef","ack data_err","ack type_err",""}; 943c60ba66SKatsushi Kobayashi #define MAX_SPEED 2 953c60ba66SKatsushi Kobayashi extern char linkspeed[MAX_SPEED+1][0x10]; 963c60ba66SKatsushi Kobayashi static char dbcond[4][0x10]={"NEV","C=1", "C=0", "ALL"}; 973c60ba66SKatsushi Kobayashi u_int32_t tagbit[4] = { 1 << 28, 1 << 29, 1 << 30, 1 << 31}; 983c60ba66SKatsushi Kobayashi 993c60ba66SKatsushi Kobayashi static struct tcode_info tinfo[] = { 1003c60ba66SKatsushi Kobayashi /* hdr_len block flag*/ 1013c60ba66SKatsushi Kobayashi /* 0 WREQQ */ {16, FWTI_REQ | FWTI_TLABEL}, 1023c60ba66SKatsushi Kobayashi /* 1 WREQB */ {16, FWTI_REQ | FWTI_TLABEL | FWTI_BLOCK_ASY}, 1033c60ba66SKatsushi Kobayashi /* 2 WRES */ {12, FWTI_RES}, 1043c60ba66SKatsushi Kobayashi /* 3 XXX */ { 0, 0}, 1053c60ba66SKatsushi Kobayashi /* 4 RREQQ */ {12, FWTI_REQ | FWTI_TLABEL}, 1063c60ba66SKatsushi Kobayashi /* 5 RREQB */ {16, FWTI_REQ | FWTI_TLABEL}, 1073c60ba66SKatsushi Kobayashi /* 6 RRESQ */ {16, FWTI_RES}, 1083c60ba66SKatsushi Kobayashi /* 7 RRESB */ {16, FWTI_RES | FWTI_BLOCK_ASY}, 1093c60ba66SKatsushi Kobayashi /* 8 CYCS */ { 0, 0}, 1103c60ba66SKatsushi Kobayashi /* 9 LREQ */ {16, FWTI_REQ | FWTI_TLABEL | FWTI_BLOCK_ASY}, 1113c60ba66SKatsushi Kobayashi /* a STREAM */ { 4, FWTI_REQ | FWTI_BLOCK_STR}, 1123c60ba66SKatsushi Kobayashi /* b LRES */ {16, FWTI_RES | FWTI_BLOCK_ASY}, 1133c60ba66SKatsushi Kobayashi /* c XXX */ { 0, 0}, 1143c60ba66SKatsushi Kobayashi /* d XXX */ { 0, 0}, 1153c60ba66SKatsushi Kobayashi /* e PHY */ {12, FWTI_REQ}, 1163c60ba66SKatsushi Kobayashi /* f XXX */ { 0, 0} 1173c60ba66SKatsushi Kobayashi }; 1183c60ba66SKatsushi Kobayashi 1193c60ba66SKatsushi Kobayashi #define OHCI_WRITE_SIGMASK 0xffff0000 1203c60ba66SKatsushi Kobayashi #define OHCI_READ_SIGMASK 0xffff0000 1213c60ba66SKatsushi Kobayashi 1223c60ba66SKatsushi Kobayashi #define OWRITE(sc, r, x) bus_space_write_4((sc)->bst, (sc)->bsh, (r), (x)) 1233c60ba66SKatsushi Kobayashi #define OREAD(sc, r) bus_space_read_4((sc)->bst, (sc)->bsh, (r)) 1243c60ba66SKatsushi Kobayashi 1253c60ba66SKatsushi Kobayashi static void fwohci_ibr __P((struct firewire_comm *)); 1263c60ba66SKatsushi Kobayashi static void fwohci_db_init __P((struct fwohci_dbch *)); 1273c60ba66SKatsushi Kobayashi static void fwohci_db_free __P((struct fwohci_dbch *)); 128783058faSHidetoshi Shimokawa static void fwohci_arcv __P((struct fwohci_softc *, struct fwohci_dbch *, int)); 129783058faSHidetoshi Shimokawa static void fwohci_ircv __P((struct fwohci_softc *, struct fwohci_dbch *, int)); 1303c60ba66SKatsushi Kobayashi static void fwohci_txd __P((struct fwohci_softc *, struct fwohci_dbch *)); 1313c60ba66SKatsushi Kobayashi static void fwohci_start_atq __P((struct firewire_comm *)); 1323c60ba66SKatsushi Kobayashi static void fwohci_start_ats __P((struct firewire_comm *)); 1333c60ba66SKatsushi Kobayashi static void fwohci_start __P((struct fwohci_softc *, struct fwohci_dbch *)); 1343c60ba66SKatsushi Kobayashi static void fwohci_drain_atq __P((struct firewire_comm *, struct fw_xfer *)); 1353c60ba66SKatsushi Kobayashi static void fwohci_drain_ats __P((struct firewire_comm *, struct fw_xfer *)); 1363c60ba66SKatsushi Kobayashi static void fwohci_drain __P((struct firewire_comm *, struct fw_xfer *, struct fwohci_dbch *)); 1373c60ba66SKatsushi Kobayashi static u_int32_t fwphy_wrdata __P(( struct fwohci_softc *, u_int32_t, u_int32_t)); 1383c60ba66SKatsushi Kobayashi static u_int32_t fwphy_rddata __P(( struct fwohci_softc *, u_int32_t)); 1393c60ba66SKatsushi Kobayashi static int fwohci_rx_enable __P((struct fwohci_softc *, struct fwohci_dbch *)); 1403c60ba66SKatsushi Kobayashi static int fwohci_tx_enable __P((struct fwohci_softc *, struct fwohci_dbch *)); 1413c60ba66SKatsushi Kobayashi static int fwohci_irx_enable __P((struct firewire_comm *, int)); 1423c60ba66SKatsushi Kobayashi static int fwohci_irxpp_enable __P((struct firewire_comm *, int)); 1433c60ba66SKatsushi Kobayashi static int fwohci_irxbuf_enable __P((struct firewire_comm *, int)); 1443c60ba66SKatsushi Kobayashi static int fwohci_irx_disable __P((struct firewire_comm *, int)); 1453c60ba66SKatsushi Kobayashi static void fwohci_irx_post __P((struct firewire_comm *, u_int32_t *)); 1463c60ba66SKatsushi Kobayashi static int fwohci_itxbuf_enable __P((struct firewire_comm *, int)); 1473c60ba66SKatsushi Kobayashi static int fwohci_itx_disable __P((struct firewire_comm *, int)); 1483c60ba66SKatsushi Kobayashi static void fwohci_timeout __P((void *)); 1493c60ba66SKatsushi Kobayashi static void fwohci_poll __P((struct firewire_comm *, int, int)); 1503c60ba66SKatsushi Kobayashi static void fwohci_set_intr __P((struct firewire_comm *, int)); 1513c60ba66SKatsushi Kobayashi static int fwohci_add_rx_buf __P((struct fwohcidb_tr *, unsigned short, int, void *, void *)); 1523c60ba66SKatsushi Kobayashi static int fwohci_add_tx_buf __P((struct fwohcidb_tr *, unsigned short, int, void *)); 1533c60ba66SKatsushi Kobayashi static void dump_db __P((struct fwohci_softc *, u_int32_t)); 1543c60ba66SKatsushi Kobayashi static void print_db __P((volatile struct fwohcidb *, u_int32_t , u_int32_t)); 1553c60ba66SKatsushi Kobayashi static void dump_dma __P((struct fwohci_softc *, u_int32_t)); 1563c60ba66SKatsushi Kobayashi static u_int32_t fwohci_cyctimer __P((struct firewire_comm *)); 1573c60ba66SKatsushi Kobayashi static void fwohci_rbuf_update __P((struct fwohci_softc *, int)); 1583c60ba66SKatsushi Kobayashi static void fwohci_tbuf_update __P((struct fwohci_softc *, int)); 1593c60ba66SKatsushi Kobayashi void fwohci_txbufdb __P((struct fwohci_softc *, int , struct fw_bulkxfer *)); 1603c60ba66SKatsushi Kobayashi 1613c60ba66SKatsushi Kobayashi /* 1623c60ba66SKatsushi Kobayashi * memory allocated for DMA programs 1633c60ba66SKatsushi Kobayashi */ 1643c60ba66SKatsushi Kobayashi #define DMA_PROG_ALLOC (8 * PAGE_SIZE) 1653c60ba66SKatsushi Kobayashi 1663c60ba66SKatsushi Kobayashi /* #define NDB 1024 */ 1673c60ba66SKatsushi Kobayashi #define NDB FWMAXQUEUE 1683c60ba66SKatsushi Kobayashi #define NDVDB (DVBUF * NDB) 1693c60ba66SKatsushi Kobayashi 1703c60ba66SKatsushi Kobayashi #define OHCI_VERSION 0x00 1713c60ba66SKatsushi Kobayashi #define OHCI_CROMHDR 0x18 1723c60ba66SKatsushi Kobayashi #define OHCI_BUS_OPT 0x20 1733c60ba66SKatsushi Kobayashi #define OHCI_BUSIRMC (1 << 31) 1743c60ba66SKatsushi Kobayashi #define OHCI_BUSCMC (1 << 30) 1753c60ba66SKatsushi Kobayashi #define OHCI_BUSISC (1 << 29) 1763c60ba66SKatsushi Kobayashi #define OHCI_BUSBMC (1 << 28) 1773c60ba66SKatsushi Kobayashi #define OHCI_BUSPMC (1 << 27) 1783c60ba66SKatsushi Kobayashi #define OHCI_BUSFNC OHCI_BUSIRMC | OHCI_BUSCMC | OHCI_BUSISC |\ 1793c60ba66SKatsushi Kobayashi OHCI_BUSBMC | OHCI_BUSPMC 1803c60ba66SKatsushi Kobayashi 1813c60ba66SKatsushi Kobayashi #define OHCI_EUID_HI 0x24 1823c60ba66SKatsushi Kobayashi #define OHCI_EUID_LO 0x28 1833c60ba66SKatsushi Kobayashi 1843c60ba66SKatsushi Kobayashi #define OHCI_CROMPTR 0x34 1853c60ba66SKatsushi Kobayashi #define OHCI_HCCCTL 0x50 1863c60ba66SKatsushi Kobayashi #define OHCI_HCCCTLCLR 0x54 1873c60ba66SKatsushi Kobayashi #define OHCI_AREQHI 0x100 1883c60ba66SKatsushi Kobayashi #define OHCI_AREQHICLR 0x104 1893c60ba66SKatsushi Kobayashi #define OHCI_AREQLO 0x108 1903c60ba66SKatsushi Kobayashi #define OHCI_AREQLOCLR 0x10c 1913c60ba66SKatsushi Kobayashi #define OHCI_PREQHI 0x110 1923c60ba66SKatsushi Kobayashi #define OHCI_PREQHICLR 0x114 1933c60ba66SKatsushi Kobayashi #define OHCI_PREQLO 0x118 1943c60ba66SKatsushi Kobayashi #define OHCI_PREQLOCLR 0x11c 1953c60ba66SKatsushi Kobayashi #define OHCI_PREQUPPER 0x120 1963c60ba66SKatsushi Kobayashi 1973c60ba66SKatsushi Kobayashi #define OHCI_SID_BUF 0x64 1983c60ba66SKatsushi Kobayashi #define OHCI_SID_CNT 0x68 1993c60ba66SKatsushi Kobayashi #define OHCI_SID_CNT_MASK 0xffc 2003c60ba66SKatsushi Kobayashi 2013c60ba66SKatsushi Kobayashi #define OHCI_IT_STAT 0x90 2023c60ba66SKatsushi Kobayashi #define OHCI_IT_STATCLR 0x94 2033c60ba66SKatsushi Kobayashi #define OHCI_IT_MASK 0x98 2043c60ba66SKatsushi Kobayashi #define OHCI_IT_MASKCLR 0x9c 2053c60ba66SKatsushi Kobayashi 2063c60ba66SKatsushi Kobayashi #define OHCI_IR_STAT 0xa0 2073c60ba66SKatsushi Kobayashi #define OHCI_IR_STATCLR 0xa4 2083c60ba66SKatsushi Kobayashi #define OHCI_IR_MASK 0xa8 2093c60ba66SKatsushi Kobayashi #define OHCI_IR_MASKCLR 0xac 2103c60ba66SKatsushi Kobayashi 2113c60ba66SKatsushi Kobayashi #define OHCI_LNKCTL 0xe0 2123c60ba66SKatsushi Kobayashi #define OHCI_LNKCTLCLR 0xe4 2133c60ba66SKatsushi Kobayashi 2143c60ba66SKatsushi Kobayashi #define OHCI_PHYACCESS 0xec 2153c60ba66SKatsushi Kobayashi #define OHCI_CYCLETIMER 0xf0 2163c60ba66SKatsushi Kobayashi 2173c60ba66SKatsushi Kobayashi #define OHCI_DMACTL(off) (off) 2183c60ba66SKatsushi Kobayashi #define OHCI_DMACTLCLR(off) (off + 4) 2193c60ba66SKatsushi Kobayashi #define OHCI_DMACMD(off) (off + 0xc) 2203c60ba66SKatsushi Kobayashi #define OHCI_DMAMATCH(off) (off + 0x10) 2213c60ba66SKatsushi Kobayashi 2223c60ba66SKatsushi Kobayashi #define OHCI_ATQOFF 0x180 2233c60ba66SKatsushi Kobayashi #define OHCI_ATQCTL OHCI_ATQOFF 2243c60ba66SKatsushi Kobayashi #define OHCI_ATQCTLCLR (OHCI_ATQOFF + 4) 2253c60ba66SKatsushi Kobayashi #define OHCI_ATQCMD (OHCI_ATQOFF + 0xc) 2263c60ba66SKatsushi Kobayashi #define OHCI_ATQMATCH (OHCI_ATQOFF + 0x10) 2273c60ba66SKatsushi Kobayashi 2283c60ba66SKatsushi Kobayashi #define OHCI_ATSOFF 0x1a0 2293c60ba66SKatsushi Kobayashi #define OHCI_ATSCTL OHCI_ATSOFF 2303c60ba66SKatsushi Kobayashi #define OHCI_ATSCTLCLR (OHCI_ATSOFF + 4) 2313c60ba66SKatsushi Kobayashi #define OHCI_ATSCMD (OHCI_ATSOFF + 0xc) 2323c60ba66SKatsushi Kobayashi #define OHCI_ATSMATCH (OHCI_ATSOFF + 0x10) 2333c60ba66SKatsushi Kobayashi 2343c60ba66SKatsushi Kobayashi #define OHCI_ARQOFF 0x1c0 2353c60ba66SKatsushi Kobayashi #define OHCI_ARQCTL OHCI_ARQOFF 2363c60ba66SKatsushi Kobayashi #define OHCI_ARQCTLCLR (OHCI_ARQOFF + 4) 2373c60ba66SKatsushi Kobayashi #define OHCI_ARQCMD (OHCI_ARQOFF + 0xc) 2383c60ba66SKatsushi Kobayashi #define OHCI_ARQMATCH (OHCI_ARQOFF + 0x10) 2393c60ba66SKatsushi Kobayashi 2403c60ba66SKatsushi Kobayashi #define OHCI_ARSOFF 0x1e0 2413c60ba66SKatsushi Kobayashi #define OHCI_ARSCTL OHCI_ARSOFF 2423c60ba66SKatsushi Kobayashi #define OHCI_ARSCTLCLR (OHCI_ARSOFF + 4) 2433c60ba66SKatsushi Kobayashi #define OHCI_ARSCMD (OHCI_ARSOFF + 0xc) 2443c60ba66SKatsushi Kobayashi #define OHCI_ARSMATCH (OHCI_ARSOFF + 0x10) 2453c60ba66SKatsushi Kobayashi 2463c60ba66SKatsushi Kobayashi #define OHCI_ITOFF(CH) (0x200 + 0x10 * (CH)) 2473c60ba66SKatsushi Kobayashi #define OHCI_ITCTL(CH) (OHCI_ITOFF(CH)) 2483c60ba66SKatsushi Kobayashi #define OHCI_ITCTLCLR(CH) (OHCI_ITOFF(CH) + 4) 2493c60ba66SKatsushi Kobayashi #define OHCI_ITCMD(CH) (OHCI_ITOFF(CH) + 0xc) 2503c60ba66SKatsushi Kobayashi 2513c60ba66SKatsushi Kobayashi #define OHCI_IROFF(CH) (0x400 + 0x20 * (CH)) 2523c60ba66SKatsushi Kobayashi #define OHCI_IRCTL(CH) (OHCI_IROFF(CH)) 2533c60ba66SKatsushi Kobayashi #define OHCI_IRCTLCLR(CH) (OHCI_IROFF(CH) + 4) 2543c60ba66SKatsushi Kobayashi #define OHCI_IRCMD(CH) (OHCI_IROFF(CH) + 0xc) 2553c60ba66SKatsushi Kobayashi #define OHCI_IRMATCH(CH) (OHCI_IROFF(CH) + 0x10) 2563c60ba66SKatsushi Kobayashi 2573c60ba66SKatsushi Kobayashi d_ioctl_t fwohci_ioctl; 2583c60ba66SKatsushi Kobayashi 2593c60ba66SKatsushi Kobayashi /* 2603c60ba66SKatsushi Kobayashi * Communication with PHY device 2613c60ba66SKatsushi Kobayashi */ 262c572b810SHidetoshi Shimokawa static u_int32_t 263c572b810SHidetoshi Shimokawa fwphy_wrdata( struct fwohci_softc *sc, u_int32_t addr, u_int32_t data) 2643c60ba66SKatsushi Kobayashi { 2653c60ba66SKatsushi Kobayashi u_int32_t fun; 2663c60ba66SKatsushi Kobayashi 2673c60ba66SKatsushi Kobayashi addr &= 0xf; 2683c60ba66SKatsushi Kobayashi data &= 0xff; 2693c60ba66SKatsushi Kobayashi 2703c60ba66SKatsushi Kobayashi fun = (PHYDEV_WRCMD | (addr << PHYDEV_REGADDR) | (data << PHYDEV_WRDATA)); 2713c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_PHYACCESS, fun); 2723c60ba66SKatsushi Kobayashi DELAY(100); 2733c60ba66SKatsushi Kobayashi 2743c60ba66SKatsushi Kobayashi return(fwphy_rddata( sc, addr)); 2753c60ba66SKatsushi Kobayashi } 2763c60ba66SKatsushi Kobayashi 2773c60ba66SKatsushi Kobayashi static u_int32_t 2783c60ba66SKatsushi Kobayashi fwohci_set_bus_manager(struct firewire_comm *fc, u_int node) 2793c60ba66SKatsushi Kobayashi { 2803c60ba66SKatsushi Kobayashi struct fwohci_softc *sc = (struct fwohci_softc *)fc; 2813c60ba66SKatsushi Kobayashi int i; 2823c60ba66SKatsushi Kobayashi u_int32_t bm; 2833c60ba66SKatsushi Kobayashi 2843c60ba66SKatsushi Kobayashi #define OHCI_CSR_DATA 0x0c 2853c60ba66SKatsushi Kobayashi #define OHCI_CSR_COMP 0x10 2863c60ba66SKatsushi Kobayashi #define OHCI_CSR_CONT 0x14 2873c60ba66SKatsushi Kobayashi #define OHCI_BUS_MANAGER_ID 0 2883c60ba66SKatsushi Kobayashi 2893c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_CSR_DATA, node); 2903c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_CSR_COMP, 0x3f); 2913c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_CSR_CONT, OHCI_BUS_MANAGER_ID); 2923c60ba66SKatsushi Kobayashi for (i = 0; !(OREAD(sc, OHCI_CSR_CONT) & (1<<31)) && (i < 1000); i++) 2934ed65ce9SHidetoshi Shimokawa DELAY(10); 2943c60ba66SKatsushi Kobayashi bm = OREAD(sc, OHCI_CSR_DATA); 29517c3d42cSHidetoshi Shimokawa if((bm & 0x3f) == 0x3f) 2963c60ba66SKatsushi Kobayashi bm = node; 29717c3d42cSHidetoshi Shimokawa if (bootverbose) 29817c3d42cSHidetoshi Shimokawa device_printf(sc->fc.dev, 29917c3d42cSHidetoshi Shimokawa "fw_set_bus_manager: %d->%d (loop=%d)\n", bm, node, i); 3003c60ba66SKatsushi Kobayashi 3013c60ba66SKatsushi Kobayashi return(bm); 3023c60ba66SKatsushi Kobayashi } 3033c60ba66SKatsushi Kobayashi 304c572b810SHidetoshi Shimokawa static u_int32_t 305c572b810SHidetoshi Shimokawa fwphy_rddata(struct fwohci_softc *sc, u_int addr) 3063c60ba66SKatsushi Kobayashi { 307e4b13179SHidetoshi Shimokawa u_int32_t fun, stat; 308e4b13179SHidetoshi Shimokawa u_int i, retry = 0; 3093c60ba66SKatsushi Kobayashi 3103c60ba66SKatsushi Kobayashi addr &= 0xf; 311e4b13179SHidetoshi Shimokawa #define MAX_RETRY 100 312e4b13179SHidetoshi Shimokawa again: 313e4b13179SHidetoshi Shimokawa OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_REG_FAIL); 3143c60ba66SKatsushi Kobayashi fun = PHYDEV_RDCMD | (addr << PHYDEV_REGADDR); 3153c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_PHYACCESS, fun); 316e4b13179SHidetoshi Shimokawa for ( i = 0 ; i < MAX_RETRY ; i ++ ){ 3173c60ba66SKatsushi Kobayashi fun = OREAD(sc, OHCI_PHYACCESS); 3183c60ba66SKatsushi Kobayashi if ((fun & PHYDEV_RDCMD) == 0 && (fun & PHYDEV_RDDONE) != 0) 3193c60ba66SKatsushi Kobayashi break; 3204ed65ce9SHidetoshi Shimokawa DELAY(100); 3213c60ba66SKatsushi Kobayashi } 322e4b13179SHidetoshi Shimokawa if(i >= MAX_RETRY) { 3234ed65ce9SHidetoshi Shimokawa if (bootverbose) 3244ed65ce9SHidetoshi Shimokawa device_printf(sc->fc.dev, "phy read failed(1).\n"); 3251f2361f8SHidetoshi Shimokawa if (++retry < MAX_RETRY) { 3264ed65ce9SHidetoshi Shimokawa DELAY(100); 3271f2361f8SHidetoshi Shimokawa goto again; 3281f2361f8SHidetoshi Shimokawa } 329e4b13179SHidetoshi Shimokawa } 330e4b13179SHidetoshi Shimokawa /* Make sure that SCLK is started */ 331e4b13179SHidetoshi Shimokawa stat = OREAD(sc, FWOHCI_INTSTAT); 332e4b13179SHidetoshi Shimokawa if ((stat & OHCI_INT_REG_FAIL) != 0 || 333e4b13179SHidetoshi Shimokawa ((fun >> PHYDEV_REGADDR) & 0xf) != addr) { 3344ed65ce9SHidetoshi Shimokawa if (bootverbose) 3354ed65ce9SHidetoshi Shimokawa device_printf(sc->fc.dev, "phy read failed(2).\n"); 336e4b13179SHidetoshi Shimokawa if (++retry < MAX_RETRY) { 3374ed65ce9SHidetoshi Shimokawa DELAY(100); 338e4b13179SHidetoshi Shimokawa goto again; 339e4b13179SHidetoshi Shimokawa } 340e4b13179SHidetoshi Shimokawa } 341e4b13179SHidetoshi Shimokawa if (bootverbose || retry >= MAX_RETRY) 342e4b13179SHidetoshi Shimokawa device_printf(sc->fc.dev, 343e4b13179SHidetoshi Shimokawa "fwphy_rddata: loop=%d, retry=%d\n", i, retry); 344e4b13179SHidetoshi Shimokawa #undef MAX_RETRY 3453c60ba66SKatsushi Kobayashi return((fun >> PHYDEV_RDDATA )& 0xff); 3463c60ba66SKatsushi Kobayashi } 3473c60ba66SKatsushi Kobayashi /* Device specific ioctl. */ 3483c60ba66SKatsushi Kobayashi int 3493c60ba66SKatsushi Kobayashi fwohci_ioctl (dev_t dev, u_long cmd, caddr_t data, int flag, fw_proc *td) 3503c60ba66SKatsushi Kobayashi { 3513c60ba66SKatsushi Kobayashi struct firewire_softc *sc; 3523c60ba66SKatsushi Kobayashi struct fwohci_softc *fc; 3533c60ba66SKatsushi Kobayashi int unit = DEV2UNIT(dev); 3543c60ba66SKatsushi Kobayashi int err = 0; 3553c60ba66SKatsushi Kobayashi struct fw_reg_req_t *reg = (struct fw_reg_req_t *) data; 3563c60ba66SKatsushi Kobayashi u_int32_t *dmach = (u_int32_t *) data; 3573c60ba66SKatsushi Kobayashi 3583c60ba66SKatsushi Kobayashi sc = devclass_get_softc(firewire_devclass, unit); 3593c60ba66SKatsushi Kobayashi if(sc == NULL){ 3603c60ba66SKatsushi Kobayashi return(EINVAL); 3613c60ba66SKatsushi Kobayashi } 3623c60ba66SKatsushi Kobayashi fc = (struct fwohci_softc *)sc->fc; 3633c60ba66SKatsushi Kobayashi 3643c60ba66SKatsushi Kobayashi if (!data) 3653c60ba66SKatsushi Kobayashi return(EINVAL); 3663c60ba66SKatsushi Kobayashi 3673c60ba66SKatsushi Kobayashi switch (cmd) { 3683c60ba66SKatsushi Kobayashi case FWOHCI_WRREG: 3693c60ba66SKatsushi Kobayashi #define OHCI_MAX_REG 0x800 3703c60ba66SKatsushi Kobayashi if(reg->addr <= OHCI_MAX_REG){ 3713c60ba66SKatsushi Kobayashi OWRITE(fc, reg->addr, reg->data); 3723c60ba66SKatsushi Kobayashi reg->data = OREAD(fc, reg->addr); 3733c60ba66SKatsushi Kobayashi }else{ 3743c60ba66SKatsushi Kobayashi err = EINVAL; 3753c60ba66SKatsushi Kobayashi } 3763c60ba66SKatsushi Kobayashi break; 3773c60ba66SKatsushi Kobayashi case FWOHCI_RDREG: 3783c60ba66SKatsushi Kobayashi if(reg->addr <= OHCI_MAX_REG){ 3793c60ba66SKatsushi Kobayashi reg->data = OREAD(fc, reg->addr); 3803c60ba66SKatsushi Kobayashi }else{ 3813c60ba66SKatsushi Kobayashi err = EINVAL; 3823c60ba66SKatsushi Kobayashi } 3833c60ba66SKatsushi Kobayashi break; 3843c60ba66SKatsushi Kobayashi /* Read DMA descriptors for debug */ 3853c60ba66SKatsushi Kobayashi case DUMPDMA: 3863c60ba66SKatsushi Kobayashi if(*dmach <= OHCI_MAX_DMA_CH ){ 3873c60ba66SKatsushi Kobayashi dump_dma(fc, *dmach); 3883c60ba66SKatsushi Kobayashi dump_db(fc, *dmach); 3893c60ba66SKatsushi Kobayashi }else{ 3903c60ba66SKatsushi Kobayashi err = EINVAL; 3913c60ba66SKatsushi Kobayashi } 3923c60ba66SKatsushi Kobayashi break; 3933c60ba66SKatsushi Kobayashi default: 3943c60ba66SKatsushi Kobayashi break; 3953c60ba66SKatsushi Kobayashi } 3963c60ba66SKatsushi Kobayashi return err; 3973c60ba66SKatsushi Kobayashi } 398c572b810SHidetoshi Shimokawa 399d0fd7bc6SHidetoshi Shimokawa static int 400d0fd7bc6SHidetoshi Shimokawa fwohci_probe_phy(struct fwohci_softc *sc, device_t dev) 4013c60ba66SKatsushi Kobayashi { 402d0fd7bc6SHidetoshi Shimokawa u_int32_t reg, reg2; 403d0fd7bc6SHidetoshi Shimokawa int e1394a = 1; 404d0fd7bc6SHidetoshi Shimokawa /* 405d0fd7bc6SHidetoshi Shimokawa * probe PHY parameters 406d0fd7bc6SHidetoshi Shimokawa * 0. to prove PHY version, whether compliance of 1394a. 407d0fd7bc6SHidetoshi Shimokawa * 1. to probe maximum speed supported by the PHY and 408d0fd7bc6SHidetoshi Shimokawa * number of port supported by core-logic. 409d0fd7bc6SHidetoshi Shimokawa * It is not actually available port on your PC . 410d0fd7bc6SHidetoshi Shimokawa */ 411d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, OHCI_HCCCTL, OHCI_HCC_LPS); 412d0fd7bc6SHidetoshi Shimokawa #if 0 413d0fd7bc6SHidetoshi Shimokawa /* XXX wait for SCLK. */ 414d0fd7bc6SHidetoshi Shimokawa DELAY(100000); 415d0fd7bc6SHidetoshi Shimokawa #endif 416d0fd7bc6SHidetoshi Shimokawa reg = fwphy_rddata(sc, FW_PHY_SPD_REG); 417d0fd7bc6SHidetoshi Shimokawa 418d0fd7bc6SHidetoshi Shimokawa if((reg >> 5) != 7 ){ 419d0fd7bc6SHidetoshi Shimokawa sc->fc.mode &= ~FWPHYASYST; 420d0fd7bc6SHidetoshi Shimokawa sc->fc.nport = reg & FW_PHY_NP; 421d0fd7bc6SHidetoshi Shimokawa sc->fc.speed = reg & FW_PHY_SPD >> 6; 422d0fd7bc6SHidetoshi Shimokawa if (sc->fc.speed > MAX_SPEED) { 423d0fd7bc6SHidetoshi Shimokawa device_printf(dev, "invalid speed %d (fixed to %d).\n", 424d0fd7bc6SHidetoshi Shimokawa sc->fc.speed, MAX_SPEED); 425d0fd7bc6SHidetoshi Shimokawa sc->fc.speed = MAX_SPEED; 426d0fd7bc6SHidetoshi Shimokawa } 427d0fd7bc6SHidetoshi Shimokawa device_printf(dev, 42894b6f028SHidetoshi Shimokawa "Phy 1394 only %s, %d ports.\n", 42994b6f028SHidetoshi Shimokawa linkspeed[sc->fc.speed], sc->fc.nport); 430d0fd7bc6SHidetoshi Shimokawa }else{ 431d0fd7bc6SHidetoshi Shimokawa reg2 = fwphy_rddata(sc, FW_PHY_ESPD_REG); 432d0fd7bc6SHidetoshi Shimokawa sc->fc.mode |= FWPHYASYST; 433d0fd7bc6SHidetoshi Shimokawa sc->fc.nport = reg & FW_PHY_NP; 434d0fd7bc6SHidetoshi Shimokawa sc->fc.speed = (reg2 & FW_PHY_ESPD) >> 5; 435d0fd7bc6SHidetoshi Shimokawa if (sc->fc.speed > MAX_SPEED) { 436d0fd7bc6SHidetoshi Shimokawa device_printf(dev, "invalid speed %d (fixed to %d).\n", 437d0fd7bc6SHidetoshi Shimokawa sc->fc.speed, MAX_SPEED); 438d0fd7bc6SHidetoshi Shimokawa sc->fc.speed = MAX_SPEED; 439d0fd7bc6SHidetoshi Shimokawa } 440d0fd7bc6SHidetoshi Shimokawa device_printf(dev, 44194b6f028SHidetoshi Shimokawa "Phy 1394a available %s, %d ports.\n", 44294b6f028SHidetoshi Shimokawa linkspeed[sc->fc.speed], sc->fc.nport); 443d0fd7bc6SHidetoshi Shimokawa 444d0fd7bc6SHidetoshi Shimokawa /* check programPhyEnable */ 445d0fd7bc6SHidetoshi Shimokawa reg2 = fwphy_rddata(sc, 5); 446d0fd7bc6SHidetoshi Shimokawa #if 0 447d0fd7bc6SHidetoshi Shimokawa if (e1394a && (OREAD(sc, OHCI_HCCCTL) & OHCI_HCC_PRPHY)) { 448d0fd7bc6SHidetoshi Shimokawa #else /* XXX force to enable 1394a */ 449d0fd7bc6SHidetoshi Shimokawa if (e1394a) { 450d0fd7bc6SHidetoshi Shimokawa #endif 451d0fd7bc6SHidetoshi Shimokawa if (bootverbose) 452d0fd7bc6SHidetoshi Shimokawa device_printf(dev, 453d0fd7bc6SHidetoshi Shimokawa "Enable 1394a Enhancements\n"); 454d0fd7bc6SHidetoshi Shimokawa /* enable EAA EMC */ 455d0fd7bc6SHidetoshi Shimokawa reg2 |= 0x03; 456d0fd7bc6SHidetoshi Shimokawa /* set aPhyEnhanceEnable */ 457d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, OHCI_HCCCTL, OHCI_HCC_PHYEN); 458d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, OHCI_HCCCTLCLR, OHCI_HCC_PRPHY); 459d0fd7bc6SHidetoshi Shimokawa } else { 460d0fd7bc6SHidetoshi Shimokawa /* for safe */ 461d0fd7bc6SHidetoshi Shimokawa reg2 &= ~0x83; 462d0fd7bc6SHidetoshi Shimokawa } 463d0fd7bc6SHidetoshi Shimokawa reg2 = fwphy_wrdata(sc, 5, reg2); 464d0fd7bc6SHidetoshi Shimokawa } 465d0fd7bc6SHidetoshi Shimokawa 466d0fd7bc6SHidetoshi Shimokawa reg = fwphy_rddata(sc, FW_PHY_SPD_REG); 467d0fd7bc6SHidetoshi Shimokawa if((reg >> 5) == 7 ){ 468d0fd7bc6SHidetoshi Shimokawa reg = fwphy_rddata(sc, 4); 469d0fd7bc6SHidetoshi Shimokawa reg |= 1 << 6; 470d0fd7bc6SHidetoshi Shimokawa fwphy_wrdata(sc, 4, reg); 471d0fd7bc6SHidetoshi Shimokawa reg = fwphy_rddata(sc, 4); 472d0fd7bc6SHidetoshi Shimokawa } 473d0fd7bc6SHidetoshi Shimokawa return 0; 474d0fd7bc6SHidetoshi Shimokawa } 475d0fd7bc6SHidetoshi Shimokawa 476d0fd7bc6SHidetoshi Shimokawa 477d0fd7bc6SHidetoshi Shimokawa void 478d0fd7bc6SHidetoshi Shimokawa fwohci_reset(struct fwohci_softc *sc, device_t dev) 479d0fd7bc6SHidetoshi Shimokawa { 48094b6f028SHidetoshi Shimokawa int i, max_rec, speed; 4813c60ba66SKatsushi Kobayashi u_int32_t reg, reg2; 4823c60ba66SKatsushi Kobayashi struct fwohcidb_tr *db_tr; 483d0fd7bc6SHidetoshi Shimokawa 484d0fd7bc6SHidetoshi Shimokawa /* Disable interrupt */ 485d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, FWOHCI_INTMASKCLR, ~0); 486d0fd7bc6SHidetoshi Shimokawa 487d0fd7bc6SHidetoshi Shimokawa /* Now stopping all DMA channel */ 488d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, OHCI_ARQCTLCLR, OHCI_CNTL_DMA_RUN); 489d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, OHCI_ARSCTLCLR, OHCI_CNTL_DMA_RUN); 490d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, OHCI_ATQCTLCLR, OHCI_CNTL_DMA_RUN); 491d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, OHCI_ATSCTLCLR, OHCI_CNTL_DMA_RUN); 492d0fd7bc6SHidetoshi Shimokawa 493d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, OHCI_IR_MASKCLR, ~0); 494d0fd7bc6SHidetoshi Shimokawa for( i = 0 ; i < sc->fc.nisodma ; i ++ ){ 495d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, OHCI_IRCTLCLR(i), OHCI_CNTL_DMA_RUN); 496d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, OHCI_ITCTLCLR(i), OHCI_CNTL_DMA_RUN); 497d0fd7bc6SHidetoshi Shimokawa } 498d0fd7bc6SHidetoshi Shimokawa 499d0fd7bc6SHidetoshi Shimokawa /* FLUSH FIFO and reset Transmitter/Reciever */ 500d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, OHCI_HCCCTL, OHCI_HCC_RESET); 501d0fd7bc6SHidetoshi Shimokawa if (bootverbose) 502d0fd7bc6SHidetoshi Shimokawa device_printf(dev, "resetting OHCI..."); 503d0fd7bc6SHidetoshi Shimokawa i = 0; 504d0fd7bc6SHidetoshi Shimokawa while(OREAD(sc, OHCI_HCCCTL) & OHCI_HCC_RESET) { 505d0fd7bc6SHidetoshi Shimokawa if (i++ > 100) break; 506d0fd7bc6SHidetoshi Shimokawa DELAY(1000); 507d0fd7bc6SHidetoshi Shimokawa } 508d0fd7bc6SHidetoshi Shimokawa if (bootverbose) 509d0fd7bc6SHidetoshi Shimokawa printf("done (loop=%d)\n", i); 510d0fd7bc6SHidetoshi Shimokawa 51194b6f028SHidetoshi Shimokawa /* Probe phy */ 51294b6f028SHidetoshi Shimokawa fwohci_probe_phy(sc, dev); 51394b6f028SHidetoshi Shimokawa 51494b6f028SHidetoshi Shimokawa /* Probe link */ 515d0fd7bc6SHidetoshi Shimokawa reg = OREAD(sc, OHCI_BUS_OPT); 516d0fd7bc6SHidetoshi Shimokawa reg2 = reg | OHCI_BUSFNC; 51794b6f028SHidetoshi Shimokawa max_rec = (reg & 0x0000f000) >> 12; 51894b6f028SHidetoshi Shimokawa speed = (reg & 0x00000007); 51994b6f028SHidetoshi Shimokawa device_printf(dev, "Link %s, max_rec %d bytes.\n", 52094b6f028SHidetoshi Shimokawa linkspeed[speed], MAXREC(max_rec)); 52194b6f028SHidetoshi Shimokawa /* XXX fix max_rec */ 52294b6f028SHidetoshi Shimokawa sc->fc.maxrec = sc->fc.speed + 8; 52394b6f028SHidetoshi Shimokawa if (max_rec != sc->fc.maxrec) { 52494b6f028SHidetoshi Shimokawa reg2 = (reg2 & 0xffff0fff) | (sc->fc.maxrec << 12); 52594b6f028SHidetoshi Shimokawa device_printf(dev, "max_rec %d -> %d\n", 52694b6f028SHidetoshi Shimokawa MAXREC(max_rec), MAXREC(sc->fc.maxrec)); 52794b6f028SHidetoshi Shimokawa } 528d0fd7bc6SHidetoshi Shimokawa if (bootverbose) 529d0fd7bc6SHidetoshi Shimokawa device_printf(dev, "BUS_OPT 0x%x -> 0x%x\n", reg, reg2); 530d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, OHCI_BUS_OPT, reg2); 531d0fd7bc6SHidetoshi Shimokawa 53294b6f028SHidetoshi Shimokawa /* Initialize registers */ 533d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, OHCI_CROMHDR, sc->fc.config_rom[0]); 534d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, OHCI_CROMPTR, vtophys(&sc->fc.config_rom[0])); 535d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, OHCI_HCCCTLCLR, OHCI_HCC_BIGEND); 536d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, OHCI_HCCCTL, OHCI_HCC_POSTWR); 537d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, OHCI_SID_BUF, vtophys(sc->fc.sid_buf)); 538d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, OHCI_LNKCTL, OHCI_CNTL_SID); 539d0fd7bc6SHidetoshi Shimokawa fw_busreset(&sc->fc); 5409339321dSHidetoshi Shimokawa 54194b6f028SHidetoshi Shimokawa /* Enable link */ 54294b6f028SHidetoshi Shimokawa OWRITE(sc, OHCI_HCCCTL, OHCI_HCC_LINKEN); 54394b6f028SHidetoshi Shimokawa 54494b6f028SHidetoshi Shimokawa /* Force to start async RX DMA */ 5459339321dSHidetoshi Shimokawa sc->arrq.xferq.flag &= ~FWXFERQ_RUNNING; 5469339321dSHidetoshi Shimokawa sc->arrs.xferq.flag &= ~FWXFERQ_RUNNING; 547d0fd7bc6SHidetoshi Shimokawa fwohci_rx_enable(sc, &sc->arrq); 548d0fd7bc6SHidetoshi Shimokawa fwohci_rx_enable(sc, &sc->arrs); 549d0fd7bc6SHidetoshi Shimokawa 55094b6f028SHidetoshi Shimokawa /* Initialize async TX */ 55194b6f028SHidetoshi Shimokawa OWRITE(sc, OHCI_ATQCTLCLR, OHCI_CNTL_DMA_RUN | OHCI_CNTL_DMA_DEAD); 55294b6f028SHidetoshi Shimokawa OWRITE(sc, OHCI_ATSCTLCLR, OHCI_CNTL_DMA_RUN | OHCI_CNTL_DMA_DEAD); 55394b6f028SHidetoshi Shimokawa /* AT Retries */ 55494b6f028SHidetoshi Shimokawa OWRITE(sc, FWOHCI_RETRY, 55594b6f028SHidetoshi Shimokawa /* CycleLimit PhyRespRetries ATRespRetries ATReqRetries */ 55694b6f028SHidetoshi Shimokawa (0xffff << 16 ) | (0x0f << 8) | (0x0f << 4) | 0x0f) ; 557d0fd7bc6SHidetoshi Shimokawa for( i = 0, db_tr = sc->atrq.top; i < sc->atrq.ndb ; 558d0fd7bc6SHidetoshi Shimokawa i ++, db_tr = STAILQ_NEXT(db_tr, link)){ 559d0fd7bc6SHidetoshi Shimokawa db_tr->xfer = NULL; 560d0fd7bc6SHidetoshi Shimokawa } 561d0fd7bc6SHidetoshi Shimokawa for( i = 0, db_tr = sc->atrs.top; i < sc->atrs.ndb ; 562d0fd7bc6SHidetoshi Shimokawa i ++, db_tr = STAILQ_NEXT(db_tr, link)){ 563d0fd7bc6SHidetoshi Shimokawa db_tr->xfer = NULL; 564d0fd7bc6SHidetoshi Shimokawa } 565d0fd7bc6SHidetoshi Shimokawa 56694b6f028SHidetoshi Shimokawa 56794b6f028SHidetoshi Shimokawa /* Enable interrupt */ 568d0fd7bc6SHidetoshi Shimokawa OWRITE(sc, FWOHCI_INTMASK, 569d0fd7bc6SHidetoshi Shimokawa OHCI_INT_ERR | OHCI_INT_PHY_SID 570d0fd7bc6SHidetoshi Shimokawa | OHCI_INT_DMA_ATRQ | OHCI_INT_DMA_ATRS 571d0fd7bc6SHidetoshi Shimokawa | OHCI_INT_DMA_PRRQ | OHCI_INT_DMA_PRRS 572d0fd7bc6SHidetoshi Shimokawa | OHCI_INT_PHY_BUS_R | OHCI_INT_PW_ERR); 573d0fd7bc6SHidetoshi Shimokawa fwohci_set_intr(&sc->fc, 1); 574d0fd7bc6SHidetoshi Shimokawa 575d0fd7bc6SHidetoshi Shimokawa } 576d0fd7bc6SHidetoshi Shimokawa 577d0fd7bc6SHidetoshi Shimokawa int 578d0fd7bc6SHidetoshi Shimokawa fwohci_init(struct fwohci_softc *sc, device_t dev) 579d0fd7bc6SHidetoshi Shimokawa { 580d0fd7bc6SHidetoshi Shimokawa int i; 581d0fd7bc6SHidetoshi Shimokawa u_int32_t reg; 5823c60ba66SKatsushi Kobayashi 5833c60ba66SKatsushi Kobayashi reg = OREAD(sc, OHCI_VERSION); 5843c60ba66SKatsushi Kobayashi device_printf(dev, "OHCI version %x.%x (ROM=%d)\n", 5853c60ba66SKatsushi Kobayashi (reg>>16) & 0xff, reg & 0xff, (reg>>24) & 1); 5863c60ba66SKatsushi Kobayashi 5873c60ba66SKatsushi Kobayashi /* XXX: Available Isochrounous DMA channel probe */ 5883c60ba66SKatsushi Kobayashi for( i = 0 ; i < 0x20 ; i ++ ){ 5893c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IRCTL(i), OHCI_CNTL_DMA_RUN); 5903c60ba66SKatsushi Kobayashi reg = OREAD(sc, OHCI_IRCTL(i)); 5913c60ba66SKatsushi Kobayashi if(!(reg & OHCI_CNTL_DMA_RUN)) break; 5923c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_ITCTL(i), OHCI_CNTL_DMA_RUN); 5933c60ba66SKatsushi Kobayashi reg = OREAD(sc, OHCI_ITCTL(i)); 5943c60ba66SKatsushi Kobayashi if(!(reg & OHCI_CNTL_DMA_RUN)) break; 5953c60ba66SKatsushi Kobayashi } 5963c60ba66SKatsushi Kobayashi sc->fc.nisodma = i; 5973c60ba66SKatsushi Kobayashi device_printf(dev, "No. of Isochronous channel is %d.\n", i); 5983c60ba66SKatsushi Kobayashi 5993c60ba66SKatsushi Kobayashi sc->fc.arq = &sc->arrq.xferq; 6003c60ba66SKatsushi Kobayashi sc->fc.ars = &sc->arrs.xferq; 6013c60ba66SKatsushi Kobayashi sc->fc.atq = &sc->atrq.xferq; 6023c60ba66SKatsushi Kobayashi sc->fc.ats = &sc->atrs.xferq; 6033c60ba66SKatsushi Kobayashi 6043c60ba66SKatsushi Kobayashi sc->arrq.xferq.start = NULL; 6053c60ba66SKatsushi Kobayashi sc->arrs.xferq.start = NULL; 6063c60ba66SKatsushi Kobayashi sc->atrq.xferq.start = fwohci_start_atq; 6073c60ba66SKatsushi Kobayashi sc->atrs.xferq.start = fwohci_start_ats; 6083c60ba66SKatsushi Kobayashi 6093c60ba66SKatsushi Kobayashi sc->arrq.xferq.drain = NULL; 6103c60ba66SKatsushi Kobayashi sc->arrs.xferq.drain = NULL; 6113c60ba66SKatsushi Kobayashi sc->atrq.xferq.drain = fwohci_drain_atq; 6123c60ba66SKatsushi Kobayashi sc->atrs.xferq.drain = fwohci_drain_ats; 6133c60ba66SKatsushi Kobayashi 6143c60ba66SKatsushi Kobayashi sc->arrq.ndesc = 1; 6153c60ba66SKatsushi Kobayashi sc->arrs.ndesc = 1; 616d6105b60SHidetoshi Shimokawa sc->atrq.ndesc = 6; /* equal to maximum of mbuf chains */ 617d6105b60SHidetoshi Shimokawa sc->atrs.ndesc = 6 / 2; 6183c60ba66SKatsushi Kobayashi 6193c60ba66SKatsushi Kobayashi sc->arrq.ndb = NDB; 6203c60ba66SKatsushi Kobayashi sc->arrs.ndb = NDB / 2; 6213c60ba66SKatsushi Kobayashi sc->atrq.ndb = NDB; 6223c60ba66SKatsushi Kobayashi sc->atrs.ndb = NDB / 2; 6233c60ba66SKatsushi Kobayashi 6243c60ba66SKatsushi Kobayashi sc->arrq.dummy = NULL; 6253c60ba66SKatsushi Kobayashi sc->arrs.dummy = NULL; 6263c60ba66SKatsushi Kobayashi sc->atrq.dummy = NULL; 6273c60ba66SKatsushi Kobayashi sc->atrs.dummy = NULL; 6283c60ba66SKatsushi Kobayashi for( i = 0 ; i < sc->fc.nisodma ; i ++ ){ 6293c60ba66SKatsushi Kobayashi sc->fc.it[i] = &sc->it[i].xferq; 6303c60ba66SKatsushi Kobayashi sc->fc.ir[i] = &sc->ir[i].xferq; 6313c60ba66SKatsushi Kobayashi sc->it[i].ndb = 0; 6323c60ba66SKatsushi Kobayashi sc->ir[i].ndb = 0; 6333c60ba66SKatsushi Kobayashi } 6343c60ba66SKatsushi Kobayashi 6353c60ba66SKatsushi Kobayashi sc->fc.tcode = tinfo; 6363c60ba66SKatsushi Kobayashi 637e2ad5d6eSHidetoshi Shimokawa sc->cromptr = (u_int32_t *) malloc(CROMSIZE * 2, M_DEVBUF, M_NOWAIT); 6383c60ba66SKatsushi Kobayashi 6393c60ba66SKatsushi Kobayashi if(sc->cromptr == NULL){ 6401f2361f8SHidetoshi Shimokawa device_printf(dev, "cromptr alloc failed."); 6413c60ba66SKatsushi Kobayashi return ENOMEM; 6423c60ba66SKatsushi Kobayashi } 6433c60ba66SKatsushi Kobayashi sc->fc.dev = dev; 6443c60ba66SKatsushi Kobayashi sc->fc.config_rom = &(sc->cromptr[CROMSIZE/4]); 6453c60ba66SKatsushi Kobayashi 6463c60ba66SKatsushi Kobayashi sc->fc.config_rom[1] = 0x31333934; 6473c60ba66SKatsushi Kobayashi sc->fc.config_rom[2] = 0xf000a002; 6483c60ba66SKatsushi Kobayashi sc->fc.config_rom[3] = OREAD(sc, OHCI_EUID_HI); 6493c60ba66SKatsushi Kobayashi sc->fc.config_rom[4] = OREAD(sc, OHCI_EUID_LO); 6503c60ba66SKatsushi Kobayashi sc->fc.config_rom[5] = 0; 6513c60ba66SKatsushi Kobayashi sc->fc.config_rom[0] = (4 << 24) | (5 << 16); 6523c60ba66SKatsushi Kobayashi 6533c60ba66SKatsushi Kobayashi sc->fc.config_rom[0] |= fw_crc16(&sc->fc.config_rom[1], 5*4); 6543c60ba66SKatsushi Kobayashi 6553c60ba66SKatsushi Kobayashi 6563c60ba66SKatsushi Kobayashi /* SID recieve buffer must allign 2^11 */ 6573c60ba66SKatsushi Kobayashi #define OHCI_SIDSIZE (1 << 11) 658e2ad5d6eSHidetoshi Shimokawa sc->fc.sid_buf = (u_int32_t *) malloc(OHCI_SIDSIZE, M_DEVBUF, M_NOWAIT); 6591f2361f8SHidetoshi Shimokawa if (sc->fc.sid_buf == NULL) { 6601f2361f8SHidetoshi Shimokawa device_printf(dev, "sid_buf alloc failed.\n"); 6611f2361f8SHidetoshi Shimokawa return ENOMEM; 6621f2361f8SHidetoshi Shimokawa } 6631f2361f8SHidetoshi Shimokawa 6643c60ba66SKatsushi Kobayashi 6653c60ba66SKatsushi Kobayashi fwohci_db_init(&sc->arrq); 6661f2361f8SHidetoshi Shimokawa if ((sc->arrq.flags & FWOHCI_DBCH_INIT) == 0) 6671f2361f8SHidetoshi Shimokawa return ENOMEM; 6681f2361f8SHidetoshi Shimokawa 6693c60ba66SKatsushi Kobayashi fwohci_db_init(&sc->arrs); 6701f2361f8SHidetoshi Shimokawa if ((sc->arrs.flags & FWOHCI_DBCH_INIT) == 0) 6711f2361f8SHidetoshi Shimokawa return ENOMEM; 6723c60ba66SKatsushi Kobayashi 6733c60ba66SKatsushi Kobayashi fwohci_db_init(&sc->atrq); 6741f2361f8SHidetoshi Shimokawa if ((sc->atrq.flags & FWOHCI_DBCH_INIT) == 0) 6751f2361f8SHidetoshi Shimokawa return ENOMEM; 6761f2361f8SHidetoshi Shimokawa 6773c60ba66SKatsushi Kobayashi fwohci_db_init(&sc->atrs); 6781f2361f8SHidetoshi Shimokawa if ((sc->atrs.flags & FWOHCI_DBCH_INIT) == 0) 6791f2361f8SHidetoshi Shimokawa return ENOMEM; 6803c60ba66SKatsushi Kobayashi 6813c60ba66SKatsushi Kobayashi reg = OREAD(sc, FWOHCIGUID_H); 6823c60ba66SKatsushi Kobayashi for( i = 0 ; i < 4 ; i ++){ 6833c60ba66SKatsushi Kobayashi sc->fc.eui[3 - i] = reg & 0xff; 6843c60ba66SKatsushi Kobayashi reg = reg >> 8; 6853c60ba66SKatsushi Kobayashi } 6863c60ba66SKatsushi Kobayashi reg = OREAD(sc, FWOHCIGUID_L); 6873c60ba66SKatsushi Kobayashi for( i = 0 ; i < 4 ; i ++){ 6883c60ba66SKatsushi Kobayashi sc->fc.eui[7 - i] = reg & 0xff; 6893c60ba66SKatsushi Kobayashi reg = reg >> 8; 6903c60ba66SKatsushi Kobayashi } 6913c60ba66SKatsushi Kobayashi device_printf(dev, "EUI64 %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n", 6923c60ba66SKatsushi Kobayashi sc->fc.eui[0], sc->fc.eui[1], sc->fc.eui[2], sc->fc.eui[3], 6933c60ba66SKatsushi Kobayashi sc->fc.eui[4], sc->fc.eui[5], sc->fc.eui[6], sc->fc.eui[7]); 6943c60ba66SKatsushi Kobayashi sc->fc.ioctl = fwohci_ioctl; 6953c60ba66SKatsushi Kobayashi sc->fc.cyctimer = fwohci_cyctimer; 6963c60ba66SKatsushi Kobayashi sc->fc.set_bmr = fwohci_set_bus_manager; 6973c60ba66SKatsushi Kobayashi sc->fc.ibr = fwohci_ibr; 6983c60ba66SKatsushi Kobayashi sc->fc.irx_enable = fwohci_irx_enable; 6993c60ba66SKatsushi Kobayashi sc->fc.irx_disable = fwohci_irx_disable; 7003c60ba66SKatsushi Kobayashi 7013c60ba66SKatsushi Kobayashi sc->fc.itx_enable = fwohci_itxbuf_enable; 7023c60ba66SKatsushi Kobayashi sc->fc.itx_disable = fwohci_itx_disable; 7033c60ba66SKatsushi Kobayashi sc->fc.irx_post = fwohci_irx_post; 7043c60ba66SKatsushi Kobayashi sc->fc.itx_post = NULL; 7053c60ba66SKatsushi Kobayashi sc->fc.timeout = fwohci_timeout; 7063c60ba66SKatsushi Kobayashi sc->fc.poll = fwohci_poll; 7073c60ba66SKatsushi Kobayashi sc->fc.set_intr = fwohci_set_intr; 708c572b810SHidetoshi Shimokawa 709d0fd7bc6SHidetoshi Shimokawa fw_init(&sc->fc); 710d0fd7bc6SHidetoshi Shimokawa fwohci_reset(sc, dev); 7113c60ba66SKatsushi Kobayashi 712d0fd7bc6SHidetoshi Shimokawa return 0; 7133c60ba66SKatsushi Kobayashi } 714c572b810SHidetoshi Shimokawa 715c572b810SHidetoshi Shimokawa void 716c572b810SHidetoshi Shimokawa fwohci_timeout(void *arg) 7173c60ba66SKatsushi Kobayashi { 7183c60ba66SKatsushi Kobayashi struct fwohci_softc *sc; 7193c60ba66SKatsushi Kobayashi 7203c60ba66SKatsushi Kobayashi sc = (struct fwohci_softc *)arg; 7213c60ba66SKatsushi Kobayashi sc->fc.timeouthandle = timeout(fwohci_timeout, 7223c60ba66SKatsushi Kobayashi (void *)sc, FW_XFERTIMEOUT * hz * 10); 7233c60ba66SKatsushi Kobayashi } 724c572b810SHidetoshi Shimokawa 725c572b810SHidetoshi Shimokawa u_int32_t 726c572b810SHidetoshi Shimokawa fwohci_cyctimer(struct firewire_comm *fc) 7273c60ba66SKatsushi Kobayashi { 7283c60ba66SKatsushi Kobayashi struct fwohci_softc *sc = (struct fwohci_softc *)fc; 7293c60ba66SKatsushi Kobayashi return(OREAD(sc, OHCI_CYCLETIMER)); 7303c60ba66SKatsushi Kobayashi } 7313c60ba66SKatsushi Kobayashi 7321f2361f8SHidetoshi Shimokawa int 7331f2361f8SHidetoshi Shimokawa fwohci_detach(struct fwohci_softc *sc, device_t dev) 7341f2361f8SHidetoshi Shimokawa { 7351f2361f8SHidetoshi Shimokawa int i; 7361f2361f8SHidetoshi Shimokawa 7371f2361f8SHidetoshi Shimokawa if (sc->fc.sid_buf != NULL) 738e2ad5d6eSHidetoshi Shimokawa free((void *)(uintptr_t)sc->fc.sid_buf, M_DEVBUF); 7391f2361f8SHidetoshi Shimokawa if (sc->cromptr != NULL) 740e2ad5d6eSHidetoshi Shimokawa free((void *)sc->cromptr, M_DEVBUF); 7411f2361f8SHidetoshi Shimokawa 7421f2361f8SHidetoshi Shimokawa fwohci_db_free(&sc->arrq); 7431f2361f8SHidetoshi Shimokawa fwohci_db_free(&sc->arrs); 7441f2361f8SHidetoshi Shimokawa 7451f2361f8SHidetoshi Shimokawa fwohci_db_free(&sc->atrq); 7461f2361f8SHidetoshi Shimokawa fwohci_db_free(&sc->atrs); 7471f2361f8SHidetoshi Shimokawa 7481f2361f8SHidetoshi Shimokawa for( i = 0 ; i < sc->fc.nisodma ; i ++ ){ 7491f2361f8SHidetoshi Shimokawa fwohci_db_free(&sc->it[i]); 7501f2361f8SHidetoshi Shimokawa fwohci_db_free(&sc->ir[i]); 7511f2361f8SHidetoshi Shimokawa } 7521f2361f8SHidetoshi Shimokawa 7531f2361f8SHidetoshi Shimokawa return 0; 7541f2361f8SHidetoshi Shimokawa } 7551f2361f8SHidetoshi Shimokawa 756d6105b60SHidetoshi Shimokawa #define LAST_DB(dbtr, db) do { \ 757d6105b60SHidetoshi Shimokawa struct fwohcidb_tr *_dbtr = (dbtr); \ 758d6105b60SHidetoshi Shimokawa int _cnt = _dbtr->dbcnt; \ 759d6105b60SHidetoshi Shimokawa db = &_dbtr->db[ (_cnt > 2) ? (_cnt -1) : 0]; \ 760d6105b60SHidetoshi Shimokawa } while (0) 761d6105b60SHidetoshi Shimokawa 762c572b810SHidetoshi Shimokawa static void 763c572b810SHidetoshi Shimokawa fwohci_start(struct fwohci_softc *sc, struct fwohci_dbch *dbch) 7643c60ba66SKatsushi Kobayashi { 7653c60ba66SKatsushi Kobayashi int i, s; 7663c60ba66SKatsushi Kobayashi int tcode, hdr_len, hdr_off, len; 7673c60ba66SKatsushi Kobayashi int fsegment = -1; 7683c60ba66SKatsushi Kobayashi u_int32_t off; 7693c60ba66SKatsushi Kobayashi struct fw_xfer *xfer; 7703c60ba66SKatsushi Kobayashi struct fw_pkt *fp; 7713c60ba66SKatsushi Kobayashi volatile struct fwohci_txpkthdr *ohcifp; 7723c60ba66SKatsushi Kobayashi struct fwohcidb_tr *db_tr; 7733c60ba66SKatsushi Kobayashi volatile struct fwohcidb *db; 7743c60ba66SKatsushi Kobayashi struct mbuf *m; 7753c60ba66SKatsushi Kobayashi struct tcode_info *info; 776d6105b60SHidetoshi Shimokawa static int maxdesc=0; 7773c60ba66SKatsushi Kobayashi 7783c60ba66SKatsushi Kobayashi if(&sc->atrq == dbch){ 7793c60ba66SKatsushi Kobayashi off = OHCI_ATQOFF; 7803c60ba66SKatsushi Kobayashi }else if(&sc->atrs == dbch){ 7813c60ba66SKatsushi Kobayashi off = OHCI_ATSOFF; 7823c60ba66SKatsushi Kobayashi }else{ 7833c60ba66SKatsushi Kobayashi return; 7843c60ba66SKatsushi Kobayashi } 7853c60ba66SKatsushi Kobayashi 7863c60ba66SKatsushi Kobayashi if (dbch->flags & FWOHCI_DBCH_FULL) 7873c60ba66SKatsushi Kobayashi return; 7883c60ba66SKatsushi Kobayashi 7893c60ba66SKatsushi Kobayashi s = splfw(); 7903c60ba66SKatsushi Kobayashi db_tr = dbch->top; 7913c60ba66SKatsushi Kobayashi txloop: 7923c60ba66SKatsushi Kobayashi xfer = STAILQ_FIRST(&dbch->xferq.q); 7933c60ba66SKatsushi Kobayashi if(xfer == NULL){ 7943c60ba66SKatsushi Kobayashi goto kick; 7953c60ba66SKatsushi Kobayashi } 7963c60ba66SKatsushi Kobayashi if(dbch->xferq.queued == 0 ){ 7973c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, "TX queue empty\n"); 7983c60ba66SKatsushi Kobayashi } 7993c60ba66SKatsushi Kobayashi STAILQ_REMOVE_HEAD(&dbch->xferq.q, link); 8003c60ba66SKatsushi Kobayashi db_tr->xfer = xfer; 8013c60ba66SKatsushi Kobayashi xfer->state = FWXF_START; 8023c60ba66SKatsushi Kobayashi dbch->xferq.packets++; 8033c60ba66SKatsushi Kobayashi 8043c60ba66SKatsushi Kobayashi fp = (struct fw_pkt *)(xfer->send.buf + xfer->send.off); 8053c60ba66SKatsushi Kobayashi tcode = fp->mode.common.tcode; 8063c60ba66SKatsushi Kobayashi 8073c60ba66SKatsushi Kobayashi ohcifp = (volatile struct fwohci_txpkthdr *) db_tr->db[1].db.immed; 8083c60ba66SKatsushi Kobayashi info = &tinfo[tcode]; 8093c60ba66SKatsushi Kobayashi hdr_len = hdr_off = info->hdr_len; 8103c60ba66SKatsushi Kobayashi /* fw_asyreq must pass valid send.len */ 8113c60ba66SKatsushi Kobayashi len = xfer->send.len; 8123c60ba66SKatsushi Kobayashi for( i = 0 ; i < hdr_off ; i+= 4){ 8133c60ba66SKatsushi Kobayashi ohcifp->mode.ld[i/4] = ntohl(fp->mode.ld[i/4]); 8143c60ba66SKatsushi Kobayashi } 8153c60ba66SKatsushi Kobayashi ohcifp->mode.common.spd = xfer->spd; 8163c60ba66SKatsushi Kobayashi if (tcode == FWTCODE_STREAM ){ 8173c60ba66SKatsushi Kobayashi hdr_len = 8; 8183c60ba66SKatsushi Kobayashi ohcifp->mode.stream.len = ntohs(fp->mode.stream.len); 8193c60ba66SKatsushi Kobayashi } else if (tcode == FWTCODE_PHY) { 8203c60ba66SKatsushi Kobayashi hdr_len = 12; 8213c60ba66SKatsushi Kobayashi ohcifp->mode.ld[1] = ntohl(fp->mode.ld[1]); 8223c60ba66SKatsushi Kobayashi ohcifp->mode.ld[2] = ntohl(fp->mode.ld[2]); 8233c60ba66SKatsushi Kobayashi ohcifp->mode.common.spd = 0; 8243c60ba66SKatsushi Kobayashi ohcifp->mode.common.tcode = FWOHCITCODE_PHY; 8253c60ba66SKatsushi Kobayashi } else { 8263c60ba66SKatsushi Kobayashi ohcifp->mode.asycomm.dst = ntohs(fp->mode.hdr.dst); 8273c60ba66SKatsushi Kobayashi ohcifp->mode.asycomm.srcbus = OHCI_ASYSRCBUS; 8283c60ba66SKatsushi Kobayashi ohcifp->mode.asycomm.tlrt |= FWRETRY_X; 8293c60ba66SKatsushi Kobayashi } 8303c60ba66SKatsushi Kobayashi db = &db_tr->db[0]; 8313c60ba66SKatsushi Kobayashi db->db.desc.cmd = OHCI_OUTPUT_MORE | OHCI_KEY_ST2 | hdr_len; 8323c60ba66SKatsushi Kobayashi db->db.desc.status = 0; 8333c60ba66SKatsushi Kobayashi /* Specify bound timer of asy. responce */ 8343c60ba66SKatsushi Kobayashi if(&sc->atrs == dbch){ 8353c60ba66SKatsushi Kobayashi db->db.desc.count 8363c60ba66SKatsushi Kobayashi = (OREAD(sc, OHCI_CYCLETIMER) >> 12) + (1 << 13); 8373c60ba66SKatsushi Kobayashi } 8383c60ba66SKatsushi Kobayashi 8393c60ba66SKatsushi Kobayashi db_tr->dbcnt = 2; 8403c60ba66SKatsushi Kobayashi db = &db_tr->db[db_tr->dbcnt]; 8413c60ba66SKatsushi Kobayashi if(len > hdr_off){ 8423c60ba66SKatsushi Kobayashi if (xfer->mbuf == NULL) { 8433c60ba66SKatsushi Kobayashi db->db.desc.addr 8443c60ba66SKatsushi Kobayashi = vtophys(xfer->send.buf + xfer->send.off) + hdr_off; 8453c60ba66SKatsushi Kobayashi db->db.desc.cmd 8463c60ba66SKatsushi Kobayashi = OHCI_OUTPUT_MORE | ((len - hdr_off) & 0xffff); 8473c60ba66SKatsushi Kobayashi db->db.desc.status = 0; 8483c60ba66SKatsushi Kobayashi 8493c60ba66SKatsushi Kobayashi db_tr->dbcnt++; 8503c60ba66SKatsushi Kobayashi } else { 8513c60ba66SKatsushi Kobayashi /* XXX we assume mbuf chain is shorter than ndesc */ 852d6105b60SHidetoshi Shimokawa for (m = xfer->mbuf; m != NULL; m = m->m_next) { 853d6105b60SHidetoshi Shimokawa if (m->m_len == 0) 854d6105b60SHidetoshi Shimokawa /* unrecoverable error could ocurre. */ 855d6105b60SHidetoshi Shimokawa continue; 856d6105b60SHidetoshi Shimokawa if (db_tr->dbcnt >= dbch->ndesc) { 857d6105b60SHidetoshi Shimokawa device_printf(sc->fc.dev, 858d6105b60SHidetoshi Shimokawa "dbch->ndesc is too small" 859d6105b60SHidetoshi Shimokawa ", trancated.\n"); 860d6105b60SHidetoshi Shimokawa break; 861d6105b60SHidetoshi Shimokawa } 8623c60ba66SKatsushi Kobayashi db->db.desc.addr 8633c60ba66SKatsushi Kobayashi = vtophys(mtod(m, caddr_t)); 8643c60ba66SKatsushi Kobayashi db->db.desc.cmd = OHCI_OUTPUT_MORE | m->m_len; 8653c60ba66SKatsushi Kobayashi db->db.desc.status = 0; 8663c60ba66SKatsushi Kobayashi db++; 8673c60ba66SKatsushi Kobayashi db_tr->dbcnt++; 8683c60ba66SKatsushi Kobayashi } 8693c60ba66SKatsushi Kobayashi } 870d6105b60SHidetoshi Shimokawa } 871d6105b60SHidetoshi Shimokawa if (maxdesc < db_tr->dbcnt) { 872d6105b60SHidetoshi Shimokawa maxdesc = db_tr->dbcnt; 873d6105b60SHidetoshi Shimokawa if (bootverbose) 874d6105b60SHidetoshi Shimokawa device_printf(sc->fc.dev, "maxdesc: %d\n", maxdesc); 875d6105b60SHidetoshi Shimokawa } 8763c60ba66SKatsushi Kobayashi /* last db */ 8773c60ba66SKatsushi Kobayashi LAST_DB(db_tr, db); 8783c60ba66SKatsushi Kobayashi db->db.desc.cmd |= OHCI_OUTPUT_LAST 8793c60ba66SKatsushi Kobayashi | OHCI_INTERRUPT_ALWAYS 8803c60ba66SKatsushi Kobayashi | OHCI_BRANCH_ALWAYS; 8813c60ba66SKatsushi Kobayashi db->db.desc.depend = vtophys(STAILQ_NEXT(db_tr, link)->db); 8823c60ba66SKatsushi Kobayashi 8833c60ba66SKatsushi Kobayashi if(fsegment == -1 ) 8843c60ba66SKatsushi Kobayashi fsegment = db_tr->dbcnt; 8853c60ba66SKatsushi Kobayashi if (dbch->pdb_tr != NULL) { 8863c60ba66SKatsushi Kobayashi LAST_DB(dbch->pdb_tr, db); 8873c60ba66SKatsushi Kobayashi db->db.desc.depend |= db_tr->dbcnt; 8883c60ba66SKatsushi Kobayashi } 8893c60ba66SKatsushi Kobayashi dbch->pdb_tr = db_tr; 8903c60ba66SKatsushi Kobayashi db_tr = STAILQ_NEXT(db_tr, link); 8913c60ba66SKatsushi Kobayashi if(db_tr != dbch->bottom){ 8923c60ba66SKatsushi Kobayashi goto txloop; 8933c60ba66SKatsushi Kobayashi } else { 89417c3d42cSHidetoshi Shimokawa device_printf(sc->fc.dev, "fwohci_start: lack of db_trq\n"); 8953c60ba66SKatsushi Kobayashi dbch->flags |= FWOHCI_DBCH_FULL; 8963c60ba66SKatsushi Kobayashi } 8973c60ba66SKatsushi Kobayashi kick: 8983c60ba66SKatsushi Kobayashi if (firewire_debug) printf("kick\n"); 8993c60ba66SKatsushi Kobayashi /* kick asy q */ 9003c60ba66SKatsushi Kobayashi 9013c60ba66SKatsushi Kobayashi if(dbch->xferq.flag & FWXFERQ_RUNNING) { 9023c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_DMACTL(off), OHCI_CNTL_DMA_WAKE); 9033c60ba66SKatsushi Kobayashi } else { 90417c3d42cSHidetoshi Shimokawa if (bootverbose) 90517c3d42cSHidetoshi Shimokawa device_printf(sc->fc.dev, "start AT DMA status=%x\n", 9063c60ba66SKatsushi Kobayashi OREAD(sc, OHCI_DMACTL(off))); 9073c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_DMACMD(off), vtophys(dbch->top->db) | fsegment); 9083c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_DMACTL(off), OHCI_CNTL_DMA_RUN); 9093c60ba66SKatsushi Kobayashi dbch->xferq.flag |= FWXFERQ_RUNNING; 9103c60ba66SKatsushi Kobayashi } 911c572b810SHidetoshi Shimokawa 9123c60ba66SKatsushi Kobayashi dbch->top = db_tr; 9133c60ba66SKatsushi Kobayashi splx(s); 9143c60ba66SKatsushi Kobayashi return; 9153c60ba66SKatsushi Kobayashi } 916c572b810SHidetoshi Shimokawa 917c572b810SHidetoshi Shimokawa static void 918c572b810SHidetoshi Shimokawa fwohci_drain_atq(struct firewire_comm *fc, struct fw_xfer *xfer) 9193c60ba66SKatsushi Kobayashi { 9203c60ba66SKatsushi Kobayashi struct fwohci_softc *sc = (struct fwohci_softc *)fc; 9213c60ba66SKatsushi Kobayashi fwohci_drain(&sc->fc, xfer, &(sc->atrq)); 9223c60ba66SKatsushi Kobayashi return; 9233c60ba66SKatsushi Kobayashi } 924c572b810SHidetoshi Shimokawa 925c572b810SHidetoshi Shimokawa static void 926c572b810SHidetoshi Shimokawa fwohci_drain_ats(struct firewire_comm *fc, struct fw_xfer *xfer) 9273c60ba66SKatsushi Kobayashi { 9283c60ba66SKatsushi Kobayashi struct fwohci_softc *sc = (struct fwohci_softc *)fc; 9293c60ba66SKatsushi Kobayashi fwohci_drain(&sc->fc, xfer, &(sc->atrs)); 9303c60ba66SKatsushi Kobayashi return; 9313c60ba66SKatsushi Kobayashi } 932c572b810SHidetoshi Shimokawa 933c572b810SHidetoshi Shimokawa static void 934c572b810SHidetoshi Shimokawa fwohci_start_atq(struct firewire_comm *fc) 9353c60ba66SKatsushi Kobayashi { 9363c60ba66SKatsushi Kobayashi struct fwohci_softc *sc = (struct fwohci_softc *)fc; 9373c60ba66SKatsushi Kobayashi fwohci_start( sc, &(sc->atrq)); 9383c60ba66SKatsushi Kobayashi return; 9393c60ba66SKatsushi Kobayashi } 940c572b810SHidetoshi Shimokawa 941c572b810SHidetoshi Shimokawa static void 942c572b810SHidetoshi Shimokawa fwohci_start_ats(struct firewire_comm *fc) 9433c60ba66SKatsushi Kobayashi { 9443c60ba66SKatsushi Kobayashi struct fwohci_softc *sc = (struct fwohci_softc *)fc; 9453c60ba66SKatsushi Kobayashi fwohci_start( sc, &(sc->atrs)); 9463c60ba66SKatsushi Kobayashi return; 9473c60ba66SKatsushi Kobayashi } 948c572b810SHidetoshi Shimokawa 949c572b810SHidetoshi Shimokawa void 950c572b810SHidetoshi Shimokawa fwohci_txd(struct fwohci_softc *sc, struct fwohci_dbch *dbch) 9513c60ba66SKatsushi Kobayashi { 9523c60ba66SKatsushi Kobayashi int s, err = 0; 9533c60ba66SKatsushi Kobayashi struct fwohcidb_tr *tr; 9543c60ba66SKatsushi Kobayashi volatile struct fwohcidb *db; 9553c60ba66SKatsushi Kobayashi struct fw_xfer *xfer; 9563c60ba66SKatsushi Kobayashi u_int32_t off; 9573c60ba66SKatsushi Kobayashi u_int stat; 9583c60ba66SKatsushi Kobayashi int packets; 9593c60ba66SKatsushi Kobayashi struct firewire_comm *fc = (struct firewire_comm *)sc; 9603c60ba66SKatsushi Kobayashi if(&sc->atrq == dbch){ 9613c60ba66SKatsushi Kobayashi off = OHCI_ATQOFF; 9623c60ba66SKatsushi Kobayashi }else if(&sc->atrs == dbch){ 9633c60ba66SKatsushi Kobayashi off = OHCI_ATSOFF; 9643c60ba66SKatsushi Kobayashi }else{ 9653c60ba66SKatsushi Kobayashi return; 9663c60ba66SKatsushi Kobayashi } 9673c60ba66SKatsushi Kobayashi s = splfw(); 9683c60ba66SKatsushi Kobayashi tr = dbch->bottom; 9693c60ba66SKatsushi Kobayashi packets = 0; 9703c60ba66SKatsushi Kobayashi while(dbch->xferq.queued > 0){ 9713c60ba66SKatsushi Kobayashi LAST_DB(tr, db); 9723c60ba66SKatsushi Kobayashi if(!(db->db.desc.status & OHCI_CNTL_DMA_ACTIVE)){ 9733c60ba66SKatsushi Kobayashi if (fc->status != FWBUSRESET) 9743c60ba66SKatsushi Kobayashi /* maybe out of order?? */ 9753c60ba66SKatsushi Kobayashi goto out; 9763c60ba66SKatsushi Kobayashi } 9773c60ba66SKatsushi Kobayashi if(db->db.desc.status & OHCI_CNTL_DMA_DEAD) { 9783c60ba66SKatsushi Kobayashi #ifdef OHCI_DEBUG 9793c60ba66SKatsushi Kobayashi dump_dma(sc, ch); 9803c60ba66SKatsushi Kobayashi dump_db(sc, ch); 9813c60ba66SKatsushi Kobayashi #endif 9823c60ba66SKatsushi Kobayashi /* Stop DMA */ 9833c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_DMACTLCLR(off), OHCI_CNTL_DMA_RUN); 9843c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, "force reset AT FIFO\n"); 9853c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_HCCCTLCLR, OHCI_HCC_LINKEN); 9863c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_HCCCTL, OHCI_HCC_LPS | OHCI_HCC_LINKEN); 9873c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_DMACTLCLR(off), OHCI_CNTL_DMA_RUN); 9883c60ba66SKatsushi Kobayashi } 9893c60ba66SKatsushi Kobayashi stat = db->db.desc.status & FWOHCIEV_MASK; 9903c60ba66SKatsushi Kobayashi switch(stat){ 9913c60ba66SKatsushi Kobayashi case FWOHCIEV_ACKCOMPL: 9923c60ba66SKatsushi Kobayashi case FWOHCIEV_ACKPEND: 9933c60ba66SKatsushi Kobayashi err = 0; 9943c60ba66SKatsushi Kobayashi break; 9953c60ba66SKatsushi Kobayashi case FWOHCIEV_ACKBSA: 9963c60ba66SKatsushi Kobayashi case FWOHCIEV_ACKBSB: 9973c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, "txd err=%2x %s\n", stat, fwohcicode[stat]); 9983c60ba66SKatsushi Kobayashi case FWOHCIEV_ACKBSX: 9993c60ba66SKatsushi Kobayashi err = EBUSY; 10003c60ba66SKatsushi Kobayashi break; 10013c60ba66SKatsushi Kobayashi case FWOHCIEV_FLUSHED: 10023c60ba66SKatsushi Kobayashi case FWOHCIEV_ACKTARD: 10033c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, "txd err=%2x %s\n", stat, fwohcicode[stat]); 10043c60ba66SKatsushi Kobayashi err = EAGAIN; 10053c60ba66SKatsushi Kobayashi break; 10063c60ba66SKatsushi Kobayashi case FWOHCIEV_MISSACK: 10073c60ba66SKatsushi Kobayashi case FWOHCIEV_UNDRRUN: 10083c60ba66SKatsushi Kobayashi case FWOHCIEV_OVRRUN: 10093c60ba66SKatsushi Kobayashi case FWOHCIEV_DESCERR: 10103c60ba66SKatsushi Kobayashi case FWOHCIEV_DTRDERR: 10113c60ba66SKatsushi Kobayashi case FWOHCIEV_TIMEOUT: 10123c60ba66SKatsushi Kobayashi case FWOHCIEV_TCODERR: 10133c60ba66SKatsushi Kobayashi case FWOHCIEV_UNKNOWN: 10143c60ba66SKatsushi Kobayashi case FWOHCIEV_ACKDERR: 10153c60ba66SKatsushi Kobayashi case FWOHCIEV_ACKTERR: 10163c60ba66SKatsushi Kobayashi default: 10173c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, "txd err=%2x %s\n", 10183c60ba66SKatsushi Kobayashi stat, fwohcicode[stat]); 10193c60ba66SKatsushi Kobayashi err = EINVAL; 10203c60ba66SKatsushi Kobayashi break; 10213c60ba66SKatsushi Kobayashi } 10223c60ba66SKatsushi Kobayashi if(tr->xfer != NULL){ 10233c60ba66SKatsushi Kobayashi xfer = tr->xfer; 10243c60ba66SKatsushi Kobayashi xfer->state = FWXF_SENT; 10253c60ba66SKatsushi Kobayashi if(err == EBUSY && fc->status != FWBUSRESET){ 10263c60ba66SKatsushi Kobayashi xfer->state = FWXF_BUSY; 10273c60ba66SKatsushi Kobayashi switch(xfer->act_type){ 10283c60ba66SKatsushi Kobayashi case FWACT_XFER: 10293c60ba66SKatsushi Kobayashi xfer->resp = err; 10303c60ba66SKatsushi Kobayashi if(xfer->retry_req != NULL){ 10313c60ba66SKatsushi Kobayashi xfer->retry_req(xfer); 10323c60ba66SKatsushi Kobayashi } 10333c60ba66SKatsushi Kobayashi break; 10343c60ba66SKatsushi Kobayashi default: 10353c60ba66SKatsushi Kobayashi break; 10363c60ba66SKatsushi Kobayashi } 10373c60ba66SKatsushi Kobayashi } else if( stat != FWOHCIEV_ACKPEND){ 10383c60ba66SKatsushi Kobayashi if (stat != FWOHCIEV_ACKCOMPL) 10393c60ba66SKatsushi Kobayashi xfer->state = FWXF_SENTERR; 10403c60ba66SKatsushi Kobayashi xfer->resp = err; 10413c60ba66SKatsushi Kobayashi switch(xfer->act_type){ 10423c60ba66SKatsushi Kobayashi case FWACT_XFER: 10433c60ba66SKatsushi Kobayashi fw_xfer_done(xfer); 10443c60ba66SKatsushi Kobayashi break; 10453c60ba66SKatsushi Kobayashi default: 10463c60ba66SKatsushi Kobayashi break; 10473c60ba66SKatsushi Kobayashi } 10483c60ba66SKatsushi Kobayashi } 10493c60ba66SKatsushi Kobayashi dbch->xferq.queued --; 10503c60ba66SKatsushi Kobayashi } 10513c60ba66SKatsushi Kobayashi tr->xfer = NULL; 10523c60ba66SKatsushi Kobayashi 10533c60ba66SKatsushi Kobayashi packets ++; 10543c60ba66SKatsushi Kobayashi tr = STAILQ_NEXT(tr, link); 10553c60ba66SKatsushi Kobayashi dbch->bottom = tr; 10563c60ba66SKatsushi Kobayashi } 10573c60ba66SKatsushi Kobayashi out: 10583c60ba66SKatsushi Kobayashi if ((dbch->flags & FWOHCI_DBCH_FULL) && packets > 0) { 10593c60ba66SKatsushi Kobayashi printf("make free slot\n"); 10603c60ba66SKatsushi Kobayashi dbch->flags &= ~FWOHCI_DBCH_FULL; 10613c60ba66SKatsushi Kobayashi fwohci_start(sc, dbch); 10623c60ba66SKatsushi Kobayashi } 10633c60ba66SKatsushi Kobayashi splx(s); 10643c60ba66SKatsushi Kobayashi } 1065c572b810SHidetoshi Shimokawa 1066c572b810SHidetoshi Shimokawa static void 1067c572b810SHidetoshi Shimokawa fwohci_drain(struct firewire_comm *fc, struct fw_xfer *xfer, struct fwohci_dbch *dbch) 10683c60ba66SKatsushi Kobayashi { 10693c60ba66SKatsushi Kobayashi int i, s; 10703c60ba66SKatsushi Kobayashi struct fwohcidb_tr *tr; 10713c60ba66SKatsushi Kobayashi 10723c60ba66SKatsushi Kobayashi if(xfer->state != FWXF_START) return; 10733c60ba66SKatsushi Kobayashi 10743c60ba66SKatsushi Kobayashi s = splfw(); 10753c60ba66SKatsushi Kobayashi tr = dbch->bottom; 10763c60ba66SKatsushi Kobayashi for( i = 0 ; i <= dbch->xferq.queued ; i ++){ 10773c60ba66SKatsushi Kobayashi if(tr->xfer == xfer){ 10783c60ba66SKatsushi Kobayashi s = splfw(); 10793c60ba66SKatsushi Kobayashi tr->xfer = NULL; 10803c60ba66SKatsushi Kobayashi dbch->xferq.queued --; 10813c60ba66SKatsushi Kobayashi #if 1 10823c60ba66SKatsushi Kobayashi /* XXX */ 10833c60ba66SKatsushi Kobayashi if (tr == dbch->bottom) 10843c60ba66SKatsushi Kobayashi dbch->bottom = STAILQ_NEXT(tr, link); 10853c60ba66SKatsushi Kobayashi #endif 10863c60ba66SKatsushi Kobayashi if (dbch->flags & FWOHCI_DBCH_FULL) { 10873c60ba66SKatsushi Kobayashi printf("fwohci_drain: make slot\n"); 10883c60ba66SKatsushi Kobayashi dbch->flags &= ~FWOHCI_DBCH_FULL; 10893c60ba66SKatsushi Kobayashi fwohci_start((struct fwohci_softc *)fc, dbch); 10903c60ba66SKatsushi Kobayashi } 10913c60ba66SKatsushi Kobayashi 10923c60ba66SKatsushi Kobayashi splx(s); 10933c60ba66SKatsushi Kobayashi break; 10943c60ba66SKatsushi Kobayashi } 10953c60ba66SKatsushi Kobayashi tr = STAILQ_NEXT(tr, link); 10963c60ba66SKatsushi Kobayashi } 10973c60ba66SKatsushi Kobayashi splx(s); 10983c60ba66SKatsushi Kobayashi return; 10993c60ba66SKatsushi Kobayashi } 11003c60ba66SKatsushi Kobayashi 1101c572b810SHidetoshi Shimokawa static void 1102c572b810SHidetoshi Shimokawa fwohci_db_free(struct fwohci_dbch *dbch) 11033c60ba66SKatsushi Kobayashi { 11043c60ba66SKatsushi Kobayashi struct fwohcidb_tr *db_tr; 1105e2ad5d6eSHidetoshi Shimokawa int idb, i; 11063c60ba66SKatsushi Kobayashi 11071f2361f8SHidetoshi Shimokawa if ((dbch->flags & FWOHCI_DBCH_INIT) == 0) 11081f2361f8SHidetoshi Shimokawa return; 11091f2361f8SHidetoshi Shimokawa 11103c60ba66SKatsushi Kobayashi if(!(dbch->xferq.flag & FWXFERQ_EXTBUF)){ 11113c60ba66SKatsushi Kobayashi for(db_tr = STAILQ_FIRST(&dbch->db_trq), idb = 0; 11123c60ba66SKatsushi Kobayashi idb < dbch->ndb; 11133c60ba66SKatsushi Kobayashi db_tr = STAILQ_NEXT(db_tr, link), idb++){ 11141f2361f8SHidetoshi Shimokawa if (db_tr->buf != NULL) { 11153c60ba66SKatsushi Kobayashi free(db_tr->buf, M_DEVBUF); 11163c60ba66SKatsushi Kobayashi db_tr->buf = NULL; 11173c60ba66SKatsushi Kobayashi } 11183c60ba66SKatsushi Kobayashi } 11191f2361f8SHidetoshi Shimokawa } 11203c60ba66SKatsushi Kobayashi dbch->ndb = 0; 11213c60ba66SKatsushi Kobayashi db_tr = STAILQ_FIRST(&dbch->db_trq); 1122e2ad5d6eSHidetoshi Shimokawa for (i = 0; i < dbch->npages; i++) 1123e2ad5d6eSHidetoshi Shimokawa free(dbch->pages[i], M_DEVBUF); 11243c60ba66SKatsushi Kobayashi free(db_tr, M_DEVBUF); 11253c60ba66SKatsushi Kobayashi STAILQ_INIT(&dbch->db_trq); 11261f2361f8SHidetoshi Shimokawa dbch->flags &= ~FWOHCI_DBCH_INIT; 11273c60ba66SKatsushi Kobayashi } 1128c572b810SHidetoshi Shimokawa 1129c572b810SHidetoshi Shimokawa static void 1130c572b810SHidetoshi Shimokawa fwohci_db_init(struct fwohci_dbch *dbch) 11313c60ba66SKatsushi Kobayashi { 11323c60ba66SKatsushi Kobayashi int idb; 11333c60ba66SKatsushi Kobayashi struct fwohcidb_tr *db_tr; 1134e2ad5d6eSHidetoshi Shimokawa int ndbpp, i, j; 11359339321dSHidetoshi Shimokawa 11369339321dSHidetoshi Shimokawa if ((dbch->flags & FWOHCI_DBCH_INIT) != 0) 11379339321dSHidetoshi Shimokawa goto out; 11389339321dSHidetoshi Shimokawa 11393c60ba66SKatsushi Kobayashi /* allocate DB entries and attach one to each DMA channels */ 11403c60ba66SKatsushi Kobayashi /* DB entry must start at 16 bytes bounary. */ 11413c60ba66SKatsushi Kobayashi STAILQ_INIT(&dbch->db_trq); 11423c60ba66SKatsushi Kobayashi db_tr = (struct fwohcidb_tr *) 11433c60ba66SKatsushi Kobayashi malloc(sizeof(struct fwohcidb_tr) * dbch->ndb, 11441f2361f8SHidetoshi Shimokawa M_DEVBUF, M_DONTWAIT | M_ZERO); 11453c60ba66SKatsushi Kobayashi if(db_tr == NULL){ 1146e2ad5d6eSHidetoshi Shimokawa printf("fwohci_db_init: malloc(1) failed\n"); 11473c60ba66SKatsushi Kobayashi return; 11483c60ba66SKatsushi Kobayashi } 1149e2ad5d6eSHidetoshi Shimokawa 1150e2ad5d6eSHidetoshi Shimokawa ndbpp = PAGE_SIZE / (sizeof(struct fwohcidb) * dbch->ndesc); 1151e2ad5d6eSHidetoshi Shimokawa dbch->npages = (dbch->ndb + ndbpp - 1)/ ndbpp; 11527643dc18SHidetoshi Shimokawa if (firewire_debug) 1153e2ad5d6eSHidetoshi Shimokawa printf("ndesc: %d, ndbpp: %d, ndb: %d, npages: %d\n", 1154e2ad5d6eSHidetoshi Shimokawa dbch->ndesc, ndbpp, dbch->ndb, dbch->npages); 1155e2ad5d6eSHidetoshi Shimokawa if (dbch->npages > FWOHCI_DBCH_MAX_PAGES) { 1156e2ad5d6eSHidetoshi Shimokawa printf("npages(%d) > DBCH_MAX_PAGES(%d)\n", 1157e2ad5d6eSHidetoshi Shimokawa dbch->npages, FWOHCI_DBCH_MAX_PAGES); 1158e2ad5d6eSHidetoshi Shimokawa return; 1159e2ad5d6eSHidetoshi Shimokawa } 1160e2ad5d6eSHidetoshi Shimokawa for (i = 0; i < dbch->npages; i++) { 1161e2ad5d6eSHidetoshi Shimokawa dbch->pages[i] = malloc(PAGE_SIZE, M_DEVBUF, 1162e2ad5d6eSHidetoshi Shimokawa M_DONTWAIT | M_ZERO); 1163e2ad5d6eSHidetoshi Shimokawa if (dbch->pages[i] == NULL) { 1164e2ad5d6eSHidetoshi Shimokawa printf("fwohci_db_init: malloc(2) failed\n"); 1165e2ad5d6eSHidetoshi Shimokawa for (j = 0; j < i; j ++) 1166e2ad5d6eSHidetoshi Shimokawa free(dbch->pages[j], M_DEVBUF); 11671f2361f8SHidetoshi Shimokawa free(db_tr, M_DEVBUF); 11683c60ba66SKatsushi Kobayashi return; 11693c60ba66SKatsushi Kobayashi } 1170e2ad5d6eSHidetoshi Shimokawa } 11713c60ba66SKatsushi Kobayashi /* Attach DB to DMA ch. */ 11723c60ba66SKatsushi Kobayashi for(idb = 0 ; idb < dbch->ndb ; idb++){ 11733c60ba66SKatsushi Kobayashi db_tr->dbcnt = 0; 1174e2ad5d6eSHidetoshi Shimokawa db_tr->db = (struct fwohcidb *)dbch->pages[idb/ndbpp] 1175e2ad5d6eSHidetoshi Shimokawa + dbch->ndesc * (idb % ndbpp); 11763c60ba66SKatsushi Kobayashi STAILQ_INSERT_TAIL(&dbch->db_trq, db_tr, link); 11773c60ba66SKatsushi Kobayashi if (!(dbch->xferq.flag & FWXFERQ_PACKET) && 1178d0fd7bc6SHidetoshi Shimokawa dbch->xferq.bnpacket != 0) { 1179d0fd7bc6SHidetoshi Shimokawa if (idb % dbch->xferq.bnpacket == 0) 1180d0fd7bc6SHidetoshi Shimokawa dbch->xferq.bulkxfer[idb / dbch->xferq.bnpacket 1181d0fd7bc6SHidetoshi Shimokawa ].start = (caddr_t)db_tr; 1182d0fd7bc6SHidetoshi Shimokawa if ((idb + 1) % dbch->xferq.bnpacket == 0) 1183d0fd7bc6SHidetoshi Shimokawa dbch->xferq.bulkxfer[idb / dbch->xferq.bnpacket 1184d0fd7bc6SHidetoshi Shimokawa ].end = (caddr_t)db_tr; 11853c60ba66SKatsushi Kobayashi } 11863c60ba66SKatsushi Kobayashi db_tr++; 11873c60ba66SKatsushi Kobayashi } 11883c60ba66SKatsushi Kobayashi STAILQ_LAST(&dbch->db_trq, fwohcidb_tr,link)->link.stqe_next 11893c60ba66SKatsushi Kobayashi = STAILQ_FIRST(&dbch->db_trq); 11909339321dSHidetoshi Shimokawa out: 11919339321dSHidetoshi Shimokawa dbch->frag.buf = NULL; 11929339321dSHidetoshi Shimokawa dbch->frag.len = 0; 11939339321dSHidetoshi Shimokawa dbch->frag.plen = 0; 11949339321dSHidetoshi Shimokawa dbch->xferq.queued = 0; 11959339321dSHidetoshi Shimokawa dbch->pdb_tr = NULL; 11963c60ba66SKatsushi Kobayashi dbch->top = STAILQ_FIRST(&dbch->db_trq); 11973c60ba66SKatsushi Kobayashi dbch->bottom = dbch->top; 11981f2361f8SHidetoshi Shimokawa dbch->flags = FWOHCI_DBCH_INIT; 11993c60ba66SKatsushi Kobayashi } 1200c572b810SHidetoshi Shimokawa 1201c572b810SHidetoshi Shimokawa static int 1202c572b810SHidetoshi Shimokawa fwohci_itx_disable(struct firewire_comm *fc, int dmach) 12033c60ba66SKatsushi Kobayashi { 12043c60ba66SKatsushi Kobayashi struct fwohci_softc *sc = (struct fwohci_softc *)fc; 12053c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_ITCTLCLR(dmach), OHCI_CNTL_DMA_RUN); 12063c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IT_MASKCLR, 1 << dmach); 12073c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IT_STATCLR, 1 << dmach); 12083c60ba66SKatsushi Kobayashi fwohci_db_free(&sc->it[dmach]); 12093c60ba66SKatsushi Kobayashi sc->it[dmach].xferq.flag &= ~FWXFERQ_RUNNING; 12103c60ba66SKatsushi Kobayashi return 0; 12113c60ba66SKatsushi Kobayashi } 1212c572b810SHidetoshi Shimokawa 1213c572b810SHidetoshi Shimokawa static int 1214c572b810SHidetoshi Shimokawa fwohci_irx_disable(struct firewire_comm *fc, int dmach) 12153c60ba66SKatsushi Kobayashi { 12163c60ba66SKatsushi Kobayashi struct fwohci_softc *sc = (struct fwohci_softc *)fc; 12173c60ba66SKatsushi Kobayashi 12183c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IRCTLCLR(dmach), OHCI_CNTL_DMA_RUN); 12193c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IR_MASKCLR, 1 << dmach); 12203c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IR_STATCLR, 1 << dmach); 12213c60ba66SKatsushi Kobayashi if(sc->ir[dmach].dummy != NULL){ 12223c60ba66SKatsushi Kobayashi free(sc->ir[dmach].dummy, M_DEVBUF); 12233c60ba66SKatsushi Kobayashi } 12243c60ba66SKatsushi Kobayashi sc->ir[dmach].dummy = NULL; 12253c60ba66SKatsushi Kobayashi fwohci_db_free(&sc->ir[dmach]); 12263c60ba66SKatsushi Kobayashi sc->ir[dmach].xferq.flag &= ~FWXFERQ_RUNNING; 12273c60ba66SKatsushi Kobayashi return 0; 12283c60ba66SKatsushi Kobayashi } 1229c572b810SHidetoshi Shimokawa 1230c572b810SHidetoshi Shimokawa static void 1231c572b810SHidetoshi Shimokawa fwohci_irx_post (struct firewire_comm *fc , u_int32_t *qld) 12323c60ba66SKatsushi Kobayashi { 12333c60ba66SKatsushi Kobayashi qld[0] = ntohl(qld[0]); 12343c60ba66SKatsushi Kobayashi return; 12353c60ba66SKatsushi Kobayashi } 1236c572b810SHidetoshi Shimokawa 1237c572b810SHidetoshi Shimokawa static int 1238c572b810SHidetoshi Shimokawa fwohci_irxpp_enable(struct firewire_comm *fc, int dmach) 12393c60ba66SKatsushi Kobayashi { 12403c60ba66SKatsushi Kobayashi struct fwohci_softc *sc = (struct fwohci_softc *)fc; 12413c60ba66SKatsushi Kobayashi int err = 0; 12423c60ba66SKatsushi Kobayashi unsigned short tag, ich; 12433c60ba66SKatsushi Kobayashi 12443c60ba66SKatsushi Kobayashi tag = (sc->ir[dmach].xferq.flag >> 6) & 3; 12453c60ba66SKatsushi Kobayashi ich = sc->ir[dmach].xferq.flag & 0x3f; 12463c60ba66SKatsushi Kobayashi 12473c60ba66SKatsushi Kobayashi #if 0 12483c60ba66SKatsushi Kobayashi if(STAILQ_FIRST(&fc->ir[dmach]->q) != NULL){ 12493c60ba66SKatsushi Kobayashi wakeup(fc->ir[dmach]); 12503c60ba66SKatsushi Kobayashi return err; 12513c60ba66SKatsushi Kobayashi } 12523c60ba66SKatsushi Kobayashi #endif 12533c60ba66SKatsushi Kobayashi 12543c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IRMATCH(dmach), tagbit[tag] | ich); 12553c60ba66SKatsushi Kobayashi if(!(sc->ir[dmach].xferq.flag & FWXFERQ_RUNNING)){ 12563c60ba66SKatsushi Kobayashi sc->ir[dmach].xferq.queued = 0; 12573c60ba66SKatsushi Kobayashi sc->ir[dmach].ndb = NDB; 1258e2ad5d6eSHidetoshi Shimokawa sc->ir[dmach].xferq.psize = PAGE_SIZE; 12593c60ba66SKatsushi Kobayashi sc->ir[dmach].ndesc = 1; 12603c60ba66SKatsushi Kobayashi fwohci_db_init(&sc->ir[dmach]); 12610aaa9a23SHidetoshi Shimokawa if ((sc->ir[dmach].flags & FWOHCI_DBCH_INIT) == 0) 12620aaa9a23SHidetoshi Shimokawa return ENOMEM; 12633c60ba66SKatsushi Kobayashi err = fwohci_rx_enable(sc, &sc->ir[dmach]); 12643c60ba66SKatsushi Kobayashi } 12653c60ba66SKatsushi Kobayashi if(err){ 12663c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, "err in IRX setting\n"); 12673c60ba66SKatsushi Kobayashi return err; 12683c60ba66SKatsushi Kobayashi } 12693c60ba66SKatsushi Kobayashi if(!(OREAD(sc, OHCI_IRCTL(dmach)) & OHCI_CNTL_DMA_ACTIVE)){ 12703c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IRCTLCLR(dmach), OHCI_CNTL_DMA_RUN); 12713c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IR_MASKCLR, 1 << dmach); 12723c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IR_STATCLR, 1 << dmach); 12733c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IR_MASK, 1 << dmach); 12743c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IRCTLCLR(dmach), 0xf8000000); 12753c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IRCTL(dmach), OHCI_CNTL_ISOHDR); 12763c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IRCMD(dmach), 12773c60ba66SKatsushi Kobayashi vtophys(sc->ir[dmach].top->db) | 1); 12783c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IRCTL(dmach), OHCI_CNTL_DMA_RUN); 12793c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTMASK, OHCI_INT_DMA_IR); 12803c60ba66SKatsushi Kobayashi } 12813c60ba66SKatsushi Kobayashi return err; 12823c60ba66SKatsushi Kobayashi } 1283c572b810SHidetoshi Shimokawa 1284c572b810SHidetoshi Shimokawa static int 1285c572b810SHidetoshi Shimokawa fwohci_tx_enable(struct fwohci_softc *sc, struct fwohci_dbch *dbch) 12863c60ba66SKatsushi Kobayashi { 12873c60ba66SKatsushi Kobayashi int err = 0; 12883c60ba66SKatsushi Kobayashi int idb, z, i, dmach = 0; 12893c60ba66SKatsushi Kobayashi u_int32_t off = NULL; 12903c60ba66SKatsushi Kobayashi struct fwohcidb_tr *db_tr; 12913c60ba66SKatsushi Kobayashi 12923c60ba66SKatsushi Kobayashi if(!(dbch->xferq.flag & FWXFERQ_EXTBUF)){ 12933c60ba66SKatsushi Kobayashi err = EINVAL; 12943c60ba66SKatsushi Kobayashi return err; 12953c60ba66SKatsushi Kobayashi } 12963c60ba66SKatsushi Kobayashi z = dbch->ndesc; 12973c60ba66SKatsushi Kobayashi for(dmach = 0 ; dmach < sc->fc.nisodma ; dmach++){ 12983c60ba66SKatsushi Kobayashi if( &sc->it[dmach] == dbch){ 12993c60ba66SKatsushi Kobayashi off = OHCI_ITOFF(dmach); 13003c60ba66SKatsushi Kobayashi break; 13013c60ba66SKatsushi Kobayashi } 13023c60ba66SKatsushi Kobayashi } 13033c60ba66SKatsushi Kobayashi if(off == NULL){ 13043c60ba66SKatsushi Kobayashi err = EINVAL; 13053c60ba66SKatsushi Kobayashi return err; 13063c60ba66SKatsushi Kobayashi } 13073c60ba66SKatsushi Kobayashi if(dbch->xferq.flag & FWXFERQ_RUNNING) 13083c60ba66SKatsushi Kobayashi return err; 13093c60ba66SKatsushi Kobayashi dbch->xferq.flag |= FWXFERQ_RUNNING; 13103c60ba66SKatsushi Kobayashi for( i = 0, dbch->bottom = dbch->top; i < (dbch->ndb - 1); i++){ 13113c60ba66SKatsushi Kobayashi dbch->bottom = STAILQ_NEXT(dbch->bottom, link); 13123c60ba66SKatsushi Kobayashi } 13133c60ba66SKatsushi Kobayashi db_tr = dbch->top; 13143c60ba66SKatsushi Kobayashi for( idb = 0 ; idb < dbch->ndb ; idb ++){ 13153c60ba66SKatsushi Kobayashi fwohci_add_tx_buf(db_tr, 13163c60ba66SKatsushi Kobayashi dbch->xferq.psize, dbch->xferq.flag, 13173c60ba66SKatsushi Kobayashi dbch->xferq.buf + dbch->xferq.psize * idb); 13183c60ba66SKatsushi Kobayashi if(STAILQ_NEXT(db_tr, link) == NULL){ 13193c60ba66SKatsushi Kobayashi break; 13203c60ba66SKatsushi Kobayashi } 13213c60ba66SKatsushi Kobayashi db_tr->db[0].db.desc.depend 13223c60ba66SKatsushi Kobayashi = vtophys(STAILQ_NEXT(db_tr, link)->db) | z; 13233c60ba66SKatsushi Kobayashi db_tr->db[db_tr->dbcnt - 1].db.desc.depend 13243c60ba66SKatsushi Kobayashi = vtophys(STAILQ_NEXT(db_tr, link)->db) | z; 13253c60ba66SKatsushi Kobayashi if(dbch->xferq.flag & FWXFERQ_EXTBUF){ 13263c60ba66SKatsushi Kobayashi if(((idb + 1 ) % dbch->xferq.bnpacket) == 0){ 13273c60ba66SKatsushi Kobayashi db_tr->db[db_tr->dbcnt - 1].db.desc.cmd 13283c60ba66SKatsushi Kobayashi |= OHCI_INTERRUPT_ALWAYS; 13293c60ba66SKatsushi Kobayashi db_tr->db[0].db.desc.depend &= ~0xf; 13303c60ba66SKatsushi Kobayashi db_tr->db[db_tr->dbcnt - 1].db.desc.depend &= 13313c60ba66SKatsushi Kobayashi ~0xf; 13324ed65ce9SHidetoshi Shimokawa /* OHCI 1.1 and above */ 13334ed65ce9SHidetoshi Shimokawa db_tr->db[0].db.desc.cmd 13344ed65ce9SHidetoshi Shimokawa |= OHCI_INTERRUPT_ALWAYS; 13353c60ba66SKatsushi Kobayashi } 13363c60ba66SKatsushi Kobayashi } 13373c60ba66SKatsushi Kobayashi db_tr = STAILQ_NEXT(db_tr, link); 13383c60ba66SKatsushi Kobayashi } 13393c60ba66SKatsushi Kobayashi dbch->bottom->db[db_tr->dbcnt - 1].db.desc.depend &= 0xfffffff0; 13403c60ba66SKatsushi Kobayashi return err; 13413c60ba66SKatsushi Kobayashi } 1342c572b810SHidetoshi Shimokawa 1343c572b810SHidetoshi Shimokawa static int 1344c572b810SHidetoshi Shimokawa fwohci_rx_enable(struct fwohci_softc *sc, struct fwohci_dbch *dbch) 13453c60ba66SKatsushi Kobayashi { 13463c60ba66SKatsushi Kobayashi int err = 0; 13473c60ba66SKatsushi Kobayashi int idb, z, i, dmach = 0; 13483c60ba66SKatsushi Kobayashi u_int32_t off = NULL; 13493c60ba66SKatsushi Kobayashi struct fwohcidb_tr *db_tr; 13503c60ba66SKatsushi Kobayashi 13513c60ba66SKatsushi Kobayashi z = dbch->ndesc; 13523c60ba66SKatsushi Kobayashi if(&sc->arrq == dbch){ 13533c60ba66SKatsushi Kobayashi off = OHCI_ARQOFF; 13543c60ba66SKatsushi Kobayashi }else if(&sc->arrs == dbch){ 13553c60ba66SKatsushi Kobayashi off = OHCI_ARSOFF; 13563c60ba66SKatsushi Kobayashi }else{ 13573c60ba66SKatsushi Kobayashi for(dmach = 0 ; dmach < sc->fc.nisodma ; dmach++){ 13583c60ba66SKatsushi Kobayashi if( &sc->ir[dmach] == dbch){ 13593c60ba66SKatsushi Kobayashi off = OHCI_IROFF(dmach); 13603c60ba66SKatsushi Kobayashi break; 13613c60ba66SKatsushi Kobayashi } 13623c60ba66SKatsushi Kobayashi } 13633c60ba66SKatsushi Kobayashi } 13643c60ba66SKatsushi Kobayashi if(off == NULL){ 13653c60ba66SKatsushi Kobayashi err = EINVAL; 13663c60ba66SKatsushi Kobayashi return err; 13673c60ba66SKatsushi Kobayashi } 13683c60ba66SKatsushi Kobayashi if(dbch->xferq.flag & FWXFERQ_STREAM){ 13693c60ba66SKatsushi Kobayashi if(dbch->xferq.flag & FWXFERQ_RUNNING) 13703c60ba66SKatsushi Kobayashi return err; 13713c60ba66SKatsushi Kobayashi }else{ 13723c60ba66SKatsushi Kobayashi if(dbch->xferq.flag & FWXFERQ_RUNNING){ 13733c60ba66SKatsushi Kobayashi err = EBUSY; 13743c60ba66SKatsushi Kobayashi return err; 13753c60ba66SKatsushi Kobayashi } 13763c60ba66SKatsushi Kobayashi } 13773c60ba66SKatsushi Kobayashi dbch->xferq.flag |= FWXFERQ_RUNNING; 13789339321dSHidetoshi Shimokawa dbch->top = STAILQ_FIRST(&dbch->db_trq); 13793c60ba66SKatsushi Kobayashi for( i = 0, dbch->bottom = dbch->top; i < (dbch->ndb - 1); i++){ 13803c60ba66SKatsushi Kobayashi dbch->bottom = STAILQ_NEXT(dbch->bottom, link); 13813c60ba66SKatsushi Kobayashi } 13823c60ba66SKatsushi Kobayashi db_tr = dbch->top; 13833c60ba66SKatsushi Kobayashi for( idb = 0 ; idb < dbch->ndb ; idb ++){ 13843c60ba66SKatsushi Kobayashi if(!(dbch->xferq.flag & FWXFERQ_EXTBUF)){ 13853c60ba66SKatsushi Kobayashi fwohci_add_rx_buf(db_tr, 13863c60ba66SKatsushi Kobayashi dbch->xferq.psize, dbch->xferq.flag, 0, NULL); 13873c60ba66SKatsushi Kobayashi }else{ 13883c60ba66SKatsushi Kobayashi fwohci_add_rx_buf(db_tr, 13893c60ba66SKatsushi Kobayashi dbch->xferq.psize, dbch->xferq.flag, 13903c60ba66SKatsushi Kobayashi dbch->xferq.buf + dbch->xferq.psize * idb, 13913c60ba66SKatsushi Kobayashi dbch->dummy + sizeof(u_int32_t) * idb); 13923c60ba66SKatsushi Kobayashi } 13933c60ba66SKatsushi Kobayashi if(STAILQ_NEXT(db_tr, link) == NULL){ 13943c60ba66SKatsushi Kobayashi break; 13953c60ba66SKatsushi Kobayashi } 13963c60ba66SKatsushi Kobayashi db_tr->db[db_tr->dbcnt - 1].db.desc.depend 13973c60ba66SKatsushi Kobayashi = vtophys(STAILQ_NEXT(db_tr, link)->db) | z; 13983c60ba66SKatsushi Kobayashi if(dbch->xferq.flag & FWXFERQ_EXTBUF){ 13993c60ba66SKatsushi Kobayashi if(((idb + 1 ) % dbch->xferq.bnpacket) == 0){ 14003c60ba66SKatsushi Kobayashi db_tr->db[db_tr->dbcnt - 1].db.desc.cmd 14013c60ba66SKatsushi Kobayashi |= OHCI_INTERRUPT_ALWAYS; 14023c60ba66SKatsushi Kobayashi db_tr->db[db_tr->dbcnt - 1].db.desc.depend &= 14033c60ba66SKatsushi Kobayashi ~0xf; 14043c60ba66SKatsushi Kobayashi } 14053c60ba66SKatsushi Kobayashi } 14063c60ba66SKatsushi Kobayashi db_tr = STAILQ_NEXT(db_tr, link); 14073c60ba66SKatsushi Kobayashi } 14083c60ba66SKatsushi Kobayashi dbch->bottom->db[db_tr->dbcnt - 1].db.desc.depend &= 0xfffffff0; 14093c60ba66SKatsushi Kobayashi dbch->buf_offset = 0; 14103c60ba66SKatsushi Kobayashi if(dbch->xferq.flag & FWXFERQ_STREAM){ 14113c60ba66SKatsushi Kobayashi return err; 14123c60ba66SKatsushi Kobayashi }else{ 14133c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_DMACMD(off), vtophys(dbch->top->db) | z); 14143c60ba66SKatsushi Kobayashi } 14153c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_DMACTL(off), OHCI_CNTL_DMA_RUN); 14163c60ba66SKatsushi Kobayashi return err; 14173c60ba66SKatsushi Kobayashi } 1418c572b810SHidetoshi Shimokawa 1419c572b810SHidetoshi Shimokawa static int 1420c572b810SHidetoshi Shimokawa fwohci_itxbuf_enable(struct firewire_comm *fc, int dmach) 14213c60ba66SKatsushi Kobayashi { 14223c60ba66SKatsushi Kobayashi struct fwohci_softc *sc = (struct fwohci_softc *)fc; 14233c60ba66SKatsushi Kobayashi int err = 0; 14243c60ba66SKatsushi Kobayashi unsigned short tag, ich; 14253c60ba66SKatsushi Kobayashi struct fwohci_dbch *dbch; 14263c60ba66SKatsushi Kobayashi struct fw_pkt *fp; 14273c60ba66SKatsushi Kobayashi struct fwohcidb_tr *db_tr; 142897ae6c1fSHidetoshi Shimokawa int cycle_now, sec, cycle, cycle_match; 142997ae6c1fSHidetoshi Shimokawa u_int32_t stat; 14303c60ba66SKatsushi Kobayashi 14313c60ba66SKatsushi Kobayashi tag = (sc->it[dmach].xferq.flag >> 6) & 3; 14323c60ba66SKatsushi Kobayashi ich = sc->it[dmach].xferq.flag & 0x3f; 14333c60ba66SKatsushi Kobayashi dbch = &sc->it[dmach]; 14340aaa9a23SHidetoshi Shimokawa if ((dbch->flags & FWOHCI_DBCH_INIT) == 0) { 14353c60ba66SKatsushi Kobayashi dbch->xferq.queued = 0; 14363c60ba66SKatsushi Kobayashi dbch->ndb = dbch->xferq.bnpacket * dbch->xferq.bnchunk; 14373c60ba66SKatsushi Kobayashi dbch->ndesc = 3; 14383c60ba66SKatsushi Kobayashi fwohci_db_init(dbch); 14390aaa9a23SHidetoshi Shimokawa if ((dbch->flags & FWOHCI_DBCH_INIT) == 0) 14400aaa9a23SHidetoshi Shimokawa return ENOMEM; 14413c60ba66SKatsushi Kobayashi err = fwohci_tx_enable(sc, dbch); 14423c60ba66SKatsushi Kobayashi } 14433c60ba66SKatsushi Kobayashi if(err) 14443c60ba66SKatsushi Kobayashi return err; 144597ae6c1fSHidetoshi Shimokawa stat = OREAD(sc, OHCI_ITCTL(dmach)); 144697ae6c1fSHidetoshi Shimokawa if (stat & OHCI_CNTL_DMA_ACTIVE) { 14473c60ba66SKatsushi Kobayashi if(dbch->xferq.stdma2 != NULL){ 14483c60ba66SKatsushi Kobayashi fwohci_txbufdb(sc, dmach, dbch->xferq.stdma2); 14493c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *) 14503c60ba66SKatsushi Kobayashi (dbch->xferq.stdma->end))->db[dbch->ndesc - 1].db.desc.cmd 14513c60ba66SKatsushi Kobayashi |= OHCI_BRANCH_ALWAYS; 14523c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *) 14533c60ba66SKatsushi Kobayashi (dbch->xferq.stdma->end))->db[dbch->ndesc - 1].db.desc.depend = 14543c60ba66SKatsushi Kobayashi vtophys(((struct fwohcidb_tr *)(dbch->xferq.stdma2->start))->db) | dbch->ndesc; 14553c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *)(dbch->xferq.stdma->end))->db[0].db.desc.depend = 14563c60ba66SKatsushi Kobayashi vtophys(((struct fwohcidb_tr *)(dbch->xferq.stdma2->start))->db) | dbch->ndesc; 14573c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *)(dbch->xferq.stdma2->end))->db[dbch->ndesc - 1].db.desc.depend &= ~0xf; 14583c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *)(dbch->xferq.stdma2->end))->db[0].db.desc.depend &= ~0xf; 14597643dc18SHidetoshi Shimokawa } else { 14604ed65ce9SHidetoshi Shimokawa if (firewire_debug) 14617643dc18SHidetoshi Shimokawa device_printf(fc->dev, 14627643dc18SHidetoshi Shimokawa "fwohci_itxbuf_enable: queue underrun\n"); 14637643dc18SHidetoshi Shimokawa } 14647643dc18SHidetoshi Shimokawa return err; 14657643dc18SHidetoshi Shimokawa } 14667643dc18SHidetoshi Shimokawa if (firewire_debug) 14677643dc18SHidetoshi Shimokawa printf("fwohci_itxbuf_enable: kick 0x%08x\n", stat); 14683c60ba66SKatsushi Kobayashi fw_tbuf_update(&sc->fc, dmach, 0); 14693c60ba66SKatsushi Kobayashi if(dbch->xferq.stdma == NULL){ 14703c60ba66SKatsushi Kobayashi return err; 14713c60ba66SKatsushi Kobayashi } 14727643dc18SHidetoshi Shimokawa if(dbch->xferq.stdma2 == NULL){ 14737643dc18SHidetoshi Shimokawa /* wait until 2 chunks buffered */ 14747643dc18SHidetoshi Shimokawa return err; 14757643dc18SHidetoshi Shimokawa } 14763c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IT_MASKCLR, 1 << dmach); 14773c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IT_STATCLR, 1 << dmach); 14783c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IT_MASK, 1 << dmach); 14793c60ba66SKatsushi Kobayashi fwohci_txbufdb(sc, dmach, dbch->xferq.stdma); 14803c60ba66SKatsushi Kobayashi fwohci_txbufdb(sc, dmach, dbch->xferq.stdma2); 14813c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *) 14823c60ba66SKatsushi Kobayashi (dbch->xferq.stdma->end))->db[dbch->ndesc - 1].db.desc.cmd 14833c60ba66SKatsushi Kobayashi |= OHCI_BRANCH_ALWAYS; 14843c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *)(dbch->xferq.stdma->end))->db[dbch->ndesc - 1].db.desc.depend = 14853c60ba66SKatsushi Kobayashi vtophys(((struct fwohcidb_tr *)(dbch->xferq.stdma2->start))->db) | dbch->ndesc; 14863c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *)(dbch->xferq.stdma->end))->db[0].db.desc.depend = 14873c60ba66SKatsushi Kobayashi vtophys(((struct fwohcidb_tr *)(dbch->xferq.stdma2->start))->db) | dbch->ndesc; 14883c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *)(dbch->xferq.stdma2->end))->db[dbch->ndesc - 1].db.desc.depend &= ~0xf; 14893c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *) (dbch->xferq.stdma2->end))->db[0].db.desc.depend &= ~0xf; 14903c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_ITCMD(dmach), 14913c60ba66SKatsushi Kobayashi vtophys(((struct fwohcidb_tr *) 14923c60ba66SKatsushi Kobayashi (dbch->xferq.stdma->start))->db) | dbch->ndesc); 149397ae6c1fSHidetoshi Shimokawa #define CYCLE_OFFSET 1 14947643dc18SHidetoshi Shimokawa if ((stat & OHCI_CNTL_DMA_RUN) == 0) { 14953c60ba66SKatsushi Kobayashi if(dbch->xferq.flag & FWXFERQ_DV){ 14963c60ba66SKatsushi Kobayashi db_tr = (struct fwohcidb_tr *)dbch->xferq.stdma->start; 14973c60ba66SKatsushi Kobayashi fp = (struct fw_pkt *)db_tr->buf; 149897ae6c1fSHidetoshi Shimokawa dbch->xferq.dvoffset = CYCLE_OFFSET; 14990aaa9a23SHidetoshi Shimokawa fp->mode.ld[2] |= htonl(dbch->xferq.dvoffset << 12); 15003c60ba66SKatsushi Kobayashi } 150197ae6c1fSHidetoshi Shimokawa /* 2bit second + 13bit cycle */ 150297ae6c1fSHidetoshi Shimokawa cycle_now = (fc->cyctimer(fc) >> 12) & 0x7fff; 150397ae6c1fSHidetoshi Shimokawa cycle = cycle_now & 0x1fff; 150497ae6c1fSHidetoshi Shimokawa sec = cycle_now >> 13; 150597ae6c1fSHidetoshi Shimokawa #define CYCLE_MOD 0x10 150697ae6c1fSHidetoshi Shimokawa #define CYCLE_DELAY 8 /* min delay to start DMA */ 150797ae6c1fSHidetoshi Shimokawa cycle = cycle + CYCLE_DELAY; 150897ae6c1fSHidetoshi Shimokawa if (cycle >= 8000) { 150997ae6c1fSHidetoshi Shimokawa sec ++; 151097ae6c1fSHidetoshi Shimokawa cycle -= 8000; 151197ae6c1fSHidetoshi Shimokawa } 151297ae6c1fSHidetoshi Shimokawa cycle = ((cycle + CYCLE_MOD - 1) / CYCLE_MOD) * CYCLE_MOD; 151397ae6c1fSHidetoshi Shimokawa if (cycle >= 8000) { 151497ae6c1fSHidetoshi Shimokawa sec ++; 151597ae6c1fSHidetoshi Shimokawa if (cycle == 8000) 151697ae6c1fSHidetoshi Shimokawa cycle = 0; 151797ae6c1fSHidetoshi Shimokawa else 151897ae6c1fSHidetoshi Shimokawa cycle = CYCLE_MOD; 151997ae6c1fSHidetoshi Shimokawa } 152097ae6c1fSHidetoshi Shimokawa cycle_match = ((sec << 13) | cycle) & 0x7ffff; 152197ae6c1fSHidetoshi Shimokawa /* Clear cycle match counter bits */ 152297ae6c1fSHidetoshi Shimokawa OWRITE(sc, OHCI_ITCTLCLR(dmach), 0xffff0000); 152397ae6c1fSHidetoshi Shimokawa OWRITE(sc, OHCI_ITCTL(dmach), 152497ae6c1fSHidetoshi Shimokawa OHCI_CNTL_CYCMATCH_S | (cycle_match << 16) 152597ae6c1fSHidetoshi Shimokawa | OHCI_CNTL_DMA_RUN); 15263c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTMASK, OHCI_INT_DMA_IT); 15277643dc18SHidetoshi Shimokawa if (firewire_debug) 15287643dc18SHidetoshi Shimokawa printf("cycle_match: 0x%04x->0x%04x\n", 15297643dc18SHidetoshi Shimokawa cycle_now, cycle_match); 15307643dc18SHidetoshi Shimokawa } else if ((stat & OHCI_CNTL_CYCMATCH_S) == 0) { 15317643dc18SHidetoshi Shimokawa if (firewire_debug) 15327643dc18SHidetoshi Shimokawa printf("fwohci_itxbuf_enable: restart 0x%08x\n", stat); 15337643dc18SHidetoshi Shimokawa OWRITE(sc, OHCI_ITCTLCLR(dmach), OHCI_CNTL_DMA_RUN); 15347643dc18SHidetoshi Shimokawa OWRITE(sc, OHCI_ITCTL(dmach), OHCI_CNTL_DMA_RUN); 15353c60ba66SKatsushi Kobayashi } 15363c60ba66SKatsushi Kobayashi return err; 15373c60ba66SKatsushi Kobayashi } 1538c572b810SHidetoshi Shimokawa 1539c572b810SHidetoshi Shimokawa static int 1540c572b810SHidetoshi Shimokawa fwohci_irxbuf_enable(struct firewire_comm *fc, int dmach) 15413c60ba66SKatsushi Kobayashi { 15423c60ba66SKatsushi Kobayashi struct fwohci_softc *sc = (struct fwohci_softc *)fc; 15433c60ba66SKatsushi Kobayashi int err = 0; 15443c60ba66SKatsushi Kobayashi unsigned short tag, ich; 1545435dd29bSHidetoshi Shimokawa 1546435dd29bSHidetoshi Shimokawa if(!(sc->ir[dmach].xferq.flag & FWXFERQ_RUNNING)){ 15473c60ba66SKatsushi Kobayashi tag = (sc->ir[dmach].xferq.flag >> 6) & 3; 15483c60ba66SKatsushi Kobayashi ich = sc->ir[dmach].xferq.flag & 0x3f; 15493c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IRMATCH(dmach), tagbit[tag] | ich); 15503c60ba66SKatsushi Kobayashi 15513c60ba66SKatsushi Kobayashi sc->ir[dmach].xferq.queued = 0; 15523c60ba66SKatsushi Kobayashi sc->ir[dmach].ndb = sc->ir[dmach].xferq.bnpacket * 15533c60ba66SKatsushi Kobayashi sc->ir[dmach].xferq.bnchunk; 15543c60ba66SKatsushi Kobayashi sc->ir[dmach].dummy = 15553c60ba66SKatsushi Kobayashi malloc(sizeof(u_int32_t) * sc->ir[dmach].ndb, 15563c60ba66SKatsushi Kobayashi M_DEVBUF, M_DONTWAIT); 15573c60ba66SKatsushi Kobayashi if(sc->ir[dmach].dummy == NULL){ 15583c60ba66SKatsushi Kobayashi err = ENOMEM; 15593c60ba66SKatsushi Kobayashi return err; 15603c60ba66SKatsushi Kobayashi } 15613c60ba66SKatsushi Kobayashi sc->ir[dmach].ndesc = 2; 15623c60ba66SKatsushi Kobayashi fwohci_db_init(&sc->ir[dmach]); 15630aaa9a23SHidetoshi Shimokawa if ((sc->ir[dmach].flags & FWOHCI_DBCH_INIT) == 0) 15640aaa9a23SHidetoshi Shimokawa return ENOMEM; 15653c60ba66SKatsushi Kobayashi err = fwohci_rx_enable(sc, &sc->ir[dmach]); 15663c60ba66SKatsushi Kobayashi } 15673c60ba66SKatsushi Kobayashi if(err) 15683c60ba66SKatsushi Kobayashi return err; 15693c60ba66SKatsushi Kobayashi 15703c60ba66SKatsushi Kobayashi if(OREAD(sc, OHCI_IRCTL(dmach)) & OHCI_CNTL_DMA_ACTIVE){ 15713c60ba66SKatsushi Kobayashi if(sc->ir[dmach].xferq.stdma2 != NULL){ 15723c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma->end))->db[sc->ir[dmach].ndesc - 1].db.desc.depend = 15733c60ba66SKatsushi Kobayashi vtophys(((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma2->start))->db) | sc->ir[dmach].ndesc; 15743c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma->end))->db[0].db.desc.depend = 15753c60ba66SKatsushi Kobayashi vtophys(((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma2->start))->db); 15763c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma2->end))->db[sc->ir[dmach].ndesc - 1].db.desc.depend &= ~0xf; 15773c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma2->end))->db[0].db.desc.depend &= ~0xf; 15783c60ba66SKatsushi Kobayashi } 15793c60ba66SKatsushi Kobayashi }else if(!(OREAD(sc, OHCI_IRCTL(dmach)) & OHCI_CNTL_DMA_ACTIVE) 15803c60ba66SKatsushi Kobayashi && !(sc->ir[dmach].xferq.flag & FWXFERQ_PACKET)){ 15813c60ba66SKatsushi Kobayashi fw_rbuf_update(&sc->fc, dmach, 0); 15823c60ba66SKatsushi Kobayashi 15833c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IRCTLCLR(dmach), OHCI_CNTL_DMA_RUN); 15843c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IR_MASKCLR, 1 << dmach); 15853c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IR_STATCLR, 1 << dmach); 15863c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IR_MASK, 1 << dmach); 15873c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IRCTLCLR(dmach), 0xf0000000); 15883c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IRCTL(dmach), OHCI_CNTL_ISOHDR); 15893c60ba66SKatsushi Kobayashi if(sc->ir[dmach].xferq.stdma2 != NULL){ 15903c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma->end))->db[sc->ir[dmach].ndesc - 1].db.desc.depend = 15913c60ba66SKatsushi Kobayashi vtophys(((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma2->start))->db) | sc->ir[dmach].ndesc; 15923c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma->end))->db[0].db.desc.depend = 15933c60ba66SKatsushi Kobayashi vtophys(((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma2->start))->db); 15943c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma2->end))->db[sc->ir[dmach].ndesc - 1].db.desc.depend &= ~0xf; 15953c60ba66SKatsushi Kobayashi }else{ 15963c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma->end))->db[sc->ir[dmach].ndesc - 1].db.desc.depend &= ~0xf; 15973c60ba66SKatsushi Kobayashi ((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma->end))->db[0].db.desc.depend &= ~0xf; 15983c60ba66SKatsushi Kobayashi } 15993c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IRCMD(dmach), 16003c60ba66SKatsushi Kobayashi vtophys(((struct fwohcidb_tr *)(sc->ir[dmach].xferq.stdma->start))->db) | sc->ir[dmach].ndesc); 16013c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IRCTL(dmach), OHCI_CNTL_DMA_RUN); 16023c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTMASK, OHCI_INT_DMA_IR); 1603435dd29bSHidetoshi Shimokawa } 16043c60ba66SKatsushi Kobayashi return err; 16053c60ba66SKatsushi Kobayashi } 1606c572b810SHidetoshi Shimokawa 1607c572b810SHidetoshi Shimokawa static int 1608c572b810SHidetoshi Shimokawa fwohci_irx_enable(struct firewire_comm *fc, int dmach) 16093c60ba66SKatsushi Kobayashi { 16103c60ba66SKatsushi Kobayashi struct fwohci_softc *sc = (struct fwohci_softc *)fc; 16113c60ba66SKatsushi Kobayashi int err = 0; 16123c60ba66SKatsushi Kobayashi 16133c60ba66SKatsushi Kobayashi if(sc->ir[dmach].xferq.flag & FWXFERQ_PACKET){ 16143c60ba66SKatsushi Kobayashi err = fwohci_irxpp_enable(fc, dmach); 16153c60ba66SKatsushi Kobayashi return err; 16163c60ba66SKatsushi Kobayashi }else{ 16173c60ba66SKatsushi Kobayashi err = fwohci_irxbuf_enable(fc, dmach); 16183c60ba66SKatsushi Kobayashi return err; 16193c60ba66SKatsushi Kobayashi } 16203c60ba66SKatsushi Kobayashi } 1621c572b810SHidetoshi Shimokawa 1622c572b810SHidetoshi Shimokawa int 16239339321dSHidetoshi Shimokawa fwohci_shutdown(struct fwohci_softc *sc, device_t dev) 16243c60ba66SKatsushi Kobayashi { 16253c60ba66SKatsushi Kobayashi u_int i; 16263c60ba66SKatsushi Kobayashi 16273c60ba66SKatsushi Kobayashi /* Now stopping all DMA channel */ 16283c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_ARQCTLCLR, OHCI_CNTL_DMA_RUN); 16293c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_ARSCTLCLR, OHCI_CNTL_DMA_RUN); 16303c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_ATQCTLCLR, OHCI_CNTL_DMA_RUN); 16313c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_ATSCTLCLR, OHCI_CNTL_DMA_RUN); 16323c60ba66SKatsushi Kobayashi 16333c60ba66SKatsushi Kobayashi for( i = 0 ; i < sc->fc.nisodma ; i ++ ){ 16343c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IRCTLCLR(i), OHCI_CNTL_DMA_RUN); 16353c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_ITCTLCLR(i), OHCI_CNTL_DMA_RUN); 16363c60ba66SKatsushi Kobayashi } 16373c60ba66SKatsushi Kobayashi 16383c60ba66SKatsushi Kobayashi /* FLUSH FIFO and reset Transmitter/Reciever */ 16393c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_HCCCTL, OHCI_HCC_RESET); 16403c60ba66SKatsushi Kobayashi 16413c60ba66SKatsushi Kobayashi /* Stop interrupt */ 16423c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTMASKCLR, 16433c60ba66SKatsushi Kobayashi OHCI_INT_EN | OHCI_INT_ERR | OHCI_INT_PHY_SID 16443c60ba66SKatsushi Kobayashi | OHCI_INT_PHY_INT 16453c60ba66SKatsushi Kobayashi | OHCI_INT_DMA_ATRQ | OHCI_INT_DMA_ATRS 16463c60ba66SKatsushi Kobayashi | OHCI_INT_DMA_PRRQ | OHCI_INT_DMA_PRRS 16473c60ba66SKatsushi Kobayashi | OHCI_INT_DMA_ARRQ | OHCI_INT_DMA_ARRS 16483c60ba66SKatsushi Kobayashi | OHCI_INT_PHY_BUS_R); 16499339321dSHidetoshi Shimokawa /* XXX Link down? Bus reset? */ 16509339321dSHidetoshi Shimokawa return 0; 16519339321dSHidetoshi Shimokawa } 16529339321dSHidetoshi Shimokawa 16539339321dSHidetoshi Shimokawa int 16549339321dSHidetoshi Shimokawa fwohci_resume(struct fwohci_softc *sc, device_t dev) 16559339321dSHidetoshi Shimokawa { 16569339321dSHidetoshi Shimokawa int i; 16579339321dSHidetoshi Shimokawa 16589339321dSHidetoshi Shimokawa fwohci_reset(sc, dev); 16599339321dSHidetoshi Shimokawa /* XXX resume isochronus receive automatically. (how about TX?) */ 16609339321dSHidetoshi Shimokawa for(i = 0; i < sc->fc.nisodma; i ++) { 16619339321dSHidetoshi Shimokawa if((sc->ir[i].xferq.flag & FWXFERQ_RUNNING) != 0) { 16629339321dSHidetoshi Shimokawa device_printf(sc->fc.dev, 16639339321dSHidetoshi Shimokawa "resume iso receive ch: %d\n", i); 16649339321dSHidetoshi Shimokawa sc->ir[i].xferq.flag &= ~FWXFERQ_RUNNING; 16659339321dSHidetoshi Shimokawa sc->fc.irx_enable(&sc->fc, i); 16669339321dSHidetoshi Shimokawa } 16679339321dSHidetoshi Shimokawa } 16689339321dSHidetoshi Shimokawa 16699339321dSHidetoshi Shimokawa bus_generic_resume(dev); 16709339321dSHidetoshi Shimokawa sc->fc.ibr(&sc->fc); 16713c60ba66SKatsushi Kobayashi return 0; 16723c60ba66SKatsushi Kobayashi } 16733c60ba66SKatsushi Kobayashi 16743c60ba66SKatsushi Kobayashi #define ACK_ALL 16753c60ba66SKatsushi Kobayashi static void 1676783058faSHidetoshi Shimokawa fwohci_intr_body(struct fwohci_softc *sc, u_int32_t stat, int count) 16773c60ba66SKatsushi Kobayashi { 16783c60ba66SKatsushi Kobayashi u_int32_t irstat, itstat; 16793c60ba66SKatsushi Kobayashi u_int i; 16803c60ba66SKatsushi Kobayashi struct firewire_comm *fc = (struct firewire_comm *)sc; 16813c60ba66SKatsushi Kobayashi 16823c60ba66SKatsushi Kobayashi #ifdef OHCI_DEBUG 16833c60ba66SKatsushi Kobayashi if(stat & OREAD(sc, FWOHCI_INTMASK)) 16843c60ba66SKatsushi Kobayashi device_printf(fc->dev, "INTERRUPT < %s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s> 0x%08x, 0x%08x\n", 16853c60ba66SKatsushi Kobayashi stat & OHCI_INT_EN ? "DMA_EN ":"", 16863c60ba66SKatsushi Kobayashi stat & OHCI_INT_PHY_REG ? "PHY_REG ":"", 16873c60ba66SKatsushi Kobayashi stat & OHCI_INT_CYC_LONG ? "CYC_LONG ":"", 16883c60ba66SKatsushi Kobayashi stat & OHCI_INT_ERR ? "INT_ERR ":"", 16893c60ba66SKatsushi Kobayashi stat & OHCI_INT_CYC_ERR ? "CYC_ERR ":"", 16903c60ba66SKatsushi Kobayashi stat & OHCI_INT_CYC_LOST ? "CYC_LOST ":"", 16913c60ba66SKatsushi Kobayashi stat & OHCI_INT_CYC_64SECOND ? "CYC_64SECOND ":"", 16923c60ba66SKatsushi Kobayashi stat & OHCI_INT_CYC_START ? "CYC_START ":"", 16933c60ba66SKatsushi Kobayashi stat & OHCI_INT_PHY_INT ? "PHY_INT ":"", 16943c60ba66SKatsushi Kobayashi stat & OHCI_INT_PHY_BUS_R ? "BUS_RESET ":"", 16953c60ba66SKatsushi Kobayashi stat & OHCI_INT_PHY_SID ? "SID ":"", 16963c60ba66SKatsushi Kobayashi stat & OHCI_INT_LR_ERR ? "DMA_LR_ERR ":"", 16973c60ba66SKatsushi Kobayashi stat & OHCI_INT_PW_ERR ? "DMA_PW_ERR ":"", 16983c60ba66SKatsushi Kobayashi stat & OHCI_INT_DMA_IR ? "DMA_IR ":"", 16993c60ba66SKatsushi Kobayashi stat & OHCI_INT_DMA_IT ? "DMA_IT " :"", 17003c60ba66SKatsushi Kobayashi stat & OHCI_INT_DMA_PRRS ? "DMA_PRRS " :"", 17013c60ba66SKatsushi Kobayashi stat & OHCI_INT_DMA_PRRQ ? "DMA_PRRQ " :"", 17023c60ba66SKatsushi Kobayashi stat & OHCI_INT_DMA_ARRS ? "DMA_ARRS " :"", 17033c60ba66SKatsushi Kobayashi stat & OHCI_INT_DMA_ARRQ ? "DMA_ARRQ " :"", 17043c60ba66SKatsushi Kobayashi stat & OHCI_INT_DMA_ATRS ? "DMA_ATRS " :"", 17053c60ba66SKatsushi Kobayashi stat & OHCI_INT_DMA_ATRQ ? "DMA_ATRQ " :"", 17063c60ba66SKatsushi Kobayashi stat, OREAD(sc, FWOHCI_INTMASK) 17073c60ba66SKatsushi Kobayashi ); 17083c60ba66SKatsushi Kobayashi #endif 17093c60ba66SKatsushi Kobayashi /* Bus reset */ 17103c60ba66SKatsushi Kobayashi if(stat & OHCI_INT_PHY_BUS_R ){ 17113c60ba66SKatsushi Kobayashi device_printf(fc->dev, "BUS reset\n"); 17123c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTMASKCLR, OHCI_INT_CYC_LOST); 17133c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_LNKCTLCLR, OHCI_CNTL_CYCSRC); 17143c60ba66SKatsushi Kobayashi 17153c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_ATQCTLCLR, OHCI_CNTL_DMA_RUN); 17163c60ba66SKatsushi Kobayashi sc->atrq.xferq.flag &= ~FWXFERQ_RUNNING; 17173c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_ATSCTLCLR, OHCI_CNTL_DMA_RUN); 17183c60ba66SKatsushi Kobayashi sc->atrs.xferq.flag &= ~FWXFERQ_RUNNING; 17193c60ba66SKatsushi Kobayashi 17203c60ba66SKatsushi Kobayashi #if 0 17213c60ba66SKatsushi Kobayashi for( i = 0 ; i < fc->nisodma ; i ++ ){ 17223c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_IRCTLCLR(i), OHCI_CNTL_DMA_RUN); 17233c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_ITCTLCLR(i), OHCI_CNTL_DMA_RUN); 17243c60ba66SKatsushi Kobayashi } 17253c60ba66SKatsushi Kobayashi 17263c60ba66SKatsushi Kobayashi #endif 17273c60ba66SKatsushi Kobayashi fw_busreset(fc); 17283c60ba66SKatsushi Kobayashi 17293c60ba66SKatsushi Kobayashi /* XXX need to wait DMA to stop */ 17303c60ba66SKatsushi Kobayashi #ifndef ACK_ALL 17313c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_PHY_BUS_R); 17323c60ba66SKatsushi Kobayashi #endif 17333c60ba66SKatsushi Kobayashi #if 1 17343c60ba66SKatsushi Kobayashi /* pending all pre-bus_reset packets */ 17353c60ba66SKatsushi Kobayashi fwohci_txd(sc, &sc->atrq); 17363c60ba66SKatsushi Kobayashi fwohci_txd(sc, &sc->atrs); 1737783058faSHidetoshi Shimokawa fwohci_arcv(sc, &sc->arrs, -1); 1738783058faSHidetoshi Shimokawa fwohci_arcv(sc, &sc->arrq, -1); 17393c60ba66SKatsushi Kobayashi #endif 17403c60ba66SKatsushi Kobayashi 17413c60ba66SKatsushi Kobayashi 17423c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_AREQHI, 1 << 31); 17433c60ba66SKatsushi Kobayashi /* XXX insecure ?? */ 17443c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_PREQHI, 0x7fffffff); 17453c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_PREQLO, 0xffffffff); 17463c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_PREQUPPER, 0x10000); 17473c60ba66SKatsushi Kobayashi 17483c60ba66SKatsushi Kobayashi } 17493c60ba66SKatsushi Kobayashi if((stat & OHCI_INT_DMA_IR )){ 17503c60ba66SKatsushi Kobayashi #ifndef ACK_ALL 17513c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_DMA_IR); 17523c60ba66SKatsushi Kobayashi #endif 17533c60ba66SKatsushi Kobayashi irstat = OREAD(sc, OHCI_IR_STAT); 17544ed65ce9SHidetoshi Shimokawa OWRITE(sc, OHCI_IR_STATCLR, irstat); 17553c60ba66SKatsushi Kobayashi for(i = 0; i < fc->nisodma ; i++){ 17563c60ba66SKatsushi Kobayashi if((irstat & (1 << i)) != 0){ 17573c60ba66SKatsushi Kobayashi if(sc->ir[i].xferq.flag & FWXFERQ_PACKET){ 1758783058faSHidetoshi Shimokawa fwohci_ircv(sc, &sc->ir[i], count); 17593c60ba66SKatsushi Kobayashi }else{ 17603c60ba66SKatsushi Kobayashi fwohci_rbuf_update(sc, i); 17613c60ba66SKatsushi Kobayashi } 17623c60ba66SKatsushi Kobayashi } 17633c60ba66SKatsushi Kobayashi } 17643c60ba66SKatsushi Kobayashi } 17653c60ba66SKatsushi Kobayashi if((stat & OHCI_INT_DMA_IT )){ 17663c60ba66SKatsushi Kobayashi #ifndef ACK_ALL 17673c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_DMA_IT); 17683c60ba66SKatsushi Kobayashi #endif 17693c60ba66SKatsushi Kobayashi itstat = OREAD(sc, OHCI_IT_STAT); 17704ed65ce9SHidetoshi Shimokawa OWRITE(sc, OHCI_IT_STATCLR, itstat); 17713c60ba66SKatsushi Kobayashi for(i = 0; i < fc->nisodma ; i++){ 17723c60ba66SKatsushi Kobayashi if((itstat & (1 << i)) != 0){ 17733c60ba66SKatsushi Kobayashi fwohci_tbuf_update(sc, i); 17743c60ba66SKatsushi Kobayashi } 17753c60ba66SKatsushi Kobayashi } 17763c60ba66SKatsushi Kobayashi } 17773c60ba66SKatsushi Kobayashi if((stat & OHCI_INT_DMA_PRRS )){ 17783c60ba66SKatsushi Kobayashi #ifndef ACK_ALL 17793c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_DMA_PRRS); 17803c60ba66SKatsushi Kobayashi #endif 17813c60ba66SKatsushi Kobayashi #if 0 17823c60ba66SKatsushi Kobayashi dump_dma(sc, ARRS_CH); 17833c60ba66SKatsushi Kobayashi dump_db(sc, ARRS_CH); 17843c60ba66SKatsushi Kobayashi #endif 1785783058faSHidetoshi Shimokawa fwohci_arcv(sc, &sc->arrs, count); 17863c60ba66SKatsushi Kobayashi } 17873c60ba66SKatsushi Kobayashi if((stat & OHCI_INT_DMA_PRRQ )){ 17883c60ba66SKatsushi Kobayashi #ifndef ACK_ALL 17893c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_DMA_PRRQ); 17903c60ba66SKatsushi Kobayashi #endif 17913c60ba66SKatsushi Kobayashi #if 0 17923c60ba66SKatsushi Kobayashi dump_dma(sc, ARRQ_CH); 17933c60ba66SKatsushi Kobayashi dump_db(sc, ARRQ_CH); 17943c60ba66SKatsushi Kobayashi #endif 1795783058faSHidetoshi Shimokawa fwohci_arcv(sc, &sc->arrq, count); 17963c60ba66SKatsushi Kobayashi } 17973c60ba66SKatsushi Kobayashi if(stat & OHCI_INT_PHY_SID){ 17983c60ba66SKatsushi Kobayashi caddr_t buf; 17993c60ba66SKatsushi Kobayashi int plen; 18003c60ba66SKatsushi Kobayashi 18013c60ba66SKatsushi Kobayashi #ifndef ACK_ALL 18023c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_PHY_SID); 18033c60ba66SKatsushi Kobayashi #endif 18043c60ba66SKatsushi Kobayashi /* 18053c60ba66SKatsushi Kobayashi ** Checking whether the node is root or not. If root, turn on 18063c60ba66SKatsushi Kobayashi ** cycle master. 18073c60ba66SKatsushi Kobayashi */ 18083c60ba66SKatsushi Kobayashi device_printf(fc->dev, "node_id = 0x%08x, ", OREAD(sc, FWOHCI_NODEID)); 18093c60ba66SKatsushi Kobayashi if(!(OREAD(sc, FWOHCI_NODEID) & OHCI_NODE_VALID)){ 18103c60ba66SKatsushi Kobayashi printf("Bus reset failure\n"); 18113c60ba66SKatsushi Kobayashi goto sidout; 18123c60ba66SKatsushi Kobayashi } 18133c60ba66SKatsushi Kobayashi if( OREAD(sc, FWOHCI_NODEID) & OHCI_NODE_ROOT ){ 18143c60ba66SKatsushi Kobayashi printf("CYCLEMASTER mode\n"); 18153c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_LNKCTL, 18163c60ba66SKatsushi Kobayashi OHCI_CNTL_CYCMTR | OHCI_CNTL_CYCTIMER); 18173c60ba66SKatsushi Kobayashi }else{ 18183c60ba66SKatsushi Kobayashi printf("non CYCLEMASTER mode\n"); 18193c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_LNKCTLCLR, OHCI_CNTL_CYCMTR); 18203c60ba66SKatsushi Kobayashi OWRITE(sc, OHCI_LNKCTL, OHCI_CNTL_CYCTIMER); 18213c60ba66SKatsushi Kobayashi } 18223c60ba66SKatsushi Kobayashi fc->nodeid = OREAD(sc, FWOHCI_NODEID) & 0x3f; 18233c60ba66SKatsushi Kobayashi 18243c60ba66SKatsushi Kobayashi plen = OREAD(sc, OHCI_SID_CNT) & OHCI_SID_CNT_MASK; 18253c60ba66SKatsushi Kobayashi plen -= 4; /* chop control info */ 1826e2ad5d6eSHidetoshi Shimokawa buf = malloc(OHCI_SIDSIZE, M_DEVBUF, M_NOWAIT); 18273c60ba66SKatsushi Kobayashi if(buf == NULL) goto sidout; 1828d0fd7bc6SHidetoshi Shimokawa bcopy((void *)(uintptr_t)(volatile void *)(fc->sid_buf + 1), 18293c60ba66SKatsushi Kobayashi buf, plen); 18303c60ba66SKatsushi Kobayashi fw_sidrcv(fc, buf, plen, 0); 18313c60ba66SKatsushi Kobayashi } 18323c60ba66SKatsushi Kobayashi sidout: 18333c60ba66SKatsushi Kobayashi if((stat & OHCI_INT_DMA_ATRQ )){ 18343c60ba66SKatsushi Kobayashi #ifndef ACK_ALL 18353c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_DMA_ATRQ); 18363c60ba66SKatsushi Kobayashi #endif 18373c60ba66SKatsushi Kobayashi fwohci_txd(sc, &(sc->atrq)); 18383c60ba66SKatsushi Kobayashi } 18393c60ba66SKatsushi Kobayashi if((stat & OHCI_INT_DMA_ATRS )){ 18403c60ba66SKatsushi Kobayashi #ifndef ACK_ALL 18413c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_DMA_ATRS); 18423c60ba66SKatsushi Kobayashi #endif 18433c60ba66SKatsushi Kobayashi fwohci_txd(sc, &(sc->atrs)); 18443c60ba66SKatsushi Kobayashi } 18453c60ba66SKatsushi Kobayashi if((stat & OHCI_INT_PW_ERR )){ 18463c60ba66SKatsushi Kobayashi #ifndef ACK_ALL 18473c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_PW_ERR); 18483c60ba66SKatsushi Kobayashi #endif 18493c60ba66SKatsushi Kobayashi device_printf(fc->dev, "posted write error\n"); 18503c60ba66SKatsushi Kobayashi } 18513c60ba66SKatsushi Kobayashi if((stat & OHCI_INT_ERR )){ 18523c60ba66SKatsushi Kobayashi #ifndef ACK_ALL 18533c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_ERR); 18543c60ba66SKatsushi Kobayashi #endif 18553c60ba66SKatsushi Kobayashi device_printf(fc->dev, "unrecoverable error\n"); 18563c60ba66SKatsushi Kobayashi } 18573c60ba66SKatsushi Kobayashi if((stat & OHCI_INT_PHY_INT)) { 18583c60ba66SKatsushi Kobayashi #ifndef ACK_ALL 18593c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_PHY_INT); 18603c60ba66SKatsushi Kobayashi #endif 18613c60ba66SKatsushi Kobayashi device_printf(fc->dev, "phy int\n"); 18623c60ba66SKatsushi Kobayashi } 18633c60ba66SKatsushi Kobayashi 18643c60ba66SKatsushi Kobayashi return; 18653c60ba66SKatsushi Kobayashi } 18663c60ba66SKatsushi Kobayashi 18673c60ba66SKatsushi Kobayashi void 18683c60ba66SKatsushi Kobayashi fwohci_intr(void *arg) 18693c60ba66SKatsushi Kobayashi { 18703c60ba66SKatsushi Kobayashi struct fwohci_softc *sc = (struct fwohci_softc *)arg; 18713c60ba66SKatsushi Kobayashi u_int32_t stat; 18723c60ba66SKatsushi Kobayashi 18733c60ba66SKatsushi Kobayashi if (!(sc->intmask & OHCI_INT_EN)) { 18743c60ba66SKatsushi Kobayashi /* polling mode */ 18753c60ba66SKatsushi Kobayashi return; 18763c60ba66SKatsushi Kobayashi } 18773c60ba66SKatsushi Kobayashi 18783c60ba66SKatsushi Kobayashi while ((stat = OREAD(sc, FWOHCI_INTSTAT)) != 0) { 18793c60ba66SKatsushi Kobayashi if (stat == 0xffffffff) { 18803c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, 18813c60ba66SKatsushi Kobayashi "device physically ejected?\n"); 18823c60ba66SKatsushi Kobayashi return; 18833c60ba66SKatsushi Kobayashi } 18843c60ba66SKatsushi Kobayashi #ifdef ACK_ALL 18853c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTSTATCLR, stat); 18863c60ba66SKatsushi Kobayashi #endif 1887783058faSHidetoshi Shimokawa fwohci_intr_body(sc, stat, -1); 18883c60ba66SKatsushi Kobayashi } 18893c60ba66SKatsushi Kobayashi } 18903c60ba66SKatsushi Kobayashi 18913c60ba66SKatsushi Kobayashi static void 18923c60ba66SKatsushi Kobayashi fwohci_poll(struct firewire_comm *fc, int quick, int count) 18933c60ba66SKatsushi Kobayashi { 18943c60ba66SKatsushi Kobayashi int s; 18953c60ba66SKatsushi Kobayashi u_int32_t stat; 18963c60ba66SKatsushi Kobayashi struct fwohci_softc *sc; 18973c60ba66SKatsushi Kobayashi 18983c60ba66SKatsushi Kobayashi 18993c60ba66SKatsushi Kobayashi sc = (struct fwohci_softc *)fc; 19003c60ba66SKatsushi Kobayashi stat = OHCI_INT_DMA_IR | OHCI_INT_DMA_IT | 19013c60ba66SKatsushi Kobayashi OHCI_INT_DMA_PRRS | OHCI_INT_DMA_PRRQ | 19023c60ba66SKatsushi Kobayashi OHCI_INT_DMA_ATRQ | OHCI_INT_DMA_ATRS; 19033c60ba66SKatsushi Kobayashi #if 0 19043c60ba66SKatsushi Kobayashi if (!quick) { 19053c60ba66SKatsushi Kobayashi #else 19063c60ba66SKatsushi Kobayashi if (1) { 19073c60ba66SKatsushi Kobayashi #endif 19083c60ba66SKatsushi Kobayashi stat = OREAD(sc, FWOHCI_INTSTAT); 19093c60ba66SKatsushi Kobayashi if (stat == 0) 19103c60ba66SKatsushi Kobayashi return; 19113c60ba66SKatsushi Kobayashi if (stat == 0xffffffff) { 19123c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, 19133c60ba66SKatsushi Kobayashi "device physically ejected?\n"); 19143c60ba66SKatsushi Kobayashi return; 19153c60ba66SKatsushi Kobayashi } 19163c60ba66SKatsushi Kobayashi #ifdef ACK_ALL 19173c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTSTATCLR, stat); 19183c60ba66SKatsushi Kobayashi #endif 19193c60ba66SKatsushi Kobayashi } 19203c60ba66SKatsushi Kobayashi s = splfw(); 1921783058faSHidetoshi Shimokawa fwohci_intr_body(sc, stat, count); 19223c60ba66SKatsushi Kobayashi splx(s); 19233c60ba66SKatsushi Kobayashi } 19243c60ba66SKatsushi Kobayashi 19253c60ba66SKatsushi Kobayashi static void 19263c60ba66SKatsushi Kobayashi fwohci_set_intr(struct firewire_comm *fc, int enable) 19273c60ba66SKatsushi Kobayashi { 19283c60ba66SKatsushi Kobayashi struct fwohci_softc *sc; 19293c60ba66SKatsushi Kobayashi 19303c60ba66SKatsushi Kobayashi sc = (struct fwohci_softc *)fc; 193117c3d42cSHidetoshi Shimokawa if (bootverbose) 19329339321dSHidetoshi Shimokawa device_printf(sc->fc.dev, "fwohci_set_intr: %d\n", enable); 19333c60ba66SKatsushi Kobayashi if (enable) { 19343c60ba66SKatsushi Kobayashi sc->intmask |= OHCI_INT_EN; 19353c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTMASK, OHCI_INT_EN); 19363c60ba66SKatsushi Kobayashi } else { 19373c60ba66SKatsushi Kobayashi sc->intmask &= ~OHCI_INT_EN; 19383c60ba66SKatsushi Kobayashi OWRITE(sc, FWOHCI_INTMASKCLR, OHCI_INT_EN); 19393c60ba66SKatsushi Kobayashi } 19403c60ba66SKatsushi Kobayashi } 19413c60ba66SKatsushi Kobayashi 1942c572b810SHidetoshi Shimokawa static void 1943c572b810SHidetoshi Shimokawa fwohci_tbuf_update(struct fwohci_softc *sc, int dmach) 19443c60ba66SKatsushi Kobayashi { 19453c60ba66SKatsushi Kobayashi int stat; 19463c60ba66SKatsushi Kobayashi struct firewire_comm *fc = &sc->fc; 19473c60ba66SKatsushi Kobayashi struct fw_pkt *fp; 19483c60ba66SKatsushi Kobayashi struct fwohci_dbch *dbch; 19493c60ba66SKatsushi Kobayashi struct fwohcidb_tr *db_tr; 19503c60ba66SKatsushi Kobayashi 19513c60ba66SKatsushi Kobayashi dbch = &sc->it[dmach]; 19520aaa9a23SHidetoshi Shimokawa #if 0 /* XXX OHCI interrupt before the last packet is really on the wire */ 19533c60ba66SKatsushi Kobayashi if((dbch->xferq.flag & FWXFERQ_DV) && (dbch->xferq.stdma2 != NULL)){ 19543c60ba66SKatsushi Kobayashi db_tr = (struct fwohcidb_tr *)dbch->xferq.stdma2->start; 19553c60ba66SKatsushi Kobayashi /* 19563c60ba66SKatsushi Kobayashi * Overwrite highest significant 4 bits timestamp information 19573c60ba66SKatsushi Kobayashi */ 19583c60ba66SKatsushi Kobayashi fp = (struct fw_pkt *)db_tr->buf; 19590aaa9a23SHidetoshi Shimokawa fp->mode.ld[2] &= htonl(0xffff0fff); 19600aaa9a23SHidetoshi Shimokawa fp->mode.ld[2] |= htonl((fc->cyctimer(fc) + 0x4000) & 0xf000); 19613c60ba66SKatsushi Kobayashi } 19620aaa9a23SHidetoshi Shimokawa #endif 19637643dc18SHidetoshi Shimokawa /* 19647643dc18SHidetoshi Shimokawa * XXX interrupt could be missed. 19657643dc18SHidetoshi Shimokawa * We have to check more than one buffer/chunk 19667643dc18SHidetoshi Shimokawa */ 19677643dc18SHidetoshi Shimokawa if (firewire_debug && dbch->xferq.stdma2 != NULL) { 19687643dc18SHidetoshi Shimokawa db_tr = (struct fwohcidb_tr *)dbch->xferq.stdma2->end; 19697643dc18SHidetoshi Shimokawa stat = db_tr->db[2].db.desc.status; 19707643dc18SHidetoshi Shimokawa if (stat) 19717643dc18SHidetoshi Shimokawa printf("XXX stdma2 already done stat:0x%x\n", stat); 19727643dc18SHidetoshi Shimokawa } 19737643dc18SHidetoshi Shimokawa 19743c60ba66SKatsushi Kobayashi stat = OREAD(sc, OHCI_ITCTL(dmach)) & 0x1f; 19753c60ba66SKatsushi Kobayashi switch(stat){ 19763c60ba66SKatsushi Kobayashi case FWOHCIEV_ACKCOMPL: 19770aaa9a23SHidetoshi Shimokawa #if 1 19780aaa9a23SHidetoshi Shimokawa if (dbch->xferq.flag & FWXFERQ_DV) { 19790aaa9a23SHidetoshi Shimokawa struct ciphdr *ciph; 19800aaa9a23SHidetoshi Shimokawa int timer, timestamp, cycl, diff; 19810aaa9a23SHidetoshi Shimokawa static int last_timer=0; 19820aaa9a23SHidetoshi Shimokawa 19830aaa9a23SHidetoshi Shimokawa timer = (fc->cyctimer(fc) >> 12) & 0xffff; 19840aaa9a23SHidetoshi Shimokawa db_tr = (struct fwohcidb_tr *)dbch->xferq.stdma->start; 19850aaa9a23SHidetoshi Shimokawa fp = (struct fw_pkt *)db_tr->buf; 19860aaa9a23SHidetoshi Shimokawa ciph = (struct ciphdr *) &fp->mode.ld[1]; 19870aaa9a23SHidetoshi Shimokawa timestamp = db_tr->db[2].db.desc.count & 0xffff; 19880aaa9a23SHidetoshi Shimokawa cycl = ntohs(ciph->fdf.dv.cyc) >> 12; 198997ae6c1fSHidetoshi Shimokawa diff = cycl - (timestamp & 0xf) - CYCLE_OFFSET; 19900aaa9a23SHidetoshi Shimokawa if (diff < 0) 19910aaa9a23SHidetoshi Shimokawa diff += 16; 19920aaa9a23SHidetoshi Shimokawa if (diff > 8) 19930aaa9a23SHidetoshi Shimokawa diff -= 16; 19944ed65ce9SHidetoshi Shimokawa if (firewire_debug || diff != 0) 19950aaa9a23SHidetoshi Shimokawa printf("dbc: %3d timer: 0x%04x packet: 0x%04x" 19960aaa9a23SHidetoshi Shimokawa " cyc: 0x%x diff: %+1d\n", 19970aaa9a23SHidetoshi Shimokawa ciph->dbc, last_timer, timestamp, cycl, diff); 19980aaa9a23SHidetoshi Shimokawa last_timer = timer; 19990aaa9a23SHidetoshi Shimokawa /* XXX adjust dbch->xferq.dvoffset if diff != 0 or 1 */ 20000aaa9a23SHidetoshi Shimokawa } 20010aaa9a23SHidetoshi Shimokawa #endif 20023c60ba66SKatsushi Kobayashi fw_tbuf_update(fc, dmach, 1); 20033c60ba66SKatsushi Kobayashi break; 20043c60ba66SKatsushi Kobayashi default: 20050aaa9a23SHidetoshi Shimokawa device_printf(fc->dev, "Isochronous transmit err %02x\n", stat); 20063c60ba66SKatsushi Kobayashi fw_tbuf_update(fc, dmach, 0); 20073c60ba66SKatsushi Kobayashi break; 20083c60ba66SKatsushi Kobayashi } 20090aaa9a23SHidetoshi Shimokawa fwohci_itxbuf_enable(fc, dmach); 20103c60ba66SKatsushi Kobayashi } 2011c572b810SHidetoshi Shimokawa 2012c572b810SHidetoshi Shimokawa static void 2013c572b810SHidetoshi Shimokawa fwohci_rbuf_update(struct fwohci_softc *sc, int dmach) 20143c60ba66SKatsushi Kobayashi { 20150aaa9a23SHidetoshi Shimokawa struct firewire_comm *fc = &sc->fc; 20163c60ba66SKatsushi Kobayashi int stat; 20170aaa9a23SHidetoshi Shimokawa 20183c60ba66SKatsushi Kobayashi stat = OREAD(sc, OHCI_IRCTL(dmach)) & 0x1f; 20193c60ba66SKatsushi Kobayashi switch(stat){ 20203c60ba66SKatsushi Kobayashi case FWOHCIEV_ACKCOMPL: 20210aaa9a23SHidetoshi Shimokawa fw_rbuf_update(fc, dmach, 1); 20220aaa9a23SHidetoshi Shimokawa wakeup(fc->ir[dmach]); 20230aaa9a23SHidetoshi Shimokawa fwohci_irx_enable(fc, dmach); 20243c60ba66SKatsushi Kobayashi break; 20253c60ba66SKatsushi Kobayashi default: 20260aaa9a23SHidetoshi Shimokawa device_printf(fc->dev, "Isochronous receive err %02x\n", 20270aaa9a23SHidetoshi Shimokawa stat); 20283c60ba66SKatsushi Kobayashi break; 20293c60ba66SKatsushi Kobayashi } 20303c60ba66SKatsushi Kobayashi } 2031c572b810SHidetoshi Shimokawa 2032c572b810SHidetoshi Shimokawa void 2033c572b810SHidetoshi Shimokawa dump_dma(struct fwohci_softc *sc, u_int32_t ch) 2034c572b810SHidetoshi Shimokawa { 20353c60ba66SKatsushi Kobayashi u_int32_t off, cntl, stat, cmd, match; 20363c60ba66SKatsushi Kobayashi 20373c60ba66SKatsushi Kobayashi if(ch == 0){ 20383c60ba66SKatsushi Kobayashi off = OHCI_ATQOFF; 20393c60ba66SKatsushi Kobayashi }else if(ch == 1){ 20403c60ba66SKatsushi Kobayashi off = OHCI_ATSOFF; 20413c60ba66SKatsushi Kobayashi }else if(ch == 2){ 20423c60ba66SKatsushi Kobayashi off = OHCI_ARQOFF; 20433c60ba66SKatsushi Kobayashi }else if(ch == 3){ 20443c60ba66SKatsushi Kobayashi off = OHCI_ARSOFF; 20453c60ba66SKatsushi Kobayashi }else if(ch < IRX_CH){ 20463c60ba66SKatsushi Kobayashi off = OHCI_ITCTL(ch - ITX_CH); 20473c60ba66SKatsushi Kobayashi }else{ 20483c60ba66SKatsushi Kobayashi off = OHCI_IRCTL(ch - IRX_CH); 20493c60ba66SKatsushi Kobayashi } 20503c60ba66SKatsushi Kobayashi cntl = stat = OREAD(sc, off); 20513c60ba66SKatsushi Kobayashi cmd = OREAD(sc, off + 0xc); 20523c60ba66SKatsushi Kobayashi match = OREAD(sc, off + 0x10); 20533c60ba66SKatsushi Kobayashi 20543c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, "dma ch %1x:dma regs 0x%08x 0x%08x 0x%08x 0x%08x \n", 20553c60ba66SKatsushi Kobayashi ch, 20563c60ba66SKatsushi Kobayashi cntl, 20573c60ba66SKatsushi Kobayashi stat, 20583c60ba66SKatsushi Kobayashi cmd, 20593c60ba66SKatsushi Kobayashi match); 20603c60ba66SKatsushi Kobayashi stat &= 0xffff ; 20613c60ba66SKatsushi Kobayashi if(stat & 0xff00){ 20623c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, "dma %d ch:%s%s%s%s%s%s %s(%x)\n", 20633c60ba66SKatsushi Kobayashi ch, 20643c60ba66SKatsushi Kobayashi stat & OHCI_CNTL_DMA_RUN ? "RUN," : "", 20653c60ba66SKatsushi Kobayashi stat & OHCI_CNTL_DMA_WAKE ? "WAKE," : "", 20663c60ba66SKatsushi Kobayashi stat & OHCI_CNTL_DMA_DEAD ? "DEAD," : "", 20673c60ba66SKatsushi Kobayashi stat & OHCI_CNTL_DMA_ACTIVE ? "ACTIVE," : "", 20683c60ba66SKatsushi Kobayashi stat & OHCI_CNTL_DMA_BT ? "BRANCH," : "", 20693c60ba66SKatsushi Kobayashi stat & OHCI_CNTL_DMA_BAD ? "BADDMA," : "", 20703c60ba66SKatsushi Kobayashi fwohcicode[stat & 0x1f], 20713c60ba66SKatsushi Kobayashi stat & 0x1f 20723c60ba66SKatsushi Kobayashi ); 20733c60ba66SKatsushi Kobayashi }else{ 20743c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, "dma %d ch: Nostat\n", ch); 20753c60ba66SKatsushi Kobayashi } 20763c60ba66SKatsushi Kobayashi } 2077c572b810SHidetoshi Shimokawa 2078c572b810SHidetoshi Shimokawa void 2079c572b810SHidetoshi Shimokawa dump_db(struct fwohci_softc *sc, u_int32_t ch) 2080c572b810SHidetoshi Shimokawa { 20813c60ba66SKatsushi Kobayashi struct fwohci_dbch *dbch; 20823c60ba66SKatsushi Kobayashi struct fwohcidb_tr *cp = NULL, *pp, *np; 20833c60ba66SKatsushi Kobayashi volatile struct fwohcidb *curr = NULL, *prev, *next = NULL; 20843c60ba66SKatsushi Kobayashi int idb, jdb; 20853c60ba66SKatsushi Kobayashi u_int32_t cmd, off; 20863c60ba66SKatsushi Kobayashi if(ch == 0){ 20873c60ba66SKatsushi Kobayashi off = OHCI_ATQOFF; 20883c60ba66SKatsushi Kobayashi dbch = &sc->atrq; 20893c60ba66SKatsushi Kobayashi }else if(ch == 1){ 20903c60ba66SKatsushi Kobayashi off = OHCI_ATSOFF; 20913c60ba66SKatsushi Kobayashi dbch = &sc->atrs; 20923c60ba66SKatsushi Kobayashi }else if(ch == 2){ 20933c60ba66SKatsushi Kobayashi off = OHCI_ARQOFF; 20943c60ba66SKatsushi Kobayashi dbch = &sc->arrq; 20953c60ba66SKatsushi Kobayashi }else if(ch == 3){ 20963c60ba66SKatsushi Kobayashi off = OHCI_ARSOFF; 20973c60ba66SKatsushi Kobayashi dbch = &sc->arrs; 20983c60ba66SKatsushi Kobayashi }else if(ch < IRX_CH){ 20993c60ba66SKatsushi Kobayashi off = OHCI_ITCTL(ch - ITX_CH); 21003c60ba66SKatsushi Kobayashi dbch = &sc->it[ch - ITX_CH]; 21013c60ba66SKatsushi Kobayashi }else { 21023c60ba66SKatsushi Kobayashi off = OHCI_IRCTL(ch - IRX_CH); 21033c60ba66SKatsushi Kobayashi dbch = &sc->ir[ch - IRX_CH]; 21043c60ba66SKatsushi Kobayashi } 21053c60ba66SKatsushi Kobayashi cmd = OREAD(sc, off + 0xc); 21063c60ba66SKatsushi Kobayashi 21073c60ba66SKatsushi Kobayashi if( dbch->ndb == 0 ){ 21083c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, "No DB is attached ch=%d\n", ch); 21093c60ba66SKatsushi Kobayashi return; 21103c60ba66SKatsushi Kobayashi } 21113c60ba66SKatsushi Kobayashi pp = dbch->top; 21123c60ba66SKatsushi Kobayashi prev = pp->db; 21133c60ba66SKatsushi Kobayashi for(idb = 0 ; idb < dbch->ndb ; idb ++ ){ 21143c60ba66SKatsushi Kobayashi if(pp == NULL){ 21153c60ba66SKatsushi Kobayashi curr = NULL; 21163c60ba66SKatsushi Kobayashi goto outdb; 21173c60ba66SKatsushi Kobayashi } 21183c60ba66SKatsushi Kobayashi cp = STAILQ_NEXT(pp, link); 21193c60ba66SKatsushi Kobayashi if(cp == NULL){ 21203c60ba66SKatsushi Kobayashi curr = NULL; 21213c60ba66SKatsushi Kobayashi goto outdb; 21223c60ba66SKatsushi Kobayashi } 21233c60ba66SKatsushi Kobayashi np = STAILQ_NEXT(cp, link); 21243c60ba66SKatsushi Kobayashi if(cp == NULL) break; 21253c60ba66SKatsushi Kobayashi for(jdb = 0 ; jdb < dbch->ndesc ; jdb ++ ){ 21263c60ba66SKatsushi Kobayashi if((cmd & 0xfffffff0) 21273c60ba66SKatsushi Kobayashi == vtophys(&(cp->db[jdb]))){ 21283c60ba66SKatsushi Kobayashi curr = cp->db; 21293c60ba66SKatsushi Kobayashi if(np != NULL){ 21303c60ba66SKatsushi Kobayashi next = np->db; 21313c60ba66SKatsushi Kobayashi }else{ 21323c60ba66SKatsushi Kobayashi next = NULL; 21333c60ba66SKatsushi Kobayashi } 21343c60ba66SKatsushi Kobayashi goto outdb; 21353c60ba66SKatsushi Kobayashi } 21363c60ba66SKatsushi Kobayashi } 21373c60ba66SKatsushi Kobayashi pp = STAILQ_NEXT(pp, link); 21383c60ba66SKatsushi Kobayashi prev = pp->db; 21393c60ba66SKatsushi Kobayashi } 21403c60ba66SKatsushi Kobayashi outdb: 21413c60ba66SKatsushi Kobayashi if( curr != NULL){ 21423c60ba66SKatsushi Kobayashi printf("Prev DB %d\n", ch); 21433c60ba66SKatsushi Kobayashi print_db(prev, ch, dbch->ndesc); 21443c60ba66SKatsushi Kobayashi printf("Current DB %d\n", ch); 21453c60ba66SKatsushi Kobayashi print_db(curr, ch, dbch->ndesc); 21463c60ba66SKatsushi Kobayashi printf("Next DB %d\n", ch); 21473c60ba66SKatsushi Kobayashi print_db(next, ch, dbch->ndesc); 21483c60ba66SKatsushi Kobayashi }else{ 21493c60ba66SKatsushi Kobayashi printf("dbdump err ch = %d cmd = 0x%08x\n", ch, cmd); 21503c60ba66SKatsushi Kobayashi } 21513c60ba66SKatsushi Kobayashi return; 21523c60ba66SKatsushi Kobayashi } 2153c572b810SHidetoshi Shimokawa 2154c572b810SHidetoshi Shimokawa void 2155c572b810SHidetoshi Shimokawa print_db(volatile struct fwohcidb *db, u_int32_t ch, u_int32_t max) 2156c572b810SHidetoshi Shimokawa { 21573c60ba66SKatsushi Kobayashi fwohcireg_t stat; 21583c60ba66SKatsushi Kobayashi int i, key; 21593c60ba66SKatsushi Kobayashi 21603c60ba66SKatsushi Kobayashi if(db == NULL){ 21613c60ba66SKatsushi Kobayashi printf("No Descriptor is found\n"); 21623c60ba66SKatsushi Kobayashi return; 21633c60ba66SKatsushi Kobayashi } 21643c60ba66SKatsushi Kobayashi 21653c60ba66SKatsushi Kobayashi printf("ch = %d\n%8s %s %s %s %s %4s %8s %8s %4s:%4s\n", 21663c60ba66SKatsushi Kobayashi ch, 21673c60ba66SKatsushi Kobayashi "Current", 21683c60ba66SKatsushi Kobayashi "OP ", 21693c60ba66SKatsushi Kobayashi "KEY", 21703c60ba66SKatsushi Kobayashi "INT", 21713c60ba66SKatsushi Kobayashi "BR ", 21723c60ba66SKatsushi Kobayashi "len", 21733c60ba66SKatsushi Kobayashi "Addr", 21743c60ba66SKatsushi Kobayashi "Depend", 21753c60ba66SKatsushi Kobayashi "Stat", 21763c60ba66SKatsushi Kobayashi "Cnt"); 21773c60ba66SKatsushi Kobayashi for( i = 0 ; i <= max ; i ++){ 21783c60ba66SKatsushi Kobayashi key = db[i].db.desc.cmd & OHCI_KEY_MASK; 2179a4239576SHidetoshi Shimokawa #if __FreeBSD_version >= 500000 218070ce30b5SHidetoshi Shimokawa printf("%08tx %s %s %s %s %5d %08x %08x %04x:%04x", 2181a4239576SHidetoshi Shimokawa #else 2182a4239576SHidetoshi Shimokawa printf("%08x %s %s %s %s %5d %08x %08x %04x:%04x", 2183a4239576SHidetoshi Shimokawa #endif 21843c60ba66SKatsushi Kobayashi vtophys(&db[i]), 21853c60ba66SKatsushi Kobayashi dbcode[(db[i].db.desc.cmd >> 28) & 0xf], 21863c60ba66SKatsushi Kobayashi dbkey[(db[i].db.desc.cmd >> 24) & 0x7], 21873c60ba66SKatsushi Kobayashi dbcond[(db[i].db.desc.cmd >> 20) & 0x3], 21883c60ba66SKatsushi Kobayashi dbcond[(db[i].db.desc.cmd >> 18) & 0x3], 21893c60ba66SKatsushi Kobayashi db[i].db.desc.cmd & 0xffff, 21903c60ba66SKatsushi Kobayashi db[i].db.desc.addr, 21913c60ba66SKatsushi Kobayashi db[i].db.desc.depend, 21923c60ba66SKatsushi Kobayashi db[i].db.desc.status, 21933c60ba66SKatsushi Kobayashi db[i].db.desc.count); 21943c60ba66SKatsushi Kobayashi stat = db[i].db.desc.status; 21953c60ba66SKatsushi Kobayashi if(stat & 0xff00){ 21963c60ba66SKatsushi Kobayashi printf(" %s%s%s%s%s%s %s(%x)\n", 21973c60ba66SKatsushi Kobayashi stat & OHCI_CNTL_DMA_RUN ? "RUN," : "", 21983c60ba66SKatsushi Kobayashi stat & OHCI_CNTL_DMA_WAKE ? "WAKE," : "", 21993c60ba66SKatsushi Kobayashi stat & OHCI_CNTL_DMA_DEAD ? "DEAD," : "", 22003c60ba66SKatsushi Kobayashi stat & OHCI_CNTL_DMA_ACTIVE ? "ACTIVE," : "", 22013c60ba66SKatsushi Kobayashi stat & OHCI_CNTL_DMA_BT ? "BRANCH," : "", 22023c60ba66SKatsushi Kobayashi stat & OHCI_CNTL_DMA_BAD ? "BADDMA," : "", 22033c60ba66SKatsushi Kobayashi fwohcicode[stat & 0x1f], 22043c60ba66SKatsushi Kobayashi stat & 0x1f 22053c60ba66SKatsushi Kobayashi ); 22063c60ba66SKatsushi Kobayashi }else{ 22073c60ba66SKatsushi Kobayashi printf(" Nostat\n"); 22083c60ba66SKatsushi Kobayashi } 22093c60ba66SKatsushi Kobayashi if(key == OHCI_KEY_ST2 ){ 22103c60ba66SKatsushi Kobayashi printf("0x%08x 0x%08x 0x%08x 0x%08x\n", 22113c60ba66SKatsushi Kobayashi db[i+1].db.immed[0], 22123c60ba66SKatsushi Kobayashi db[i+1].db.immed[1], 22133c60ba66SKatsushi Kobayashi db[i+1].db.immed[2], 22143c60ba66SKatsushi Kobayashi db[i+1].db.immed[3]); 22153c60ba66SKatsushi Kobayashi } 22163c60ba66SKatsushi Kobayashi if(key == OHCI_KEY_DEVICE){ 22173c60ba66SKatsushi Kobayashi return; 22183c60ba66SKatsushi Kobayashi } 22193c60ba66SKatsushi Kobayashi if((db[i].db.desc.cmd & OHCI_BRANCH_MASK) 22203c60ba66SKatsushi Kobayashi == OHCI_BRANCH_ALWAYS){ 22213c60ba66SKatsushi Kobayashi return; 22223c60ba66SKatsushi Kobayashi } 22233c60ba66SKatsushi Kobayashi if((db[i].db.desc.cmd & OHCI_CMD_MASK) 22243c60ba66SKatsushi Kobayashi == OHCI_OUTPUT_LAST){ 22253c60ba66SKatsushi Kobayashi return; 22263c60ba66SKatsushi Kobayashi } 22273c60ba66SKatsushi Kobayashi if((db[i].db.desc.cmd & OHCI_CMD_MASK) 22283c60ba66SKatsushi Kobayashi == OHCI_INPUT_LAST){ 22293c60ba66SKatsushi Kobayashi return; 22303c60ba66SKatsushi Kobayashi } 22313c60ba66SKatsushi Kobayashi if(key == OHCI_KEY_ST2 ){ 22323c60ba66SKatsushi Kobayashi i++; 22333c60ba66SKatsushi Kobayashi } 22343c60ba66SKatsushi Kobayashi } 22353c60ba66SKatsushi Kobayashi return; 22363c60ba66SKatsushi Kobayashi } 2237c572b810SHidetoshi Shimokawa 2238c572b810SHidetoshi Shimokawa void 2239c572b810SHidetoshi Shimokawa fwohci_ibr(struct firewire_comm *fc) 22403c60ba66SKatsushi Kobayashi { 22413c60ba66SKatsushi Kobayashi struct fwohci_softc *sc; 22423c60ba66SKatsushi Kobayashi u_int32_t fun; 22433c60ba66SKatsushi Kobayashi 22443c60ba66SKatsushi Kobayashi sc = (struct fwohci_softc *)fc; 2245ac9f6692SHidetoshi Shimokawa 2246ac9f6692SHidetoshi Shimokawa /* 2247ac9f6692SHidetoshi Shimokawa * Set root hold-off bit so that non cyclemaster capable node 2248ac9f6692SHidetoshi Shimokawa * shouldn't became the root node. 2249ac9f6692SHidetoshi Shimokawa */ 22503c60ba66SKatsushi Kobayashi #if 1 22513c60ba66SKatsushi Kobayashi fun = fwphy_rddata(sc, FW_PHY_IBR_REG); 22524ed65ce9SHidetoshi Shimokawa fun |= FW_PHY_IBR | FW_PHY_RHB; 22533c60ba66SKatsushi Kobayashi fun = fwphy_wrdata(sc, FW_PHY_IBR_REG, fun); 22544ed65ce9SHidetoshi Shimokawa #else /* Short bus reset */ 22553c60ba66SKatsushi Kobayashi fun = fwphy_rddata(sc, FW_PHY_ISBR_REG); 22564ed65ce9SHidetoshi Shimokawa fun |= FW_PHY_ISBR | FW_PHY_RHB; 22573c60ba66SKatsushi Kobayashi fun = fwphy_wrdata(sc, FW_PHY_ISBR_REG, fun); 22583c60ba66SKatsushi Kobayashi #endif 22593c60ba66SKatsushi Kobayashi } 2260c572b810SHidetoshi Shimokawa 2261c572b810SHidetoshi Shimokawa void 2262c572b810SHidetoshi Shimokawa fwohci_txbufdb(struct fwohci_softc *sc, int dmach, struct fw_bulkxfer *bulkxfer) 22633c60ba66SKatsushi Kobayashi { 22643c60ba66SKatsushi Kobayashi struct fwohcidb_tr *db_tr, *fdb_tr; 22653c60ba66SKatsushi Kobayashi struct fwohci_dbch *dbch; 22663c60ba66SKatsushi Kobayashi struct fw_pkt *fp; 22673c60ba66SKatsushi Kobayashi volatile struct fwohci_txpkthdr *ohcifp; 22683c60ba66SKatsushi Kobayashi unsigned short chtag; 22693c60ba66SKatsushi Kobayashi int idb; 22703c60ba66SKatsushi Kobayashi 22713c60ba66SKatsushi Kobayashi dbch = &sc->it[dmach]; 22723c60ba66SKatsushi Kobayashi chtag = sc->it[dmach].xferq.flag & 0xff; 22733c60ba66SKatsushi Kobayashi 22743c60ba66SKatsushi Kobayashi db_tr = (struct fwohcidb_tr *)(bulkxfer->start); 22753c60ba66SKatsushi Kobayashi fdb_tr = (struct fwohcidb_tr *)(bulkxfer->end); 22763c60ba66SKatsushi Kobayashi /* 22773c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, "DB %08x %08x %08x\n", bulkxfer, vtophys(db_tr->db), vtophys(fdb_tr->db)); 22783c60ba66SKatsushi Kobayashi */ 22793c60ba66SKatsushi Kobayashi if(bulkxfer->flag != 0){ 22803c60ba66SKatsushi Kobayashi return; 22813c60ba66SKatsushi Kobayashi } 22823c60ba66SKatsushi Kobayashi bulkxfer->flag = 1; 22833c60ba66SKatsushi Kobayashi for( idb = 0 ; idb < bulkxfer->npacket ; idb ++){ 22843c60ba66SKatsushi Kobayashi db_tr->db[0].db.desc.cmd 22853c60ba66SKatsushi Kobayashi = OHCI_OUTPUT_MORE | OHCI_KEY_ST2 | 8; 22863c60ba66SKatsushi Kobayashi fp = (struct fw_pkt *)db_tr->buf; 22873c60ba66SKatsushi Kobayashi ohcifp = (volatile struct fwohci_txpkthdr *) 22883c60ba66SKatsushi Kobayashi db_tr->db[1].db.immed; 22893c60ba66SKatsushi Kobayashi ohcifp->mode.ld[0] = ntohl(fp->mode.ld[0]); 22903c60ba66SKatsushi Kobayashi ohcifp->mode.stream.len = ntohs(fp->mode.stream.len); 22913c60ba66SKatsushi Kobayashi ohcifp->mode.stream.chtag = chtag; 22923c60ba66SKatsushi Kobayashi ohcifp->mode.stream.tcode = 0xa; 22933c60ba66SKatsushi Kobayashi ohcifp->mode.stream.spd = 4; 22943c60ba66SKatsushi Kobayashi ohcifp->mode.ld[2] = ntohl(fp->mode.ld[1]); 22953c60ba66SKatsushi Kobayashi ohcifp->mode.ld[3] = ntohl(fp->mode.ld[2]); 22963c60ba66SKatsushi Kobayashi 22973c60ba66SKatsushi Kobayashi db_tr->db[2].db.desc.cmd 22983c60ba66SKatsushi Kobayashi = OHCI_OUTPUT_LAST 22993c60ba66SKatsushi Kobayashi | OHCI_UPDATE 23003c60ba66SKatsushi Kobayashi | OHCI_BRANCH_ALWAYS 23013c60ba66SKatsushi Kobayashi | ((ntohs(fp->mode.stream.len) ) & 0xffff); 23023c60ba66SKatsushi Kobayashi db_tr->db[2].db.desc.status = 0; 23033c60ba66SKatsushi Kobayashi db_tr->db[2].db.desc.count = 0; 23043c60ba66SKatsushi Kobayashi db_tr->db[0].db.desc.depend 23053c60ba66SKatsushi Kobayashi = vtophys(STAILQ_NEXT(db_tr, link)->db) | dbch->ndesc; 23063c60ba66SKatsushi Kobayashi db_tr->db[dbch->ndesc - 1].db.desc.depend 23073c60ba66SKatsushi Kobayashi = vtophys(STAILQ_NEXT(db_tr, link)->db) | dbch->ndesc; 23083c60ba66SKatsushi Kobayashi bulkxfer->end = (caddr_t)db_tr; 23093c60ba66SKatsushi Kobayashi db_tr = STAILQ_NEXT(db_tr, link); 23103c60ba66SKatsushi Kobayashi } 23113c60ba66SKatsushi Kobayashi db_tr = (struct fwohcidb_tr *)bulkxfer->end; 23123c60ba66SKatsushi Kobayashi db_tr->db[0].db.desc.depend &= ~0xf; 23133c60ba66SKatsushi Kobayashi db_tr->db[dbch->ndesc - 1].db.desc.depend &= ~0xf; 23144ed65ce9SHidetoshi Shimokawa #if 0 23153c60ba66SKatsushi Kobayashi /**/ 23163c60ba66SKatsushi Kobayashi db_tr->db[dbch->ndesc - 1].db.desc.cmd &= ~OHCI_BRANCH_ALWAYS; 23173c60ba66SKatsushi Kobayashi db_tr->db[dbch->ndesc - 1].db.desc.cmd |= OHCI_BRANCH_NEVER; 23183c60ba66SKatsushi Kobayashi /**/ 23194ed65ce9SHidetoshi Shimokawa #endif 23203c60ba66SKatsushi Kobayashi db_tr->db[dbch->ndesc - 1].db.desc.cmd |= OHCI_INTERRUPT_ALWAYS; 23214ed65ce9SHidetoshi Shimokawa /* OHCI 1.1 and above */ 23224ed65ce9SHidetoshi Shimokawa db_tr->db[0].db.desc.cmd |= OHCI_INTERRUPT_ALWAYS; 23233c60ba66SKatsushi Kobayashi 23243c60ba66SKatsushi Kobayashi db_tr = (struct fwohcidb_tr *)bulkxfer->start; 23253c60ba66SKatsushi Kobayashi fdb_tr = (struct fwohcidb_tr *)bulkxfer->end; 23263c60ba66SKatsushi Kobayashi /* 23273c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, "DB %08x %3d %08x %08x\n", bulkxfer, bulkxfer->npacket, vtophys(db_tr->db), vtophys(fdb_tr->db)); 23283c60ba66SKatsushi Kobayashi */ 23293c60ba66SKatsushi Kobayashi return; 23303c60ba66SKatsushi Kobayashi } 2331c572b810SHidetoshi Shimokawa 2332c572b810SHidetoshi Shimokawa static int 2333c572b810SHidetoshi Shimokawa fwohci_add_tx_buf(struct fwohcidb_tr *db_tr, unsigned short size, 2334c572b810SHidetoshi Shimokawa int mode, void *buf) 23353c60ba66SKatsushi Kobayashi { 23363c60ba66SKatsushi Kobayashi volatile struct fwohcidb *db = db_tr->db; 23373c60ba66SKatsushi Kobayashi int err = 0; 23383c60ba66SKatsushi Kobayashi if(buf == 0){ 23393c60ba66SKatsushi Kobayashi err = EINVAL; 23403c60ba66SKatsushi Kobayashi return err; 23413c60ba66SKatsushi Kobayashi } 23423c60ba66SKatsushi Kobayashi db_tr->buf = buf; 23433c60ba66SKatsushi Kobayashi db_tr->dbcnt = 3; 23443c60ba66SKatsushi Kobayashi db_tr->dummy = NULL; 23453c60ba66SKatsushi Kobayashi 23463c60ba66SKatsushi Kobayashi db[0].db.desc.cmd = OHCI_OUTPUT_MORE | OHCI_KEY_ST2 | 8; 23473c60ba66SKatsushi Kobayashi 23483c60ba66SKatsushi Kobayashi db[2].db.desc.depend = 0; 23493c60ba66SKatsushi Kobayashi db[2].db.desc.addr = vtophys(buf) + sizeof(u_int32_t); 23503c60ba66SKatsushi Kobayashi db[2].db.desc.cmd = OHCI_OUTPUT_MORE; 23513c60ba66SKatsushi Kobayashi 23523c60ba66SKatsushi Kobayashi db[0].db.desc.status = 0; 23533c60ba66SKatsushi Kobayashi db[0].db.desc.count = 0; 23543c60ba66SKatsushi Kobayashi 23553c60ba66SKatsushi Kobayashi db[2].db.desc.status = 0; 23563c60ba66SKatsushi Kobayashi db[2].db.desc.count = 0; 23573c60ba66SKatsushi Kobayashi if( mode & FWXFERQ_STREAM ){ 23583c60ba66SKatsushi Kobayashi db[2].db.desc.cmd |= OHCI_OUTPUT_LAST; 23593c60ba66SKatsushi Kobayashi if(mode & FWXFERQ_PACKET ){ 23603c60ba66SKatsushi Kobayashi db[2].db.desc.cmd 23613c60ba66SKatsushi Kobayashi |= OHCI_INTERRUPT_ALWAYS; 23623c60ba66SKatsushi Kobayashi } 23633c60ba66SKatsushi Kobayashi } 23643c60ba66SKatsushi Kobayashi db[2].db.desc.cmd |= OHCI_BRANCH_ALWAYS; 23653c60ba66SKatsushi Kobayashi return 1; 23663c60ba66SKatsushi Kobayashi } 2367c572b810SHidetoshi Shimokawa 2368c572b810SHidetoshi Shimokawa int 2369c572b810SHidetoshi Shimokawa fwohci_add_rx_buf(struct fwohcidb_tr *db_tr, unsigned short size, int mode, 2370c572b810SHidetoshi Shimokawa void *buf, void *dummy) 23713c60ba66SKatsushi Kobayashi { 23723c60ba66SKatsushi Kobayashi volatile struct fwohcidb *db = db_tr->db; 23733c60ba66SKatsushi Kobayashi int i; 23743c60ba66SKatsushi Kobayashi void *dbuf[2]; 23753c60ba66SKatsushi Kobayashi int dsiz[2]; 23763c60ba66SKatsushi Kobayashi 23773c60ba66SKatsushi Kobayashi if(buf == 0){ 23783c60ba66SKatsushi Kobayashi buf = malloc(size, M_DEVBUF, M_NOWAIT); 23793c60ba66SKatsushi Kobayashi if(buf == NULL) return 0; 23803c60ba66SKatsushi Kobayashi db_tr->buf = buf; 23813c60ba66SKatsushi Kobayashi db_tr->dbcnt = 1; 23823c60ba66SKatsushi Kobayashi db_tr->dummy = NULL; 23833c60ba66SKatsushi Kobayashi dsiz[0] = size; 23843c60ba66SKatsushi Kobayashi dbuf[0] = buf; 23853c60ba66SKatsushi Kobayashi }else if(dummy == NULL){ 23863c60ba66SKatsushi Kobayashi db_tr->buf = buf; 23873c60ba66SKatsushi Kobayashi db_tr->dbcnt = 1; 23883c60ba66SKatsushi Kobayashi db_tr->dummy = NULL; 23893c60ba66SKatsushi Kobayashi dsiz[0] = size; 23903c60ba66SKatsushi Kobayashi dbuf[0] = buf; 23913c60ba66SKatsushi Kobayashi }else{ 23923c60ba66SKatsushi Kobayashi db_tr->buf = buf; 23933c60ba66SKatsushi Kobayashi db_tr->dbcnt = 2; 23943c60ba66SKatsushi Kobayashi db_tr->dummy = dummy; 23953c60ba66SKatsushi Kobayashi dsiz[0] = sizeof(u_int32_t); 23963c60ba66SKatsushi Kobayashi dsiz[1] = size; 23973c60ba66SKatsushi Kobayashi dbuf[0] = dummy; 23983c60ba66SKatsushi Kobayashi dbuf[1] = buf; 23993c60ba66SKatsushi Kobayashi } 24003c60ba66SKatsushi Kobayashi for(i = 0 ; i < db_tr->dbcnt ; i++){ 24013c60ba66SKatsushi Kobayashi db[i].db.desc.addr = vtophys(dbuf[i]) ; 24023c60ba66SKatsushi Kobayashi db[i].db.desc.cmd = OHCI_INPUT_MORE | dsiz[i]; 24033c60ba66SKatsushi Kobayashi if( mode & FWXFERQ_STREAM ){ 24043c60ba66SKatsushi Kobayashi db[i].db.desc.cmd |= OHCI_UPDATE; 24053c60ba66SKatsushi Kobayashi } 24063c60ba66SKatsushi Kobayashi db[i].db.desc.status = 0; 24073c60ba66SKatsushi Kobayashi db[i].db.desc.count = dsiz[i]; 24083c60ba66SKatsushi Kobayashi } 24093c60ba66SKatsushi Kobayashi if( mode & FWXFERQ_STREAM ){ 24103c60ba66SKatsushi Kobayashi db[db_tr->dbcnt - 1].db.desc.cmd |= OHCI_INPUT_LAST; 24113c60ba66SKatsushi Kobayashi if(mode & FWXFERQ_PACKET ){ 24123c60ba66SKatsushi Kobayashi db[db_tr->dbcnt - 1].db.desc.cmd 24133c60ba66SKatsushi Kobayashi |= OHCI_INTERRUPT_ALWAYS; 24143c60ba66SKatsushi Kobayashi } 24153c60ba66SKatsushi Kobayashi } 24163c60ba66SKatsushi Kobayashi db[db_tr->dbcnt - 1].db.desc.cmd |= OHCI_BRANCH_ALWAYS; 24173c60ba66SKatsushi Kobayashi return 1; 24183c60ba66SKatsushi Kobayashi } 2419c572b810SHidetoshi Shimokawa 2420c572b810SHidetoshi Shimokawa static void 2421c572b810SHidetoshi Shimokawa fwohci_ircv(struct fwohci_softc *sc, struct fwohci_dbch *dbch, int count) 24223c60ba66SKatsushi Kobayashi { 24233c60ba66SKatsushi Kobayashi struct fwohcidb_tr *db_tr = dbch->top, *odb_tr; 24243c60ba66SKatsushi Kobayashi struct firewire_comm *fc = (struct firewire_comm *)sc; 24253c60ba66SKatsushi Kobayashi int z = 1; 24263c60ba66SKatsushi Kobayashi struct fw_pkt *fp; 24273c60ba66SKatsushi Kobayashi u_int8_t *ld; 24283c60ba66SKatsushi Kobayashi u_int32_t off = NULL; 24293c60ba66SKatsushi Kobayashi u_int32_t stat; 24303c60ba66SKatsushi Kobayashi u_int32_t *qld; 24313c60ba66SKatsushi Kobayashi u_int32_t reg; 24323c60ba66SKatsushi Kobayashi u_int spd; 24333c60ba66SKatsushi Kobayashi u_int dmach; 24343c60ba66SKatsushi Kobayashi int len, i, plen; 24353c60ba66SKatsushi Kobayashi caddr_t buf; 24363c60ba66SKatsushi Kobayashi 24373c60ba66SKatsushi Kobayashi for(dmach = 0 ; dmach < sc->fc.nisodma ; dmach++){ 24383c60ba66SKatsushi Kobayashi if( &sc->ir[dmach] == dbch){ 24393c60ba66SKatsushi Kobayashi off = OHCI_IROFF(dmach); 24403c60ba66SKatsushi Kobayashi break; 24413c60ba66SKatsushi Kobayashi } 24423c60ba66SKatsushi Kobayashi } 24433c60ba66SKatsushi Kobayashi if(off == NULL){ 24443c60ba66SKatsushi Kobayashi return; 24453c60ba66SKatsushi Kobayashi } 24463c60ba66SKatsushi Kobayashi if(!(dbch->xferq.flag & FWXFERQ_RUNNING)){ 24473c60ba66SKatsushi Kobayashi fwohci_irx_disable(&sc->fc, dmach); 24483c60ba66SKatsushi Kobayashi return; 24493c60ba66SKatsushi Kobayashi } 24503c60ba66SKatsushi Kobayashi 24513c60ba66SKatsushi Kobayashi odb_tr = NULL; 24523c60ba66SKatsushi Kobayashi db_tr = dbch->top; 24533c60ba66SKatsushi Kobayashi i = 0; 24543c60ba66SKatsushi Kobayashi while ((reg = db_tr->db[0].db.desc.status) & 0x1f) { 2455783058faSHidetoshi Shimokawa if (count >= 0 && count-- == 0) 2456783058faSHidetoshi Shimokawa break; 24573c60ba66SKatsushi Kobayashi ld = (u_int8_t *)db_tr->buf; 24583c60ba66SKatsushi Kobayashi if (dbch->xferq.flag & FWXFERQ_PACKET) { 24593c60ba66SKatsushi Kobayashi /* skip timeStamp */ 24603c60ba66SKatsushi Kobayashi ld += sizeof(struct fwohci_trailer); 24613c60ba66SKatsushi Kobayashi } 24623c60ba66SKatsushi Kobayashi qld = (u_int32_t *)ld; 24633c60ba66SKatsushi Kobayashi len = dbch->xferq.psize - (db_tr->db[0].db.desc.count); 24643c60ba66SKatsushi Kobayashi /* 24653c60ba66SKatsushi Kobayashi { 24663c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, "%04x %2x 0x%08x 0x%08x 0x%08x 0x%08x\n", len, 24673c60ba66SKatsushi Kobayashi db_tr->db[0].db.desc.status & 0x1f, qld[0],qld[1],qld[2],qld[3]); 24683c60ba66SKatsushi Kobayashi } 24693c60ba66SKatsushi Kobayashi */ 24703c60ba66SKatsushi Kobayashi fp=(struct fw_pkt *)ld; 24713c60ba66SKatsushi Kobayashi qld[0] = htonl(qld[0]); 24723c60ba66SKatsushi Kobayashi plen = sizeof(struct fw_isohdr) 24733c60ba66SKatsushi Kobayashi + ntohs(fp->mode.stream.len) + sizeof(u_int32_t); 24743c60ba66SKatsushi Kobayashi ld += plen; 24753c60ba66SKatsushi Kobayashi len -= plen; 24763c60ba66SKatsushi Kobayashi buf = db_tr->buf; 24773c60ba66SKatsushi Kobayashi db_tr->buf = NULL; 24783c60ba66SKatsushi Kobayashi stat = reg & 0x1f; 24793c60ba66SKatsushi Kobayashi spd = reg & 0x3; 24803c60ba66SKatsushi Kobayashi switch(stat){ 24813c60ba66SKatsushi Kobayashi case FWOHCIEV_ACKCOMPL: 24823c60ba66SKatsushi Kobayashi case FWOHCIEV_ACKPEND: 24833c60ba66SKatsushi Kobayashi fw_rcv(&sc->fc, buf, plen - sizeof(u_int32_t), dmach, sizeof(u_int32_t), spd); 24843c60ba66SKatsushi Kobayashi break; 24853c60ba66SKatsushi Kobayashi default: 24863c60ba66SKatsushi Kobayashi free(buf, M_DEVBUF); 24873c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, "Isochronous receive err %02x\n", stat); 24883c60ba66SKatsushi Kobayashi break; 24893c60ba66SKatsushi Kobayashi } 24903c60ba66SKatsushi Kobayashi i++; 24913c60ba66SKatsushi Kobayashi fwohci_add_rx_buf(db_tr, dbch->xferq.psize, 24923c60ba66SKatsushi Kobayashi dbch->xferq.flag, 0, NULL); 24933c60ba66SKatsushi Kobayashi db_tr->db[0].db.desc.depend &= ~0xf; 24943c60ba66SKatsushi Kobayashi if(dbch->pdb_tr != NULL){ 24953c60ba66SKatsushi Kobayashi dbch->pdb_tr->db[0].db.desc.depend |= z; 24963c60ba66SKatsushi Kobayashi } else { 24973c60ba66SKatsushi Kobayashi /* XXX should be rewritten in better way */ 24983c60ba66SKatsushi Kobayashi dbch->bottom->db[0].db.desc.depend |= z; 24993c60ba66SKatsushi Kobayashi } 25003c60ba66SKatsushi Kobayashi dbch->pdb_tr = db_tr; 25013c60ba66SKatsushi Kobayashi db_tr = STAILQ_NEXT(db_tr, link); 25023c60ba66SKatsushi Kobayashi } 25033c60ba66SKatsushi Kobayashi dbch->top = db_tr; 25043c60ba66SKatsushi Kobayashi reg = OREAD(sc, OHCI_DMACTL(off)); 25053c60ba66SKatsushi Kobayashi if (reg & OHCI_CNTL_DMA_ACTIVE) 25063c60ba66SKatsushi Kobayashi return; 25073c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, "IR DMA %d stopped at %x status=%x (%d)\n", 25083c60ba66SKatsushi Kobayashi dmach, OREAD(sc, OHCI_DMACMD(off)), reg, i); 25093c60ba66SKatsushi Kobayashi dbch->top = db_tr; 25103c60ba66SKatsushi Kobayashi fwohci_irx_enable(fc, dmach); 25113c60ba66SKatsushi Kobayashi } 25123c60ba66SKatsushi Kobayashi 25133c60ba66SKatsushi Kobayashi #define PLEN(x) (((ntohs(x))+0x3) & ~0x3) 25143c60ba66SKatsushi Kobayashi static int 25153c60ba66SKatsushi Kobayashi fwohci_get_plen(struct fwohci_softc *sc, struct fw_pkt *fp, int hlen) 25163c60ba66SKatsushi Kobayashi { 25173c60ba66SKatsushi Kobayashi int i; 25183c60ba66SKatsushi Kobayashi 25193c60ba66SKatsushi Kobayashi for( i = 4; i < hlen ; i+=4){ 25203c60ba66SKatsushi Kobayashi fp->mode.ld[i/4] = htonl(fp->mode.ld[i/4]); 25213c60ba66SKatsushi Kobayashi } 25223c60ba66SKatsushi Kobayashi 25233c60ba66SKatsushi Kobayashi switch(fp->mode.common.tcode){ 25243c60ba66SKatsushi Kobayashi case FWTCODE_RREQQ: 25253c60ba66SKatsushi Kobayashi return sizeof(fp->mode.rreqq) + sizeof(u_int32_t); 25263c60ba66SKatsushi Kobayashi case FWTCODE_WRES: 25273c60ba66SKatsushi Kobayashi return sizeof(fp->mode.wres) + sizeof(u_int32_t); 25283c60ba66SKatsushi Kobayashi case FWTCODE_WREQQ: 25293c60ba66SKatsushi Kobayashi return sizeof(fp->mode.wreqq) + sizeof(u_int32_t); 25303c60ba66SKatsushi Kobayashi case FWTCODE_RREQB: 25313c60ba66SKatsushi Kobayashi return sizeof(fp->mode.rreqb) + sizeof(u_int32_t); 25323c60ba66SKatsushi Kobayashi case FWTCODE_RRESQ: 25333c60ba66SKatsushi Kobayashi return sizeof(fp->mode.rresq) + sizeof(u_int32_t); 25343c60ba66SKatsushi Kobayashi case FWTCODE_WREQB: 25353c60ba66SKatsushi Kobayashi return sizeof(struct fw_asyhdr) + PLEN(fp->mode.wreqb.len) 25363c60ba66SKatsushi Kobayashi + sizeof(u_int32_t); 25373c60ba66SKatsushi Kobayashi case FWTCODE_LREQ: 25383c60ba66SKatsushi Kobayashi return sizeof(struct fw_asyhdr) + PLEN(fp->mode.lreq.len) 25393c60ba66SKatsushi Kobayashi + sizeof(u_int32_t); 25403c60ba66SKatsushi Kobayashi case FWTCODE_RRESB: 25413c60ba66SKatsushi Kobayashi return sizeof(struct fw_asyhdr) + PLEN(fp->mode.rresb.len) 25423c60ba66SKatsushi Kobayashi + sizeof(u_int32_t); 25433c60ba66SKatsushi Kobayashi case FWTCODE_LRES: 25443c60ba66SKatsushi Kobayashi return sizeof(struct fw_asyhdr) + PLEN(fp->mode.lres.len) 25453c60ba66SKatsushi Kobayashi + sizeof(u_int32_t); 25463c60ba66SKatsushi Kobayashi case FWOHCITCODE_PHY: 25473c60ba66SKatsushi Kobayashi return 16; 25483c60ba66SKatsushi Kobayashi } 25493c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, "Unknown tcode %d\n", fp->mode.common.tcode); 25503c60ba66SKatsushi Kobayashi return 0; 25513c60ba66SKatsushi Kobayashi } 25523c60ba66SKatsushi Kobayashi 2553c572b810SHidetoshi Shimokawa static void 2554c572b810SHidetoshi Shimokawa fwohci_arcv(struct fwohci_softc *sc, struct fwohci_dbch *dbch, int count) 25553c60ba66SKatsushi Kobayashi { 25563c60ba66SKatsushi Kobayashi struct fwohcidb_tr *db_tr; 25573c60ba66SKatsushi Kobayashi int z = 1; 25583c60ba66SKatsushi Kobayashi struct fw_pkt *fp; 25593c60ba66SKatsushi Kobayashi u_int8_t *ld; 25603c60ba66SKatsushi Kobayashi u_int32_t stat, off; 25613c60ba66SKatsushi Kobayashi u_int spd; 25623c60ba66SKatsushi Kobayashi int len, plen, hlen, pcnt, poff = 0, rlen; 25633c60ba66SKatsushi Kobayashi int s; 25643c60ba66SKatsushi Kobayashi caddr_t buf; 25653c60ba66SKatsushi Kobayashi int resCount; 25663c60ba66SKatsushi Kobayashi 25673c60ba66SKatsushi Kobayashi if(&sc->arrq == dbch){ 25683c60ba66SKatsushi Kobayashi off = OHCI_ARQOFF; 25693c60ba66SKatsushi Kobayashi }else if(&sc->arrs == dbch){ 25703c60ba66SKatsushi Kobayashi off = OHCI_ARSOFF; 25713c60ba66SKatsushi Kobayashi }else{ 25723c60ba66SKatsushi Kobayashi return; 25733c60ba66SKatsushi Kobayashi } 25743c60ba66SKatsushi Kobayashi 25753c60ba66SKatsushi Kobayashi s = splfw(); 25763c60ba66SKatsushi Kobayashi db_tr = dbch->top; 25773c60ba66SKatsushi Kobayashi pcnt = 0; 25783c60ba66SKatsushi Kobayashi /* XXX we cannot handle a packet which lies in more than two buf */ 25793c60ba66SKatsushi Kobayashi while (db_tr->db[0].db.desc.status & OHCI_CNTL_DMA_ACTIVE) { 25803c60ba66SKatsushi Kobayashi ld = (u_int8_t *)db_tr->buf + dbch->buf_offset; 25813c60ba66SKatsushi Kobayashi resCount = db_tr->db[0].db.desc.count; 25823c60ba66SKatsushi Kobayashi len = dbch->xferq.psize - resCount 25833c60ba66SKatsushi Kobayashi - dbch->buf_offset; 25843c60ba66SKatsushi Kobayashi while (len > 0 ) { 2585783058faSHidetoshi Shimokawa if (count >= 0 && count-- == 0) 2586783058faSHidetoshi Shimokawa goto out; 25873c60ba66SKatsushi Kobayashi if(dbch->frag.buf != NULL){ 25883c60ba66SKatsushi Kobayashi buf = dbch->frag.buf; 25893c60ba66SKatsushi Kobayashi if (dbch->frag.plen < 0) { 25903c60ba66SKatsushi Kobayashi /* incomplete header */ 25913c60ba66SKatsushi Kobayashi int hlen; 25923c60ba66SKatsushi Kobayashi 25933c60ba66SKatsushi Kobayashi hlen = - dbch->frag.plen; 25943c60ba66SKatsushi Kobayashi rlen = hlen - dbch->frag.len; 25953c60ba66SKatsushi Kobayashi bcopy(ld, dbch->frag.buf + dbch->frag.len, rlen); 25963c60ba66SKatsushi Kobayashi ld += rlen; 25973c60ba66SKatsushi Kobayashi len -= rlen; 25983c60ba66SKatsushi Kobayashi dbch->frag.len += rlen; 25993c60ba66SKatsushi Kobayashi #if 0 26003c60ba66SKatsushi Kobayashi printf("(1)frag.plen=%d frag.len=%d rlen=%d len=%d\n", dbch->frag.plen, dbch->frag.len, rlen, len); 26013c60ba66SKatsushi Kobayashi #endif 26023c60ba66SKatsushi Kobayashi fp=(struct fw_pkt *)dbch->frag.buf; 26033c60ba66SKatsushi Kobayashi dbch->frag.plen 26043c60ba66SKatsushi Kobayashi = fwohci_get_plen(sc, fp, hlen); 26053c60ba66SKatsushi Kobayashi if (dbch->frag.plen == 0) 26063c60ba66SKatsushi Kobayashi goto out; 26073c60ba66SKatsushi Kobayashi } 26083c60ba66SKatsushi Kobayashi rlen = dbch->frag.plen - dbch->frag.len; 26093c60ba66SKatsushi Kobayashi #if 0 26103c60ba66SKatsushi Kobayashi printf("(2)frag.plen=%d frag.len=%d rlen=%d len=%d\n", dbch->frag.plen, dbch->frag.len, rlen, len); 26113c60ba66SKatsushi Kobayashi #endif 26123c60ba66SKatsushi Kobayashi bcopy(ld, dbch->frag.buf + dbch->frag.len, 26133c60ba66SKatsushi Kobayashi rlen); 26143c60ba66SKatsushi Kobayashi ld += rlen; 26153c60ba66SKatsushi Kobayashi len -= rlen; 26163c60ba66SKatsushi Kobayashi plen = dbch->frag.plen; 26173c60ba66SKatsushi Kobayashi dbch->frag.buf = NULL; 26183c60ba66SKatsushi Kobayashi dbch->frag.plen = 0; 26193c60ba66SKatsushi Kobayashi dbch->frag.len = 0; 26203c60ba66SKatsushi Kobayashi poff = 0; 26213c60ba66SKatsushi Kobayashi }else{ 26223c60ba66SKatsushi Kobayashi fp=(struct fw_pkt *)ld; 26233c60ba66SKatsushi Kobayashi fp->mode.ld[0] = htonl(fp->mode.ld[0]); 26243c60ba66SKatsushi Kobayashi switch(fp->mode.common.tcode){ 26253c60ba66SKatsushi Kobayashi case FWTCODE_RREQQ: 26263c60ba66SKatsushi Kobayashi case FWTCODE_WRES: 26273c60ba66SKatsushi Kobayashi case FWTCODE_WREQQ: 26283c60ba66SKatsushi Kobayashi case FWTCODE_RRESQ: 26293c60ba66SKatsushi Kobayashi case FWOHCITCODE_PHY: 26303c60ba66SKatsushi Kobayashi hlen = 12; 26313c60ba66SKatsushi Kobayashi break; 26323c60ba66SKatsushi Kobayashi case FWTCODE_RREQB: 26333c60ba66SKatsushi Kobayashi case FWTCODE_WREQB: 26343c60ba66SKatsushi Kobayashi case FWTCODE_LREQ: 26353c60ba66SKatsushi Kobayashi case FWTCODE_RRESB: 26363c60ba66SKatsushi Kobayashi case FWTCODE_LRES: 26373c60ba66SKatsushi Kobayashi hlen = 16; 26383c60ba66SKatsushi Kobayashi break; 26393c60ba66SKatsushi Kobayashi default: 26403c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, "Unknown tcode %d\n", fp->mode.common.tcode); 26413c60ba66SKatsushi Kobayashi goto out; 26423c60ba66SKatsushi Kobayashi } 26433c60ba66SKatsushi Kobayashi if (len >= hlen) { 26443c60ba66SKatsushi Kobayashi plen = fwohci_get_plen(sc, fp, hlen); 26453c60ba66SKatsushi Kobayashi if (plen == 0) 26463c60ba66SKatsushi Kobayashi goto out; 26473c60ba66SKatsushi Kobayashi plen = (plen + 3) & ~3; 26483c60ba66SKatsushi Kobayashi len -= plen; 26493c60ba66SKatsushi Kobayashi } else { 26503c60ba66SKatsushi Kobayashi plen = -hlen; 26513c60ba66SKatsushi Kobayashi len -= hlen; 26523c60ba66SKatsushi Kobayashi } 26533c60ba66SKatsushi Kobayashi if(resCount > 0 || len > 0){ 26543c60ba66SKatsushi Kobayashi buf = malloc( dbch->xferq.psize, 26553c60ba66SKatsushi Kobayashi M_DEVBUF, M_NOWAIT); 26563c60ba66SKatsushi Kobayashi if(buf == NULL){ 26573c60ba66SKatsushi Kobayashi printf("cannot malloc!\n"); 26583c60ba66SKatsushi Kobayashi free(db_tr->buf, M_DEVBUF); 26593c60ba66SKatsushi Kobayashi goto out; 26603c60ba66SKatsushi Kobayashi } 26613c60ba66SKatsushi Kobayashi bcopy(ld, buf, plen); 26623c60ba66SKatsushi Kobayashi poff = 0; 26633c60ba66SKatsushi Kobayashi dbch->frag.buf = NULL; 26643c60ba66SKatsushi Kobayashi dbch->frag.plen = 0; 26653c60ba66SKatsushi Kobayashi dbch->frag.len = 0; 26663c60ba66SKatsushi Kobayashi }else if(len < 0){ 26673c60ba66SKatsushi Kobayashi dbch->frag.buf = db_tr->buf; 26683c60ba66SKatsushi Kobayashi if (plen < 0) { 26693c60ba66SKatsushi Kobayashi #if 0 26703c60ba66SKatsushi Kobayashi printf("plen < 0:" 26713c60ba66SKatsushi Kobayashi "hlen: %d len: %d\n", 26723c60ba66SKatsushi Kobayashi hlen, len); 26733c60ba66SKatsushi Kobayashi #endif 26743c60ba66SKatsushi Kobayashi dbch->frag.len = hlen + len; 26753c60ba66SKatsushi Kobayashi dbch->frag.plen = -hlen; 26763c60ba66SKatsushi Kobayashi } else { 26773c60ba66SKatsushi Kobayashi dbch->frag.len = plen + len; 26783c60ba66SKatsushi Kobayashi dbch->frag.plen = plen; 26793c60ba66SKatsushi Kobayashi } 26803c60ba66SKatsushi Kobayashi bcopy(ld, db_tr->buf, dbch->frag.len); 26813c60ba66SKatsushi Kobayashi buf = NULL; 26823c60ba66SKatsushi Kobayashi }else{ 26833c60ba66SKatsushi Kobayashi buf = db_tr->buf; 26843c60ba66SKatsushi Kobayashi poff = ld - (u_int8_t *)buf; 26853c60ba66SKatsushi Kobayashi dbch->frag.buf = NULL; 26863c60ba66SKatsushi Kobayashi dbch->frag.plen = 0; 26873c60ba66SKatsushi Kobayashi dbch->frag.len = 0; 26883c60ba66SKatsushi Kobayashi } 26893c60ba66SKatsushi Kobayashi ld += plen; 26903c60ba66SKatsushi Kobayashi } 26913c60ba66SKatsushi Kobayashi if( buf != NULL){ 26923c60ba66SKatsushi Kobayashi /* DMA result-code will be written at the tail of packet */ 26933c60ba66SKatsushi Kobayashi stat = ((struct fwohci_trailer *)(ld - sizeof(struct fwohci_trailer)))->stat; 26943c60ba66SKatsushi Kobayashi spd = (stat >> 5) & 0x3; 26953c60ba66SKatsushi Kobayashi stat &= 0x1f; 26963c60ba66SKatsushi Kobayashi switch(stat){ 26973c60ba66SKatsushi Kobayashi case FWOHCIEV_ACKPEND: 26983c60ba66SKatsushi Kobayashi #if 0 26993c60ba66SKatsushi Kobayashi printf("fwohci_arcv: ack pending..\n"); 27003c60ba66SKatsushi Kobayashi #endif 27013c60ba66SKatsushi Kobayashi /* fall through */ 27023c60ba66SKatsushi Kobayashi case FWOHCIEV_ACKCOMPL: 27033c60ba66SKatsushi Kobayashi if( poff != 0 ) 27043c60ba66SKatsushi Kobayashi bcopy(buf+poff, buf, plen - 4); 27053c60ba66SKatsushi Kobayashi fw_rcv(&sc->fc, buf, plen - sizeof(struct fwohci_trailer), 0, 0, spd); 27063c60ba66SKatsushi Kobayashi break; 27073c60ba66SKatsushi Kobayashi case FWOHCIEV_BUSRST: 27083c60ba66SKatsushi Kobayashi free(buf, M_DEVBUF); 27093c60ba66SKatsushi Kobayashi if (sc->fc.status != FWBUSRESET) 27103c60ba66SKatsushi Kobayashi printf("got BUSRST packet!?\n"); 27113c60ba66SKatsushi Kobayashi break; 27123c60ba66SKatsushi Kobayashi default: 27133c60ba66SKatsushi Kobayashi device_printf(sc->fc.dev, "Async DMA Receive error err = %02x %s\n", stat, fwohcicode[stat]); 27143c60ba66SKatsushi Kobayashi #if 0 /* XXX */ 27153c60ba66SKatsushi Kobayashi goto out; 27163c60ba66SKatsushi Kobayashi #endif 27173c60ba66SKatsushi Kobayashi break; 27183c60ba66SKatsushi Kobayashi } 27193c60ba66SKatsushi Kobayashi } 27203c60ba66SKatsushi Kobayashi pcnt ++; 27213c60ba66SKatsushi Kobayashi }; 27223c60ba66SKatsushi Kobayashi out: 27233c60ba66SKatsushi Kobayashi if (resCount == 0) { 27243c60ba66SKatsushi Kobayashi /* done on this buffer */ 27253c60ba66SKatsushi Kobayashi fwohci_add_rx_buf(db_tr, dbch->xferq.psize, 27263c60ba66SKatsushi Kobayashi dbch->xferq.flag, 0, NULL); 27273c60ba66SKatsushi Kobayashi dbch->bottom->db[0].db.desc.depend |= z; 27283c60ba66SKatsushi Kobayashi dbch->bottom = db_tr; 27293c60ba66SKatsushi Kobayashi db_tr = STAILQ_NEXT(db_tr, link); 27303c60ba66SKatsushi Kobayashi dbch->top = db_tr; 27313c60ba66SKatsushi Kobayashi dbch->buf_offset = 0; 27323c60ba66SKatsushi Kobayashi } else { 27333c60ba66SKatsushi Kobayashi dbch->buf_offset = dbch->xferq.psize - resCount; 27343c60ba66SKatsushi Kobayashi break; 27353c60ba66SKatsushi Kobayashi } 27363c60ba66SKatsushi Kobayashi /* XXX make sure DMA is not dead */ 27373c60ba66SKatsushi Kobayashi } 27383c60ba66SKatsushi Kobayashi #if 0 27393c60ba66SKatsushi Kobayashi if (pcnt < 1) 27403c60ba66SKatsushi Kobayashi printf("fwohci_arcv: no packets\n"); 27413c60ba66SKatsushi Kobayashi #endif 27423c60ba66SKatsushi Kobayashi splx(s); 27433c60ba66SKatsushi Kobayashi } 2744