1 /* 2 * Copyright (c) 2003 Hidetoshi Shimokawa 3 * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the acknowledgement as bellow: 16 * 17 * This product includes software developed by K. Kobayashi and H. Shimokawa 18 * 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 26 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 30 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 31 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD$ 35 * 36 */ 37 38 #ifndef _FIREWIRE_H 39 #define _FIREWIRE_H 1 40 41 #define DEV_DEF 0 42 #define DEV_DV 2 43 44 struct fw_isochreq { 45 unsigned char ch:6, 46 tag:2; 47 }; 48 49 struct fw_isobufreq { 50 struct fw_bufspec { 51 unsigned int nchunk; 52 unsigned int npacket; 53 unsigned int psize; 54 } tx, rx; 55 }; 56 57 struct fw_addr { 58 unsigned long hi; 59 unsigned long lo; 60 }; 61 62 struct fw_asybindreq { 63 struct fw_addr start; 64 unsigned long len; 65 }; 66 67 struct fw_reg_req_t { 68 unsigned long addr; 69 unsigned long data; 70 }; 71 72 #define MAXREC(x) (2 << (x)) 73 #define FWPMAX_S400 (2048 + 20) /* MAXREC plus space for control data */ 74 #define FWMAXQUEUE 64 75 76 #define FWLOCALBUS 0xffc0 77 78 #define FWTCODE_WREQQ 0 79 #define FWTCODE_WREQB 1 80 #define FWTCODE_WRES 2 81 #define FWTCODE_RREQQ 4 82 #define FWTCODE_RREQB 5 83 #define FWTCODE_RRESQ 6 84 #define FWTCODE_RRESB 7 85 #define FWTCODE_CYCS 8 86 #define FWTCODE_LREQ 9 87 #define FWTCODE_STREAM 0xa 88 #define FWTCODE_LRES 0xb 89 #define FWTCODE_PHY 0xe 90 91 #define FWRETRY_1 0 92 #define FWRETRY_X 1 93 #define FWRETRY_A 2 94 #define FWRETRY_B 3 95 96 #define FWRCODE_COMPLETE 0 97 #define FWRCODE_ER_CONFL 4 98 #define FWRCODE_ER_DATA 5 99 #define FWRCODE_ER_TYPE 6 100 #define FWRCODE_ER_ADDR 7 101 102 #define FWSPD_S100 0 103 #define FWSPD_S200 1 104 #define FWSPD_S400 2 105 106 #define FWP_TL_VALID (1 << 7) 107 108 struct fw_isohdr { 109 u_int32_t hdr[1]; 110 }; 111 112 struct fw_asyhdr { 113 u_int32_t hdr[4]; 114 }; 115 116 #if BYTE_ORDER == BIG_ENDIAN 117 #define BIT4x2(x,y) u_int8_t x:4, y:4 118 #define BIT16x2(x,y) u_int32_t x:16, y:16 119 #else 120 #define BIT4x2(x,y) u_int8_t y:4, x:4 121 #define BIT16x2(x,y) u_int32_t y:16, x:16 122 #endif 123 124 125 #if BYTE_ORDER == BIG_ENDIAN 126 #define COMMON_HDR(a,b,c,d) u_int32_t a:16,b:8,c:4,d:4 127 #define COMMON_RES(a,b,c,d) u_int32_t a:16,b:4,c:4,d:8 128 #else 129 #define COMMON_HDR(a,b,c,d) u_int32_t d:4,c:4,b:8,a:16 130 #define COMMON_RES(a,b,c,d) u_int32_t d:8,c:4,b:4,a:16 131 #endif 132 133 struct fw_pkt { 134 union { 135 u_int32_t ld[0]; 136 struct { 137 COMMON_HDR(, , tcode, ); 138 } common; 139 struct { 140 COMMON_HDR(len, chtag, tcode, sy); 141 u_int32_t payload[0]; 142 } stream; 143 struct { 144 COMMON_HDR(dst, tlrt, tcode, pri); 145 BIT16x2(src, ); 146 } hdr; 147 struct { 148 COMMON_HDR(dst, tlrt, tcode, pri); 149 BIT16x2(src, dest_hi); 150 u_int32_t dest_lo; 151 } rreqq; 152 struct { 153 COMMON_HDR(dst, tlrt, tcode, pri); 154 COMMON_RES(src, rtcode, , ); 155 u_int32_t :32; 156 } wres; 157 struct { 158 COMMON_HDR(dst, tlrt, tcode, pri); 159 BIT16x2(src, dest_hi); 160 u_int32_t dest_lo; 161 BIT16x2(len, extcode); 162 } rreqb; 163 struct { 164 COMMON_HDR(dst, tlrt, tcode, pri); 165 BIT16x2(src, dest_hi); 166 u_int32_t dest_lo; 167 u_int32_t data; 168 } wreqq; 169 struct { 170 COMMON_HDR(dst, tlrt, tcode, pri); 171 BIT16x2(src, dest_hi); 172 u_int32_t dest_lo; 173 u_int32_t data; 174 } cyc; 175 struct { 176 COMMON_HDR(dst, tlrt, tcode, pri); 177 COMMON_RES(src, rtcode, , ); 178 u_int32_t :32; 179 u_int32_t data; 180 } rresq; 181 struct { 182 COMMON_HDR(dst, tlrt, tcode, pri); 183 BIT16x2(src, dest_hi); 184 u_int32_t dest_lo; 185 BIT16x2(len, extcode); 186 u_int32_t payload[0]; 187 } wreqb; 188 struct { 189 COMMON_HDR(dst, tlrt, tcode, pri); 190 BIT16x2(src, dest_hi); 191 u_int32_t dest_lo; 192 BIT16x2(len, extcode); 193 #define FW_LREQ_MSKSWAP 1 194 #define FW_LREQ_CMPSWAP 2 195 #define FW_LREQ_FTADD 3 196 #define FW_LREQ_LTADD 4 197 #define FW_LREQ_BDADD 5 198 #define FW_LREQ_WRADD 6 199 u_int32_t payload[0]; 200 } lreq; 201 struct { 202 COMMON_HDR(dst, tlrt, tcode, pri); 203 COMMON_RES(src, rtcode, , ); 204 u_int32_t :32; 205 BIT16x2(len, extcode); 206 u_int32_t payload[0]; 207 } rresb; 208 struct { 209 COMMON_HDR(dst, tlrt, tcode, pri); 210 COMMON_RES(src, rtcode, , ); 211 u_int32_t :32; 212 BIT16x2(len, extcode); 213 u_int32_t payload[0]; 214 } lres; 215 } mode; 216 }; 217 218 struct fw_eui64 { 219 u_int32_t hi, lo; 220 }; 221 #define FW_EUI64_BYTE(eui, x) \ 222 ((((x)<4)? \ 223 ((eui)->hi >> (8*(3-(x)))): \ 224 ((eui)->lo >> (8*(7-(x)))) \ 225 ) & 0xff) 226 #define FW_EUI64_EQUAL(x, y) \ 227 ((x).hi == (y).hi && (x).lo == (y).lo) 228 229 struct fw_asyreq { 230 struct fw_asyreq_t{ 231 unsigned char sped; 232 unsigned int type; 233 #define FWASREQNODE 0 234 #define FWASREQEUI 1 235 #define FWASRESTL 2 236 #define FWASREQSTREAM 3 237 unsigned short len; 238 union { 239 struct fw_eui64 eui; 240 }dst; 241 }req; 242 struct fw_pkt pkt; 243 u_int32_t data[512]; 244 }; 245 246 struct fw_devinfo { 247 struct fw_eui64 eui; 248 u_int16_t dst; 249 u_int16_t status; 250 }; 251 252 #define FW_MAX_DEVLST 70 253 struct fw_devlstreq { 254 u_int16_t n; 255 u_int16_t info_len; 256 struct fw_devinfo dev[FW_MAX_DEVLST]; 257 }; 258 259 #define FW_SELF_ID_PORT_CONNECTED_TO_CHILD 3 260 #define FW_SELF_ID_PORT_CONNECTED_TO_PARENT 2 261 #define FW_SELF_ID_PORT_NOT_CONNECTED 1 262 #define FW_SELF_ID_PORT_NOT_EXISTS 0 263 #if BYTE_ORDER == BIG_ENDIAN 264 union fw_self_id { 265 struct { 266 u_int32_t id:2, 267 phy_id:6, 268 sequel:1, 269 link_active:1, 270 gap_count:6, 271 phy_speed:2, 272 phy_delay:2, 273 contender:1, 274 power_class:3, 275 port0:2, 276 port1:2, 277 port2:2, 278 initiated_reset:1, 279 more_packets:1; 280 } p0; 281 struct { 282 u_int32_t 283 id:2, 284 phy_id:6, 285 sequel:1, 286 sequence_num:3, 287 :2, 288 porta:2, 289 portb:2, 290 portc:2, 291 portd:2, 292 porte:2, 293 portf:2, 294 portg:2, 295 porth:2, 296 :1, 297 more_packets:1; 298 } p1; 299 }; 300 #else 301 union fw_self_id { 302 struct { 303 u_int32_t more_packets:1, 304 initiated_reset:1, 305 port2:2, 306 port1:2, 307 port0:2, 308 power_class:3, 309 contender:1, 310 phy_delay:2, 311 phy_speed:2, 312 gap_count:6, 313 link_active:1, 314 sequel:1, 315 phy_id:6, 316 id:2; 317 } p0; 318 struct { 319 u_int32_t more_packets:1, 320 reserved1:1, 321 porth:2, 322 portg:2, 323 portf:2, 324 porte:2, 325 portd:2, 326 portc:2, 327 portb:2, 328 porta:2, 329 reserved2:2, 330 sequence_num:3, 331 sequel:1, 332 phy_id:6, 333 id:2; 334 } p1; 335 }; 336 #endif 337 338 339 struct fw_topology_map { 340 u_int32_t crc:16, 341 crc_len:16; 342 u_int32_t generation; 343 u_int32_t self_id_count:16, 344 node_count:16; 345 union fw_self_id self_id[4*64]; 346 }; 347 348 struct fw_speed_map { 349 u_int32_t crc:16, 350 crc_len:16; 351 u_int32_t generation; 352 u_int8_t speed[64][64]; 353 }; 354 355 struct fw_crom_buf { 356 struct fw_eui64 eui; 357 int len; 358 void *ptr; 359 }; 360 361 /* 362 * FireWire specific system requests. 363 */ 364 #define FW_SSTBUF _IOWR('S', 86, struct fw_isobufreq) 365 #define FW_GSTBUF _IOWR('S', 87, struct fw_isobufreq) 366 #define FW_SRSTREAM _IOWR('S', 88, struct fw_isochreq) 367 #define FW_GRSTREAM _IOWR('S', 89, struct fw_isochreq) 368 #define FW_STSTREAM _IOWR('S', 90, struct fw_isochreq) 369 #define FW_GTSTREAM _IOWR('S', 91, struct fw_isochreq) 370 371 #define FW_ASYREQ _IOWR('S', 92, struct fw_asyreq) 372 #define FW_IBUSRST _IOR('S', 1, unsigned int) 373 #define FW_GDEVLST _IOWR('S', 2, struct fw_devlstreq) 374 #define FW_SBINDADDR _IOWR('S', 3, struct fw_asybindreq) 375 #define FW_CBINDADDR _IOWR('S', 4, struct fw_asybindreq) 376 #define FW_GTPMAP _IOR('S', 5, struct fw_topology_map) 377 #define FW_GCROM _IOWR('S', 7, struct fw_crom_buf) 378 379 #define FW_SDEUI64 _IOW('S', 20, struct fw_eui64) 380 #define FW_GDEUI64 _IOR('S', 21, struct fw_eui64) 381 382 #define FWOHCI_RDREG _IOWR('S', 80, struct fw_reg_req_t) 383 #define FWOHCI_WRREG _IOWR('S', 81, struct fw_reg_req_t) 384 #define FWOHCI_RDPHYREG _IOWR('S', 82, struct fw_reg_req_t) 385 #define FWOHCI_WRPHYREG _IOWR('S', 83, struct fw_reg_req_t) 386 387 #define DUMPDMA _IOWR('S', 82, u_int32_t) 388 389 #ifdef _KERNEL 390 391 #define FWMAXNDMA 0x100 /* 8 bits DMA channel id. in device No. */ 392 393 #if __FreeBSD_version < 500000 394 #define dev2unit(x) ((minor(x) & 0xff) | (minor(x) >> 8)) 395 #define unit2minor(x) (((x) & 0xff) | (((x) << 8) & ~0xffff)) 396 #endif 397 398 #define MAKEMINOR(f, u, s) \ 399 unit2minor((f) | (((u) & 0xff) << 8) | (s & 0xff)) 400 #define DEV2UNIT(x) ((dev2unit(x) & 0xff00) >> 8) 401 #define DEV2SUB(x) (dev2unit(x) & 0xff) 402 403 #define FWMEM_FLAG 0x10000 404 #define DEV_FWMEM(x) (dev2unit(x) & FWMEM_FLAG) 405 #endif 406 #endif 407