1 /*- 2 * Copyright (c) 1999 Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer as 10 * the first lines of this file unmodified. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $Id:$ 27 */ 28 29 #ifndef _DEV_FB_VGAREG_H_ 30 #define _DEV_FB_VGAREG_H_ 31 32 /* physical addresses */ 33 #define MDA_BUF_BASE 0xb0000 34 #define MDA_BUF_SIZE 0x08000 35 #define MDA_BUF BIOS_PADDRTOVADDR(MDA_BUF_BASE) 36 #define CGA_BUF_BASE 0xb8000 37 #define CGA_BUF_SIZE 0x08000 38 #define CGA_BUF BIOS_PADDRTOVADDR(CGA_BUF_BASE) 39 #define EGA_BUF_BASE 0xa0000 40 #define EGA_BUF_SIZE 0x20000 41 #define EGA_BUF BIOS_PADDRTOVADDR(EGA_BUF_BASE) 42 #define GRAPHICS_BUF_BASE 0xa0000 43 #define GRAPHICS_BUF_SIZE 0x10000 44 #define GRAPHICS_BUF BIOS_PADDRTOVADDR(GRAPHICS_BUF_BASE) 45 #define FONT_BUF BIOS_PADDRTOVADDR(GRAPHICS_BUF_BASE) 46 #define VIDEO_BUF_BASE 0xa0000 47 #define VIDEO_BUF_SIZE 0x20000 48 49 /* I/O port addresses */ 50 #define MONO_CRTC (IO_MDA + 0x04) /* crt controller base mono */ 51 #define COLOR_CRTC (IO_CGA + 0x04) /* crt controller base color */ 52 #define MISC (IO_VGA + 0x02) /* misc output register */ 53 #define ATC (IO_VGA + 0x00) /* attribute controller */ 54 #define TSIDX (IO_VGA + 0x04) /* timing sequencer idx */ 55 #define TSREG (IO_VGA + 0x05) /* timing sequencer data */ 56 #define PIXMASK (IO_VGA + 0x06) /* pixel write mask */ 57 #define PALRADR (IO_VGA + 0x07) /* palette read address */ 58 #define PALWADR (IO_VGA + 0x08) /* palette write address */ 59 #define PALDATA (IO_VGA + 0x09) /* palette data register */ 60 #define GDCIDX (IO_VGA + 0x0E) /* graph data controller idx */ 61 #define GDCREG (IO_VGA + 0x0F) /* graph data controller data */ 62 63 #ifdef KERNEL 64 extern int (*vga_sub_configure)(int flags); 65 #endif 66 67 #endif /* _DEV_FB_VGAREG_H_ */ 68