1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright (c) 1999 Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp> 5 * Copyright (c) 1992-1998 Søren Schmidt 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer as 13 * the first lines of this file unmodified. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 */ 32 33 #include <sys/cdefs.h> 34 #include "opt_vga.h" 35 #include "opt_fb.h" 36 #ifndef FB_DEBUG 37 #define FB_DEBUG 0 38 #endif 39 #include "opt_syscons.h" /* should be removed in the future, XXX */ 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/kernel.h> 44 #include <sys/conf.h> 45 #include <sys/fcntl.h> 46 #include <sys/malloc.h> 47 #include <sys/fbio.h> 48 49 #include <vm/vm.h> 50 #include <vm/vm_param.h> 51 #include <vm/pmap.h> 52 53 #include <machine/md_var.h> 54 #if defined(__i386__) || defined(__amd64__) 55 #include <machine/pc/bios.h> 56 #endif 57 #include <machine/bus.h> 58 59 #include <dev/fb/fbreg.h> 60 #include <dev/fb/vgareg.h> 61 62 #include <isa/isareg.h> 63 64 #ifndef VGA_DEBUG 65 #define VGA_DEBUG 0 66 #endif 67 68 /* XXX machine/pc/bios.h has got too much i386-specific stuff in it */ 69 #ifndef BIOS_PADDRTOVADDR 70 #define BIOS_PADDRTOVADDR(x) (x) 71 #endif 72 73 int 74 vga_probe_unit(int unit, video_adapter_t *buf, int flags) 75 { 76 video_adapter_t *adp; 77 video_switch_t *sw; 78 int error; 79 80 sw = vid_get_switch(VGA_DRIVER_NAME); 81 if (sw == NULL) 82 return 0; 83 error = (*sw->probe)(unit, &adp, NULL, flags); 84 if (error) 85 return error; 86 bcopy(adp, buf, sizeof(*buf)); 87 return 0; 88 } 89 90 int 91 vga_attach_unit(int unit, vga_softc_t *sc, int flags) 92 { 93 video_switch_t *sw; 94 int error; 95 96 sw = vid_get_switch(VGA_DRIVER_NAME); 97 if (sw == NULL) 98 return ENXIO; 99 100 error = (*sw->probe)(unit, &sc->adp, NULL, flags); 101 if (error) 102 return error; 103 return (*sw->init)(unit, sc->adp, flags); 104 } 105 106 /* LOW-LEVEL */ 107 108 #include <isa/rtc.h> 109 #ifdef __i386__ 110 #include <dev/fb/vesa.h> 111 #endif 112 113 #define probe_done(adp) ((adp)->va_flags & V_ADP_PROBED) 114 #define init_done(adp) ((adp)->va_flags & V_ADP_INITIALIZED) 115 #define config_done(adp) ((adp)->va_flags & V_ADP_REGISTERED) 116 117 /* for compatibility with old kernel options */ 118 #ifdef SC_ALT_SEQACCESS 119 #undef SC_ALT_SEQACCESS 120 #undef VGA_ALT_SEQACCESS 121 #define VGA_ALT_SEQACCESS 1 122 #endif 123 124 #ifdef SLOW_VGA 125 #undef SLOW_VGA 126 #undef VGA_SLOW_IOACCESS 127 #define VGA_SLOW_IOACCESS 128 #endif 129 130 /* architecture dependent option */ 131 #if !defined(__i386__) && !defined(__amd64__) 132 #define VGA_NO_BIOS 1 133 #endif 134 135 /* this should really be in `rtc.h' */ 136 #define RTC_EQUIPMENT 0x14 137 138 /* various sizes */ 139 #define V_MODE_MAP_SIZE (M_VGA_CG320 + 1) 140 #define V_MODE_PARAM_SIZE 64 141 142 /* video adapter state buffer */ 143 struct adp_state { 144 int sig; 145 #define V_STATE_SIG 0x736f6962 146 u_char regs[V_MODE_PARAM_SIZE]; 147 }; 148 typedef struct adp_state adp_state_t; 149 150 /* video adapter information */ 151 #define DCC_MONO 0 152 #define DCC_CGA40 1 153 #define DCC_CGA80 2 154 #define DCC_EGAMONO 3 155 #define DCC_EGA40 4 156 #define DCC_EGA80 5 157 158 /* 159 * NOTE: `va_window' should have a virtual address, but is initialized 160 * with a physical address in the following table, as verify_adapter() 161 * will perform address conversion at run-time. 162 */ 163 static video_adapter_t adapter_init_value[] = { 164 /* DCC_MONO */ 165 { 0, KD_MONO, "mda", 0, 0, 0, IO_MDA, IO_MDASIZE, MONO_CRTC, 166 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 167 0, 0, 0, 0, 7, 0, }, 168 /* DCC_CGA40 */ 169 { 0, KD_CGA, "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC, 170 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 171 0, 0, 0, 0, 3, 0, }, 172 /* DCC_CGA80 */ 173 { 0, KD_CGA, "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC, 174 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 175 0, 0, 0, 0, 3, 0, }, 176 /* DCC_EGAMONO */ 177 { 0, KD_EGA, "ega", 0, 0, 0, IO_MDA, 48, MONO_CRTC, 178 EGA_BUF_BASE, EGA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 179 0, 0, 0, 0, 7, 0, }, 180 /* DCC_EGA40 */ 181 { 0, KD_EGA, "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48, COLOR_CRTC, 182 EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 183 0, 0, 0, 0, 3, 0, }, 184 /* DCC_EGA80 */ 185 { 0, KD_EGA, "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48, COLOR_CRTC, 186 EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 187 0, 0, 0, 0, 3, 0, }, 188 }; 189 190 static video_adapter_t biosadapter[2]; 191 static int biosadapters = 0; 192 193 /* video driver declarations */ 194 static int vga_configure(int flags); 195 int (*vga_sub_configure)(int flags); 196 #if 0 197 static int vga_nop(void); 198 #endif 199 static int vga_error(void); 200 static vi_probe_t vga_probe; 201 static vi_init_t vga_init; 202 static vi_get_info_t vga_get_info; 203 static vi_query_mode_t vga_query_mode; 204 static vi_set_mode_t vga_set_mode; 205 static vi_save_font_t vga_save_font; 206 static vi_load_font_t vga_load_font; 207 static vi_show_font_t vga_show_font; 208 static vi_save_palette_t vga_save_palette; 209 static vi_load_palette_t vga_load_palette; 210 static vi_set_border_t vga_set_border; 211 static vi_save_state_t vga_save_state; 212 static vi_load_state_t vga_load_state; 213 static vi_set_win_org_t vga_set_origin; 214 static vi_read_hw_cursor_t vga_read_hw_cursor; 215 static vi_set_hw_cursor_t vga_set_hw_cursor; 216 static vi_set_hw_cursor_shape_t vga_set_hw_cursor_shape; 217 static vi_blank_display_t vga_blank_display; 218 static vi_mmap_t vga_mmap_buf; 219 static vi_ioctl_t vga_dev_ioctl; 220 #ifndef VGA_NO_MODE_CHANGE 221 static vi_clear_t vga_clear; 222 static vi_fill_rect_t vga_fill_rect; 223 static vi_bitblt_t vga_bitblt; 224 #else /* VGA_NO_MODE_CHANGE */ 225 #define vga_clear (vi_clear_t *)vga_error 226 #define vga_fill_rect (vi_fill_rect_t *)vga_error 227 #define vga_bitblt (vi_bitblt_t *)vga_error 228 #endif 229 static vi_diag_t vga_diag; 230 231 static video_switch_t vgavidsw = { 232 vga_probe, 233 vga_init, 234 vga_get_info, 235 vga_query_mode, 236 vga_set_mode, 237 vga_save_font, 238 vga_load_font, 239 vga_show_font, 240 vga_save_palette, 241 vga_load_palette, 242 vga_set_border, 243 vga_save_state, 244 vga_load_state, 245 vga_set_origin, 246 vga_read_hw_cursor, 247 vga_set_hw_cursor, 248 vga_set_hw_cursor_shape, 249 vga_blank_display, 250 vga_mmap_buf, 251 vga_dev_ioctl, 252 vga_clear, 253 vga_fill_rect, 254 vga_bitblt, 255 vga_error, 256 vga_error, 257 vga_diag, 258 }; 259 260 VIDEO_DRIVER(mda, vgavidsw, NULL); 261 VIDEO_DRIVER(cga, vgavidsw, NULL); 262 VIDEO_DRIVER(ega, vgavidsw, NULL); 263 VIDEO_DRIVER(vga, vgavidsw, vga_configure); 264 265 /* VGA BIOS standard video modes */ 266 #define EOT (-1) 267 #define NA (-2) 268 269 static video_info_t bios_vmode[] = { 270 /* CGA */ 271 { M_B40x25, V_INFO_COLOR, 40, 25, 8, 8, 2, 1, 272 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 273 { M_C40x25, V_INFO_COLOR, 40, 25, 8, 8, 4, 1, 274 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 275 { M_B80x25, V_INFO_COLOR, 80, 25, 8, 8, 2, 1, 276 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 277 { M_C80x25, V_INFO_COLOR, 80, 25, 8, 8, 4, 1, 278 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 279 /* EGA */ 280 { M_ENH_B40x25, V_INFO_COLOR, 40, 25, 8, 14, 2, 1, 281 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 282 { M_ENH_C40x25, V_INFO_COLOR, 40, 25, 8, 14, 4, 1, 283 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 284 { M_ENH_B80x25, V_INFO_COLOR, 80, 25, 8, 14, 2, 1, 285 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 286 { M_ENH_C80x25, V_INFO_COLOR, 80, 25, 8, 14, 4, 1, 287 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 288 /* VGA */ 289 { M_VGA_C40x25, V_INFO_COLOR, 40, 25, 8, 16, 4, 1, 290 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 291 { M_VGA_M80x25, 0, 80, 25, 8, 16, 2, 1, 292 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 293 { M_VGA_C80x25, V_INFO_COLOR, 80, 25, 8, 16, 4, 1, 294 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 295 /* MDA */ 296 { M_EGAMONO80x25, 0, 80, 25, 8, 14, 2, 1, 297 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 298 /* EGA */ 299 { M_ENH_B80x43, V_INFO_COLOR, 80, 43, 8, 8, 2, 1, 300 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 301 { M_ENH_C80x43, V_INFO_COLOR, 80, 43, 8, 8, 4, 1, 302 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 303 /* VGA */ 304 { M_VGA_M80x30, 0, 80, 30, 8, 16, 2, 1, 305 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 306 { M_VGA_C80x30, V_INFO_COLOR, 80, 30, 8, 16, 4, 1, 307 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 308 { M_VGA_M80x50, 0, 80, 50, 8, 8, 2, 1, 309 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 310 { M_VGA_C80x50, V_INFO_COLOR, 80, 50, 8, 8, 4, 1, 311 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 312 { M_VGA_M80x60, 0, 80, 60, 8, 8, 2, 1, 313 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 314 { M_VGA_C80x60, V_INFO_COLOR, 80, 60, 8, 8, 4, 1, 315 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 316 317 #ifndef VGA_NO_MODE_CHANGE 318 319 #ifdef VGA_WIDTH90 320 { M_VGA_M90x25, 0, 90, 25, 8, 16, 2, 1, 321 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 322 { M_VGA_C90x25, V_INFO_COLOR, 90, 25, 8, 16, 4, 1, 323 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 324 { M_VGA_M90x30, 0, 90, 30, 8, 16, 2, 1, 325 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 326 { M_VGA_C90x30, V_INFO_COLOR, 90, 30, 8, 16, 4, 1, 327 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 328 { M_VGA_M90x43, 0, 90, 43, 8, 8, 2, 1, 329 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 330 { M_VGA_C90x43, V_INFO_COLOR, 90, 43, 8, 8, 4, 1, 331 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 332 { M_VGA_M90x50, 0, 90, 50, 8, 8, 2, 1, 333 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 334 { M_VGA_C90x50, V_INFO_COLOR, 90, 50, 8, 8, 4, 1, 335 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 336 { M_VGA_M90x60, 0, 90, 60, 8, 8, 2, 1, 337 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 338 { M_VGA_C90x60, V_INFO_COLOR, 90, 60, 8, 8, 4, 1, 339 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 340 #endif /* VGA_WIDTH90 */ 341 342 /* CGA */ 343 { M_BG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 2, 1, 344 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 345 { M_CG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 2, 1, 346 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 347 { M_BG640, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8, 8, 1, 1, 348 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 349 /* EGA */ 350 { M_CG320_D, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 4, 4, 351 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 352 V_INFO_MM_PLANAR }, 353 { M_CG640_E, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8, 8, 4, 4, 354 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 355 V_INFO_MM_PLANAR }, 356 { M_EGAMONOAPA, V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 357 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, 64*1024, 0, 0 , 358 V_INFO_MM_PLANAR }, 359 { M_ENHMONOAPA2,V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 360 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 361 V_INFO_MM_PLANAR }, 362 { M_CG640x350, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 2, 2, 363 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 364 V_INFO_MM_PLANAR }, 365 { M_ENH_CG640, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 366 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 367 V_INFO_MM_PLANAR }, 368 /* VGA */ 369 { M_BG640x480, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4, 370 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 371 V_INFO_MM_PLANAR }, 372 { M_CG640x480, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4, 373 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 374 V_INFO_MM_PLANAR }, 375 { M_VGA_CG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 8, 1, 376 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 377 V_INFO_MM_PACKED, 1 }, 378 { M_VGA_MODEX, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 240, 8, 8, 8, 4, 379 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 380 V_INFO_MM_VGAX, 1 }, 381 #endif /* VGA_NO_MODE_CHANGE */ 382 383 { EOT }, 384 }; 385 386 static int vga_init_done = FALSE; 387 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 388 static u_char *video_mode_ptr = NULL; /* EGA/VGA */ 389 static u_char *video_mode_ptr2 = NULL; /* CGA/MDA */ 390 #endif 391 static u_char *mode_map[V_MODE_MAP_SIZE]; 392 static adp_state_t adpstate; 393 static adp_state_t adpstate2; 394 static int rows_offset = 1; 395 396 /* local macros and functions */ 397 #define BIOS_SADDRTOLADDR(p) ((((p) & 0xffff0000) >> 12) + ((p) & 0x0000ffff)) 398 399 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 400 static void map_mode_table(u_char *map[], u_char *table, int max); 401 #endif 402 static void clear_mode_map(video_adapter_t *adp, u_char *map[], int max, 403 int color); 404 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 405 static int map_mode_num(int mode); 406 #endif 407 static int map_gen_mode_num(int type, int color, int mode); 408 static int map_bios_mode_num(int type, int color, int bios_mode); 409 static u_char *get_mode_param(int mode); 410 #ifndef VGA_NO_BIOS 411 static void fill_adapter_param(int code, video_adapter_t *adp); 412 #endif 413 static int verify_adapter(video_adapter_t *adp); 414 static void update_adapter_info(video_adapter_t *adp, video_info_t *info); 415 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 416 #define COMP_IDENTICAL 0 417 #define COMP_SIMILAR 1 418 #define COMP_DIFFERENT 2 419 static int comp_adpregs(u_char *buf1, u_char *buf2); 420 #endif 421 static int probe_adapters(void); 422 static int set_line_length(video_adapter_t *adp, int pixel); 423 static int set_display_start(video_adapter_t *adp, int x, int y); 424 425 #ifndef VGA_NO_MODE_CHANGE 426 #ifdef VGA_WIDTH90 427 static void set_width90(adp_state_t *params); 428 #endif 429 #endif /* !VGA_NO_MODE_CHANGE */ 430 431 #ifndef VGA_NO_FONT_LOADING 432 #define PARAM_BUFSIZE 6 433 static void set_font_mode(video_adapter_t *adp, u_char *buf); 434 static void set_normal_mode(video_adapter_t *adp, u_char *buf); 435 #endif 436 437 #ifndef VGA_NO_MODE_CHANGE 438 static void filll_io(int val, vm_offset_t d, size_t size); 439 static void planar_fill(video_adapter_t *adp, int val); 440 static void packed_fill(video_adapter_t *adp, int val); 441 static void direct_fill(video_adapter_t *adp, int val); 442 #ifdef notyet 443 static void planar_fill_rect(video_adapter_t *adp, int val, int x, int y, 444 int cx, int cy); 445 static void packed_fill_rect(video_adapter_t *adp, int val, int x, int y, 446 int cx, int cy); 447 static void direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, 448 int cx, int cy); 449 static void direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, 450 int cx, int cy); 451 static void direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, 452 int cx, int cy); 453 #endif /* notyet */ 454 #endif /* !VGA_NO_MODE_CHANGE */ 455 456 static void dump_buffer(u_char *buf, size_t len); 457 458 #define ISMAPPED(pa, width) \ 459 (((pa) <= (u_long)0x1000 - (width)) \ 460 || ((pa) >= ISA_HOLE_START && (pa) <= 0x100000 - (width))) 461 462 #define prologue(adp, flag, err) \ 463 if (!vga_init_done || !((adp)->va_flags & (flag))) \ 464 return (err) 465 466 /* a backdoor for the console driver */ 467 static int 468 vga_configure(int flags) 469 { 470 int i; 471 472 probe_adapters(); 473 for (i = 0; i < biosadapters; ++i) { 474 if (!probe_done(&biosadapter[i])) 475 continue; 476 biosadapter[i].va_flags |= V_ADP_INITIALIZED; 477 if (!config_done(&biosadapter[i])) { 478 if (vid_register(&biosadapter[i]) < 0) 479 continue; 480 biosadapter[i].va_flags |= V_ADP_REGISTERED; 481 } 482 } 483 if (vga_sub_configure != NULL) 484 (*vga_sub_configure)(flags); 485 486 return biosadapters; 487 } 488 489 /* local subroutines */ 490 491 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 492 /* construct the mode parameter map */ 493 static void 494 map_mode_table(u_char *map[], u_char *table, int max) 495 { 496 int i; 497 498 for(i = 0; i < max; ++i) 499 map[i] = table + i*V_MODE_PARAM_SIZE; 500 for(; i < V_MODE_MAP_SIZE; ++i) 501 map[i] = NULL; 502 } 503 #endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 504 505 static void 506 clear_mode_map(video_adapter_t *adp, u_char *map[], int max, int color) 507 { 508 video_info_t info; 509 int i; 510 511 /* 512 * NOTE: we don't touch `bios_vmode[]' because it is shared 513 * by all adapters. 514 */ 515 for(i = 0; i < max; ++i) { 516 if (vga_get_info(adp, i, &info)) 517 continue; 518 if ((info.vi_flags & V_INFO_COLOR) != color) 519 map[i] = NULL; 520 } 521 } 522 523 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 524 /* map the non-standard video mode to a known mode number */ 525 static int 526 map_mode_num(int mode) 527 { 528 static struct { 529 int from; 530 int to; 531 } mode_map[] = { 532 { M_ENH_B80x43, M_ENH_B80x25 }, 533 { M_ENH_C80x43, M_ENH_C80x25 }, 534 { M_VGA_M80x30, M_VGA_M80x25 }, 535 { M_VGA_C80x30, M_VGA_C80x25 }, 536 { M_VGA_M80x50, M_VGA_M80x25 }, 537 { M_VGA_C80x50, M_VGA_C80x25 }, 538 { M_VGA_M80x60, M_VGA_M80x25 }, 539 { M_VGA_C80x60, M_VGA_C80x25 }, 540 #ifdef VGA_WIDTH90 541 { M_VGA_M90x25, M_VGA_M80x25 }, 542 { M_VGA_C90x25, M_VGA_C80x25 }, 543 { M_VGA_M90x30, M_VGA_M80x25 }, 544 { M_VGA_C90x30, M_VGA_C80x25 }, 545 { M_VGA_M90x43, M_VGA_M80x25 }, 546 { M_VGA_C90x43, M_ENH_C80x25 }, 547 { M_VGA_M90x50, M_VGA_M80x25 }, 548 { M_VGA_C90x50, M_VGA_C80x25 }, 549 { M_VGA_M90x60, M_VGA_M80x25 }, 550 { M_VGA_C90x60, M_VGA_C80x25 }, 551 #endif 552 { M_VGA_MODEX, M_VGA_CG320 }, 553 }; 554 int i; 555 556 for (i = 0; i < nitems(mode_map); ++i) { 557 if (mode_map[i].from == mode) 558 return mode_map[i].to; 559 } 560 return mode; 561 } 562 #endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 563 564 /* map a generic video mode to a known mode number */ 565 static int 566 map_gen_mode_num(int type, int color, int mode) 567 { 568 static struct { 569 int from; 570 int to_color; 571 int to_mono; 572 } mode_map[] = { 573 { M_TEXT_80x30, M_VGA_C80x30, M_VGA_M80x30, }, 574 { M_TEXT_80x43, M_ENH_C80x43, M_ENH_B80x43, }, 575 { M_TEXT_80x50, M_VGA_C80x50, M_VGA_M80x50, }, 576 { M_TEXT_80x60, M_VGA_C80x60, M_VGA_M80x60, }, 577 }; 578 int i; 579 580 if (mode == M_TEXT_80x25) { 581 switch (type) { 582 583 case KD_VGA: 584 if (color) 585 return M_VGA_C80x25; 586 else 587 return M_VGA_M80x25; 588 break; 589 590 case KD_EGA: 591 if (color) 592 return M_ENH_C80x25; 593 else 594 return M_EGAMONO80x25; 595 break; 596 597 case KD_CGA: 598 return M_C80x25; 599 600 case KD_MONO: 601 case KD_HERCULES: 602 return M_EGAMONO80x25; /* XXX: this name is confusing */ 603 604 default: 605 return -1; 606 } 607 } 608 609 for (i = 0; i < nitems(mode_map); ++i) { 610 if (mode_map[i].from == mode) 611 return ((color) ? mode_map[i].to_color : mode_map[i].to_mono); 612 } 613 return mode; 614 } 615 616 /* turn the BIOS video number into our video mode number */ 617 static int 618 map_bios_mode_num(int type, int color, int bios_mode) 619 { 620 static int cga_modes[7] = { 621 M_B40x25, M_C40x25, /* 0, 1 */ 622 M_B80x25, M_C80x25, /* 2, 3 */ 623 M_BG320, M_CG320, 624 M_BG640, 625 }; 626 static int ega_modes[17] = { 627 M_ENH_B40x25, M_ENH_C40x25, /* 0, 1 */ 628 M_ENH_B80x25, M_ENH_C80x25, /* 2, 3 */ 629 M_BG320, M_CG320, 630 M_BG640, 631 M_EGAMONO80x25, /* 7 */ 632 8, 9, 10, 11, 12, 633 M_CG320_D, 634 M_CG640_E, 635 M_ENHMONOAPA2, /* XXX: video momery > 64K */ 636 M_ENH_CG640, /* XXX: video momery > 64K */ 637 }; 638 static int vga_modes[20] = { 639 M_VGA_C40x25, M_VGA_C40x25, /* 0, 1 */ 640 M_VGA_C80x25, M_VGA_C80x25, /* 2, 3 */ 641 M_BG320, M_CG320, 642 M_BG640, 643 M_VGA_M80x25, /* 7 */ 644 8, 9, 10, 11, 12, 645 M_CG320_D, 646 M_CG640_E, 647 M_ENHMONOAPA2, 648 M_ENH_CG640, 649 M_BG640x480, M_CG640x480, 650 M_VGA_CG320, 651 }; 652 653 switch (type) { 654 655 case KD_VGA: 656 if (bios_mode < nitems(vga_modes)) 657 return vga_modes[bios_mode]; 658 else if (color) 659 return M_VGA_C80x25; 660 else 661 return M_VGA_M80x25; 662 break; 663 664 case KD_EGA: 665 if (bios_mode < nitems(ega_modes)) 666 return ega_modes[bios_mode]; 667 else if (color) 668 return M_ENH_C80x25; 669 else 670 return M_EGAMONO80x25; 671 break; 672 673 case KD_CGA: 674 if (bios_mode < nitems(cga_modes)) 675 return cga_modes[bios_mode]; 676 else 677 return M_C80x25; 678 break; 679 680 case KD_MONO: 681 case KD_HERCULES: 682 return M_EGAMONO80x25; /* XXX: this name is confusing */ 683 684 default: 685 break; 686 } 687 return -1; 688 } 689 690 /* look up a parameter table entry */ 691 static u_char 692 *get_mode_param(int mode) 693 { 694 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 695 if (mode >= V_MODE_MAP_SIZE) 696 mode = map_mode_num(mode); 697 #endif 698 if ((mode >= 0) && (mode < V_MODE_MAP_SIZE)) 699 return mode_map[mode]; 700 else 701 return NULL; 702 } 703 704 #ifndef VGA_NO_BIOS 705 static void 706 fill_adapter_param(int code, video_adapter_t *adp) 707 { 708 static struct { 709 int primary; 710 int secondary; 711 } dcc[] = { 712 { DCC_MONO, DCC_EGA40 /* CGA monitor */ }, 713 { DCC_MONO, DCC_EGA80 /* CGA monitor */ }, 714 { DCC_MONO, DCC_EGA80 }, 715 { DCC_MONO, DCC_EGA80 }, 716 { DCC_CGA40, DCC_EGAMONO }, 717 { DCC_CGA80, DCC_EGAMONO }, 718 { DCC_EGA40 /* CGA monitor */, DCC_MONO}, 719 { DCC_EGA80 /* CGA monitor */, DCC_MONO}, 720 { DCC_EGA80, DCC_MONO }, 721 { DCC_EGA80, DCC_MONO }, 722 { DCC_EGAMONO, DCC_CGA40 }, 723 { DCC_EGAMONO, DCC_CGA80 }, 724 }; 725 726 if ((code < 0) || (code >= nitems(dcc))) { 727 adp[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO]; 728 adp[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80]; 729 } else { 730 adp[V_ADP_PRIMARY] = adapter_init_value[dcc[code].primary]; 731 adp[V_ADP_SECONDARY] = adapter_init_value[dcc[code].secondary]; 732 } 733 } 734 #endif /* VGA_NO_BIOS */ 735 736 static int 737 verify_adapter(video_adapter_t *adp) 738 { 739 vm_offset_t buf; 740 u_int16_t v; 741 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 742 u_int32_t p; 743 #endif 744 745 buf = BIOS_PADDRTOVADDR(adp->va_window); 746 v = readw(buf); 747 writew(buf, 0xA55A); 748 if (readw(buf) != 0xA55A) 749 return ENXIO; 750 writew(buf, v); 751 752 switch (adp->va_type) { 753 754 case KD_EGA: 755 outb(adp->va_crtc_addr, 7); 756 if (inb(adp->va_crtc_addr) == 7) { 757 adp->va_type = KD_VGA; 758 adp->va_name = "vga"; 759 adp->va_flags |= V_ADP_STATESAVE | V_ADP_PALETTE; 760 } 761 adp->va_flags |= V_ADP_STATELOAD | V_ADP_BORDER; 762 /* the color adapter may be in the 40x25 mode... XXX */ 763 764 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 765 /* get the BIOS video mode pointer */ 766 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8); 767 p = BIOS_SADDRTOLADDR(p); 768 if (ISMAPPED(p, sizeof(u_int32_t))) { 769 p = *(u_int32_t *)BIOS_PADDRTOVADDR(p); 770 p = BIOS_SADDRTOLADDR(p); 771 if (ISMAPPED(p, V_MODE_PARAM_SIZE)) 772 video_mode_ptr = (u_char *)BIOS_PADDRTOVADDR(p); 773 } 774 #endif 775 break; 776 777 case KD_CGA: 778 adp->va_flags |= V_ADP_COLOR | V_ADP_BORDER; 779 /* may be in the 40x25 mode... XXX */ 780 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 781 /* get the BIOS video mode pointer */ 782 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4); 783 p = BIOS_SADDRTOLADDR(p); 784 video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p); 785 #endif 786 break; 787 788 case KD_MONO: 789 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 790 /* get the BIOS video mode pointer */ 791 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4); 792 p = BIOS_SADDRTOLADDR(p); 793 video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p); 794 #endif 795 break; 796 } 797 798 return 0; 799 } 800 801 static void 802 update_adapter_info(video_adapter_t *adp, video_info_t *info) 803 { 804 adp->va_flags &= ~V_ADP_COLOR; 805 adp->va_flags |= 806 (info->vi_flags & V_INFO_COLOR) ? V_ADP_COLOR : 0; 807 adp->va_crtc_addr = 808 (adp->va_flags & V_ADP_COLOR) ? COLOR_CRTC : MONO_CRTC; 809 adp->va_window = BIOS_PADDRTOVADDR(info->vi_window); 810 adp->va_window_size = info->vi_window_size; 811 adp->va_window_gran = info->vi_window_gran; 812 adp->va_window_orig = 0; 813 /* XXX */ 814 adp->va_buffer = info->vi_buffer; 815 adp->va_buffer_size = info->vi_buffer_size; 816 adp->va_flags &= ~V_ADP_CWIDTH9; 817 if (info->vi_flags & V_INFO_CWIDTH9) 818 adp->va_flags |= V_ADP_CWIDTH9; 819 if (info->vi_mem_model == V_INFO_MM_VGAX) { 820 adp->va_line_width = info->vi_width/2; 821 } else if (info->vi_flags & V_INFO_GRAPHICS) { 822 switch (info->vi_depth/info->vi_planes) { 823 case 1: 824 adp->va_line_width = info->vi_width/8; 825 break; 826 case 2: 827 adp->va_line_width = info->vi_width/4; 828 break; 829 case 4: 830 adp->va_line_width = info->vi_width/2; 831 break; 832 case 8: 833 default: /* shouldn't happen */ 834 adp->va_line_width = info->vi_width; 835 break; 836 } 837 } else { 838 adp->va_line_width = info->vi_width; 839 } 840 adp->va_disp_start.x = 0; 841 adp->va_disp_start.y = 0; 842 bcopy(info, &adp->va_info, sizeof(adp->va_info)); 843 } 844 845 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 846 /* compare two parameter table entries */ 847 static int 848 comp_adpregs(u_char *buf1, u_char *buf2) 849 { 850 static struct { 851 u_char mask; 852 } params[V_MODE_PARAM_SIZE] = { 853 {0xff}, {0x00}, {0xff}, /* COLS}, ROWS}, POINTS */ 854 {0x00}, {0x00}, /* page length */ 855 {0xfe}, {0xff}, {0xff}, {0xff}, /* sequencer registers */ 856 {0xf3}, /* misc register */ 857 {0xff}, {0xff}, {0xff}, {0x7f}, {0xff}, /* CRTC */ 858 {0xff}, {0xff}, {0xff}, {0x7f}, {0xff}, 859 {0x00}, {0x00}, {0x00}, {0x00}, {0x00}, 860 {0x00}, {0xff}, {0x7f}, {0xff}, {0xff}, 861 {0x7f}, {0xff}, {0xff}, {0xef}, {0xff}, 862 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, /* attribute controller regs */ 863 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, 864 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, 865 {0xff}, {0xff}, {0xff}, {0xff}, {0xf0}, 866 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, /* GDC register */ 867 {0xff}, {0xff}, {0xff}, {0xff}, 868 }; 869 int identical = TRUE; 870 int i; 871 872 if ((buf1 == NULL) || (buf2 == NULL)) 873 return COMP_DIFFERENT; 874 875 for (i = 0; i < nitems(params); ++i) { 876 if (params[i].mask == 0) /* don't care */ 877 continue; 878 if ((buf1[i] & params[i].mask) != (buf2[i] & params[i].mask)) 879 return COMP_DIFFERENT; 880 if (buf1[i] != buf2[i]) 881 identical = FALSE; 882 } 883 return (identical) ? COMP_IDENTICAL : COMP_SIMILAR; 884 } 885 #endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 886 887 /* probe video adapters and return the number of detected adapters */ 888 static int 889 probe_adapters(void) 890 { 891 video_adapter_t *adp; 892 video_info_t info; 893 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 894 u_char *mp; 895 #endif 896 int height, i, width; 897 898 /* do this test only once */ 899 if (vga_init_done) 900 return biosadapters; 901 vga_init_done = TRUE; 902 903 /* 904 * Locate display adapters. 905 * The AT architecture supports up to two adapters. `syscons' allows 906 * the following combinations of adapters: 907 * 1) MDA + CGA 908 * 2) MDA + EGA/VGA color 909 * 3) CGA + EGA/VGA mono 910 * Note that `syscons' doesn't bother with MCGA as it is only 911 * avaiable for low end PS/2 models which has 80286 or earlier CPUs, 912 * thus, they are not running FreeBSD! 913 * When there are two adapaters in the system, one becomes `primary' 914 * and the other `secondary'. The EGA adapter has a set of DIP 915 * switches on board for this information and the EGA BIOS copies 916 * it in the BIOS data area BIOSDATA_VIDEOSWITCH (40:88). 917 * The VGA BIOS has more sophisticated mechanism and has this 918 * information in BIOSDATA_DCCINDEX (40:8a), but it also maintains 919 * compatibility with the EGA BIOS by updating BIOSDATA_VIDEOSWITCH. 920 */ 921 922 /* 923 * Check rtc and BIOS data area. 924 * XXX: we don't use BIOSDATA_EQUIPMENT, since it is not a dead 925 * copy of RTC_EQUIPMENT. Bits 4 and 5 of ETC_EQUIPMENT are 926 * zeros for EGA and VGA. However, the EGA/VGA BIOS sets 927 * these bits in BIOSDATA_EQUIPMENT according to the monitor 928 * type detected. 929 */ 930 #ifndef VGA_NO_BIOS 931 if (*(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8)) { 932 /* EGA/VGA BIOS is present */ 933 fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f, 934 biosadapter); 935 } else { 936 switch ((rtcin(RTC_EQUIPMENT) >> 4) & 3) { /* bit 4 and 5 */ 937 case 0: 938 /* EGA/VGA: shouldn't be happening */ 939 fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f, 940 biosadapter); 941 break; 942 case 1: 943 /* CGA 40x25 */ 944 /* FIXME: switch to the 80x25 mode? XXX */ 945 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA40]; 946 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 947 break; 948 case 2: 949 /* CGA 80x25 */ 950 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA80]; 951 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 952 break; 953 case 3: 954 /* MDA */ 955 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO]; 956 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80]; 957 break; 958 } 959 } 960 #else 961 /* assume EGA/VGA? XXX */ 962 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_EGA80]; 963 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 964 #endif /* VGA_NO_BIOS */ 965 966 biosadapters = 0; 967 if (verify_adapter(&biosadapter[V_ADP_SECONDARY]) == 0) { 968 ++biosadapters; 969 biosadapter[V_ADP_SECONDARY].va_flags |= V_ADP_PROBED; 970 biosadapter[V_ADP_SECONDARY].va_mode = 971 biosadapter[V_ADP_SECONDARY].va_initial_mode = 972 map_bios_mode_num(biosadapter[V_ADP_SECONDARY].va_type, 973 biosadapter[V_ADP_SECONDARY].va_flags 974 & V_ADP_COLOR, 975 biosadapter[V_ADP_SECONDARY].va_initial_bios_mode); 976 } else { 977 biosadapter[V_ADP_SECONDARY].va_type = -1; 978 } 979 if (verify_adapter(&biosadapter[V_ADP_PRIMARY]) == 0) { 980 ++biosadapters; 981 biosadapter[V_ADP_PRIMARY].va_flags |= V_ADP_PROBED; 982 #ifndef VGA_NO_BIOS 983 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 984 readb(BIOS_PADDRTOVADDR(0x449)); 985 #else 986 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 3; /* XXX */ 987 #endif 988 biosadapter[V_ADP_PRIMARY].va_mode = 989 biosadapter[V_ADP_PRIMARY].va_initial_mode = 990 map_bios_mode_num(biosadapter[V_ADP_PRIMARY].va_type, 991 biosadapter[V_ADP_PRIMARY].va_flags & V_ADP_COLOR, 992 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode); 993 } else { 994 biosadapter[V_ADP_PRIMARY] = biosadapter[V_ADP_SECONDARY]; 995 biosadapter[V_ADP_SECONDARY].va_type = -1; 996 } 997 if (biosadapters == 0) 998 return biosadapters; 999 biosadapter[V_ADP_PRIMARY].va_unit = V_ADP_PRIMARY; 1000 biosadapter[V_ADP_SECONDARY].va_unit = V_ADP_SECONDARY; 1001 1002 #if 0 /* we don't need these... */ 1003 fb_init_struct(&biosadapter[V_ADP_PRIMARY], ...); 1004 fb_init_struct(&biosadapter[V_ADP_SECONDARY], ...); 1005 #endif 1006 1007 #ifdef notyet 1008 /* 1009 * We cannot have two video adapter of the same type; there must be 1010 * only one of color or mono adapter, or one each of them. 1011 */ 1012 if (biosadapters > 1) { 1013 if (!((biosadapter[0].va_flags ^ biosadapter[1].va_flags) 1014 & V_ADP_COLOR)) 1015 /* we have two mono or color adapters!! */ 1016 return (biosadapters = 0); 1017 } 1018 #endif 1019 1020 /* 1021 * Ensure a zero start address. The registers are w/o 1022 * for old hardware so it's too hard to relocate the active screen 1023 * memory. 1024 * This must be done before vga_save_state() for VGA. 1025 */ 1026 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 12); 1027 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0); 1028 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 13); 1029 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0); 1030 1031 /* the video mode parameter table in EGA/VGA BIOS */ 1032 /* NOTE: there can be only one EGA/VGA, wheather color or mono, 1033 * recognized by the video BIOS. 1034 */ 1035 if ((biosadapter[V_ADP_PRIMARY].va_type == KD_EGA) || 1036 (biosadapter[V_ADP_PRIMARY].va_type == KD_VGA)) { 1037 adp = &biosadapter[V_ADP_PRIMARY]; 1038 } else if ((biosadapter[V_ADP_SECONDARY].va_type == KD_EGA) || 1039 (biosadapter[V_ADP_SECONDARY].va_type == KD_VGA)) { 1040 adp = &biosadapter[V_ADP_SECONDARY]; 1041 } else { 1042 adp = NULL; 1043 } 1044 bzero(mode_map, sizeof(mode_map)); 1045 if (adp != NULL) { 1046 if (adp->va_type == KD_VGA) { 1047 vga_save_state(adp, &adpstate, sizeof(adpstate)); 1048 #if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE) 1049 mode_map[adp->va_initial_mode] = adpstate.regs; 1050 rows_offset = 1; 1051 #else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1052 if (video_mode_ptr == NULL) { 1053 mode_map[adp->va_initial_mode] = adpstate.regs; 1054 rows_offset = 1; 1055 } else { 1056 /* discard the table if we are not familiar with it... */ 1057 map_mode_table(mode_map, video_mode_ptr, M_VGA_CG320 + 1); 1058 mp = get_mode_param(adp->va_initial_mode); 1059 if (mp != NULL) 1060 bcopy(mp, adpstate2.regs, sizeof(adpstate2.regs)); 1061 switch (comp_adpregs(adpstate.regs, mp)) { 1062 case COMP_IDENTICAL: 1063 /* 1064 * OK, this parameter table looks reasonably familiar 1065 * to us... 1066 */ 1067 /* 1068 * This is a kludge for Toshiba DynaBook SS433 1069 * whose BIOS video mode table entry has the actual # 1070 * of rows at the offset 1; BIOSes from other 1071 * manufacturers store the # of rows - 1 there. XXX 1072 */ 1073 rows_offset = adpstate.regs[1] + 1 - mp[1]; 1074 break; 1075 1076 case COMP_SIMILAR: 1077 /* 1078 * Not exactly the same, but similar enough to be 1079 * trusted. However, use the saved register values 1080 * for the initial mode and other modes which are 1081 * based on the initial mode. 1082 */ 1083 mode_map[adp->va_initial_mode] = adpstate.regs; 1084 rows_offset = adpstate.regs[1] + 1 - mp[1]; 1085 adpstate.regs[1] -= rows_offset - 1; 1086 break; 1087 1088 case COMP_DIFFERENT: 1089 default: 1090 /* 1091 * Don't use the parameter table in the BIOS, since 1092 * even the BIOS doesn't use it for the initial mode. 1093 * Restrict the tweaked modes to (in practice) 80x50 1094 * from 80x25 with 400 scan lines, since the only safe 1095 * tweak is changing the characters from 8x16 to 8x8. 1096 */ 1097 video_mode_ptr = NULL; 1098 bzero(mode_map, sizeof(mode_map)); 1099 mode_map[adp->va_initial_mode] = adpstate.regs; 1100 rows_offset = 1; 1101 1102 width = height = -1; 1103 for (i = 0; i < nitems(bios_vmode); ++i) { 1104 if (bios_vmode[i].vi_mode == adp->va_initial_mode) { 1105 width = bios_vmode[i].vi_width; 1106 height = bios_vmode[i].vi_height; 1107 break; 1108 } 1109 } 1110 for (i = 0; i < nitems(bios_vmode); ++i) { 1111 if (bios_vmode[i].vi_mode != adp->va_initial_mode && 1112 map_mode_num(bios_vmode[i].vi_mode) == 1113 adp->va_initial_mode && 1114 (bios_vmode[i].vi_width != width || 1115 bios_vmode[i].vi_height != 2 * height)) { 1116 bios_vmode[i].vi_mode = NA; 1117 } 1118 } 1119 break; 1120 } 1121 } 1122 #endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1123 1124 #ifndef VGA_NO_MODE_CHANGE 1125 adp->va_flags |= V_ADP_MODECHANGE; 1126 #endif 1127 #ifndef VGA_NO_FONT_LOADING 1128 adp->va_flags |= V_ADP_FONT; 1129 #endif 1130 } else if (adp->va_type == KD_EGA) { 1131 #if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE) 1132 rows_offset = 1; 1133 #else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1134 if (video_mode_ptr == NULL) { 1135 rows_offset = 1; 1136 } else { 1137 map_mode_table(mode_map, video_mode_ptr, M_ENH_C80x25 + 1); 1138 /* XXX how can one validate the EGA table... */ 1139 mp = get_mode_param(adp->va_initial_mode); 1140 if (mp != NULL) { 1141 adp->va_flags |= V_ADP_MODECHANGE; 1142 #ifndef VGA_NO_FONT_LOADING 1143 adp->va_flags |= V_ADP_FONT; 1144 #endif 1145 rows_offset = 1; 1146 } else { 1147 /* 1148 * This is serious. We will not be able to switch video 1149 * modes at all... 1150 */ 1151 video_mode_ptr = NULL; 1152 bzero(mode_map, sizeof(mode_map)); 1153 rows_offset = 1; 1154 } 1155 } 1156 #endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1157 } 1158 } 1159 1160 /* remove conflicting modes if we have more than one adapter */ 1161 if (biosadapters > 0) { 1162 for (i = 0; i < biosadapters; ++i) { 1163 if (!(biosadapter[i].va_flags & V_ADP_MODECHANGE)) 1164 continue; 1165 clear_mode_map(&biosadapter[i], mode_map, M_VGA_CG320 + 1, 1166 (biosadapter[i].va_flags & V_ADP_COLOR) ? 1167 V_INFO_COLOR : 0); 1168 if ((biosadapter[i].va_type == KD_VGA) 1169 || (biosadapter[i].va_type == KD_EGA)) { 1170 biosadapter[i].va_io_base = 1171 (biosadapter[i].va_flags & V_ADP_COLOR) ? 1172 IO_VGA : IO_MDA; 1173 biosadapter[i].va_io_size = 32; 1174 } 1175 } 1176 } 1177 1178 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 1179 /* 1180 * Attempt to determine the real character width for each mode. 9 wide 1181 * is supposed to be standard for EGA mono mode and most VGA text modes, 1182 * but some hardware doesn't support it, so dynamic configuration is 1183 * needed. Bit 0 in sequencer register 1 is supposed control the width 1184 * (set = 8), but this is unreliable too. Trust that 0 in the sequencer 1185 * bit means 9 wide after verifying that 9 is consistent with some CRTC 1186 * timing. The ratio (Horizontal Total) / (Horizontal Displayed) is 1187 * about 1.2 in all standard 9-wide modes and should be about 9/8 larger 1188 * again in similar 8-wide modes; in practice it is usually about 1.4 1189 * times larger. 1190 */ 1191 for (i = 0; i < nitems(bios_vmode); ++i) { 1192 if (bios_vmode[i].vi_mem_model == V_INFO_MM_TEXT && 1193 bios_vmode[i].vi_width != 90) { 1194 mp = get_mode_param(map_mode_num(bios_vmode[i].vi_mode)); 1195 if (mp != NULL && !(mp[5] & 1) && mp[10] <= mp[11] * 125 / 100) 1196 bios_vmode[i].vi_flags |= V_INFO_CWIDTH9; 1197 } 1198 } 1199 #endif 1200 1201 /* buffer address */ 1202 vga_get_info(&biosadapter[V_ADP_PRIMARY], 1203 biosadapter[V_ADP_PRIMARY].va_initial_mode, &info); 1204 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1205 update_adapter_info(&biosadapter[V_ADP_PRIMARY], &info); 1206 1207 if (biosadapters > 1) { 1208 vga_get_info(&biosadapter[V_ADP_SECONDARY], 1209 biosadapter[V_ADP_SECONDARY].va_initial_mode, &info); 1210 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1211 update_adapter_info(&biosadapter[V_ADP_SECONDARY], &info); 1212 } 1213 1214 /* 1215 * XXX: we should verify the following values for the primary adapter... 1216 * crtc I/O port address: *(u_int16_t *)BIOS_PADDRTOVADDR(0x463); 1217 * color/mono display: (*(u_int8_t *)BIOS_PADDRTOVADDR(0x487) & 0x02) 1218 * ? 0 : V_ADP_COLOR; 1219 * columns: *(u_int8_t *)BIOS_PADDRTOVADDR(0x44a); 1220 * rows: *(u_int8_t *)BIOS_PADDRTOVADDR(0x484); 1221 * font size: *(u_int8_t *)BIOS_PADDRTOVADDR(0x485); 1222 * buffer size: *(u_int16_t *)BIOS_PADDRTOVADDR(0x44c); 1223 */ 1224 1225 return biosadapters; 1226 } 1227 1228 /* set the scan line length in pixel */ 1229 static int 1230 set_line_length(video_adapter_t *adp, int pixel) 1231 { 1232 u_char *mp; 1233 int ppw; /* pixels per word */ 1234 int bpl; /* bytes per line */ 1235 int count; 1236 1237 if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA)) 1238 return ENODEV; 1239 mp = get_mode_param(adp->va_mode); 1240 if (mp == NULL) 1241 return EINVAL; 1242 1243 switch (adp->va_info.vi_mem_model) { 1244 case V_INFO_MM_PLANAR: 1245 ppw = 16/(adp->va_info.vi_depth/adp->va_info.vi_planes); 1246 count = howmany(pixel, ppw)/2; 1247 bpl = (howmany(pixel, ppw)/2)*4; 1248 break; 1249 case V_INFO_MM_PACKED: 1250 count = (pixel + 7)/8; 1251 bpl = rounddown(pixel + 7, 8); 1252 break; 1253 case V_INFO_MM_TEXT: 1254 count = (pixel + 7)/8; /* columns */ 1255 bpl = (pixel + 7)/8; /* columns */ 1256 break; 1257 default: 1258 return ENODEV; 1259 } 1260 1261 if (mp[10 + 0x17] & 0x40) /* CRTC mode control reg */ 1262 count *= 2; /* byte mode */ 1263 outb(adp->va_crtc_addr, 0x13); 1264 outb(adp->va_crtc_addr + 1, count); 1265 adp->va_line_width = bpl; 1266 1267 return 0; 1268 } 1269 1270 static int 1271 set_display_start(video_adapter_t *adp, int x, int y) 1272 { 1273 int off; /* byte offset (graphics mode)/word offset (text mode) */ 1274 int poff; /* pixel offset */ 1275 int roff; /* row offset */ 1276 int ppb; /* pixels per byte */ 1277 1278 if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA)) 1279 x &= ~7; 1280 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) { 1281 ppb = 8/(adp->va_info.vi_depth/adp->va_info.vi_planes); 1282 off = y*adp->va_line_width + x/ppb; 1283 roff = 0; 1284 poff = x%ppb; 1285 } else { 1286 if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) { 1287 outb(TSIDX, 1); 1288 if (inb(TSREG) & 1) 1289 ppb = 9; 1290 else 1291 ppb = 8; 1292 } else { 1293 ppb = 8; 1294 } 1295 off = y/adp->va_info.vi_cheight*adp->va_line_width + x/ppb; 1296 roff = y%adp->va_info.vi_cheight; 1297 /* FIXME: is this correct? XXX */ 1298 if (ppb == 8) 1299 poff = x%ppb; 1300 else 1301 poff = (x + 8)%ppb; 1302 } 1303 1304 /* start address */ 1305 outb(adp->va_crtc_addr, 0xc); /* high */ 1306 outb(adp->va_crtc_addr + 1, off >> 8); 1307 outb(adp->va_crtc_addr, 0xd); /* low */ 1308 outb(adp->va_crtc_addr + 1, off & 0xff); 1309 1310 /* horizontal pel pan */ 1311 if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) { 1312 inb(adp->va_crtc_addr + 6); 1313 outb(ATC, 0x13 | 0x20); 1314 outb(ATC, poff); 1315 inb(adp->va_crtc_addr + 6); 1316 outb(ATC, 0x20); 1317 } 1318 1319 /* preset raw scan */ 1320 outb(adp->va_crtc_addr, 8); 1321 outb(adp->va_crtc_addr + 1, roff); 1322 1323 adp->va_disp_start.x = x; 1324 adp->va_disp_start.y = y; 1325 return 0; 1326 } 1327 1328 #ifndef VGA_NO_MODE_CHANGE 1329 #if defined(__i386__) || defined(__amd64__) /* XXX */ 1330 static void 1331 fill(int val, void *d, size_t size) 1332 { 1333 u_char *p = d; 1334 1335 while (size-- > 0) 1336 *p++ = val; 1337 } 1338 #endif /* __i386__ */ 1339 1340 static void 1341 filll_io(int val, vm_offset_t d, size_t size) 1342 { 1343 while (size-- > 0) { 1344 writel(d, val); 1345 d += sizeof(u_int32_t); 1346 } 1347 } 1348 #endif /* !VGA_NO_MODE_CHANGE */ 1349 1350 /* entry points */ 1351 1352 #if 0 1353 static int 1354 vga_nop(void) 1355 { 1356 return 0; 1357 } 1358 #endif 1359 1360 static int 1361 vga_error(void) 1362 { 1363 return ENODEV; 1364 } 1365 1366 static int 1367 vga_probe(int unit, video_adapter_t **adpp, void *arg, int flags) 1368 { 1369 probe_adapters(); 1370 if (unit >= biosadapters) 1371 return ENXIO; 1372 1373 *adpp = &biosadapter[unit]; 1374 1375 return 0; 1376 } 1377 1378 static int 1379 vga_init(int unit, video_adapter_t *adp, int flags) 1380 { 1381 if ((unit >= biosadapters) || (adp == NULL) || !probe_done(adp)) 1382 return ENXIO; 1383 1384 if (!init_done(adp)) { 1385 /* nothing to do really... */ 1386 adp->va_flags |= V_ADP_INITIALIZED; 1387 } 1388 1389 if (!config_done(adp)) { 1390 if (vid_register(adp) < 0) 1391 return ENXIO; 1392 adp->va_flags |= V_ADP_REGISTERED; 1393 } 1394 if (vga_sub_configure != NULL) 1395 (*vga_sub_configure)(0); 1396 1397 return 0; 1398 } 1399 1400 /* 1401 * get_info(): 1402 * Return the video_info structure of the requested video mode. 1403 * 1404 * all adapters 1405 */ 1406 static int 1407 vga_get_info(video_adapter_t *adp, int mode, video_info_t *info) 1408 { 1409 int i; 1410 1411 if (!vga_init_done) 1412 return ENXIO; 1413 1414 mode = map_gen_mode_num(adp->va_type, adp->va_flags & V_ADP_COLOR, mode); 1415 #ifndef VGA_NO_MODE_CHANGE 1416 if (adp->va_flags & V_ADP_MODECHANGE) { 1417 /* 1418 * If the parameter table entry for this mode is not found, 1419 * the mode is not supported... 1420 */ 1421 if (get_mode_param(mode) == NULL) 1422 return EINVAL; 1423 } else 1424 #endif /* VGA_NO_MODE_CHANGE */ 1425 { 1426 /* 1427 * Even if we don't support video mode switching on this adapter, 1428 * the information on the initial (thus current) video mode 1429 * should be made available. 1430 */ 1431 if (mode != adp->va_initial_mode) 1432 return EINVAL; 1433 } 1434 1435 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 1436 if (bios_vmode[i].vi_mode == NA) 1437 continue; 1438 if (mode == bios_vmode[i].vi_mode) { 1439 *info = bios_vmode[i]; 1440 /* XXX */ 1441 info->vi_buffer_size = info->vi_window_size*info->vi_planes; 1442 return 0; 1443 } 1444 } 1445 return EINVAL; 1446 } 1447 1448 /* 1449 * query_mode(): 1450 * Find a video mode matching the requested parameters. 1451 * Fields filled with 0 are considered "don't care" fields and 1452 * match any modes. 1453 * 1454 * all adapters 1455 */ 1456 static int 1457 vga_query_mode(video_adapter_t *adp, video_info_t *info) 1458 { 1459 int i; 1460 1461 if (!vga_init_done) 1462 return ENXIO; 1463 1464 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 1465 if (bios_vmode[i].vi_mode == NA) 1466 continue; 1467 1468 if ((info->vi_width != 0) 1469 && (info->vi_width != bios_vmode[i].vi_width)) 1470 continue; 1471 if ((info->vi_height != 0) 1472 && (info->vi_height != bios_vmode[i].vi_height)) 1473 continue; 1474 if ((info->vi_cwidth != 0) 1475 && (info->vi_cwidth != bios_vmode[i].vi_cwidth)) 1476 continue; 1477 if ((info->vi_cheight != 0) 1478 && (info->vi_cheight != bios_vmode[i].vi_cheight)) 1479 continue; 1480 if ((info->vi_depth != 0) 1481 && (info->vi_depth != bios_vmode[i].vi_depth)) 1482 continue; 1483 if ((info->vi_planes != 0) 1484 && (info->vi_planes != bios_vmode[i].vi_planes)) 1485 continue; 1486 /* XXX: should check pixel format, memory model */ 1487 if ((info->vi_flags != 0) 1488 && (info->vi_flags != bios_vmode[i].vi_flags)) 1489 continue; 1490 1491 /* verify if this mode is supported on this adapter */ 1492 if (vga_get_info(adp, bios_vmode[i].vi_mode, info)) 1493 continue; 1494 return 0; 1495 } 1496 return ENODEV; 1497 } 1498 1499 /* 1500 * set_mode(): 1501 * Change the video mode. 1502 * 1503 * EGA/VGA 1504 */ 1505 1506 #ifndef VGA_NO_MODE_CHANGE 1507 #ifdef VGA_WIDTH90 1508 static void 1509 set_width90(adp_state_t *params) 1510 { 1511 /* 1512 * Based on code submitted by Kelly Yancey (kbyanc@freedomnet.com) 1513 * and alexv@sui.gda.itesm.mx. 1514 */ 1515 params->regs[5] |= 1; /* toggle 8 pixel wide fonts */ 1516 params->regs[10+0x0] = 0x6b; 1517 params->regs[10+0x1] = 0x59; 1518 params->regs[10+0x2] = 0x5a; 1519 params->regs[10+0x3] = 0x8e; 1520 params->regs[10+0x4] = 0x5e; 1521 params->regs[10+0x5] = 0x8a; 1522 params->regs[10+0x13] = 45; 1523 params->regs[35+0x13] = 0; 1524 } 1525 #endif /* VGA_WIDTH90 */ 1526 #endif /* !VGA_NO_MODE_CHANGE */ 1527 1528 static int 1529 vga_set_mode(video_adapter_t *adp, int mode) 1530 { 1531 #ifndef VGA_NO_MODE_CHANGE 1532 video_info_t info; 1533 adp_state_t params; 1534 1535 prologue(adp, V_ADP_MODECHANGE, ENODEV); 1536 1537 mode = map_gen_mode_num(adp->va_type, 1538 adp->va_flags & V_ADP_COLOR, mode); 1539 if (vga_get_info(adp, mode, &info)) 1540 return EINVAL; 1541 1542 #if VGA_DEBUG > 1 1543 printf("vga_set_mode(): setting mode %d\n", mode); 1544 #endif 1545 1546 params.sig = V_STATE_SIG; 1547 bcopy(get_mode_param(mode), params.regs, sizeof(params.regs)); 1548 1549 switch (mode) { 1550 #ifdef VGA_WIDTH90 1551 case M_VGA_C90x60: case M_VGA_M90x60: 1552 set_width90(¶ms); 1553 /* FALLTHROUGH */ 1554 #endif 1555 case M_VGA_C80x60: case M_VGA_M80x60: 1556 params.regs[2] = 0x08; 1557 params.regs[19] = 0x47; 1558 goto special_480l; 1559 1560 #ifdef VGA_WIDTH90 1561 case M_VGA_C90x30: case M_VGA_M90x30: 1562 set_width90(¶ms); 1563 /* FALLTHROUGH */ 1564 #endif 1565 case M_VGA_C80x30: case M_VGA_M80x30: 1566 params.regs[19] = 0x4f; 1567 special_480l: 1568 params.regs[9] |= 0xc0; 1569 params.regs[16] = 0x08; 1570 params.regs[17] = 0x3e; 1571 params.regs[26] = 0xea; 1572 params.regs[28] = 0xdf; 1573 params.regs[31] = 0xe7; 1574 params.regs[32] = 0x04; 1575 goto setup_mode; 1576 1577 #ifdef VGA_WIDTH90 1578 case M_VGA_C90x43: case M_VGA_M90x43: 1579 set_width90(¶ms); 1580 /* FALLTHROUGH */ 1581 #endif 1582 case M_ENH_C80x43: case M_ENH_B80x43: 1583 params.regs[28] = 87; 1584 goto special_80x50; 1585 1586 #ifdef VGA_WIDTH90 1587 case M_VGA_C90x50: case M_VGA_M90x50: 1588 set_width90(¶ms); 1589 /* FALLTHROUGH */ 1590 #endif 1591 case M_VGA_C80x50: case M_VGA_M80x50: 1592 special_80x50: 1593 params.regs[2] = 8; 1594 params.regs[19] = 7; 1595 goto setup_mode; 1596 1597 #ifdef VGA_WIDTH90 1598 case M_VGA_C90x25: case M_VGA_M90x25: 1599 set_width90(¶ms); 1600 /* FALLTHROUGH */ 1601 #endif 1602 case M_VGA_C40x25: case M_VGA_C80x25: 1603 case M_VGA_M80x25: 1604 case M_B40x25: case M_C40x25: 1605 case M_B80x25: case M_C80x25: 1606 case M_ENH_B40x25: case M_ENH_C40x25: 1607 case M_ENH_B80x25: case M_ENH_C80x25: 1608 case M_EGAMONO80x25: 1609 1610 setup_mode: 1611 vga_load_state(adp, ¶ms); 1612 break; 1613 1614 case M_VGA_MODEX: 1615 /* "unchain" the VGA mode */ 1616 params.regs[5-1+0x04] &= 0xf7; 1617 params.regs[5-1+0x04] |= 0x04; 1618 /* turn off doubleword mode */ 1619 params.regs[10+0x14] &= 0xbf; 1620 /* turn off word addressing */ 1621 params.regs[10+0x17] |= 0x40; 1622 /* set logical screen width */ 1623 params.regs[10+0x13] = 80; 1624 /* set 240 lines */ 1625 params.regs[10+0x11] = 0x2c; 1626 params.regs[10+0x06] = 0x0d; 1627 params.regs[10+0x07] = 0x3e; 1628 params.regs[10+0x10] = 0xea; 1629 params.regs[10+0x11] = 0xac; 1630 params.regs[10+0x12] = 0xdf; 1631 params.regs[10+0x15] = 0xe7; 1632 params.regs[10+0x16] = 0x06; 1633 /* set vertical sync polarity to reflect aspect ratio */ 1634 params.regs[9] = 0xe3; 1635 goto setup_grmode; 1636 1637 case M_BG320: case M_CG320: case M_BG640: 1638 case M_CG320_D: case M_CG640_E: 1639 case M_CG640x350: case M_ENH_CG640: 1640 case M_BG640x480: case M_CG640x480: case M_VGA_CG320: 1641 1642 setup_grmode: 1643 vga_load_state(adp, ¶ms); 1644 break; 1645 1646 default: 1647 return EINVAL; 1648 } 1649 1650 adp->va_mode = mode; 1651 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1652 update_adapter_info(adp, &info); 1653 1654 /* move hardware cursor out of the way */ 1655 vidd_set_hw_cursor(adp, -1, -1); 1656 1657 return 0; 1658 #else /* VGA_NO_MODE_CHANGE */ 1659 return ENODEV; 1660 #endif /* VGA_NO_MODE_CHANGE */ 1661 } 1662 1663 #ifndef VGA_NO_FONT_LOADING 1664 1665 static void 1666 set_font_mode(video_adapter_t *adp, u_char *buf) 1667 { 1668 u_char *mp; 1669 int s; 1670 1671 s = splhigh(); 1672 1673 /* save register values */ 1674 if (adp->va_type == KD_VGA) { 1675 outb(TSIDX, 0x02); buf[0] = inb(TSREG); 1676 outb(TSIDX, 0x04); buf[1] = inb(TSREG); 1677 outb(GDCIDX, 0x04); buf[2] = inb(GDCREG); 1678 outb(GDCIDX, 0x05); buf[3] = inb(GDCREG); 1679 outb(GDCIDX, 0x06); buf[4] = inb(GDCREG); 1680 inb(adp->va_crtc_addr + 6); 1681 outb(ATC, 0x10); buf[5] = inb(ATC + 1); 1682 } else /* if (adp->va_type == KD_EGA) */ { 1683 /* 1684 * EGA cannot be read; copy parameters from the mode parameter 1685 * table. 1686 */ 1687 mp = get_mode_param(adp->va_mode); 1688 buf[0] = mp[5 + 0x02 - 1]; 1689 buf[1] = mp[5 + 0x04 - 1]; 1690 buf[2] = mp[55 + 0x04]; 1691 buf[3] = mp[55 + 0x05]; 1692 buf[4] = mp[55 + 0x06]; 1693 buf[5] = mp[35 + 0x10]; 1694 } 1695 1696 /* setup vga for loading fonts */ 1697 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1698 outb(ATC, 0x10); outb(ATC, buf[5] & ~0x01); 1699 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1700 outb(ATC, 0x20); /* enable palette */ 1701 1702 #ifdef VGA_SLOW_IOACCESS 1703 #ifdef VGA_ALT_SEQACCESS 1704 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1705 #endif 1706 outb(TSIDX, 0x02); outb(TSREG, 0x04); 1707 outb(TSIDX, 0x04); outb(TSREG, 0x07); 1708 #ifdef VGA_ALT_SEQACCESS 1709 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1710 #endif 1711 outb(GDCIDX, 0x04); outb(GDCREG, 0x02); 1712 outb(GDCIDX, 0x05); outb(GDCREG, 0x00); 1713 outb(GDCIDX, 0x06); outb(GDCREG, 0x04); 1714 #else /* VGA_SLOW_IOACCESS */ 1715 #ifdef VGA_ALT_SEQACCESS 1716 outw(TSIDX, 0x0100); 1717 #endif 1718 outw(TSIDX, 0x0402); 1719 outw(TSIDX, 0x0704); 1720 #ifdef VGA_ALT_SEQACCESS 1721 outw(TSIDX, 0x0300); 1722 #endif 1723 outw(GDCIDX, 0x0204); 1724 outw(GDCIDX, 0x0005); 1725 outw(GDCIDX, 0x0406); /* addr = a0000, 64kb */ 1726 #endif /* VGA_SLOW_IOACCESS */ 1727 1728 splx(s); 1729 } 1730 1731 static void 1732 set_normal_mode(video_adapter_t *adp, u_char *buf) 1733 { 1734 int s; 1735 1736 s = splhigh(); 1737 1738 /* setup vga for normal operation mode again */ 1739 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1740 outb(ATC, 0x10); outb(ATC, buf[5]); 1741 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1742 outb(ATC, 0x20); /* enable palette */ 1743 1744 #ifdef VGA_SLOW_IOACCESS 1745 #ifdef VGA_ALT_SEQACCESS 1746 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1747 #endif 1748 outb(TSIDX, 0x02); outb(TSREG, buf[0]); 1749 outb(TSIDX, 0x04); outb(TSREG, buf[1]); 1750 #ifdef VGA_ALT_SEQACCESS 1751 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1752 #endif 1753 outb(GDCIDX, 0x04); outb(GDCREG, buf[2]); 1754 outb(GDCIDX, 0x05); outb(GDCREG, buf[3]); 1755 if (adp->va_crtc_addr == MONO_CRTC) { 1756 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x08); 1757 } else { 1758 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x0c); 1759 } 1760 #else /* VGA_SLOW_IOACCESS */ 1761 #ifdef VGA_ALT_SEQACCESS 1762 outw(TSIDX, 0x0100); 1763 #endif 1764 outw(TSIDX, 0x0002 | (buf[0] << 8)); 1765 outw(TSIDX, 0x0004 | (buf[1] << 8)); 1766 #ifdef VGA_ALT_SEQACCESS 1767 outw(TSIDX, 0x0300); 1768 #endif 1769 outw(GDCIDX, 0x0004 | (buf[2] << 8)); 1770 outw(GDCIDX, 0x0005 | (buf[3] << 8)); 1771 if (adp->va_crtc_addr == MONO_CRTC) 1772 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x08)<<8)); 1773 else 1774 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x0c)<<8)); 1775 #endif /* VGA_SLOW_IOACCESS */ 1776 1777 splx(s); 1778 } 1779 1780 #endif /* VGA_NO_FONT_LOADING */ 1781 1782 /* 1783 * save_font(): 1784 * Read the font data in the requested font page from the video adapter. 1785 * 1786 * EGA/VGA 1787 */ 1788 static int 1789 vga_save_font(video_adapter_t *adp, int page, int fontsize, int fontwidth, 1790 u_char *data, int ch, int count) 1791 { 1792 #ifndef VGA_NO_FONT_LOADING 1793 u_char buf[PARAM_BUFSIZE]; 1794 vm_offset_t segment; 1795 int c; 1796 #ifdef VGA_ALT_SEQACCESS 1797 int s; 1798 u_char val = 0; 1799 #endif 1800 1801 prologue(adp, V_ADP_FONT, ENODEV); 1802 1803 if (fontsize < 14) { 1804 /* FONT_8 */ 1805 fontsize = 8; 1806 } else if (fontsize >= 32) { 1807 fontsize = 32; 1808 } else if (fontsize >= 16) { 1809 /* FONT_16 */ 1810 fontsize = 16; 1811 } else { 1812 /* FONT_14 */ 1813 fontsize = 14; 1814 } 1815 1816 if (page < 0 || page >= 8 || fontwidth != 8) 1817 return EINVAL; 1818 segment = FONT_BUF + 0x4000*page; 1819 if (page > 3) 1820 segment -= 0xe000; 1821 1822 #ifdef VGA_ALT_SEQACCESS 1823 if (adp->va_type == KD_VGA) { /* what about EGA? XXX */ 1824 s = splhigh(); 1825 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1826 outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */ 1827 outb(TSIDX, 0x01); outb(TSREG, val | 0x20); 1828 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1829 splx(s); 1830 } 1831 #endif 1832 1833 set_font_mode(adp, buf); 1834 if (fontsize == 32) { 1835 bcopy_fromio((uintptr_t)segment + ch*32, data, fontsize*count); 1836 } else { 1837 for (c = ch; count > 0; ++c, --count) { 1838 bcopy_fromio((uintptr_t)segment + c*32, data, fontsize); 1839 data += fontsize; 1840 } 1841 } 1842 set_normal_mode(adp, buf); 1843 1844 #ifdef VGA_ALT_SEQACCESS 1845 if (adp->va_type == KD_VGA) { 1846 s = splhigh(); 1847 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1848 outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */ 1849 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1850 splx(s); 1851 } 1852 #endif 1853 1854 return 0; 1855 #else /* VGA_NO_FONT_LOADING */ 1856 return ENODEV; 1857 #endif /* VGA_NO_FONT_LOADING */ 1858 } 1859 1860 /* 1861 * load_font(): 1862 * Set the font data in the requested font page. 1863 * NOTE: it appears that some recent video adapters do not support 1864 * the font page other than 0... XXX 1865 * 1866 * EGA/VGA 1867 */ 1868 static int 1869 vga_load_font(video_adapter_t *adp, int page, int fontsize, int fontwidth, 1870 u_char *data, int ch, int count) 1871 { 1872 #ifndef VGA_NO_FONT_LOADING 1873 u_char buf[PARAM_BUFSIZE]; 1874 vm_offset_t segment; 1875 int c; 1876 #ifdef VGA_ALT_SEQACCESS 1877 int s; 1878 u_char val = 0; 1879 #endif 1880 1881 prologue(adp, V_ADP_FONT, ENODEV); 1882 1883 if (fontsize < 14) { 1884 /* FONT_8 */ 1885 fontsize = 8; 1886 } else if (fontsize >= 32) { 1887 fontsize = 32; 1888 } else if (fontsize >= 16) { 1889 /* FONT_16 */ 1890 fontsize = 16; 1891 } else { 1892 /* FONT_14 */ 1893 fontsize = 14; 1894 } 1895 1896 if (page < 0 || page >= 8 || fontwidth != 8) 1897 return EINVAL; 1898 segment = FONT_BUF + 0x4000*page; 1899 if (page > 3) 1900 segment -= 0xe000; 1901 1902 #ifdef VGA_ALT_SEQACCESS 1903 if (adp->va_type == KD_VGA) { /* what about EGA? XXX */ 1904 s = splhigh(); 1905 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1906 outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */ 1907 outb(TSIDX, 0x01); outb(TSREG, val | 0x20); 1908 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1909 splx(s); 1910 } 1911 #endif 1912 1913 set_font_mode(adp, buf); 1914 if (fontsize == 32) { 1915 bcopy_toio(data, (uintptr_t)segment + ch*32, fontsize*count); 1916 } else { 1917 for (c = ch; count > 0; ++c, --count) { 1918 bcopy_toio(data, (uintptr_t)segment + c*32, fontsize); 1919 data += fontsize; 1920 } 1921 } 1922 set_normal_mode(adp, buf); 1923 1924 #ifdef VGA_ALT_SEQACCESS 1925 if (adp->va_type == KD_VGA) { 1926 s = splhigh(); 1927 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1928 outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */ 1929 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1930 splx(s); 1931 } 1932 #endif 1933 1934 return 0; 1935 #else /* VGA_NO_FONT_LOADING */ 1936 return ENODEV; 1937 #endif /* VGA_NO_FONT_LOADING */ 1938 } 1939 1940 /* 1941 * show_font(): 1942 * Activate the requested font page. 1943 * NOTE: it appears that some recent video adapters do not support 1944 * the font page other than 0... XXX 1945 * 1946 * EGA/VGA 1947 */ 1948 static int 1949 vga_show_font(video_adapter_t *adp, int page) 1950 { 1951 #ifndef VGA_NO_FONT_LOADING 1952 static u_char cg[] = { 0x00, 0x05, 0x0a, 0x0f, 0x30, 0x35, 0x3a, 0x3f }; 1953 int s; 1954 1955 prologue(adp, V_ADP_FONT, ENODEV); 1956 if (page < 0 || page >= 8) 1957 return EINVAL; 1958 1959 s = splhigh(); 1960 outb(TSIDX, 0x03); outb(TSREG, cg[page]); 1961 splx(s); 1962 1963 return 0; 1964 #else /* VGA_NO_FONT_LOADING */ 1965 return ENODEV; 1966 #endif /* VGA_NO_FONT_LOADING */ 1967 } 1968 1969 /* 1970 * save_palette(): 1971 * Read DAC values. The values have expressed in 8 bits. 1972 * 1973 * VGA 1974 */ 1975 static int 1976 vga_save_palette(video_adapter_t *adp, u_char *palette) 1977 { 1978 int bits; 1979 int i; 1980 1981 prologue(adp, V_ADP_PALETTE, ENODEV); 1982 1983 /* 1984 * We store 8 bit values in the palette buffer, while the standard 1985 * VGA has 6 bit DAC . 1986 */ 1987 outb(PALRADR, 0x00); 1988 bits = (adp->va_flags & V_ADP_DAC8) != 0 ? 0 : 2; 1989 for (i = 0; i < 256*3; ++i) 1990 palette[i] = inb(PALDATA) << bits; 1991 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 1992 return 0; 1993 } 1994 1995 static int 1996 vga_save_palette2(video_adapter_t *adp, int base, int count, 1997 u_char *r, u_char *g, u_char *b) 1998 { 1999 int bits; 2000 int i; 2001 2002 prologue(adp, V_ADP_PALETTE, ENODEV); 2003 2004 outb(PALRADR, base); 2005 bits = (adp->va_flags & V_ADP_DAC8) != 0 ? 0 : 2; 2006 for (i = 0; i < count; ++i) { 2007 r[i] = inb(PALDATA) << bits; 2008 g[i] = inb(PALDATA) << bits; 2009 b[i] = inb(PALDATA) << bits; 2010 } 2011 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 2012 return 0; 2013 } 2014 2015 /* 2016 * load_palette(): 2017 * Set DAC values. 2018 * 2019 * VGA 2020 */ 2021 static int 2022 vga_load_palette(video_adapter_t *adp, u_char *palette) 2023 { 2024 int bits; 2025 int i; 2026 2027 prologue(adp, V_ADP_PALETTE, ENODEV); 2028 2029 outb(PIXMASK, 0xff); /* no pixelmask */ 2030 outb(PALWADR, 0x00); 2031 bits = (adp->va_flags & V_ADP_DAC8) != 0 ? 0 : 2; 2032 for (i = 0; i < 256*3; ++i) 2033 outb(PALDATA, palette[i] >> bits); 2034 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 2035 outb(ATC, 0x20); /* enable palette */ 2036 return 0; 2037 } 2038 2039 static int 2040 vga_load_palette2(video_adapter_t *adp, int base, int count, 2041 u_char *r, u_char *g, u_char *b) 2042 { 2043 int bits; 2044 int i; 2045 2046 prologue(adp, V_ADP_PALETTE, ENODEV); 2047 2048 outb(PIXMASK, 0xff); /* no pixelmask */ 2049 outb(PALWADR, base); 2050 bits = (adp->va_flags & V_ADP_DAC8) != 0 ? 0 : 2; 2051 for (i = 0; i < count; ++i) { 2052 outb(PALDATA, r[i] >> bits); 2053 outb(PALDATA, g[i] >> bits); 2054 outb(PALDATA, b[i] >> bits); 2055 } 2056 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 2057 outb(ATC, 0x20); /* enable palette */ 2058 return 0; 2059 } 2060 2061 /* 2062 * set_border(): 2063 * Change the border color. 2064 * 2065 * CGA/EGA/VGA 2066 */ 2067 static int 2068 vga_set_border(video_adapter_t *adp, int color) 2069 { 2070 prologue(adp, V_ADP_BORDER, ENODEV); 2071 2072 switch (adp->va_type) { 2073 case KD_EGA: 2074 case KD_VGA: 2075 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 2076 outb(ATC, 0x31); outb(ATC, color & 0xff); 2077 break; 2078 case KD_CGA: 2079 outb(adp->va_crtc_addr + 5, color & 0x0f); /* color select register */ 2080 break; 2081 case KD_MONO: 2082 case KD_HERCULES: 2083 default: 2084 break; 2085 } 2086 return 0; 2087 } 2088 2089 /* 2090 * save_state(): 2091 * Read video register values. 2092 * NOTE: this function only reads the standard EGA/VGA registers. 2093 * any extra/extended registers of SVGA adapters are not saved. 2094 * 2095 * VGA 2096 */ 2097 static int 2098 vga_save_state(video_adapter_t *adp, void *p, size_t size) 2099 { 2100 video_info_t info; 2101 u_char *buf; 2102 int crtc_addr; 2103 int i, j; 2104 int s; 2105 2106 if (size == 0) { 2107 /* return the required buffer size */ 2108 prologue(adp, V_ADP_STATESAVE, 0); 2109 return sizeof(adp_state_t); 2110 } else { 2111 prologue(adp, V_ADP_STATESAVE, ENODEV); 2112 if (size < sizeof(adp_state_t)) 2113 return EINVAL; 2114 } 2115 2116 ((adp_state_t *)p)->sig = V_STATE_SIG; 2117 buf = ((adp_state_t *)p)->regs; 2118 bzero(buf, V_MODE_PARAM_SIZE); 2119 crtc_addr = adp->va_crtc_addr; 2120 2121 s = splhigh(); 2122 2123 outb(TSIDX, 0x00); outb(TSREG, 0x01); /* stop sequencer */ 2124 for (i = 0, j = 5; i < 4; i++) { 2125 outb(TSIDX, i + 1); 2126 buf[j++] = inb(TSREG); 2127 } 2128 buf[9] = inb(MISC + 10); /* dot-clock */ 2129 outb(TSIDX, 0x00); outb(TSREG, 0x03); /* start sequencer */ 2130 2131 for (i = 0, j = 10; i < 25; i++) { /* crtc */ 2132 outb(crtc_addr, i); 2133 buf[j++] = inb(crtc_addr + 1); 2134 } 2135 for (i = 0, j = 35; i < 20; i++) { /* attribute ctrl */ 2136 inb(crtc_addr + 6); /* reset flip-flop */ 2137 outb(ATC, i); 2138 buf[j++] = inb(ATC + 1); 2139 } 2140 for (i = 0, j = 55; i < 9; i++) { /* graph data ctrl */ 2141 outb(GDCIDX, i); 2142 buf[j++] = inb(GDCREG); 2143 } 2144 inb(crtc_addr + 6); /* reset flip-flop */ 2145 outb(ATC, 0x20); /* enable palette */ 2146 2147 splx(s); 2148 2149 #if 1 2150 if (vga_get_info(adp, adp->va_mode, &info) == 0) { 2151 if (info.vi_flags & V_INFO_GRAPHICS) { 2152 buf[0] = info.vi_width/info.vi_cwidth; /* COLS */ 2153 buf[1] = info.vi_height/info.vi_cheight - 1; /* ROWS */ 2154 } else { 2155 buf[0] = info.vi_width; /* COLS */ 2156 buf[1] = info.vi_height - 1; /* ROWS */ 2157 } 2158 buf[2] = info.vi_cheight; /* POINTS */ 2159 } 2160 #else 2161 buf[0] = readb(BIOS_PADDRTOVADDR(0x44a)); /* COLS */ 2162 buf[1] = readb(BIOS_PADDRTOVADDR(0x484)); /* ROWS */ 2163 buf[2] = readb(BIOS_PADDRTOVADDR(0x485)); /* POINTS */ 2164 buf[3] = readb(BIOS_PADDRTOVADDR(0x44c)); 2165 buf[4] = readb(BIOS_PADDRTOVADDR(0x44d)); 2166 #endif 2167 2168 return 0; 2169 } 2170 2171 /* 2172 * load_state(): 2173 * Set video registers at once. 2174 * NOTE: this function only updates the standard EGA/VGA registers. 2175 * any extra/extended registers of SVGA adapters are not changed. 2176 * 2177 * EGA/VGA 2178 */ 2179 static int 2180 vga_load_state(video_adapter_t *adp, void *p) 2181 { 2182 u_char *buf; 2183 int crtc_addr; 2184 int s; 2185 int i; 2186 2187 prologue(adp, V_ADP_STATELOAD, ENODEV); 2188 if (((adp_state_t *)p)->sig != V_STATE_SIG) 2189 return EINVAL; 2190 2191 buf = ((adp_state_t *)p)->regs; 2192 crtc_addr = adp->va_crtc_addr; 2193 2194 #if VGA_DEBUG > 1 2195 dump_buffer(buf, V_MODE_PARAM_SIZE); 2196 #endif 2197 2198 s = splhigh(); 2199 2200 outb(TSIDX, 0x00); outb(TSREG, 0x01); /* stop sequencer */ 2201 for (i = 0; i < 4; ++i) { /* program sequencer */ 2202 outb(TSIDX, i + 1); 2203 outb(TSREG, buf[i + 5]); 2204 } 2205 outb(MISC, buf[9]); /* set dot-clock */ 2206 outb(TSIDX, 0x00); outb(TSREG, 0x03); /* start sequencer */ 2207 outb(crtc_addr, 0x11); 2208 outb(crtc_addr + 1, inb(crtc_addr + 1) & 0x7F); 2209 for (i = 0; i < 25; ++i) { /* program crtc */ 2210 outb(crtc_addr, i); 2211 outb(crtc_addr + 1, buf[i + 10]); 2212 } 2213 inb(crtc_addr+6); /* reset flip-flop */ 2214 for (i = 0; i < 20; ++i) { /* program attribute ctrl */ 2215 outb(ATC, i); 2216 outb(ATC, buf[i + 35]); 2217 } 2218 for (i = 0; i < 9; ++i) { /* program graph data ctrl */ 2219 outb(GDCIDX, i); 2220 outb(GDCREG, buf[i + 55]); 2221 } 2222 inb(crtc_addr + 6); /* reset flip-flop */ 2223 outb(ATC, 0x20); /* enable palette */ 2224 2225 #ifdef notyet /* a temporary workaround for kernel panic, XXX */ 2226 #ifndef VGA_NO_BIOS 2227 if (adp->va_unit == V_ADP_PRIMARY) { 2228 writeb(BIOS_PADDRTOVADDR(0x44a), buf[0]); /* COLS */ 2229 writeb(BIOS_PADDRTOVADDR(0x484), buf[1] + rows_offset - 1); /* ROWS */ 2230 writeb(BIOS_PADDRTOVADDR(0x485), buf[2]); /* POINTS */ 2231 #if 0 2232 writeb(BIOS_PADDRTOVADDR(0x44c), buf[3]); 2233 writeb(BIOS_PADDRTOVADDR(0x44d), buf[4]); 2234 #endif 2235 } 2236 #endif /* VGA_NO_BIOS */ 2237 #endif /* notyet */ 2238 2239 splx(s); 2240 return 0; 2241 } 2242 2243 /* 2244 * set_origin(): 2245 * Change the origin (window mapping) of the banked frame buffer. 2246 */ 2247 static int 2248 vga_set_origin(video_adapter_t *adp, off_t offset) 2249 { 2250 /* 2251 * The standard video modes do not require window mapping; 2252 * always return error. 2253 */ 2254 return ENODEV; 2255 } 2256 2257 /* 2258 * read_hw_cursor(): 2259 * Read the position of the hardware text cursor. 2260 * 2261 * all adapters 2262 */ 2263 static int 2264 vga_read_hw_cursor(video_adapter_t *adp, int *col, int *row) 2265 { 2266 u_int16_t off; 2267 int s; 2268 2269 if (!vga_init_done) 2270 return ENXIO; 2271 2272 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) 2273 return ENODEV; 2274 2275 s = spltty(); 2276 outb(adp->va_crtc_addr, 14); 2277 off = inb(adp->va_crtc_addr + 1); 2278 outb(adp->va_crtc_addr, 15); 2279 off = (off << 8) | inb(adp->va_crtc_addr + 1); 2280 splx(s); 2281 2282 *row = off / adp->va_info.vi_width; 2283 *col = off % adp->va_info.vi_width; 2284 2285 return 0; 2286 } 2287 2288 /* 2289 * set_hw_cursor(): 2290 * Move the hardware text cursor. If col and row are both -1, 2291 * the cursor won't be shown. 2292 * 2293 * all adapters 2294 */ 2295 static int 2296 vga_set_hw_cursor(video_adapter_t *adp, int col, int row) 2297 { 2298 u_int16_t off; 2299 int s; 2300 2301 if (!vga_init_done) 2302 return ENXIO; 2303 2304 if ((col == -1) && (row == -1)) { 2305 off = -1; 2306 } else { 2307 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) 2308 return ENODEV; 2309 off = row*adp->va_info.vi_width + col; 2310 } 2311 2312 s = spltty(); 2313 outb(adp->va_crtc_addr, 14); 2314 outb(adp->va_crtc_addr + 1, off >> 8); 2315 outb(adp->va_crtc_addr, 15); 2316 outb(adp->va_crtc_addr + 1, off & 0x00ff); 2317 splx(s); 2318 2319 return 0; 2320 } 2321 2322 /* 2323 * set_hw_cursor_shape(): 2324 * Change the shape of the hardware text cursor. If the height is 2325 * zero or negative, the cursor won't be shown. 2326 * 2327 * all adapters 2328 */ 2329 static int 2330 vga_set_hw_cursor_shape(video_adapter_t *adp, int base, int height, 2331 int celsize, int blink) 2332 { 2333 int s; 2334 2335 if (!vga_init_done) 2336 return ENXIO; 2337 2338 s = spltty(); 2339 switch (adp->va_type) { 2340 case KD_VGA: 2341 case KD_CGA: 2342 case KD_MONO: 2343 case KD_HERCULES: 2344 default: 2345 if (height <= 0) { 2346 /* make the cursor invisible */ 2347 outb(adp->va_crtc_addr, 10); 2348 outb(adp->va_crtc_addr + 1, 32); 2349 outb(adp->va_crtc_addr, 11); 2350 outb(adp->va_crtc_addr + 1, 0); 2351 } else { 2352 outb(adp->va_crtc_addr, 10); 2353 outb(adp->va_crtc_addr + 1, celsize - base - height); 2354 outb(adp->va_crtc_addr, 11); 2355 outb(adp->va_crtc_addr + 1, celsize - base - 1); 2356 } 2357 break; 2358 case KD_EGA: 2359 if (height <= 0) { 2360 /* make the cursor invisible */ 2361 outb(adp->va_crtc_addr, 10); 2362 outb(adp->va_crtc_addr + 1, celsize); 2363 outb(adp->va_crtc_addr, 11); 2364 outb(adp->va_crtc_addr + 1, 0); 2365 } else { 2366 outb(adp->va_crtc_addr, 10); 2367 outb(adp->va_crtc_addr + 1, celsize - base - height); 2368 outb(adp->va_crtc_addr, 11); 2369 outb(adp->va_crtc_addr + 1, celsize - base); 2370 } 2371 break; 2372 } 2373 splx(s); 2374 2375 return 0; 2376 } 2377 2378 /* 2379 * blank_display() 2380 * Put the display in power save/power off mode. 2381 * 2382 * all adapters 2383 */ 2384 static int 2385 vga_blank_display(video_adapter_t *adp, int mode) 2386 { 2387 u_char val; 2388 int s; 2389 2390 s = splhigh(); 2391 switch (adp->va_type) { 2392 case KD_VGA: 2393 switch (mode) { 2394 case V_DISPLAY_SUSPEND: 2395 case V_DISPLAY_STAND_BY: 2396 outb(TSIDX, 0x01); 2397 val = inb(TSREG); 2398 outb(TSIDX, 0x01); 2399 outb(TSREG, val | 0x20); 2400 outb(adp->va_crtc_addr, 0x17); 2401 val = inb(adp->va_crtc_addr + 1); 2402 outb(adp->va_crtc_addr + 1, val & ~0x80); 2403 break; 2404 case V_DISPLAY_BLANK: 2405 outb(TSIDX, 0x01); 2406 val = inb(TSREG); 2407 outb(TSIDX, 0x01); 2408 outb(TSREG, val | 0x20); 2409 break; 2410 case V_DISPLAY_ON: 2411 outb(TSIDX, 0x01); 2412 val = inb(TSREG); 2413 outb(TSIDX, 0x01); 2414 outb(TSREG, val & 0xDF); 2415 outb(adp->va_crtc_addr, 0x17); 2416 val = inb(adp->va_crtc_addr + 1); 2417 outb(adp->va_crtc_addr + 1, val | 0x80); 2418 break; 2419 } 2420 break; 2421 2422 case KD_EGA: 2423 /* no support yet */ 2424 splx(s); 2425 return ENODEV; 2426 2427 case KD_CGA: 2428 switch (mode) { 2429 case V_DISPLAY_SUSPEND: 2430 case V_DISPLAY_STAND_BY: 2431 case V_DISPLAY_BLANK: 2432 outb(adp->va_crtc_addr + 4, 0x25); 2433 break; 2434 case V_DISPLAY_ON: 2435 outb(adp->va_crtc_addr + 4, 0x2d); 2436 break; 2437 } 2438 break; 2439 2440 case KD_MONO: 2441 case KD_HERCULES: 2442 switch (mode) { 2443 case V_DISPLAY_SUSPEND: 2444 case V_DISPLAY_STAND_BY: 2445 case V_DISPLAY_BLANK: 2446 outb(adp->va_crtc_addr + 4, 0x21); 2447 break; 2448 case V_DISPLAY_ON: 2449 outb(adp->va_crtc_addr + 4, 0x29); 2450 break; 2451 } 2452 break; 2453 default: 2454 break; 2455 } 2456 splx(s); 2457 2458 return 0; 2459 } 2460 2461 /* 2462 * mmap(): 2463 * Mmap frame buffer. 2464 * 2465 * all adapters 2466 */ 2467 static int 2468 vga_mmap_buf(video_adapter_t *adp, vm_ooffset_t offset, vm_paddr_t *paddr, 2469 int prot, vm_memattr_t *memattr) 2470 { 2471 if (adp->va_info.vi_flags & V_INFO_LINEAR) 2472 return -1; 2473 2474 #if VGA_DEBUG > 0 2475 printf("vga_mmap_buf(): window:0x%jx, offset:0x%jx\n", 2476 (uintmax_t)adp->va_info.vi_window, (uintmax_t)offset); 2477 #endif 2478 2479 /* XXX: is this correct? */ 2480 if (offset > adp->va_window_size - PAGE_SIZE) 2481 return -1; 2482 2483 *paddr = adp->va_info.vi_window + offset; 2484 return 0; 2485 } 2486 2487 #ifndef VGA_NO_MODE_CHANGE 2488 2489 static void 2490 planar_fill(video_adapter_t *adp, int val) 2491 { 2492 int length; 2493 int at; /* position in the frame buffer */ 2494 int l; 2495 2496 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ 2497 outw(GDCIDX, 0x0003); /* data rotate/function select */ 2498 outw(GDCIDX, 0x0f01); /* set/reset enable */ 2499 outw(GDCIDX, 0xff08); /* bit mask */ 2500 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ 2501 at = 0; 2502 length = adp->va_line_width*adp->va_info.vi_height; 2503 while (length > 0) { 2504 l = imin(length, adp->va_window_size); 2505 vidd_set_win_org(adp, at); 2506 bzero_io(adp->va_window, l); 2507 length -= l; 2508 at += l; 2509 } 2510 outw(GDCIDX, 0x0000); /* set/reset */ 2511 outw(GDCIDX, 0x0001); /* set/reset enable */ 2512 } 2513 2514 static void 2515 packed_fill(video_adapter_t *adp, int val) 2516 { 2517 int length; 2518 int at; /* position in the frame buffer */ 2519 int l; 2520 2521 at = 0; 2522 length = adp->va_line_width*adp->va_info.vi_height; 2523 while (length > 0) { 2524 l = imin(length, adp->va_window_size); 2525 vidd_set_win_org(adp, at); 2526 fill_io(val, adp->va_window, l); 2527 length -= l; 2528 at += l; 2529 } 2530 } 2531 2532 static void 2533 direct_fill(video_adapter_t *adp, int val) 2534 { 2535 int length; 2536 int at; /* position in the frame buffer */ 2537 int l; 2538 2539 at = 0; 2540 length = adp->va_line_width*adp->va_info.vi_height; 2541 while (length > 0) { 2542 l = imin(length, adp->va_window_size); 2543 vidd_set_win_org(adp, at); 2544 switch (adp->va_info.vi_pixel_size) { 2545 case sizeof(u_int16_t): 2546 fillw_io(val, adp->va_window, l/sizeof(u_int16_t)); 2547 break; 2548 case 3: 2549 /* FIXME */ 2550 break; 2551 case sizeof(u_int32_t): 2552 filll_io(val, adp->va_window, l/sizeof(u_int32_t)); 2553 break; 2554 } 2555 length -= l; 2556 at += l; 2557 } 2558 } 2559 2560 static int 2561 vga_clear(video_adapter_t *adp) 2562 { 2563 switch (adp->va_info.vi_mem_model) { 2564 case V_INFO_MM_TEXT: 2565 /* do nothing? XXX */ 2566 break; 2567 case V_INFO_MM_PLANAR: 2568 planar_fill(adp, 0); 2569 break; 2570 case V_INFO_MM_PACKED: 2571 packed_fill(adp, 0); 2572 break; 2573 case V_INFO_MM_DIRECT: 2574 direct_fill(adp, 0); 2575 break; 2576 } 2577 return 0; 2578 } 2579 2580 #ifdef notyet 2581 static void 2582 planar_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2583 { 2584 int banksize; 2585 int bank; 2586 int pos; 2587 int offset; /* offset within window */ 2588 int bx; 2589 int l; 2590 2591 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ 2592 outw(GDCIDX, 0x0003); /* data rotate/function select */ 2593 outw(GDCIDX, 0x0f01); /* set/reset enable */ 2594 outw(GDCIDX, 0xff08); /* bit mask */ 2595 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ 2596 2597 banksize = adp->va_window_size; 2598 bank = -1; 2599 while (cy > 0) { 2600 pos = adp->va_line_width*y + x/8; 2601 if (bank != pos/banksize) { 2602 vidd_set_win_org(adp, pos); 2603 bank = pos/banksize; 2604 } 2605 offset = pos%banksize; 2606 bx = (x + cx)/8 - x/8; 2607 if (x % 8) { 2608 outw(GDCIDX, ((0xff00 >> (x % 8)) & 0xff00) | 0x08); 2609 writeb(adp->va_window + offset, 0); 2610 ++offset; 2611 --bx; 2612 if (offset >= banksize) { 2613 offset = 0; 2614 ++bank; /* next bank */ 2615 vidd_set_win_org(adp, bank*banksize); 2616 } 2617 outw(GDCIDX, 0xff08); /* bit mask */ 2618 } 2619 while (bx > 0) { 2620 l = imin(bx, banksize); 2621 bzero_io(adp->va_window + offset, l); 2622 offset += l; 2623 bx -= l; 2624 if (offset >= banksize) { 2625 offset = 0; 2626 ++bank; /* next bank */ 2627 vidd_set_win_org(adp, bank*banksize); 2628 } 2629 } 2630 if ((x + cx) % 8) { 2631 outw(GDCIDX, (~(0xff00 >> ((x + cx) % 8)) & 0xff00) | 0x08); 2632 writeb(adp->va_window + offset, 0); 2633 ++offset; 2634 if (offset >= banksize) { 2635 offset = 0; 2636 ++bank; /* next bank */ 2637 vidd_set_win_org(adp, bank*banksize); 2638 } 2639 outw(GDCIDX, 0xff08); /* bit mask */ 2640 } 2641 ++y; 2642 --cy; 2643 } 2644 2645 outw(GDCIDX, 0xff08); /* bit mask */ 2646 outw(GDCIDX, 0x0000); /* set/reset */ 2647 outw(GDCIDX, 0x0001); /* set/reset enable */ 2648 } 2649 2650 static void 2651 packed_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2652 { 2653 int banksize; 2654 int bank; 2655 int pos; 2656 int offset; /* offset within window */ 2657 int end; 2658 2659 banksize = adp->va_window_size; 2660 bank = -1; 2661 cx *= adp->va_info.vi_pixel_size; 2662 while (cy > 0) { 2663 pos = adp->va_line_width*y + x*adp->va_info.vi_pixel_size; 2664 if (bank != pos/banksize) { 2665 vidd_set_win_org(adp, pos); 2666 bank = pos/banksize; 2667 } 2668 offset = pos%banksize; 2669 end = imin(offset + cx, banksize); 2670 fill_io(val, adp->va_window + offset, 2671 (end - offset)/adp->va_info.vi_pixel_size); 2672 /* the line may cross the window boundary */ 2673 if (offset + cx > banksize) { 2674 ++bank; /* next bank */ 2675 vidd_set_win_org(adp, bank*banksize); 2676 end = offset + cx - banksize; 2677 fill_io(val, adp->va_window, end/adp->va_info.vi_pixel_size); 2678 } 2679 ++y; 2680 --cy; 2681 } 2682 } 2683 2684 static void 2685 direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2686 { 2687 int banksize; 2688 int bank; 2689 int pos; 2690 int offset; /* offset within window */ 2691 int end; 2692 2693 /* 2694 * XXX: the function assumes that banksize is a muliple of 2695 * sizeof(u_int16_t). 2696 */ 2697 banksize = adp->va_window_size; 2698 bank = -1; 2699 cx *= sizeof(u_int16_t); 2700 while (cy > 0) { 2701 pos = adp->va_line_width*y + x*sizeof(u_int16_t); 2702 if (bank != pos/banksize) { 2703 vidd_set_win_org(adp, pos); 2704 bank = pos/banksize; 2705 } 2706 offset = pos%banksize; 2707 end = imin(offset + cx, banksize); 2708 fillw_io(val, adp->va_window + offset, 2709 (end - offset)/sizeof(u_int16_t)); 2710 /* the line may cross the window boundary */ 2711 if (offset + cx > banksize) { 2712 ++bank; /* next bank */ 2713 vidd_set_win_org(adp, bank*banksize); 2714 end = offset + cx - banksize; 2715 fillw_io(val, adp->va_window, end/sizeof(u_int16_t)); 2716 } 2717 ++y; 2718 --cy; 2719 } 2720 } 2721 2722 static void 2723 direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2724 { 2725 int banksize; 2726 int bank; 2727 int pos; 2728 int offset; /* offset within window */ 2729 int end; 2730 int i; 2731 int j; 2732 u_int8_t b[3]; 2733 2734 b[0] = val & 0x0000ff; 2735 b[1] = (val >> 8) & 0x0000ff; 2736 b[2] = (val >> 16) & 0x0000ff; 2737 banksize = adp->va_window_size; 2738 bank = -1; 2739 cx *= 3; 2740 while (cy > 0) { 2741 pos = adp->va_line_width*y + x*3; 2742 if (bank != pos/banksize) { 2743 vidd_set_win_org(adp, pos); 2744 bank = pos/banksize; 2745 } 2746 offset = pos%banksize; 2747 end = imin(offset + cx, banksize); 2748 for (i = 0, j = offset; j < end; i = (++i)%3, ++j) { 2749 writeb(adp->va_window + j, b[i]); 2750 } 2751 /* the line may cross the window boundary */ 2752 if (offset + cx >= banksize) { 2753 ++bank; /* next bank */ 2754 vidd_set_win_org(adp, bank*banksize); 2755 j = 0; 2756 end = offset + cx - banksize; 2757 for (; j < end; i = (++i)%3, ++j) { 2758 writeb(adp->va_window + j, b[i]); 2759 } 2760 } 2761 ++y; 2762 --cy; 2763 } 2764 } 2765 2766 static void 2767 direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2768 { 2769 int banksize; 2770 int bank; 2771 int pos; 2772 int offset; /* offset within window */ 2773 int end; 2774 2775 /* 2776 * XXX: the function assumes that banksize is a muliple of 2777 * sizeof(u_int32_t). 2778 */ 2779 banksize = adp->va_window_size; 2780 bank = -1; 2781 cx *= sizeof(u_int32_t); 2782 while (cy > 0) { 2783 pos = adp->va_line_width*y + x*sizeof(u_int32_t); 2784 if (bank != pos/banksize) { 2785 vidd_set_win_org(adp, pos); 2786 bank = pos/banksize; 2787 } 2788 offset = pos%banksize; 2789 end = imin(offset + cx, banksize); 2790 filll_io(val, adp->va_window + offset, 2791 (end - offset)/sizeof(u_int32_t)); 2792 /* the line may cross the window boundary */ 2793 if (offset + cx > banksize) { 2794 ++bank; /* next bank */ 2795 vidd_set_win_org(adp, bank*banksize); 2796 end = offset + cx - banksize; 2797 filll_io(val, adp->va_window, end/sizeof(u_int32_t)); 2798 } 2799 ++y; 2800 --cy; 2801 } 2802 } 2803 2804 static int 2805 vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2806 { 2807 switch (adp->va_info.vi_mem_model) { 2808 case V_INFO_MM_TEXT: 2809 /* do nothing? XXX */ 2810 break; 2811 case V_INFO_MM_PLANAR: 2812 planar_fill_rect(adp, val, x, y, cx, cy); 2813 break; 2814 case V_INFO_MM_PACKED: 2815 packed_fill_rect(adp, val, x, y, cx, cy); 2816 break; 2817 case V_INFO_MM_DIRECT: 2818 switch (adp->va_info.vi_pixel_size) { 2819 case sizeof(u_int16_t): 2820 direct_fill_rect16(adp, val, x, y, cx, cy); 2821 break; 2822 case 3: 2823 direct_fill_rect24(adp, val, x, y, cx, cy); 2824 break; 2825 case sizeof(u_int32_t): 2826 direct_fill_rect32(adp, val, x, y, cx, cy); 2827 break; 2828 } 2829 break; 2830 } 2831 return 0; 2832 } 2833 #else /* !notyet */ 2834 static int 2835 vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2836 { 2837 return ENODEV; 2838 } 2839 #endif /* notyet */ 2840 2841 static int 2842 vga_bitblt(video_adapter_t *adp,...) 2843 { 2844 /* FIXME */ 2845 return ENODEV; 2846 } 2847 2848 #endif /* !VGA_NO_MODE_CHANGE */ 2849 2850 static int 2851 get_palette(video_adapter_t *adp, int base, int count, 2852 u_char *red, u_char *green, u_char *blue, u_char *trans) 2853 { 2854 u_char *r; 2855 u_char *g; 2856 u_char *b; 2857 int error; 2858 2859 if (count < 0 || base < 0 || count > 256 || base > 256 || 2860 base + count > 256) 2861 return EINVAL; 2862 2863 r = malloc(count*3, M_DEVBUF, M_WAITOK); 2864 g = r + count; 2865 b = g + count; 2866 if (vga_save_palette2(adp, base, count, r, g, b)) { 2867 error = ENODEV; 2868 goto out; 2869 } 2870 error = copyout(r, red, count); 2871 if (error != 0) 2872 goto out; 2873 error = copyout(g, green, count); 2874 if (error != 0) 2875 goto out; 2876 error = copyout(b, blue, count); 2877 if (error != 0) 2878 goto out; 2879 if (trans != NULL) { 2880 bzero(r, count); 2881 error = copyout(r, trans, count); 2882 } 2883 out: 2884 free(r, M_DEVBUF); 2885 2886 return error; 2887 } 2888 2889 static int 2890 set_palette(video_adapter_t *adp, int base, int count, 2891 u_char *red, u_char *green, u_char *blue, u_char *trans) 2892 { 2893 u_char *r; 2894 u_char *g; 2895 u_char *b; 2896 int err; 2897 2898 if (count < 0 || base < 0 || count > 256 || base > 256 || 2899 base + count > 256) 2900 return EINVAL; 2901 2902 r = malloc(count*3, M_DEVBUF, M_WAITOK); 2903 g = r + count; 2904 b = g + count; 2905 err = copyin(red, r, count); 2906 if (!err) 2907 err = copyin(green, g, count); 2908 if (!err) 2909 err = copyin(blue, b, count); 2910 if (!err) 2911 err = vga_load_palette2(adp, base, count, r, g, b); 2912 free(r, M_DEVBUF); 2913 2914 return (err ? ENODEV : 0); 2915 } 2916 2917 static int 2918 vga_dev_ioctl(video_adapter_t *adp, u_long cmd, caddr_t arg) 2919 { 2920 switch (cmd) { 2921 case FBIO_GETWINORG: /* get frame buffer window origin */ 2922 *(u_int *)arg = 0; 2923 return 0; 2924 2925 case FBIO_SETWINORG: /* set frame buffer window origin */ 2926 return ENODEV; 2927 2928 case FBIO_SETDISPSTART: /* set display start address */ 2929 return (set_display_start(adp, 2930 ((video_display_start_t *)arg)->x, 2931 ((video_display_start_t *)arg)->y) 2932 ? ENODEV : 0); 2933 2934 case FBIO_SETLINEWIDTH: /* set scan line length in pixel */ 2935 return (set_line_length(adp, *(u_int *)arg) ? ENODEV : 0); 2936 2937 case FBIO_GETPALETTE: /* get color palette */ 2938 return get_palette(adp, ((video_color_palette_t *)arg)->index, 2939 ((video_color_palette_t *)arg)->count, 2940 ((video_color_palette_t *)arg)->red, 2941 ((video_color_palette_t *)arg)->green, 2942 ((video_color_palette_t *)arg)->blue, 2943 ((video_color_palette_t *)arg)->transparent); 2944 2945 case FBIO_SETPALETTE: /* set color palette */ 2946 return set_palette(adp, ((video_color_palette_t *)arg)->index, 2947 ((video_color_palette_t *)arg)->count, 2948 ((video_color_palette_t *)arg)->red, 2949 ((video_color_palette_t *)arg)->green, 2950 ((video_color_palette_t *)arg)->blue, 2951 ((video_color_palette_t *)arg)->transparent); 2952 2953 case FBIOGTYPE: /* get frame buffer type info. */ 2954 ((struct fbtype *)arg)->fb_type = fb_type(adp->va_type); 2955 ((struct fbtype *)arg)->fb_height = adp->va_info.vi_height; 2956 ((struct fbtype *)arg)->fb_width = adp->va_info.vi_width; 2957 ((struct fbtype *)arg)->fb_depth = adp->va_info.vi_depth; 2958 if ((adp->va_info.vi_depth <= 1) || (adp->va_info.vi_depth > 8)) 2959 ((struct fbtype *)arg)->fb_cmsize = 0; 2960 else 2961 ((struct fbtype *)arg)->fb_cmsize = 1 << adp->va_info.vi_depth; 2962 ((struct fbtype *)arg)->fb_size = adp->va_buffer_size; 2963 return 0; 2964 2965 case FBIOGETCMAP: /* get color palette */ 2966 return get_palette(adp, ((struct fbcmap *)arg)->index, 2967 ((struct fbcmap *)arg)->count, 2968 ((struct fbcmap *)arg)->red, 2969 ((struct fbcmap *)arg)->green, 2970 ((struct fbcmap *)arg)->blue, NULL); 2971 2972 case FBIOPUTCMAP: /* set color palette */ 2973 return set_palette(adp, ((struct fbcmap *)arg)->index, 2974 ((struct fbcmap *)arg)->count, 2975 ((struct fbcmap *)arg)->red, 2976 ((struct fbcmap *)arg)->green, 2977 ((struct fbcmap *)arg)->blue, NULL); 2978 2979 default: 2980 return fb_commonioctl(adp, cmd, arg); 2981 } 2982 } 2983 2984 static void 2985 dump_buffer(u_char *buf, size_t len) 2986 { 2987 int i; 2988 2989 for(i = 0; i < len;) { 2990 printf("%02x ", buf[i]); 2991 if ((++i % 16) == 0) 2992 printf("\n"); 2993 } 2994 } 2995 2996 /* 2997 * diag(): 2998 * Print some information about the video adapter and video modes, 2999 * with requested level of details. 3000 * 3001 * all adapters 3002 */ 3003 static int 3004 vga_diag(video_adapter_t *adp, int level) 3005 { 3006 u_char *mp; 3007 #if FB_DEBUG > 1 3008 video_info_t info; 3009 int i; 3010 #endif 3011 3012 if (!vga_init_done) 3013 return ENXIO; 3014 3015 #if FB_DEBUG > 1 3016 #ifndef VGA_NO_BIOS 3017 printf("vga: RTC equip. code:0x%02x, DCC code:0x%02x\n", 3018 rtcin(RTC_EQUIPMENT), readb(BIOS_PADDRTOVADDR(0x488))); 3019 printf("vga: CRTC:0x%x, video option:0x%02x, ", 3020 readw(BIOS_PADDRTOVADDR(0x463)), 3021 readb(BIOS_PADDRTOVADDR(0x487))); 3022 printf("rows:%d, cols:%d, font height:%d\n", 3023 readb(BIOS_PADDRTOVADDR(0x44a)), 3024 readb(BIOS_PADDRTOVADDR(0x484)) + 1, 3025 readb(BIOS_PADDRTOVADDR(0x485))); 3026 #endif /* VGA_NO_BIOS */ 3027 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 3028 printf("vga: param table EGA/VGA:%p", video_mode_ptr); 3029 printf(", CGA/MDA:%p\n", video_mode_ptr2); 3030 printf("vga: rows_offset:%d\n", rows_offset); 3031 #endif 3032 #endif /* FB_DEBUG > 1 */ 3033 3034 fb_dump_adp_info(VGA_DRIVER_NAME, adp, level); 3035 3036 #if FB_DEBUG > 1 3037 if (adp->va_flags & V_ADP_MODECHANGE) { 3038 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 3039 if (bios_vmode[i].vi_mode == NA) 3040 continue; 3041 if (get_mode_param(bios_vmode[i].vi_mode) == NULL) 3042 continue; 3043 fb_dump_mode_info(VGA_DRIVER_NAME, adp, &bios_vmode[i], level); 3044 } 3045 } else { 3046 vga_get_info(adp, adp->va_initial_mode, &info); /* shouldn't fail */ 3047 fb_dump_mode_info(VGA_DRIVER_NAME, adp, &info, level); 3048 } 3049 #endif /* FB_DEBUG > 1 */ 3050 3051 if ((adp->va_type != KD_EGA) && (adp->va_type != KD_VGA)) 3052 return 0; 3053 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 3054 if (video_mode_ptr == NULL) 3055 printf("vga%d: %s: WARNING: video mode switching is not " 3056 "fully supported on this adapter\n", 3057 adp->va_unit, adp->va_name); 3058 #endif 3059 if (level <= 0) 3060 return 0; 3061 3062 if (adp->va_type == KD_VGA) { 3063 printf("VGA parameters upon power-up\n"); 3064 dump_buffer(adpstate.regs, sizeof(adpstate.regs)); 3065 printf("VGA parameters in BIOS for mode %d\n", adp->va_initial_mode); 3066 dump_buffer(adpstate2.regs, sizeof(adpstate2.regs)); 3067 } 3068 3069 mp = get_mode_param(adp->va_initial_mode); 3070 if (mp == NULL) /* this shouldn't be happening */ 3071 return 0; 3072 printf("EGA/VGA parameters to be used for mode %d\n", adp->va_initial_mode); 3073 dump_buffer(mp, V_MODE_PARAM_SIZE); 3074 3075 return 0; 3076 } 3077