1 /*- 2 * Copyright (c) 2011-2012 Stefan Bethke. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #include <sys/param.h> 30 #include <sys/bus.h> 31 #include <sys/errno.h> 32 #include <sys/kernel.h> 33 #include <sys/module.h> 34 #include <sys/socket.h> 35 #include <sys/sockio.h> 36 #include <sys/sysctl.h> 37 #include <sys/systm.h> 38 39 #include <net/if.h> 40 #include <net/if_arp.h> 41 #include <net/ethernet.h> 42 #include <net/if_dl.h> 43 #include <net/if_media.h> 44 #include <net/if_types.h> 45 46 #include <machine/bus.h> 47 #include <dev/iicbus/iic.h> 48 #include <dev/iicbus/iiconf.h> 49 #include <dev/iicbus/iicbus.h> 50 #include <dev/mii/mii.h> 51 #include <dev/mii/miivar.h> 52 53 #include <dev/etherswitch/etherswitch.h> 54 #include <dev/etherswitch/rtl8366/rtl8366rbvar.h> 55 56 #include "iicbus_if.h" 57 #include "miibus_if.h" 58 #include "etherswitch_if.h" 59 60 61 struct rtl8366rb_softc { 62 struct mtx sc_mtx; /* serialize access to softc */ 63 int smi_acquired; /* serialize access to SMI/I2C bus */ 64 struct mtx callout_mtx; /* serialize callout */ 65 device_t dev; 66 char *ifname[RTL8366RB_NUM_PHYS]; 67 device_t miibus[RTL8366RB_NUM_PHYS]; 68 struct ifnet *ifp[RTL8366RB_NUM_PHYS]; 69 struct callout callout_tick; 70 }; 71 72 static etherswitch_info_t etherswitch_info = { 73 .es_nports = 6, 74 .es_nvlangroups = 16, 75 .es_name = "Realtek RTL8366RB" 76 }; 77 78 #define RTL_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 79 #define RTL_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 80 #define RTL_LOCK_ASSERT(_sc, _what) mtx_assert(&(_s)c->sc_mtx, (_what)) 81 #define RTL_TRYLOCK(_sc) mtx_trylock(&(_sc)->sc_mtx) 82 83 #define RTL_WAITOK 0 84 #define RTL_NOWAIT 1 85 86 #define RTL_SMI_ACQUIRED 1 87 #define RTL_SMI_ACQUIRED_ASSERT(_sc) \ 88 KASSERT((_sc)->smi_acquired == RTL_SMI_ACQUIRED, ("smi must be acquired @%s", __FUNCTION__)) 89 90 #if defined(DEBUG) 91 #define DPRINTF(dev, args...) device_printf(dev, args) 92 #define DEVERR(dev, err, fmt, args...) do { \ 93 if (err != 0) device_printf(dev, fmt, err, args); \ 94 } while (0) 95 #define DEBUG_INCRVAR(var) do { \ 96 var++; \ 97 } while (0) 98 99 static int callout_blocked = 0; 100 static int iic_select_retries = 0; 101 static int phy_access_retries = 0; 102 static SYSCTL_NODE(_debug, OID_AUTO, rtl8366rb, CTLFLAG_RD, 0, "rtl8366rb"); 103 SYSCTL_INT(_debug_rtl8366rb, OID_AUTO, callout_blocked, CTLFLAG_RW, &callout_blocked, 0, 104 "number of times the callout couldn't acquire the bus"); 105 SYSCTL_INT(_debug_rtl8366rb, OID_AUTO, iic_select_retries, CTLFLAG_RW, &iic_select_retries, 0, 106 "number of times the I2C bus selection had to be retried"); 107 SYSCTL_INT(_debug_rtl8366rb, OID_AUTO, phy_access_retries, CTLFLAG_RW, &phy_access_retries, 0, 108 "number of times PHY register access had to be retried"); 109 #else 110 #define DPRINTF(dev, args...) 111 #define DEVERR(dev, err, fmt, args...) 112 #define DEBUG_INCRVAR(var) 113 #endif 114 115 static int smi_probe(device_t dev); 116 static int smi_read(device_t dev, uint16_t addr, uint16_t *data, int sleep); 117 static int smi_write(device_t dev, uint16_t addr, uint16_t data, int sleep); 118 static int smi_rmw(device_t dev, uint16_t addr, uint16_t mask, uint16_t data, int sleep); 119 static void rtl8366rb_tick(void *arg); 120 static int rtl8366rb_ifmedia_upd(struct ifnet *); 121 static void rtl8366rb_ifmedia_sts(struct ifnet *, struct ifmediareq *); 122 123 static void 124 rtl8366rb_identify(driver_t *driver, device_t parent) 125 { 126 device_t child; 127 struct iicbus_ivar *devi; 128 129 if (device_find_child(parent, "rtl8366rb", -1) == NULL) { 130 child = BUS_ADD_CHILD(parent, 0, "rtl8366rb", -1); 131 devi = IICBUS_IVAR(child); 132 devi->addr = RTL8366RB_IIC_ADDR; 133 } 134 } 135 136 static int 137 rtl8366rb_probe(device_t dev) 138 { 139 if (smi_probe(dev) != 0) 140 return (ENXIO); 141 device_set_desc(dev, "RTL8366RB Ethernet Switch Controller"); 142 return (BUS_PROBE_DEFAULT); 143 } 144 145 static void 146 rtl8366rb_init(device_t dev) 147 { 148 /* Initialisation for TL-WR1043ND */ 149 smi_rmw(dev, RTL8366RB_RCR, 150 RTL8366RB_RCR_HARD_RESET, 151 RTL8366RB_RCR_HARD_RESET, RTL_WAITOK); 152 DELAY(100000); 153 /* Enable 16 VLAN mode */ 154 smi_rmw(dev, RTL8366RB_SGCR, 155 RTL8366RB_SGCR_EN_VLAN | RTL8366RB_SGCR_EN_VLAN_4KTB, 156 RTL8366RB_SGCR_EN_VLAN, RTL_WAITOK); 157 /* remove port 0 form VLAN 0 */ 158 smi_rmw(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_MU_REG, 0), 159 (1 << 0), 0, RTL_WAITOK); 160 /* add port 0 untagged and port 5 tagged to VLAN 1 */ 161 smi_rmw(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_MU_REG, 1), 162 ((1 << 5 | 1 << 0) << RTL8366RB_VMCR_MU_MEMBER_SHIFT) 163 | ((1 << 5 | 1 << 0) << RTL8366RB_VMCR_MU_UNTAG_SHIFT), 164 ((1 << 5 | 1 << 0) << RTL8366RB_VMCR_MU_MEMBER_SHIFT 165 | ((1 << 0) << RTL8366RB_VMCR_MU_UNTAG_SHIFT)), 166 RTL_WAITOK); 167 /* set PVLAN 1 for port 0 */ 168 smi_rmw(dev, RTL8366RB_PVCR_REG(0), 169 RTL8366RB_PVCR_VAL(0, RTL8366RB_PVCR_PORT_MASK), 170 RTL8366RB_PVCR_VAL(0, 1), RTL_WAITOK); 171 } 172 173 static int 174 rtl8366rb_attach(device_t dev) 175 { 176 uint16_t rev = 0; 177 struct rtl8366rb_softc *sc; 178 char name[IFNAMSIZ]; 179 int err = 0; 180 int i; 181 182 sc = device_get_softc(dev); 183 bzero(sc, sizeof(*sc)); 184 sc->dev = dev; 185 mtx_init(&sc->sc_mtx, "rtl8366rb", NULL, MTX_DEF); 186 sc->smi_acquired = 0; 187 mtx_init(&sc->callout_mtx, "rtl8366rbcallout", NULL, MTX_DEF); 188 189 rtl8366rb_init(dev); 190 smi_read(dev, RTL8366RB_CVCR, &rev, RTL_WAITOK); 191 device_printf(dev, "rev. %d\n", rev & 0x000f); 192 193 /* attach miibus and phys */ 194 /* PHYs need an interface, so we generate a dummy one */ 195 for (i = 0; i < RTL8366RB_NUM_PHYS; i++) { 196 sc->ifp[i] = if_alloc(IFT_ETHER); 197 sc->ifp[i]->if_softc = sc; 198 sc->ifp[i]->if_flags |= IFF_UP | IFF_BROADCAST | IFF_DRV_RUNNING 199 | IFF_SIMPLEX; 200 snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(dev)); 201 sc->ifname[i] = malloc(strlen(name)+1, M_DEVBUF, M_WAITOK); 202 bcopy(name, sc->ifname[i], strlen(name)+1); 203 if_initname(sc->ifp[i], sc->ifname[i], i); 204 err = mii_attach(dev, &sc->miibus[i], sc->ifp[i], rtl8366rb_ifmedia_upd, \ 205 rtl8366rb_ifmedia_sts, BMSR_DEFCAPMASK, \ 206 i, MII_OFFSET_ANY, 0); 207 if (err != 0) { 208 device_printf(dev, "attaching PHY %d failed\n", i); 209 return (err); 210 } 211 } 212 213 bus_generic_probe(dev); 214 bus_enumerate_hinted_children(dev); 215 err = bus_generic_attach(dev); 216 if (err != 0) 217 return (err); 218 219 callout_init_mtx(&sc->callout_tick, &sc->callout_mtx, 0); 220 rtl8366rb_tick(sc); 221 222 return (err); 223 } 224 225 static int 226 rtl8366rb_detach(device_t dev) 227 { 228 struct rtl8366rb_softc *sc = device_get_softc(dev); 229 int i; 230 231 for (i=0; i < RTL8366RB_NUM_PHYS; i++) { 232 if (sc->miibus[i]) 233 device_delete_child(dev, sc->miibus[i]); 234 if (sc->ifp[i] != NULL) 235 if_free(sc->ifp[i]); 236 free(sc->ifname[i], M_DEVBUF); 237 } 238 bus_generic_detach(dev); 239 callout_drain(&sc->callout_tick); 240 mtx_destroy(&sc->callout_mtx); 241 mtx_destroy(&sc->sc_mtx); 242 243 return (0); 244 } 245 246 static void 247 rtl8366rb_update_ifmedia(int portstatus, u_int *media_status, u_int *media_active) 248 { 249 *media_active = IFM_ETHER; 250 *media_status = IFM_AVALID; 251 if ((portstatus & RTL8366RB_PLSR_LINK) != 0) 252 *media_status |= IFM_ACTIVE; 253 else { 254 *media_active |= IFM_NONE; 255 return; 256 } 257 switch (portstatus & RTL8366RB_PLSR_SPEED_MASK) { 258 case RTL8366RB_PLSR_SPEED_10: 259 *media_active |= IFM_10_T; 260 break; 261 case RTL8366RB_PLSR_SPEED_100: 262 *media_active |= IFM_100_TX; 263 break; 264 case RTL8366RB_PLSR_SPEED_1000: 265 *media_active |= IFM_1000_T; 266 break; 267 } 268 if ((portstatus & RTL8366RB_PLSR_FULLDUPLEX) == 0) 269 *media_active |= IFM_FDX; 270 else 271 *media_active |= IFM_HDX; 272 if ((portstatus & RTL8366RB_PLSR_TXPAUSE) != 0) 273 *media_active |= IFM_ETH_TXPAUSE; 274 if ((portstatus & RTL8366RB_PLSR_RXPAUSE) != 0) 275 *media_active |= IFM_ETH_RXPAUSE; 276 } 277 278 static void 279 rtl833rb_miipollstat(struct rtl8366rb_softc *sc) 280 { 281 int i; 282 struct mii_data *mii; 283 struct mii_softc *miisc; 284 uint16_t value; 285 int portstatus; 286 287 for (i = 0; i < RTL8366RB_NUM_PHYS; i++) { 288 mii = device_get_softc(sc->miibus[i]); 289 if ((i % 2) == 0) { 290 if (smi_read(sc->dev, RTL8366RB_PLSR_BASE + i/2, &value, RTL_NOWAIT) != 0) { 291 DEBUG_INCRVAR(callout_blocked); 292 return; 293 } 294 portstatus = value & 0xff; 295 } else { 296 portstatus = (value >> 8) & 0xff; 297 } 298 rtl8366rb_update_ifmedia(portstatus, &mii->mii_media_status, &mii->mii_media_active); 299 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) { 300 if (IFM_INST(mii->mii_media.ifm_cur->ifm_media) != miisc->mii_inst) 301 continue; 302 mii_phy_update(miisc, MII_POLLSTAT); 303 } 304 } 305 } 306 307 static void 308 rtl8366rb_tick(void *arg) 309 { 310 struct rtl8366rb_softc *sc = arg; 311 312 rtl833rb_miipollstat(sc); 313 callout_reset(&sc->callout_tick, hz, rtl8366rb_tick, sc); 314 } 315 316 static int 317 smi_probe(device_t dev) 318 { 319 device_t iicbus, iicha; 320 int err, i; 321 uint16_t chipid; 322 char bytes[2]; 323 int xferd; 324 325 bytes[0] = RTL8366RB_CIR & 0xff; 326 bytes[1] = (RTL8366RB_CIR >> 8) & 0xff; 327 iicbus = device_get_parent(dev); 328 iicha = device_get_parent(iicbus); 329 iicbus_reset(iicbus, IIC_FASTEST, RTL8366RB_IIC_ADDR, NULL); 330 for (i=3; i--; ) { 331 IICBUS_STOP(iicha); 332 /* 333 * we go directly to the host adapter because iicbus.c 334 * only issues a stop on a bus that was successfully started. 335 */ 336 } 337 err = iicbus_request_bus(iicbus, dev, IIC_WAIT); 338 if (err != 0) 339 goto out; 340 err = iicbus_start(iicbus, RTL8366RB_IIC_ADDR | RTL_IICBUS_READ, RTL_IICBUS_TIMEOUT); 341 if (err != 0) 342 goto out; 343 err = iicbus_write(iicbus, bytes, 2, &xferd, RTL_IICBUS_TIMEOUT); 344 if (err != 0) 345 goto out; 346 err = iicbus_read(iicbus, bytes, 2, &xferd, IIC_LAST_READ, 0); 347 if (err != 0) 348 goto out; 349 chipid = ((bytes[1] & 0xff) << 8) | (bytes[0] & 0xff); 350 DPRINTF(dev, "chip id 0x%04x\n", chipid); 351 if (chipid != RTL8366RB_CIR_ID8366RB) 352 err = ENXIO; 353 out: 354 iicbus_stop(iicbus); 355 iicbus_release_bus(iicbus, dev); 356 return (err == 0 ? 0 : ENXIO); 357 } 358 359 static int 360 smi_acquire(struct rtl8366rb_softc *sc, int sleep) 361 { 362 int r = 0; 363 if (sleep == RTL_WAITOK) 364 RTL_LOCK(sc); 365 else 366 if (RTL_TRYLOCK(sc) == 0) 367 return (EWOULDBLOCK); 368 if (sc->smi_acquired == RTL_SMI_ACQUIRED) 369 r = EBUSY; 370 else { 371 r = iicbus_request_bus(device_get_parent(sc->dev), sc->dev, \ 372 sleep == RTL_WAITOK ? IIC_WAIT : IIC_DONTWAIT); 373 if (r == 0) 374 sc->smi_acquired = RTL_SMI_ACQUIRED; 375 } 376 RTL_UNLOCK(sc); 377 return (r); 378 } 379 380 static int 381 smi_release(struct rtl8366rb_softc *sc, int sleep) 382 { 383 if (sleep == RTL_WAITOK) 384 RTL_LOCK(sc); 385 else 386 if (RTL_TRYLOCK(sc) == 0) 387 return (EWOULDBLOCK); 388 RTL_SMI_ACQUIRED_ASSERT(sc); 389 iicbus_release_bus(device_get_parent(sc->dev), sc->dev); 390 sc->smi_acquired = 0; 391 RTL_UNLOCK(sc); 392 return (0); 393 } 394 395 static int 396 smi_select(device_t dev, int op, int sleep) 397 { 398 int err, i; 399 device_t iicbus = device_get_parent(dev); 400 struct iicbus_ivar *devi = IICBUS_IVAR(dev); 401 int slave = devi->addr; 402 403 RTL_SMI_ACQUIRED_ASSERT((struct rtl8366rb_softc *)device_get_softc(dev)); 404 /* 405 * The chip does not use clock stretching when it is busy, 406 * instead ignoring the command. Retry a few times. 407 */ 408 for (i = RTL_IICBUS_RETRIES; i--; ) { 409 err = iicbus_start(iicbus, slave | op, RTL_IICBUS_TIMEOUT); 410 if (err != IIC_ENOACK) 411 break; 412 if (sleep == RTL_WAITOK) { 413 DEBUG_INCRVAR(iic_select_retries); 414 pause("smi_select", RTL_IICBUS_RETRY_SLEEP); 415 } else 416 break; 417 } 418 return (err); 419 } 420 421 static int 422 smi_read_locked(struct rtl8366rb_softc *sc, uint16_t addr, uint16_t *data, int sleep) 423 { 424 int err; 425 device_t iicbus = device_get_parent(sc->dev); 426 char bytes[2]; 427 int xferd; 428 429 RTL_SMI_ACQUIRED_ASSERT(sc); 430 bytes[0] = addr & 0xff; 431 bytes[1] = (addr >> 8) & 0xff; 432 err = smi_select(sc->dev, RTL_IICBUS_READ, sleep); 433 if (err != 0) 434 goto out; 435 err = iicbus_write(iicbus, bytes, 2, &xferd, RTL_IICBUS_TIMEOUT); 436 if (err != 0) 437 goto out; 438 err = iicbus_read(iicbus, bytes, 2, &xferd, IIC_LAST_READ, 0); 439 if (err != 0) 440 goto out; 441 *data = ((bytes[1] & 0xff) << 8) | (bytes[0] & 0xff); 442 443 out: 444 iicbus_stop(iicbus); 445 return (err); 446 } 447 448 static int 449 smi_write_locked(struct rtl8366rb_softc *sc, uint16_t addr, uint16_t data, int sleep) 450 { 451 int err; 452 device_t iicbus = device_get_parent(sc->dev); 453 char bytes[4]; 454 int xferd; 455 456 RTL_SMI_ACQUIRED_ASSERT(sc); 457 bytes[0] = addr & 0xff; 458 bytes[1] = (addr >> 8) & 0xff; 459 bytes[2] = data & 0xff; 460 bytes[3] = (data >> 8) & 0xff; 461 462 err = smi_select(sc->dev, RTL_IICBUS_WRITE, sleep); 463 if (err == 0) 464 err = iicbus_write(iicbus, bytes, 4, &xferd, RTL_IICBUS_TIMEOUT); 465 iicbus_stop(iicbus); 466 467 return (err); 468 } 469 470 static int 471 smi_read(device_t dev, uint16_t addr, uint16_t *data, int sleep) 472 { 473 struct rtl8366rb_softc *sc = device_get_softc(dev); 474 int err; 475 476 err = smi_acquire(sc, sleep); 477 if (err != 0) 478 return (EBUSY); 479 err = smi_read_locked(sc, addr, data, sleep); 480 smi_release(sc, sleep); 481 DEVERR(dev, err, "smi_read()=%d: addr=%04x\n", addr); 482 return (err == 0 ? 0 : EIO); 483 } 484 485 static int 486 smi_write(device_t dev, uint16_t addr, uint16_t data, int sleep) 487 { 488 struct rtl8366rb_softc *sc = device_get_softc(dev); 489 int err; 490 491 err = smi_acquire(sc, sleep); 492 if (err != 0) 493 return (EBUSY); 494 err = smi_write_locked(sc, addr, data, sleep); 495 smi_release(sc, sleep); 496 DEVERR(dev, err, "smi_write()=%d: addr=%04x\n", addr); 497 return (err == 0 ? 0 : EIO); 498 } 499 500 static int 501 smi_rmw(device_t dev, uint16_t addr, uint16_t mask, uint16_t data, int sleep) 502 { 503 struct rtl8366rb_softc *sc = device_get_softc(dev); 504 int err; 505 uint16_t oldv, newv; 506 507 err = smi_acquire(sc, sleep); 508 if (err != 0) 509 return (EBUSY); 510 if (err == 0) { 511 err = smi_read_locked(sc, addr, &oldv, sleep); 512 if (err == 0) { 513 newv = oldv & ~mask; 514 newv |= data & mask; 515 if (newv != oldv) 516 err = smi_write_locked(sc, addr, newv, sleep); 517 } 518 } 519 smi_release(sc, sleep); 520 DEVERR(dev, err, "smi_rmw()=%d: addr=%04x\n", addr); 521 return (err == 0 ? 0 : EIO); 522 } 523 524 static etherswitch_info_t * 525 rtl_getinfo(device_t dev) 526 { 527 return (ðerswitch_info); 528 } 529 530 static int 531 rtl_readreg(device_t dev, int reg) 532 { 533 uint16_t data = 0; 534 535 smi_read(dev, reg, &data, RTL_WAITOK); 536 return (data); 537 } 538 539 static int 540 rtl_writereg(device_t dev, int reg, int value) 541 { 542 return (smi_write(dev, reg, value, RTL_WAITOK)); 543 } 544 545 static int 546 rtl_getport(device_t dev, etherswitch_port_t *p) 547 { 548 struct rtl8366rb_softc *sc; 549 struct ifmedia *ifm; 550 struct mii_data *mii; 551 struct ifmediareq *ifmr = &p->es_ifmr; 552 uint16_t v; 553 int err; 554 555 if (p->es_port < 0 || p->es_port >= RTL8366RB_NUM_PORTS) 556 return (ENXIO); 557 p->es_vlangroup = RTL8366RB_PVCR_GET(p->es_port, 558 rtl_readreg(dev, RTL8366RB_PVCR_REG(p->es_port))); 559 560 if (p->es_port < RTL8366RB_NUM_PHYS) { 561 sc = device_get_softc(dev); 562 mii = device_get_softc(sc->miibus[p->es_port]); 563 ifm = &mii->mii_media; 564 err = ifmedia_ioctl(sc->ifp[p->es_port], &p->es_ifr, ifm, SIOCGIFMEDIA); 565 if (err) 566 return (err); 567 } else { 568 /* fill in fixed values for CPU port */ 569 ifmr->ifm_count = 0; 570 smi_read(dev, RTL8366RB_PLSR_BASE + (RTL8366RB_NUM_PHYS)/2, &v, RTL_WAITOK); 571 v = v >> (8 * ((RTL8366RB_NUM_PHYS) % 2)); 572 rtl8366rb_update_ifmedia(v, &ifmr->ifm_status, &ifmr->ifm_active); 573 ifmr->ifm_current = ifmr->ifm_active; 574 ifmr->ifm_mask = 0; 575 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID; 576 } 577 return (0); 578 } 579 580 static int 581 rtl_setport(device_t dev, etherswitch_port_t *p) 582 { 583 int err; 584 struct rtl8366rb_softc *sc; 585 struct ifmedia *ifm; 586 struct mii_data *mii; 587 588 if (p->es_port < 0 || p->es_port >= RTL8366RB_NUM_PHYS) 589 return (ENXIO); 590 err = smi_rmw(dev, RTL8366RB_PVCR_REG(p->es_port), 591 RTL8366RB_PVCR_VAL(p->es_port, RTL8366RB_PVCR_PORT_MASK), 592 RTL8366RB_PVCR_VAL(p->es_port, p->es_vlangroup), RTL_WAITOK); 593 if (err) 594 return (err); 595 sc = device_get_softc(dev); 596 mii = device_get_softc(sc->miibus[p->es_port]); 597 ifm = &mii->mii_media; 598 err = ifmedia_ioctl(sc->ifp[p->es_port], &p->es_ifr, ifm, SIOCSIFMEDIA); 599 return (err); 600 } 601 602 static int 603 rtl_getvgroup(device_t dev, etherswitch_vlangroup_t *vg) 604 { 605 uint16_t vmcr[3]; 606 int i; 607 608 for (i=0; i<3; i++) 609 vmcr[i] = rtl_readreg(dev, RTL8366RB_VMCR(i, vg->es_vlangroup)); 610 611 vg->es_vid = RTL8366RB_VMCR_VID(vmcr); 612 vg->es_member_ports = RTL8366RB_VMCR_MEMBER(vmcr); 613 vg->es_untagged_ports = RTL8366RB_VMCR_UNTAG(vmcr); 614 vg->es_fid = RTL8366RB_VMCR_FID(vmcr); 615 return (0); 616 } 617 618 static int 619 rtl_setvgroup(device_t dev, etherswitch_vlangroup_t *vg) 620 { 621 int g = vg->es_vlangroup; 622 623 rtl_writereg(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_DOT1Q_REG, g), 624 (vg->es_vid << RTL8366RB_VMCR_DOT1Q_VID_SHIFT) & RTL8366RB_VMCR_DOT1Q_VID_MASK); 625 rtl_writereg(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_MU_REG, g), 626 ((vg->es_member_ports << RTL8366RB_VMCR_MU_MEMBER_SHIFT) & RTL8366RB_VMCR_MU_MEMBER_MASK) | 627 ((vg->es_untagged_ports << RTL8366RB_VMCR_MU_UNTAG_SHIFT) & RTL8366RB_VMCR_MU_UNTAG_MASK)); 628 rtl_writereg(dev, RTL8366RB_VMCR(RTL8366RB_VMCR_FID_REG, g), 629 vg->es_fid); 630 return (0); 631 } 632 633 static int 634 rtl_readphy(device_t dev, int phy, int reg) 635 { 636 struct rtl8366rb_softc *sc = device_get_softc(dev); 637 uint16_t data = 0; 638 int err, i, sleep; 639 640 if (phy < 0 || phy >= RTL8366RB_NUM_PHYS) 641 return (ENXIO); 642 if (reg < 0 || reg >= RTL8366RB_NUM_PHY_REG) 643 return (ENXIO); 644 sleep = RTL_WAITOK; 645 err = smi_acquire(sc, sleep); 646 if (err != 0) 647 return (EBUSY); 648 for (i = RTL_IICBUS_RETRIES; i--; ) { 649 err = smi_write_locked(sc, RTL8366RB_PACR, RTL8366RB_PACR_READ, sleep); 650 if (err == 0) 651 err = smi_write_locked(sc, RTL8366RB_PHYREG(phy, 0, reg), 0, sleep); 652 if (err == 0) { 653 err = smi_read_locked(sc, RTL8366RB_PADR, &data, sleep); 654 break; 655 } 656 DEBUG_INCRVAR(phy_access_retries); 657 DPRINTF(dev, "rtl_readphy(): chip not responsive, retrying %d more times\n", i); 658 pause("rtl_readphy", RTL_IICBUS_RETRY_SLEEP); 659 } 660 smi_release(sc, sleep); 661 DEVERR(dev, err, "rtl_readphy()=%d: phy=%d.%02x\n", phy, reg); 662 return (data); 663 } 664 665 static int 666 rtl_writephy(device_t dev, int phy, int reg, int data) 667 { 668 struct rtl8366rb_softc *sc = device_get_softc(dev); 669 int err, i, sleep; 670 671 if (phy < 0 || phy >= RTL8366RB_NUM_PHYS) 672 return (ENXIO); 673 if (reg < 0 || reg >= RTL8366RB_NUM_PHY_REG) 674 return (ENXIO); 675 sleep = RTL_WAITOK; 676 err = smi_acquire(sc, sleep); 677 if (err != 0) 678 return (EBUSY); 679 for (i = RTL_IICBUS_RETRIES; i--; ) { 680 err = smi_write_locked(sc, RTL8366RB_PACR, RTL8366RB_PACR_WRITE, sleep); 681 if (err == 0) 682 err = smi_write_locked(sc, RTL8366RB_PHYREG(phy, 0, reg), data, sleep); 683 if (err == 0) { 684 break; 685 } 686 DEBUG_INCRVAR(phy_access_retries); 687 DPRINTF(dev, "rtl_writephy(): chip not responsive, retrying %d more tiems\n", i); 688 pause("rtl_writephy", RTL_IICBUS_RETRY_SLEEP); 689 } 690 smi_release(sc, sleep); 691 DEVERR(dev, err, "rtl_writephy()=%d: phy=%d.%02x\n", phy, reg); 692 return (err == 0 ? 0 : EIO); 693 } 694 695 static int 696 rtl8366rb_ifmedia_upd(struct ifnet *ifp) 697 { 698 struct rtl8366rb_softc *sc = ifp->if_softc; 699 struct mii_data *mii = device_get_softc(sc->miibus[ifp->if_dunit]); 700 701 mii_mediachg(mii); 702 return (0); 703 } 704 705 static void 706 rtl8366rb_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 707 { 708 struct rtl8366rb_softc *sc = ifp->if_softc; 709 struct mii_data *mii = device_get_softc(sc->miibus[ifp->if_dunit]); 710 711 mii_pollstat(mii); 712 ifmr->ifm_active = mii->mii_media_active; 713 ifmr->ifm_status = mii->mii_media_status; 714 } 715 716 717 static device_method_t rtl8366rb_methods[] = { 718 /* Device interface */ 719 DEVMETHOD(device_identify, rtl8366rb_identify), 720 DEVMETHOD(device_probe, rtl8366rb_probe), 721 DEVMETHOD(device_attach, rtl8366rb_attach), 722 DEVMETHOD(device_detach, rtl8366rb_detach), 723 724 /* bus interface */ 725 DEVMETHOD(bus_add_child, device_add_child_ordered), 726 727 /* MII interface */ 728 DEVMETHOD(miibus_readreg, rtl_readphy), 729 DEVMETHOD(miibus_writereg, rtl_writephy), 730 731 /* etherswitch interface */ 732 DEVMETHOD(etherswitch_getinfo, rtl_getinfo), 733 DEVMETHOD(etherswitch_readreg, rtl_readreg), 734 DEVMETHOD(etherswitch_writereg, rtl_writereg), 735 DEVMETHOD(etherswitch_readphyreg, rtl_readphy), 736 DEVMETHOD(etherswitch_writephyreg, rtl_writephy), 737 DEVMETHOD(etherswitch_getport, rtl_getport), 738 DEVMETHOD(etherswitch_setport, rtl_setport), 739 DEVMETHOD(etherswitch_getvgroup, rtl_getvgroup), 740 DEVMETHOD(etherswitch_setvgroup, rtl_setvgroup), 741 742 DEVMETHOD_END 743 }; 744 745 DEFINE_CLASS_0(rtl8366rb, rtl8366rb_driver, rtl8366rb_methods, 746 sizeof(struct rtl8366rb_softc)); 747 static devclass_t rtl8366rb_devclass; 748 749 DRIVER_MODULE(rtl8366rb, iicbus, rtl8366rb_driver, rtl8366rb_devclass, 0, 0); 750 DRIVER_MODULE(miibus, rtl8366rb, miibus_driver, miibus_devclass, 0, 0); 751 DRIVER_MODULE(etherswitch, rtl8366rb, etherswitch_driver, etherswitch_devclass, 0, 0); 752 MODULE_VERSION(rtl8366rb, 1); 753 MODULE_DEPEND(rtl8366rb, iicbus, 1, 1, 1); /* XXX which versions? */ 754 MODULE_DEPEND(rtl8366rb, miibus, 1, 1, 1); /* XXX which versions? */ 755 MODULE_DEPEND(rtl8366rb, etherswitch, 1, 1, 1); /* XXX which versions? */ 756